The information in this document is subject to change without prior notice in order
to improve reliability, design, and function and does not represent a commitment on
the part of CyberResearch, Inc.
In no event will CyberResearch, Inc. be liable for direct, indirect, special, incidental,
or consequential damages arising out of the use of or inability to use the product or
documentation, even if advised of the possibility of such damages.
This document contains proprietary information protected by copyright. All rights
are reserved. No part of this manual may be reproduced by any mechanical,
electronic, or other means in any form without prior written permission of
CyberResearch, Inc.
Trademarks
“CyberResearch,” and “CZGL AT-16,” are trademarks of CyberResearch, Inc.
Other product names mentioned herein are used for identification purposes only
and may be trademarks and/or registered trademarks of their respective companies.
• NOTICE •
CyberResearch, Inc. does not authorize any CyberResearch product for use in life
support systems, medical equipment, and/or medical devices without the written
approval of the President of CyberResearch, Inc. Life support devices and systems
are devices or systems which are intended for surgical implantation into the body,
or to support or sustain life and whose failure to perform can be reasonably
expected to result in injury. Other medical equipment includes devices used for
monitoring, data acquisition, modification, or notification purposes in relation to life
support, life sustaining, or vital statistic recording. CyberResearch products are not
designed with the components required, are not subject to the testing required, and
are not submitted to the certification required to ensure a level of reliability
appropriate for the treatment and diagnosis of humans.
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Warnings appear where overlooked details may cause damage to the equipment or result
in personal injury. Warnings should be taken seriously. Warnings are easy to recognize.
The word “warning” is written as “WARNING,” both capitalized and bold and is followed by
text. The text is the warning message. A warning message is shown below:
WARNING:
MODEL:
Cautionary messages should also be heeded to help reduce the chance of losing data or
damaging the CZGL AT-16. Cautions are easy to recognize. The word “caution” is written
as “CAUTION,” both capitalized and bold and is followed. The text is the cautionary
message. A caution message is shown below:
This is an example of a warning message. Failure to adhere to warning
messages may result in permanent damage to the CZGL AT-16 or
personal injury to the user. Please take warning messages seriously.
CAUTION!
CAUTION:
This is an example of a caution message. Failure to adhere to cautions
messages may result in permanent damage to the CZGL AT-16.
Please take caution messages seriously.
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CZGL AT-16 CyberResearch® CPU Cards
NOTE:
These messages inform the reader of essential but non-critical information. These
messages should be read carefully as any directions or instructions contained therein can
help avoid making mistakes. Notes are easy to recognize. The word “note” is written as
“NOTE,” both capitalized and bold and is followed by text. The text is the cautionary
message. A note message is shown below:
NOTE:
This is an example of a note message. Notes should always be read.
Notes contain critical information about the CZGL AT-16. Please take
note messages seriously.
If any of the components listed in the checklist below are missing,
please do not proceed with the installation. Contact a CyberResearch
sales representative by calling (203) 643-5000, or by sending an email
to www.cyberresearch.com
The items listed below should all be included in the CZGL AT-16 package.
1 x CZGL AT-16 PCISA Motherboard
1 x LPT and RS-232 cable
2 x SATA cable
1 x USB cable
1 x Mini jumper pack
1 x Utility CD
Images of the above items are shown in Chapter 3.
.
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BIOS Menu 1: Main.......................................................................................................................93
BIOS Menu 2: Advanced..............................................................................................................95
BIOS Menu 3: CPU Configuration...............................................................................................96
BIOS Menu 4: IDEConfiguration.................................................................................................97
BIOS Menu 5: IDE Master and IDE Slave Configuration...........................................................99
BIOS Menu 6: IDE Master and IDE Slave Configuration........................................................ 104
BIOS Menu 7: Super IO Configuration..................................................................................... 105
BIOS Menu 8: Hardware Health Configuration....................................................................... 108
BIOS Menu 9: Power Configuration......................................................................................... 112
BIOS Menu 10: ACPI Configuration......................................................................................... 113
BIOS Menu 11:Advanced Power Management Configuration.............................................. 114
BIOS Menu 12: Remote Access Configuration....................................................................... 117
BIOS Menu 13: USB Configuration.......................................................................................... 121
BIOS Menu 14: PCI/PnP Configuration.................................................................................... 123
BIOS Menu 15: Boot.................................................................................................................. 125
BIOS Menu 16: Boot Settings Configuration.......................................................................... 126
BIOS Menu 17: Boot Device Priority Settings ........................................................................ 128
BIOS Menu 18: Hard Disk Drives ............................................................................................. 129
BIOS Menu 19: CD/DVD Drives ................................................................................................ 130
BIOS Menu 20: Removable Drives........................................................................................... 131
BIOS Menu 21: Security............................................................................................................ 132
BIOS Menu 22: Chipset............................................................................................................. 133
BIOS Menu 23: Northbridge Chipset Configuration............................................................... 134
BIOS Menu 24: Video Function Configuration ....................................................................... 136
BIOS Menu 25: Southbridge Chipset Configuration.............................................................. 139
BIOS Menu 26: Exit.................................................................................................................... 140
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CyberResearch® CPU Cards CZGL AT-16
Chapter
1
1 Introduction
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1.1 Introduction
Figure 1-1: CZGL AT-16
The CZGL AT-16 is a PISA CPU card with an embedded 45 nm Intel® Atom™ processor.
The embedded Intel® Atom™ N270 processor has a 1.60 GHz clock speed, 533 MHz
FSB and 512 KB of L2 cache.
The CZGL AT-16 includes four graphics outputs. VGA on the rear panel provides basic
output capabilities for use with most monitors. Internally, an LVDS header provides a
connection to LCD displays for integrating the CZGL AT-16 into a system with built-in
monitor. The TV header provides output to a standard TV or HDTV through the optional
adapter cables, which provide a single cable connection on a card slot and a cable
splitting the signal into the component parts. Finally, an SDVO connecto r provid es a direct
connection from the Northbridge SDVO port to an SDVO graphics card.
512 MB of DDR2 memory is included with the CZGL AT-16 (a custom option with a DDR2
SO-DIMM slot is available). Permanent storage is provided through dual SATA ports,
offering 1
port, and thro
Other connectors on the CZGL AT-16 include six USB ports (two external, four internal),
an RS-232 port, an RS-232/422/485 port, LPT and digital I/O. An HD Audio connector
connects to an external audio kit, providing HD audio or AC’97 audio capabilities with the
.5 Gb/s transfer speeds. Legacy IDE connectivity is available through an IDE
ugh a CompactFlash® card located on the solder side of the CZGL AT-16.
The CZGL AT-16 has a wide variety of peripheral interface connectors. 746HFigure 1-2 is a
labeled photo of the peripheral interface connectors on the CZGL AT-16.
Figure 1-2: CZGL AT-16 Overview (Front)
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Figure 1-3: CZGL AT-16 Overview (Rear)
1.3 Peripheral Connectors and Jumpers
The CZGL AT-16 has the following connectors on-board:
1 x ATX power control connector
1 x Audio kit connector
1 x Backlight inverter connector
1 x Battery connector
1 x BIOS programming header
1 x CompactFlash® slot
1 x Digital I/O connector
1 x Edge connector
1 x Fan connector
1 x Floppy disk connector
1 x Front panel connector
1 x IDE connector
1 x Infrared connector
1 x Keyboard / mouse connector
1 x LVDS connector
1 x Parallel port connector
1 x RS-232 connector
1 x RS-232/422/485 connector
2 x SATA connectors
1 x SDVO connector
1 x TV connector
2 x USB connectors
The CZGL AT-16 has the following external peripheral interface connectors on the board
rear panel.
2 x Network ports
2 x USB ports
1 x VGA port
The CZGL AT-16 has the following on-board jumpers:
ATX power control
Clear CMOS
COM2 port mode
CompactFlash® card setup
LCD panel type selector
LCD voltage selector
1.4 Technical Specifications
CZGL AT-16 technical specifications are listed in 747HTable 1-1. See Chapter 2 for details.
Specification CZGL AT-16
Form Factor
System CPU
Front Side Bus (FSB)
PCISA
45 nm 1.60 GHz Intel® Atom™ N27 0
533 MHz
System Chipset
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512 MB of DDR2 RAM integrated (a DDR2 SO-DIMM slot is a
custom option)
One CompactFlash® socket
iTE IT8718F
VGA
LVDS
HDTV
SDVO
AMI BIOS label
Through HD Audio or AC’97 audio kit
Two Realtek RTL8111 CP PCIe GbE controllers
One RS-232 serial port
One RS-232/422/485 serial port
Six USB 2.0 devices supported (four internal, two external)
Hard Drives
SATA
Keyboard/mouse
Digital I/O
Watchdog Timer
Infrared
Power Supply
Power Consumption
Temperature
Humidity (operating)
One 40-pin IDE connector
Two 1.5 Gb/s SATA drives supported
Internal PS/2 keyboard/mouse connector
One 8-bit digital I/O connector
Software programmable 1-255 sec.
One infrared connector supports
Serial Infrared (SIR)
Amplitude Shift Keyed IR (ASKIR)
Figure 2-3 shows the data flow between the two on-board chipsets and other components
installed on the motherboard and described in the following sections of this chapter.
Figure 2-3: Data Flow Block Diagram
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2.3 Intel® Atom Processor
2.3.1 Overview
The CZGL AT-16 comes with an embedded 45 nm 1.60 GHz Intel® Atom™ N270
processor. The processor supports a 533 MHz FSB and has a 512 KB L2 cache. The low
power processor has a maximum power of 2.5 W. The CPU is shown in Figure 2-4 below.
Figure 2-4: CPU and Northbridge Connections
2.3.2 Features
Some of the features of the Intel® Atom™ N270 are listed below
On-die, primary 32-kB instructions cache and 24-kB write-back data cache
533 MHz source-synchronous front side bus (FSB)
2-Threads support
On-die 512-kB, 8-way L2 cache
Support for IA 32-bit architecture
Intel® Streaming SIMD Extensions-2 and -3 (Intel® SSE2 and Intel® SSE3)
support and Supplemental Streaming SIMD Extension 3 (SSSE3) support
Micro-FCBGA8 packaging technologies
Thermal management support via Intel® Thermal Monitor 1 and Intel Thermal
Monitor 2
FSB Lane Reversal for flexible routing
Supports C0/C1(e)/C2(e)/C4(e)
L2 Dynamic Cache Sizing
Advanced power management features including Enhanced Intel
SpeedStep® Technology
Execute Disable Bit support for enhanced security
2.3.3 Front Side Bus (FSB)
The Intel® Atom™ processor on the CZGL AT-16 is interfaced to the Intel® 945GSE
Northbridge through a 533 MHz front side bus (FSB). The FSB is shown in Figure 2-4
above.
2.4 Intel® 945GSE Northbridge Chip
The Intel® 945GSE Graphics and Memory Controller Hub (GMCH) supports the
embedded Intel® Atom™ N270 processor. The Intel® 945GSE is interfaced to the
processor through a 533 MHz FSB. The Northbridge connections are sho wn in Figure 2-4
and described below.
2.4.1 DDR2 Controller
There is 512 MB of memory on the CZGL AT-16. The memory has the following
specifications:
512 MB embedded (up to 2.0 GB can be installed on customized board with
SO-DIMM slot)
Support for DDR2 at 400 MHz and 533 MHz
No support for Dual-Channel Interleaved mode of operation
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Enhanced Addressing support (Swap only)
The embedded memory is shown in Figure 2-4 above.
2.4.2 Graphics
The Intel® 945GSE Northbridge chipset has an Intel® Gen. 3.5 integrated graphics
engine that supports the following display devices:
Analog CRT
LVDS
TV-Out
SDVO ports
2.4.2.1 Analog CRT (VGA)
A DB-15 VGA connector on the external peripheral interface connector panel is interfaced
to the Intel® 945GSE graphics engine. The Intel® 945GSE internal graphics engine, with
an integrated 400 MHz RAMDAC and hot plug CRT support, supports analog CRT
monitors up to QXGA.
2.4.2.2 LVDS
A 30-pin LVDS crimp connector is interfaced to the Intel® 945GSE graphics engine. The
Intel® 945GSE internal graphics engine supports LVDS displays with the following
features:
Up to UXGA monitors with a maximum resolution of 1600 x 1200
18-bit 25 MHz to 112 MHz single-channel or dual-channel LVDS screens
CPIS 1.5 compliant LVDS screens
2.4.2.3 TV Out
An external 7-pin DIN TV output connector is interfaced to the Intel® 945GSE graphics
engine. The Intel® 945GSE internal graphics engine has the following TV output features:
Three integrated 10-bit DACs
Macrovision support
Overscaling
NTSC and PAL formats supported
Supports RCA or S-VIDEO connectivity
Supports HDTV with the following resolutions:
o 480p
o 720p
o 1080i
o 1080p
2.4.2.4 SDVO and DVI
The SDVO port on the solder side of the CZGL AT-16 connects directly to the SDVO
output on the Intel® 945GSE. The SDVO connector is connected to an SDVO graphics
card.
Concurrent operation of PCIe x 1 with SDVO
Two SDVO p orts supported
o SDVO is muxed onto the PCIe pins
o DVI 1.0 support for external digital monitor
o Only Downstream HDCP support
o Supports TV and DVD formats
o Display hot plug support
2.5 Intel® ICH7M Southbridge Chipset
The Intel® ICH7M Southbridge chipset is connected to the Intel® 945GSE Northbridge
GMCH through the chip-to-chip Direct Media Interface (DMI). Some of the features of the
Intel® ICH7M are listed below.
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Figure 2-5: Intel® ICH7M Southbridge Connections
Complies with PCI Express Base Specification, Revision 1.0a
Complies with PCI Local Bus Specification, Revision 2.3 and supports
33 MHz PCI operations
Supports ACPI Power Management Logic
Contains:
o Enhanced DMA controller
o Interrupt controller
o Timer functions
Integrated SATA host controller with DMA operations interfaced to two SATA
Integrated IDE controller supports Ultra ATA 100/66/33
Supports the four USB 2.0 devices on the CZGL AT-16 with four UHCI
controllers and one EHCI controller
Complies with System Management Bus (SMBus) Specification, V ersion 2.0
Supports Audio Codec ’97 (AC’97) Revision 2.3
Supports Intel® High Definition Audio
Contains Low Pin Count (LPC) interface
Supports Firmware Hub (FWH) interface
Serial peripheral interface support
2.5.1 HD Audio Controller
The audio connector on the CZGL AT-16 is connected to the HD Audio/AC’97 audio
channel on the Intel® ICH7M. The audio connector connects to an HD Audio kit or an
AC’97 audio kit, both available as optional extras from CyberResearch, Inc.
The HD Audio kit provides the following connectors:
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2.5.2.1 IDE Connector
The IDE connector on the Intel® ICH7M Southbridge connects to an IDE hard disk or
other IDE device. PIO IDE transfers up to 16 MB/s and Ultra ATA transfers of 100 MB/s.
The integrated IDE interface is able to support the following IDE HDDs:
Ultra A T A/1 00, with data transfer rates up to 100 MB/s
Ultra A T A/6 6, with data transfer rates up to 66 MB/s
Ultra A T A/3 3, with data transfer rates up to 33 MB/s
Specification Ultra ATA/100 Ultra ATA/66 Ultra ATA/33
IDE devices
PIO Mode
PIO Max Transfer Rate
DMA/UDMA designation
DMA/UDMA Max Transfer
Controller Interface
Table 2-1: Supported HDD Specifications
2 2 2
0 – 4 0 – 4 0 – 4
16.6 MB/s 16.6 MB/s 16.6 MB/s
UDMA 5 UDMA 4 UDMA 2
100 MB/s 66 MB/s 33 MB/s
5 V 5 V 5 V
2.5.2.2 CompactFlash® Slot
The CompactFlash® slot on the CZGL AT-16 is interfaced through the IDE interface on
the Intel® ICH7M Southbridge. The CompactFlash® slot is on the solder side of the CZGL
AT-16.
2.5.3 Real Time Clock
256 bytes of battery backed RAM is provided by the Motorola MC146818 A real time clock
(RTC) integrated into the ICH7M. The RTC operates on a 3 V battery and 32.768 KHz
crystal. The RTC keeps track of the time and stores system data even when the system is
turned off.
The integrated SATA controller on the Intel® ICH7M Southbridge supports two SATA
drives with independent DMA operations. Two SATA controllers are connected to two
SATA connectors on the CZGL AT-16. SATA controller specifications are listed below.
Supports two SATA drive s
Support
Supports Serial ATA Specification, Revision 1.0a
s 1.5 Gb/s data transfer speeds
2.5.5 USB Controller
Up to six high-speed, full-speed or low-speed USB devices are supported by the Intel®
ICH7M on the CZGL AT-16. High-speed USB 2.0, with data transfers of up to 480 MB/s, is
enabled with the Intel® ICH7M integrated Enhanced Host Controller Interface (EHCI)
compliant host controller. USB full-speed and low-speed signaling is supported by the
Intel® ICH7M integrated Universal Host Controller Interface (UHCI) controllers.
The six USB ports implemented on the CZGL AT-16 are connected to four internal
connectors (on two headers) and two external connectors.
2.5.6 iTE IT8718F Super I/O chipset
The iTE IT8718F Super I/O chipset is connected to the Intel® ICH7M Southbridge through
the LPC bus. The iTE IT8718F is an LPC interface-based Super I/O device that comes
with Environment Controller integration.
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Figure 2-6: Super I/O Connections
Some of the features of the iTE IT8718F chipset are listed below:
ACPI and LANDesk Compliant
Enhanced Hardware Monitor
Fan Speed Controller
Two 16C550 UARTs for serial port control
One IEEE 1284 Parallel Port
Keyboard Controller
Watchdog Timer
Some of the Super I/O features are described in more detail below:
2.5.6.1 LPC Interface
The LPC interface on the Super I/O complies with the Intel® Low Pin Count Specification
Rev. 1.0. The LPC interface supports both LDRQ# and SERIRQ protocols as well as PCI
PME# interfaces.
2.5.6.2 16C550 UARTs
The onboard Super I/O has two integrated 16C550 UARTs that can support the following:
Two standard serial ports
IrDa 1.0 and ASKIR protocols
The input mode supports switch debouncing or programmable external IRQ routing. The
output mode supports two sets of programmable LED blinking periods.
2.5.6.4 Enhanced Hardware Monitor
The Super I/O Enhanced Hardware Monitor monitors three thermal inputs, VBAT
internally, and eight voltage monitor inputs. These hardware parameters are reported in
the BIOS and can be read from the BIOS Hardware Health Configuration menu.
2.5.6.5 Fan Speed Controller
The Super I/O fan speed controller enables the system to monitor the speed of the fan.
One of the pins on the fan connector is reserved for fan speed detection and interfaced to
the fan speed controller on the Super I/O. The fan speed is then reported in the BIOS.
2.5.6.6 Keyboard/Mouse Controller
The Super I/O keyboard/mouse controller can execute the 8042 instruction set. Some of
the keyboard controller features are listed below:
The 8042 instruction is compatible with a PS/2 keyboard and PS/2 mouse
Gate A20 and Keyboard re set output
Supports multiple keyboard power on events
Supports mouse double-click and/or mouse move power on events
2.5.6.7 Parallel Port
The multi-mode high-performance parallel port supports the bi-directional Standard
Parallel Port (SPP), the Enhanced Parallel Port (EPP) and the Extended Capabilities Port
(ECP) modes.
2.5.7 PCI Bus
The PCI interface on the Intel® ICH7M is compliant with the PCI Revision 2.3
implementation. The location of the edge connector is shown in Figure 2-5. Some of the
features of the PCI interface are listed below.
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PCI Revision 2.3 compliant
33 MHz
5 V tolerant PCI signals (except PME#)
Integrated PCI arbiter supports up to seven PCI bus masters
2.5.7.1 PCI Edge Connector
The PCI interface is connected directly to the PCI portion of the edge connector on the
CZGL AT-16.
2.5.7.2 ISA Edge Connector
The PCI interface is connected to the ISA edge connector through the iTE IT8888G
PCI-to-ISA chip.
2.5.8 PCIe Bus
The Intel® ICH7M provides four PCIe lanes. Some of these lanes are connected to the
components listed below:
Gigabit Ethernet Connector
The Gigabit Ethernet connections are shown in Figure 2-5.
2.5.8.1 Gigabit Ethernet Connector
Two of the four PCIe lanes on the Intel® ICH7M PCIe lanes are connected to the Realtek
RTL8111CP PCIe GbE controllers.
The Realtek RTL8111CP PCIe GbE controllers combine a triple-speed IEEE 802.3
compliant Media Access Controller (MAC) with a triple-speed Ethernet transceiver, 32-bit
PCIe bus controller, and embedded memory. With state-of-the-art DSP technology and
mixed-mode signal technology, they offer high-speed transmission over CAT 5 UTP cable
or CAT 3 UTP (10 Mb/s only) cable. Functions such as Crossover Detection &
Auto-Correction, polarity correction, adaptive equalization, cross-talk cancellation, echo
cancellation, timing recovery, and error correction are implemented to provide robust
transmission and reception capability at high speeds.
Some of the features of the Realtek RTL8111CP PCIe GbE controllers are listed below.
Integrated 10/100/1000 transceiver
Auto-Negotiation with Next Page capability
Supports PCI Express™ 1.1
Supports pair swap/polarity/skew correction
Crossover Detection & & Auto-Correction
Wake-on-LAN and remote wake-up support
Microsoft® NDIS5, NDIS6 Checksum Offload (IPv4, IPv6, TCP, UDP) and
Segmentation Task-offload (Large send and Giant send) support
Supports Full Duplex flow control (IEEE 802.3x)
Fully compliant with IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supports IEEE 802.1P Layer 2 Priority Encoding
Supports IEEE 802.1Q VLAN tagging
Serial EEPROM
Transmit/Receive on-chip buffer suppo rt
Supports power down/link down power saving
Supports PCI MSI (Message Signaled Interrupt) and MSI-X
Supports Receive-Side Scaling (RSS)
2.5.9 SPI Bus Components
The Intel® ICH7M SPI bus is connected to components listed below:
BIOS chip
2.5.9.1 SPI BIOS
The 4-pin Serial Peripheral Interface (SPI) is connected to an SPI BIOS chip. A licensed
copy of AMI BIOS is preinstalled on the SPI BIOS chip. A master-slave protocol is used for
communication on the SPI bus. The slave is connected to the Intel® ICH7M and is
implemented as a tri-state bus. The SPI BIOS is located on the reverse side of the JSPI1
jumper.
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2.6 Environmental and Power Specifications
2.6.1 System Monitoring
Two thermal inputs on the CZGL AT-16 Super I/O Enhanced Hardware Monitor monitors
the following temperatures:
CPU temperature
System temperature
The CZGL AT-16 Super I/O Enhanced Hardware Monitor also monitors the following fan
speeds:
CPU Fan speed
Voltage inputs on the CZGL AT-16 Super I/O Enhanced Hardware Monitor monitors the
following voltages:
CPU Core
+1.05 V
+3.30 V
+5.00 V
+12 V
+1.5 V
+1.8 V
+5 VSB
VBAT
The values for the above environmental parameters are all recorded in the BIOS
Hardware Health Configuration menu.
2.6.2 Operating Temperature and Temperature Control
The maximum and minimum operating temperatures for the CZGL AT-16 are listed below.
A cooling fan and heat sink must be installed on the CPU. Thermal paste must be
smeared on the lower side of the heat sink before it is mounted on the CPU. Heat sinks
are also mounted on the Northbridge and Southbridge chipsets to ensure the operating
temperature of these chips remain low.
2.6.3 Power Consumption
762HTable 2-2 shows the power consumption parameters for the CZGL AT-16 running with a
1.60 GHz Intel® Atom™ with 2.0 GB DDR2 memory.
Voltage Current
+5 V 2.89 A
+12 V 0.22 A
Table 2-2: Power Consumption
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Failure to take ESD precautions during the installation of the CZGL
AT-16 may result in permanent damage to the CZGL AT-16 and severe
injury to the user.
Electrostatic discharge (ESD) can cause serious damage to electronic components,
including the CZGL AT-16. Dry climates are especially susceptible to ESD. It is therefore
critical that whenever the CZGL AT-16, or any other electrical component is handled, the
following anti-static precautions are strictly adhered to.
Wear an anti-static wristband: - Wearing a simple anti-static wristband can
help to prevent ESD from damaging the board.
Self-grounding:- Before handling the board touch any grounded conducting
material. During the time the board is handled, frequently touch any
conducting materials that are connected to the ground.
Use an anti-static pad: When configuring the CZGL AT-16, place it on an
antic-static pad. This reduces the possibility of ESD damaging the CZGL
AT-16.
Only handle the edges of the PCB:- When handling the PCB, hold the PCB
by the edges.
3.2 Unpacking
3.2.1 Unpacking Precautions
When the CZGL AT-16 is unpacked, please do the following:
Follow the anti-static precautions outlined in Section 76
Make sure the packing box is facing upwards so th e CZG L AT-16 does not fall
3H3.1.
out of the box.
Make sure all the components shown in Section 76
4H3.3 are present.
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3.3 Unpacking Checklist
NOTE:
If any of the components listed in the checklist below are missing,
please do not proceed with the installation. Contact a CyberResearch
sales representative by calling (203) 643-5000, or by sending an email
to www.cyberresearch.com
.
3.3.1 Package Contents
The CZGL AT-16 is shipped with the following components:
Internal peripheral connectors are found on the motherboard and are only accessible
when the motherboard is outside of the chassis. T his sect ion h as c omplete des cript ion s of
all the internal, peripheral connectors on the CZGL AT-16.
The ATX power supply enable connector enables the CZGL AT-16 to be connected to an
ATX power supply. In default mode, the CZGL AT-16 can only us an AT power supply. To
enable an ATX power supply the AT Power Select jumper must also be configured. Please
refer to Chapter 3 for more details.
Figure 4-3: ATX Power Supply Enable Connector Location
PIN NO. DESCRIPTION
1 GND
2 PS-ON
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PIN NO. DESCRIPTION
3 +5 V Standby
Table 4-3: ATX Power Supply Enable Connector Pinouts
The 9-pin audio connector is connected to external audio devices including speakers and
microphones for the input and output of audio signals to and from the system.
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4.2.4 Battery Connector
CN Label: BT1
CN Type:
CN Location:
CN Pinouts:
2-pin wafer (1x2)
See Figure 4-6
See Table 4-6
The battery connector is connected to a backup battery. The battery connector is also
used to reset the CMOS memory if the incorrect BIOS settings have been made and the
system cannot boot up.
The cooling fan connector provides a 12 V, 500mA current to the cooling fan. The
connector has a "rotation" pin to get rotation signals from fans and notify the system so the
system BIOS can recognize the fan speed. Please note that only specified fans can issue
the rotation signals.
The four SATA drive connectors are each connected to a first generation SATA drive. First
generation SATA drives transfer data at speeds as high as 150 Mb/s.
The 10-pin serial port connector provides an RS-232 serial communications channel.
Figure 4-19: RS-232 Connector Pinout Locations
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 Data Carrier Direct (DCD) 2 Data Set Ready (DSR)
3 Receive Data (RX D) 4 Request To Send (RTS)
5 Transmit Data (TXD) 6 Clear To Send (CTS)
7 Data Terminal Ready (DTR) 8 Ring Indicator (RI)
1 Data Carrier Direct (DCD) 2 Data Set Ready (DSR)
3 Receive Data (RX D) 4 Request To Send (RTS)
5 Transmit Data (TXD) 6 Clear To Send (CTS)
7 Data Terminal Ready (DTR) 8 Ring Indicator (RI)
9 Ground (GND) 10 Ground (GND)
11 TXD485+ 12 TXD48513 RXD485+ 14 RXD485-
Table 4-20: RS-232/422/485 Connector Pinouts
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4.2.19 SDVO Connector
CN Label: SDVO1
CN Type:
CN Location:
CN Pinouts:
FPC connector
See Figure 4-21
See Table 4-21
The SDVO connector connects to an SDVO video card available from CyberResearch,
Inc. The SDVO connector interfaces directly to the SDVO port on the Intel® ICH7M
The 2x3 pin TV out connector connects to a TV output by using an S-Video or RCA
connector. The TV out connector makes displaying media data on a television easier.
6-pin header (2x3)
See Figure 4-22
See Table 4-22
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The 2x4 USB pin connectors provide connectivity to four USB 1.1 or USB 2.0 devices.
Each USB connector can support two USB devices. Additional external USB ports are
found on the rear panel. The USB ports are used for I/O bus expansion.
The CZGL AT-16 is equipped with two built-in RJ-45 Ethernet controllers. The controllers
can connect to the LAN through two RJ-45 LAN connectors. There are two LEDs on the
connector indicating the status of LAN. The pin assignments are listed in the following
table:
The RJ-45 Ethernet connector has two status LEDs, one green and one yello w. The green
LED indicates activity on the port and the yellow LED indicates the port is linked. See
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5.1 Anti-static Precautions
WARNING:
Failure to take ESD precautions during the installation of the CZGL
AT-16 may result in permanent damage to the CZGL AT-16 and severe
injury to the user.
Electrostatic discharge (ESD) can cause serious damage to electronic components,
including the CZGL AT-16. Dry climates are especially susceptible to ESD. It is therefore
critical that whenever the CZGL AT-16, or any other electrical component is handled, the
following anti-static precautions are strictly adhered to.
Wear an anti-static wristband: - Wearing a simple anti-static wristband can
help to prevent ESD from damaging the board.
Self-grounding:- Before handling the board touch any grounded conducting
material. During the time the board is handled, frequently touch any
conducting materials that are connected to the ground.
Use an anti-static pad: When configuring the CZGL AT-16, place it on an
antic-static pad. This reduces the possibility of ESD damaging the CZGL
AT-16.
Only handle the edges of the PCB:-: When handling the PCB, hold the PCB
The following installation notices and installation considerations should
be read and understood before the CZGL AT-16 is installed. All
installation notices pertaining to the installation of the CZGL AT-16
should be strictly adhered to. Failing to adhere to these precautions
may lead to severe damage of the CZGL AT-16 and injury to the
person installing the motherboard.
5.2.1 Installation Notices
WARNING:
The installation instructions described in this manual should be
carefully followed in order to prevent damage to the CZGL AT-16,
CZGL AT-16 components and injury to the user.
Before and during the installation please DO the following:
Read the user manual:
oThe user manual provides a complete description of the CZGL AT-16
installation instructions and configuration options.
Wear an electrostatic discharge cuff (ESD):
oElectronic components are easily damaged by ESD. Wearing an ESD cuff
removes ESD from the body and helps prevent ESD damage.
Place the CZGL AT-16 on an antistatic pad:
oWhen installing or configuring the motherboard, place it on an antistatic
pad. This helps to prevent potential ESD damage.
Turn all power to the CZGL AT-16 off:
oWhen working with the CZGL AT-16, make sure that it is disconnected
from all power supplies and that no electricity is being fed into the system.
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Before and during the installation of the CZGL AT-16 DO NOT:
DO NOT remove any of the stickers on the PCB board. These stickers are
required for warranty validation.
DO NOT use the product before verifying all the cables and power connectors
are properly connected.
DO NOT allow screws to come in contact with the PCB circuit, connector pins,
or its components.
5.2.2 Installation Checklist
The following checklist is provided to ensure the CZGL AT-16 is properly installed.
All the items in the packing list are present
A compatible memory module is properly inserted into the slot
The CF Type I or CF Type II card is properly installed into the CF socket
The jumpers have been properly configured
The CZGL AT-16 is inserted into a chassis with adequate ventilation
The correct power supply is being used
The following devices are properly connected
o Primary and secondary IDE device
o SATA drives
o Power supply
o USB cable
o Serial port cable
The following external peripheral devices are properly connected to the
chassis:
o VGA screen
o Keyboard
o Mouse
o USB devices
o LAN cable
5.3 Unpacking
When the CZGL AT-16 is unpacked, please check all the unpacking list items listed in
Chapter 3 are indeed present. If any of the packing items are missing, please do not
proceed with the installation. Contact a CyberResearch sales representative by calling
(203) 643-5000, or by sending an email to www.cyberresearch.com
5.4 CF Card Installation
NOTE:
The CZGL AT-16 can support both CF Type I cards and CF Type II
cards. For the complete specifications of the supported CF cards
please refer to Chapter 2.
To install the a CF card (Type 1 or Type 2) onto the CZGL AT-16, please follow the steps
below:
Step 1: Locate the CF card socket. Place the CZGL AT-16 on an anti-static pad with
the solder side facing up. Locate the CF card.
Step 2: Align the CF card. Make sure the CF card is properly aligned with the CF
.
socket.
Step 3: Insert the CF card. Gently insert the CF card into the socket making sure the
socket pins are properly inserted into the socket. See Figure 5-1. Step 0:
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Figure 5-1: CF Card Installation
5.5 ATX Power Control Connector
The ATX power control connector is required when using an ATX power source. To setup
the CZGL AT-16 for ATX power, follow the steps below.
Step 1: Set the ATX jumpers (there are two) as shown in AT/A TX Power Selection in
Section 5.6.1.
Step 2: Connect the ATX control cable. Connect the ATX control ca ble to ATXCTL1 on
the CZGL AT-16 and to the ATX control connector on the backplane.
(Figure 5-2)
Step 3: Turn on with the front panel connector. The system is turned on using the
Front Panel Connector described in Section 4.2.10.Step 0:
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5.6 Jumper Settings
NOTE:
A jumper is a metal bridge used to close an
electrical circuit. It consists of two or three
metal pins and a small metal clip (often
protected by a plastic cover) that slides over
the pins to connect them. To CLOSE/SHORT
a jumper means connecting the pins of the
jumper with the plastic clip and to OPEN a
jumper means removing the plastic clip from a
jumper.
Before the CZGL AT-16 is installed in the system, the jumpers must be set in accordance
with the desired configuration. The jumpers on the CZGL AT-16 are listed in Table 5-1.
If the CZGL AT-16 fails to boot due to improper BIOS settings, the clear CMOS jumper
clears the CMOS data and resets the system BIOS information. To do this, use the jumper
cap to close pins 2 and 3 for a few seconds then reinstall the jumper clip back to pins 1
and 2.
3-pin header
See
830HTable 5-3
See Figure 5-3
If the “CMOS Settings Wrong” message is displayed during the boot up process, the fault
may be corrected by pressing the F1 to enter the CMOS Setup menu. Do one of the
following:
Enter the correct CMOS setting
Load Optimal Defaults
Load Failsafe Defaults.
After having done one of the above, save the changes and exit the CMOS Setup menu.
The CF Card Setup jumper sets the CF Type I card or CF Type II cards as either the slave
device or the master device. CF Card Setup jumper settings are shown in Table 5-4.
CF Card Setup Description
Open Slave
Closed Master
Table 5-4: CF Card Setup Jumper Settings
5.6.4 COM2 RS-232/422/485 Selection Jumper
Jumper Label: JP1
Jumper Type:
8-pin header
Jumper Settings:
Jumper Location:
See Table 5-5
See Figure 5-3
The RS-232/422/485 Serial Port Select jumper sets the communication protocol used by
COM3. The RS-232/422/485 Serial Port Select settings are shown in Table 5-5.
RS-232/422/485 Description
1-2 RS-232
3-4 RS-422
5-6 RS-485
7-8 RS-485 with RTS Control
The LCD Panel Type Selection jumper allows the LVDS screen voltage to be set. The
LCD Panel Type Selection jumper settings are shown in Table 5-7.
LCD Panel
Selection
Open 640 x 480 (18-bit)
1-2 800 x 480 (18-bit)
3-4 800 x 600 (18-bit)
1-2 and 3-4 1024 x 768 (18-bit)
5-6 1280 x 1024 (36-bit)
1-2 and 5-6 1400 x 1050 (36-bit)
3-5 and 5-6 1400 x 900 (36-bit)
Description
1-2, 3-4 and 5-6 1600 x 1200 (36-bit)
Table 5-6: LCD Panel Type Selection Jumper Settings
5.6.6 LVDS Voltage Selection
WARNING:
Permanent damage to the screen and CZGL AT-16 may occur if the
wrong voltage is selected with this jumper. Please refer to the user
guide that came with the monitor to select the correct voltage.
The LVDS Voltage Selection jumper allows the LVDS screen voltage to be set. The
LVDS Voltage Selection jumper settings are shown in Table 5-7.
LCD Voltage Select Description
1-2 3.3 V
2-3 5 V
Table 5-7: LVDS Voltage Selection Jumper Settings
5.7 Chassis Installation
5.7.1 Airflow
WARNING:
Airflow is critical to the cooling of the CPU and other onboard
components. The chassis in which the CZGL AT-16 must have air
vents to allow cool air to move into the system and hot air to move out.
The CZGL AT-16 must be installed in a chassis with ventilation holes o n the sides allowin g
airflow to travel through the heat sink surface. In a system with an individual power supply
unit, the cooling fan of a power supply can also help generate airflow through the board
surface.
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NOTE:
CyberResearch has a wide range of backplanes available. Please visit
our website: www.cyberresearch.com
compatible backplanes and chassis. You can also contact a
CyberResearch sales representative by calling (203) 643-5000, or by
sending an email to www.cyberresearch.com
to view a wide selection of
.
5.7.2 Motherboard Installation
To install the CZGL AT-16 motherboard into the chassis please refer to the reference
material that came with the chassis.
5.8 Internal Peripheral Device Connections
The cables listed in 850HTable 5-8 are shipped with the CZGL AT-16.
Quantity Type
1 Parallel port and serial port cable
2 SATA cables
1 USB cable
Table 5-8: Cables Shipped with CZGL AT-16
Some optional items that can be purchased separately and installed on the CZGL AT-16
include:
5.1 channel audio kit
7.1 channel audio kit
ATX power cable
Dual port USB cable
Dual serial port cable
IDE cable
HDTV out cable
This is an optional item that must be ordered separately. For further
information contact a CyberResearch sales representative by calling
(203) 643-5000, or by sending an email to www.cyberresearch.com
The optional 5.1 channel audio kit connects to the 10-pin audio connector on the CZGL
AT-16. The audio kit consists of three audio jacks. One audio jack, Mic In, connects to a
microphone. The remaining two audio jacks, Line-In and Line-Out, connect to two
speakers. To install the audio kit, please refer to the steps below:
Step 1: Connect the audio kit cable. The audio kit is shipped with a cable that
connects the audio kit to the CZGL AT-16. Connect the cable to the connector
on the back of the audio kit. Make sure the pins are properly aligned (i.e. pin 1
connects to pin 1).
Step 2: Locate the audio connector. The location of the 10-pin audi o connector is
shown in Chapter 3.
Step 3: Align pin 1. Align pin 1 on the on-board connector with pin 1 on the audio kit
.
cable connector. Pin 1 on the audio kit cable connector is indicated with a white
dot. See Figure 5-4.
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Figure 5-4: 5.1 Channel Audio Kit
Step 4: Mount the audio kit onto the chassis. Once the audio kit is connected to the
CZGL AT-16, secure the audio kit bracket to the system chassis.
Step 5: Connect the audio devices. Connect one speaker to the line-in audio jack, one
speaker to the line-out audio jack and a microphone to the mic-in audio jack.
Step 6: Install the driver. If the 5.1 channel audio kit is used, the ALC655 Realtek
codec driver must be installed. Refer to Chapter 7 for driver installation
instructions.Step 0:
5.8.2 7.1 Channel Audio Kit Installation
NOTE:
This is an optional item that must be ordered separately. For further
information please contact a CyberResearch sales representative by
calling (203) 643-5000, or by sending an email to
The optional 7.1 channel audio kit connects to the 10-pin audio connector on the CZGL
AT-16. The audio kit consists of five audio jacks. One audio jack, Mic In, connects to a
microphone. The remaining four audio jacks, Line-In, Front-Out, Rear-Out, and Center
Subwoofer, connect to speakers. To install the audio kit, please refer to the steps below:
Step 1: Connect the audio kit cable. The audio kit is shipped with a cable that
connects the audio kit to the CZGL AT-16. Connect the cable to the conn ector on
the back of the audio kit. Make sure the pins are properly aligned (i.e. pin 1
connects to pin 1).
Step 2: Locate the audio connector. The location of the 10-pin audi o connector is
shown in Chapter 3.
Step 3: Align pin 1. Align pin 1 on the on-board connector with pin 1 on the audio kit
cable connector. Pin 1 on the audio kit cable connector is indicated with a white
dot. See Figure 5-5.
Figure 5-5: 7.1 Channel Audio Kit
Step 4: Mount the audio kit onto the chassis. Once the audio kit is connected to the
CZGL AT-16, secure the audio kit bracket to the system chassis.
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Step 5: Connect the audio devices. Connect one speaker to the line-in audio jack, one
speaker to the line-out audio jack and a microphone to the mic-in audio jack.
Step 6: Install the driver. If the 7.1 channel audio kit is used, the ALC883 Realtek
codec driver must be installed. Refer to Chapter 7 for driver installation
instructions.Step 0:
Step 1: corresponds to pin 1 on the connector.Step 0:
5.8.3 ATA Flat Cable Connection
The ATA 66/100 flat cable connects to the CZGL AT-16 to one or two IDE devices. To
connect an IDE HDD to the CZGL AT-16 please follow the instructions below.
Step 1: Locate the IDE connector. The location/s of the IDE device connector/s is/are
shown in Chapter 3.
Step 2: Insert the connector. Connect the IDE cable connector to the onboard
connector. See
851HFigure 5-6. A key on the front of the cable connector ensures it
Step 3: Connect the cable to an IDE device. Connect the two connectors on the other
side of the cable to one or two IDE devices. Make sure that pin 1 on the cable
corresponds to pin 1 on the connector.Step 0:
5.8.4 Dual RS-232 Cable with Slot Bracket
The dual RS-232 cable slot connector consists of two connectors attached to two
independent cables. Each cable is then attached to a D-sub 9 male connector that is
mounted onto a slot. To install the dual RS-232 cable, please follow the steps below.
Step 1: Locate the connectors. The locations of the RS-232 conne ctors are shown in
Chapter 3.
Step 2: Insert the cable connectors. Insert one connector into each serial port box
headers. See Figure 5-7. A key on the front of the cable connectors ensures the
connector can only be installed in one direction.
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Figure 5-7: Dual RS-232 Cable Installation
Step 3: Secure the bracket. The dual RS-232 connector has two D-sub 9 male
connectors secured on a bracket. To secure the bracket to the chassis please
refer to the reference material that came with the chassis.Step 0:
5.8.5 Floppy Drive Cable Connection
The FDD flat cable connects to the CZGL AT-16 to one FDD device. To connect an FDD
to the CZGL AT-16 please follow the instructions below.
Step 1: Locate the FDD connector. The location of the FDD device connector i s shown
in Chapter 3.
Step 2: Insert the connector. Connect the FDD cable connector to the on-board
connector. See Figure 5-8. A key on the front of the cable connector ensures it
can only be inserted in one direction.