The information in this document is subject to change without prior notice
in order to improve reliability, design, and function and does not represent
a commitment on the part of CyberResearch, Inc.
In no event will CyberResearch, Inc. be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use of or inability
to use the product or documentation, even if advised of the possibility of
such damages.
This document contains proprietary information protected by copyright.
All rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of CyberResearch, Inc.
Trademarks
“CyberResearch,” and “CZGG LU-10-X Series,” are trademarks of
CyberResearch, Inc. Other product names mentioned herein are used for
identification purposes only and may be trademarks and/or registered
trademarks of their respective companies.
• NOTICE •
CyberResearch, Inc. does not authorize any CyberResearch product for
use in life support systems, medical equipment, and/or medical devices
without the written approval of the President of CyberResearch, Inc. Life
support devices and systems are devices or systems which are intended
for surgical implantation into the body, or to support or sustain life and
whose failure to perform can be reasonably expected to result in injury.
Other medical equipment includes devices used for monitoring, data
acquisition, modification, or notification purposes in relation to life
support, life sustaining, or vital statistic recording. CyberResearch
products are not designed with the components required, are not subject
to the testing required, and are not submitted to the certification required
to ensure a level of reliability appropriate for the treatment and diagnosis of
humans.
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AC ’97 Audio Codec 97
ACPI Advanced Configuration and Power
Interface
APM Advanced Power Manage ment
ARMD ATAPI Removable Media Device
ASKIR Shift Keyed Infrared
ATA Advanced Technology Attachments
BIOS Basic Input/Output System
CFII Compact Flash Type 2
CMOS Complementary Metal Oxide
Semiconductor
CPU Central Processing Unit
Codec Compressor/Decompressor
COM Serial Port
DAC Digital to Analog Converter
DDR Double Data Rate
DIMM Dual Inline Memory Module
HDD Hard Disk Drive
IDE Integrated Data Electronics
I/O Input/Output
ICH4 I/O Controller Hub 4
L1 Cache Level 1 Cache
L2 Cache Level 2 Cache
LCD Liquid Crystal Display
LPT Parallel Port Connector
LVDS Low Voltage Differential Signaling
MAC Media Access Controller
OS Operating System
PCI Peripheral Connect Interface
PIO Programmed Input Output
PnP Plug and Play
POST Power On Self Test
RAM Random Access Memory
SATA Serial ATA
DIO Digital Input/Output
DMA Direct Memory Access
EIDE Enhanced IDE
EIST Enhanced Intel SpeedStep
Technology
FDD Floppy Disk Drive
FDC Floppy Disk Connector
FFIO Flexible File Input/Output
FIFO First In/First Out
FSB Front Side Bus
IrDA Infrared Data Association
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S.M.A.R.T Self Monitoring Analysis and
Reporting Technology
SPD Serial Presence Detect
S/PDI Sony/Philips Digital Interface
SDRAM Synchronous Dynamic Random
Access Memory
SIR Serial Infrared
UART Universal Asynchronous
Receiver-transmitter
USB Universal Serial Bus
VGA Video Graphics Adapter
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CZGG LU-10-X Series CyberResearch® CPU Cards
1.1 CZGG LU-10-X CPU Card Overview
The PISA form factor CZGG LU-10-X CPU card is fully equipped with a high performance,
low power VIA processor and advanced multi-mode I/Os.
1.1.1 Models
The CZGG LU-10-X series has 1 CPU card model. See Table 1-1.
Model Name Processor
CZGG LU-10-X
VIA LUKE 1GHz processor
Table 1-1: Model Variations
1.1.2 CZGG LU-10-X CPU Card Benefits
The CZGG LU-10-X is ideal for electronic devices that use flat panel displays includi ng car
entertainment systems, notebook computers and intelligent displays.
Some of the CZGG LU-10-X CPU card benefits include,
providing access to multiple PCI and ISA expansion slots for easy system
expansion
operating reliably in harsh industrial environments with ambient temperatures
as high as 60°C
rebooting automatically if the BIOS watchdog timer detects that the system is
no longer operating
1.1.3 CZGG LU-10-X CPU Card Features
Some of the CZGG LU-10-X CPU Card features are listed below:
PISA half size CPU card
RoHS compliant
Low power, fanless processor
Supports up to 1GB of 333MHz or 400MHz of DDR memory
Dual high performance gigabit Ethernet (GbE) controllers onboard
Eight USB 2.0 connectors
One compact flash (CF) connector slot
Two 150MB/s SATA drive channels
Two gigabit Ethernet (GbE) channels
One audio connector
The CZGG LU-10-X is a single board computer (SBC) that can be ordered with an
optional LCDC LVDS-LUKE-A daughterboard, which provides improved LVDS
connectivity. The LCDC LVDS-LUKE-A is mounted on the CPU Card, over the TTL
connector. The connectors on both the LCDC LVDS-LUKE-A and the CZGG LU-10-X are
introduced below. Unless specified at the time of order, the LCDC LVDS-LUKE-A is an
optional accessory that will not arrive with your CZGG LU-10-X package; contact
CyberResearch, Inc. for additional detail.
1.2.2 CZGG LU-10-X CPU Card Connectors
Figure 1-1 shows the connectors on the front side of the CZGG LU-10-X CPU card.
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CZGG LU-10-X Series CyberResearch® CPU Cards
Figure 1-1: CZGG LU-10-X CPU Card Overview (Front Side)
The CZGG LU-10-X CPU card has the following connectors onboard and accessible on
the front side of the CZGG LU-10-X (see Figure 1-1):
2 x IDE device connectors (primary and secondary)
1 x Floppy disk drive (FDD) connector
2 x SATA drive connectors
1 x Inverter connector
1 x TTL connector
1 x DIMM slot
1 x System fan connector
1 x GPIO connector
1 x Infrared (IrDA) connector
3 x USB 2.0 connectors (each supports two devices)
1 x USB 2.0 connector (supports one device)
1 x USB 2.0 port
1 x Audio connector
1 x Parallel port connector
1 x Power supply to mainboard connector
1 x Front panel connector
1 x Keyboard/mouse connector
The CZGG LU-10-X CPU card also has the following jumpers accessible on the front side.
Figure 1-3 shows the connectors on the front side of the optional LCDC LVDS-LUKE-A
expansion daughterboard.
Figure 1-3: LCDC LVDS-LUKE-A Daughterboard Overvi ew (Front Side)
The LCDC LVDS-LUKE-A has the following connectors onboard and accessible on the
front side of the CZGG LU-10-X (see Figure 1-3):
1 x LVDS connector
The LCDC LVDS-LUKE-A has one jumper (JP1) accessible on the front side (see Figure
1-3). The jumper is used to set the voltage for the LVDS display.
1.3 Technical Specifications
1.3.1 CZGG LU-10-X CPU card Technical Specifications
CZGG LU-10-X CPU card technical specifications are listed in Table 1-2. Detailed
descriptions of each specification can be found in Chapter 2 Detailed Specifications.
LCDC LVDS-LUKE-A technical specifications are listed in Table 1-3. Detailed descriptions
of each specification can be found in Chapter 2 Detailed Specifications.
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CZGG LU-10-X Series CyberResearch® CPU Cards
2.1 Compatible CyberResearch Backplanes
The CZGG LU-10-X CPU card is compatible with all many CyberResearch, Inc.
backplanes. For more information on these backplanes, please visit the
www.cyberresearch.com or contact CyberResearch, Inc.
2.2 CPU Support
The CZGG LU-10-X CPU card comes with a preinstalled 1GHz, ultra low voltage (ULV)
VIA® Luke processor. The new VIA 'Luke' CoreFusion Processing Platform integrates the
latest generation VIA Eden-N™ processor with the VIA CN400 Northbridge in a single, low
power package.
The Luke CoreFusion processor features include the following:
Rich Integration:- Highly integrated processing and digital m edia corelogic
combination delivers leading performance in a single, power-efficient,
space-saving package
S3 Graphics Unichrome Pro Graphics Core:- With an internal data flow
equivalent to what is available to the latest AGP 8X graphics cards,
Unichrome Pro has separate 128-bit data path betwee n the Northbridge for
pixel data flow and texture/command access. Sep arate 128-bit 2D and 3D
graphics engines ensure optimal performance for all multimedia,
entertainment, and productivity applications.
Flawless Digital Media Playback:- Unichrome Pro includes native support
for the most popular digital video and audio playback through hardware
MPEG-2/-4 acceleration and acclaimed VIA Vinyl Audio suite, delivering
spectacular playback for entertainment devices.
Maximum Display Flexibility:- Unichrome Pro with its optimized shared
memory architecture and high definition video support through the
Chromotion CE Video Display Engine, of fers a breathtaking visual experience
for the latest HDTV format displays. Support for LVDS and DVI interfaces
enables complete flexibility for integration into a wide range of embedded an d
personal electronics applications
Native Serial ATA:- The VIA DriveS taion™ Controller Suite with native dual
channel Serial ATA controller provides direct support for two 150MB/s Serial
ATA devices and the SATA lite™ interface expands support for two additional
SATA devices.
The CZGG LU-10-X CPU card has a VIA VT8237R Plus Southbridge on board. A
summary of the available Southbridge features is listed below. For more information on
this chipset please visit the VIA website.
VIA DriveStation™ Controller Suite
oSerial ATA
Full duplex high performance 150MB/s Dual Channel Serial ATA interface
Support for additional two Serial ATA devices through SATALite™ interface
o Parallel ATA 133
Supports up to four PATA devices
VIA Advanced Connectivity Suite
o USB 2.0 Controller
o Support for 8 USB 2.0/1.1 ports
Network Controller
o Enterprise Class 10/100Mbps Fast Ethernet MAC
PCI & LPC bus controllers
VIA Vinyl™ Audio
o VIA Vinyl integrated 5.1 surround sound
AC ’97 audio
VIA Six-TRAC codec
o VIA Vinyl Gold onboard 7.1 surround sound
24/96 resolution audio
VIA Envy24PT + VIA Six-TRAC Codec + additional DAC
o VIA Stylus Audio drivers
Integrated Sensaura technology
Full 3D gaming support
V-MAP Architecture
o Ultra V-Link
High throughput 1GB/s South Bridge/North Bridge interconnect
Supports new generation VIA North Bridges across all processor platforms
o 8X V-Link
High speed 533MB/s South Bridge/North Bridge interconnect
Supports current generation VIA North Bridges across all processor platforms
o VIA Hyperion 4in1 Unified Drivers
Optimized system performance and stability
2.4 Data Flow
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CZGG LU-10-X Series CyberResearch® CPU Cards
Figure 2-1 shows the data flow between the two onboard chipsets and other components
installed on the CPU card and described in the following sections of this chapter.
The LUKE processor comes with a S3 Chromotion graphics engine. The features listed
below are compatible with S3 Graphics' Chrome S20 Series processors:
Chromotion Video Acceleration:-
oWMV9 Motion Compensation H/W Acc eleration – Reduces CPU
utilization when decoding Windows Media Video 9 (WMV9) files.
o MPEG-2 IDCT and Motion Compensation H/W Acceleration –
Reduces CPU utilization when decoding MPEG2 files.
Chromotion Hi-Def™ Support:-
o HDTV Formats – Supports all 18 DTV ATSC formats.
o Adaptive Per-Pixel De-Interlacing – Produces superior image quality for
both still and motion images using a high quality De-Interlacing process.
oVideo Deblocking – Removes blocking artifacts inherent in low bit rate
images.
oChromoVision – Displays full screen video on secondary HDTV display
while a windows display of the video is on the primary CRT or DVI display.
oChromoVision Modes with ChromeView Non-Linear Scaling – Scales
a standard 4:3 image to fill a wide-screen 16:9 display with excellent
image quality.
oPanelDrive – Eliminates blurring effects with motion video on panel
displays by increasing panel response time.
oChromoColor – Provides adjustment controls for the brightness, contrast,
hue and saturation of the display of video.
Chromotion Video Image Controls:-
oChromoColor Tonal Adjustment – Allows fine-tuning of luma values for
the video display with controls for black point and white point
enhancement.
oArtisticLicense Effects – Allows high q uality image enhancements;
including Sharpening, Soft Focus, Embossing, and Neon Edge effects.
2.7 LVDS Displa y Support
The CZGG LU-10-X CPU card supports TTL displays. Using the optional LCDC
LVDS-LUKE-A daughterboard enables connectivity to 18-bit or 24-bit flat panel displays.
The LCDC LVDS-LUKE-A comes with an onboard VIA VT1631L Low Voltage Differential
Signaling (LVDS) Transmitter. The VIA VT1631L is designed to support pixel data
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CZGG LU-10-X Series CyberResearch® CPU Cards
transmissions from a Host to a Flat Panel display ranging from VGA to UXGA resolutions.
Call or visit www.cyberresearch.com
for more detail.
VIA VT1631 features are listed below.
Complies with Open LDI Specification for Digital Display Interfaces
25 to 85 MHz Input Clock Support
Supports VGA through UXGA Panel Resolution
Power-down mode <198uW max (TBD)
Two-wire Serial Communication Interface up to 400KHz
Narrow Bus reduces cable size and cost
Up to 4.76 Gbps bandwidth in dual 24-bit RGB into Dual Pixel Out
applications
Up to 592Mbytes/sec bandwidth
Dual 12-bit double pumped digital input port
PLL requires no external components
Support both LVTTL and low voltage level input (Capable of 1.0 to 1.8V)
Programmable input clock and control strobe select
Compatible with TIA/EIA-644
2.24 to 2.75 supply voltage
TQFP-100 Thin Quad Flat package
2.8 Memory Support
The CZGG LU-10-X CPU has one 184-pin dual inline memory module (DIMM) sockets
and supports one 400MHz or 333MHz SDRAM DDR DIMM modules with a maximum
RAM of up to 1GB.
2.9 PCI Bus Interface Support
The PCI bus on the CZGG LU-10-X CPU card has the following features:
33MHz Revision 2.2 is implemented
Maximum throughput: 133MB/sec
One PCI REQ/GNT pair can be given higher arbitration priority (intended for
external 1394 host controller)
64-bit addressing supported
2.10 GbE Ethernet
The onboard Realtek RTL8100C is a highly integrated and cost-effective single-chip Fast
Ethernet controller. It is enhanced with an ACPI (Advanced Configuration Power Interface)
management function for PCI in order to provide efficient power management for
advanced operating systems with OSPM (Operating System Directed Power
Management).
The onboard RTL8100C also supports remote wake-up to increase cost-efficiency in
network maintenance and management.
Realtek RTL8100C Features
128-pin PQFP/LQFP (PQFP package pin-to-pin compatible with Realtek
Supports PCI/mini-PCI interfaces
Integrates Fast Ethernet MAC, physical chip, and transceiver onto a single
chip
10Mbps and 100Mbps operation
Supports 10Mbps and 100Mbps N-way auto-negotiation
Supports 25MHz Crystal or 25MHz OSC as the internal clock source
Complies with PC99/PC2001 standards
Supports ACPI power management
Provides PCI bus master data transfer
Provides PCI memory space or I/O space mapped data transfer
Supports PCI clock speed of 16.75MHz-40MHz
Advanced power saving mode
Supports Wake-on-LAN and remote wake-up
Half/Full duplex capability
Supports Full Duplex Flow Control (IEEE 802.3x)
Provides interface to 93C46 EEPROM to store resource configuration and ID
parameters
Provides PCI clock run pin
Provides LED pins for network operation status indication
2.5/3.3V power supply with 5V tolerant I/Os
0.25µm CMOS process
2.11 Drive Interfaces
The CZGG LU-10-X can support the following drive interfaces.
2 x SATA drives
4 x IDE devices
1 x FDD
1 x Compact flash card
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2.11.1 SATA Drive Support
The CZGG LU-10-X CPU card supports two, first generation SATA drives, with transfer
rates up to 150MB/s.
2.11.2 IDE HDD Interfaces
The CZGG LU-10-X southbridge chipset IDE controller supports up to four HDDs with the
following specifications:
Supports PIO IDE transfers up to 16MB/s
Supports Ultra ATA/133 devices with data transfer rates up to 133MB/s
2.11.3 Floppy Disk Drive (FDD)
The CZGG LU-10-X CPU card supports a single FDD. The following FDD formats are
compatible with the board.
5.25”: 360KB and 1.2MB
3.5”: 720KB, 1.44MB and 2.88MB
2.11.4 Compact Flash Card
The CZGG LU-10-X CPU card supports standard CFII flash cards.
2.12 Serial Ports
The CZGG LU-10-X CPU card has two high-speed UART serial ports, configured as
COM1 and COM2. The serial ports have the following specifications.
A heat sink must be installed on the CPU. Thermal paste must be smeared on the lower
side of the heat sink before it is mounted on the CPU. Heat sinks are also mounted on the
southbridge chipset to ensure the operating temperature of these chips remain low.
2.19 Audio Codec
The CZGG LU-10-X has an integrated REALTEK ALC655 codec. The ALC655 codec is a
16-bit, full-duplex AC'97 Rev. 2.3 compatible six-channel audio CODEC designed for PC
multimedia systems, including host/soft audio and AMR/CNR-based designs. Some of the
features of the codec are listed below.
Meets performance requirements for audio on PC99/2001 systems
Meets Microsoft WHQL/WLP 2.0 audio requirements
16-bit Stereo full-duplex CODEC with 48KHz sampling rate
Compliant with AC'97 Rev 2.3 specifications
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CZGG LU-10-X Series CyberResearch® CPU Cards
Front-Out, Surround-Out, MIC-In and LINE-In Jack Sensing
14.318MHz -> 24.576MHz PLL to eliminate crystal
12.288MHz BITCLK input
Integrated PCBEEP generator to save buzzer
Interrupt capability
Three analog line-level stereo inputs with 5-bit volume control, LINE_IN, CD,
AUX
High-quality differential CD input
Two analog line-level mono inputs: PCBEEP, PHONE-IN
Two software selectable MIC input s
Dedicated Front-MIC input for front panel applications (software selectable)
Boost preamplifier for MIC input
LINE input shared with surround output; MIC input shared with Center and
LFE output
Built-in 50mW/20ohm amplifier for both Front-out and Surround-Out
External Amplifier Power Down (EAPD) capability
Power management and enhanced power saving features
Supports Power-Off CD function
Adjustable VREFOUT control
Supports 48KHz S/PDIF output, complying with AC'97 Rev 2.3 specifications
Supports 32K/44.1K/48KHz S/PDIF input
Power support: Digital: 3.3V; Analog: 3.3V/5V
Standard 48-pin LQFP package
EAX™ 1.0 & 2.0 compatible
Direct Sound 3D™ compatible
A3D™ compatible
I3DL2 compatible
HRTF 3D positional audio
10-band software equalizer
Voice cancellation and key shifting in Karaoke mode
AVRack® Media Player
Configuration Panel for improved user convenience
2.20 Power Consumption
Table 2-1 shows the power consumption parameters for the CZGG LU-10-X CPU card
when a 1GHz LUKE processor is running with one 256MB, 400MHz DDR module.
The following components are shipped with the CZGG LU-10-X.
1 x CZGG LU-10-X single board computer
1 x Mini jumper pack
1 x IDE flat cable 40p/40p/40p
2 x SATA cables
1 x SATA power cable
1 x RS-232 cable
1x USB cable
1 x Audio cable
1 x KB/PS2 Mouse Y cable
1 x Utility CD
2.21.2 Optional Accessory Items
The items shown in the list below are optional accessory items are purchased separately.
LCDC LVDS-LUKE-A
FDD cable
LPT cable
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Table 3-1 shows a list of the peripheral interface connectors on the CZGG LU-10-X CPU card Detailed descriptions of these connectors can be found in Section 3.2 on page 24.
Connector Type Label
ATX PSON connector 3-pin header CN4
Audio connector 10-pin header JAUD1
Compact Flash (CF) connector 50-pin header CF1
Fan connector 3-pin header FAN1
Floppy Disk connector 34-pin heade r FDD1
Front Panel connector 12-pin header CN1
GPIO connector 10-pin header DIO1
IDE Interface connector (Primary) 40-pin header IDE1
Figure 3-3 shows the onboard peripheral connector and onboard jumper of the LCDC
LVDS-LUKE-A daughterboard.
Figure 3-3: LCDC LVDS-LUKE-A Overview
3.1.3 Rear Panel Connectors
Figure 3-1 shows the rear panel connectors on the CZGG LU-10-X CPU card. Detailed descriptions of these connectors can be found in Section 3.3.
Connector Type Label
Ethernet connector RJ-45 LAN1
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Ethernet connector RJ-45 LAN2
Keyboard/mouse connector PS/2 KB/MS1
USB connector USB port USB1
Table 3-2: Rear Panel Connectors
3.1.4 Jumpers
Table 3-3 lists jumpers found on both the CZGG LU-10-X CPU card and the LCDC LVDS-LUKE-A. Detailed descriptions of these jumpers can be found in Section 3.3.4 on
page 53. (See Figure 3-1 and Figure 3-3 for jumper locations)
Description Label Type Location
Clear CMOS J4 3-pin header CZGG LU-10-X
LCD voltage setup JP1 4-pin header LCDC
CF card setup JP2 3-pin header CZGG LU-10-X
Table 3-3: Onboard Jumpers
3.2 Internal Peripheral Connectors
Internal peripheral connectors are found on the CPU card and are only accessible when
the CPU card is outside of the chassis. This section has complete descriptions of all the
internal, peripheral connectors on the CZGG LU-10-X CPU card and the LCDC
LVDS-LUKE-A expansion daughterboard.
3.2.1 ATX PSON Connector
CN Label: CN4
CN Type: 3-pin header (1x3)
LVDS-LUKE-A
CN Location: See Figure 3-4
CN Pinouts: See Table 3-4
The ATX PSON (CN4) connector connects to the backplane ATX connector. Refer to the
backplane reference documents for more details.
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CZGG LU-10-X Series CyberResearch® CPU Cards
3.2.2 Audio Connector
CN Label: JAUDIO1
CN Type: 10-pin header (2x5)
CN Location: See Figure 3-5
CN Pinouts: See Table 3-5
The onboard audio connector (JAUDIO1) is directly connected to an onboard AC’97
AUDIO CODEC. The audio connector directly connects to the MIC-IN, CD-IN and
LINE-IN.
A compact flash memory module is inserted to the Compact Flash connector (CF1).
Jumper 3 (JP3) configures the compact flash drive as either a slave or maste r de vice.
Figure 3-6: CF Flash Pinout Locations
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The cooling fan connector provides a 12V, 500mA current to a system cooling fan. The
connector has a "rotation" pin to get rotation signals from fans and notify the system so the
system BIOS can recognize the fan speed. Please note that only specified fans can issue
the rotation signals.
Figure 3-7: Fan Connector Pinout Locations
PIN NO. DESCRIPTION
1 Fan Speed Detect
2 +5V
3 GND
Table 3-7: Fan Connector Pinouts
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CZGG LU-10-X Series CyberResearch® CPU Cards
3.2.6 Floppy Disk Connector
CN Label: FDD1
CN Type: 34-pin header (2x17)
CN Location: See Figure 3-8
CN Pinouts: See Table 3-8
The floppy disk connector (FDD1) is connected to a floppy disk drive.
The front panel connector (CN1) connects to several external switches and indicators to
monitor and control the CPU card. These indicators and switches include:
Power button
Reset button
Speaker
Power LED
HDD LED
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Figure 3-9: Front Panel Connector Pinout Locations
One primary 40-pin primary IDE device connector on the CZGG LU-10-X CPU card
supports connectivity to Ultra ATA/133 IDE devices with data transfer rates up to
133MB/s.
Figure 3-11: Primary IDE Device Connector Locations
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 RESET# 2 GROUND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 N/C
21 IDE DRQ 22 GROUND
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23 IOW# 24 GROUND
25 IOR# 26 GROUND
27 IDE CHRDY 28 GROUND
29 IDE DACK 30 GROUND–DEFAULT
31 INTERRUPT 32 N/C
33 SA1 34 N/C
35 SA0 36 SA2
37 HDC CS0# 38 HDC CS1#
39 HDD ACTIVE# 40 GROUND
Table 3-11: Primary IDE Connector Pinouts
3.2.10 IDE Connector (Secondary)
CN Label: IDE2
CN Type: 44pin header (2x22)
CN Location: See Figure 3-12
CN Pinouts: See Table 3-12
One primary 44-pin secondary IDE device connector on the CZGG LU-10-X CPU card
supports connectivity to Ultra ATA/133 IDE devices with data transfer rates up to
133MB/s.
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3.2.14 LVDS Connector
CN Label: J3 (on the optional LCDC LVDS-LUKE-A daughterboard)
CN Type: 30-pin header (2x15)
CN Location: See Figure 3-15
CN Pinouts: See Table 3-15
WARNING:
Make sure the daughterboard is correctly positione d on the CZGG LU-10-X
CPU card connector pins. If the LCDC LVDS-LUKE-A is not correctly
positioned irreparable damage to the CPU card, daughterboard and display
may occur. Please refer to the installation instructions in Chapter 4.
The LVDS LCD connector (J3) on the LCDC LVDS-LUKE-A daughterboard connects to a
one or two channel (18-bit or 24-bit) LVDS panel.
Figure 3-16: LVDS Connector Pinout Locations (on LCDC
27 +LCD (3.3V,5V or 12V) 28 +LCD (3.3V,5V or 12V)
29 +LCD (3.3V,5V or 12V) 30 +LCD (3.3V,5V or 12V)
Table 3-16: LVDS Connector Pinouts
st
LVDS clock output + 10 1st LVDS clock output -
nd
LVDS clock output + 22 2nd LVDS clock output -
3.2.15 Parallel Port Connector
CN Label: LPT1
CN Type: 26-pin header (2x13)
CN Location: See Figure 3-17
CN Pinouts: See Table 3-17
The parallel port connector can be connected directly to parallel devices or to an external
parallel port connector that is attached to the rear of a system chassis.
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Figure 3-17: Parallel Port Connector Pinout Locations
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 STROBE# 2 DATA 0
3 DATA 1 4 DATA 2
5 DATA 3 6 DATA 4
7 DATA 5 8 DATA 6
9 DATA 7 10 ACKNOWLEDGE
11 BUSY 12 PAPER EMPTY
13 PRINTER SELECT 14 AUTO FORM FEED #
The Serial ATA (SATA) drive connectors are connected directly to 150MB/s SATA drives.
The CZGG LU-10-X supports two SATA drives transmitting at speeds of up to 150MB/s.
Figure 3-18: SATA Connector Pinout Locations
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PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 GND 5 RX2 TX+ 6 RX+
3 TX- 7 GND
4 GND
Table 3-18: SATA Connector Pinouts
3.2.17 Serial Port Connectors
CN Label: COM1 and COM2
CN Type: 2x5 pin header
CN Location: See Figure 3-19
CN Pinouts: See Table 3-19
The serial port connectors are used to connect to serial port devices. The two serial ports
described here are both RS-232 compliant serial ports.
Figure 3-19: Serial Port Connector Pinout Locations
The CZGG LU-10-X keyboard or mouse connector is a standard P S /2 connectors.
Figure 3-23: PS/2 Pinouts
PIN DESCRIPTION PIN DESCRIPTION
1 KB_DATA 7 MS_DATA
2 NC 8 NC
3 GND 9 GND
4 +5V 10 +5V
5 KB_CLOCK 11 MS_CLOCK
6 NC 12 NC
Table 3-25: PS/2 Connector Pinouts
3.3.2 VGA connector
CN Label: VGA1
CN T ype: 15-pin Female
CN Location: See Figure 3-22 (labeled number 5)
CN Pinouts: See Figure 3-24, Table 3-26 (VGA)
The CZGG LU-10-X has a single 15-pin female connector for connectivity to standard
display devices.
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Figure 3-24: VGA Connector
PIN DESCRIPTION PIN DESCRIPTION
1 RED 2 GREEN
3 BLUE 4 NC
5 GND 6 GND
7 GND 8 GND
9 VCC / NC 10 GND
11 NC 12 DDC DAT
13 HSYNC 14 VSYNC
15 DDCCLK
Table 3-26: VGA Connector Pinouts
3.3.3 LAN Connectors
CN Label: LAN1 and LAN2
CN T ype: RJ-45
CN Location: See Figure 3-22 (labeled number 2 and 3)
CN Pinouts: See Table 3-27 (RJ-45 )
The CZGG LU-10-X is equipped with two built-in 10/100Mbps Ethernet controllers. The
controllers connect to the LAN through two RJ-45 LAN connectors. There are two LED on
the connector indicating the status of LAN. The pin assignments are listed in the following
tables:
The RJ-45 Ethernet connector has two status LEDs, one green and one yello w. The green
LED indicates activity on the port and the yellow LED indicates the port is linked. See
Table 3-28.
STATUS
GREEN Activity YELLOW Linked
DESCRIPTION STATUS DESCRIPTION
Table 3-28: RJ-45 Ethernet Connector LEDs
3.3.4 USB Connector
CN Label: USB1
CN T ype: USB port
CN Location: See Figure 3-22 (LAN labeled number 4)
The CZGG LU-10-X has a single USB 2.0 port accessible on the rear panel. This port is
able to connect to both USB 2.0 and USB 1.1 devices. The pin assignments are listed in
the following tables:
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3.4 Onboard Jumpers
NOTE:
A jumper is a metal bridge that is used to
close an electrical circuit. It consists of
two metal pins and a small metal clip
(often protected by a plastic cover) that
slides over the pins to connect them.
To CLOSE/SHORT a jumper means
connecting the pins of the jumper with
the plastic clip and to OPEN a jumper
means removing the plastic clip from a
jumper.
The CZGG LU-10-X CPU card and daughter expansion board have nine onboard
jumpers, two on the CPU card and six on the expansion daughterboard. The jumpers are
described in Table 3-29.
Description Label Type Location
Clear CMOS J4 3-pin header CZGG LU-10-X
LCD voltage setup JP1 6-pin header CZGG LU-10-X
CF card setup JP2 3-pin header CZGG LU-10-X
LVDS Setting JP3 4-pin header LCDC
Figure: Jumper
LVDS-LUKE-A
Table 3-29: Jumpers
3.4.1 LVDS Panel Voltage Selection Jumper
WARNING:
Making the wrong setting on this jumper may cause irreparable damage to
both the CPU card and the LCD screen connected to the onboard
This jumper allows the user to set the voltage for the LCD panel. Before setting this jumper
please refer to the LCD panel user guide to determine the required voltage. After the
required voltage is determined, make the necessary jumper setting in accord ance with th e
settings shown in Table 3-30.
JP1 DESCRIPTION
Short 1-2 3V(Default)
Short 3-4 5V (Default)
Short 5-6 12V
Table 3-30: JP1 Jumper Settings
The pin locations are shown in Figure 3-26 below.
Figure 3-26: JP1 Pinout Locations
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3.4.2 Reset CMOS Jumper
Jumper Label: J4
Jumper Type: 3 pin header
Jumper Settings: See Table 3-31
Jumper Location: See Figure 3-27
If the CPU Card fails to boot due to improper BIOS setting, use this jumper to clear the
CMOS data and reset the system BIOS information. To do this, use the jumper cap to
close pins 2 and 3 for a few seconds then reinstall the jumper clip back to pins 1 and 2.
If the “CMOS Settings Wrong” message displays during the boot up process, the fault can
be corrected by pressing the F1 to enter the CMOS Setup menu. Then do one of the
following:
Enter the correct CMOS setting
Load Optimal Defaults
Load Failsafe Defaults.
After the above is completed, save the changes and exit the CMOS Setup menu.
The following installation notices and installation considerations should be
read and understood before the CPU card is installed. All installation
notices pertaining to the installation of the CPU card should be strictly
adhered to. Failing to adhere to these precautions may lead to severe
damage of the CPU card and injury to the person installing the CPU card.
4.1.1 Installation Notices
Before and during the installation of the CZGG LU-10-X CPU card, please do the
following:
Read the user manual
oThe user manual provides a complete description of the CZGG LU-10-X
CPU card, installation instructions and configuration options.
Wear an electrostatic discharge cuff (ESD)
oElectronic components are easily damaged by ESD. Wearing an ESD cuff
removes ESD from the user’s body and help to prevent ESD damage.
Place the CPU Card on an antistatic pad
oWhen the CPU Card is installed and configured, place it on an antistatic
pad. This helps to prevent potential ESD damage.
Turn off all power to the CZGG LU-10-X CPU card
oWhen working with the CPU card, make sure that it is disconnected from
all power supplies and that no electricity is being fed into the system.
Before and during the installation of the CZGG LU-10-X CPU card, DO NOT:
remove any of the stickers on the PCB board. These stickers are required for
warranty validation.
use the product before all the cables and power connectors are properly
connected.
allow screws to come in contact with the PCB circuit, connector pins, or its
components.
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4.2 Unpacking
NOTE:
If any of the items listed below are missing when the CZGG LU-10-X is
unpacked, do not proceed with the installation and contact CyberResearch,
Inc. immediately.
4.2.1 Unpacking Precautions
Some components on CZGG LU-10-X are very sensitive to static electricity and can be
damaged by a sudden rush of power. To protect it from being damaged during the
unpacking process, follow these precautions:
The user should be grounded to remove any static charge before touching the
CZGG LU-10-X . Users can wear a grounded wrist strap at all times or
frequently touch any conducting material that is connected to the ground to
discharge static electricity.
Handle the CZGG LU-10-X by its edges. Do not touch the IC chips, leads or
circuitry unnecessarily.
Do not place a PCB on top of an anti-static bag. Only the inside of the bag is safe from
static discharge.
4.2.2 Checklist
When CZGG LU-10-X is unpacked, please make sure the package contains the following
items.
1 x CZGG LU-10-X CPU card
1 x Mini jumper pack
1 x IDE flat cable 40p/40p/40p
2 x SATA cables
1 x SATA power cable
1 x RS-232 cable
1x USB cable
1 x Audio cable
1 x KB/PS2 Mouse Y cable
1 x Utility CD
If one or more of these items are missing, please contact CyberResearch, Inc. and do not
proceed further with the installation.
4.3 CZGG LU-10-X CPU Card Installation
WARNING!
Never run the CZGG LU-10-X without an appropriate heatsink and cooler
that can be ordered from CyberResearch or purchased separately.
WARNING!
Please note that the installation instructions described in this manual should
be carefully followed in order to avoid damage to the CZGG LU-10-X
components and injury to the user.
WARNING!
When installing electronic components onto the CZGG LU-10-X always take
the following anti-static precautions in order to prevent ESD damage to the
CZGG LU-10-X and other electronic components like the CPU and DIMM
modules
4.3.1 Preinstalled Components
The components listed below are preinstalled on the CZGG LU-10-X.
CPU
CPU heat sink
4.3.2 Components to Install
The following may already be completed by CyberResearch, Inc depending upon your
order and/or system setup. Prior to installing the CZGG LU-10-X, the following
components must be installed or connected first:
DIMM modules
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Optional LCDC LVDS-LUKE-A daughterboard
Peripheral devices
4.3.3 DIMM Module Installation
4.3.3.1 Purchasing the Memory Module
When purchasing DIMM modules, the following considerations should be taken into
account: to 1GB of 333MHz or 400MHz of DDR memory
The DIMM module can support a memory chip with a maximum size of 1GB
The DIMM module can have a of 333MHz or 400MHz
The DIMM can be either single-sided or dual-sided.
4.3.3.2 DIMM Module Installation
The CZGG LU-10-X CPU Card has two DDR SDRAM DIMM sockets. To install the DIMM
modules, follow the instructions below and refer to Figure 4-1.
Step 1: Pull the two white handles on either side of the DIMM socket down.
Step 2: Align the DIMM module with the DIMM socket making sure the matching pins
are correctly aligned.
Step 3: Insert the DIMM module slowly. Once it is correctly inserted, push down firmly.
The white handles on either side of the socket move back up and lock the
module into the socket.Step 0:
Installing the LCDC LVDS-LUKE-A daughterboard incorrectly may cause
irreparable damage to the TTL display and the CZGG LU-10-X
The LCDC LVDS-LUKE-A daughterboard supports 18-bit and 24-bit TTL devices. The
LCDC LVDS-LUKE-A daughterboard is installed on the J1 and J3 connectors. If 18-bit
TTL connectivity is required, Pin 27 and Pin 28 on J1 and J3 must be left uncovered. If
24-bit TTL connectivity is required, Pin 1 and Pin 2 on J1 and J3 must be left uncovered.
For further details see 4.3.4.1.
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4.3.4.1 18-bit TTL Connectivity
To correctly install the LCDC LVDS-LUKE-A daughterboard to support an 18-bit TTL
display, please follow the instructions below.
Step 1: Correctly orientate the LCDC LVDS-LUKE-A daughterboard. The VIA chipset on
the LCDC LVDS-LUKE-A daughterboard should be on the side of the LCDC
LVDS-LUKE-A facing the gold finger backplane connectors. The VIA chipset on
the LCDC LVDS-LUKE-A should be on the side closest to the CPU.
Step 2: Align the connectors on the bottom of the LCDC LVDS-LUKE-A with pins 1 –
pins 26 on the J1 and J3 connectors.
Step 3: Slide the LCDC LVDS-LUKE-A onto the connectors. Pin 27 and pin 28 on both
the J1 and J3 connector should be visible. See Figure 4-2.
To correctly install the LCDC LVDS-LUKE-A daughterboard to support a 24-bit TTL
display, please follow the instructions below.
Step 4: Correctly orientate the LCDC LVDS-LUKE-A daughterboard. The VIA chipset on
the LCDC LVDS-LUKE-A daughterboard should on the side of the LCDC
LVDS-LUKE-A facting the gold finger backplane connectors. The VIA chipset on
the LCDC LVDS-LUKE-A should be on the side closest to the CPU.
Step 5: Align the connectors on the bottom of the LCDC LVDS-LUKE-A with pins 3 –
pins 28 on the J1 and J3 connectors.
Step 6: Slide the LCDC LVDS-LUKE-A onto the connectors. Pin 1 and pin 2 on both the
J1 and J3 connector should be visible. See Figure 4-3.
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4.3.5 Peripheral Device Connection
Cables provided by CyberResearch that connect peripheral devices to the board are listed
in Table 4-1. Cables not included in the kit must be separately purchased.
Quantity Type
1 mini jumper pack
1 ATA33 HDD cable
1 Power cable
1 RS-232 cable
Table 4-1: Cables Provided by CyberResearch
4.3.5.1 IDE Disk Drive Connector (IDE1)
The cable used to connect the CZGG LU-10-X to the IDE HDD is a standard 44-pin
ATA33 flat cable. To connect an IDE device to the CZGG LU-10-X follow the instructions
below.
Step 7: Find the ATA33 flat cable in the kit that came with the CZGG LU-10-X.
Step 8: Connect one end of the cable to the IDE1 connector on the CZGG LU-10-X. A
keyed pin on the IDE connectors prevents it from being connected incorrectly.
Step 9: Locate the red wire on the other side of the cable that corresponds to the pin 1
connector.
Step 10: Connect the other side of the cable to the IDE device making sure that the pin 1
cable corresponds to pin 1 on the connector.Step 0:
NOTE:
When two EIDE disk drives are connected together, back-end jumpers on
the drives must be used to configure one drive as a master and the other as
The compact flash connector is located on the bottom of the daughter expansion board. If
a user wishes to implement the CF connector for CD drive connectivity, please follow
these instructions.
Step 1: Connect one end of a ribbon cable to the IDE2 connector on the CZGG LU-10-X
CPU Card.
Step 2: Connect the other end of the same ribbon cable in Step 1 to the IDE1 connector
on the expansion daughterboard.Step 0:
4.4 Chassis Installation
After the DIMM modules have been installed and after the internal peripheral connectors
have been connected to the peripheral devices and the jumpers have been configured,
the CZGG LU-10-X can be mounted into chassis.
To mount a board into a chassis, please refer to the chassis user guide that came with the
product.
4.5 Rear Panel Connectors
4.5.1 LCD Panel Connection
The conventional CRT monitor connector, VGA1, is a 15-pin, female D-SUB connector.
It can be connected to an external monitor.
4.5.2 Ethernet Connection
The rear panel RJ-45 connectors can be connected to an external LAN and communicate
with data transfer rates up to 100M/s.
4.5.3 USB Connection
The rear panel USB connectors provide easier and quicker access to external USB
devices. The rear panel USB connector is a standard connector and can easily be
connected to other USB devices.
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5.1 Introduction
A licensed copy of AMI BIOS is preprogrammed into the ROM BIOS. The BIOS setup
program allows users to modify the basic system configuration. This chapter describes
how to access the BIOS setup program and the configuration options are user
configurable.
5.1.1 Starting Setup
The AMI BIOS is activated when the computer is turned on. The setup program can be
activated in one of two ways.
1. Press the D
2. Press the D
ELETE key as soon as the system is turned on or
ELETE key when the “Press Del to enter SETUP” message
appears on the screen.0.
If the message disappears before the user responds, restart the computer and try again.
5.1.2 Using Setup
Use the arrow keys to highlight items, press ENTER to select, use the PageUp and
PageDown keys to change entries, press F1 for help and press E
keys are shown in.
Key Function
Up arrow Move to previous item
Down arrow Move to next item
Left arrow Move to the item on the left hand side
Right arrow Move to the item on the right hand si de
Esc key Main Menu – Quit and not save changes into CMOS
Status Page Setup Menu and Option Page Setup Menu --
SC to quit. Navigation
Exit current page and return to Main Menu
Page Up key Increase the numeric value or make changes
Page Dn key Decrease the numeric value or make changes
F1 key General help, only for St atus Page Setup Menu and Option
Page Setup Menu
F2 /F3 key Change color from total 16 colors. F2 to select color
forward.
F10 key Save all the CMOS changes, only for Main Menu
When F1 is pressed a small help window describing the appropriate keys to use and the
possible selections for the highlighted item appears. To exit the Help Window press E
the F1 key again.
5.1.4 Unable to Reboot After Configuration Changes
If the computer is unable to boot after changes are made to the system configuration,
restore the CMOS defaults. Use the jumper described in Chapter Chapter 3, Section
3.4.1.
5.1.5 BIOS Menu Bar
The menu bar on top of the BIOS screen has the following main items:
Main Changes the basic system configuration.
Advanced Changes the advanced system settings.
PCIPnP Changes the advanced PCI/PnP Settings
Boot Changes the system boot configuration.
Security Sets User and Supervisor Passwords.
Chipset Changes the chipset settings.
SC or
Power Changes power management settings.
Exit Selects exit options and loads default settings
The following sections completely describe the configuration options found in the menu
items at the top of the BIOS screen and listed above.
5.2
5.3 Main
When entering the BIOS Setup program, the Main menu (BIOS Menu 1) appears. The
Main menu gives overview of the basic system information.
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BIOS Menu 1: Main
System Overview
The System Overview lists a brief summary of different system components. The fields in
System Overview cannot be changed. The items shown in the system overview include:
AMI BIOS: Displays auto-detected BIOS information
Processor: Displays auto-detected CPU specifications
System Memory: Displays the auto-detected system memory.
o Version: Current BIOS version
o Build Date: Date the current BIOS version was made
o ID: Installed BIOS ID
o Type: Names the currently installed processor
o Speed: Lists the processor speed
o Count: The number of CPUs on the CZGG LU-10-X
The System Overview field also has two user configurable fields:
System Time [xx:xx:xx]: Allows system time to be set.
System Date [Day xx/xx/xxxx]: Allows the system date to be set.
5.4 Advanced
The Advanced menu (BIOS Menu 2) allows CPU and peripheral device configuration
options to be accessed through the following sub-menus:
WARNING:
Setting the wrong values in the sections below may cause the system to
malfunction. Make sure that the settings are compatible with the system
hardware.
CPU Configuration (see Section 5.4.1)
IDE Configuration (see Section 5.4.2)
Floppy Configuration (see Section 5.4.2)
Super IO Configuration (see Section 5.4.3)
Hardware Health Configuration (see Section 5.4.5)
ACPI Configuration (see Section 5.4.6)
APM Configuration (see Section 5.4.6.1)
USB Configuration (see Section 5.4.8)
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BIOS Menu 2: Advanced
NOTE:
The floppy configuration function shown in the menu above is not available
on the CZGG LU-10-X.
5.4.1 CPU Configuration
The CPU Configuration menu (BIOS Menu 3) shows detailed CPU specifications.
The CPU Configuration menu (BIOS Menu 3) lists the following CPU details:
Manufacturer: Lists the name of the CPU manufacturer
Brand String: Lists the brand name of the CPU being used
Frequency: Lists the CPU processing speed
FSB Speed: Lists the FSB speed
Cache L1: Lists the CPU L1 cache size
Cache L2: Lists the CPU L2 cache size (which in this case is zero)
The CPU Configuration menu (BIOS Menu 3) has two configurable parameters:
5.4.2 IDE Configuration
The IDE Configuration menu (BIOS Menu 4) IDE devices installed in the system to be
user configured.
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BIOS Menu 4: IDEConfiguration
OnBoard PCI IDE Controller [Both]
The OnBoard PCI IDE Controller BIOS option specifies the IDE channels used by the
onboard PCI IDE controller. The following configuration options are available.
Disabled
Primary
Secondary
Both
Prevents the system from using the onboard IDE
Only allows the system to detect the Primary IDE
Only allows the system to detect the Secondary IDE
(Default) Allows the system to detect both the Primary and
controller
channel, including both the Primary Master and Primary
Slave)
channel, including both the Secondary Master and
Secondary Slave)
Secondary IDE channels including the Primary Master,
Primary Slave, Secondary Master and Secondary
Slave.
IDE Master and IDE Slave
When entering setup, BIOS auto detects the presence of IDE devices. This displays the
status of the auto detected IDE devices. The following IDE devices are detected and are
shown in the IDE Configuration menu:
Primary IDE Master
Primary IDE Slave
Secondary IDE Master
Secondary IDE Slave
Third IDE Master
Third IDE Slave
The IDE Configuration menu (BIOS Menu 4) changes the configurations for the IDE
devices installed in the system. If an IDE device is detected, and one of the above listed
four BIOS configuration options are selected, the IDE configuration options shown in
Section 5.4.2.1 appear.
Hard Disk Write Protect [Disabled]
The Hard Disk Write Protect BIOS option protects hard disks from being overwritten.
This menu item is only effective if the device is accessed through the BIOS.
Disabled (Default) Allows hard disks to be overwritten
EnabledPrevents hard disks from being overwritten
IDE Detect Time Out (Sec) [35]
The IDE Detect Time Out (Sec) BIOS op tion specifies the maximum time (in seconds) the
AMI BIOS searches for IDE devices. This allows the settings to be fine-tuned and allows
faster boot times. The following configuration options are available.
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25 seconds
30 seconds
35 seconds
The best setting to use if the onboard IDE controllers are set to a specific IDE disk drive in
the AMIBIOS is “0 seconds” and a large majority of ultra ATA hard disk drives can be
detected well within “5 seconds.”
ATA (PI) 80Pin Cable Detection [Host]
When an Ultra ATA/66, an Ultra ATA/100 or an Ultra ATA/133 IDE hard disk drive is used,
an 80-conductor ATA cable must be used. The 80-conductor ATA cable is plug compatible
with the standard 40-conductor ATA cable. The system must detect the presence of
correct cable so that the AMI BIOS can instruct the drive to run at the correct speed for the
cable type detected.
The ATA (PI) 80Pin Cable Detection BIOS option determines how the IDE cable is
detected.
Host & Device
Host
Device
(Default) Both the CPU Card onboard IDE controller and IDE
disk drive are used to detect the type of IDE cable
used.
The CPU Card onboard IDE controller detects the
type of IDE cable used.
The IDE disk drive detects the IDE cable type.
5.4.2.1 IDE Master, IDE Slave
IDE Master and IDE Slave configuration options for both primary and secondary IDE
devices are shown in the BIOS menu below.
BIOS Menu 5: IDE Master and IDE Slave Configuration
Auto-Detected Drive Parameters
The “grayed-out” items in the left frame are IDE disk drive parameters automatically
detected from the firmware of the selected IDE disk drive. The drive parameters are listed
as follows:
Device: Lists the device type (e.g. hard disk, CD-ROM etc.)
Vendor: Lists the device manufacturer
Size: The size of the device.
LBA Mode: Indicates whether the LBA (Logical Block Addressing) is a
method of addressing data on a disk drive is supported or not.
Block Mode: Block mode boosts IDE drive performance by increasing the
amount of data transferred. Only 512 bytes of data can be transferred per
interrupt if block mode is not used. Block mode allows transfers of up to 64 KB
per interrupt.
PIO Mode: Indicates the PIO mode of the installed device.
Async DMA: Indicates the highest Asynchronous DMA Mode that is
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supported.
Ultra DMA: Indicates the highest Synchronous DMA Mode that is supported.
S.M.A.R.T.: Indicates whether or not the Self-Monitoring Analysis and
Reporting Technology protocol is supported.
Type [Auto]
The Type BIOS option determines the type of device that the AMIBIOS attempts to boot
from after the Power-On Self-Test (POST) has completed.
Not Installed
Auto
CD/DVD
ARMD
Selecting this value prevents the BIOS from searching
for an IDE disk drive on the specified channel.
(Default) This selection enables the BIOS to auto detect the
IDE disk drive type attached to the specified channel.
This setting should be used if an IDE hard disk drive is
attached to the specified channel.
The CD/DVD option specifies that an IDE CD-ROM
drive is attached to the specified IDE channel. The
BIOS does not attempt to search for other types of
IDE disk drives on the specified channel.
This option specifies an ATAPI Removable Media
Device. These include, but are not limited to:
ZIP
LS-120
LBA/Large Mode [Auto]
The LBA/Large Mode BIOS option disables or auto detects LBA (Logical Block
Addressing). LBA is a method of addressing data on a disk drive. In LBA mode, the
maximum drive capacity is 137 GB.
This selection prevents the BIOS from using the LBA
mode control on the specified channel.
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Auto
Block (Multi Sector Transfer) [Auto]
Disabled
Auto
(Default) This option allows the BIOS to auto detect the LBA mode
control on the specified channel.
Selecting this option prevents the BIOS from using
Multi-Sector Transfer on the specified channel. The data
to and from the device occurs one sector at a time.
(Default) Selecting this value to allows the BIOS to auto detect the
device support for Multi-Sector Transfers on the specified
channel. If supported. Select this value to allow the BIOS
to auto detect the number of sectors per block for transfer
from the hard disk drive to the memory. The data transfer
to and from the device occurs multiple sectors at a time.
PIO Mode [Auto]
The PIO Mode option selects the IDE PIO (Programmable I/O) mode program timing
cycles between the IDE drive and the programmable IDE controller. As the PIO mode
increases, the cycle time decrease s.
Auto
0
1
2
3
4
(Default) This setting allows the BIOS to auto detect the PIO mode. Use
this value if the IDE disk drive support cannot be determined.
PIO mode 0 selected with a maximum transfer rate of 3.3MBps
PIO mode 1 selected with a maximum transfer rate of 5.2MBps
PIO mode 2 selected with a maximum transfer rate of 8.3MBps
PIO mode 3 selected with a maximum transfer rate of 11.1MBps
PIO mode 4 selected with a maximum transfer rate of 16.6MBps
(This setting generally works with all hard disk drives
manufactured after 1999. For other disk drives, such as IDE
CD-ROM drives, check the specifications of the drive.)
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DMA Mode [Auto]
The DMA Mode BIOS selection allows adjusts the DMA mode options.
Auto
S.M.A.R.T [Auto]
Self-Monitoring Analysis and Reporting Technology (SMART) feature can help predict
impending drive failures. The S.M.A.R.T BIOS option enables or disables this function.
Auto
Disabled
Enabled
(Default) The BIOS auto detects the DMA mode. Use this value if the
IDE disk drive support cannot be determined.
(Default) BIOS to auto detects if the hard disk drive supports
S.M.A.R.T. Use this setting if the IDE disk drive support
cannot be determined.
Select this value to prevent the BIOS from using the
SMART feature.
Select this value to allow the BIOS to use the SMART
feature on support hard disk drives.
32Bit Data Transfer [Enabled]
The 32Bit Data Transfer BIOS option enables or disables 32-bit data transfers.
Disabled
Enabled
Prevents the BIOS from using 32-bit data transfers.
(Default) Allows BIOS to use 32-bit data transfers on support hard
disk drives.
5.4.3 Floppy Configuration
The Floppy Configuration menu (BIOS Menu 6) determines the type of floppy drive
installed in the system. The Floppy Configuration menu has two configurable items:
Floppy A and Floppy B. Both Floppy A and Floppy B have the same configuration options
listed below.