CSS Labs SB-5861 User Manual

Technical Reference

SB-5861

Pentium

®

& Pentium® MMX

Single Board Computer with

Triton I Chipset

1641 McGaw Avenue

Irvine, California 92614

P/N SB-SBC-5861-DOC Revision 2, November 1997

Features

 Intel Pentium

and 200 MHz; and Pentium

®

processor, upgradeable through 180 MHz

®

MMX 200 MHz and 233

MHz

 Intel Triton I chipset

 System memory upgradeable to 128 MB using x 32

SIMM

 ISA/PCI bus architecture allowing the SB-5861 to be

configured in any CSS passive backplane

 PCI 2.1 compliant

 Available with either 256 KB or 512 KB

Level 2 pipelined cache on the board

 On-board EIDE controller separate master/slave EIDE

mode support for up to 4 IDE drives and up to 2 floppy

drives

 On-board I/O supporting 2 serial ports and 1 parallel port

SB-5861

iii

FCC Standards

The FCC (Federal Communications Commission) restricts

the amount of radiation and radio frequency emissions

coming from computing equipment.

Note: This equipment has been tested and found to comply

with the limits for a Class B digital device

pursuant to Part 15 of the FCC Rules. These limits

are designed to provide reasonable protection against harmful

interference in a residential installation. This equipment

generates, uses, and can radiate radio frequency energy and,

if not installed and used in accordance with the instructions,

may cause harmful interference to radio communications.

However, there is no guarantee that interference will not

occur in a particular installation. If this equipment does cause

harmful interference to radioor television reception, which

can be determined by turning the equipment off and on, the

use is encouraged to try to correct the interference by one

or more of the following measures:

 Reorient or relocate the receiving antenna.

 Increase the separation between the equipment and

receiver.

 Connect the equipment into an outlet on a circuit

different from that to which the receiver is connected.

 Consult the dealer or an experienced radio/TV technician

for help.

CSS Labs is not responsible for any radio or television

interference caused by unauthorized modifications to this

equipment. Operation with non-certified peripherals is likely

to result in interference to radio and TV reception.

iv SB-5861

To ensure compliance to FCC non-interference regulations,

peripherals attached to this device require shielded I/O cables.

NOTICE: The use of a non-shielded I/O cable with this

device is in violation of U.S. Federal law and will not allow

the device to meet the maximum emission limits.

CAUTION: Any changes or modifications not expressly

approved by the grantee of this device could void the users

authority to operate the equipment.

Note: If you have purchased the miniature tower system,

please note the following...

WARNING: The system is to be installed on desk or table

tops only. The unit will become unstable if operated as a floor

standing unit and unintentional force is applied to the top of

the unit.

Turn the unit off and unplug the power cord before you

open the cover to install any cards or peripheral devices.

SB-5861

v

WARNING

CAUTION: THERE IS A DANGER OF EXPLOSION IF

THE BATTERY IS INCORRECTLY REPLACED.

REPLACE ONLY WITH THE SAME OR EQUIVALENT

TYPE RECOMMENDED BY THE MANUFACTURER.

DISCARD USED BATTERIES ACCORDING TO THE

MANUFACTURERS INSTRUCTIONS.

ATTENTION:IL Y A DANGER DEXPLOSION SIL Y A

REMPLACEMENT INCORRECT DE LA BATTERRIE.

REMPLACER UNIQUEMENT AVEC UNE BATTERI DU

MEME TYPE OU DUN TYPE RECOMMENDE PAR LE

CONSTRUCTEUR. ETTERAU REBUT LES

BATTERRIES USAGEES CONFORMEMANT AUX

INSTRUCTIONS DU FABRICATANT.

vi SB-5861

NOTICE

The information within this manual is subject to change

without notice.

CSS Laboratories, Incorporated shall not be held liable for

technical or editorial errors or omissions contained in herein;

nor for incidental or consequential damages resulting from the

furnishing, performance or use of this material.

No part of this publication may be reproduced, stored in a

retrieval system, or transmitted, in any form or by any means,

mechanical, photocopying, recording or otherwise, without

the prior written permission of CSS Laboratories, Inc.

Product names mentioned herein are for identification

purposes only, and may be trademarks and/or registered

trademarks of their respective companies.

© 1997 CSS Laboratories, Inc. All rights reserved.

P/N SB-SBC-5861-DOC Revision 2 November, 1997

SB-5861

vii

Table of Contents

Overview ............................................................................... 1

The Microprocessor .............................................................. 2

The Board ............................................................................. 3

Cache Memory ............................................................... 4

3.3 Volt, 5 Volt and 2.8 Volt Power Regulators .............. 4

Connectors ............................................................................ 5

Keyboard Connector ....................................................... 5

Primary EIDE J70 ......................................................... 5

Secondary EIDE 71 ....................................................... 5

Parallel Port J98 ............................................................ 6

Serial Port 1 J96 ............................................................ 6

Serial Port 2 J97 ............................................................ 6

Floppy Drive Connector J4 ........................................... 6

CMOS Battery Connector J123 .................................... 6

Jumpers ................................................................................. 7

Flash/EPROM BIOS Selector JP17, JP18, JP19 .......... 7

Watch Dog Enable/Disable J133, J135, J134, J132 ...... 7

Processor Speed Selector JP1, JP2, JP15, JP28 ............ 8

Watch Dog Reset Output J124 ...................................... 9

Watch Dog IRQ15 Output J125 .................................... 9

ISA Bus Speed JP130 ................................................. 10

Engineering Test Jumpers............................................. 10

System Memory ................................................................... 11

System Memory Configuration .....................................11

Installing and Removing SIMM ................................... 12

System Memory Map.......................................................... 13

Timers ................................................................................. 13

viii SB-5861

The I/O Address Map ......................................................... 15

System Interrupts ................................................................ 15

Direct Memory Access ........................................................ 16

Configuration Utilities ........................................................ 17

Overview ...................................................................... 17

Standard Setup ............................................................. 18

Advanced Setup ............................................................ 20

Advanced Chipset Setup ............................................... 21

Power Management Setup ............................................ 22

PCI/PnP Setup .............................................................. 23

Peripheral Setup ........................................................... 24

SB-5861

ix

Overview

This document describes the technical features of the

single board computer (SBC). The topics include:

 Microprocessor - description of the features of the

Pentium MMX microprocessor

 Board - illustration and brief description of the

motherboard and the dual purpose expansion slot

 Connectors - description of connector locations and

functions on the motherboard

 Jumpers - detailed description of the jumpers used to

configure the motherboard

 System Memory - detailed description of system

memory and how to add memory

 System Memory Map - listing of traditional address

assignments for system memory

 Configuration Utilities - description and instructions for

using the utility to configure the boards BIOS

SB-5861

1

The Microprocessor

The Pentium MMX microprocessor contains all the features

of the 80486 processors, and is 100% compatible with 8086/

88, 80286, and 80386 DX and SX microprocessors. In

addition, the Pentium processor features:

 64-bit Data Bus

 Superscalar Architecture

 Capability for executing two instructions in parallel

 Pipelined Floating-Point Unit

 Separate 8 KB Code and 8 KB Data Caches (total 16 KB

L1 cache)

 Bus Cycle Pipelining

 Writeback MESI Protocol in the Data Cache Internal

Parity Checking

 IEEE 1149.1 Boundary Scan

The Pentium processor is available in a variety of speeds,

from 75 MHz through 200 MHz.

TM

The Pentium processor with MMX

compatible with all software written for the Pentium

processor. It enhances your systems performance with

multimedia communications applications.

technology is fully

The Pentium processor with MMX technology is available in

200 MHz and 233 MHz speeds.

For additional information, contact your authorized CSS

Laboratories representative.

2 SB-5861

The Board

JP13

JP10

JP11

JP12

JP15

JP28

JP27

1

1

J125

PARALLEL

J98

1

1

JP19

JP17

1

J124

1

1

1

1

JP18

J97

1

1

1

SER 2

1

FLOPPY

J4

1

KEYBOARD

JP20

1

J123

J96

1

1

JP21

SERIAL 1

JP22

1

J130

1

1

IDE-SEC

J71

Voltage

Regulator

JP16

1

J131

IDE-PRI

J70

JP2

JP1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

SB-5861

Bank 0

Bank 1

Cache Module

SIMM

Figure 1: The Board

Processor

1

J87

J78

J61

J69

Voltage Regulator Module

3

Cache Memory

The SBC can be configured with 256 or 512 KB of L2 cache.

3.3 Volt, 5 Volt and 2.8 Volt Power Regulators

The board comes with a 3.3 or 5 volt regulator, or a 2.8 volt

regulator module, making the board compatible with the full

line of processors. A voltage regulator installed on the board

ensures that the correct voltage is delivered to the particular

processor installed.

When upgrading processors, make sure to have the

appropriate voltage regulator or voltage regulator module

installed.

4 SB-5861

Connectors

Connector Description

J123 CMOS battery

J70 Primary EIDE

J71 Secondary EIDE

J98 Parallel port connector

J4 Floppy drive connector

J96 Serial port 1connector

J97 Serial port 2 connector

KEYBOARD Keyboard connector

Keyboard Connector

Keyboard plugs are keyed for proper installation.

Pin Assignment Pin Assignment

1 Clock 4 Ground

2 Data 5 +5 Vdc

3 Not used

Primary EIDE J70

J70 connects the primary on-board PCI EIDE hard drive. Pin

1 is marked. When connecting your EIDE, orient pin 1 of the

cable ribbon with pin 1 of J70.

Secondary EIDE 71

J71 connects the secondary on-board PCI EIDE controller.

Pin 1 is marked. When connecting your EIDE, orient pin 1

of the cable ribbon with pin 1 of J71.

SB-5861

5

Parallel Port J98

J98 provides the connection for the boards parallel port.

Serial Port 1 J96

J96 provides the connection for the boards serial port 1

(COM 1).

Serial Port 2 J97

J97 provides the connection for the boards serial port 2

(COM 2).

Floppy Drive Connector J4

J4 connects the floppy drive to the controller provided on

the board.

CMOS Battery Connector J123

J123 connects the boards CMOS battery. The CMOS battery

provides constant power to the CMOS even when the

systems power is switched off. CMOS contains your

systems BIOS information and program.

6 SB-5861

Jumpers

The motherboards jumpers are pre-configured at the factory.

Read the following section carefully, before configuring your

system. The motherboard has the following jumpers:

Jumper Description

JP1, JP2 Processor speed selector

JP15, JP28

JP17, JP18, Flash/EPROM BIOS selector

JP19

J133, J135 Watch dog enable

J134, J132

J130 ISA bus speed selector

Flash/EPROM BIOS Selector JP17, JP18, JP19

Flash EPROM JP17 JP18 JP19

EPROM 1-2 1-2 2-3

Flash 1-2 1-2 1-2

Watch Dog Enable/Disable J133, J135, J134, J132

The board provides a feature for some users that

automatically resets (performs a warm boot) the system when

it has locked up.

SB-5861

7

Watch Dog J133 J135 J134 J132

Enable IN IN OUT OUT

Disable OUT OUT IN IN

This special feature is typically used only in

industrial environments. The default setting is

disabled.

Processor Speed Selector JP1, JP2, JP15, JP28

The board is ugradeable through the full line of

Pentium and Pentium with MMX processors. When

upgrading, make sure that the appropriate voltage

regulator is installed.

Pentium JP1 JP2 JP15 JP28 JP27

Speed

75 MHz 2-3 2-3 OUT OUT OUT

90 MHz 1-2 2-3 OUT OUT OUT

100 MHz 2-3 1-2 OUT OUT OUT

120 MHz 1-2 2-3 2-3 OUT OUT

133 MHz 2-3 1-2 2-3 OUT OUT

150 MHz 1-2 2-3 2-3 2-3 OUT

166 MHz 2-3 1-2 2-3 2-3 OUT

MMX

Speed

200 MHz 2-3 1-2 1-2 2-3 OUT

233 MHz 2-3 1-2 1-2 1-2 OUT

8 SB-5861

Watch Dog Reset Output J124

J124 enables or disables the signal output that causes the

system to reboot.

Disable this function when you are trouble shooting a

problem which has caused your system to lock up. Also

disable this function when you are not using the watch dog.

Watch Dog Reset Output J124

Enable IN

Disable (default) OUT

Watch Dog IRQ15 Output J125

J125 enables or disables the watch dog IRQ output signal.

Disable this function when you are trouble shooting a

problem which has caused your system to lock. Also disable

this function when you are not using the watch dog.

IRQ 15 Output J124

Enable IN

Disable (default) OUT

SB-5861

9

ISA Bus Speed JP130

The normal ISA bus speed is 8 MHz. This is provided by the

PCI bus clock. The PCI bus clock speed is 33 MHz. In order

for the PCI bus clock to provide the 8 MHz frequency, its 33

MHz frequency is divided by three.

Occasionally, you may need to reduce the bus speed to 6

MHz. J130 allows you to provide either an 8 MHz or 6 MHz

speed to the ISA bus.

ISA Bus Speed Clock Divide J130

Divide by 3, 11 MHz 1-2

Divide by 4, 8.125 MHz (def) 2-3

Engineering Test Jumpers

J16, JP20, JP21, JP22, J117, J116, JP10, JP11, JP12 and

JP13 are engineering test jumpers. Do not alter these pins.

10 SB-5861

System Memory

There are a total of two SIMM banks available for memory

upgrades on the board. Two SIMMs of the same kind form

one bank

1M x 32 + 1M x 32 = 8 MB/bank

2M x 32 + 2M x 32 = 16 MB/bank

4M x 32 + 4M x 32 = 32 MB/bank

8M x 32 +8M x 32 = 64 MB/bank

System Memory Configuration

RAM Bank 0 Bank 1

8 MB 1M x 32 (2)

16 MB 1M x 32 (2) 1M x 32 (2)

16 MB 2M x 32 (2)

24 MB 2M x 32 (2) 1M x 32 (2)

32 MB 4M x 32 (2)

32 MB 2M x 32 (2) 2M x 32 (2)

40 MB 4M x 32 (2) 1M x 32 (2)

48 MB 4M x 32 (2) 2M x 32 (2)

64 MB 8M x 32 (2)

64 MB 4M x 32 (2) 4M x 32 (2)

80 MB 8M x 32 (2) 2M x 32 (2)

96 MB 8M x 32 (2) 4M x 32 (2)

128 MB 8M x 32 (2) 8M x 32 (2)

SB-5861

11

Installing and Removing SIMM

Read these instructions completely before installing or

removing SIMMs. The SIMM is held by plastic press-clips

on both sides of the slot.

Installing SIMM

1) Hold the SIMM so that the gold tab is pointing toward the

slot. The SIMM is keyed so that it will only snap into the

slot when positioned correctly.

2) Press the SIMM into the slot.

3) Rotate the SIMM until it clicks into place.

Removing SIMM

1) While squeezing the press clips, rotate the SIMM.

2) Pull the SIMM from the slot.

12 SB-5861

System Memory Map

Address (hex) Name Function

000000 to

9FFFFF

0A0000 to

0BFFFF

0C0000 to

0DFFFF

0E0000 to

0EFFFF

0F0000 to

0FFFFF

100000 to

FDFFFF

FE0000 to

FEFFFF

FF0000 to

FFFFFF

640 KB motherboard system memory

128 KB video display

ROM

128 KB I/O

expansion ROM

64 KB reserved on

motherboard

64 KB ROM on

motherboard

maximum memory is

15 MB

64 KB reserved on

motherboard

64 KB reserved on

motherboard

reserved for graphics

reserved for ROM on

I/O

duplicate code

assignment at FE0000

duplicate code

assignment at FF0000

I/O channel memory

duplicate code

assignment at 0E0000

duplicate code

assignment at 0F0000

Timers

The systems three programmable timers/counters controlled

by timer/counter chips are defined as channels 0

through 2 as indicated below:

Channel 0: System Timer

Channel 1: Refresh Request Generator

Channel 2: Tone Generation for Speaker

SB-5861

13

The I/O Address Map

Address (hex) Function

000-01F DMA #1

020-03F INTR #1

040-05F Timer

060-06F Keyboard

070-07F NMI mask register

080-09F DMA page register

0A0-OBF INTR #2

0C0-ODF DMA #2

0F0-0F1 Clr/rst math coprocessor

0F8-0FF Math coprocessor

1F0-1F8 Fixed disk

200-207 Joystick

278-27F Secondary parallel port

2F8-2FF Secondary serial port

300-31F Prototype card

378-37F Primary parallel port

380-38F SDLC (secondary bisynchronous)

3A0-3AF Primary bisynchronous

3B0-3BF Monochrome display/printer adapter

3D0-3DF Color/graphics monitor adapter

3F0-3F7 Diskette controller

3F8-3FF Primary serial port

14 SB-5861

System Interrupts

The processor has two controllers, supplying 16 IRQs.

Below are assignments in decreasing priority.

LEVEL FUNCTION

Microprocessor NMI Parity or I/O Channel Check

Interrupt Controllers

Ctlr 1 Ctlr 2

IRQ0

IRQ1

IRQ2

*Interrupts IRQ8 - IRQ15 redirected to IRQ2*

IRQ8 Real-Time clock interrupt

IRQ9 Software redirected to INT + AH (IRQ2)

IRQ10 Reserved

IRQ11 Reserved

IRQ12 Reserved

IRQ13 Coprocessor

IRQ14 Fixed disk controller

IRQ15 Reserved

IRQ3 Serial port 2

IRQ4 Serial port 1

IRQ5 Parallel port2

IRQ6 Diskette controller

IRQ7 Parallel port 1

SB-5861

15

Note: IRQ9, IRQ10, IRQ11, IRQ12, IRQ15, IRQ3, IRQ4,

IRQ5 and IRQ7 can be redirected to PCI add-in boards.

The PCI standard has a 4-IRQ limitation. Some PCI add-in

boards do not require IRQs. Some can share an IRQ with

another board of the same model and manufacture. Check the

add-in boards documentation for IRQ information.

Direct Memory Access

The system supports seven DMA channels:

Controller 1 Controller 2

Channel 0 - Spare Channel 4 - Cascade

for Controller 1

Channel 1 - SDLC Channel 5 - Spare

Channel 2 - Diskette Channel 6 - Spare

Channel 3 - Spare Channel 7 - Spare

The first DMA controller holds channels 0 through 3. These

channels support 8-bit data transfers between 8-bit I/O

adapters and 8- or 16-bit system memory. Each channel can

transfer data in 4 KB blocks.

The second DMA controller holds channels 4 through 7.

Channel 4 cascades channels 0 through 3 to the

microprocessor. Channel 5, 6 and 7 support 16-bit data

transfers between 16-bit I/O adapters and 16-bit system

memory. These DMA channels can transfer data throughout

the 16 MB system-address space in 128 KB blocks.

Channel 5, 6 and 7 cannot transfer data on odd byte

boundaries.

16 SB-5861

Configuration Utilities

Overview

BIOS Setup is a utility that stores your computers

configuration. When your system boots, its configuration

is read into main memory. Hard drives, floppy drives, video

adapter, memory and keyboard are described to the system.

The BIOS is pre-configured for you at the factory. This

document provides an overview of the BIOS, which you can

use when reconfiguring your system.

The BIOS Setup Utilities program is built into the CMOS

on your system board. To start the program, press the

<Delete> key while the system is booting. The Utilities

menu screen will display:

American

Megatrends

Setup Security

Standard Advanced Chipset

Power Mgmt PCI/PnP Peripheral An ti-virus

Utility Defau lt

Detect IDE Language Original Optimal Default

SB-5861

(c) 1994 American Megatrends, Inc.

Figure 2: The Main Menu

AMI BIOS

Supervisor User

17

The Utility options allow you to the color of the Setup

screen. It also allows you to choose another language, if

available.

The Security option allow you to define a password. Enable

the password option through Advanced Setup.

The Default option allows you to change all of your Setup

values to Optimal or Fail-Safe settings. Or you can return

the system to its original settings.

The most commonly used option is Standard Setup.

Standard Setup

This utility allows you to record your system setup.

- Standard Setup

Pri Master Pri Slave Sec Master Sec Slavd

Date/Time Floppy A Floppy B

To start SETUP, double-click on the Standard Setup icon

on the Main Menu. Alter only the items that need to be

changed or reset. If a selected option is correct, skip the

corresponding step.

Pri Master Primary master IDE/PCI hard drive. Define

the parameters of your hard disk and modes. The default

setting is Auto, to auto-detect drive type.

Pri Slave Primary slave IDE/PCI hard drive. Define the

parameters of your hard disk and modes. The default

setting is Auto, to auto-detect drive type.

18 SB-5861

Sec Master Secondary master IDE/PCI hard drive, if

installed. Define the parameters of your hard disk and

modes. The default setting is Not Installed.

Sec Slave Secondary slave IDE/PCI hard drive, if installed.

Define the parameters of your hard disk and modes. The

default setting is Not Installed.

Note: You may also manually enter the hard disk

parameters. Two helpful tables appear at the end of this

section. One describes drive parameters, and the other is

lists various hard drive parameters.

Floppy Drive A:/Floppy Drive B: Double-click the floppy

drive icon and select the type installed. Scroll through the

fields using the up/down arrows. Select from the following:

5.25 - 360 KB 3.5 - 720 KB

- 1.2 MB - 1.44 MB

- 2.44 MB

Date/Time Double-click the Date/Time icon and enter

new values through the keyboard.

Advanced Setup

Advanced Setup allows you to fine tune some of the special

features. These features are pre-set for you at the factory.

To use this feature, double-click on the Advanced Setup

icon on the Main Menu.

Use the arrow keys to toggle between items. Press

<Enter> to access the drop down selection menu.

Use the arrow keys to toggle between options. Press

<Enter> to make a selection.

SB-5861

19

Chipset Setup

This option lets you configure some of the advanced

features of your system through the chipset. It is

preconfigured at the factory and need not be altered.

To use this feature, double-click on the Chipset Setup icon

on the Main Menu.

- Chipset Setup

82439 HX Global Features : Enable

Memory Hole : Disable

8 bit I/O Recovery Time (Sysclk) : 1

16 bit I/O Recovery Time (Sysclk) : 1

DRAM Timings : 70ns

DRAM Refresh Rates : 66 MHz

ISA Clock Divisor : PCICLK/4

Turbo Read Lead Off : Disable

DRAM Read Burst Timing : x333

DRAM Write Burst Timing : x333

Fast RAS to CAS Delay (Clocks) : 3

DRAM Lead Off Timing (DLT) : 7/6/3/4

Turbo Read Pipelining : Disable

Speculative Lead Off : Disable

Turnaround Insertion : Disable

Memory Address Drive Strength : Auto

NA Disable (NAD) for External Cache : Disable

Extended Cacheability : 64 MB

Peer Concurrency : Enable

DRAM Error Checking : Disable

Serr # Output Type : Normal

Serr # Duration : Pulse Mode

Serr # Enable : Disable

Single Bit Correction Error : Disable

Multiple Bit Uncorrectable Error : Disable

Bad Parity On Uncorrectable Error : Disable

PCI 2.1 Passive Release Enable : Enable

Delayed Transaction Enable : Disable

USB Function Enable : Disable

USB Passive Release Enable : Enable

USB Clock : 24 MHz

20 SB-5861

8439HX Global Features: Enables or disables the chipset

features. This option should be set to enable.

DRAM Timing: Specifies the DRAM chip speed.

DRAM Refresh Rate: Specifies the processors internal

clock, used to refresh the DRAM.

ISA Clock Divisor: Is the factor used to divide the clock

signal used for the PCI bus to provide the ISA bus signal.

For a 75 MHz processor, select PCICLK/3. For all other

speeds, select PCICLK/4.

Turbo Read Lead Off: When enabled, results in a 1 host

clock pull-in of all read lead off timings.

Serr # Output Type: System error output signal type for

the system.

Serr # Enable Enables system to report memory errors.

Memory Address Drive Strength: Select 8 mA or 12 mA

output for memory address signal strength.

NA Disable (NAD) for External Cache: Next address

disable affects system performance.

Extended Cacheability: Selects memory cacheable space.

Use the arrow keys to toggle between items. Press

<Enter> to access the drop down selection menu.

Use the arrow keys to toggle between options. Press

<Enter> to make a selection.

SB-5861

21

Power Management Setup

This utility allows you to set the parameters for the green

functionality of your system.

To use this feature, double-click on the Power Management

Setup icon on the Main Menu. You may select to make

changes to the following features:

- Power Management Setup

Power Management APM : Disable

Instant-On Timer (Minute) : Disable

Green PC Monitor Power State : Standby

Video Power Down Mode : Standby

Hard Disk Power Down Mode : Suspend

Hard Disk Time Out (Minute) : 8

Standby Time Out (Minute) : 1

Standby Time Out (Minute) : 1

Slow Clock Ratio : 1:8

IRQ3 : Ignore

IRQ4 : Monitore

IRQ5 : Ignore

IRQ7 : Ignore

IRQ8 : Monitor

IRQ9 : Ignore

Instant On Timer is a type of green mode timer lets you

wake up the system at the same time that you trigger it.

IRQ3, 4, 5, 7, 8, 9 can either be ignored or monitored.

When monitored, activity on the IRQ is used to wake the

system up.

Use the arrow keys to toggle between items. Press

<Enter> to access the drop down selection menu.

Use the arrow keys to toggle between options. Press

<Enter> to make a selection.

22 SB-5861

PCI/PnP Setup

This menu allows you to define attributes of the PCI bus

portion of the motherboard.

- PCI/PNP Setup

Plug and Play Aware O/S : No

PCI Latency Timer (PCI Clocks) : 32

PCI VGA Palette Snoop : Disable

PCI IDE Bus Master : Disable

Offboard PCI IDE card : Auto

Offboard PCI IDE Primary IRQ : Disable

Offboard PCI IDE Secondary IRQ : Disable

PCI Slot 1 IRQ Priority : Auto

PCI Slot 2 IRQ Priority : Auto

PCI Slot 3 IRQ Priority : Auto

PCI Slot 4 IRQ Priority : Auto

DMA Channel 0 : PnP

DMA Channel 1 : PnP

DMA Channel 3 : PnP

DMA Channel 5 : PnP

DMA Channel 6 : PnP

DMA Channel 7 : PnP

IRQ3 : ISA/EISA

IRQ4 : ISA/EISA

IRQ5 : ISA/EISA

IRQ7 : ISA/EISA

IRQ9 : PCI/PnP

IRQ10 : PCI/PnP

IRQ11 : PCI/PnP

IRQ14 : PCI/PnP

IRQ15 : PCI/PnP

Reserved Memory Size : Disable

Reserved Memory Address : C8000

PCI Peer-to-Peer Traffic : Disable

Use the arrow keys to toggle between items. Press

<Enter> to access the drop down selection menu.

Use the arrow keys to toggle between options. Press

<Enter> to make a selection.

SB-5861

23

Peripheral Setup

This menu allows you to specify the peripherals installed on

your motherboard.

- Peripheral Setup

On-Board FDC : Auto

On-Board Serial Port 1 : Auto

On-Board Serial Port 2 : Auto

On-Board Parallel Port : Auto

Parallel Port Mode : Normal

Parallel Port IRQ : Auto

Parallel Port DMA Channel : None

On-Board IDE : Both

Slow IDE drive delay (seconds) : Disable

On-board IDE enables the on-board chipset EIDE

function.

Slow IDE Drive Delay when enabled, lengthens the boot

time, so that all EIDE drives installed have ample time to spin

up. Different drive brands may have slightly different boot up

times.

Use the arrow keys to toggle between items. Press

<Enter> to access the drop down selection menu.

Use the arrow keys to toggle between options. Press

<Enter> to make a selection.

24 SB-5861