Crystal CDB5471 Datasheet
LK\
CDB5471
CDB5471 Evaluation Board and Software
Features
l Direct Shunt Sensor and Current
Transformer Interface for 3-Phase
Power
l On-Board Voltage Reference
l On-board crystal for XIN
l Digital Interface to PC
l Lab Windows/CVI
Evaluation
Software
- “Real-Time” RMS calculation
- FFT Analysis
- Time Domain Analysis
- Noise Histogram Analysis
General Description
The CDB5471 is an inexpensi ve tool des igned to ev al uate the functionality/performance of the CS5471 2channel A/D Converter. In addition to this data sheet, the
CS5471 Data Sheet is requir ed in conjunction with the
CDB5471 Evaluation Board.
Two terminal-block connectors serve as inputs to the
CS5471’s two analog input pairs. The CDB5471 includes an optional voltage reference source for CS5471.
A 4.096MHz crystal is provided as a source for CS5471’s
XIN pin, or an exte rnal c lock s ource can b e sup plied by
the user. Digital o utput data fro m the CS5471 is transferred to the user’s IBM-com patible PC vi a the include d
25-pin parallel port cable.
The CDB5471 includes PC software, allowing the user to
perform data capture (includes option for time domain
analysis, histogram analysis, and frequency domain
analysis). The software also allows real-time RMS calculation/analysis to be performed simultaneously on the
instantaneous data from both chann els .
ORDERING INFORMATION
CDB5471 Evaluation Board
VIN1+
VIN1IIN1+
IIN1-
VIN2+
VIN2IIN2+
IIN2-
VIN3+
VIN3IIN3+
IIN3-
V
REF
Voltage
Reference
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
VA-
Charge
Pump
Circuitry
CPD
VA-
VA+
GAIN
OWRS
RESET
FSO
SDO
CLK
CS5451
V
REF
IN OUT
XIN
+5 VINVA+
3 V
Regulator
(Not Populated)
SE
Header
Control Switches
Reset Circ uit
Serial-to-
Parallel
Interface
Crystal
4.096 MHz
VD+GND
DB25
To PC
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2001
(All Rights Reserved)
FEB ‘01
DS480DB1
1
TABLE OF CONTENTS
1. INTRODUCTION ....................................................................................................................... 4
1.1 CS5471 ..............................................................................................................................4
1.2 Data Flow on Evaluation Board .........................................................................................4
2. HARDWARE ............................................................................................................................. 5
2.1 Evaluation Board Description ............................................................................................. 5
2.2 Power Supply Connections ................................................................................................5
2.2.1 Analog Power Supply ............................................................................................5
2.2.2 Digital Power Supply .............................................................................................5
2.2.3 Charge Pump Options ........................................................................................... 6
2.3 Eval Board Control - Headers/Switches .............................................................................6
2.3.1 Analog Inputs ........................................................................................................ 8
2.3.2 Voltage Reference Input .......................................................................................9
2.3.3 Clock Source for XIN ................. ...... ....... ...... ...... ....... ...... ....... ...... .........................9
2.3.4 S1 DIP Switch ....................................................................................................... 9
2.3.5 Reset Circuit .......................................................................................................... 9
2.3.6 External Signal In/Out Header ..............................................................................9
2.3.7 Serial-to-Parallel Interface .....................................................................................9
2.3.8 Connecting the Eval Board to PC .......................................................................10
3. SOFTWARE ............................................................................................................................ 14
3.1 Installing the Software ...................................................................................................... 14
3.2 Running the Software ......................................................................................................14
3.2.1 Getting Started ....................................................................................................14
3.2.2 The Start-Up Window ..........................................................................................15
3.2.3 The Conversion Window ..................................................................................... 15
3.2.4 Data Collection Window ......................................................................................17
3.2.5 Config Window .................................................................................................... 18
3.2.6 Analyzing Data ....................................................................................................19
3.2.7 Time Domain Information ....................................................................................19
3.2.8 Frequency Domain Information ...........................................................................20
3.2.9 Histogram Information .........................................................................................21
CDB5471
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/sales.cfm
IBM, AT and PS/2 are trademarks of International Business Machines Corporation.
Windows is a trademark of Microsoft Corporation.
Lab Windows and CVI are trademarks of National Instruments.
TM
SPI
is a trademark of Motorola.
TM
Microwire
Preliminary product inf o rmation describes products whi c h are i n p r od uct i on, but for which full char acterization data is not yet avai l ab le . Advance p r odu ct i nfor -
mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document i s accurat e and reli able. However , t he infor mation is subje ct to chang e without noti ce and is provi d ed “AS IS” without warrant y of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other ri g ht s
of third parties. This document is the pro perty of Cirrus Logi c, Inc. and i mplie s no licen se under patents, copyrights, tr ademarks, or trade secre ts. No part of
this publication may be copied, reproduced , stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the pr i or writ ten consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or di sk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
2 DS480DB1
is a trademark of National Semiconductor.
LIST OF FIGURES
Figure 1. Power Supply, CS5471, and Oscillator ..............................................11
Figure 2. Analog Inputs ..................................................................................... 12
Figure 3. Digital Circuitry ...................................................................................13
Figure 4. Start-Up Window................................................................................ 15
Figure 5. Conversion Window ........................................................................... 16
Figure 6. Data Collection Window (Time Domain) ............................................17
Figure 7. Configuration Window........................................................................ 19
Figure 8. Data Collection Window (FFT)........................................................... 20
Figure 9. Data Collection Window (Histogram) ................................................. 21
Figure 10.Silkscreen ...........................................................................................22
Figure 11.Circuit Side .........................................................................................23
Figure 12.Solder Side......................................................................................... 24
CDB5471
DS480DB1 3
CDB5471
1. INTRODUCTION
The CDB5471 Evaluation Board demonstrates the
performance of the CS5471 6-channel A/D converter.
The CDB5471 evaluation board provides a quick
means of evaluating the CS5471. Analysis software supplied with the CDB5471 allows the user to
observe the CS5471’s digital output data on the user’s PC monitor. The PC software allows the user
to quantify the device’s performance in the timedomain and frequency domain. The user can save
raw data from the CS5471 to a data file, which a llows to user to analyze performance with other
tools that may be preferable to the user.
1.1 CS5471
The CS5471 is a highly integrated Two-Channel
Delta-Sigma Analog-to-Digital Converter (ADC)
developed for power measurement/metering applications. However the CS5471 has other potential
uses in various data acquisition applications, particularly in motor/servo control applications which
require very high precision. The CS5471 combines
two delta-sigma modulators with decimation filters, along with a master-mode serial interface on a
single chip device. The CS5471 was designed for
the purpose of performing the A/D conversion operations required at the front-end of a digital singlephase metering system. The six ADC channels can
be thought of as a pair of voltage/current-channel
ADC’s in a digital single-phase power metering application.
The CS5471 contains one programmable gain amplifier (PGA) for the current input. The PGA sets
the maximum input level of the current channel at
±800 mV DC (for gain = 1x) or ±40 mV DC (for
gain = 20x). The voltage channel has only the 1x
gain setting, and so the range of input levels on the
voltage channel is ±800 mV DC.
Additional features of CS5471 include a charge
pump driver, on-chip 1.2 V reference, and a digital
input that can select between two different output
word rates. (The two output word rates are equal to
XIN/2048 and XIN/1024.)
The CS5471 requires a 1.2 V reference input on
VREFIN. The ∆Σ modulators and high rate digital
filters allow the user to measure instantaneous voltage and current at an output word rate of 4 kHz (or
2000 kHz, depending on the state of the OWRS
pin) when a 4.096 MHz clock source is used.
1.2 Data Flow on Evaluation Board
The output serial bit-stream from the CS5471 is
shifted into an 8-bit latch circuit so that it can be
quickly ported to the DB25 connector. From this
connector, the data can be sent through the provided 25-pin printer cable to the parallel port of the us-
er’s IBM-compatible PC (the PC must run under
Windows ‘95/’98/2000 operating system).
Once the 8-bit segments of data are ported to the
user’s PC, the LabWindows software (included
with this kit) will re-segment the data into the appropriate 16-bit word format for both of the
CS5471’s two data channels. The data is sent
quickly to the user’s PC, which allows the software
to perform various data processing and graphical illustrations on the digital output data. This includes
real-time RMS, variance, and standard deviation
calculations for both channels. The output data
from each channel can be plotted on-screen in the
time domain or in the frequency domain. A histogram function is also included to help the user to
evaluate the noise characteri stics of each channel.
The software can also calculate the mean and standard deviation of the output codes both channels.
This feature allows the user to scrutinize the variation of the A/D converters if the user applies constant DC voltage levels to the inputs. RMS
calculation is also provided to assist in the quick
analysis AC input signals.
4 DS480DB1
CDB5471
2. HARDWARE
2.1 Evaluation Board Description
The CDB5471 board contains circuitry that will:
• Accept appropriate DC voltage levels from the
user’s +3V and/or +5V power supplies, and
direct this power to the VA+, VD+, VA- and
DGND pins of the CS5471.
• Direct the six analog input signals to the six
input pairs of the CS5471.
• Supply necessary voltage reference input for the
CS5471’s VREFIN pin.
• Supply appropriate crystal/oscillator stimulus to
the CS5471’s XIN pin.
• Direct the output driver signal from the
CS5471’s charge-pump driver pin (CPD) which
is used produce the negative power supply
source for the CS5471’s VA- pin.
• Provide a reset switch that allows the user to set
the CS5471’ s RESET pin from logic “1” to logi c
“0”.
• Provide two DIP switches which allow the user
to set the logic levels on the CS5471’ s GAIN and
OWRS input pins.
• Detect and receive the data frame signal and digital serial output data signals from the CS5471’s
FSO and SDO pins, and send this output data
through the included parallel cable, and up to
user’s PC.
Several areas of blank proto-board space are provided so that, if desired, the user can interface their
own electronic sensor equipment onto the board.
The output from these sensors can be wired to the
two nearby analog input terminal block connectors,
which is then fed to the two analog input channels
of the CS5471. Examples of such sensors would
include voltage and current transformers, shunt resistors, and resistor divider networks.
The next section of this document describes the
various sections of the board. After this, operation
of the PC software is described in detail.
2.2 Power Supply Connections
The CDB5471 can be used in several different
power supply configurations. Table 1 shows the
various possible power connections with the required jumper settings. There are various +3 V and
+5 V options. The user must supply the +3V, +5V,
GND, and sometimes -2V voltage levels needed to
power the evaluation board.
2.2.1 Analog Power Supply
Referring to Figure 1, the A+ post supplies power
to the positive analog power input pin (VA+) of the
CS5471. This post also supplies power to the
LT1004 voltage reference (D3) and the optional
+3V regulator (U5). If HDR9 is set to the “A-” setting, the A- post can supply the required negative
voltage to the VA- pin of the CS5471.
Note that the evaluation board contains the footprints and connectivity which allows the user to install a LM317 voltage regulator (U5), which can be
used to create +3 V from a +5 V supply. This option is useful if the user wants to interface the ev aluation board to another board that can only operate
from a +5V supply. With HDR17 set to “+5V_IN”,
one single +5 V supply can be used to provide both
a +5V to various microcontrollers and/or other peripheral devices, as well as +3 V for the CS5471.
The included schematic diagram shows the circuitry for the +5V regulator circuitry inside a box with
dashed lines. These components are not populated
when the board is shipped from the factory, but the
user can install these components if desired.
2.2.2 Digital Power Supply
The A+ post can be used to supply both the analog
power (to CS5471 VA+ pin) as well as the digital
power (to CS5471 VD+ pin). However if a separate supply voltage is desired for the digital power
DS480DB1 5
CDB5471
supply, the “VD+” banana connector post can be
used to independently supply a separate digital
power supply to the input of the CS5471 (VD+
pin), the 4.096 MHz oscillator (U1), and circuitry
for the parallel port interface. This is controlled by
the setting on HDR18.
The user should note that the CS5471 can operate
with a digital supply voltage of either +3V or +5V.
ferring to Figure 1, circuitry for a charge-pump circuit is included on-board. The charge pump circuit
consists of capacitors C11, C12, and C36, and diodes D1 and D2.
As an alternative to using the charge pump circuit,
the user can supply an off-board -2V DC power
source to the “A-” banana connector. This option
is controlled by the setting on HDR9.
This voltage is defined as the voltage presented
across VD+ and DGND.
2.3 Eval Board Control - Headers/Switches
Table 2 lists the various adjustable headers and
2.2.3 Charge Pump Options
The output from CS5471’s charge-pump driver pin
(CPD) can be used to generate a -2V supply when
the proper jumper settings are selected on HDR9.
This -2V supply can be used as the negative power
supply connection for the CS5471’s VA- pin. Re-
Power Supplies Power Post Connections
Analog Digital A+ A- GND D+ +5 V_IN HDR9 HDR17 HDR18
+3 +3 +3 -2 0 +3 NC
switches on the CDB5471 Evaluation Board, as
well as their default settings (as shipped from the
factory). The header settings can be adjusted by the
user to select various options on the evaluation
board. These options are described further in the
following paragraphs.
A-
CPD
O O
O O
+5V_IN
A+
O O
O O
VD+
V+
O O
O O
+3 +3 +3 -2 0 NC NC
+3 +3 +3 NC 0 +3 NC
+3 +3 +3 NC 0 NC NC
+3 +3 NC -2 0 NC +5
+3 +3 NC NC 0 NC +5
+3 +5 +3 -2 0 +5 NC
+3 +5 +3 NC 0 +5 NC
+3 +5 NC -2 0 +5 +5
+3 +5 NC NC 0 +5 +5
+5 +3 +5 0 +2 +5 NC
Table 1. Power Supply Connections
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
A-
CPD
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
+5V_IN
A+
A+
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O +5V_IN
O O
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
VD+
V+
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
O O
6 DS480DB1
CDB5471
Name Function Description Default Setting Default Jumpers
HDR1
HDR2
HDR3
HDR4
HDR5
HDR6
HDR7
HDR8
HDR9
Used to switch IIN3+ on the CS5471 between J2
and AGND.
Used to switch VIN3- on the CS5471 between J3
and AGND.
Used to switch VIN3+ on the CS5471 between J1
and AGND.
Used to switch IIN3- on the CS5471 between J4
and AGND.
Used to switch VIN2- on the CS5471 between J6
and AGND.
Used to switch IIN2+ on the CS5471 between J7
and AGND.
Used to switch IIN2- on the CS5471 between J5
and AGND.
Used to switch VIN2+ on the CS5471 between J8
and AGND.
Used to switch between external VA- and on-board
CS5471 charge-pump circuit, CPD
IIN3+ Set to BNC J2
VIN3- Set to BNC J3
VIN3- Set to BNC J1
IIN3- Set to BNC J4
VIN2- Set to BNC J6
IIN2+ Set to BNC J7
IIN2+ Set to BNC J5
VIN2+ Set to BNC J8
CPD active
O O IIN3+
O O AGND
O O VIN3O O AGND
O O VIN3+
O O AGND
O O IIN3O O AGND
O O VIN2O O AGND
O O IIN2+
O O AGND
O O IIN2O O AGND
O O VIN2+
O O AGND
A-
O O
O O
CPD
HDR10
HDR11
HDR12
SW1
HDR13
HDR14
Used to switch VIN1+ on the CS5471 between J9
and AGND.
Used to switch IIN1- on the CS5471 between J12
and AGND.
Used to switch IIN1+ on the CS5471 between J10
and AGND.
S1-1 sets logic level on CS5471
GAIN input pin
S1-2 sets logic level on CS5471 OWRS input pin
Used to switch VIN1- on the CS5471 between J11
and AGND.
Used to switch the VREFIN from external VREF
post connector, to the on board LT1004 reference,
or to the on-chip reference VREFOUT. Refer to
Table 3.
VIN1+ Set to BNC J9
IIN1- Set to BNC J12
IIN1- Set to BNC J10
SW1-2 Open (GAIN=x1)
SW1-1 Open (XIN/1024
VIN1- Set to BNC J11
VREFIN Set to on-
chip reference
VREFOUT
)
O O VIN1+
O O AGND
O O IIN1O O AGND
O O IIN1+
O O AGND
23
OPEN
O O VIN1O O AGND
O O LT1004
O O VREFOUT
O O EXT VREF
Table 2. Default Header Settings
DS480DB1 7
CDB5471
Name Function Description Default Setting Default Jumpers
HDR15 Controls the source for the CS5471 XIN clock input.
HDR16 This header should always be shorted. Short this header
Determines whether the main analog supply will be
HDR17
HDR18
2.3.1 Analog Inputs
Refer to Figure 2. The settings on the 14 analog input headers (2 headers per channel) which are designated as HDR10 through HDR13, determine
which of the input lines will carry a signal, and
which input lines may be grounded. They can be
configured to accept either a single-ended or differential signal. Using the voltage channel as an example (see Figure 2), note that HDR10 sets the
input to the positive side of the first voltage channel
input (VIN1+ pin). HDR13 sets the input to the
negative side of the first voltage channel input
(VIN1- pin). In a single-ended input configuration,
HDR13 would be set to the “AGND” setting, and
HDR10 would be set to “VIN1+” and would conduct the single-ended signal. In a differential input
configuration, HDR13 would be set to “VIN1-”
and HDR10 would be set to “VIN1+” and this pair
of inputs would form the differential input pair into
the VIN1+ and VIN1- pins of the CS5471.
WARNING: DANGER! One of the possible applications for the CS5471 includes data acquisition
for a power metering system. However, the user
should not attempt to directly connect any leads
from a high-voltage power line to the evaluation
board inputs, even if the current/voltage levels are
gain reduced by resistive dividers and/or shunts.
Because the ground terminal of the parallel cable
(from the PC) is near or at earth ground potential,
powered from the A- post, or from the regulated 3V
voltage (generated from the +5V_IN) post input.
Choose whether the digital circuitry will be powered
by main analog supply, or powered by separate digital supply (through VD+ post).
Table 2. Default Header Settings (Continued)
the ground node on the evaluation board will also
be forced to earth ground potential. Serious dam-
age and even personal injury can occur if a “hot”
voltage main is connected to any point on the eval-
uation board, including the analog input connec-
tors. Such power line signals must be isolated by
current/voltage transformers and reduced in mag-
nitude before they can be safely applied to the eval-
uation board.
Several patch-circuit areas are provided near the
voltage/current input headers, in case the user
wants to connect special sensor circuitry to the an-
alog inputs (such as transformers, shunt resistors,
etc., for sensory the voltage/current on a single-
phase power line). For the input channel, a Shunt
Resistor or Current Transformer can be mounted in
these areas and connections can be made to current-
channel input pair. Likewise, the three channels, a
Voltage Divider or Voltage Transformer can be
connected to the CS5471’s voltage input pair. Note
from Figure 2 that a simple R-C network filters
each sensor’s output to reduce any interference
picked up by the input leads. The 3 dB corner of the
filter is approximately 50 kHz differential and
common mode.
Note that the CDB5471 Evaluation Board is also
used as the evaluation board for the CS5451 A/D
converter, which is a 6-channel version of the
CS5471. The user can use this board to the evalu-
Set to on-board 4.000
MHz crystal (U1).
Set to A-
Set to main analog
supply
O O EXT XIN
O O DGND
O O 4.0096 MHz
O O
O O +5V_IN
O O A+
VD+
O O
O O
V+
OSC
8 DS480DB1
Loading...