Conmed 7550 Service manual

Service Manual

LIMITED WARRANTY

For a period of two years following the date of delivery,

CONMED Corporation warrants the CONMED Sys-

tem 7550 Electrosurgical Generator against any defects

in material or workmanship and will repair or replace (at

CONMED’s option) the same without charge, provided

that routine maintenance as specified in this manual has

been performed using replacement parts approved by

CONMED. This warranty is void if the product is used in

a manner or for purposes other than intended.

© 2006 CONMED Corporation

525 French Road

Utica, New York 13502 U.S.A.

U.S. Patent Numbers 4,437,464 - 4,569,345 - 4,617,927

- 4,727,874 - 4,848,335 - 4,961,739 - 5,152,762 ­5,626,575 and other patents pending.

For Technical Service or Return Authorization Phone:

303-699-7600 / 1-800-552-0138 Extension 5274

Fax [phone]

For Customer Service or to order parts phone:

1-800-448-6506 / 315-797-8375 / Fax [phone]

or contact your CONMED Representative.

European Authorized Representative

MDSS GmbH

Burckhardtstr 1

D - 30163 Hannover

Germany

The revision level of this manual is specified by the

highest revision letter found on either the inside front cover

or enclosed errata pages (if any).

Manual Number 60-7552-ENG Rev. D 10/06

Unit Serial Number_________________________________

Table of Contents

& List of Illustrations

Section Title Page

1.0 General Information ...........Refer to Operator’s Manual (P/N 60-7551)

2.0 System Components .................................... Refer to Operator’s Manual

3.0 Operation .................................................... Refer to Operator’s Manual

4.0 Operator Service ......................................... Refer to Operator’s Manual

5.0 Technical Information ................................. Refer to Operator’s Manual

6.0 Circuit Descriptions .......................................................................... 6-1

6.1 Introduction ........................................................................................................ 6-1

6.2 Display Panel Assembly [A5] ............................................................................... 6-1

6.2.1 General Information ..........................................................................................................6-1

6.2.2 Mailbox [U19] ..................................................................................................................

6.2.3 Power Adjustments [U16 & U33] ..................................................................................

6.2.4 Activation Requests [U16 & U33] ....................................................................................

6.2.5 Mode Select Encoders [U31 & U32] ................................................................................

6.2.6 Display Drivers - Seven Segment

6.2.7 Indicator Driver [U34] .....................................................................................................

6.2.8 Firmware [U28 & U1] ......................................................................................................

6.2.9 RAM [U2 -6116] ..............................................................................................................

6.2.10 A/D Inputs [Control Microcontroller] ..............................................................................

6.2.11 A/D Inputs [Monitor Microcontroller] .............................................................................

6.2.12 EEPROM & Driver [U37, U27] ......................................................................................

6.2.13 D/A Converter [U12] .......................................................................................................

6.2.14 Keyboard Scanner [U5] ....................................................................................................

6.2.15 5V Monitoring [U29] .......................................................................................................

6.2.16 Output PIA [U21] ............................................................................................................

6.2.17 T_MON [U35] .................................................................................................................

[U14, U20, U39, U40, U41, & U17] ......................... 6-3

6.3 Power Control Assembly [A4] ............................................................................. 6-5

6.3.1 Power Control - Full Bridge Amplifier ..............................................................................6-6

6.3.2 RF Logic [U7 on the Power Control Assembly] ...............................................................

6.3.3 Power Control - I/O Signals ..............................................................................................6-8

6.3.4 ABC

™ Arc Sense ...............................................................................................................6-8

6.4 High Voltage Power Supply [A7] ........................................................................ 6-9

6.4.1 Power Supply Topology ....................................................................................................6-9

6.4.2 Phase Control Output ......................................................................................................

6.4.3 HVPS Isolation Components ..........................................................................................

6.4.4 HVPS Low Voltage Components ...................................................................................

6.5 HV/Flow Control Assembly [A1] ..................................................................... 6-11

6.5.1 Line Synchronization Circuit ...........................................................................................6-11

6.5.2 HV Regulation Control Loop .........................................................................................

6.6 Argon Flow Control [A1] ................................................................................. 6-13

6.6.1 Pneumatic Circuit ............................................................................................................6-13

6.6.2 Mass Flow Rate Regulation ............................................................................................

6.6.3 Smart Sense .....................................................................................................................

6.7 Full Bridge Amplifier [A8] ................................................................................ 6-15

6-1
6-1
6-2
6-2

6-3
6-3
6-3
6-3
6-4
6-4
6-4
6-5
6-5
6-5
6-5

6-7

6-9
6-10
6-11

6-12

6-14
6-15

Section Title Page

6.8 Single-Ended Amplifier [A9] ............................................................................. 6-16

6.9 RF Output Assembly/Component

6.10 Low Voltage Power Supply [A6] .......................................................................

6.11 HS/A.R.M. Assemb

6.11.1 Handsense Circuit ...........................................................................................................6-18

6.11.2 Aspen Return Monitor (A.R.M.) ....................................................................................

6.11.3 RF Leakage Monitor .......................................................................................................

6.11.4 Transformer Select Relays ................................................................................................

6.11.5 Arc Sense Transformer ....................................................................................................

ly [A11] ............................................................................. 6-18

s [A10] ......................................................... 6-17

6-18

6-19
6-20
6-20
6-20

7.0 Maintenance/Checkout ...................................................................... 7-1

7.1 Introduction ........................................................................................................ 7-1

7.2 Cleaning .............................................................................................................. 7-1

7.3 Generator & Mobile Storage Assembly ................................................................ 7-1

7.4 Access to Circuits & Factory Settings .................................................................. 7-2

7.5 Default Settings (Factory Settings) ...................................................................... 7-2

7.6 AC Mains Frequency & Voltage .......................................................................... 7-2

7.7 Initial Setup & Test ............................................................................................. 7-3

7.7.1 Accessory Connections ......................................................................................................7-3

7.7.2 Display Panel Testing ........................................................................................................7-3

7.7.3 Activation Testing .............................................................................................................7-5

7.7.4 RF Output Power Checks .................................................................................................7-5

7.7.5 Argon Flow Testing .......................................................................................................... 7-6

7.7.6 Remote Power Control Testing .........................................................................................7-6

7.7.7 Return Monitor (A.R.M. - Aspen Return Monitor) .......................................................... 7-7

7.8 Pulsed Cut Mode ................................................................................................. 7-8

7.9 RF Leakage Test .................................................................................................. 7-8

7.10 Final Checks ........................................................................................................ 7-8

7.11 Mobile Storage Pedestal (Cart) ............................................................................ 7-8

8.0 Calibration ........................................................................................8-1

8.1 Introduction ........................................................................................................ 8-1

8.2 Equipment List ...................................................................................................

8.2.1 Standard Equipment List ..................................................................................................8-1

8.2.2 Optional Calibration Equipment List ................................................................................

8.2.3 Test Leads & Adaptors ......................................................................................................

8.3 Calibration Set-Up .............................................................................................. 8-1

8.4 A.R.M. Calibration (HS/A.R.M. Assembly - A11) ............................................

8.4.1 10 Ohm A.R.M. Calibration ............................................................................................. 8-1

8.4.2 150 Ohm A.R.M. Calibration ...........................................................................................

8.5 High Voltage Calibration (HV/Flow Control Assembly - A1) ............................. 8-2

8.5.1 HV RAMP Calibration ..................................................................................................... 8-2

8.5.2 High Voltage Adjust .........................................................................................................

8.5.3 HV_MON Adjust .............................................................................................................

8.6 Argon Flow Calibration (HV/Flow Control Assembly - A1) ............................... 8-2

8.6.1 dP Calibration (Differential Pressure) ................................................................................8-2

8.6.2 PABS Calibration (Absolute Pressure) ...............................................................................

8.6.3 Flow Rate Calibration (Optional) .....................................................................................

8.6.4 FMON Calibration ...........................................................................................................

8.7 Power Calibration ................................................................................................ 8-3

8.7.1 Filter Calibration - Full Bridge Modes (Optional) .............................................................8-3

8.7.2 Cut Power Calibration (Power Control Assembly - A4) ....................................................

8-1

8-1
8-1

8-1

8-2

8-2
8-2

8-2
8-2
8-3

8-3

Section Title Page

8.7.3 Pinpoint Coag Calibration (Power Control Assembly - A4) ..............................................8-3

8.7.4 Spray Coag Calibration (Power Control Assembly - A4) ...................................................

8.7.5 Bipolar Calibration (Power Control Assembly - A4) .........................................................

8.7.6 ABC Calibration (Power Control Assembly - A4) .............................................................

8.7.7 ABC Over Voltage Calibration (Power Control Assembly - A4) [Optional] .....................

8-3

8-4

8-4

8-4

8.8 EEPROM Calibration ......................................................................................... 8-4

8.8.1 Spray Coag PW_MEA Loading ........................................................................................8-4

8.8.2 ABC PW_MEA Loading ...................................................................................................

8.8.3 A.R.M. Max Voltage Loading ...........................................................................................

8-4

8-4

8.9 IEC RF Leakage Measurement [Optional] .......................................................... 8-5

Appx. A Mnemonic List ................................................................................. A-1

Appx. B Troubleshooting Gu

Introduction ........................................................................................................ B-1

Control Microcontroller Failure Codes and Troubleshooting Tips ........................B-2

Monitoring Microcontroller Failure Codes and Troubleshooting Tips ..................B-3

Additional Troubleshooting Tips (Non-Error Code Related) ............................... B-5

Error Storage and Retrieval ................................................................................. B-7

Error Display Configuration .............................................................................................B-7

Example Error ...................................................................................................................B-8

ide .....................................................................B-1

Appx. C Schematics & BOMs ........................................................................ C-1

Bill of Material: Chassis & Cart ........................................................................... C-1

Bill of Material: HV/Flow Control PCB Assembly ..............................................C-2

Bill of Material: Power Control PCB Assembly ...................................................C-4

Bill of Material: Display PCB Assembly .............................................................. C-5

Bill of Material: LV Power Supply PCB Assembly .............................................C-10

Bill of Material: HV Output PCB Assembly ......................................................C-11

Bill of Material: FB Amplifier PCB Assembly ....................................................C-12

Bill of Material: SE Amplifier PCB Assembly .................................................... C-13

Bill of Material: RF Output PCB Assembly .......................................................C-14

Bill of Material: ARM/Handsense PCB Assembly .............................................C-15

Figure/Title Page

Figure 6.1 RF Drive Signals ....................................................................................................... 6-8

Figure 6.2 Line Sync/RAM ......................................................................................................

Figure 6.3

Flow Diagram ......................................................................................................... 6-14

Figure 6.4 Resistance vs. Bargraph ...........................................................................................

Figure 7.1 Test Adapters ............................................................................................................

Figure 7.2 Test Analyzer C

onnections ...................................................................................... 7-10

Figure 3.1 RAMP Flat Spot .......................................................................................................

Figure 3.2 IEC Method RF L

eakage Test Setup ......................................................................... 8-5

Figure B-1 Signal Status for a Handcontrol 1, Cut Activation Request .....................................

®

Figure B-2 Signal Status for ABC

Activation ........................................................................ B-10

Figure C-1a Assembly Location Diagram ..................................................................................

Figure C-1b Pneumatic Assembly ..............................................................................................

Figure C-2 Interconnect Diagram .............................................................................................

Figure C-3 A1 HV/Flow Control PCB .....................................................................................

Figure C-4a A1 HV/Flow Control PCB Schematic, Sheet 1 (of 2) ...........................................

Figure C-4a A1 HV/Flow Control PCB Schematic, Sheet 2 (of 2) ...........................................

Figure C-5 A
Figure C-6 A4
Figure C-7 A
Figure C-8a A
Figure C-8b A
Figure C-8c A
Figure C-8d A
Figure C-9 A
Figure C-10 A
Figure C-11 A
Figure C-12 A
Figure C-13 A
Figure C-14 A
Figure C-15 A
Figure C-16 A
Figure C-17 A
Figure C-18 A
Figure C-19 A
Figure C-20 A

4 Power Control PCB ...........................................................................................C-4

Power Control PCB Schematic ..........................................................................C-4

5 Display PCB ......................................................................................................C-5

5 Display PCB Schematic, Sheet 1 (of 4) ............................................................C-6

5 Display PCB Schematic, Sheet 2 (of 4) ...........................................................C-7

5 Display PCB Schematic, Sheet 3 (of 4) ............................................................ C-8

5 Display PCB Schematic, Sheet 4 (of 4) ...........................................................C-9

6 LV Power Supply PCB ....................................................................................C-10

6 LV Power Supply PCB Schematic .................................................................C-10

7 HV Output PCB ........................................................................................... C-11

7 HV Output PCB Schematic ..........................................................................C-11

8 FB Amplifier PCB .........................................................................................C-12

8 FB Amplifier PCB Schematic ........................................................................C-12

9 SE Amplifier PCB .........................................................................................C-13

9 SE Amplifier PCB Schematic .........................................................................C-13

10 RF Output PCB .......................................................................................... C-14

10 RF Output PCB Schematic .........................................................................C-14

11 A.R.M./Handsense PCB ..............................................................................C-15

11 A.R.M./Handsense PCB Schematic .............................................................C-15

6-11

6-19

7-9

8-2

B-9

C-1
C-1
C-1
C-2
C-2
C-3

Circuit Descriptions

Section 6.0

6.1 Introduction

The information on the System 7500™ circuits
identifies specific signals and I/O ports that help
identify the appropriate signal levels. The text
uses the word SET for high and
low. To locate the assemblies within the System
7500™, refer to Figure C-1. Use the system inter
connect (Figure C-2) to identify wiring harness
terminations and individual signals within a har
ness.

CLEAR for

-

6.2 Display Panel Assembly [A5]

6.2.1 General Information

The System 7500™ has two 80C550 microcon
trollers with one dedicated to system control and
the other dedicated to system monitoring. The
control microcontroller (U15) sets the system
enables and control limits, while the monitor
microcontroller (U22) monitors system perfor
mance and sets “inhibits” when an error is detect
ed. Both of these devices have “on-board” A/D
converters, and each device independently moni
tors separate analog signals. The address, data
and control buses of both microcontrollers are
isolated by a device called the “mailbox”, U19, a
dual port RAM that allows two-way data transfer
between the two microcontrollers.

On the schematic, the signal labels will have either
a “C” or “M” attached. The “C” is for the con
troller logic (U15) or control microcontroller and
the “M” is for the monitor logic (U22) or moni
tor microcontroller interface. The schematic for
the display panel (Figure C-8) is on four separate
sheets. Sheet 1 is the schematic for the displays
and drivers only; sheet 2 shows all the connec
tors that are on this assembly along with some
discrete non-logic circuitry; sheet 3 is the control
microcontroller logic; and sheet 4 is the monitor
microcontroller logic.

This assembly has several programmable logic
devices to interface signals to the data bus for
both the control and monitor microcontrollers.
During the discussion when two reference desig

-

-

-

-

-

-

-

-

nators are listed together it means the logic func
tions are the same and can be interchanged.

6.2.2 Mailbox [U19]

A dual port logic device that allows data transfer
between the two microcontrollers. All system

-

setups and messages are communicated through
the mailbox between the two microcontrollers.
When data is loaded by either microcontroller, a
bit labeled DA (data available) is
the other microcontroller that it has mail. Once
the data is read from the mailbox, another bit
labeled DC (data cleared) is
the sender that the mail has been retrieved. Each
microcontroller has independent access to the
mailbox and the mailbox is the only component
that connects the two data buses. Each instruc
tion sent through the mailbox requires two bytes
of information with the first byte (command byte)
identifying the instruction and the second byte
(data byte) containing the data for the instruction.

6.2.3 Power Adjustments [U16 & U33]

(C for controller; M for monitor) Power adjust
ments on the System 7500™ are made by rotat
ing the power control encoders. The mnemon
ics for the power encoders are: CT - CUT; CG

- COAG; BP - BIPOLAR; BM - ABC™. Each
encoder is a two bit counter (i.e.; CT0 & CT1)
where the two counts are used to identify the
direction of rotation. The logic devices (U16
& U33) store the previous count and compare
it to the new count in order to recognize if the
count is increasing or decreasing, which defines
if the encoder is rotated clockwise or counter­clockwise. Each “click” of the encoder is a count
and the number of counts are stored within
U16 & U33 until the microcontroller reads the
port. The microcontroller reads each encoder
port independently and if an encoder has been
rotated, the count will be greater than zero. The
data the micro will see is a number (0 to 32) rep
resenting the number of “clicks” the encoder has
been rotated and a separate bit that signifies the
direction of the count, either up or down. The
microcontroller then takes this count and adds or

SET to inform

CLEARED to inform

-

-

-

-

-

-

6-1

subtracts it to the existing power value.

The control microcontroller reads and controls
power change requests, however the monitor
microcontroller also looks at the encoders to verify
the change is valid. If the two microcontrollers
disagree on the direction (up or down), number
of counts, or which encoder is rotating, the power
will not be changed; i.e. the change request is
ignored.

6.2.4 Activation Requests [U16 & U33]

Activation requests are “looked at” by both micro
controllers, and if the two do not agree on an acti
vation request, an error code (Err 303 or Err 307)
will be displayed.

Activation Requests: Handcontrol or
Footcontrol

H2CT Handcontrol 2, Cut, Active Low

H2CG Handcontrol 2, Coag, Active Low

H1CT Handcontrol 1, Cut, Active Low

H1CG Handcontrol 1, Coag, Active Low

HIP Handcontrol, Bipolar, Active Low

FCT Footcontrol, Cut, Active High

FCG Footcontrol, Coag, Active High

FBIP Footcontrol, Bipolar, Active High

FAB Footcontrol, ABC™, Active High

Note: HABC Handcontrol is activated at
handcontrol 2 and is a result of H2CT * H2CG *
HABC_DR, which is an output of U16.

6.2.5 Mode Select Encoders [U31 & U32]

Blend Level (BL) and Argon Flow (FL) rate is
adjusted by the same type of encoders as used for
power adjustments. The logic within U31 & U32
for these two encoders is the same as for power
adjustment and the discussion for power adjust

-

ment applies here.

These logic devices have I/O ports also, and the
following text provides a brief description of each
port signal.

U31: Port B (PB0 - PB7) Inputs for Control
Microcontroller

LPSW: Low Pressure Switch

SET when the argon tank pressure is less than

240 psi. Low Tank warning is illuminated.

FDEV: Flow Deviance

SET if an occlusion occurs to the argon flow.

A_T: Active Mode or Target Mode

ABC™ mode and used for tone selection only.

A_T SET, tone is 500 Hz and ABC™ is active

- A_T CLEARED, tone is 250 Hz and
ABC™ is in the Target mode.

BRN_OUT: Brown Out

Holds high for at least 6 seconds when power

fails and is used to identify a temporary power
loss. The user settings are returned following
a temporary power loss.

-

-

Tone_A: Tone Signal

Mode Activation and Alarms. Square wave sig

­nal with frequency between 250 Hz to 1KHz
for audible tone.

KB_DA: Keyboard Data Available

SET when a front panel switch is pressed, cleared

when the device is read.

U31: Port C (PC0 - PC6) Outputs from
Control Microcontroller

ABC>80: ABC™ Power is Greater than 80W

SET when ABC™ power is set to greater than

CLEARED when ABC™ power is 80W

80W.
or less.

RFEN: RF Enable

SET to enable the RF drive for all activations.

FB_EN: Full Bridge Enable

CLEARED when activation for Cut, Blend,

Pinpoint, & Bipolar occurs.

OV_TST: Over Voltage Test

Test pin that allows the control microcontroller

to test and verify the ABC™ over voltage
circuit is operational. During Power-On Self­Test (POST), this signal is clocked for a dura

-

tion of about 7mS.

Alarm: Tone for alarms

1KHz signal tone for alarm - volume cannot be

adjusted.

Tone_B: Tone, Mode

Signal for all Tones except alarm tones. Volume

can be adjusted.

U32: Port B (PB0 - PB7) Monitor Inputs

This port has the switch for setting the system
defaults. The switch is located on the back side of
the Display PCB for accessibility. Default settings
are with the switch in the “OFF” position (off
= high on the input pin of U32). To change a
default setting, move the appropriate switch to the

6-2

“ON” position. To verify the selection, turn the
power off for at least 10 seconds, and then restore
power.

1-TEST-RUN (Default: RUN MODE)

TEST mode allows the system to be operated

without error detection and shut down. This
mode can be changed anytime while the sys­tem is in standby. Test mode can be selected
before the unit is powered on, however the
“store” button must be held down until an
“Err 1” is displayed. Test mode is to be used
only for system level testing.

2-SIN-DUAL PAD (Default: DUAL PAD)

SIN is for single foil return electrodes.

3-ZERO-LAST (Default: LAST SETTING)

When ZERO is selected, all power levels will

default to zero when the system is powered
on. Last setting only applies to power levels
of the default modes.

4-SPRAY-PPT (Default: PINPOINT COAG)

Spray Coagulation can be selected as a default

mode.

5-NON_SIM-SIM (Default: SIMULTANEOUS)

When the switch is set for non-simultaneous

activation, dual activation will not occur for
coag modes.

6-GAS TEST (for testing purposes only)

Allows the ABC™ mode to be tested without

argon gas connected. Can only be set after
the unit has been powered on and completed
initialization.

U32 - PORT C: Outputs from Monitor

This port has three (3) active outputs only and the
outputs are used solely to inhibit internal circuits
when a system fault is detected.

GAS_En: Gas Enable

SET to enable argon gas flow - CLEAR inhibits

argon gas flow. Drives the solenoid valve that
is part of the argon flow control manifold.

HV_INH: High Voltage Inhibit

SET inhibits the HV to the amplifiers.

RF_INH: RF Drive Inhibit

CLEAR inhibits the RF Drive to the amplifiers.

6.2.6 Display Drivers - Seven Segment [U14,
U20, U39, U40, U41, & U17]

Converts Hex to Seven-Segment. The hex value
on bits 0-3 drive the “ones” digit; the hex value

on bits 4-7 drive the “tens” digit; and the hex
value on the address (A0, A1) is used to drive
the “hundreds” digit. The displays are common
anode, therefore each segment is illuminated with
an active low on the drivers. The digits are mul
tiplexed, allowing only one digit to be on at any
one time for each section.

6.2.7 Indicator Driver [U34]

All indicators on the display panel with the excep
tion of the numeric displays are driven with this
logic device in a 4x7 matrix. The outputs labeled
S0-S3 are multiplexed at a 25% duty cycle and
these outputs are converted to 15V at U38 &
U42, which provide drive current for all LED
indicators. U9 and U10 sink the current for the
indicators. The monitor microcontroller loads
4- eight bit registers, with each bit dedicated to a
specific display panel indicator. The outputs S0­S3 are “send” and the outputs labeled R0-R7 are
“receive”. All the send and receive outputs are
active high at a 25% duty cycle.

6.2.8 Firmware [U28 & U1]

The firmware or program for the control
microcontroller is stored in U1 and the program
for the monitor microcontroller is stored in U28.

6.2.9 RAM [U2 -6116]

U2 is the external RAM for the con
trol microcontroller only and the monitor
microcontroller only uses internal RAM.

6.2.10 A/D Inputs [Control Microcontroller]

Only four of the 8 internal A/D inputs are uti
lized, and three of these inputs are for the A.R.M.
(Aspen Return Monitor).

2VARM: A voltage that represents the resistance of
the patient plate.

ARM_10: Calibration limit for 10 ohms. (See
A.R.M. cal)

ARM_150: Calibration limit for 150 ohms (See
A.R.M. cal)

FMEA: Back pressure monitoring for argon gas
flow. The control microcontroller monitors this
signal as a means of detecting occlusions or special
accessories with small orifice sizes.

When the monitor microcontroller senses an error
at ARM_10 or ARM_150, it will display an error
code to identify which input has the fault. These
are fatal errors that require the system to be reset

-

-

-

-

6-3

when they occur. An error for 2VARM is a return
electrode fault and occurs when the resistance
measured on the return electrode is not within
specified limits for either a single or dual foil
return electrode. An error code is not displayed,
however the “red” indicator for a return electrode
fault is illuminated.

In many cases, intermittent or continuous alarms
associated with these signals can be rectified
by going through the calibration procedure for
A.R.M.

FMEA has an idle voltage of one-half of the value

ABS. When testing or troubleshooting, use

of P
the calibration procedure for P
the value of F

MEA when no argon flow is occur-

ABS to determine

ring. This voltage increases with flow. A voltage
that exceeds 3.3V in all flow modes will set a flow
alarm by illuminating the “red” Flow Fault indica
tor.

6.2.11 A/D Inputs [Monitor Microcontroller]

Seven of the eight available inputs are used for
monitoring system signals. A failure with any one
of the inputs will be displayed as an error code.

HV_MON: High Voltage Power Supply Monitoring

This A/D input is 200mV±40mV when the

system is in the idle mode. The resolution is
20mV/V or 20mV for every volt on the +DC
& -DC terminals of the High Voltage power
supply. Calibrated for 1V with 50V on the
High Voltage Power Supply.

IMEA: Current Measure

A ratio of the output current that is applied to

the patient when Cut, Blend, Pinpoint or
Bipolar modes are used. Used in conjunction
with the HV_MON to determine the output
power.

F_MON: Flow Monitor

The current through the flow control valve rep

­resents the flow rate. A flow rate that exceeds
requested flow by more than 2 SLPM will
set an alarm and inhibit both RF Output and
argon flow. This signal is calibrated for 2V
with a flow setting of 4 SLPM.

PW_MEA: Pulse Width Measure

Spray and ABC™ modes only. A DC average of

the RF Drive pulse width to the single ended
amplifier. In ABC™, the voltage increases as
the power increases if a load is connected to

the ABC™ output. In Spray, the voltage is
constant for all dial settings.

FB_MON: Full Bridge Monitoring

Cut, Blend, Pinpoint and Bipolar modes only.

A DC average of the full bridge RF Drive.
With Cut activated, FB_MON is approxi

­mately 2.85V and for each blend, the voltage
is about 225mV less than the previous blend
or cut mode.

10V Reference:

The 10V reference is monitored and must be

4.46V±.2V.

15V Supply:

The system 15V for control circuits is moni

­tored. This voltage is used for op amps,
relays and flow control valves. This voltage

-

must be 3.72V±.5V.

6.2.12 EEPROM & Driver [U37, U27]

The EEPROM (U37) is used to store user set

­tings and these settings are recalled when the unit
is first powered on or if a 5 second brown out
occurs. On power-up, power settings will be the
last settings for the default modes. Included in
the EEPROM are the calibration limits for ABC™
and SPRAY PW_MEA settings. A failure detected
with the EEPROM during system initialization
will default all power settings to “0”. A failure
detected with the PW_MEA stored data will
inhibit the system from being used until the prob

-

lem is corrected.

U27 is a parallel-to-serial interface device.
The EEPROM is loaded serially, however the
PCF8584 allows the control microcontroller to
load the serial data from the parallel data bus.

6.2.13 D/A Converter [U12]

The D/A converter is used to control the follow

-

ing:

•High Voltage (V

•Output Power (P

•Maximum voltage at each dial setting (I

CON)

CON)

LIM)

for Cut, Blend, Pinpoint, & Bipolar Modes

•Argon Flow Rate (V

GAS).

Each of these signals should be zero volts in the
idle mode and increase as the power or flow
increases. The voltages listed below are the maxi­mum limits at full power settings.

6-4

VCON = 9V when HVDC is 200V (0V-9V)

PCON = 8.8V at full dial cut (0V - 8.8V)

ILIM = 3.8V at full dial cut (0V - 3.8V)

VGAS = 6.2V at 10 SLPM (.15v to 6.2V)

6.2.14 Keyboard Scanner [U5]

The 74C922 allows a 4X4 matrix keyboard to
be connected. When a Front Panel switch is
pressed, the location of the switch is latched into
the device and the signal KB_DA (keyboard data
available) is

SET. Only one switch press is stored

and gets cleared after the device is read.

6.2.15 5V Monitoring [U29]

U29 is a microcontroller supervisory device that
automatically sets the “RST” when the 5V sup

­ply is less than 4.5V. A short interruption of the
mains power will cause a system reset to occur.
On the input of U29 (pin 1) is a comparator
(U35) that will cause a reset to occur if the 5V
exceeds 5.7V. The pin “RST” is active high and
“/RST” is active low.

6.2.16 Output PIA [U21]

Dedicated output PIA for the control
microcontroller to latch control logic to system
functions. This device has three (3) output ports
and each will be described briefly.

PORT A: CON_D0 - CON_D7

Dedicated for mode identification to the Power
Control Assembly. When a mode activation
occurs, the controller latches a Hex count into this
register and the magnitude of the count identi

­fies to the RF Logic FPGA which mode is being
requested.

Cut: 39h Blend 1: 37h Blend 2: 35h

Blend 3: 33h Blend 4: 31h Blend 5: 29h

Blend 6: 27h Blend 7: 25h Blend 8: 23h

Blend 9: 21h Bipolar: 6Fh PPT: 43h

Spray: 82h ABC™: C3h

PORT B: OUTPUT RELAY SELECT

These outputs connect to a relay driver (U23)
on this PCB Assembly. Upon an activation, hex
counts are latched into this register for relay clo
sure dependent on mode and method of RF acti

-

-

vation.

Handcontrol 1 - Cut or PPT. Coag 31h

Handcontrol 1 - Spray Coag

Handcontrol 2 - Cut or PPT. Coag

Handcontrol 2 - Spray Coag

Argon Beam Coagulation

Bipolar A0h

Footcontrol - Cut or PPT. Coag

Footcontrol - Spray

51h

32h

52h

08h

34h

54h

PORT C: CIRCUIT ENABLES

The following signals are

SET during activation as

shown:

PSRQT: Power Supply Request

Enables the high voltage power supply circuit -

Enabled for all mode activations.

PC_EN: Power Control Enable

Enables the Power Control Circuit to inter

­face with the HV Control Circuit for Power
Control when Cut, Blend, Bipolar or Pinpoint
modes are activated.

LVT_EN: Low Voltage Triac Enable

Enables the low voltage triac (125V) when Cut,

Blend or Bipolar are activated.

HVT_EN: High Voltage Triac Enable

Enables the high voltage triac (185V) when

Pinpoint, Spray, or ABC™ are activated.

AR_EN: Argon Enable

Enables the flow control circuit when ABC™ is

activated.

6.2.17 T_MON [U35]

The monitor microcontroller verifies that for every
activation of RF Output, a tone is generated.
T_MON is a signal with the same frequency as
the tone generated.

6.3 Power Control Assembly [A4]

This assembly controls output power of all modes
and has the driver logic for both RF Amplifiers.
It is important to remember that this system has
two separate RF Amplifiers and each amplifier
operates in a different manner. The amplifier
against the back wall is called Full Bridge (FB)
and is used for Cut, Pinpoint, Blend, and Bipolar
Modes. The other amplifier is against the side
wall and is only activated for Spray and ABC™
modes. This discussion will focus on each ampli
fier independently.

-

6-5

6.3.1 Power Control - Full Bridge Amplifier

Output power in the Full Bridge modes is con

­trolled by monitoring the output voltage and
current, multiplying the two together and the
product of the operation is power. The measured
power is then compared to the requested power
and if the power is greater than requested power,
the power control circuit reduces the HVDC. If
the power is less than the requested power, then
the power control circuit increases the HVDC.

The power control loop encompasses several
assemblies, however we will only focus on the cir

­cuits of the Power Control Assembly. For this dis
cussion, it is important to refer to the schematic
(Figure C-6). The RF Output can be constant
current, power regulated or a fixed output voltage,
all depending on the RF load.

The inputs labeled V

SN (voltage sense) and ISN

(current sense) are ratios of the RF output voltage
and current that is delivered to the patient. U1 &
U3 are RMS-to-DC converters that convert both
signals to a DC level so they can be monitored
and controlled. The DC level is then connected
to the input of a unity gain amplifier (U2). U2
is used to control both voltage and current lim

­its outside of the load regulation range. For the
time, we will focus on the simpler aspect of this
circuit, and cover the limits later in the discussion.

Power regulation can be seen on the load curves
that are within this manual. (See Figure 5.1.10,
Pure Load Curves) Using Pure Cut as our mode
for discussion, the output power is regulated
between 300 ohms to 1K ohms. When the RF
load is between 300 ohms and 1K ohms, the
outputs of the amplifiers connected to U1 & U3
are negative, or the diodes D4 & D3 are reverse
biased. The DC value of the RMS-to-DC con
verters is passed around the amplifier to the cath

-

­odes of D4 & D3, where they are buffered by the
unity gain amplifiers, U2.

U12 is a multiplier that multiplies the mea­sured voltage (V

SN) and measured current (ISN)

together for a product term called POWER
(P=VI). On the output of U12 is an amplifier
(U10) with a potentiometer (RA5) in the feed

­back. This potentiometer is used to calibrate the
gain of the loop and it is this potentiometer that is
adjusted for Pure Cut calibration. The output of
the amplifier (U10) is called measured power and
the measured power is compared to the requested
power P

CON at V10D. The difference of the

two is called P

ERR (Power Error), a signal that

can increase or decrease the HVDC for power
control. When the signal is positive, the HVDC
is reduced and when negative, the HVDC is
increased.

Digressing back to the outputs of the RMS-to­DC converters for a moment, the DC value of the
output voltage and current are both connected to
the inverting input of the unity gain amplifiers.
As long as the load is within the defined limits
for power regulation (300 ohms - 1K ohms), the
measured value will exceed the reference level or

-

the level on the non-inverting inputs. The output
of the amplifier is then negative, reverse biasing
D3 & D4 diodes, and the output of the RMS-DC
converters is passed through the 2.7 ohm resis

-

tors.

The signal called I
When the output current is less than this refer
ence, the I

LIM value is used as the multiplier with

the measured voltage. I

LIM is actually a reference.

-

LIM is dependent on the

dial setting, however for each dial setting it is
fixed and becomes a fictitious representation for
the output current. I

LIM is multiplied against the

measured voltage and the product is compared to
the requested power. With a fixed current being
compared to a fixed power setting, the result is a
fixed voltage on the RF output. For loads that
are greater than the loads for power regulation
(R>1K ohms in cut), the RF output voltage is
fixed (V=P/I).

On U2-3 (V

LIM) is a reference voltage that is

really a fictitious value for the output voltage. For
heavy loads (R<300 ohms in Cut), the output
voltage is less than this reference so the value is
multiplied against the measured output current.
The product of the two is then compared to the
requested power. With a fixed voltage (reference)
and a fixed power setting, the output current is
fixed (I=P/V). The resistance for power regula

­tion drops with power setting, meaning at full
power the load is 300 ohms but at 100 watts, the
load is 100 ohms.

Calibration of the Power Control circuit is set in
Pure Cut initially by adjusting RA5. This poten

­tiometer calibrates the loop gain for accurate
power monitoring and control. Blend modes are
a direct function of Pure Cut and do not need to
be calibrated, however Bipolar and Pinpoint do
require calibration. Bipolar is calibrated by adjust

-

ing RA6 and Pinpoint is calibrated by adjusting

6-6

RA7. The signal labeled PCON (power control) is
driven from the DAC on the Display PCB and is
the control voltage for output power. The range

CON is 0V-9V.

for P

IMEA is a ratio of the output current measured,
scaled from 0V to 4V maximum. I

MEA allows the

monitor microcontroller to monitor the output
current. Too much output current will cause RF
to be inhibited and an error code displayed.

FB_EN is “cleared” by the control microcontroller
anytime that Cut, Blend, Bipolar, or Pinpoint are
activated. This signal enables the power control
circuit when cleared. With FB_EN set, an offset
is placed on the non-inverting input of the differ
ential amplifier, causing P

ERR to be greater than 0

-

volts, which in the event of a failure, would force
the HVDC to be low. P

ERR was covered earlier

but as a reminder, this signal is the difference
between the measured output power and request
ed power. When P

ERR is positive, the HVDC

-

is decreased and when negative the HVDC is
increased.

6.3.2 RF Logic [U7 on the Power Control
Assembly]

U7 is an FPGA, programmable logic device that
is used to develop the RF amplifier drive signals
for all modes. This device will be described with
respect to the I/O only. Listed below is a brief
description of the I/O on U7.

COND0 - COND7 (Control Microcontroller
Inputs)

The hex count on these inputs select which

RF amplifier will be driven and sets the
right drive signals for the mode. The eight
signals are latched into U7 when an activa

­tion request is made. (See display panel
description for hex values as related to modes
requested.)

RF_CLK (RF Clock - input)

A 1MHz clock for RF drive timing. Runs con

-

tinuously.

RF_INH (RF inhibit - input from monitor
microcontroller)

When CLEARED (low), RF is inhibited.

CLEARED when no activation is requested or
if a failure is detected.

FB_EN (Full Bridge Enable - input from control
microcontroller)

CLEARED when Cut, Blend, Pinpoint or

Bipolar modes are requested. A

CLEARED is

required to enable output power control.

OV_TST (Over voltage test - input from control
microcontroller)

A test pin used only to test the ABC™ Over

Voltage circuit during system initialization by
a series of pulses that simulate an ABC™ over
voltage condition. After the test is conducted,
the signal is latched low.

A/T (Active/Target - output to control
microcontroller)

ABC™ mode only - A high occurs when ABC™

is in the ACTIVE mode; a low occurs when
ABC™ is in the TARGET Mode. For tone
control only as the two modes have distinctive
tones.

BM>80 (Beam greater than 80W - from control
microcontroller)

SET when ABC™ power is greater than 80W.

An internal limit in U7 for switching from
active to target mode.

RFEN: (RF Enable - input from control
microcontroller)

SET to enable RF Drive to the amplifiers.

RST: (Reset - from system reset signal)

A SET causes internal latches to CLEAR.

CT_PCON: (Cut Power Control voltage select)

SET when Cut or Blend modes are activated .

Switches Pcon for Cut.

CG_PCON: (Coag Power Control voltage select)

SET when Pinpoint is activated. Switches Pcon

for Pinpoint.

BP_P

CON: (Bipolar Power Control voltage select)

SET when Bipolar is activated. Switches Pcon

for Bipolar.

SE_PCON: (PCON for Spray & ABC™ active
select)

SET for Spray or ABC™ active only. Switches in

Pcon for Spray and ABC™ active.

BM_BST: (ABC™ Booster voltage control level)

SET to enable Boost Pcon.

BM_TAR: (ABC™ Target voltage control level)

SET to enable Target Pcon.

6-7

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SP_PCON: (Scaler to calibrate Spray power)

SET for Spray activation to rescale SE_Pcon for

Spray calibration and control.

T_RLY:

Tank Relay selects either the Spray or ABC™

transformer primary. set when Spray is acti
vated.

XSLO:

Transformer Sense input must be low. If the

harness from the Handsense PCB to the
Power Control PCB is not connected or bro­ken, this signal is pulled up and will inhibit
single ended operation.

A_SNS:

Arc Sense - A pulsed signal that pulses high any

time the ABC™ output exceeds a reference
level. Four or more pulses indicates an open
circuit on ABC™ and less than four pulses
indicates the ABC™ output is loaded.

ABC_OV: ABC™ Over Voltage

Pulses if the ABC™ output exceeds 3500 Vpk

and 192 consecutive pulses will cause ABC™
to be inhibited. If a failure occurs that
latches ABC™ in the Active Mode, this signal
will inhibit RF at power levels greater than
approximately 45W.

SE_EN: Single Ended drive control.

When this signal goes low, it allows C10 to start

charging up and RF drive to the Single Ended
Amplifier occurs.

SE_PW: Single Ended Pulse Width -

RF drive to the Single Ended Amplifier starts

when SE_EN goes low and stays on until this
signal transitions high. When this signal tran
sitions high, RF drive is terminated for one
cycle.

FB1 & FB2 DRV: (Full Bridge drive)

RF drive for the Full Bridge Amplifier. The full

bridge amplifier requires two drive signals
that are 180° out of phase with each other.
The rate is 461KHz and the duty cycle of the
signal varies with the mode requested. These
signals are active in Cut, Blend, Bipolar, and
Pinpoint.

FB1 & FB2 RST: (Full Bridge Drive Reset)

Reset signals for the amplifier drive transformers

6-8

on the full bridge amplifier. The FB1 RST
follows the FB1 DRV and has pulse duration

of about 200nS. FB2 RST follows FB2 DRV
and has a pulse duration of about 200nS.

SE_DRV: (Single Ended Drive)

RF drive for the single ended amplifier. This

signal is active when Spray and ABC™ modes

-

are active.

-

Figure 6.1 RF Drive Signals

6.3.3 Power Control - I/O Signals

The following signals are in addition to those
described for U7.

PW_MEA: Pulse Width Measured

An average DC voltage of the Spray and ABC™

drive cycles. The Monitor microcontroller
verifies that the measured pulse width is cor

-

rect for the power setting.

FB_MON: Full Bridge Monitor

An average DC voltage of the Full Bridge

Amplifier drive to allow the monitor
microcontroller a means of verifying the duty
cycle of the RF drive.

IMEA: Current Measured

The monitor microcontroller verifies that the

-

output current is within limits.

6.3.4 ABC™ Arc Sense

ABC™ has two modes - Active and Target. The
active mode is enabled when a load is sensed and
only in the active mode will the power control dial
have any effect on the output voltage or power.
When a load is not present, the target mode is
enabled where the RF Output voltage is fixed and
the repetition rate increased. The Target mode
also has two modes - Target Pulses and Booster
Pulses.

The ABC™ mode is quite similar to Spray in the
sense that the output is a damped sinusoidal wave

­form. The waveform is heavily damped when a
heavy load is on the output and lightly damped

with a light load. The degree of dampening is
used to determine if a load is present or not.

Refer to Figure C-6 and locate the input labeled
+ASEN. This signal is a ratio of the primary
current on the ABC™ output transformer. ASEN
is compared to a reference voltage at U15-3 and
each peak of the damped waveform that exceeds
this reference level will cause the output of U15
to switch high at the same frequency as the output
(570KHz). If the output of U15 has four pulses
for one cycle (1 cycle is 35uS active/60uS target),
the logic within U7 assumes a load is not pres

­ent and the system remains in the Target mode.
However, if less than four pulses are detected for
one cycle, the logic within U7 assumes a load is
present and switches to the active mode.

Staying with the signal ASEN, it is also connected
to a comparator (U16). This comparator is
used for ABC™ over-voltage detection. Without
going into significant detail, if the output of U16
pulses 192 consecutive cycles, the logic within U7
assumes the system has locked up in the active
mode and the RF is inhibited. Note that the
inverting input of this comparator has a potenti

­ometer (RA9). This potentiometer allows calibra
tion of the over voltage limit, and should ABC™
fail to initiate, it may be necessary to refer to the
calibration section for this adjustment.

The target and booster pulses are a means of lim

­iting RF leakage by controlling both the output
voltage and repetition rate when the output is not
loaded. Both modes are fixed outputs, meaning
the power setting has no influence on the output
voltage. The resistor ladder (R24, RA4, R17,
& R19) sets the limits for both the target and
booster modes. Target has 1032 pulses with a
peak voltage of approximately 1800Vpk, and then
the booster is switched in. The booster mode has
32 pulses with a peak voltage of 6000Vpk and
these pulses are used to ionize the argon gas to
assist with initiation. When a load is not detected
during the booster pulses, then the target/booster
cycle is repeated until a load is sensed. The volt

­age level of each mode is selected by U4 with
BM_TAR for target and BM_BST for booster.
These two signals should toggle on and off when
ABC™ is activated without a load on the output.

When a load is sensed, SE_P

CON is set and now

the power setting determines the pulse width and
the logic reduces the repetition rate from 60uS to
35uS. Output power is controlled by pulse width

and the pulse width controller is U5 and Q2. For
the start of each cycle of ABC™, Q2 is turned off
and this allows C10 to charge linearly. When the
charge of C10 exceeds the P

CON voltage on U5-3,

the output of U5 switches high and terminates the
pulse time.

Now is a good time to bring up Spray. Spray
Coagulation and ABC™ are quite similar, only
Spray is lower power and does not have the target
modes. The output power in spray is controlled
by HVDC, and the pulse width in spray is fixed
at about 1.3uS. Calibration of Spray is performed
by adjusting RA3, which simply scales P
down for a pulse width that will correct the out

CON

-

put power to match the dial setting.

6.4 High Voltage Power Supply [A7]

The High Voltage Power Supply (HVPS) pro­vides variable regulated DC voltage and current
to the RF amplifiers which converts this energy
into high frequency surgical current. The HVPS
is contained on two separate circuit board assem
blies.

The High Voltage output assembly contains the

-

power devices and capacitive filters which provide
the high voltage output. The HV/Flow Control
assembly generates the control signals required
to regulate the high voltage output and performs
other high voltage related tasks. This section will
be specific to the high voltage assembly and the
control circuit for the high voltage will follow.

6.4.1 Power Supply Topology

The HVPS is a phase controlled type power sup
ply. With this topology, output voltage is con
trolled by varying the phase angle at which the
AC mains sinusoidal waveform is permitted to
conduct. Typically, a triac or SCR in series with
the incoming AC line is off during the rise of the
mains sinusoidal waveform. Following the peak
of the waveform, a trigger is asserted at the gate
allowing the triac or SCR to turn on and the
line voltage present at the triggered phase angle
is available to charge filter capacitors commonly
used with these topologies. The phase angle trig
gering sequence occurs for each subsequent half
cycle of the sinusoidal waveform.

6.4.2 Phase Control Output

Referring to the High Voltage Output schematic
(Figure C-12), the line isolated AC voltage enters
the printed circuit assembly at J1-1 (AC Hi), J1-3

-

-

-

-

6-9

(AC Lo), and J1-4 (AC Com). We should note
that these AC signals are isolated from AC Mains
by means of an isolation transformer located in
the generator assembly. The AC signals are trans
former taps with AC Lo rated for 125V and AC
Hi rated for 185V with a nominal voltage input.

Referring once again to the schematic, Q3 & Q7
are triacs that are triggered by opto couplers U1
or U4 when the HVPS is enabled. Q3 is selected
when Spray, Pinpoint or ABC™ modes are acti
vated and Q7 is selected for Pure Cut, Blend, and
Bipolar modes. The resistor and capacitor that
are connected from MT2 & MT1 are snubbers for
switching energy and the remaining discrete com
ponents contribute to the generation of the trigger
pulse. The trigger pulse from the opto couplers
(U1 & U4) occurs at phase angles of approxi
mately 80° to 170° of the AC waveform.

Following the triacs are two separate bridge recti
fiers (B1 & B2). The rectified signal from the
bridges is then filtered by C13 & C14 which
results in a DC voltage. Resistor R18 is a bleed
resistor that will dissipate the energy from the
filter capacitors. The schematic shows two test
points (TP1 & TP2) that are labeled +HV and

-HV. The voltage on these two test points is the
regulated DC and is referred to as HVDC.

Connecting an oscilloscope to the +HV and -HV
test points would show a voltage with 120 Hz
ripple, and the magnitude of the ripple depends
on the load. A heavy load on the output means a
high ripple rate on the HVDC test points. These
test points have easy access and are a good place
to connect a DVM when troubleshooting a system
that does not have any RF Output. A system
failure detected by the monitor microcontroller
and some hardware circuits will typically inhibit
the HVDC as a means of shutting down the RF
output.

The high voltage triacs (U1 & U4) of this assem
bly are only enabled when the system is activated
for RF output, otherwise the voltage at TP1 &
TP2 is an idle voltage of 10V. Referring on the
schematic to TP1, a 33 ohm resistor and a fuse are
shown in series with a
sistor is switched on following each RF deactiva
tion to dump the charge from the filter capacitors
(C13 & C14) and bring the HVDC back to, or
near, idle voltage.

The fuse would be the weak link of this power
supply. Each time an activation request is termi

MOSFET, Q8. This tran-

-

-

-

-

-

-

-

-

nated, the voltage on HVDC is dumped through
this fuse. If the fuse opens up, then the only
means of discharging the HVDC is through the
bleed resistor R18.

6.4.3 HVPS Isolation Components

Digressing momentarily, this assembly has three
optically isolated triac drivers, one opto coupler,
and two isolation “sense” transformers. These
components isolate the High Voltage Output cir
cuit from the High Voltage Control circuit. The
System 7500™ has two intermediate circuits that
are both isolated from ground (chassis ground)
and both are also isolated from each other. When
using a voltmeter or oscilloscope on these cir
cuits, it is imperative that the ground reference be
connected to “-HV” of this circuit or the signal
ground of the control or low voltage circuit. The
signal grounds of the control circuit are not com
mon to the -HV ground of this circuit.

The triacs are fired when the cathode of the triac
drivers are pulled to signal ground. The diode of
these drivers is common with, and controlled by,
the HV Control circuit. A short pulse of current
through the diode of the triac driver switches on
the gate of the triac at a phase angle that is greater
than 80°. The triac will remain on until the AC
signal is at approximately zero volts.

The optocoupler (U5) is controlled by the HV
Control Circuit and it switches on Q8 when the
cathode of the diode is pulled low. When U5 is
energized, the emitter goes high which switches
on Q9; switches off Q10; allowing approximately
14V to switch on the gate of Q8. Pulling the
cathode of U5 back high switches off U5, allow
ing Q9 to be switched off and Q10 to pull the
charge from the gate of Q8 and switch it off.
Following each RF activation (system is unkeyed),
Q8 is switched on for approximately 100mS to
allow R33 to dissipate the energy stored in the
filter capacitors.

The two sense transformers (T1 & T2) transfer a
proportional ratio of the HVDC across the isola
tion barrier to the HV Control circuit. T1 pro
vides what is called the HV sense for control and
T2 provides the HV sense for monitoring. Both
circuits and transformers are the same and the
ratio of voltage transferred is the same. The pur
pose for the monitoring circuit is a means of veri
fying the controlling circuit is operating properly.

-

-

-

-

-

-

-

-

6-10

6.4.4 HVPS Low Voltage Components

The NPN transistor, Q6, provides the supply
voltage for the low voltage components on this
assembly. The voltage source for Q6 is the AC
LO, where R26 limits the current and the zener
diode (12V) sets the voltage on the cathode of
D6 at about 10V. This 10V is used to provide
the supply voltage to U3 & U2 of this assembly.
The monitoring circuit will test for this 10V, and
should a failure occur where this voltage is too
high or too low, the system activation will be ter

-

minated.

The sense transformers are driven at about 40
KHz by U3 & U2 with the outputs Q and /Q
out of phase by 180°. The sense transformers are
set up for a center tapped push-pull drive signal.
When the top transistors (Q1 & Q5) are ON,
they pull current from the center tap to ground
which produces a signal on the secondary. The
top transistors then switch OFF and the lower
transistors (Q4 & Q2) switch ON, reversing the
current through the primary and reversing the
polarity on the output.

6.5 HV/Flow Control Assembly [A1]

The HV/FLOW Control assembly provides two
unrelated unit functions. High Voltage Power
Supply (HVPS) control and Argon Flow manage
ment circuits are both on this assembly. The sche
matics (Figures C-4a and C-4b) for this assembly
are on two pages with the high voltage control
schematic and the argon flow control schematic
on separate sheets for clarity.

Figure 6.2 Line Sync/RAM

The HVPS that is controlled by this circuit has a
variable DC voltage (HVDC) that is dependent
on the dial setting and the load. Power regulation
of the System 7500™ is accomplished by control
ling the HVDC where each power setting results

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in a specific DC voltage at light loads (R

L>1K

ohms), and then the DC voltage will be reduced
for heavier loads (R

L<1K ohms) for power regu-

lation. The HVPS & HV Control circuit make
up a control loop, and a control circuit loop by
nature feeds on itself such that one action in the
loop results in another action, which results in
another action, etc.

6.5.1 Line Synchronization Circuit

For this section, refer to Figure C-4a. The high
voltage power supply (HVPS) is phase controlled
and must be synchronized with the AC line volt

­age. The synchronization is accomplished by the
zero crossing detector (U5-7) that is driven by
F_LN (J3-13), a replica of the AC Line Voltage
which comes from the low voltage line transform

­er secondary. The sine wave of F_LN is converted
to a square wave at U5-7 and this results in a
50µS pulse at U10-4.

The lower trace of Figure 6.2 shows the 50µS
trigger pulse that is synchronized with zero cross
ing. The upper trace represents a ramping wave

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­form that is ultimately used to initiate the HVPS
triac trigger. The generation of the “cyclic ramp”
waveform is accomplished with a circuit loop.
The components of the loop will be covered in the

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next few paragraphs.

To provide a simple description of this circuit, we
will start at the voltage divider with the switch, S1
(RA7, R66, R67, & R68). The switch (S1) is set
for either 50Hz or 60Hz operation. To the right
of S1 is a precision clamp (U7B & U7C) with
diodes on the outputs. The outputs of the preci

­sion clamps, if viewed with an oscilloscope, are a
square wave with a rate of “Line Frequency x 2”
or 120Hz when the line frequency is 60 Hz.

A precision clamp will control the anode of the
output diode to the lowest voltage on the two
inputs. With 0V on the inverting (-) input, the
anode of the output diode will be 0V and when
the inverting input switches high (5V), then the
anodes of the output diodes have the same voltage
as S1-C (3V @ 60 Hz or 2.5V @ 50 Hz).

Following the precision clamp is a differential
amplifier (U7A) with a gain of .9 on the non­inverting input (U7-3), and unity gain on the
inverting input (U7-2). The differential amplifier
controls the direction of charge on the RAMP so
that when the output of the differential amplifier
is positive (3.2V), the RAMP discharges or ramps

6-11