Compal LA-B291P ZAWBA, B50-45, LA-B291P ZAWBB Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

ZAWBA/ZAWBB DIS M/B Schematics Document

AMD Beema SOC with DDR3L

AMD Jet LE

2014-03-03

3 3

LA-B291P

：：：：

REV

4 4

A

B

C

1.0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/03/03 2015/03/03

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-B291P

E

1 46Monday, March 03, 2014

of

1.0

A

B

C

D

E

VRAM 1G/2G 2

1 1

56M16 x 4 (2G)

128M16 x 4 (1G)

AMD Jet LE

VRAM 1GB/2GB DDR3L x4

DDR3L

AMD Beema

G

en2PCIe x 4

GFX

Memory BUS(DDR3L)

Single Channel

1.35V DDRIIIL 1600MHz

204pin DDR3L SO-DIMM X2

BANK 0, 1, 2

eDP Conn.

HDMI Conn.

CRT Conn.

2 2

GPP0

Card Reader Realtek

RTS5229

NGFF (WLAN/BT)

LAN 10/100/1G Realtek

8111G/8106E

GPP1GPP2

Transformer RJ45

SPI ROM (8MB)

Nuvoton

3 3

NPCE288NB0DX

Touch PadInt.KBD

Thermal Sensor

DP0

D

DAC

GPP

SPI

LPC

CMOS

USB

Camera

Port 3

USB2.0

P1

AMD FT3b APU

MB

BGA 769-balls

3.0 Conn. LP1

USB

WLAN/BT Combo

Port 5

Port 8 Port 9

MB

3.0 Conn. LP2

Port 0

Port 1

Touch screen

(reserved)

Port 1

Finger Print

Conn.

In IO/B

Port 0

Port 7

USB3.0

HDA

HD Audio

SATA

Right USB 2.0

Gen3

Port 0

HDD Conn.

Port 1

ODD Conn.

Audio Realtek

ALC233VB

Int. Speaker Conn.Int. MIC Audio Combo Jacks

In IO/B

15" Sub-borad

14"

Sub-borad

IO/B

USB2.0 x 1 Combo Jack Novo button

4 4

LED/B

4" Power/B

1

A

IO/B

USB2.0 x 1 Combo Jack Novo button

LED/B

ODD/B

Battery/B

15" Power/B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2014/03/03 2015/03/03

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

LA-B291P

2 46Monday, March 03, 2014

E

1.0

A

Voltage Rails

Power Plane Description

VIN

B+

+APU_CORE

+APU_CORE_NB ON OFF OFFVoltage for On-die VGA of APU

+VGA_CORE OFFOFFON0.95-1.2V switched power rail

1 1

+VDDCI OFF0.95-1.2V switched power rail ON OFF

+3VALW

+3VS

+1.8VALW

+1.8VS

+0.95VALW

+0.95VS

+1.35V

+3VGS

+1.8VGS

+1.35VGS

+0.95VGS

+5VALW

+5VS

2 2

+RTC_APU

+0.675VS ON OFFOFF

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for APU

3.3V always on power rail

3.3V switched power rail

1.8V always on power rail

1.8V switched power rail

0.95V always on power rail

0.95V switched power rail

1.35V power rail for APU and DDR

1.5V switched power rail

3.3V switched power rail for VGA

1.8V switched power rail for VGA

1.35V switched power rail for VGA

0.95V switched power rail for VGA

5V always on power rail

5V switched power rail

RTC power

0.675V switched power rail for DDR terminator

SMBUS Control Table

SOURCE

SMB_EC_CK1 SMB_EC_DA1

APU_SCLK0 APU_SDATA0

SMB_EC_CK2

3 3

SMB_EC_DA2

288N

+3VALW

APU

+3VS

288N

+3VS

VGA BATT KB9012 SODIMM

X V

+3VALW

V V

+3VS +3VS

X X

X

X X

VX

+3VS +3VS

X X

EC SM Bus1 address EC SM Bus2 address

Device Address

Smart Battery

0001 011X b

HEX

Device Address HEX

16H

Thermal Sen sor

SB-TSI (APU)

VGA Internal Thermal

1001 101X b

1001 100X b

1000 001X b

APU SM Bus address

4 4

Device Address

DDR DIMM1

DDR DIMM2

1010 000Xb

1010 001Xb

HEX

A0H

A2H

A

B

S0 S3 S5

ON ON ON

ON OFF

ON OFF OFF

ON ON*ON

ON OFF OFF

ON OFFON

ON

ON OFF OFF

ON

WLAN WWAN

ONONON

OFF

ONON OFF

OFFON OFF+1.5VS

OFF

OFF OFF

OFF

ON

OFF

OFFON

ONONON

Thermal Sensor

X

V

9AH

98H

82H

B

C

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision MP PVT DVT EVT

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

FCH

XX

100K +/- 5%R1562

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

APU RTD2132

X

+3VS

R1564 V min

AD_BID

0

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

X X

V

X

0 V

USB Port Table

USB 2.0 USB 3.0

XHCI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF) LOW

V typ

AD_BID

V

AD_BID

max

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

APU PCIE PORT LIST

DevicePort

0 1 2 3

0 1

2014/03/03 2015/03/03

Card Reader LAN WLAN

Port

0 1 2 3 4 5 6 7 8 9

Compal Secret Data

3 External USB Port

Touch Screen

RIGHT USB

Camera

WLAN/BT Combo

Finger Print LEFT USB3.0 LEFT USB3.0

Deciphered Date

D

SIGNAL

USB OC MAPPING

0 1 2 3

BOM Structure Table

BOM Structure BTO Item

45@ 14@ 15@ B5@ B4@ B3@ B2@ B1@ UMA@ PX@ JET@ TOPAZ@ CMOS@ HDMI@ 8106ELDO@ 8106ESW@ 8111GLDO@ 8111GSW@ TS@ ZODD@ NOZODD@ CHG@ NOCHG@ FHD@ DR@ SR@ USB2@ USB3@ 233VB@ ME@ EMIP@ EMIU@ ESDP@ ESDU@ GIGAEMIP@ @

D

E

SLP_S3# SLP_S5# +VALW +V +VS Clock

ON

OFF

ON ON

ON

OFF

HIGH HIGH

HIGHHIGH

HIGH

LOW

HIGH

LOW

ON

USB PortOC#

USB20 port0

USB20 port1,2,8,9

for HDMI Logo

for 14" componect

for 15" componect

15W 2.4GHz BGA APU

15W 1.8GHz BGA APU

15W 1.5GHz BGA APU

10W 1.5GHz BGA APU

10W 1.35GHz BGA APU

UMA part

Common VGA circuit

Jet LE GPU

Topaz XT GPU

CMOS Camera part

HDMI part

Realtek RTL8106E with LDO mode

Realtek RTL8106E with SWR mode

Realtek RTL8111G with LDO mode

Realtek RTL8111G with SWR mode

Touch Screen

Zero Power ODD part

Non-Zero Power ODD part

USB Charger function

Non-USB Charger function

Full HD Panel

VRAM Dual Rank

VRAM Single Rank

USB 2.0

USB 3.0

Realtek ALC233-VB Audio IC

ME part

EMI pop component

EMI Un pop component

ESD pop component

ESD Un pop component

EMI Un pop for LAN GIGA function

Unpop

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

USB30 port0,1

NOTES LIST

LA-B291P

E

3 46Monday, March 03, 2014

LOW

OFF

1.0

5

4

3

2

1

Jet LE VRAM STRAP

Vendor

UV5, UV6, UV7, UV8

Hynix 2048Mbits

ZZZ09

1GBytes

D D

1GBytes

2GBytes

1GBytes

C C

SA00006H400 128Mx16 H5TC2G63FFR-11C

JH1G@

ZZZ10 JM1G@

ZZZ11 JS1G@

ZZZ12 JH2G@

ZZZ13 JS2G@

ZZZ14 JM2G@

ZZZ08 J

ZZZ16 JM1G2@

Micron 2048Mbits SA000067500 128Mx16 MT41J128M16JT-093G:K

Samsung 2048Mbits SA000068U40 128Mx16 K4W2G1646Q-BC1A

Hynix 4096Mbits SA00006E800 256Mx16 H5TC4G63AFR-11C

Samsung 4096Mbits SA000076P00 256Mx16 K4W4G1646D-BC1A

Micron 4096Mbits SA000077K00 256Mx16 MT41J256M16HA-093G:E

Micron 4096Mbits SA000065D00 256Mx16 MT41K256M16HA-107G:E

M2G2@

Micron 2048Mbits SA00005XB00 128Mx16 MT41K128M16JT-107G:K

ZZZ

ID

0 0

0

1

2

0 1 1

3

4

5 11 0 3.24K 5.62K

1

6

7

ZZZ

PS_3[ 1 ]PS_3[ 2 ]PS_3[ 3 ]

0

10 0

00 1

001 4.99K4.53K

1 0

1 11

X76@X76@

R_pu R_pd

RV21 RV24

NC 4.75K

8.45K 2K

4.53K 2K

6.98K 4.99K

3.4K 10K

4.75K N C

Power-Up/Down Sequence

"Jet" has the following requirements with regards to power-supply sequencing to avoid damaging the ASIC:

All the ASIC supplies must reach their respective nominal voltages within 20ms

‧

of the start of the ramp-up sequence, though a shorter ramp-up duration is preferred. The maximum slew rate on all rails is 50 mV/µs.

It is recommended that the 3.3-V rail ramp up frist.

‧

It is recommended that the 0.95-V rail reach at least 90% of its nominal value no later

‧

than 2ms from the start of VDDC ramping up.

The power rails that are shared with other components on the system should be gated for

‧

the dGPU so that when dGPU is powered down (for example AMD PowerXpressTM idle state), all the power rails are removed from the dGPU. The gate circuits must meet the slew rate requirement (such as ≦ 50mV/us)

‧

VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC

should reach 90% before VDD_CT starts to ramp up (or vice versa).

For power down, reversing the ramp-up sequence is recommended.

‧

VDDR3(+3VGS)

PCIE_VDDC(+0.95VGS)

VDDR1(+1.35VGS)

JH1G@

1G HYNIX

X7653638L07

JM1G@

1G MICRON

X7653638L08

JS1G@

1G SAMSUNG

X7653638L09

JH2G@

2G HYNIX

X7653638L04

VDDC/VDDCI(+VGA_CORE)

VDD_CT(+1.8VGS)

PERSTb

REFCLK

Straps Reset

Straps Valid

B B

Global ASIC Reset

T4+16clock

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2014/03/03 2015/03/03

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

VGA Notes List

LA-B291P

1

4 46Monday, March 03, 2014

1.0

A

DDRAB_SMA[15..0]<10,9>

1 1

DDRAB_SBS0#<10,9> DDRAB_SBS1#<10,9> DDRAB_SBS2#<10,9>

DDRAB_SDM[7..0]<10,9>

DDRAB_SDQS0<10,9> DDRAB_SDQS0#<10,9> DDRAB_SDQS1<10,9> DDRAB_SDQS1#<10,9> DDRAB_SDQS2<10,9> DDRAB_SDQS2#<10,9> DDRAB_SDQS3<10,9> DDRAB_SDQS3#<10,9> DDRAB_SDQS4<10,9> DDRAB_SDQS4#<10,9> DDRAB_SDQS5<10,9> DDRAB_SDQS5#<10,9> DDRAB_SDQS6<10,9> DDRAB_SDQS6#<10,9>

2 2

DDRAB_SDQS7<10,9> DDRAB_SDQS7#<10,9>

DDRA_CLK0<9> DDRA_CLK0#<9> DDRA_CLK1<9> DDRA_CLK1#<9> DDRB_CLK0<10> DDRB_CLK0#<10> DDRB_CLK1<10> DDRB_CLK1#<10>

MEM_MAB_RST#<10,9> MEM_MAB_EVENT#<10,9>

DDRA_CKE0<9> DDRA_CKE1<9> DDRB_CKE0<10> DDRB_CKE1<10>

DDRA_ODT0<9> DDRA_ODT1<9> DDRB_ODT0<10> DDRB_ODT1<10>

DDRA_SCS0#<9> DDRA_SCS1#<9> DDRB_SCS0#<10>

3 3

DDRB_SCS1#<10>

DDRAB_SRAS#<10,9> DDRAB_SCAS#<10,9> DDRAB_SWE#<10,9>

+MEM_VREF

DAX

14@

LAB291P

DA60014S000

MEM_MAB_EVENT#

+VREF_DQ_APU

DAX

LAB291P

DA60014S100

DDRAB_SMA0 DDRAB_SMA1 DDRAB_SMA2 DDRAB_SMA3 DDRAB_SMA4 DDRAB_SMA5 DDRAB_SMA6 DDRAB_SMA7 DDRAB_SMA8 DDRAB_SMA9 DDRAB_SMA10 DDRAB_SMA11 DDRAB_SMA12 DDRAB_SMA13 DDRAB_SMA14 DDRAB_SMA15

DDRAB_SDM0 DDRAB_SDM1 DDRAB_SDM2 DDRAB_SDM3 DDRAB_SDM4 DDRAB_SDM5 DDRAB_SDM6 DDRAB_SDM7

15@

AG38

M_ADD0

W35

M_ADD1

W38

M_ADD2

W34

M_ADD3

U38

M_ADD4

U37

M_ADD5

U34

M_ADD6

R35

M_ADD7

R38

M_ADD8

N38

M_ADD9

AG34

M_ADD10

R34

M_ADD11

N37

M_ADD12

AN34

M_ADD13

L38

M_ADD14

L35

M_ADD15

AJ38

M_BANK0

AG35

M_BANK1

N34

M_BANK2

B32

M_DM0

B38

M_DM1

G40

M_DM2

N41

M_DM3

AG40

M_DM4

AN41

M_DM5

AY40

M_DM6

AY34

M_DM7

Y40

M_DM8

B33

M_DQS_H0

A33

M_DQS_L0

B40

M_DQS_H1

A40

M_DQS_L1

H41

M_DQS_H2

H40

M_DQS_L2

P41

M_DQS_H3

P40

M_DQS_L3

AH41

M_DQS_H4

AH40

M_DQS_L4

AP41

M_DQS_H5

AP40

M_DQS_L5

BA40

M_DQS_H6

AY41

M_DQS_L6

AY33

M_DQS_H7

BA34

M_DQS_L7

AA40

M_DQS_H8

Y41

M_DQS_L8

AC35

M_CLK_H0

AC34

M_CLK_L0

AA34

M_CLK_H1

AA32

M_CLK_L1

AE38

M_CLK_H2

AE37

M_CLK_L2

AA37

M_CLK_H3

AA38

M_CLK_L3

G38

M_RESET_L

AE34

M_EVENT_L

L34

M0_CKE0

J38

M0_CKE1

J37

M1_CKE0

J34

M1_CKE1

AN38

M0_ODT0

AU38

M0_ODT1

AN37

M1_ODT0

AR37

M1_ODT1

AJ34

M0_CS_L0

AR38

M0_CS_L1

AL38

M1_CS_L0

AN35

M1_CS_L1

AJ37

M_RAS_L

AL34

M_CAS_L

AL35

M_WE_L

AD40

M_VREF

AC38

M_VREFDQ

UAPU

UAPU A4-6300 ZM181103J4470 1.8G BGA 769P

A4-6300 ZM181103J4470 1.8G BGA 769P

A4@

UAPU

UAPU E2-6200 ZM151103J4470 1.5G BGA 769P

E2-6200 ZM151103J4470 1.5G BGA 769P

E2@

UAPU

UAPU E1-6050 ZM1332M2J2370 1.35G BGA769P

E1-6050 ZM1332M2J2370 1.35G BGA769P

E1@

MEMORY VREF

4 4

+1.35V

RP2

1 8

+MEM_VREF

0.1U_0402_16V7K

0.1U_0402_16V7K C1371

C1371

2

1

ESDP@

2 7 3 6 4 5

1K_0804_8P4R_1%

A

MEM_MAB_EVENT#

1

C337

C337 1U_0402_6.3V6K

1U_0402_6.3V6K

2

MEMORY

FT3 REV 0.51

UAPUA

M_ZVDDIO_MEM_S

1 8 2 7 3 6 4 5

2

C1163

0.1U_0402_16V7K

1

0.1U_0402_16V7K

RP11

10K_0804_8P4R_5%

B

B30

M_DATA0

M_DATA1

M_DATA2

M_DATA3

M_DATA4

M_DATA5

M_DATA6

M_DATA7

M_DATA8

M_DATA9

M_DATA10

M_DATA11

M_DATA12

M_DATA13

M_DATA14

M_DATA15

M_DATA16

M_DATA17

M_DATA18

M_DATA19

M_DATA20

M_DATA21

M_DATA22

M_DATA23

M_DATA24

M_DATA25

M_DATA26

M_DATA27

M_DATA28

M_DATA29

M_DATA30

M_DATA31

M_DATA32

M_DATA33

M_DATA34

M_DATA35

M_DATA36

M_DATA37

M_DATA38

M_DATA39

M_DATA40

M_DATA41

M_DATA42

M_DATA43

M_DATA44

M_DATA45

M_DATA46

M_DATA47

M_DATA48

M_DATA49

M_DATA50

M_DATA51

M_DATA52

M_DATA53

M_DATA54

M_DATA55

M_DATA56

M_DATA57

M_DATA58

M_DATA59

M_DATA60

M_DATA61

M_DATA62

M_DATA63

M_CHECK0

M_CHECK1

M_CHECK2

M_CHECK3

M_CHECK4

M_CHECK5

M_CHECK6

M_CHECK7

A6@

DDRAB_SDQ0

A32

DDRAB_SDQ1

B35

DDRAB_SDQ2

A36

DDRAB_SDQ3

B29

DDRAB_SDQ4

A30

DDRAB_SDQ5

A34

DDRAB_SDQ6

B34

DDRAB_SDQ7

B37

DDRAB_SDQ8

A38

DDRAB_SDQ9

D40

DDRAB_SDQ10

D41

DDRAB_SDQ11

B36

DDRAB_SDQ12

A37

DDRAB_SDQ13

B41

DDRAB_SDQ14

C40

DDRAB_SDQ15

F40

DDRAB_SDQ16

F41

DDRAB_SDQ17

K40

DDRAB_SDQ18

K41

DDRAB_SDQ19

E40

DDRAB_SDQ20

E41

DDRAB_SDQ21

J40

DDRAB_SDQ22

J41

DDRAB_SDQ23

M41

DDRAB_SDQ24

N40

DDRAB_SDQ25

T41

DDRAB_SDQ26

U40

DDRAB_SDQ27

L40

DDRAB_SDQ28

M40

DDRAB_SDQ29

R40

DDRAB_SDQ30

T40

DDRAB_SDQ31

AF40

DDRAB_SDQ32

AF41

DDRAB_SDQ33

AK40

DDRAB_SDQ34

AK41

DDRAB_SDQ35

AE40

DDRAB_SDQ36

AE41

DDRAB_SDQ37

AJ40

DDRAB_SDQ38

AJ41

DDRAB_SDQ39

AM41

DDRAB_SDQ40

AN40

DDRAB_SDQ41

AT41

DDRAB_SDQ42

AU40

DDRAB_SDQ43

AL40

DDRAB_SDQ44

AM40

DDRAB_SDQ45

AR40

DDRAB_SDQ46

AT40

DDRAB_SDQ47

AV41

DDRAB_SDQ48

AW40

DDRAB_SDQ49

BA38

DDRAB_SDQ50

AY37

DDRAB_SDQ51

AU41

DDRAB_SDQ52

AV40

DDRAB_SDQ53

AY39

DDRAB_SDQ54

AY38

DDRAB_SDQ55

BA36

DDRAB_SDQ56

AY35

DDRAB_SDQ57

BA32

DDRAB_SDQ58

AY31

DDRAB_SDQ59

BA37

DDRAB_SDQ60

AY36

DDRAB_SDQ61

BA33

DDRAB_SDQ62

AY32

DDRAB_SDQ63

V41 W40 AB40 AC40 U41 V40 AA41 AB41

AD41

M_ZVDDIO

A6-6400 AM6400ITJ44JBA 2.4G BGA 769P

+1.8VS

ESDU@

1

2

C1195

ESDU@ C1195

APU_TRST#

B

1 2

R1074

39.2_0402_1%

HDT+

11

13

15

17

19

1

3

5

7

9

DDRAB_SDQ[63..0] <10,9>

HDMI

EDP

EC_SMB_CK2<12,25,27>

EC_SMB_DA2<12,25,27>

APU_PWRGD<40>

APU_VDDNB_SEN< 40>

APU_VDD_SEN<40>

APU_VDD_RUN_FB_L<40>

+1.35V

JHDT2

2

1

2

4

3

4

6

5

6

8

7

8

10

9

10

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

SAMTE_ASP-136446-07-B@

C

HDMI & LVDS should be reverse in KABINI: APU TX0 to Connector TX2 ; APU TX1 to Connector TX1 APU TX2 to Connector TX0 ; APU TX3 to Connector CLK

DP2_TXP0<22> DP2_TXN0<22>

DP2_TXP1<22> DP2_TXN1<22>

DP2_TXP2<22> DP2_TXN2<22>

DP2_TXP3<22> DP2_TXN3<22>

EDP_TXP0<20> EDP_TXN0< 20>

EDP_TXP1<20> EDP_TXN1< 20>

EDP use 2 Lane for FHD

1 2

APU_SVT<40> APU_SVC<40> APU_SVD<40>

H_PROCHOT#<27,7>

R1644 33_0402_5%R1644 33_0402_5% R1645 33_0402_5%R1645 33_0402_5% R1646 33_0402_5%R1646 33_0402_5%

R1124 0_0402_5%@R1124 0_0402_5%@ R1127 0_0402_5%@R1127 0_0402_5%@

R1120 0_0402_5%@R1120 0_0402_5%@

ESDU@

C186

100P_0402_50V8J

1 2 1 2

R117 0_0402_5%

0_0402_5%

R118 0_0402_5%

0_0402_5%

1 2

1

ESDU@

C175

C175 100P_0402_50V8J

100P_0402_50V8J

2

APU_PWRGD

APU_RST#

12

KABINI@R117

KABINI@

KABINI@R118

KABINI@

HDT

A9 B9

A10 B10

A11 B11

A12 B12

A4 B4

A5 B5

A6 B6

A7 B7

K15 H15

AV33 AU33

G31 D27 E29

B22 B21

B20 A20

B19 A19

A22 B18

D29 D31 D35 D33 G27 B25 A25

D23 G23 E25 E23

APU_SVT_R APU_SVC_R APU_SVD_R

APU_SIC APU_SID

APU_RST# TEMPIN1

APU_PWRGD TEMPIN2

APU_PROCHOT#

APU_ALERT#

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

ESDU@

1 2

C1270 22P_0402_50V8J

ESDU@

1 2

C1273 22P_0402_50V8J

TDP1_TXP0

TDP1_TXN0

TDP1_TXP1

TDP1_TXN1

TDP1_TXP2

TDP1_TXN2

TDP1_TXP3

TDP1_TXN3

LTDP0_TXP0

LTDP0_TXN0

LTDP0_TXP1

LTDP0_TXN1

LTDP0_TXP2

LTDP0_TXN2

LTDP0_TXP3

LTDP0_TXN3

DISP_CLKIN_H

DISP_CLKIN_L

SVT

SVC

SVD

SIC

SID

APU_RST_L

LDT_RST_L

APU_PWROK

LDT_PWROK

PROCHOT_L

ALERT_L

TDI

TDO

TCK

TMS

TRST_L

DBRDY

DBREQ_L

VDDCR_NB_SENSE

VDDCR_CPU_SENSE

VDDIO_MEM_S_SENSE

VSS_SENSE

VDD_095_FB_H

VDD_095_FB_L

DISPLAY/SVI2/JTAG/TEST

FT3 REV 0.51

UAPUC

D

DP_150_ZVSS

DP_2K_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

TDP1_AUXP

TDP1_AUXN

TDP1_HPD

LTDP0_AUXP

LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_GREEN

DAC_BLUE

DAC_HSYNC

DAC_VSYNC

DAC_SCL

DAC_SDA

DAC_ZVSS

THERMDA

THERMDC

DIECRACKMON

PLLTEST1

PLLTEST0

BYPASSCLK_H

BYPASSCLK_L

PLLCHRZ_H

PLLCHRZ_L

M_TEST

FREE_2

GIO_TSTDTM0_SERIALCLK

GIO_TSTDTM0_CLKINIT

USB_ATEST0

USB_ATEST1

M_ANALOGIN

M_ANALOGOUT

TMON_CAL

HDMI_EN/DP_STEREOSYNC

A6@

CRT_HSYNC

PU +1.8VS + PD

RP3

@RP3

@

APU_SCLK APU_CLKINT APU_SCLK APU_CLKINT

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

APU_TCK

APU_TMS

APU_TDI

APU_TDO

APU_PWRGD

APU_TDI APU_TMS APU_TCK APU_DBREQ#

RP6

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

+1.8VS

APU_RST#

APU_DBRDY

APU_DBREQ#

APU_PLLTEST0

APU_PLLTEST1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

RP11, RP6 will @ when MP

2014/03/03 2015/03/03

Issued Date

C

2014/03/03 2015/03/03

Compal Secret Data

Deciphered Date

D

B16

DP_150_ZVSS

A21

DP_2K_ZVSS

B17 A17 A18

D17 E17

R400 2K_0 402_1%R400 2K_0 402_1%

H19

D15 E15

H17

B14

A14

B15

G19 E19

D19 D21

A16

DAC_ZVSS

H27 H29 D25 A27

APU_BP0

BP0

B27

APU_BP1

BP1

A26

APU_BP2

BP2

B26

APU_BP3

BP3

B28

APU_PLLTEST1

A28

APU_PLLTEST0

B24

APU_BPCLK_H

A24

APU_BPCLK_L

AV35 AU35 E33

A29

TEMPIN0

H21

APU_SCLK

H25

APU_CLKINT

AJ10 AJ8 R32 N32 AP29

E21

DP_STEREOSYNC

A6-6400 AM6400ITJ44JBA 2.4G BGA 769P

+3VS

R1113

R1113 1K_0402_5%

1K_0402_5%

1 2

+1.8VS

R416 499_04 02_1%R416 499_0402_1%

Test14

PU +3VS

APU_ALERT# APU_SID APU_PROCHOT# APU_SIC

PU +1.8VS

APU_SVT APU_SVC APU_SVD

APU_RST# APU_PWRGD APU_BPCLK_L

PD

APU_BP2 APU_BP3 APU_BP0 APU_BP1

APU_TRST# APU_PLLTEST0 APU_PLLTEST1

APU_BPCLK_H

Title

Size Document Number Rev

Custom

Date: Sheet of

E

1 2

HDMI_CLK <22> HDMI_DATA <22>

HDMI_DET <22>

EDP_AUXP <20> EDP_AUXN <20>

EDP_HPD <20 >

DAC_RED <21>

DAC_GRN <21>

DAC_BLU <21>

CRT_HSYNC <21> CRT_VSYNC <21>

CRT_DDC_CLK <21>

18

DAC_BLU

27

DAC_GRN

36

DAC_RED

45

DP_150_ZVSS

CRT_DDC_DATA <21>

12 12

1 2

T39T39 T40T40 T41T41

EDP_AUXP EDP_AUXN

RP23

150_0804_8P4R_1%

R255 4.7K_0402_5%@R255 4.7K_0402_5%@ R256 4.7K_0402_5%@R256 4.7K_0402_5%@

T42T42

T45T45 T43T43 T44T44 T46T46 T47T47

T48T48

RP4

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

RP5

@RP5

@

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

1 2

R1080 300_0402_5%R1080 300_0402_5%

1 2

R1082 300_0402_5%R1082 300_0402_5%

1 2

R1018 511_0402_1%R1018 511_0402_1%

RP7

@RP7

@

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

1K_0804_8P4R_5% RP8

RP8

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

1 2

R1019 511_0402_1%R1019 511_0402_1%

Compal Electronics, Inc.

FT3 DDR3/DISP/MISC//HDT

LA-B291P

E

ENBKL <20,27> APU_ENVDD <20> APU_INVT_PWM <20>

CRT

+3VS

+1.8VS

5 46Monday, March 03, 2014

1.0

A

R10

T50T50

R8

R5 R4

N5 N4

N10

N8

W8

L5 L4

J5 J4

G5 G4

D7

E7

P_GPP_RXP0

P_GPP_RXN0

P_GPP_RXP1

P_GPP_RXN1

P_GPP_RXP2

P_GPP_RXN2

P_GPP_RXP3

P_GPP_RXN3

P_TX_ZVDD_095

P_GFX_RXP0

P_GFX_RXN0

P_GFX_RXP1

P_GFX_RXN1

P_GFX_RXP2

P_GFX_RXN2

P_GFX_RXP3

P_GFX_RXN3

BA14 AY14

BA16 AY16

AY19 BA19

AY17 BA17

AR19 AP19

BA30

AY12

BA12

U4 U5

AC8

AC10

AE4 AE5

AC4 AC5

AA5 AA4

AP13

N2

N1

AY2

AW2

AT2 AT1 AR2 AR1 AP2

AP1 AV29 AP25

AV2

SATA_TX0P

SATA_TX0N

SATA_RX0N

SATA_RX0P

SATA_TX1P

SATA_TX1N

SATA_RX1N

SATA_RX1P

SATA_ZVSS

SATA_ZVDD_095

SATA_ACT_L/GPIO67

SATA_X1

SATA_X2

GFX_CLKP

GFX_CLKN

GPP_CLK0P

GPP_CLK0N

GPP_CLK1P

GPP_CLK1N

GPP_CLK2P

GPP_CLK2N

GPP_CLK3P

GPP_CLK3N

X14M_25M_48M_OSC

X48M_X1

X48M_X2

LPCCLK0

LPCCLK1

LAD0

LAD1

LAD2

LAD3

LFRAME_L

LDRQ0_L

SERIRQ/GPIO48

LPC_CLKRUN_L

LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L

PCIE_DTX_C_ARX_P0<31> PCIE_DTX_C_ARX_N0<31>

LAN

WLAN WLAN

1 1

VGA

2 2

HDD

ODD

+0.95VS

Card Reader

3 3

LAN

WLAN

PCIE_DTX_C_ARX_P1<29> PCIE_DTX_C_ARX_N1<29>

PCIE_DTX_C_ARX_P2<24> PCIE_DTX_C_ARX_N2<24>

PCIE_GTX_C_ARX_P0<11> PCIE_GTX_C_ARX_N0<11>

PCIE_GTX_C_ARX_P1<11> PCIE_GTX_C_ARX_N1<11>

PCIE_GTX_C_ARX_P2<11> PCIE_GTX_C_ARX_N2<11>

PCIE_GTX_C_ARX_P3<11> PCIE_GTX_C_ARX_N3<11>

SATA_ATX_DRX_P0<23> SATA_ATX_DRX_N0<23>

SATA_DTX_C_ARX_N0<23> SATA_DTX_C_ARX_P0<23>

SATA_ATX_DRX_P1<23> SATA_ATX_DRX_N1<23>

SATA_DTX_C_ARX_N1<23> SATA_DTX_C_ARX_P1<23>

R90 1K_0402_1%R90 1K_0402_1 % R96 1K_0402_1%R96 1K_0402_1 %

SATALED#<26>

VGA

1 2

R404

1.69K_0402_1%

CLK_PCIE_GPU<11> CLK_PCIE_GPU#<11>

CLK_PCIE_CR<31> CLK_PCIE_CR#<31>

CLK_PCIE_LAN<29> CLK_PCIE_LAN#< 29>

CLK_PCIE_WLAN<24> CLK_PCIE_WLAN#<24>

P_TX_ZVDD_095 P_RX_ZVDD_095

12 12

SATA_ZVSS SATA_ZVDD

SATALED#

48M_X1

48M_X2

1 2

LPC_CLK0_EC<27,7> LPC_CLK1<7>

R1133 0_0402_5%@R1133 0_0402_5%@

1 2

R1134 0_0402_5%@R1134 0_0402_5%@

LPC_AD0<27>

LPC_AD1<27>

LPC_AD2<27>

LPC_AD3<27>

LPC_FRAME#<27,7>

SERIRQ<27>

4 4

A

FT3 REV 0.51

UAPUB

PCIE

B

L2

P_GPP_TXP0

L1

P_GPP_TXN0

K2

P_GPP_TXP1

K1

P_GPP_TXN1

J2

P_GPP_TXP2

J1

P_GPP_TXN2

H2

P_GPP_TXP3

H1

P_GPP_TXN3

W7

P_RX_ZVDD_095

G2

P_GFX_TXP0

G1

P_GFX_TXN0

F2

P_GFX_TXP1

F1

P_GFX_TXN1

E2

P_GFX_TXP2

E1

P_GFX_TXN2

D2

P_GFX_TXP3

D1

P_GFX_TXN3

A6@

A6-6400 AM6400ITJ44JBA 2.4G BGA 769P

UAPUE

CLK/SATA/USB/SPI/LPC

USB_SS_ZVDD_095_USB3_DUAL

FT3 REV 0.51

B

PCIE_ATX_DRX_P0 PCIE_ATX_DRX_N0

PCIE_ATX_DRX_P1 PCIE_ATX_DRX_N1

PCIE_ATX_DRX_P2 PCIE_ATX_DRX_N2

PCIE_ATX_GRX_P0 PCIE_ATX_GRX_N0

PCIE_ATX_GRX_P1 PCIE_ATX_GRX_N1

PCIE_ATX_GRX_P2 PCIE_ATX_GRX_N2

PCIE_ATX_GRX_P3 PCIE_ATX_GRX_N3

USBCLK/14M_25M_48M_OSC

USB_ZVSS

USB_HSD0P

USB_HSD0N

USB_HSD1P

USB_HSD1N

USB_HSD2P

USB_HSD2N

USB_HSD3P

USB_HSD3N

USB_HSD4P

USB_HSD4N

USB_HSD5P

USB_HSD5N

USB_HSD6P

USB_HSD6N

USB_HSD7P

USB_HSD7N

USB_HSD8P

USB_HSD8N

USB_HSD9P

USB_HSD9N

USB_SS_ZVSS

USB_SS_0TXP

USB_SS_0TXN

USB_SS_0RXP

USB_SS_0RXN

USB_SS_1TXP

USB_SS_1TXN

USB_SS_1RXP

USB_SS_1RXN

SPI_CLK/GPIO162

SPI_CS1_L/GPIO165

SPI_CS2_L/GPIO166

SPI_DO/GPIO163

SPI_DI/GPIO164

SPI_HOLD_L/GEVENT9_L

SPI_WP_L/GPIO161

A6-6400 AM6400ITJ44JBA 2.4G BGA 769PA6@

C

1 2

C1021 0.1U_0402_16V7KC1021 0.1U_0402_16V7K

1 2

C1022 0.1U_0402_16V7KC1022 0.1U_0402_16V7K

1 2

C1019 0.1U_0402_16V7KC1019 0.1U_0402_16V7K

1 2

C1020 0.1U_0402_16V7KC1020 0.1U_0402_16V7K

1 2

C1017 0.1U_0402_16V7KC1017 0.1U_0402_16V7K

1 2

C1018 0.1U_0402_16V7KC1018 0.1U_0402_16V7K

12

1 2 1 2

+0.95VS_APU_GFX+0.95VS_APU_GFX

R73

R73 1K_0402_1%

1K_0402_1%

C1001 0.1U_0402_16V7KPX@C1001 0.1U_0402_16V7KPX@ C1002 0.1U_0402_16V7KPX@C1002 0.1U_0402_16V7KPX@

C1003 0.1U_0402_16V7KPX@C1003 0.1U_0402_16V7KPX@ C1004 0.1U_0402_16V7KPX@C1004 0.1U_0402_16V7KPX@

C1005 0.1U_0402_16V7KPX@C1005 0.1U_0402_16V7KPX@ C1006 0.1U_0402_16V7KPX@C1006 0.1U_0402_16V7KPX@

C1007 0.1U_0402_16V7KPX@C1007 0.1U_0402_16V7KPX@ C1008 0.1U_0402_16V7KPX@C1008 0.1U_0402_16V7KPX@

PCIE_ATX_C_DRX_P0 <31> PCIE_ATX_C_DRX_N0 <31>

PCIE_ATX_C_DRX_P1 <29> PCIE_ATX_C_DRX_N1 <29>

PCIE_ATX_C_DRX_P2 <24> PCIE_ATX_C_DRX_N2 <24>

PCIE_ATX_C_GRX_P0 <11> PCIE_ATX_C_GRX_N0 <11>

PCIE_ATX_C_GRX_P1 <11> PCIE_ATX_C_GRX_N1 <11>

PCIE_ATX_C_GRX_P2 <11> PCIE_ATX_C_GRX_N2 <11>

PCIE_ATX_C_GRX_P3 <11> PCIE_ATX_C_GRX_N3 <11>

Card ReaderCard Reader

LAN

VGA

W4

AG4

AL4 AL5

AJ4 AJ5

AG7 AG8

AG1 AG2

AF1 AF2

AE1 AE2

AD1 AD2

AC1 AC2

AB1 AB2

AA1 AA2

AE10 AE8

T2 T1

V2 V1

R1 R2

W1 W2

AU7 AW9 AR4 AR11 AR7 AU11 AU9

USB_ZVSS

USBSS_ZVSS USBSS_ZVDD

APU_SPI_CLK APU_SPI_CS1#

APU_SPI_AOSI

APU_SPI_AISO

APU_SPI_HOLD# APU_SPI_WP#

1 2

R641 11.8K_040 2_1%R641 11.8K_0402_1%

USB20_P0 <20> USB20_N0 <20>

USB20_P1 <28> USB20_N1 <28>

USB20_P3 <20> USB20_N3 <20>

USB20_P5 <24> USB20_N5 <24>

USB20_P7 <28> USB20_N7 <28>

USB30_P8 <28> USB30_N8 <28>

USB30_P9 <28> USB30_N9 <28>

1 2

R644 1K_0 402_1%R644 1K_0 402_1%

1 2

R645 1K_0 402_1%R645 1K_0 402_1%

USB30_MTX_C_DRX_P0 <28> USB30_MTX_C_DRX_N0 <28>

USB30_MRX_DTX_P0 <28> USB30_MRX_DTX_N0 <28>

USB30_MTX_C_DRX_P1 <28> USB30_MTX_C_DRX_N1 <28>

USB30_MRX_DTX_P1 <28> USB30_MRX_DTX_N1 <28>

EMIP@

1 2

R110 33_040 2_5%

1 2

R111 33_040 2_5%R111 33_0402_5%

T51T51

1 2

R109 33_040 2_5%R109 33_0402_5%

Touch Screen (reserved)

Right USB port

CAMERA

WLAN/BT combo

Finger Print

MB USB3.0 port0

MB USB3.0 port1

+0.95VALW

R109,R110,R111 close to APU

APU_SPI_CLK_U APU_SPI_CS1#_U

APU_SPI_AOSI_U

APU_SPI_AISO

R108 close to ROM

R108 33_0402_5%R108 33_0402_5%

APU_SPI_AISO

APU_SPI_AOSI_U

APU_SPI_CLK_U

APU_SPI_CS1#_U

1 2

APU->EC->ROM must route as Daisy Chain for Share ROM quality (RP12 was request to added for the recoverable solution as original method)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2014/03/03 2015/03/03

Compal Secret Data

Deciphered Date

D

APU POWER SEQUENCE

G-A

G-B

G-C

G-D

G-E

RP12

1 8 2 7 3 6 4 5

0_0804_8P4R_5%

+RTC

EC_ON

+3VALW/+5VALW

+1.8VALW

+0.95VALW

SYSON

+1.5V

SUSP#

+3VS

+1.8VS

+1.5VS

+0.95VS

VR_ON

+APU_CORE

+APU_CORE_NB

EC_SPI_AISO EC_SPI_AOSI

EC_SPI_CLK EC_SPI_CS1#

APU_SPI_CS1#_U APU_SPI_WP# APU_SPI_HOLD#

RP13

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

EC_SPI_AISO <27> EC_SPI_AOSI <27> EC_SPI_CLK <27> EC_SPI_CS1# <27>

8MB SPI ROM

APU_SPI_CS1#_U APU_SPI_AISO_U APU_SPI_WP#

D

1 2 3 4

E

48MHz CRYSTAL

R938

R938 1M_0402_5%

1M_0402_5%

2

3

Y2

Y2 48MHZ_8PF_X3S048000D81H-W

48MHZ_8PF_X3S048000D81H-W

12

C794

C794 6P_0402_50V8

6P_0402_50V8

+3VALW

U1

/CS DO(IO1) /WP(IO2) GND

W25Q64FVSSIQ_SO8

VCC

/HOLD(IO3)

DI(IO0)

CLK

8 7 6 5

APU_SPI_HOLD# APU_SPI_CLK_U APU_SPI_AOSI_U

APU_SPI_CLK_U

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FT3 PCIE/SATA/CLK/USB/SPI

LA-B291P

1

4

1 2

R617 10_0402_5%

10_0402_5%

E

1

4

12

C795

C795 6P_0402_50V8

6P_0402_50V8

@

12

C635

0.1U_0402_16V4Z

1 2

EMIU@R617

EMIU@

6 46Monday, March 03, 2014

48M_X2

48M_X1

+3VALW

C636

EMIU@C636

EMIU@

10P_0402_50V8J

1.0

A

1 2

C615

C615 150P_0402_50V8J

150P_0402_50V8J

LPC_RST#<27>

1 1

GATEA20<27>

VGA_CLKREQ#<12>

ODD_PLUGIN#<23>

HDA_SDIN0<30>

2 2

1

2

CR_CLKREQ#<31> LAN_CLKREQ#<29>

WLAN_CLKREQ#<24>

USB_OC0#<28> USB_OC1#<28>

1 2

PBTN_OUT#<27>

APU_PCIE_WAKE#<24>

SLP_S3#<27> SLP_S5#<27>

ATE Test

KBRST#<27>

EC_SCI#<27> EC_SMI#<27>

C1376

C1376 1000P_0402_50V7K

1000P_0402_50V7K

ESDP@

1 2

R290 0_0402_5%@R290 0_0402_5%@

R602

R602 33_0402_5%

33_0402_5%

CR_CLKREQ# LAN_CLKREQ# WLAN_CLKREQ#

T55T55 T56T56 T57T57

LPC_RST_A# APU_PCIE_RST#_BUF

EC_RSMRST#_R

PWR_GOOD_APU SYS_RESET_L APU_PCIE_WAKE#

TEST0 CS_JTAG_TMS_TEST1 TEST2

VGA_CLKREQ#_R

HDA_BITCLK HDA_SDOUT HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SYNC HDA_RST#

32K_X1

32K_X2

AY4

LPC_RST_L

AY9

PCIE_RST_L

AY5

RSMRST_L

BA8

PWR_BTN_L

AM19

PWR_GOOD

AY7

SYS_RESET_L/GEVENT19_L

AW11

WAKE_L/GEVENT8_L

AY3

SLP_S3_L

BA5

SLP_S5_L

AU13

TEST0

AY10

TEST1/TMS

AY6

TEST2

AR23

KBRST_L

AR31

GA20IN/GEVENT0_L

AN5

LPC_PME_L/GEVENT3_L

AL7

LPC_SMI_L/GEVENT23_L

AP15

AC_PRES/IR_RX0/GEVENT16_L

AV13

IR_TX0/GEVENT21_L

BA9

IR_TX1/GEVENT6_L

BA10

IR_RX1/GEVENT20_L

AV15

IR_LED_L/LLB_L/GPIO184

AU29

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60

AW29

CLK_REQ1_L/GPIO61

AR27

CLK_REQ2_L/GPIO62

AV27

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63

AY29

CLK_REQG_L/GPIO65/OSCIN

AY8

USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L

AW1

USB_OC1_L/TDI/GEVENT13_L

AV1

USB_OC2_L/TCK/GEVENT14_L

AY1

T54T54

USB_OC3_L/TDO/GEVENT15_L

AN2

AZ_BITCLK

AN1

AZ_SDOUT

AK2

AZ_SDIN0/GPIO167

AK1

AZ_SDIN1/GPIO168

AM1

AZ_SDIN2/GPIO169

AL2

AZ_SDIN3/GPIO170

AM2

AZ_SYNC

AL1

AZ_RST_L

AJ2

X32K_X1

AJ1

X32K_X2

HDA for AUDIO

HDA_BITCLK_AUDIO<30> HDA_SYNC_AUDIO<30> HDA_RST_AUDIO#<30> HDA_SDOUT_AUDIO<30>

+3VALW

PU +3VALW + PD

1 2

R691 10K_ 0402_5%@R691 10K_040 2_5%@

1 2

3 3

4 4

R686 10K_ 0402_5%R686 10K_ 0402_5%

+3VALW

+3VS

PU +3VS

+3VS

PD

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1 2

R1650 10K_0402_5%

1 2

R656 100K _0402_5%@R656 100K_0402_5%@

1 2

R650 100K _0402_5%R650 100K_0402_5%

1 2

R651 100K _0402_5%R651 100K_0402_5%

1 2

R623 8.2K_0402 _5%@R623 8.2K_0402_5%@

1 2

R622 8.2K_0402 _5%@R622 8.2K_0402_5%@

1 2

R621 8.2K_0402 _5%@R621 8.2K_0402_5%@

1 2

R673 2.2K_0402 _5%R673 2.2K_0402 _5%

1 2

R674 2.2K_0402 _5%R674 2.2K_0402 _5%

1 2

R618 8.2K_0402 _5%UMA@R618 8.2K_0402_5%UMA@

1 2

R687 10K_ 0402_5%@R687 10K_040 2_5%@

1 2

R684 10K_ 0402_5%@R684 10K_040 2_5%@

1 2

R688 10K_ 0402_5%@R688 10K_040 2_5%@

1 2

R689 10K_ 0402_5%PX@R689 10K_0402_5%P X@

RP14

1 2

R1648 0_0402_5%

@

PU +3VALW

@

A

APU_GPIO174

APU_SCLK1

APU_SDATA1

APU_PCIE_WAKE#

DGPU_PWR_EN

1 2

@

R1649 0_0402_5%

EC_LID_OUT# USB_OC0# USB_OC1#

CR_CLKREQ# WLAN_CLKREQ#

LAN_CLKREQ# APU_SCLK0 APU_SDATA0

VGA_CLKREQ#_R

BT_OFF#

HDA_BITCLK

HDA_SDIN0

VGA_CLKREQ#_R

EC_RSMRST# , POWER_GOOD follow CRB (APU side 1.8V power rail)

EC_RSMRST#<27>

SYS_PWRGD_EC<27>

PU +3VALW + PD

TEST0 CS_JTAG_TMS_TEST1 TEST2

B

UAPUD

ACPI/SD/AZ/GPIO/RTC/MISC

FT3 REV 0.51

RP15

1 8 2 7 3 6 4 5

33_0804_8P4R_5%

12

EMIU@

C264

22P_0402_50V8J

Must connected to 10 ms RC delay circuit on +1.8-V S5 power rail.

B

EMI

SCS00005C00

D13

1 2

RB751V-40TE17_SOD323-2

D15

SCS00005C00

1 2

RB751V-40TE17_SOD323-2

RP9

@RP9

@

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

RP10

1 8 2 7 3 6 4 5

15K_0804_8P4R_5%

@RP10

@

HDA_SDOUT

EC_RSMRST#_R

PWR_GOOD_APU

1U_0402_6.3V6K

+3VALW

C

BA23

SD_PWR_CTRL

AY22

SD_CLK/GPIO73

AY23

SD_CMD/GPIO74

AY20

SD_CD/GPIO75

BA20

SD_WP/GPIO76

BA22

SD_DATA0/GPIO77

AY21

SD_DATA1/GPIO78

AY24

SD_DATA2/GPIO79

BA24

SD_DATA3/GPIO80

AY25

SD_LED/GPIO45

AU25

SCL0/GPIO43

SDA0/GPIO47

SCL1/GPIO227

SDA1/GPIO228

GPIO49

GPIO50

GPIO51

GPIO55

GPIO57

GPIO58

GPIO59

GPIO64

SPKR/GPIO66

GPIO68

GPIO69

GPIO70

GPIO71

GPIO174

GEVENT2_L

GEVENT4_L

GEVENT7_L

GEVENT10_L

GEVENT11_L

GEVENT17_L

BLINK/GEVENT18_L

GEVENT22_L

GENINT1_L/GPIO32

GENINT2_L/GPIO33

FANOUT0/GPIO52

FANIN0/GPIO56

RTCCLK

A6@

HDA_BITCLK HDA_SYNC HDA_RST#

+1.8VALW

R345

47K_0402_5%

1 2

1

C209

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

APU_SCLK0

AV25

APU_SDATA0

AY11 BA11

AP27 AY28 BA28 AV23 AP21 BA26 AV19 AY27 BA27 AU21 AY26 AV21 AM21 BA3

AV17 BA4 AR15 AP17 AP11 AN8 AU17 BA6

BA29 AP23

AV31 AU31

AV11

A6-6400 AM6400ITJ44JBA 2.4G BGA 769P

1 2

R2122 0_0402_5%@R2122 0_0402_5%@

1 2

R661 0_0402_5%@R661 0_0402_5%@

APU_GPIO174

GEVENT2#

ODD_DA#_APU_R BLINK EC_LID_OUT#

DGPU_PWROK

APU_SCLK1 APU_SDATA1

NO USE

Board_ID1

DGPU_PWR_EN

H

L

R685

R685 10K_0402_5%

10K_0402_5%

1 2

1

1U_0402_6.3V6K

1U_0402_6.3V6K C212

C212

2

2014/03/03 2015/03/03

Issued Date

C

2014/03/03 2015/03/03

APU_SCLK0 <10,9> APU_SDATA0 <10,9>

H_PROCHOT# < 27,5>

1 2

R292 0_0402 _5%@R292 0_0402_5%@

EC_LID_OUT# <27 >

DGPU_PWROK <41>

STRAPS OF APU

LPC_FRAME# LPC_CLK0_EC LPC_CLK1 GEVENT2_L

SPI ROM (DEFAULT)

LPC ROM

APU_PCIE_RST#_BUF

BT_OFF# <24>

ODD_EN <23>

PXS_RST# <11> APU_SPKR <30> DGPU_PWR_EN <13,27>

RTC_CLK <24>

BOOT FAIL TIMER ENABLED

BOOT FAIL TIMER DISABLED (DEFAULT)

LPC_FRAME#<27,6> LPC_CLK0_EC<27,6> LPC_CLK1<6>

Compal Secret Data

Deciphered Date

SYS_RESET_L

BLINK

GEVENT2#

RTC_CLK

D

1 2

R907

R907 33_0402_5%

33_0402_5%

150P_0402_50V8J

If use as SMBUS : Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of: Qty: 1; Value: 2.2 KΩ; Tol: 5% If no use : Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of: Qty: 1; Value: 10 KΩ; Tol: 5%

ODD_DA#_APU <23>

R902 10K_0402_5%R902 10K_0402_5%

12

R903 2K_0402_5%@R903 2K_0402_5%

12

@

D

1

C912

2

CLKGEN ENABLE (DEFAULT)

CLKGEN DISABLED

Board_ID1

Function

0 PX5.5

1

UMA

32.768KMHz CRYSTAL

1 2

32.768KHZ_12.5P_1TJF125DP1A000D

1 2

1

C682

C682 22P_0402_50V8J

22P_0402_50V8J

2

SYS_RESET_L

1.8V SPI ROM

3.3V SPI ROM (DEFAULT)

R904 10K_0402_5%@R904 10K_0402_5%

12

@

R926 2K_0402_5%R926 2K_0402_5%

12

R927 2K_0402_5%@R927 2K_0402_5%

12

@

Title

Size Document Number Rev

Custom

Date: Sheet of

NORMAL POWR UP/RESET TIMING (DEFAULT)

reserved Direct DC

R925 10K_0402_5%R925 10K_0402_5%

R928 10K_0402_5%@R928 10K_0402_5%

12

@

R929 2.2K_0402_5%R929 2.2K_0402_5%

12

Compal Electronics, Inc.

FT3 GPIO/AZ/MISC/STRAPS

LA-B291P

E

APU_PCIE_RST# <11,24,29,31>

Board_ID1

R914

R914 20M_0402_5%

20M_0402_5%

Y1

RTC_CLK

Coin Battery

+3VALW

R949 10K_0402_5%R949 10K_0402_5%

12

R950

12

@

2.2K_0402_5%

E

+3VS

12

R911

UMA@ R911

UMA@

10K_0402_5%

12

R912

PX@ R912

PX@

10K_0402_5%

32K_X1

32K_X2

1

C686

C686 18P_0402_50V8J

18P_0402_50V8J

2

R952 10K_0402_5%R952 10K_0402_5%

12

R951

12

@

2.2K_0402_5%

7 46Monday, March 03, 2014

R954 10K_0402_5%@R954 10K_0402_5%

12

@

R953

12

@

2.2K_0402_5%

1.0

A

CORE POWER OF APU

+APU_CORE

1 1

VDDCR_CPU

C1179 1U_0402_6.3V6KC1179 1U_0402_ 6.3V6K

C1180 1U_0402_6.3V6KC1180 1U_0402_ 6.3V6K

C1182 1U_0402_6.3V6K@C1182 1U_0402_6.3V6K

C1183 1U_0402_6.3V6KC1183 1U_0402_ 6.3V6K

C1181 1U_0402_6.3V6KC1181 1U_0402_ 6.3V6K

1

2

C1187 1U_0402_6.3V6KC1187 1U_0402_ 6.3V6K

C1186 1U_0402_6.3V6KC1186 1U_0402_ 6.3V6K

C1184 1U_0402_6.3V6KC1184 1U_0402_ 6.3V6K

1

2

C1190 180P_0402_50V 8JC1190 180P_0402_50V8J

C1188 1U_0402_6.3V6KC1188 1U_0402_ 6.3V6K

C1189 1U_0402_6.3V6KC1189 1U_0402_ 6.3V6K

1

2

1

2

B

RTC OF APU

VDDBT_RTC_G

+RTCBATT_R

C1365

0.22U_0402_10V6K

VDDBT_RTC_G

W=20mils

1

2

C

1 2

R93 10K_0402_5%R93 10K_0402_ 5%

12

CLRP1

@CLRP1

@

Need OPEN

SHORT PADS

for Clear CMOS

+RTCBATT

D

E

+RTCBATT_3V

U102

3

Vout

1

Vin

2

12

C811

GND

AP2138N-1.5TRG1_SOT23-3

0.1U_0603_25V7K

12

C810

680P_0603_50VK

@

INTEGRATED GPU POWER OF APU +3VALW/+3VS OF APU

+APU_CORE_NB

2 2

C924 10U_0603_6.3V6MC924 10U_0603_6.3V6M

+0.95VALW/+0.95VS OF APU

3 3

+0.95VS +0.95VS_APU_GFX

VDD_095

C934 10U_0603_6.3V6MC934 10U_0603_6.3V6M

C1198 1U_0402_6.3V6KC1198 1U_0402_ 6.3V6K

C935 10U_0603_6.3V6MC935 10U_0603_6.3V6M

1

2

4 4

VDD_095_USB3_DUAL

VDDCR_NB

C1192 1U_0402_6.3V6KC1192 1U_0402_ 6.3V6K

C1201 1U_0402_6.3V6KC1201 1U_0402_ 6.3V6K

C1200 1U_0402_6.3V6KC1200 1U_0402_ 6.3V6K

1

2

C1193 1U_0402_6.3V6KC1193 1U_0402_ 6.3V6K

C1191 1U_0402_6.3V6KC1191 1U_0402_ 6.3V6K

C1202 1U_0402_6.3V6KC1202 1U_0402_ 6.3V6K

1

2

C1194 1U_0402_6.3V6KC1194 1U_0402_ 6.3V6K

1

2

VDDIO_MEM_S

C925 10U_0603_6.3V6MC925 10U_0603_6.3V6M

1

2

C926 0.1U_0402_16V7KC926 0.1U_0402_16V7K

C923 0.1U_0402_16V7KC923 0.1U_0402_16V7K

C949 10U_0603_6.3V6M@C949 10U_0603_6.3V6M

1

2

C927 0.1U_0402_16V7KC927 0.1U_0402_16V7K

C928 0.1U_0402_16V7KC928 0.1U_0402_16V7K

1

2

1

2

@

C932 0.1U_0402_16V7KC932 0.1U_0402_16V7K

C929 0.1U_0402_16V7K@C929 0.1U_0402_16V7K

C931 0.1U_0402_16V7KC931 0.1U_0402_16V7K

1

2

C1211 180P_0402_50V 8JC1211 180P_0402_50V8J

C930 0.1U_0402_16V7KC930 0.1U_0402_16V7K

1

2

@

VDD_095_GFX

L22

C1199 1U_0402_6.3V6K@C1199 1U_0402_6.3V6K

C1205 1U_0402_6.3V6KC1205 1U_0402_ 6.3V6K

C1204 1U_0402_6.3V6K@C1204 1U_0402_6.3V6K

1

2

@

C1213 180P_0402_50V 8JC1213 180P_0402_50V8J

1

2

1

2

FBMA-L11-201209-121LMA50T_0805

C1260 1U_0402_6.3V6KC1260 1U_0402_ 6.3V6K

C1206 1U_0402_6.3V6KC1206 1U_0402_ 6.3V6K

12

+0.95VALW +0.95VALW

C1214 1U_0402_6.3V6KC1214 1U_0402_ 6.3V6K

C1216 1U_0402_6.3V6KC1216 1U_0402_ 6.3V6K

C938 10U_0603_6.3V6MC938 10U_0603_6.3V6M

C937 10U_0603_6.3V6MC937 10U_0603_6.3V6M

1

2

C1218 180P_0402_50V 8JC1218 180P_0402_50V8J

C1221 1U_0402_6.3V6K@C1221 1U_0402_6.3V6K

1

2

1

2

C1220 1U_0402_6.3V6KC1220 1U_0402_ 6.3V6K

1

2

@

VDD_095_ALW VDD_18_ALW

A

C1197 180P_0402_50V 8JC1197 180P_0402_50V8J

1

2

PLANE SPLIT

C1208 180P_0402_50V 8JC1208 180P_0402_50V8J

C1210 180P_0402_50V 8JC1210 180P_0402_50V8J

1

2

C1217 1U_0402_6.3V6K@C1217 1U_0402_6.3V6K

1

2

@

C1231 180P_0402_50V 8J@C1231 180P_0402_50V 8J

C1258 180P_0402_50V 8J@C1258 180P_0402_50V 8J

C1230 180P_0402_50V 8JC1230 180P_0402_50V8J

C1207 180P_0402_50V 8JC1207 180P_0402_50V8J

1

2

C1219 1U_0402_6.3V6KC1219 1U_0402_ 6.3V6K

1

2

@

C936 10U_0603_6.3V6MC936 10U_0603_6.3V6M

C1203 1U_0402_6.3V6KC1203 1U_0402_ 6.3V6K

1

2

C1222 1U_0402_6.3V6KC1222 1U_0402_ 6.3V6K

1

2

+RTCBATT

需需

LDO轉1.5V, 20130930 added

+3VS

C1257 180P_0402_50V 8JC1257 180P_0402_50V8J

C1249 1U_0402_6.3V6KC1249 1U_0402_ 6.3V6K

1

2

C1252 1U_0402_6.3V6KC1252 1U_0402_ 6.3V6K

1

2

VDD_33_ALWVDD_33

VDDIO_AZ_ALW (Could be S0 or S5 power rail)

+1.5VS+1.35V

C1259 180P_0402_50V 8JC1259 180P_0402_50V8J

C1372 0.1U_0402_16V7K ESDP@C1372 0.1U_0402_16V7K ESDP@

1

2

C1161 4.7U_0603_6.3V6KC1161 4.7U_0603_6.3V6K

C1373 0.1U_0402_16V7K ESDP@C1373 0.1U_0402_16V7K ESDP@

2

1

C1255 1U_0402_6.3V6KC1255 1U_0402_ 6.3V6K

C1254 1U_0402_6.3V6KC1254 1U_0402_ 6.3V6K

C1256 1U_0402_6.3V6K@C1256 1U_0402_6.3V6K

1

@

2

C1232 180P_0402_50V 8JC1232 180P_0402_50V8J

1

2

1

2

+1.8VALW/+1.8VS OF APU

+1.8VALW

C1160 4.7U_0603_6.3V6KC1160 4.7U_0603_6.3V6K

1

2

VDD_18

C1236 1U_0402_6.3V6KC1236 1U_0402_ 6.3V6K

C1237 1U_0402_6.3V6KC1237 1U_0402_ 6.3V6K

1

2

C1239 1U_0402_6.3V6KC1239 1U_0402_ 6.3V6K

C1233 180P_0402_50V 8JC1233 180P_0402_50V8J

C1240 1U_0402_6.3V6KC1240 1U_0402_ 6.3V6K

C1238 1U_0402_6.3V6KC1238 1U_0402_ 6.3V6K

1

2

1

2

C1250 1U_0402_6.3V6KC1250 1U_0402_ 6.3V6K

C1244 1U_0402_6.3V6KC1244 1U_0402_ 6.3V6K

1

2

C1245 180P_0402_50V 8JC1245 180P_0402_50V8J

C1248 1U_0402_6.3V6KC1248 1U_0402_ 6.3V6K

C1246 1U_0402_6.3V6KC1246 1U_0402_ 6.3V6K

1

2

+1.8VS

C933 10U_0603_6.3V6MC933 10U_0603_6.3V6M

1

2

B

@

12

C1253 1U_0402_6.3V6KC1253 1U_0402_ 6.3V6K

+3VALW_APU

R582 0_0603_5%

1

2

J35

+3VALW

+1.35V +APU_CORE

+1.5VS

+1.8VALW

+3VALW_APU

+0.95VALW

1

+0.95VALW

2

+RTCBATT_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

VDDIO_MEM_S_1

L32

VDDIO_MEM_S_2

L37

VDDIO_MEM_S_3

N35

VDDIO_MEM_S_4

R31

VDDIO_MEM_S_5

R37

VDDIO_MEM_S_6

U32

VDDIO_MEM_S_7

U35

VDDIO_MEM_S_8

W31

VDDIO_MEM_S_9

W32

VDDIO_MEM_S_10

W37

VDDIO_MEM_S_11

AA31

VDDIO_MEM_S_12

AA35

VDDIO_MEM_S_13

AC32

VDDIO_MEM_S_14

AC37

VDDIO_MEM_S_15

AE31

VDDIO_MEM_S_16

AE35

VDDIO_MEM_S_17

AG32

VDDIO_MEM_S_18

AG37

VDDIO_MEM_S_19

AJ35

VDDIO_MEM_S_20

AL32

VDDIO_MEM_S_21

AL37

VDDIO_MEM_S_22

AR35

VDDIO_MEM_S_23

AL10

VDDIO_AZ_ALW_1

AL11

VDDIO_AZ_ALW_2

B1

VDD_18_ALW_1

B2

VDD_18_ALW_2

AL13

VDD_33_ALW_1

AM13

VDD_33_ALW_2

AR5

VDD_095_USB3_DUAL_1

AU4

VDD_095_USB3_DUAL_2

AV7

VDD_095_USB3_DUAL_3

AW5

VDD_095_USB3_DUAL_4

AE11

VDD_095_ALW_1

AE13

VDD_095_ALW_2

AJ11

VDD_095_ALW_3

AJ13

VDD_095_ALW_4

AN4

VDDBT_RTC_G

2014/03/03 2015/03/03

Need use+3.3V transfer to +1.5V LDO to APU side for Beema

R131

KABINI@

1 2

0_0402_5%

GND

A8 A13 A23 A31 A35 A39

B8 B13 B23 B31 B39

C1

C2

C5

C7

C9 C11 C13 C15 C17 C19 C21 C23 C25 C27 C29 C31 C33 C35 C37 C39 C41

D9 D11 D13

E3

E4

E9 E11 E13 E27 E31 E35 E38 E39

G3

G7 G11 G13 G15 G17 G21 G25 G29 G35 G37 G39 G41 H11 H13 H23 H31

GND

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

FT3 REV 0.51

A6-6400 AM6400ITJ44JBA 2.4G BGA 769PA6@

Date: Sheet of

UAPUF

POWER

FT3 REV 0.51

Compal Secret Data

L21

VDDCR_CPU_1

L23

VDDCR_CPU_2

L25

VDDCR_CPU_3

L27

VDDCR_CPU_4

L29

VDDCR_CPU_5

N21

VDDCR_CPU_6

N23

VDDCR_CPU_7

N27

VDDCR_CPU_8

R21

VDDCR_CPU_9

R23

VDDCR_CPU_10

R27

VDDCR_CPU_11

U21

VDDCR_CPU_12

U23

VDDCR_CPU_13

U27

VDDCR_CPU_14

W21

VDDCR_CPU_15

W23

VDDCR_CPU_16

W27

VDDCR_CPU_17

AA21

VDDCR_CPU_18

AA23

VDDCR_CPU_19

AA27

VDDCR_CPU_20

AC21

VDDCR_CPU_21

AC23

VDDCR_CPU_22

AC27

VDDCR_CPU_23

AE21

VDDCR_CPU_24

AE23

VDDCR_CPU_25

AE27

VDDCR_CPU_26

L13

VDDCR_NB_1

L17

VDDCR_NB_2

N11

VDDCR_NB_3

N13

VDDCR_NB_4

N17

VDDCR_NB_5

R11

VDDCR_NB_6

R13

VDDCR_NB_7

R17

VDDCR_NB_8

U13

VDDCR_NB_9

U17

VDDCR_NB_10

W13

VDDCR_NB_11

W17

VDDCR_NB_12

AA13

VDDCR_NB_13

AA17

VDDCR_NB_14

AC13

VDDCR_NB_15

AC17

VDDCR_NB_16

AE15

VDDCR_NB_17

AE17

VDDCR_NB_18

AE19

VDDCR_NB_19

AG17

VDDCR_NB_20

AG21

VDDCR_NB_21

A2

VDD_18_1

A3

VDD_18_2

B3

VDD_18_3

C3

VDD_18_4

AM15

VDD_33_1

AM17

VDD_33_2

AG23

VDD_095_1

AG27

VDD_095_2

AJ21

VDD_095_3

AJ27

VDD_095_4

AL21

VDD_095_5

AL23

VDD_095_6

AL27

VDD_095_7

AM23

VDD_095_8

AM25

VDD_095_9

U10

VDD_095_GFX_1

W10

VDD_095_GFX_2

AA10

VDD_095_GFX_3

A6@

A6-6400 AM6400ITJ44JBA 2.4G BGA 769P

Deciphered Date

TEMPINRETUNE

+APU_CORE_NB

+1.8VS

+3VS

+0.95VS

+0.95VS_APU_GFX

D

UAPUG

J3

VSS_63

J7

VSS_64

J8

VSS_65

J39

VSS_66

K11

VSS_67

K13

VSS_68

K17

VSS_69

K19

VSS_70

K21

VSS_71

K23

VSS_72

K25

VSS_73

K27

VSS_74

K29

VSS_75

K31

VSS_76

L3

VSS_77

L7

VSS_78

L8

VSS_79

L10

VSS_80

L11

VSS_81

L15

VSS_82

L19

VSS_83

L31

VSS_84

L39

VSS_85

L41

VSS_86

M1

VSS_87

M2

VSS_88

N3

VSS_89

N7

VSS_90

N15

VSS_91

N19

VSS_92

N25

VSS_93

N29

VSS_94

N31

VSS_95

N39

VSS_96

P1

VSS_97

P2

VSS_98

R3

VSS_99

R7

VSS_100

R15

VSS_101

R19

VSS_102

R25

VSS_103

R29

VSS_104

R39

VSS_105

R41

VSS_106

U1

VSS_107

U2

VSS_108

U3

VSS_109

U7

VSS_110

U8

VSS_111

U11

VSS_112

U15

VSS_113

U19

VSS_114

U25

VSS_115

U29

VSS_116

U31

VSS_117

U39

VSS_118

W3

VSS_119

W5

VSS_120

W11

VSS_121

W15

VSS_122

W19

VSS_123

W25

VSS_124

Title

Size Document Number Rev

Custom

W29

VSS_125

W39

VSS_126

W41

VSS_127

Y1

VSS_128

Y2

VSS_129

AA3

VSS_130

AA7

VSS_131

AA8

VSS_132

AA11

VSS_133

AA15

VSS_134

AA19

VSS_135

AA25

VSS_136

AA29

VSS_137

AA39

VSS_138

AC3

VSS_139

AC7

VSS_140

AC11

VSS_141

AC15

VSS_142

AC19

VSS_143

AC25

VSS_144

AC29

VSS_145

AC31

VSS_146

AC39

VSS_147

AC41

VSS_148

AE3

VSS_149

AE7

VSS_150

AE25

VSS_151

AE29

VSS_152

AE32

VSS_153

AE39

VSS_154

AG3

VSS_155

AG5

VSS_156

AG10

VSS_157

AG11

VSS_158

AG13

VSS_159

AG15

VSS_160

AG19

VSS_161

AG25

VSS_162

AG29

VSS_163

AG31

VSS_164

AG39

VSS_165

AG41

VSS_166

AH1

VSS_167

AH2

VSS_168

AJ3

VSS_169

AJ7

VSS_170

AJ15

VSS_171

AJ17

VSS_172

AJ19

VSS_173

AJ23

VSS_174

AJ25

VSS_175

AJ29

VSS_176

AJ31

VSS_177

AJ32

VSS_178

AJ39

VSS_179

AL3

VSS_180

AL8

VSS_181

AL15

VSS_182

AL17

VSS_183

AL19

VSS_184

AL25

VSS_185

AL29

VSS_186

Compal Electronics, Inc.

FT3 PWR/GND

LA-B291P

UAPUH

GND

FT3 REV 0.51

A6-6400 AM6400ITJ44JBA 2.4G BGA 769PA6@

E

VSS_187

VSS_188

VSS_189

VSS_190

VSS_191

VSS_192

VSS_193

VSS_194

VSS_195

VSS_196

VSS_197

VSS_198

VSS_199

VSS_200

VSS_201

VSS_202

VSS_203

VSS_204

VSS_205

VSS_206

VSS_207

VSS_208

VSS_209

VSS_210

VSS_211

VSS_212

VSS_213

VSS_214

VSS_215

VSS_216

VSS_217

VSS_218

VSS_219

VSS_220

VSS_221

VSS_222

VSS_223

VSS_224

VSS_225

VSS_226

VSS_227

VSS_228

VSS_229

VSS_230

VSS_231

VSS_232

VSS_233

VSS_234

VSS_235

VSS_236

VSS_237

VSS_238

VSS_239

VSS_240

VSS_241

VSS_242

VSSBG_DAC

VBURN

8 46Monday, March 03, 2014

PSEN

AL39 AL41 AM11 AM27 AM31 AN3 AN7 AN39 AP31 AR3 AR13 AR17 AR21 AR25 AR29 AR39 AR41 AU1 AU2 AU3 AU15 AU19 AU23 AU27 AU39 AV9 AW3 AW7 AW13 AW15 AW17 AW19 AW21 AW23 AW25 AW27 AW31 AW33 AW35 AW37 AW39 AW41 AY13 AY15 AY18 AY30 BA2 BA7 BA13 BA15 BA18 BA21 BA25 BA31 BA35 BA39 A15 AL31 AM29

1.0

A

+1.35V +1.35V+VREF_DQ

0.1U_0402_25V6K

1000P_0402_50V7K

C1176

1

2

1 1

DDRAB_SDQS1#<10,5> DDRAB_SDQS1<10,5>

DDRAB_SDQS2#<10,5> DDRAB_SDQS2<10,5>

DDRA_CKE0<5>

+3VS

DDRAB_SBS2#<10,5>

DDRA_CLK0<5> DDRA_CLK0#<5>

DDRAB_SBS0#<10,5>

DDRAB_SWE#<10,5>

DDRAB_SCAS#<10,5>

DDRA_SCS1#<5>

DDRAB_SDQS4#<10,5> DDRAB_SDQS4<10,5>

DDRAB_SDQS6#<10,5> DDRAB_SDQS6<10,5>

+3VS

1

2

C1136

0.1U_0402_16V4Z

2

2 2

3 3

4 4

C1135

2.2U_0603_6.3V6K

DDRAB_SDQ0

C1142

DDRAB_SDQ1

DDRAB_SDM0

DDRAB_SDQ2 DDRAB_SDQ3

DDRAB_SDQ8 DDRAB_SDQ9

DDRAB_SDQS1# DDRAB_SDQS1

DDRAB_SDQ10 DDRAB_SDQ11

DDRAB_SDQ16 DDRAB_SDQ17

DDRAB_SDQS2# DDRAB_SDQS2

DDRAB_SDQ19

DDRAB_SDQ24 DDRAB_SDQ25

DDRAB_SDM3

DDRAB_SDQ26 DDRAB_SDQ27 DDRAB_SDQ31

DDRA_CKE0

DDRAB_SBS2#

DDRAB_SMA12 DDRAB_SMA9

DDRAB_SMA8 DDRAB_SMA5

DDRAB_SMA3 DDRAB_SMA1

DDRA_CLK0 DDRA_CLK0#

DDRAB_SMA10 DDRAB_SBS0#

DDRAB_SWE# DDRAB_SCAS#

DDRAB_SMA13 DDRA_SCS1#

DDRAB_SDQ32 DDRAB_SDQ33

DDRAB_SDQS4# DDRAB_SDQS4

DDRAB_SDQ34 DDRAB_SDQ35

DDRAB_SDQ40 DDRAB_SDQ41

DDRAB_SDM5

DDRAB_SDQ42 DDRAB_SDQ43

DDRAB_SDQ48 DDRAB_SDQ49

DDRAB_SDQS6# DDRAB_SDQS6

DDRAB_SDQ50 DDRAB_SDQ51

DDRAB_SDQ56 DDRAB_SDQ57

DDRAB_SDM7

DDRAB_SDQ58 DDRAB_SDQ59

1 2

R69 10K_0402_5%R69 10K_0402_5%

+0.675VS

12

R70

10K_0402_5%

JDIMM2

15mil

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

VREF_CA VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1

ARGOS_DS2RK-20401-TP4B

SP070014D00ME@

DIMM_A H:4mm

<Address: 00>

A

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1

CK1#

VDD

BA1 RAS#

VDD

ODT0

VDD ODT1

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

SCL

VTT

GND2

B

C

D

E

JDIMM2

2 4

DDRAB_SDQ4

6

DDRAB_SDQ5

8 10

DDRAB_SDQS0#

12

DDRAB_SDQS0

14 16

DDRAB_SDQ6

18

DDRAB_SDQ7

20 22

DDRAB_SDQ12

24

DDRAB_SDQ13

26 28

DDRAB_SDM1

30

MEM_MAB_RST#

32 34

DDRAB_SDQ14

36

DDRAB_SDQ15

38 40

DDRAB_SDQ20

42

DDRAB_SDQ21

44 46

DDRAB_SDM2

48 50

DDRAB_SDQ22

52

DDRAB_SDQ23DDRAB_SDQ18

54 56

DDRAB_SDQ28

58

DDRAB_SDQ29

60 62

DDRAB_SDQS3#

64

DDRAB_SDQS3

66 68

DDRAB_SDQ30

70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114

S0#

116 118 120 122

NC

124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

B

DDRA_CKE1

DDRAB_SMA15 DDRAB_SMA14

DDRAB_SMA11 DDRAB_SMA7

DDRAB_SMA6 DDRAB_SMA4

DDRAB_SMA2 DDRAB_SMA0

DDRA_CLK1 DDRA_CLK1#

DDRAB_SBS1# DDRAB_SRAS#

DDRA_SCS0# DDRA_ODT0

DDRA_ODT1

15mil

DDRAB_SDQ36 DDRAB_SDQ37

DDRAB_SDM4

DDRAB_SDQ38 DDRAB_SDQ39

DDRAB_SDQ44 DDRAB_SDQ45

DDRAB_SDQS5# DDRAB_SDQS5

DDRAB_SDQ46 DDRAB_SDQ47

DDRAB_SDQ52 DDRAB_SDQ53

DDRAB_SDM6

DDRAB_SDQ54 DDRAB_SDQ55

DDRAB_SDQ60 DDRAB_SDQ61

DDRAB_SDQS7# DDRAB_SDQS7

DDRAB_SDQ62 DDRAB_SDQ63

MEM_MAB_EVENT#

+0.675VS

Reverse Type Near CPU

DDRAB_SDQS0# <10,5> DDRAB_SDQS0 <10,5>

MEM_MAB_RST# <10,5>

DDRAB_SDQS3# <10,5> DDRAB_SDQS3 <10,5>

DDRA_CKE1 <5>

DDRA_CLK1 <5> DDRA_CLK1# <5>

DDRAB_SBS1# <10,5> DDRAB_SRAS# <10,5>

DDRA_SCS0# <5> DDRA_ODT0 <5>

DDRA_ODT1 <5>

0.1U_0402_25V6K

1000P_0402_50V7K

C1134

1

2

DDRAB_SDQS5# <10,5> DDRAB_SDQS5 <10,5>

DDRAB_SDQS7# <10,5> DDRAB_SDQS7 <10,5>

MEM_MAB_EVENT# <10,5>

APU_SDATA0 <10,7> APU_SCLK0 <10,7>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C1167

Issued Date

+VREF_CA

DDRAB_SDQ[0..63]

DDRAB_SDM[0..7]

DDRAB_SMA[0..15]

DDRAB_SDQ[0..63] <10,5>

DDRAB_SDM[0..7] <10,5>

DDRAB_SMA[0..15] <10,5>

+1.35V/+0.675VS OF DIMM1

+1.35V +0.675VS

C1121 0.1U_0402_16V4Z@C1121 0.1U_0402_16V4Z

C1119 0.1U_0402_16V4Z@C1119 0.1U_0402_16V4Z

C1117 0.1U_0402_16V4ZC1117 0.1U_0402_16V 4Z

C1115 0.1U_0402_16V4ZC1115 0.1U_0402_16V 4Z

C1114 0.1U_0402_16V4Z@C1114 0.1U_0402_16V4Z

C1116 0.1U_0402_16V4Z@C1116 0.1U_0402_16V4Z

C1118 0.1U_0402_16V4ZC1118 0.1U_0402_16V 4Z

1

2

@

C1122 0.1U_0402_16V4ZC1122 0.1U_0402_16V 4Z

C1120 0.1U_0402_16V4Z@C1120 0.1U_0402_16V4Z

1

2

@

VREF for DIMM1,2

+VREF_DQ

Compal Secret Data

2014/03/03 2015/03/03

C

Compal Secret Data

Deciphered Date

C1126 0.1U_0402_16V4ZC1126 0.1U_0402_16V 4Z

C1123 0.1U_0402_16V4Z@C1123 0.1U_0402_16V4Z

1

2

@

+1.35V +1.35V

R65

R65 1K_0402_1%

1K_0402_1%

1 2

R67

R67 1K_0402_1%

1K_0402_1%

1 2

C1127 4.7U_0603_6.3V6KC1127 4.7U_0603_6.3V6K

1

2

+VREF_CA

D

R66

R66 1K_0402_1%

1K_0402_1%

1 2

R68

R68 1K_0402_1%

1K_0402_1%

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDR3 SODIMM-I Socket

LA-B291P

9 46Monday, March 03, 2014

E

1.0

A

+VREF_DQ

15mil

1000P_0402_50V7K

0.1U_0402_25V6K

1 1

2 2

3 3

4 4

C1143

C1177

1

2

DDRAB_SDQS1#<5,9> DDRAB_SDQS1<5,9>

DDRAB_SDQS2#<5,9> DDRAB_SDQS2<5,9>

DDRB_CKE0<5>

DDRAB_SBS2#<5,9>

DDRB_CLK0<5> DDRB_CLK0#<5>

DDRAB_SBS0#<5,9>

DDRAB_SWE#<5,9>

DDRAB_SCAS#< 5,9>

DDRB_SCS1#<5>

DDRAB_SDQS4#<5,9> DDRAB_SDQS4<5,9>

DDRAB_SDQS6#<5,9> DDRAB_SDQS6<5,9>

+3VS

DDRAB_SDQ0 DDRAB_SDQ1

DDRAB_SDM0

DDRAB_SDQ2 DDRAB_SDQ3

DDRAB_SDQ8 DDRAB_SDQ9

DDRAB_SDQS1# DDRAB_SDQS1

DDRAB_SDQ10 DDRAB_SDQ11

DDRAB_SDQ16 DDRAB_SDQ17

DDRAB_SDQS2# DDRAB_SDQS2

DDRAB_SDQ19

DDRAB_SDQ24 DDRAB_SDQ25

DDRAB_SDM3

DDRAB_SDQ26 DDRAB_SDQ27

DDRB_CKE0

DDRAB_SBS2#

DDRAB_SMA12 DDRAB_SMA9

DDRAB_SMA8 DDRAB_SMA5

DDRAB_SMA3 DDRAB_SMA1

DDRB_CLK0 DDRB_CLK0#

DDRAB_SMA10 DDRAB_SBS0#

DDRAB_SWE# DDRAB_SCAS#

DDRAB_SMA13 DDRB_SCS1#

DDRAB_SDQ32 DDRAB_SDQ33

DDRAB_SDQS4# DDRAB_SDQS4

DDRAB_SDQ34 DDRAB_SDQ35

DDRAB_SDQ40 DDRAB_SDQ41

DDRAB_SDM5

DDRAB_SDQ42 DDRAB_SDQ43

DDRAB_SDQ48 DDRAB_SDQ49

DDRAB_SDQS6# DDRAB_SDQS6

DDRAB_SDQ50 DDRAB_SDQ51

DDRAB_SDQ56 DDRAB_SDQ57

DDRAB_SDM7

DDRAB_SDQ58 DDRAB_SDQ59

1 2

R71 10K_0402_5%R71 10K_0402_5%

1 2

10K_0402_5%

R72

10K_0402_5%

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

ARGOS_DS2SK-20401-TP4B

ME@

SP070014E00

DIMM_B H:4mm

<Address: 10>

A

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1#

VDD

RAS#

VDD

ODT0

VDD

ODT1

VDD

VREF_CA

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

GND2

BOSS2

CK1

BA1

SCL VTT

B

+1.35V+1.35V

2 4

DDRAB_SDQ4

6

DDRAB_SDQ5

8 10

DDRAB_SDQS0#

12

DDRAB_SDQS0

14 16

DDRAB_SDQ6

18

DDRAB_SDQ7

20 22

DDRAB_SDQ12

24

DDRAB_SDQ13

26 28

DDRAB_SDM1

30

MEM_MAB_RST#

32 34

DDRAB_SDQ14

36

DDRAB_SDQ15

38 40

DDRAB_SDQ20

42

DDRAB_SDQ21

44 46

DDRAB_SDM2

48 50

DDRAB_SDQ22

52

DDRAB_SDQ23DDRAB_SDQ18

54 56

DDRAB_SDQ28

58

DDRAB_SDQ29

60 62

DDRAB_SDQS3#

64

DDRAB_SDQS3

66 68

DDRAB_SDQ30

70

DDRAB_SDQ31

72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114

S0#

116 118 120 122

NC

124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

B

DDRB_CKE1

DDRAB_SMA15 DDRAB_SMA14

DDRAB_SMA11 DDRAB_SMA7

DDRAB_SMA6 DDRAB_SMA4

DDRAB_SMA2 DDRAB_SMA0

DDRB_CLK1 DDRB_CLK1#

DDRAB_SBS1# DDRAB_SRAS#

DDRB_SCS0# DDRB_ODT0

DDRB_ODT1

15mil

DDRAB_SDQ36 DDRAB_SDQ37

DDRAB_SDM4

DDRAB_SDQ38 DDRAB_SDQ39

DDRAB_SDQ44 DDRAB_SDQ45

DDRAB_SDQS5# DDRAB_SDQS5

DDRAB_SDQ46 DDRAB_SDQ47

DDRAB_SDQ52 DDRAB_SDQ53

DDRAB_SDM6

DDRAB_SDQ54 DDRAB_SDQ55

DDRAB_SDQ60 DDRAB_SDQ61

DDRAB_SDQS7# DDRAB_SDQS7

DDRAB_SDQ62 DDRAB_SDQ63

+0.675VS+0.675VS

DDRAB_SDQS0# <5,9> DDRAB_SDQS0 <5,9>

MEM_MAB_RST# <5,9>

DDRAB_SDQS3# <5,9> DDRAB_SDQS3 <5,9>

DDRB_CKE1 <5>

DDRB_CLK1 <5> DDRB_CLK1# <5>

DDRAB_SBS1# <5,9> DDRAB_SRAS# <5,9>

DDRB_SCS0# <5> DDRB_ODT0 <5>

DDRB_ODT1 <5>

0.1U_0402_25V6K

1000P_0402_50V7K

C1139

1

2

DDRAB_SDQS5# <5,9> DDRAB_SDQS5 <5,9>

DDRAB_SDQS7# <5,9> DDRAB_SDQS7 <5,9>

MEM_MAB_EVENT# <5,9>

APU_SDATA0 <7,9> APU_SCLK0 <7,9>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

1

2

Issued Date

C

JDIMM1 Standard Type Near User

+VREF_CA

C1174

2014/03/03 2015/03/03

C

D

DDRAB_SDQ[0..63]

DDRAB_SDM[0..7]

DDRAB_SMA[0..15]

DDRAB_SDQ[0..63] <5,9>

DDRAB_SDM[0..7] <5,9>

DDRAB_SMA[0..15] <5,9>

+1.35V/+0.675VS OF DIMM2

C1168 0.1U_0402_16V4Z@C1168 0.1U_0402_16V4Z

C1132 0.1U_0402_16V4ZC1132 0.1U_0402_16V 4Z

C1133 0.1U_0402_16V4Z@C1133 0.1U_0402_16V4Z

C1155 0.1U_0402_16V4ZC1155 0.1U_0402_16V 4Z

1

2

@

Compal Secret Data

C1162 0.1U_0402_16V4ZC1162 0.1U_0402_16V 4Z

C1165 0.1U_0402_16V4ZC1165 0.1U_0402_16V 4Z

1

2

@

Deciphered Date

C1169 0.1U_0402_16V4Z@C1169 0.1U_0402_16V4Z

C1170 0.1U_0402_16V4ZC1170 0.1U_0402_16V 4Z

C1171 0.1U_0402_16V4ZC1171 0.1U_0402_16V 4Z

1

2

C1172 0.1U_0402_16V4Z@C1172 0.1U_0402_16V4Z

1

2

@

C1175 0.1U_0402_16V4ZC1175 0.1U_0402_16V 4Z

1

2

D

E

+1.35V+1.35V +0.675VS

C1158 4.7U_0603_6.3V6KC1158 4.7U_0603_6.3V6K

1

2

1

@

+

C250

330U_D3_2.5VY_R6M

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDR3 SODIMM-II Socket

LA-B291P

10 46Monday, March 03, 2014

E

1.0

1

A A

PCIE_ATX_C_GRX_P0<6> PCIE_ATX_C_GRX_N0<6>

PCIE_ATX_C_GRX_P1<6> PCIE_ATX_C_GRX_N1<6>

PCIE_ATX_C_GRX_P2<6> PCIE_ATX_C_GRX_N2<6>

PCIE_ATX_C_GRX_P3<6> PCIE_ATX_C_GRX_N3<6>

B B

C C

CLK_PCIE_GPU<6>

+3VGS

APU_PCIE_RST#<24,29,31,7>

PXS_RST#<7>

APU_PCIE_RST#

PXS_RST#

MC74VHC1G08DFT2G_SC70-5

2

1

CLK_PCIE_GPU#<6>

1 2

5

UV2

P

B

A

G

3

RV2 1K_0402_5%PX@RV2 1K_0402_5%PX@

PX@UV2

PX@

4

Y

CLK_PCIE_GPU CLK_PCIE_GPU#

GPU_RST#

2

12

RV4

RV4 100K_0402_5%

100K_0402_5%

PX@

UV1A PX@

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

NC#V30

U31

NC#U31

U29

NC#U29

T28

NC#T28

T30

NC#T30

R31

NC#R31

R29

NC#R29

P28

NC#P28

P30

NC#P30

N31

NC#N31

N29

NC#N29

M28

NC#M28

M30

NC#M30

L31

NC#L31

L29

NC#L29

K30

NC#K30

CLOCK

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

N10

TEST_PG

AL27

PERSTB

216-0841018 A0 SUN PRO S3

PCI EXPRESS INTERFACE

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

CALIBRATION

PCIE_CALR_TX

PCIE_CALR_RX

NC#W24 NC#W23

NC#V27 NC#U26

NC#U24 NC#U23

NC#T26 NC#T27

NC#T24 NC#T23

NC#P27 NC#P26

NC#P24 NC#P23

NC#M27

NC#N26

3

AC Coupling Capacitor

CIe Gen3: Recommended value is 220 nF

P PCIe Gen1 and Gen2 only: Recommended value is 100 nF

AH30 AG31

AG29 AF28

AF27 AF26

AD27 AD26

AC25 AB25

Y23 Y24

AB27 AB26

Y27 Y26

W24 W23

V27 U26

U24 U23

T26 T27

T24 T23

P27 P26

P24 P23

M27 N26

Y22

AA22

PCIE_GTX_ARX_P0 PCIE_GTX_ARX_N0

PCIE_GTX_ARX_P1 PCIE_GTX_ARX_N1

PCIE_GTX_ARX_P2 PCIE_GTX_ARX_N2

PCIE_GTX_ARX_P3 PCIE_GTX_ARX_N3

1 2

RV1 1.69K_0402_1%PX@RV1 1.69K_0402_1%PX@

1 2

RV3 1K_0402_1%P X@RV3 1K_0402_1%PX@

+0.95VGS

12

CV1.1U_0402_16V7K PX@ CV1.1U_0402_16V7K PX@

12

CV2.1U_0402_16V7K PX@ CV2.1U_0402_16V7K PX@

12

CV3.1U_0402_16V7K PX@ CV3.1U_0402_16V7K PX@

12

CV4.1U_0402_16V7K PX@ CV4.1U_0402_16V7K PX@

12

CV5.1U_0402_16V7K PX@ CV5.1U_0402_16V7K PX@

12

CV6.1U_0402_16V7K PX@ CV6.1U_0402_16V7K PX@

12

CV7.1U_0402_16V7K PX@ CV7.1U_0402_16V7K PX@

12

CV8.1U_0402_16V7K PX@ CV8.1U_0402_16V7K PX@

4

PCIE_GTX_C_ARX_P0 <6> PCIE_GTX_C_ARX_N0 <6>

PCIE_GTX_C_ARX_P1 <6> PCIE_GTX_C_ARX_N1 <6>

PCIE_GTX_C_ARX_P2 <6> PCIE_GTX_C_ARX_N2 <6>

PCIE_GTX_C_ARX_P3 <6> PCIE_GTX_C_ARX_N3 <6>

No Use GPU Display Port outpud

UV1F

PX@

UV1F

PX@

AB11

VARY_BL

AB12

DIGON

TX0P_DPA2P

TX0M_DPA2N

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TX3P_DPB2P

TX3M_DPB2N

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

AL15 AK14

AH16 AJ15

AL17 AK16

AH18 AJ17

AL19 AK18

AH20 AJ19

AL21 AK20

AH22 AJ21

AL23 AK22

AK24 AJ23

TXCAP_DPA3P TXCAM_DPA3N

NC_TXOUT_L3P NC_TXOUT_L3N

TMDP

TXCBP_DPB3P TXCBM_DPB3N

NC_TXOUT_U3P NC_TXOUT_U3N

5

+VGA_CORE

12

RV1770_0402_5% TOPAZ@ RV1770_0402_5% TOPAZ@ RV1760_0402_5% TOPAZ@ RV1760_0402_5% TOPAZ@

FOR TOPAS CORE POWER USE

12

?

216-0841018 A0 SUN PRO S3

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/03/03 2015/03/03

Compal Secret Data

?

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

JET/TOPAL(1/5)_PCIE/DP

LA-B291P

5

of

11 46Monday, March 03, 2014

1.0

1

EC_SMB_D A2<25 ,27,5>

+3VGS

CV195

JET@

RV162

RV162 RV81

RV81

RV136

EC_SMB_C K2<25 ,27,5>

2

1

A A

.1U_0402 _16V7K

GPU_VID1

B B

10K_040 2_5%

33_0402 _5%JE T@

1 2 1 2

33_0402 _5%JE T@

10K_040 2_5%

JET@

12

JET@

ME2N7002 D1KW-G 2N _SOT363-6

RV71

@

1 2

GPU_VID3 _GPIO_15GPU_VID3 GPU_VID1 _GPIO_20

DIR

RV135

1 2

CV180 10 U_0603_6. 3V6M

DIR

CV196

REAK CURRENT CONTROL ( Topaz only )

1K_0402 _5%

1 2

1

CV17

CV17 .1U_0402 _16V7K

.1U_0402 _16V7K

2

TOPAZ@

+1.8VGS

1 2

RV13

10K_040 2_5%

@

C C

D D

+3VGS

RV18 4. 7K_0402_5 %PX @RV18 4.7K_040 2_5%PX@

+3VGS

1 2

RV58

@RV58

@

1 2

RV20

@RV20

@

VGA_AC_BATT

+3VGS

PX@ CV19

PX@

pull up

RPV1

@RPV1

@

1 8 2 7 3 6 4 5

10K_8P4 R_5%

XTALIN XTALOUT

4

1

27MHZ 10P F +-10PPM 7V 27000050

2

CV19 10P_040 2_50V8J

10P_040 2_50V8J

1

6 1

ME2N7002 D1KW-G 2N _SOT363-6

+3VGS+3VG S+3VGS

RV161

RV161 10K_040 2_5%

10K_040 2_5%

JET@

1 2

1 2 3 5

RV134

RV134 10K_040 2_5%

10K_040 2_5%

1 2

@

JET@

12

.1U_0402 _16V7K

JET@

+3VGS

RV15

1 2

TOPAZ@

GPIO19_ CTF

RV22

RV22 10K_040 2_5%

10K_040 2_5%

@

1 2

12

GPU_GPIO 5

10K_040 2_5%

JTAG_TDO

10K_040 2_5%

JTAG_TRSTB JTAG_TDI JTAG_TMS JTAG_TCK

RV28

RV28 1M_0402 _5%

1M_0402 _5%

PX@

YV1

PX@

YV1

PX@

3

NC

OSC

2

OSC

NC

SJ10000 FH00

1

+3VGS

12

RV157

RV157 47K_040 2_5%

5

4

+1.8VGS

8 7

RV131

B1

6

RV130

B2

4

GPU_VID3 GPU_VID1

GPU_PROC HOT# <41 >

FOR TOPAS CORE POWER USE

47K_040 2_5%

@

2

CV182

CV182 .1U_0402 _16V7K

.1U_0402 _16V7K

1

33_0402 _5%

1 2 1 2

33_0402 _5% JET@

RV182 0_04 02_5%@RV182 0_04 02_5%@ RV183 0_04 02_5%@RV183 0_04 02_5%@

+VGA_CORE

TO EXTERNAL THERMAL SENSOR

+1.8VGS

2

QV9A

@

3

QV9B

@

JET@

UV13

VCCA

VCCB A1 A2

GND

DIR

SN74LVC2 T45DCTR_SM8

3.3V TO 1.8V LEVEL SHIF For JET/SUN to support SVI2 reaulator DNI for TOPAZ

RV10

RV10 10K_040 2_5%

10K_040 2_5%

TOPAZ@

GPU_PROC HOT#GPU_GPIO 6

FOR TOPAS CORE POWER USE

THM_ALERT#

2

CV20

PX@ CV20

PX@

10P_040 2_50V8J

1

12

RV158

RV158 47K_040 2_5%

47K_040 2_5%

@

JET@

GPU_SVD GPU_SVC

1 2 1 2

OR TOPAS CORE POWER USE

F

VCIN1_AC_ IN<26,27,35 >

THM_ALERT#<25>

VGA_CLK REQ#<7>

+3VGS

+VGA_CORE

@

1 2

LV4 0_0402_ 5%

2

VGA_SMB _DA2

VGA_SMB _CK2

FOR TOPAZ,JET/SUN DOESN'T HAVE

+1.8VGS

RV11

RV16

4.7K_04 02_5%

TOPAZ@

TV23TV23

TV18TV18

+VGA_CORE

@

PX@

RV33 10 K_0402_5 %JE T@RV33 10 K_0402_5 %JE T@

2

TOPAZ@

1

FB_VDDCI

1

PLL_ANA LOG_IN

1 2

RV170 0_04 02_5%TOPAZ@RV170 0_0 402_5%TOPAZ@

1 2

RV174 0_04 02_5%TOPAZ@RV174 0_0 402_5%TOPAZ@

DV1

@DV 1

@

RB751V_ SOD323

1 2

RV172 0_04 02_5%TOPAZ@RV172 0_0 402_5%TOPAZ@

1 2

RV194 0_04 02_5%PX@RV194 0 _0402_5%PX@

1 2

RV173 0_04 02_5%TOPAZ@RV173 0_0 402_5%TOPAZ@

RV180 0_04 02_5%RV180 0_0 402_5% RV181 0_04 02_5%RV181 0_0 402_5%

Enable MLPS

1 2

GPU_SVD GPU_SVC

THM_ALERT# THM_ALERT#_R

1 2

RV26 5.11K_0402_ 5%

1 2

RV27 1K_0402_5%

REMOTE1+<25> REMOTE1-<25>

1

CV21

CV21 1U_0402 _6.3V6K

1U_0402 _6.3V6K

PX@

2

4.7K_04 02_5%

TOPAZ@

1 2

21

1

TV24TV24

1 2

RV169 0_04 02_5%TOPAZ@RV169 0_0 402_5%TOPAZ@

1 2

RV171 0_04 02_5%TOPAZ@RV171 0_0 402_5%TOPAZ@

1

TV22TV22

1 2

RV175 0_04 02_5%TOPAZ@RV175 0_0 402_5%TOPAZ@

1

TV25TV25

1 2

RV29 10 K_0402_5 %P X@RV2 9 10K_040 2_5%PX@

1 2

RV31 10 K_0402_5 %P X@RV3 1 10K_040 2_5%PX@

1 2 1 2

VGA_SMB _DA2 VGA_SMB _CK2 GPU_GPIO 5 GPU_GPIO 6

JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO TESTEN

PX_EN

XTALIN XTALOUT

GPIO28

+TSVDD

GPU_VID3

GPIO19_ CTF GPU_VID1

THERM_D+ THERM_D-

UV1B

PX@

UV1B

PX@

N9

DBG_DATA16

L9

DBG_DATA15

AE9

DBG_DATA14

Y11

DBG_DATA13

AE8

DBG_DATA12

AD9

DBG_DATA11

AC10

DBG_DATA10

AD7

DBG_DATA9

AC8

DBG_DATA8

AC7

DBG_DATA7

AB9

DBG_DATA6

AB8

DBG_DATA5

AB7

DBG_DATA4

AB4

DBG_DATA3

AB2

DBG_DATA2

Y8

DBG_DATA1

Y7

DBG_DATA0

W6

NC#W6

V6

NC#V6

AC6

NC#AC5

AC5

NC#AC6

AA5

NC#AA5

AA6

NC#AA6

U1

NC#U1

W1

NC#W1

U3

NC#U3

Y6

NC#Y6

AA1

NC#AA1

I2C

R1

SCL

R3

SDA

GENERAL PURPOSE I/O

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

SMBDATA

U7

SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16

R6

GPIO_17_THERMAL_INT

W10

GPIO_18

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21

N8

GPIO_22_ROMCSB

AK10

GPIO_29

AM10

GPIO_30

N7

CLKREQB

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

K7

TESTEN

AF24

NC#AF24

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE

AJ9

NC#AJ9

AL9

NC#AL9

AC14

HPD1

AB16

PX_EN

AC16

DBG_VREFG

PLL/CLOCK

AM28

XTALIN

AK28

XTALOUT

AC22

XO_IN

AB22

XO_IN2

SEYMOUR/FutureASIC

T4

DPLUS

T2

DMINUS

R5

GPIO28_FDO

AD17

TSVDD

AC17

TSVSS

216-0841 018 A0 SUN PRO S3

THERMAL

DVO

3

U?

DPA

DPB

DPC

AVSSN#AK26

AVSSN#AJ25

AVSSN#AG25

DAC1

FutureASIC/SEYMOUR/PARK

RSVD#AK12

RSVD#AL11 RSVD#AJ11

GENLK_CLK

GENLK_VSYNC

SWAPLOCKA SWAPLOCKB

DDC/AUX

DDC1DATA

DDC2DATA

DDCVGACLK

DDCVGADATA

?

3

NC#AF2 NC#AF4

NC#AG3 NC#AG5

NC#AH3 NC#AH1

NC#AK3 NC#AK1

NC#AK5

NC#AM3

NC#AK6

NC#AM5

NC#AJ7 NC#AH6

NC#AK8 NC#AL7

NC#V4 NC#U5

NC#W3

NC#V2

NC#Y4

NC#W5

NC#AA3

NC#Y2

NC#J8

HSYNC VSYNC

RSET

AVDD

AVSSQ

VDD1DI VSS1DI

CEC_1

PS_0

PS_1

PS_2

PS_3

TS_A

DDC1CLK

AUX1P AUX1N

DDC2CLK

AUX2P AUX2N

NC#AD20 NC#AC20

NC#AE16 NC#AD16

4

PS_0[3:1]=001

AF2 AF4

AG3 AG5

AH3 AH1

AK3 AK1

AK5 AM3

AK6 AM5

AJ7 AH6

AK8 AL7

V4 U5

W3 V2

Y4 W5

AA3

PLL_ANA LOG_OUT

Y2

J8

AM26

R

AK26

AL25

G

AJ25

AH24

B

AG25

AH26 AJ27

AD22

AG24 AE22

AE23 AD23

AM12

AK12

SVI2_SV D

AL11

SVI2_SV T

AJ11

SVI2_SV C

AL13 AJ13

AG13 AH12

AC19

AD19

AE17

AE20

AE19

AE6 AE5

AD2 AD4

AC11 AC13

AD13 AD11

AD20

FB_GND

AC20

FB_VDDC

ONLY AVAILABLE ON TOPAZ, NC BALLS ON JET/SUN

AE16 AD16

AC1 AC3

Security Classification

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1 2

PX@

RV17

16.2K_0 402_1%

+3VGS

RV371

4.7K_04 02_5%

@

1 2

RV372

4.7K_04 02_5%

PX@

1 2

Pull down for none OBFF design

1 2

RV166

TOPAZ@RV166

TOPAZ@

1 2

RV167

TOPAZ@RV167

TOPAZ@

1 2

RV168

TOPAZ@RV168

TOPAZ@

PS_0

PS_1

PS_2

PS_3

RV178 0_0 402_5%TOPAZ@RV178 0_ 0402_5%TOPAZ@ RV179 0_0 402_5%TOPAZ@RV179 0_ 0402_5%TOPAZ@

RV37 0 _0402_5%TOPAZ @RV 37 0_04 02_5%TOPAZ@ RV51 0 _0402_5%TOPAZ @RV 51 0_04 02_5%TOPAZ@

GPU_VDD_ RUN_FB_L

GPU_VDD_ SEN

Issued Date

1 2 1 2

(default)

RV30 0_ 0402_5%@RV30 0_0402_5%@

RV32 0_ 0402_5%@RV32 0_0402_5%@

Resistor Divider Lookup Lable

R_pd (ohm)R_pu (ohm)

NC

8.45k

4.53k

6.98k

4.53k

3.24k

3.4k

4.75k

0402 1% resistors are equired

4.75k

2k

4.99k

5.62k

10k

NC

Bitd [3:1]

000

001

010

011

100

101

110

111

Capacitor Divider Lookup Lable

Cap (nF) Bitd [5:4]

680nF

00

82nF

01

10nF 10

NC

11

+3VGS

RV373

@ RV373

@

4.7K_04 02_5%

1 2

G

2

13

GPU_WA KEB

D

S

D

S

2N7002H_ SOT23-3

QV20

@

QV20

@

OBFF OPTION: reserve by AMD request

0_0402_ 5%

GPU_SVD

0_0402_ 5%

GPU_SVT

0_0402_ 5%

GPU_SVC

FOR TOPAZ JET/SUN DOESN'T HAVE NATIVE SVI2

1 2

2014/03/03 2015/03/03

GPU_SVD <41 > GPU_SVT <41> GPU_SVC <41 >

Memory ID

000

010

011

100

FOR TOPAZ CORE POWER USE

GPU_VDD_ RUN_FB_L < 41> GPU_VDD_ SEN <4 1>

+VGA_CORE

Compal Secret Data

Deciphered Date

4

Memory Type

SA000068U00

SA00006H400

SA000068R00

SA000065D00

PS_0[5:4]=11

PS_1[3:1]=000

PS_1[5:4]=11

PS_2[3:1]=000

PS_2[5:4]=00

PS_3[3:1]=000

PS_3[5:4]=11

Samsung K4W2G1646E-BC1A

Micron MT41J128M16JT-093G:KSA000067500

Hynix H5TC2G63FFR-11C

Samsung K4W4G1646B-HC11

Micron MT41k256M16HA-107G:E

OPTIAN FOR 3.3V tolerance VR, Check with VR vendor

RV185

1 2

TOPAZ@

0_0402_ 5%

RV164

10K_040 2_5%

TOPAZ@

SVI2_SV D SVI2_SV C

RV165

10K_040 2_5%

+1.8VGS

12

PX@

RV12

8.45K_0 402_1%

PS_0

PS_1

PS_2

PS_3

CV30

@

CV31

@

PX@

CV32

8.45K_0 402_1%

12

1

PX@

RV7

RV7 2K_0402 _1%

2K_0402 _1%

2

0.68U_0402_10V

+1.8VGS

12

@

RV9

8.45K_0 402_1%

12

1

PX@

RV14

4.75K_0 402_1%

2

0.68U_0402_10V

+1.8VGS

12

@

RV57

8.45K_0 402_1%

12

1

PX@

RV19

4.75K_0 402_1%

2

0.68U_0402_10V

+1.8VGS

12

X76@

RV21

8.45K_0 402_1%

12

1

X76@

RV24

@

CV33

2K_0402 _1%

2

0.68U_0402_10V

Configuration Size

+3VGS+1.8VGS+VGA_CORE

RV186

1 2

@

0_0402_ 5%

RV163

RV163 10K_040 2_5%

10K_040 2_5%

@

1 2

@

TOPAZ@

RV184

RV184 10K_040 2_5%

10K_040 2_5%

1 2

Title

Size Document Numb er Rev

Custom

Date: Sheet of

Date: Sheet

5

Strap Name :

PS_0[1] ROM_CONFIG[0]

PS_0[2] ROM_CONFIG[1]

PS_0[3] ROM_CONFIG[2]

PS_0[4] N/A

PS_0[5] AUD_PORT_CONN_PINSTRAP[0]

Strap Name :

PS_1[1] STRAP_BIF_GEN3_EN_A

PS_1[2] TRAP_BIF_CLK_PM_EN

PS_1[3] N/A

PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING

PS_1[5] STRAP_TX_DEEMPH_EN

Strap Name :

PS_2[1] N/A

PS_2[2] N/A

PS_2[3] STRAP_BIOS_ROM_EN

PS_2[4] STRAP_BIF_VGA_DIS

PS_2[5] N/A

Strap Name :

PS_3[1] BOARD_CONFIG[0] (Memory ID)

PS_3[2] BOARD_CONFIG[1] (Memory ID)

PS_3[3] BOARD_CONFIG[2] (Memory ID)

PS_3[4] AUD_PORT_CONN_PINSTRAP[1]

PS_3[5] AUD_PORT_CONN_PINSTRAP[2]

2K4.53K

4.99K

X76 P/N

X7641338L31

X7641338L32

X7641338L33

X7641338L34

X7641338L35

12 46Monday, Marc h 03, 2014

R5174 R5169

1GB

NC 4.75K

1GB001

8.45K 2K

1GB

2GB

6.98K

2GB

4.53K

Compal Electronics, Inc.

JET/TOPAL(2/5)_MSIC

LA-B291P

5

1.0

of

1

2

3

4

5

+1.35VS to +1.35VGS

+1.35V

UV14

AP4800BGM-HF 1N SO-8

8 7

.1U_0402_16V7K

6 5

CV25

1

A A

PX@

1 2

B+

RV35 200K_0402_5%

GPU_PWR_EN#

+1.35VGS arises after VGA_CORE

B B

+0.95VALW

C29

1

@

1U_0402_6.3V6K

2

DGPU_PWR_EN DGPU_PWR_EN_R

GPU_PWR_EN

R1642 0_0402_5%

R1643 0_0402_5%@R1643 0_0402_5%@

+1.8VALW TO +1.8VGS +0.95VALW TO +0.95VGS Load switch

@

12

2

PX@

1.35VSG_GATE

RV36 100K_0402_5%

61

2

ME2N7002D1KW-G 2N_SOT363-6

QV10A

PX@

VL

+1.8VALW

1

C30

@ C30

@

1U_0402_6.3V6K

2

PX@

1 2

VIN 1.8V and 0.95V (VBIAS=5V), IMAX(per channel)=6A,Rds=18mo hm

PX@UV14

PX@

1 2 3

4

12

U1895V

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

APE8990GN3B DFN 14P

PX@

+1.35VGS

10U_0603_6.3V6M

1

2

PX@

CV27

0.1U_0402_16V7K

14

VOUT1

13

VOUT1

12

CT1

11

GND

10

CT2

9

VOUT2

8

VOUT2

15

GPAD

1U_0402_6.3V6K

CV22

CV26

1

RV34

RV34 10_0603_5%

10_0603_5%

@

1 2

2

PX@

3

5

GPU_PWR_EN#

QV10B

4

ME2N7002D1KW-G 2N_SOT363-6

PX@

+1.8VGS

+0.95VGS

1

CV2410U_0603_6.3V6M

CV231U_0402_6.3V6K

2

PX@

1

CV29.1U_0402_16V7K

CV281U_0402_6.3V6K

2

PX@

added on 9/28

+1.8VGS

1 2

+0.95VGS

PX@

C32

0.1U_0402_16V7K

1 2

C31

0.1U_0402_16V7K

+0.95VGS_LS

PX@

+1.8VGS_LS

RV5 0_0805_5%@RV5 0_0805_5%@

1 2

C282200P_0402_50V7K

1 2

C272200P_0402_50V7K

1 2

RV6 0_0805_5%@RV6 0_0805_5%@

1 2

No Use GPU Display Port outpud

UV1G

PX@

UV1G

PX@

U?

NC/DP POWER

?

NC/DP POWER

DP POWER

AG15

DP_VDDR#AG15

AG16

DP_VDDR#AG16

AF16

DP_VDDR#AF16

AG17

DP_VDDR#AG17

AG18

DP_VDDR#AG18

AG19

DP_VDDR#AG19

AF14

DP_VDDR#AF14

AG20

DP_VDDC#AG20

AG21

DP_VDDC#AG21

AF22

DP_VDDC#AF22

AG22

DP_VDDC#AG22

AD14

DP_VDDC#AD14

AG14

DP_VSSR

AH14

DP_VSSR

AM14

DP_VSSR

AM16

DP_VSSR

AM18

DP_VSSR

AF23

DP_VSSR

AG23

DP_VSSR

AM20

DP_VSSR

AM22

DP_VSSR

AM24

DP_VSSR

AF19

DP_VSSR

AF20

DP_VSSR

AE14

DP_VSSR

AF17

DPAB_CALR

216-0841018 A0 SUN PRO S3

NC#AE11 NC#AF11 NC#AE13 NC#AF13

NC#AG8

NC#AG10

NC#AF6 NC#AF7 NC#AF8 NC#AF9

NC#AE1 NC#AE3 NC#AG1 NC#AG6 NC#AH5

NC#AF10

NC#AG9

NC#AH8 NC#AM6 NC#AM8

NC#AG7

NC#AG11

NC#AE10

AE11 AF11 AE13 AF13 AG8 AG10

AF6 AF7 AF8 AF9

AE1 AE3 AG1 AG6 AH5 AF10 AG9 AH8 AM6 AM8 AG7 AG11

AE10

UV1E

AA27

GND

AB24

GND

AB32

GND

AC24

GND

AC26

GND

AC27

GND

AD25

GND

AD32

GND

AE27

GND

AF32

GND

AG27

GND

AH32

GND

K28

GND

K32

GND

L27

GND

M32

GND

N25

GND

N27

GND

P25

GND

P32

GND

R27

GND

T25

GND

T32

GND

U25

GND

U27

GND

V32

GND

W25

GND

W26

GND

W27

GND

Y25

GND

Y32

GND

M6

GND

N13

GND

N16

GND

N18

GND

N21

GND

P6

GND

P9

GND

R12

GND

R15

GND

R17

GND

R20

GND

T13

GND

T16

GND

T18

GND

T21

GND

T6

GND

U15

GND

U17

GND

U20

GND

U9

GND

V13

GND

V16

GND

V18

GND

Y10

GND

Y15

GND

Y17

GND

Y20

GND

R11

GND

T11

GND

AA11

GND

M12

GND

N11

GND

V11

GND

216-0841018 A0 SUN PRO S3

PX@

U?

A3

GND

A30

GND

AA13

GND

AA16

GND

AB10

GND

AB15

GND

AB6

GND

AC9

GND

AD6

GND

AD8

GND

AE7

GND

AG12

GND

AH10

GND

AH28

GND

B10

GND

B12

GND

B14

GND

B16

GND

B18

GND

B20

GND

B22

GND

B24

GND

B26

GND

B6

GND

B8

GND

C1

GND

C32

GND

E28

GND

F10

GND

F12

GND

F14

GND

F16

GND

F18

GND

F2

GND

F20

GND

F22

GND

F24

GND

F26

GND

F6

GND

?

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

VSS_MECH VSS_MECH VSS_MECH

F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6

A32 AM1 AM32

C C

+3VS to +3VS_VGA

+3VALW +3VGS

RV43

20K_0402_5%

3 1

2

1

2

PX@

QV16

QV16 LP2301ALT1G_SOT23-3

LP2301ALT1G_SOT23-3

+5VALW

DGPU_PWR_EN#

RV42

PX@RV42

PX@

20K_0402_5%

D D

DGPU_PWR_EN<27,7>

3VGS_PWR_EN<27>

20K_0402_5%

@

R1640 0_0402_5%

R1641 0_0402_5%@R1641 0_0402_5%@

12

1

2

G

13

D

PX@

QV18

2N7002H_SOT23-3

S

PX@RV43

PX@

CV38

CV38 .1U_0402_16V7K

.1U_0402_16V7K

4.7U_0603_6.3V6K

PX@

2

1

CV36

@

2

DGPU_PWR_EN#

1U_0603_10V6K

1

CV37

2

QV17

12

RV40

RV40 470_0603_5%

470_0603_5%

@

PX@

13

D

G

2N7002H_SOT23-3

S

GPU_PWR_EN<27,41>

RV41

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

RV41

100K_0402_5% @

2014/03/03 2015/03/03

GPU_PWR_EN#

12

+5VALW

RV38

RV38 100K_0402_5%PX@

100K_0402_5%PX@

1 2

3

PX@

5

QV11B

4

Compal Secret Data

ME2N7002D1KW-G 2N_SOT363-6

Deciphered Date

+VGA_CORE

RV39

@ RV39

@

470_0603_5%

1 2 61

PX@

2

DGPU_PWR_EN#

QV11A

ME2N7002D1KW-G 2N_SOT363-6

4

+1.8VGS

RV53

RV53 470_0603_5%

470_0603_5%

@

1 2 61

2

DGPU_PWR_EN# DGPU_PWR_EN#

QV21A

@

ME2N7002D1KW-G 2N_SOT363-6

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

+0.95VGS

RV56

RV56 470_0603_5%

470_0603_5%

@

1 2 3

5

QV21B

4

@

ME2N7002D1KW-G 2N_SOT363-6

Compal Electronics, Inc.

JET/TOPAL(3/5)_PWR/GND

LA-B291P

5

of

13 46Monday, March 03, 2014

1.0

1

2

3

4

5

A A

B B

C C

+VGA_CORE

VDDC

VDDCI

PCIE_VDDC

BIF_VDDC

SPLL_VDDC

TBD

3.5A

1A

0.8A

100mA

VDDR1

PCIE_PVDD

MPLL_PVDD

SPLL_PVDD

VDDR4

VDD_CT

100mA

130mA

75mA

(300mA)

13mA

+TSVDD 13mA 1 00

+DP_VDDR

+DP_VDDC

VDDR3

25mA

7 16 4

10uF 1uF 0.1uF+0.95VGS

1 5(1@) 0

1(1@)0 0

10 1

10uF 1uF 0.1uF+1.35VGS

5(3@) 5 51.5A

10uF+1.8VGS 0.1uF1uF

1 01

1 00

00 0

0 1 0

11 0

1 10

0 1 0

1uF2.2uF10uF

0.1uF

3

+1.35VGS

CV75

@

220U_B2_2.5VM_R35

1A

1

+

2

1

CV74

CV88

2

@ CV74

@

PX@ CV88

PX@

10U_0603_6.3V6M

1

CV87

CV80

CV83

2

@ CV87

@

@ CV80

@

PX@ CV83

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CV76

2

PX@ CV76

PX@

1U_0402_6.3V6K

1

CV78

CV77

CV79

CV81

2

PX@ CV78

PX@

PX@ CV77

PX@

PX@ CV79

PX@

PX@ CV81

PX@

1U_0402_6.3V6K

1

2

.1U_0402_16V7K

1

CV89

CV82

CV86

2

PX@ CV89

PX@

PX@ CV82

PX@

PX@ CV86

PX@

.1U_0402_16V7K

+1.8VGS

+1.35VGS

1

CV84

CV85

2

PX@ CV84

PX@

PX@ CV85

PX@

.1U_0402_16V7K

13mA

0.01uF

1

CV551U_0402_6.3V6K

0

CV551U_0402_6.3V6K

+3VGS

2

PX@

25mA

1

CV561U_0402_6.3V6K

2

PX@

012

+1.8VGS

0.1uF1uF10uF+3VGS

@

1 2

LV1 0_0603_5%

1

CV39

2

PX@ CV39

PX@

10U_0603_6.3V6M

1

CV40

CV41

+1.8VGS

2

1U_0402_6.3V6K

PX@ CV40

1U_0402_6.3V6K

PX@

PX@ CV41

PX@

10U_0603_6.3V6M

@

1 2

LV2 0_0402_5%

1

CV42

2

PX@ CV42

PX@

10U_0603_6.3V6M

1

CV43

+0.95VGS

@

2

1U_0402_6.3V6K

PX@ CV43

1U_0402_6.3V6K

PX@

@

1 2

LV3 0_0402_5%

1U_0402_6.3V6K

1

CV46

2

PX@ CV46

PX@

90mA

+MPLL_PVDD

75mA

+SPLL_PVDD

100mA

+SPLL_VDDC

1

CV90

2

.1U_0402_16V7K

PX@ CV90

.1U_0402_16V7K

PX@

UV1D

PX@

UV1D

PX@

MEM I/O

H13

VDDR1

H16

VDDR1

H19

VDDR1

J10

VDDR1

J23

VDDR1

J24

VDDR1

J9

VDDR1

K10

VDDR1

K23

VDDR1

K24

VDDR1

K9

VDDR1

L11

VDDR1

L12

VDDR1

L13

VDDR1

L20

VDDR1

L21

VDDR1

L22

VDDR1

LEVEL

LEVEL TRANSLATION

TRANSLATION

AA20

VDD_CT

AA21

VDD_CT

AB20

VDD_CT

AB21

VDD_CT

I/O

AA17

VDDR3

AA18

VDDR3

AB17

VDDR3

AB18

VDDR3

V12

VDDR4

Y12

VDDR4

U12

VDDR4

PLL

L8

MPLL_PVDD

H7

SPLL_PVDD

H8

SPLL_VDDC

J7

SPLL_PVSS

216-0841018 A0 SUN PRO S3

U?

PCIE

PCIE_PVDD

NC#AB23 NC#AC23 NC#AD24 NC#AE24 NC#AE25 NC#AE26 NC#AF25

NC#AG26

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

VDDC

CORE

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

POWER

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

BIF_VDDC

ISOLATED

ISOLATED CORE I/O

CORE I/O

VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI

?

+PCIE_PVDD: 50mA (PCIE2.0) 100mA (PCIE3.0)

AM30

AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26

L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22

AA15 N15 N17 R13 R16 R18 Y21 T12 T15 T17 T20 U13 U16 U18 V21 V15 V17 V20 Y13 Y16 Y18 AA12 M11 N12 U11

R21 U21

+VGA_CORE

M13 M15 M16 M17 M18 M20 M21 N20

+PCIE_VDDC: 1A

0.8A

+1.8VGS

1

CV4710U_0603_6.3V6M

CV481U_0402_6.3V6K

2

PX@

1

CV4910U_0603_6.3V6M

CV511U_0402_6.3V6K

CV501U_0402_6.3V6K

2

PX@

+VGA_CORE

VGA_CORE Cap in power side sheet

21A (VDDC + VDDCI (Merged) - PRO S3 (DDR3))

+0.95VGS

1

CV621U_0402_6.3V6K@CV621U_0402_6.3V6K

2

@

VGA_CORE Cap in power side sheet

+0.95VGS

1

CV541U_0402_6.3V6K@CV541U_0402_6.3V6K

CV521U_0402_6.3V6K

CV531U_0402_6.3V6K

2

@

PX@

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/03/03 2015/03/03

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

JET/TOPAL(4/5)_PWR

LA-B291P

5

14 46Monday, March 03, 2014

of

1.0