Compal LA-B161P Z5WAH, Aspire E1-572 Schematic

A

B

C

D

E

Compal Confidential

Model Name : Z5WAH

1 1

File Name : LA-B161P

Compal Confidential

2 2

EA50_HB M/B Schematics Document

Intel Broadwell ULT (Broadwell + Wildcat point)

3 3

2014-03-04

REV:1.0

For 20140225 pre-MP gerber

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Z5WAH M/B LA-B161P

E

1.0

1 44Tuesday, March 04, 2014

1.0

A

B

C

D

E

CRT Conn.

LCD Conn.

LVDS-Translator

LVDS

RTD2132R

page 25

page 17

eDP

DDI

Flexible IO

SATA3.0SATA3.0

port 0

Intel Broadwell ULT

Broadwell ULT

Processor

OPI

Wildcat point

PCH

Memory BUS

Dual Channel

1.35V DDR3L 1333/1600

USBx8

HD Audio

48MHz

USB 3.0 conn x1

USB port 0

page 26 page 18

3.3V 24MHz

USB 2.0 conn x2

1 1

page 21

page 18

DP to VGA ITE IT6513FN

2 2

page 20

DP x 2 lanes HDMI x 4 lanes

MINI Card

WLAN

page 24

PCIe 2.0 5GT/s

port 4

PCIe 2.0 5GT/s

port 3

HDMI Conn.

page 19

6.0 Gb/s 6.0 Gb/s

page 25

port 2

LAN(GbE)/ Card Reader

Realtek 8411B

Card Reader

2 in 1 (SD)

page 23

3 3

page 22

RJ45 conn.

page 23

SATA CDROM Conn.

SATA HDD Conn.

ENE KB9012/9022

RTC CKT.

page 6

Power On/Off CKT.

page 28

Sub Board

LS-B161P

PWR/B

page 26

Touch Pad

PS2 / I2C

page 28

1168pin BGA

LPC BUS

CLK=24MHz

page 27

Int.KBD

page 04~14

page 28

SPI

SPI ROM x2

page 7

Int. Speaker Combo Jack

page 29 page 29 page 29

Fan Control

204pin DDR3L-SO-DIMM X1

BANK 0, 1, 2, 3

204pin DDR3L-SO-DIMM X1

BANK 4, 5, 6, 7

page 30

CMOS Camera

(port 1,2)USB/B

page 26

HDA Codec

ALC283

USB port 7

page 29

Int. MIC

page 15

page 16

Finger Print

(port 5)

USB

26

Touch Screen

I2C (PORT1) USB (port 6)

page 18

LS-B162P

DC/DC Interface CKT.

page 31

4 4

Power Circuit DC/DC

page 39~50

A

USB/B

LS-B163P

BATT/B (UMA)

(port 1,2)

page 26

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Z5WAH M/B LA-B161P

E

1.0

2 44Tuesday, February 25, 2014

1.0

A

Voltage Rails

Power Plane Description

VIN

BATT+ Battery power supply (12.6V) N/A N/A N/A

B+

1 1

+CPU_CORE

+0.675VS +0.675VS power rail for DDR3L terminator

+1.05VS_VTT +1.05V power rail for CPU

+1.5VS

+3VALW +3VALW always on power rail

+3VLP B+ to +3VLP power rail for suspend power ON ON

+3VS

+5VALW

+5VS +5VALW to +5VS power rail OFFON OFF

+RTCVCC RTC power

2 2

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

+1.35V power rail for DDR3L ON ON OFF+1.35V

+1.5V power rail for CPU

+3VALW to +3VS power rail

+5VALWP to +5VALW power rail

B

S1 S3 S5

N/A N/A N/A

ON

ON OFF OFF

ON

ON ON*

OFF

ON

ON ON*

N/AN/AN/A

OFFOFF

ON

OFF

ONONON

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

HIGH

LOWLOWLOW

LOW LOW LOW LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3

*

4 5 6 7 56K +/- 5% 8 9 10 11 12 13

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0 12K +/- 5% 15K +/- 5% 20K +/- 5% 27K +/- 5% 33K +/- 5% 43K +/- 5%

AD_BID

0 V

0.347 V 0.354 V 0.360 V

0.423 V

0.541 V

0.691 V

0.807 V 0.819 V 0.831 V

0.978 V

1.169 V 75K +/- 5% 100K +/- 5% 130K +/- 5% 160K +/- 5% 200K +/- 5% 240K +/- 5%

1.398 V

1.634 V

1.849 V 1.865 V 1.881 V

2.015 V 2.031 V 2.046 V

2.185 V 2.200 V 2.215 V

2.316 V 2.329 V 2.343 V

D

ON

HIGHHIGHHIGH

HIGH

V typ

AD_BID

ON

OFF

ON

OFF

0 V 0 V

0.430 V

0.550 V

0.702 V 0.713 V

0.992 V

1.185 V

1.414 V 1.430 V

1.650 V 1.667 V

ON ON

ON

OFF

V

AD_BID

0.438 V

0.559 V

1.006 V

1.200 V

E

LOW

OFF

max

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

BOARD ID Table

EC SM Bus1 address

Device

Smart Battery

Address Address

0001 011X

PCH SM Bus address

Device Address

ChannelA D IMM0

3 3

DIMM1ChannelB J DIMM2

1001 000x

1001 010x

JDIMM1

EC SM Bus2 address

Device

On Board Therma l Senser

VGA Internal Thermal Senser

G Senser

0100 110x

0100 000x

0011 000x

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

1.0

USB Port Table

USB 2.0 Port

0 1 2

EHCI1

3 4 5 6 7

3 External USB Port

USB Port(Left 3.0) USB Port(Right 2.0) USB Port(Right 2.0)

Mini Card (WLAN+BT) Finger Print Touch Screen Camera

BTO Option Table

BTO Item BOM Structure

Unpop @

EC 9022 9022@ EC 9012 9012@ UMA Component 2 SPI ROM 2ROM@ 1 SPI ROM 1ROM@ For EDP panel EDP@ eDP to LVDS LVDS@ Touch Screen TS@ 1 DMIC 2 DMIC

Reservec for EMC XEMC@ G-Sensor BA@ TPM Module BA@ HDD redriver BA@

CONN@Connector

UMA@

EA50@ EA54@ EMC@EMC Component

PortUSB 3.0

0

USB Port(Left 3.0)

4 4

XHCI

1 2 3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Z5WAH M/B LA-B161P

E

1.0

3 44Tuesday, February 25, 2014

1.0

5

ZZZ

PCB

CPU

D D

PDC2957

CPU

I3-4158

CPU

PMD3558U

CPU

I5-4258

CPU

I3-4010

C C

CPU

I3-4030

CPU

I5-4200

CPU

I5-4210

CPU

BDW-ES1

CPU

B B

BDW-ES1

DAZ15400100

S IC CL8064701570000 SR1DV D0 1.4G ABO!

SA00007G060

S IC CL8064701526902 SR18B C0 2G ABO!

SA00006VW40

S IC CL8064701569500 SR1E8 D0 1.7G ABO!

SA00007G260

S IC CL8064701481503 SR18A C0 2.4G ABO!

SA00006VZ60

S IC CL8064701478202 SR16Q C0 1.7G ABO!

SA00006SX70

S IC CL8064701552900 SR1EN D0 1.9G BGA 1168

SA00007TA60

S IC CL8064701477702 SR170 C0 1.6G ABO!

SA00006SMB0

S IC CL8064701477802 SR1EF D0 1.7G BGA 1168 ABO !

SA00007LO70

S IC CL8065801674128 QG21 C0 1.2G BGA 1168

SA00007OS10

S IC CL8065801675027 QG22 C0 1.2G BGA 1168

SA00007OT10

U1

PDC2957@

U1

I34158@

U1

PMD3558U@

U1

I54258@

U1

I34010@

U1

I34030@

U1

I54200@

U1

I54210@

U1

QG21@

U1

QG22@

DAZ15400100

4319SOBOL01

4319SOBOL02

4319SOBOL03

4319SOBOL04

4319SOBOL05

4319SOBOL08

4319SOBOL09

4319SOBOL10

4319SOBOL06

4

DP to CRT

HDMI

DDR3 Compensation Signals Trace width=12~15 mil, Spcing=20 mils Max trace length= 500 mil

+1.05VS_VTT

H_PROCHOT#27,32

CPU_DP1_N020 CPU_DP1_P020 CPU_DP1_N120 CPU_DP1_P120

CPU_DP2_N019 CPU_DP2_P019 CPU_DP2_N119 CPU_DP2_P119 CPU_DP2_N219 CPU_DP2_P219 CPU_DP2_N319 CPU_DP2_P319

C94 6.8P_0402_ 50V8C

1 2

XEMC@

H_PECI27

R68

12

62_0402_5%

C95 6.8P_04 02_50V8C

XEMC@

R6 10K_0402_5% R6 10K_0402_5%

C60 6.8P_04 02_50V8C

XEMC@

R11 200_ 0402_1% R11 200_ 0402_1%

1 2 1 2

R13 120_ 0402_1% R13 120_ 0402_1% R41 100_ 0402_1% R41 100_ 0402_1%

1 2

DDR_PG_CTRL15

R68

1 2

3

R8

R8 56_0402_5%

56_0402_5%

1 2

DDR_PG_CTRL

T20 @T20 @ T2 @T2 @

H_PROCHOT#_R

H_CPUPWRGD

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 DIMM_DRAMRST#

12

33P_0402_50V8J

C2144

EMC@

C54 C55 B58 C58 B55 A55 A57 B57

C51 C50 C53 B54 C49 B50 A53 B53

AU60 AV60 AU61 AV15 AV61

D61 K61 N62

K63

C61

U1A

DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3

DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3

HASWELL-MCP-E-ULT_BGA116 8

@

U1B

PROC_DETECT CATERR PECI

PROCHOT

PROCPWRGD

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST SM_PG_CNTL1

HASWELL-MCP-E-ULT_BGA116 8

@

DDI EDP

THERMAL

HASWELL_MCP_E

1 OF 19

HASWELL_MCP_E

MISC

PWR

DDR3

2 OF 19

2

C45

EDP_TXN0

B46

EDP_TXP0

A47

EDP_TXN1

B47

EDP_TXP1

C47

EDP_TXN2

C46

EDP_TXP2

A49

EDP_TXN3

B49

EDP_TXP3

A45

EDP_AUXN

B45

EDP_AUXP

Rev1p2

PRDY

PREQ PROC_TCK PROC_TMS

PROC_TRST

PROC_TDI

PROC_TDO

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

Rev1p2

D20 A43

J62 K62 E60 E61 E59 F63 F62

J60 H60 H61 H62 K59 H63 K60 J61

EDP_RCOMP

EDP_DISP_UTIL

JTAG

EDP_TXN0 18 EDP_TXP0 18 EDP_TXN1 18 EDP_TXP1 18

EDP_AUXN 18 EDP_AUXP 18

EDP_COMP

1 2

R1 24.9_0402_1% R1 24.9_0402_1%

Trace width=20 mils,Spacing=25mil,Max length=100mils

EDP_DISP_UTIL 18

XDP_PRDY#_R XDP_PREQ#_R XDP_TCK_R XDP_TMS_R XDP_TRST#_R XDP_TDI_R XDP_TDO_R

XDP_BPM#0_R XDP_BPM#1_R

T148@ T148@ T149@ T149@ T150@ T150@ T151@ T151@ T152@ T152@ T153@ T153@

eDP Panel

T157@ T157@ T158@ T158@ T159@ T159@ T160@ T160@ T161@ T161@ T162@ T162@ T163@ T163@

T164@ T164@ T165@ T165@

1

+VCCIOA_OUT

+1.35V

12

R184

R184 470_0603_5%

470_0603_5%

2

C96

6.8P_0402_50V8C

1

XEMC@

DIMM_DRAMRST# 15,16

Close to AV15

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(1/11) DDI,MSIC,XDP

Z5WAH M/B LA-B161P

1

4 44Tuesday, March 04, 2014

1.0

5

4

3

2

1

D D

U1C

AH63

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26

C C

B B

DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

SA_DQ0

AH62

SA_DQ1

AK63

SA_DQ2

AK62

SA_DQ3

AH61

SA_DQ4

AH60

SA_DQ5

AK61

SA_DQ6

AK60

SA_DQ7

AM63

SA_DQ8

AM62

SA_DQ9

AP63

SA_DQ10

AP62

SA_DQ11

AM61

SA_DQ12

AM60

SA_DQ13

AP61

SA_DQ14

AP60

SA_DQ15

AP58

SA_DQ16

AR58

SA_DQ17

AM57

SA_DQ18

AK57

SA_DQ19

AL58

SA_DQ20

AK58

SA_DQ21

AR57

SA_DQ22

AN57

SA_DQ23

AP55

SA_DQ24

AR55

SA_DQ25

AM54

SA_DQ26

AK54

SA_DQ27

AL55

SA_DQ28

AK55

SA_DQ29

AR54

SA_DQ30

AN54

SA_DQ31

AY58

SA_DQ32

AW58

SA_DQ33

AY56

SA_DQ34

AW56

SA_DQ35

AV58

SA_DQ36

AU58

SA_DQ37

AV56

SA_DQ38

AU56

SA_DQ39

AY54

SA_DQ40

AW54

SA_DQ41

AY52

SA_DQ42

AW52

SA_DQ43

AV54

SA_DQ44

AU54

SA_DQ45

AV52

SA_DQ46

AU52

SA_DQ47

AK40

SA_DQ48

AK42

SA_DQ49

AM43

SA_DQ50

AM45

SA_DQ51

AK45

SA_DQ52

AK43

SA_DQ53

AM40

SA_DQ54

AM42

SA_DQ55

AM46

SA_DQ56

AK46

SA_DQ57

AM49

SA_DQ58

AK49

SA_DQ59

AM48

SA_DQ60

AK48

SA_DQ61

AM51

SA_DQ62

AK51

SA_DQ63

HASWELL-MCP-E-ULT_BGA116 8

@

HASWELL_MCP_E

DDR CHANNEL A

3 OF 19

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1

SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_RAS

SA_WE

SA_CAS

SA_BA0 SA_BA1 SA_BA2

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

Rev1p2

AU37 AV37 AW36 AY36

AU43 AW43 AY42 AY43

AP33 AR32

AP32

AY34 AW34 AU34

AU35 AV35 AY41

AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42

AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48

AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49

AP49 AR51 AP51

DDRA_ODT0

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

SA_CLK_DDR#0 15 SA_CLK_DDR0 15 SA_CLK_DDR#1 15 SA_CLK_DDR1 15

DDRA_CKE0_DIMMA 15 DDRA_CKE1_DIMMA 15

DDRA_CS0_DIMMA# 15 DDRA_CS1_DIMMA# 15

T4@ T4@

DDR_A_RAS# 15

DDR_A_WE# 15

DDR_A_CAS# 15

DDR_A_BS0 15 DDR_A_BS1 15 DDR_A_BS2 15

SM_DIMM_VREFCA 15 SA_DIMM_VREFDQ 15 SB_DIMM_VREFDQ 16

DDR_A_D[0..63]15

DDR_A_MA[0..15]15

DDR_A_DQS#[0..7]15

DDR_A_DQS[0..7]15

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

U1D

AY31

SB_DQ0

AW31

SB_DQ1

AY29

SB_DQ2

AW29

SB_DQ3

AV31

SB_DQ4

AU31

SB_DQ5

AV29

SB_DQ6

AU29

SB_DQ7

AY27

SB_DQ8

AW27

SB_DQ9

AY25

SB_DQ10

AW25

SB_DQ11

AV27

SB_DQ12

AU27

SB_DQ13

AV25

SB_DQ14

AU25

SB_DQ15

AM29

SB_DQ16

AK29

SB_DQ17

AL28

SB_DQ18

AK28

SB_DQ19

AR29

SB_DQ20

AN29

SB_DQ21

AR28

SB_DQ22

AP28

SB_DQ23

AN26

SB_DQ24

AR26

SB_DQ25

AR25

SB_DQ26

AP25

SB_DQ27

AK26

SB_DQ28

AM26

SB_DQ29

AK25

SB_DQ30

AL25

SB_DQ31

AY23

SB_DQ32

AW23

SB_DQ33

AY21

SB_DQ34

AW21

SB_DQ35

AV23

SB_DQ36

AU23

SB_DQ37

AV21

SB_DQ38

AU21

SB_DQ39

AY19

SB_DQ40

AW19

SB_DQ41

AY17

SB_DQ42

AW17

SB_DQ43

AV19

SB_DQ44

AU19

SB_DQ45

AV17

SB_DQ46

AU17

SB_DQ47

AR21

SB_DQ48

AR22

SB_DQ49

AL21

SB_DQ50

AM22

SB_DQ51

AN22

SB_DQ52

AP21

SB_DQ53

AK21

SB_DQ54

AK22

SB_DQ55

AN20

SB_DQ56

AR20

SB_DQ57

AK18

SB_DQ58

AL18

SB_DQ59

AK20

SB_DQ60

AM20

SB_DQ61

AR18

SB_DQ62

AP18

SB_DQ63

HASWELL-MCP-E-ULT_BGA116 8

@

HASWELL_MCP_E

DDR CHANNEL B

4 OF 19

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_CS#0 SB_CS#1

SB_ODT0

SB_RAS

SB_WE

SB_CAS

SB_BA0 SB_BA1 SB_BA2

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

Rev1p2

AM38 AN38 AK38 AL38

AY49 AU50 AW49 AV50

AM32 AK32

AL32

AM35 AK35 AM33

AL35 AM36 AU49

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

DDRB_ODT0

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS3

DDR_B_DQS4

DDR_B_DQS5

DDR_B_DQS6

DDR_B_DQS7

DDR_B_D[0..63]16

DDR_B_MA[0..15]16

DDR_B_DQS#[0..7]16

DDR_B_DQS[0..7]16

SB_CLK_DDR#0 16 SB_CLK_DDR0 16 SB_CLK_DDR#1 16 SB_CLK_DDR1 16

DDRB_CKE0_DIMMB 16 DDRB_CKE1_DIMMB 16

DDRB_CS0_DIMMB# 1 6 DDRB_CS1_DIMMB# 1 6

T5@ T5@

DDR_B_RAS# 16 DDR_B_WE# 16 DDR_B_CAS# 16

DDR_B_BS0 16 DDR_B_BS1 16 DDR_B_BS2 16

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(2/11) DDRIII

Z5WAH M/B LA-B161P

1

1.0

5 44Tuesday, February 25, 2014

1.0

5

4

3

2

1

C154

R122 0_0402_5%@R122 0_0402_5%@

PCH_RTCX1

PCH_RTCX2

1

2

18P_0402_50V8J

+RTCVCC

RP14

1 8 2 7 3 6 4 5

33_0804_8P4R_5%

1 2

+RTCVCC+RTCBATT +CHGRTC

1

C151

2

EMC@

C151

0.1U_0402_16V4Z

+RTCVCC

HDA_RST# HDA_SYNC HDA_BIT_CLK HDA_SDOUT

1

C149

1U_0402_6.3V6K

R69

R69 20K_0402_1%

20K_0402_1%

1 2 1 2

R70

R70 20K_0402_1%

20K_0402_1%

1U_0402_6.3V6K

C150

2

1

2

RTCRST close RAM door

ME CMOS

1 2

JME1

JME1 SHORT PADS

SHORT PADS

@

+RTCVCC

R72 1M_040 2_5% R72 1M_0402_5%

1 2

PCH_RTCRST#27

reserve PCH_RTCRST# to EC pin 27 for clear CMOS

HDA_SDIN029

1 2

R9751 _0402_5% @ R9751_0402_5% @

T6 @T6 @

T7 @T7 @ T8 @T8 @ T9 @T9 @

T95 @T95 @

T21 @T21 @ T19 @T19 @ T15 @T15 @ T10 @T10 @ T11 @T11 @ T22 @T22 @ T12 @T12 @

PCH_RTCX1 PCH_RTCX2 SM_INTRUDER# PCH_INTVRMEN PCH_SRTCRST# PCH_RTCRST#

HDA_BIT_CLK HDA_SYNC HDA_RST# HDA_SDIN0

HDA_SDOUT

PCH_JTAG_RST#

PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS

PCH_TCK_JTAGX

U1E

AW5

RTCX1

AY5

RTCX2

AU6

INTRUDER

AV7

INTVRMEN

AV6

SRTCRST

AU7

RTCRST

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST/I2S_MCLK

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN/I2S1_TXD

AV10

HDA_DOCK_RST/I2S1_SFRM

AY8

I2S1_SCLK

AU62

PCH_TRST

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD

AC4

RSVD

AE63

JTAGX

AV2

RSVD

HASWELL-MCP-E-ULT_BGA116 8

@

HASWELL_MCP_E

RTC

JTAG

5 OF 19

SATA_IREF

RSVD RSVD

SATALED

Rev1p2

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

V1 U1 V6 AC1

A12 L11 K10 C12 U3

PCH_GPIO34 PCH_GPIO35 PCH_GPIO36 PCH_GPIO37

SATA_IREF

T13@ T13@ T14@ T14@

SATA_RCOMP

R10

1 2

10K_0402_5%

SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3 SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2 SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1

SATAAUDIO

SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0

SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA_RCOMP

SATA_PRX_DTX_N0 25 SATA_PRX_DTX_P0 25 SATA_PTX_DRX_N0 25 SATA_PTX_DRX_P0 25

SATA_PRX_DTX_N1 25 SATA_PRX_DTX_P1 25 SATA_PTX_DRX_N1 25 SATA_PTX_DRX_P1 25

PCH_GPIO34 9 PCH_GPIO35 9 PCH_GPIO36 9 PCH_GPIO37 9

1 2

R75 0_0603_ 5%@R7 5 0_0603_5%@

R2 3.01K_0402_1%R2 3.01K_0402_1%

1 2

+3VS

SATA_RCOMP, IREF Trace width=12~15 mil, Spcing=12 mils Max trace length= 500 mil

HDD

ODD

+1.05VS_ASATA3PLL

1 2

R101 10M_0402_5%

Y1

32.768KHZ_12.5PF_Q1 3FC135000040

15P_0402_50V8J

R73 330K_ 0402_5% R73 330K_ 0402_5%

1 2

R74 330K_ 0402_5%@R74 330K_0402_5%@

1 2

12

D D

1

C153

2

PCH_INTVRMEN

INTVRMEN

H

：：：：

Integrated VRM enable

*

L

：：：：

Integrated VRM disable

C C

HDA for AUDIO

HDA_RST_AUDIO#29

HDA_SYNC_AUDIO29 HDA_BITCLK_AUDIO29 HDA_SDOUT_AUDIO29

HDA_SDO27

ME Debug

W=20mils W=20milstrace width 10mil

D23

2

1

B B

BAS40-04_SOT23-3

3

+RTCBATT

+CHGRTC

20mil

+RTCVCC

1

C168

0.1U_0402_16V4Z

@

A A

2

D32

1

CHN202UPT_SC70-3

@

R446

R446 1K_0402_5%

1K_0402_5%

@

1 2

+RTCBATT_R

3

20mil

5

+RTCBATT

1

+

-

JBATT1

JBATT1 LOTES_AAA-BAT-054-K01

LOTES_AAA-BAT-054-K01

2

CONN@

SP07000H700

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(3/11) RTC,SATA,XDP

Z5WAH M/B LA-B161P

1

6 44Tuesday, February 25, 2014

1.0

5

4

3

HASWELL_MCP_E

U1F

HASWELL_MCP_E

2

1

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5/GPIO23

HASWELL-MCP-E-ULT_BGA116 8

@

U1G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME

AA3

SPI_CLK

Y7

SPI_CS0

Y4

SPI_CS1

AC2

SPI_CS2

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

HASWELL-MCP-E-ULT_BGA116 8

@

LPC

SPI C-LINK

HASWELL_MCP_E

7 OF 19

CLOCK

SIGNALS

6 OF 19

SMBUS

SML1ALERT/PCHHOT/GPIO73

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

SMBALERT/GPIO11

SML0ALERT/GPIO60

SML1CLK/GPIO75

SML1DATA/GPIO74

for Share EC ROM, +3VS change to +3VALW

+3V_SPI

PVT

R498 0_0402_5%@R498 0_0402_5%@

1 2

R500 0_0402_5%@R500 0_0402_5%@

1 2 1 2

R502 0_0402_5%@R502 0_0402_5%@ R505 0_0402_5%@R505 0_0402_5%@

1 2

+3V_SPI

RP19

1 8 2 7 3 6 4 5

15_0804_8P4R_5%

RP20

1 8 2 7 3 6 4 5

PVT modify 01/20

PCH_SPI_MOSI PCH_SPI_CLK PCH_SPI_HOLD1# PCH_SPI_MISOPCH_SPI_MISO_1

33_0804_8P4R_5%

@

1 2

EC_SPI_SO 27 EC_SPI_CLK 27 EC_SPI_SI 27 EC_SPI_CS# 27

R126

R126 0_0402_5%@

0_0402_5%@ R123

R123 0_0402_5%@

0_0402_5%@

+3VALW

+3VS

SPI ROM

From EC (For share ROM)

DIFFCLK_BIASREF

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLKOUT_LPC_0 CLKOUT_LPC_1

SML0DATA

1

2

15P_0402_50V8JC315P_0402_50V8J

R108 15_0402_5%

12

PCH_SPI_CLK_1

@ R109

@

33_0402_5%

XTAL24_IN

XTAL24_OUT

PCH_SPI_IO2_1 PCH_SPI_IO3_1

PCH_SPI_HOLD1#

PCH_SPI_WP1#

PCH_SPI_CS1# PCH_SPI_MISO_2

R109

12

PCH_SPI_IO2_2

PCIE LAN

PCH_SPI_CS0# PCH_SPI_MISO_1

12

PCH_SPI_IO2_1

SPI ROM ( 4MByte )

WLAN

+3VS

12

R115

R115 10K_0402_5%

10K_0402_5%

PCH_GPIO22

SPI ROM ( 8MByte )

U6

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

EN25QH64-104HIP_SO8

U7

1

CS#

2

DO

3

WP#

4

GND

EN25QH32-104HIP_SO8

@

HOLD#(IO3)

VCC

HOLD#

CLK

DI

VCC

DI(IO0)

8 7 6 5

CLK

CLK_PCIE_LAN#22 CLK_PCIE_LAN22

LAN_CLKREQ#22 CLK_PCIE_MINI1#24 CLK_PCIE_MINI124 MINI1_CLKREQ#24,8

+3V_SPI

8 7 6 5

PCH_SPI_IO3_2 PCH_SPI_CLK_2 PCH_SPI_MOSI_2

+3VS

C66

1 2

0.1U_0402_16V4Z

PCH_SPI_IO3_1 PCH_SPI_CLK_1 PCH_SPI_MOSI_1

+3V_SPI

PCH_GPIO189

PCH_GPIO199

CLK_PCIE_LAN# CLK_PCIE_LAN

R52 10K_0 402_5% R52 10K_0402_5%

CLK_PCIE_MINI1# CLK_PCIE_MINI1 MINI1_CLKREQ#

PCH_GPIO22

PCH_GPIO239

C67

1 2

0.1U_0402_16V4Z

1 2

LPC_AD027,28 LPC_AD127,28 LPC_AD227,28 LPC_AD327,28

LPC_FRAME#27,28

@

PCH_GPIO18

PCH_GPIO19

PCH_GPIO23

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#

PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1#

PCH_SPI_MOSI PCH_SPI_MISO PCH_SPI_WP1#

PCH_SPI_HOLD1#

PCH_SPI_MOSI_1 PCH_SPI_CLK_1 PCH_SPI_IO3_1

PCH_SPI_MOSI_1 PCH_SPI_CLK_1 PCH_SPI_MISO_1 PCH_SPI_CS0#

PCH_SPI_MISO_2 PCH_SPI_MISO PCH_SPI_IO3_2 PCH_SPI_HOLD1# PCH_SPI_CLK_2 PCH_SPI_CLK PCH_SPI_MOSI_2 PCH_SPI_MOSI

12

R481M_0402_5% R481M_04 02_5%

Y2

24MHZ_12PF_X3G024 000DC1H

+3V_SPI

123

1

2

15P_0402_50V8JC215P_0402_50V8J

R105 1K_0402_5% R105 1K_0402_5 %

1 2

R106 1K_0402_5% R106 1K_0402_5 %

1 2

R103 1K_0402_5%@R103 1K_0402_5%@

1 2 1 2

R102 1K_0402_5%@R102 1K_0402_5%@

PCH_SPI_WP1#

Reserve for EMI(Near SPI ROM)

C152

C152 10P_0402_50V8J

10P_0402_50V8J

1 2

XEMC@

PCH_SPI_WP1#

4

C3

R104 33_0402_5%XEMC@R104 33_0402_5%XEMC@

D D

C2

C C

B B

A A

XTAL24_IN

XTAL24_OUT

RSVD RSVD

Rev1p2

SMBCLK

SMBDATA

SML0CLK

CL_CLK

CL_DATA

CL_RST

Rev1p2

A25 B25

K21 M21 C26

C35 C34 AK8 AL8

AN15 AP15

B35 A35

AN2 AP2 AH1 AL2 AN1 AK1 AU4 AU3 AH3

AF2 AD2 AF4

XTAL24_IN XTAL24_OUT

T16@ T16@ T17@ T17@

XCLK_BIASREF

1 2

R140 10K_0402_5% R140 10K_04 02_5% R141 10K_0402_5% R141 10K_04 02_5%

1 2 1 2

R142 10K_0402_5% R142 10K_04 02_5% R148 10K_0402_5% R148 10K_04 02_5%

1 2

CLKOUT_LPC0 CLKOUT_LPC1

CLK_BCLK_ITP# CLK_BCLK_ITP

PCH_GPIO11 PCH_SMBCLK PCH_SMBDATA PCH_GPIO60 SML0CLK SML0DATA PCH_GPIO73 SML1CLK SML1DATA

DMN66D0LDW-7_ SOT363-6

PCH_SMBDATA D_CK_SDATA

PCH_SMBCLK D_CK_SCLK

DMN66D0LDW-7_ SOT363-6

R78 3.01 K_0402_1%R78 3.01K_0402_1%

1 2

R390 22_0402_5%

EMC@

R390 22_0402_5%

EMC@

R395 22_0402_5%

TPM@

R395 22_0402_5%

TPM@

T184@ T184@ T183@ T183@

PCH_GPIO11 9

PCH_SMBCLK 24

PCH_SMBDATA 24

PCH_GPIO60 9

PCH_GPIO73 9

T23@ T23@ T24@ T24@ T25@ T25@

+3VS

Q7A

6 1

3 4

Q7B

Q8A

6 1

SML1CLK

SML1DATA

DMN66D0LDW-7_ SOT363-6

12 12

2

+3VS

2

3 4

Q8B

5

R116

4.7K_0402_5%

5

+1.05VS_AXCK_LCPLL

CLK_PCI_LPC 27 CLK_PCI_TPM 28

SML0CLK SML0DATA PCH_SMBCLK PCH_SMBDATA

SML1CLK SML1DATA

+3VS

R119

4.7K_0402_5%

1 2

D_CK_SDATA 15,16,30

D_CK_SCLK 15,16,30

PU 2.2K at EC side (+3VS)

EC_SMB_CK2 27

EC_SMB_DA2 27

+3VALW_PCH

RP8 2.2K_0804_8P4R_5%RP8 2.2K_0804_8P4R_5%

1 8 2 7 3 6 4 5

R114 2.2K_0402_5% R114 2.2K_0402_ 5%

1 2 1 2

R113 2.2K_0402_5% R113 2.2K_0402_ 5%

DDR, G-sensor

VGA, LVDS, EC

2ROM is SPI ROM 2M + 4M Byte

Reserve for EMI(Near SPI ROM)

C453

C453 10P_0402_50V8J

R108 33 Ohm SD028330A80 RP19 33 Ohm SD309330A80 U6 SA00004UG00 POP R102,R103,RP20,C67,U7,R109

5

10P_0402_50V8J

1 2

XEMC@

R402 33_0402_5%XEMC@R402 33_0402_5%XEMC@

12

PCH_SPI_CLK_2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(4/11) CLK,SPI,SMBUS

Z5WAH M/B LA-B161P

1

7 44Tuesday, February 25, 2014

1.0

5

+3VS

12

R227

R227 10K_0402_5%

10K_0402_5%

SYS_RESET#

2

C513

0.01U_0402_16V7K

D D

0.01U_0402_16V7K

1

XEMC@

place near AC3

R117 10K_0402_5% R117 10K_0402_5 %

PCH_RSMRST#

ACIN2 7,32,34

RB751V-40_SOD323-2

C C

VGATE11,39

B B

A A

+3VS

R205

10K_0402_5%

R214

@

PCH_PWROK

VGATE_3V

10K_0402_5%

2

3

RP27

1 8 2 7 3 6 4 5

R210

1 2

12

Project_ID0Project_ID1

1 2

+3VALW_PCH

R245

100K_0402_5%

@

D21

@D21

@

1 2

2

B

1

A

12

U43

R208

MC74VHC1G08DFT2G_SC70-5

@

U17

NC1VCC

A

GND

74AUP1G07GW_TSSOP5

@

10K_0804_8P4R_5%

R210

10K_0402_5%

+3VS+3VS

12

R204

10K_0402_5%

EA54@

R215

10K_0402_5%

EA50@

1 2

12

+3VS

5

P

Y

G

3

+1.05VS_VTT

5

4

Y

G_SEN_INT PCH_GPIO80 MINI1_CLKREQ# DEVSLP0

PCH_GPIO77

PCH_ACIN

4

SYS_PWROK

VGATE_3V

Note: Deep Sx need use EC GPIO for ACPRESENT function

R65

R65 0_0402_5%

0_0402_5%

1 2

12

R207

R207 10K_0402_5%

10K_0402_5%

@

+3VS

12

R310

10K_0402_5%

@

MINI1_CLKREQ# 24,7 DEVSLP0 25, 9

Project ID

*

EA50 EA54 Reserved Reserved

PCH_PWROK

VGATE_3V 27

4

PCH_PWROK27 VCCST_PG_EC11,27

PCH_PWROK_R

PLT_RST#27,28

PCH_RSMRST#27

SUSWARN#9

PBTN_OUT#27

+3VALW_PCH

Project_ID0Project_ID1

GPIO53GPIO54 0 0 0 1 1 1

SYS_PWROK

1 2

R61 0_04 02_5%@R6 1 0_0402_5%@

1 2 1 2

R62 0_04 02_5%@R6 2 0_0402_5%@ R63 0_04 02_5%@R6 3 0_0402_5%@

1 2

R64 0_040 2_5%@R64 0_0402_5%@

1 2

R79 0_04 02_5%@R7 9 0_0402_5%@

1 2

R110 0_0402_5%@R110 0_0402_5%@

1 2

R156 8.2K_0402_5% R156 8.2K_04 02_5%

R206

R206 0_0402_5%@

0_0402_5%@

SUSACK#SUSWARN# SYS_RESET#

SYS_PWROK_R

PCH_PWROK_R PM_APWROK

PLT_RST#

PCH_RSMRST#_R

SUSWARN# PBTN_OUT#_R PCH_ACIN PCH_BATLOW#

T31 @T31 @

3

U1H

AK2

SUSACK

AC3

SYS_RESET

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST

AW6

RSMRST

AV4

SUSWARN/SUSPWRDNACK/GPIO30

AL7

PWRBTN

AJ8

ACPRESENT/GPIO31

AN4

BATLOW/GPIO72

AF3

SLP_S0

AM5

SLP_WLAN/GPIO29

HASWELL-MCP-E-ULT_BGA116 8

@

HASWELL_MCP_E

SYSTEM POWER MANAGEMENT

8 OF 19

DSWVRMEN

DPWROK

CLKRUN/GPIO32

SUS_STAT/GPIO61

SUSCLK/GPIO62

SLP_S5/GPIO63

SLP_S4 SLP_S3

SLP_SUS

SLP_LAN

WAKE

SLP_A

Rev1p2

AW7 AV5 AJ5

V5 AG4 AE6 AP5

AJ6 AT4 AL5 AP4 AJ7

2

DSWODVREN PCH_RSMRST#_R PCH_PCIE_WAKE#

CLKRUN#

SUSCLK PM_SLP_S5#

PM_SLP_S4# PM_SLP_S3#

PM_SLP_LAN#

R127 10K_0402_5%

10K_0402_5%

DDPB_CTRLDATA: Port B Detected

DDPC_CTRLDATA: Port C Detected

1: Port B or C is detected

*

0: Port B or C is not detected

B9 C9 D9

DDI2_CTRL_CK

D11

DDI2_CTRL_DATA

C5

DDI1_AUX_DN

B6 B5

DDI1_AUX_DP

A6

C8 A8 D6

+3VS

5

IN1

VCC

IN2

GND

3

(Have internal PD)

R271 2.2K_0402_5% R271 2.2K_0402_ 5%

1 2

4

OUT

12

HASWELL_MCP_E

eDP SIDEBAND

GPIO

HASWELL_MCP_E

9 OF 19

DISPLAY

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

PLT_RST#

DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP

DDPB_HPD DDPC_HPD

EDP_HPD

Rev1p2

1

2

U30

U30 MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

U1I

PCH_INV_PWM17,18 ENBKL27 PCH_ENVDD18

PCH_GPIO77

PCH_GPIO789 DDI1_AUX_DN 20 PCH_GPIO799

TP_INT#28 ,9

PCH_GPIO78 PCH_GPIO79

PCH_GPIO80

T26 @T26 @

TP_INT#

G_SEN_INT30

PCH_GPIO519

G_SEN_INT Project_ID1 PCH_GPIO51 Project_ID0

B8

EDP_BKLCTL

A9

EDP_BKLEN

C6

EDP_VDDEN

U6

PIRQA/GPIO77

P4

PIRQB/GPIO78

N4

PIRQC/GPIO79

N2

PIRQD/GPIO80

AD4

PME

U7

GPIO55

L1

GPIO52

L3

GPIO54

R5

GPIO51

L4

GPIO53

HASWELL-MCP-E-ULT_BGA116 8

@

1 0

DSWODVREN - On Die DSW VR Enable

H

：：：：

Enable(DEFAULT)

*

L

：：：：

Disable

R124 330K_0402_5% R124 330K_0402_5%

1 2 1 2

R125 330K_0402_5%@R125 330K_0402_5%@

1 2

R1201K_0402_5% R1201K_0402_5% R1578.2K_0402_5% R15 78.2K_0402_5%

1 2

@R127

@

1 2

T27@ T27@ T28@ T28@

T30@ T30@ T96@ T96@

1 2

R118

@R118

@

10K_0402_5%

not support Deep S4,S5 can NC

+3VS

DDI2_CTRL_CK 19

DDI2_CTRL_DATA 19

DDI1_AUX_DP 2 0

CPU_DP_HPD 20 CPU_HDMI_HPD 19 CPU_EDP_HPD 18

PLT_RST_BUF# 22,24

R416

R416 100K_0402_5%

100K_0402_5%

+RTCVCC

+3VALW_PCH +3VS

T29@ T29@

+3VALW_PCH

PCH_PCIE_WAKE# 22

CLKRUN# 28

PM_SLP_S5# 27

PM_SLP_S4# 27 PM_SLP_S3# 27

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(5/11) PM,GPIO,DDI

Z5WAH M/B LA-B161P

1

8 44Tuesday, February 25, 2014

1.0

5

+3VS

RP23

1 8 2 7 3 6 4 5

RP24

1 8 2 7 3 6 4 5

RP25

1 8

D D

C C

B B

DGPU_PRSNT#

A A

PCH_GPIO26

2 7 3 6 4 5

RP26

1 8 2 7 3 6 4 5

RP16

1 8 2 7 3 6 4 5

RP28

1 8 2 7 3 6 4 5

RP29

1 8 2 7 3 6 4 5

RP30

RP31

RP32

R216

1 2

+3VALW_PCH

10K_0402_5%

RP34

1 8 2 7 3 6 4 5

RP35

1 8 2 7 3 6 4 5

RP37

1 8 2 7 3 6 4 5

RP38

1 8 2 7 3 6 4 5

RP39

1 8 2 7 3 6 4 5

RP40

1 8 2 7 3 6 4 5

+3VS

12

R306

10K_0402_5%

R219

10K_0402_5%

@

1 2

+3VALW_PCH +3VALW_PCH

12

R311

10K_0402_5%

R220

10K_0402_5%

@

1 2

R216

10K_0804_8P4R_5%

18 27 36 45

10K_0804_8P4R_5%

18 27 36 45

10K_0804_8P4R_5%

18 27 36 45

10K_0804_8P4R_5%

5

PCH_GPIO87 PCH_GPIO51 PCH_GPIO78 PCH_GPIO83

PCH_GPIO68 PCH_GPIO69

change to I2C0 for TS use

PCH_GPIO1 PCH_GPIO94 PCH_GPIO93 PCH_GPIO2

PCH_GPIO91 PCH_GPIO0 PCH_GPIO90 PCH_GPIO38

PCH_GPIO19 PCH_GPIO36 TP_INT# SERIRQ

10K_0804_8P4R_5%

PCH_GPIO18 PCH_GPIO35 PCH_GPIO48 PCH_GPIO34

PCH_GPIO71 PCH_GPIO16 EC_KBRST# PCH_GPIO37

PCH_GPIO67 PCH_GPIO65 PCH_GPIO79 PCH_GPIO64

PCH_GPIO84

PCH_GPIO3 PCH_GPIO89

PCH_GPIO17 PCH_GPIO23 PCH_GPIO76

PCH_GPIO70

PCH_GPIO10 PCH_GPIO11 PCH_GPIO57 PCH_GPIO13

10K_0804_8P4R_5%

USB_OC1# PCH_GPIO8 PCH_GPIO73 SUSWARN#

10K_0804_8P4R_5%

PCH_GPIO46 PCH_GPIO14 PCH_GPIO42 PCH_GPIO60

10K_0804_8P4R_5%

PCH_GPIO28 PCH_GPIO47 PCH_GPIO45 PCH_GPIO24

10K_0804_8P4R_5%

PCH_GPIO43 PCH_GPIO59 PCH_GPIO25 PCH_GPIO58

10K_0804_8P4R_5%

USB_OC0# PCH_GPIO56 PCH_GPIO44 PCH_GPIO9

10K_0804_8P4R_5%

DIS,Optimus

UMA

N15V-GL N15V-GM

PCH_GPIO51 8 PCH_GPIO78 8

for PVT 1/10 modify

PCH_GPIO19 7 PCH_GPIO36 6

TP_INT# 28,8

PCH_GPIO18 7 PCH_GPIO35 6

PCH_GPIO34 6

PCH_GPIO37 6

PCH_GPIO79 8

PCH_GPIO23 7

PCH_GPIO11 7

USB_OC1# 10

PCH_GPIO73 7 SUSWARN# 8

PCH_GPIO42 10 PCH_GPIO60 7

PCH_GPIO43 10

USB_OC0# 10,26

GPIO49

DGPU_PRSNT#

0 1

GPIO26

VGA INFO

0 1

+3VS

10K_0402_5%

CPU_IDEN

10K_0402_5%

R312

BW@

R221

HW@

RP36

4

1 8 2 7 3 6 4 5

12

1 2

4

EC_SMI#_SCI# PCH_GPIO85 PCH_GPIO92 PCH_GPIO88

10K_0804_8P4R_5%

Haswell Boradwell

EC_LID_OUT#27

EC_SMI#_SCI#27

PCH_SPKR29

TS_INT#18

DEVSLP025,8

GPIO27

CPU INFO

0 1

CPU_IDEN

PCH_GPIO76 PCH_GPIO8

EC_LID_OUT# PCH_GPIO16 PCH_GPIO17 PCH_GPIO24

PCH_GPIO28 PCH_GPIO26

PCH_GPIO56 PCH_GPIO57 PCH_GPIO58 PCH_GPIO59 PCH_GPIO44 PCH_GPIO47 PCH_GPIO48 DGPU_PRSNT# TS_INT# PCH_GPIO71 PCH_GPIO13 PCH_GPIO14 PCH_GPIO25 PCH_GPIO45 PCH_GPIO46

PCH_GPIO9 PCH_GPIO10 DEVSLP0 PCH_GPIO70 PCH_GPIO38 EC_SMI#_SCI# PCH_SPKR

3

U1J

P1

BMBUSY/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

HASWELL-MCP-E-ULT_BGA116 8

@

HASWELL_MCP_E

GPIO

10 OF 19

CPU/

CPU/ MISC

MISC

LPIO

+3VALW_PCH

PCH_OPI_RCOMP

GSPI0_CS/GPIO83

GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86

GSPI1_CS/GPIO87

GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90 UART0_RXD/GPIO91 UART0_TXD/GPIO92 UART0_RTS/GPIO93 UART0_CTS/GPIO94

UART1_RXD/GPIO0 UART1_TXD/GPIO1

UART1_RST/GPIO2 UART1_CTS/GPIO3

I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69

R247 10K_0402_5%@R247 1 0K_0402_5%@

1 2

THERMTRIP

RCIN/GPIO82

SERIRQ

RSVD RSVD

Rev1p2

D60 V4 T4 AW15 AF20 AB21

R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2

2

H_THERMTRIP#

SERIRQ PCH_OPIRCOMP

T106@ T106@ T32@ T32@

PCH_GPIO83 PCH_GPIO84 PCH_GPIO85 PCH_GPIO86 PCH_GPIO87 PCH_GPIO88 PCH_GPIO89 PCH_GPIO90 PCH_GPIO91 PCH_GPIO92 PCH_GPIO93 PCH_GPIO94 PCH_GPIO0 PCH_GPIO1 PCH_GPIO2 PCH_GPIO3 PCH_I2C0_SDA PCH_I2C0_SCL PCH_I2C1_SDA PCH_I2C1_SCL PCH_GPIO64 PCH_GPIO65 PCH_GPIO66 PCH_GPIO67 PCH_GPIO68 PCH_GPIO69

EC_LID_OUT#

+1.05VS_VTT

12

R144

R144 1K_0402_5%

1K_0402_5%

1 2

R145

49.9_0402_1%

R275

1 2

2.2K_0402_5%

GPIO15 : TLS Confidentiality

1: Intel ME TLS with confidentiality

0: Intel ME TLS with no confidentiality

*

(Have internal PD)

PCH_GPIO86

1 2

R272 1K_0402_5%@R272 1K_0402_5%@ R273 1K_0402_5% R273 1K_0402_5%

1 2

+3VS

GSPI0_MOSI / GPIO86 : Boot BIOS Strap

1: ENABLED

0: SPI ROM

*

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

(Have internal PD)

Compal Secret Data

Deciphered Date

2

1

EC_KBRST# 2 7

SERIRQ 27,28

R276

R277

1 2

2.2K_0402_5%

PCH_I2C0_SDA 18 PCH_I2C0_SCL 18 PCH_I2C1_SDA 28 PCH_I2C1_SCL 28

+3VS

1 2

R269 1K_0402_5%@R269 1K_0402_5%@

+3VS

R145

R274

1 2

2.2K_0402_5%

SPKR / GPIO81 : NO REBOOT

1: ENABLED

0: DISABLED

*

PCH_GPIO66

(Have internal PD)

R270 1K_0402_5%@R270 1K_0402_5%@

1 2

SDIO_D0 / GPIO66 : Top-Block Swap Override

1: ENABLED

0: DISABLED*(Have internal PD)

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(6/11) GPIO,LPIO

Z5WAH M/B LA-B161P

1

Touch Screen

Touch Pad

for PVT 1/10 modify

PCH_SPKR

9 44Tuesday, February 25, 2014

1.0

5

D D

C C

PCIE LAN

WLAN

B B

PCIE_PRX_DTX_N322 PCIE_PRX_DTX_P322

PCIE_PTX_C_DRX_N322 PCIE_PTX_C_DRX_P322

PCIE_PTX_C_DRX_N424 PCIE_PTX_C_DRX_P424

PCIE_PRX_DTX_N424 PCIE_PRX_DTX_P424

+1.05VS_AUSB3PLL

Trace width=12~15 mil, Spcing=12 mils Max trace length= 500 mil

4

1 2 1 2

C155 0.1U_0402_16V7K

C155 0.1U_0402_16V7K C160 0.1U_0402_16V7K

C160 0.1U_0402_16V7K

C156 0.1U_0402_16V7K

C156 0.1U_0402_16V7K C157 0.1U_0402_16V7K

C157 0.1U_0402_16V7K

R232 3.01K_0402_1%R232 3.01K_0402_1% R155 0_0603_5%@R155 0_0603_5%@

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3

PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4

PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

T33 @T33 @

T34 @T34 @

PCIE_RCOMP PCIE_IREF

U1K

F10

PERN5_L0

E10

PERP5_L0

C23

PETN5_L0

C22

PETP5_L0

F8

PERN5_L1

E8

PERP5_L1

B23

PETN5_L1

A23

PETP5_L1

H10

PERN5_L2

G10

PERP5_L2

B21

PETN5_L2

C21

PETP5_L2

E6

PERN5_L3

F6

PERP5_L3

B22

PETN5_L3

A21

PETP5_L3

G11

PERN3

F11

PERP3

C29

PETN3

B30

PETP3

F13

PERN4

G13

PERP4

B29

PETN4

A29

PETP4

G17

PERN1/USB3RN3

F17

PERP1/USB3RP3

C30

PETN1/USB3TN3

C31

PETP1/USB3TP3

F15

PERN2/USB3RN4

G15

PERP2/USB3RP4

B31

PETN2/USB3TN4

A31

PETP2/USB3TP4

E15

RSVD

E13

RSVD

A27

PCIE_RCOMP

B27

PCIE_IREF

HASWELL-MCP-E-ULT_BGA116 8

@

3

HASWELL_MCP_E

PCIe

USB3.0 P3 / PCIE P1

USB3.0 P4 / PCIE P2

11 OF 19

USB

USB3.0 P1

USB3.0 P2

USB2N0 USB2P0

USB2N1 USB2P1

USB2N2 USB2P2

USB2N3 USB2P3

USB2N4 USB2P4

USB2N5 USB2P5

USB2N6 USB2P6

USB2N7 USB2P7

USB3RN1 USB3RP1

USB3TN1 USB3TP1

USB3RN2 USB3RP2

USB3TN2 USB3TP2

USBRBIAS USBRBIAS

RSVD RSVD

OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43

Rev1p2

AN8 AM8

AR7 AT7

AR8 AP8

AR10 AT10

AM15 AL15

AM13 AN13

AP11 AN11

AR13 AP13

G20 H20

C33 B34

E18 F18

B33 A33

AJ10 AJ11 AN10 AM10

AL3 AT1 AH2 AV3

USBRBIAS

T35@ T35@ T36@ T36@

USB_OC0# USB_OC1# PCH_GPIO42 PCH_GPIO43

2

USB20_N0 USB20_P0

USB20_N1 USB20_P1

USB20_N2 USB20_P2

USB20_N4 USB20_P4

USB20_N5 USB20_P5

USB20_N6 USB20_P6

USB20_N7 USB20_P7

R154 22.6_0402_1%R154 22.6_0402_1%

1 2

USB20_N0 26 USB20_P0 26

USB20_N1 26 USB20_P1 26

USB20_N2 26 USB20_P2 26

USB20_N4 24 USB20_P4 24

USB20_N5 18 USB20_P5 18

USB20_N6 18 USB20_P6 18

USB20_N7 26 USB20_P7 26

PCH_USB3_RX0_N 26 PCH_USB3_RX0_P 2 6

PCH_USB3_TX0_N 26

PCH_USB3_TX0_P 26

USB_OC0# 26,9 USB_OC1# 9 PCH_GPIO42 9 PCH_GPIO43 9

1

USB2 Port 0 (USB3.0 P0)

USB2 Port 1

USB2 Port 2

Mini Card(WLAN+BT)

Touch Screen

Camera

Finger Print

USB3 Port 0

CAD note: Route single-end 50-ohms and max 450-mils length. Recommended minimum spacing to other signal traces is 15 mils

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(7/11) PCIE,USB

Z5WAH M/B LA-B161P

1

1.0

10 44Tuesday, February 25, 2014

1.0

5

4

3

2

1

+1.35V +1.35V_CPU

D D

Shark Bay ULT have internal gate for VDDQ

+3VS

12

R422

100K_0402_5%

@

VCCST_PG_EC27,8

C C

2

3

74AUP1G07GW_TSSOP5

SVID ALERT

+1.05VS_VTT

12

R171

R171 75_0402_1%

75_0402_1%

R172

R172 43_0402_1%

VR_ALERT#39

43_0402_1%

SVID DATA

B B

VR_SVID_DATA39

R177

100_0402_1%

VCC_SENSE_R

R174

R174 0_0402_5%

0_0402_5%

@

12

+CPU_CORE

12

Note: 0 ohm PLACED CLOSE TO CPU

@ R178

@

J6

@J6

@

1 2

JUMP_43X118

U16

NC1VCC

A

Y

GND

Place the CPU resistors close to CPU

12

H_CPU_SVIDALRT#

+1.05VS_VTT

Place the CPU resistors close to CPU

12

R173

R173 130_0402_1%

130_0402_1%

VIDSOUT

12

R178 0_0402_5%

0_0402_5%

+3VALW_PCH

5

4

VCCST_PG_EC_R

R309

10K_0402_5%

VCC_SENSE 39

+1.05VS_VTT

12

R166

R166 0_0402_5%

0_0402_5%

@

1 2

+1.05VS_VTT

1 2

R169

R169 150_0402_1%

150_0402_1%

@

VCCST_PWRGD 27 ,37

CPU_PWR_DEBUG

R170

R170 10K_0402_5%

10K_0402_5%

@

+1.05VS_VTT

1U_0402_6.3V6K

@

C7

1

C6

2

22U_0805_6.3V6M

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57

+CPU_CORE

VR_SVID_CLK3 9

+VCCIOA_OUT

VR_ON39

VGATE39,8

CPU_PWR_DEBUG

+1.05VS_VTT

R164

+CPU_CORE

+1.35V_CPU

+CPU_CORE

+VCCIO_OUT

12

0_0603_5%@

1 2

1 2 1 2

@C16 7

@

1 2

Reserved Only

+1.05VS_VTT

VCC_SENSE_R

H_CPU_SVIDALRT#

R1650_0402_5% @ R1650_0402_5% @

H_CPU_SVIDCLK VIDSOUT VCCST_PG_EC_R

R1670_0402_5% @ R1670_0402_5% @

PCH_VR_EN VR_READY

R1680_0402_5% @ R1680_0402_5% @ C167

0.1U_0402_16V4Z

T37 @T37 @ T38 @T38 @

T39 @T39 @ T40 @T40 @

T41 @T41 @

T42 @T42 @ T43 @T43 @ T44 @T44 @

T45 @T45 @ T46 @T46 @ T47 @T47 @ T48 @T48 @ T98 @T98 @ T142 @T142 @ T143 @T143 @ T144 @T144 @ T141 @T141 @ T140 @T140 @ T147 @T147 @ T145 @T145 @ T146 @T146 @

+1.35V_CPU

U1L

L59

RSVD

J58

RSVD

AH26

VDDQ

AJ31

VDDQ

AJ33

VDDQ

AJ37

VDDQ

AN33

VDDQ

AP43

VDDQ

AR48

VDDQ

AY35

VDDQ

AY40

VDDQ

AY44

VDDQ

AY50

VDDQ

F59

VCC

N58

RSVD

AC58

RSVD

E63

VCC_SENSE

AB23

RSVD

A59

VCCIO_OUT

E20

VCCIOA_OUT

AD23

RSVD

AA23

RSVD

AE59

RSVD

L62

VIDALERT

N63

VIDSCLK

L63

VIDSOUT

B59

VCCST_PWRGD

F60

VR_EN

C59

VR_READY

D63

VSS

H59

PWR_DEBUG

P62

VSS

P60

RSVD_TP

P61

RSVD_TP

N59

RSVD_TP

N61

RSVD_TP

T59

RSVD

AD60

RSVD

AD59

RSVD

AA59

RSVD

AE60

RSVD

AC59

RSVD

AG58

RSVD

U59

RSVD

V59

RSVD

AC22

VCCST

AE22

VCCST

AE23

VCCST

AB57

VCC

AD57

VCC

AG57

VCC

C24

VCC

C28

VCC

C32

VCC

HASWELL-MCP-E-ULT_BGA116 8

@

HASWELL_MCP_E

HSW ULT POWER

12 OF 19

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

Rev1p2

VDDQ DECOUPLING

2.2U_0402_6.3V6MC92.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

@

2

2.2U_0402_6.3V6M

C9

C8

1

@

2

2.2U_0402_6.3V6M

C11

C10

1

2

EMC@

10U_0603_6.3V6M

1

C12

2

10U_0603_6.3V6M

1

C13

C14

2

EMC@

10U_0603_6.3V6M

1

C15

2

10U_0603_6.3V6M

1

C16

2

1

+

C18

C17

330U_2.5V_M

2

12

R235

@ R235

VSS_SENSE_R13

R233

100_0402_1%

A A

@

0_0402_5%

12

5

0_0402_5%

VSS_SENSE 39

+1.35V : 470UF/2V/7343 *2 10UF/6.3V/0603 * 6

2.2UF/6.3V/0402 * 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(8/11) Power

Z5WAH M/B LA-B161P

1

1.0

11 44Tuesday, February 25, 2014

1.0

5

D D

4

3

2

1

+1.05VS_VTT

1

+

C408

220U_6.3V_M

2

Near PJ601

+1.05VS_VTT +1.05VS_AUSB3PLL

L1

1 2

2.2UH_LQM2MPN2R2NG0L _30%

Idc 1.2A Rdc 0.11ohm +/-30%

C C

1 2

L2

2.2UH_LQM2MPN2R2NG0L _30%

Idc 1.2A Rdc 0.11ohm +/-30%

1 2

L3

2.2UH_LQM2MPN2R2NG0L _30%

Idc 1.2A Rdc 0.11ohm +/-30%

+1.05VS_VTT +1.05VS_AXCK_DCB

1 2

L4

2.2UH_LQM2MPN2R2NG0L _30%

Idc 1.2A Rdc 0.11ohm +/-30%

1 2

L5

2.2UH_LQM2MPN2R2NG0L _30%

Idc 1.2A Rdc 0.11ohm +/-30%

B B

C42 1U_040 2_6.3V6KC42 1U_040 2_6.3V6K C32 100U_1 206_6.3V6M C32 100U_1206_6.3V6M

+1.05VS_ASATA3PLL

C46 1U_040 2_6.3V6KC46 1U_040 2_6.3V6K C61 100U_1 206_6.3V6M C61 100U_1206_6.3V6M

+1.05VS_APLLOPI

C47 1U_040 2_6.3V6KC47 1U_040 2_6.3V6K C22 100U_1 206_6.3V6M C22 100U_1206_6.3V6M

C48 1U_0402_6.3V6KC48 1U_040 2_6.3V6K C23 100U_1206_6.3V6M C23 100 U_1206_6.3V6M

+1.05VS_AXCK_LCPLL

C49 1U_0402_6.3V6KC49 1U_040 2_6.3V6K C24 100U_1206_6.3V6M C24 100 U_1206_6.3V6M

1 2 1 2

Near B18

Near B11

Near AA21

Near J18

Near A20

+1.05VS_VTT

C31

1

C21

1U_0402_6.3V6K

2

C31

1

C20

2

1U_0402_6.3V6K

Near K9 Near L10 Near M9

Near J17

Near R21

1U_0402_6.3V6K

EMC@

HDA --> 3.3V or 1.5V I2C --> 1.8V

Near AC9

Near AH10

Near V8

+1.05VS_VTT

+1.05VS_AUSB3PLL

+1.05VS_ASATA3PLL

+1.05VS_APLLOPI

12

+1.05VS_AXCK_DCB

+1.05VS_AXCK_LCPLL

C57

C57 1U_0402_6.3V6K

1U_0402_6.3V6K

12

C56

C56 1U_0402_6.3V6K

1U_0402_6.3V6K

12

+3VALW_PCH

C38

C38 1U_0402_6.3V6K

1U_0402_6.3V6K

C28

22U_0805_6.3V6M

12

C59

@C59

@

0.1U_0402_16V4Z

12

C29

12

22U_0805_6.3V6M

+3VS

+3VALW_PCH

T105 @T105 @

T116 @T116 @

+3VALW_PCH

T100 @T100 @ T101 @T101 @ T102 @T102 @

U1M

K9

VCCHSIO

L10

VCCHSIO

M9

VCCHSIO

N8

VCC1_05

P9

VCC1_05

B18

VCCUSB3PLL

B11

VCCSATA3PLL

Y20

RSVD

AA21

VCCAPLL

W21

VCCAPLL

J13

DCPSUS3

AH14

VCCHDA

AH13

DCPSUS2

AC9

VCCSUS3_3

AA9

VCCSUS3_3

AH10

VCCDSW3_3

V8

VCC3_3

W9

VCC3_3

J18

VCCCLK

K19

VCCCLK

A20

VCCACLKPLL

J17

VCCCLK

R21

VCCCLK

T21

VCCCLK

K18

RSVD

M20

RSVD

V21

RSVD

AE20

VCCSUS3_3

AE21

VCCSUS3_3

HASWELL-MCP-E-ULT_BGA116 8

@

mPHY

OPI

USB3

AXALIA/HDA

VRM/USB2/AZALIA

GPIO/LCC

LPT LP POWER

HASWELL_MCP_E

13 OF 19

RTC

SPI

CORE

THERMAL SENSOR

SDIO/PLSS

SUS OSCILLATOR

USB2

VCCSUS3_3

VCCRTC DCPRTC

VCCSPI

VCCASW VCCASW

VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC1_05 DCPSUSBYP DCPSUSBYP

VCCASW VCCASW

VCCASW DCPSUS1 DCPSUS1

VCCTS1_5

VCC3_3 VCC3_3

VCCSDIO

DCPSUS4

RSVD VCC1_05 VCC1_05

Rev1p2

+3VALW_PCH

C30 1U_0402_6.3V6KC30 1U_040 2_6.3V6K

AH11 AG10 AE7

+VCCRTCEXT

C54 0.1U_0402_16V4ZC54 0.1U_0402_16V4Z

+3V_SPI

Y8

C58 0.1U_0402_16V4Z

AG14 AG13

J11

C27 10U_0603_6.3V6MC27 10U_0603_6 .3V6M

H11

C33 1U_0402_6.3V6KC33 1U_040 2_6.3V6K

H15

C40 10U_0603_6.3V6M

AE8

EMC@

AF22 AG19

+PCH_VCCDSW

AG20 AE9 AF9 AG8 AD10 AD8

J15 K14 K16

U8 T9

AB8

AC20 AG16 AG17

R209 0_0402_5%

C36 22U_0805_6.3V6MC36 22U_0805_6 .3V6M C37 1U_0402_6.3V6KC37 1U_040 2_6.3V6K C43 1U_0402_6.3V6K@C43 1U_0402_6.3V6K@

C55 0.1U_0402_16V4ZC55 0.1U_0402_16V4Z

1 2

C44 1U_0402_6.3V6KC44 1U_0402_6.3 V6K

1 2

C53 1U_0402_6.3V6K@C53 1U_0402_6.3V6K@

1 2 1 2

C25 100U_1206_6.3V6 M@C25 100U_1206_6.3V6M@

T103@ T103@

+1.05VS_VTT

C45 1U_0402_6.3V6KC45 1U_0402_6.3 V6K

1 2

@

1 2 1 2 1 2

+RTCVCC

12

+1.05VS_VTT

1 2

@

+PCH_VCCDSW_R

+1.05VS_VTT

+1.5VS +3VS

+3VS

@

C2567 0.47U_0402_6.3V6K

1 2

1U_0402_6.3V6K

1 2

C41

+RTCVCC

1

@

C51

C50

C52

2

1U_0402_6.3V6K

0.1U_0402_16V4Z

+3VALW_PCH

Broadwell only Intel recommends a 0.47uF boot strap capacitor to be placed between V3.3DSW and DcpSUSByp power rail to support in-rush current.

C50

2

0.1U_0402_16V4Z

1

2

+3VALW TO +3VALW(PCH AUX Power)

Short J8 for PCH VCCSUS3.3

+3VALW +3VALW_PCH

J8

@J8

@

JUMP_43X39

112

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(9/11) Power

Z5WAH M/B LA-B161P

1

1.0

12 44Tuesday, February 25, 2014

1.0

5

D D

HASWELL_MCP_E

U1N

A11

VSS

A14

VSS

A18

VSS

A24

VSS

A28

VSS

A32

VSS

A36

VSS

A40

VSS

A44

VSS

A48

VSS

A52

VSS

A56

VSS

AA1

VSS

AA58

VSS

AB10

VSS

AB20

VSS

AB22

VSS

AB7

VSS

AC61

VSS

AD21

VSS

AD3

C C

B B

VSS

AD63

VSS

AE10

VSS

AE5

VSS

AE58

VSS

AF11

VSS

AF12

VSS

AF14

VSS

AF15

VSS

AF17

VSS

AF18

VSS

AG1

VSS

AG11

VSS

AG21

VSS

AG23

VSS

AG60

VSS

AG61

VSS

AG62

VSS

AG63

VSS

AH17

VSS

AH19

VSS

AH20

VSS

AH22

VSS

AH24

VSS

AH28

VSS

AH30

VSS

AH32

VSS

AH34

VSS

AH36

VSS

AH38

VSS

AH40

VSS

AH42

VSS

AH44

VSS

AH49

VSS

AH51

VSS

AH53

VSS

AH55

VSS

AH57

VSS

AJ13

VSS

AJ14

VSS

AJ23

VSS

AJ25

VSS

AJ27

VSS

AJ29

VSS

HASWELL-MCP-E-ULT_BGA116 8

@

14 OF 19

4

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

Rev1p2

AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20

HASWELL_MCP_E

U1O

AP22

VSS

AP23

VSS

AP26

VSS

AP29

VSS

AP3

VSS

AP31

VSS

AP38

VSS

AP39

VSS

AP48

VSS

AP52

VSS

AP54

VSS

AP57

VSS

AR11

VSS

AR15

VSS

AR17

VSS

AR23

VSS

AR31

VSS

AR33

VSS

AR39

VSS

AR43

VSS

AR49

VSS

AR5

VSS

AR52

VSS

AT13

VSS

AT35

VSS

AT37

VSS

AT40

VSS

AT42

VSS

AT43

VSS

AT46

VSS

AT49

VSS

AT61

VSS

AT62

VSS

AT63

VSS

AU1

VSS

AU16

VSS

AU18

VSS

AU20

VSS

AU22

VSS

AU24

VSS

AU26

VSS

AU28

VSS

AU30

VSS

AU33

VSS

AU51

VSS

AU53

VSS

AU55

VSS

AU57

VSS

AU59

VSS

AV14

VSS

AV16

VSS

AV20

VSS

AV24

VSS

AV28

VSS

AV33

VSS

AV34

VSS

AV36

VSS

AV39

VSS

AV41

VSS

AV43

VSS

AV46

VSS

AV49

VSS

AV51

VSS

AV55

VSS

HASWELL-MCP-E-ULT_BGA116 8

@

3

15 OF 19

Rev1p2

2

U1P

HASWELL_MCP_E

AV59

VSS

AV8

VSS

AW16

VSS

AW24

VSS

AW33

VSS

AW35

VSS

AW37

VSS

AW4

VSS

AW40

VSS

AW42

VSS

AW44

VSS

AW47

VSS

AW50

VSS

AW51

VSS

AW59

VSS

AW60

VSS

AY11

VSS

AY16

VSS

AY18

VSS

AY22

VSS

AY24

VSS

AY26

VSS

AY30

VSS

AY33

VSS

AY4

VSS

AY51

VSS

AY53

VSS

AY57

VSS

AY59

VSS

AY6

VSS

B20

VSS

B24

VSS

B26

VSS

B28

VSS

B32

VSS

B36

VSS

B4

VSS

B40

VSS

B44

VSS

B48

VSS

B52

VSS

B56

VSS

B60

VSS

C11

VSS

C14

VSS

C18

VSS

C20

VSS

C25

VSS

C27

VSS

C38

VSS

C39

VSS

C57

VSS

D12

VSS

D14

VSS

D18

VSS

D2

VSS

D21

VSS

D23

VSS

D25

VSS

D26

VSS

D27

VSS

D29

VSS

D30

VSS

D31

VSS

D33 D34 D35 D37 D38 D39 D41 D42 D43 D45 D46 D47 D49

D50 D51 D53 D54 D55 D57 D59 D62

E11 E17 F20 F26 F30 F34 F38 F42 F46 F50 F54 F58 F61 G18 G22

H13

HASWELL_MCP_E

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

D5

VSS VSS VSS VSS VSS VSS VSS VSS VSS

D8

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS VSS

HASWELL-MCP-E-ULT_BGA116 8

@

16 OF 19

VSS_SENSE

Rev1p2

H17

VSS

H57

VSS

J10

VSS

J22

VSS

J59

VSS

J63

VSS

K1

VSS

K12

VSS

L13

VSS

L15

VSS

L17

VSS

L18

VSS

L20

VSS

L58

VSS

L61

VSS

L7

VSS

M22

VSS

N10

VSS

N3

VSS

P59

VSS

P63

VSS

R10

VSS

R22

VSS

R8

VSS

T1

VSS

T58

VSS

U20

VSS

U22

VSS

U61

VSS

U9

VSS

V10

VSS

V3

VSS

V7

VSS

W20

VSS

W22

VSS

Y10

VSS

Y59

VSS

Y63

VSS

V58

VSS

AH46

VSS

V23

VSS

E62 AH16

VSS

VSS_SENSE_R 11

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HSW MCP(10/11) GND

Z5WAH M/B LA-B161P

1

1.0

13 44Tuesday, February 25, 2014

1.0

5

4

3

2

1

D D

HASWELL_MCP_E

U1Q

T90 @T90 @

T91 @T91 @ T92 @T92 @ T93 @T93 @ T94 @T94 @

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

HASWELL-MCP-E-ULT_BGA116 8

@

U1S

AC60

CFG0

AC62

CFG1

AC63

CFG2

AA63

CFG3

AA60

CFG4

Y62

CFG5

Y61

CFG6

Y60

CFG7

V62

CFG8

V61

CFG9

V60

CFG10

U60

CFG11

T63

CFG12

T62

CFG13

T61

CFG14

T60

CFG15

AA62

CFG16

U63

CFG18

AA61

CFG17

U62

CFG19

V63

CFG_RCOMP

A5

RSVD

E1

RSVD

D1

RSVD

J20

RSVD

H18

RSVD

B12

TD_IREF

HASWELL-MCP-E-ULT_BGA116 8

@

DC_TEST_AY2_AW2 DC_TEST_AY3_AW3

T49 @T49 @

DC_TEST_AY61_AW61 DC_TEST_AY62_AW62

T50 @T50 @

DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63

DC_TEST_C1_C2

C C

B B

T104 @T104 @ T107 @T107 @ T108 @T108 @ T166 @T166 @ T167 @T167 @ T168 @T168 @ T169 @T169 @ T170 @T170 @ T171 @T171 @ T172 @T172 @ T182 @T182 @ T181 @T181 @ T180 @T180 @ T179 @T179 @ T178 @T178 @ T177 @T177 @

T176 @T176 @ T175 @T175 @ T174 @T174 @ T173 @T173 @

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP

TD_IREF

HASWELL_MCP_E

17 OF 19

HASWELL_MCP_E

RESERVED

19 OF 19

DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63

Rev1p2

PROC_OPI_RCOMP

RSVD_TP RSVD_TP

RSVD

RSVD_TP RSVD_TP

RSVD_TP

RSVD

RSVD RSVD

Rev1p2

VSS VSS

A3 A4

A60 A61 A62 AV1 AW1 AW2 AW3 AW61

DC_TEST_AY61_AW61

AW62

DC_TEST_AY62_AW62

AW63

AV63 AU63

C63 C62 B43

A51 B51

L60

N60

W23 Y22 AY15

AV62 D58

P22 N21

P20 R20

DC_TEST_A3_B3

DC_TEST_A61_B61

DC_TEST_AY2_AW2 DC_TEST_AY3_AW3

T75@ T75@ T76@ T76@

T77@ T77@ T78@ T78@ T79@ T79@

T80@ T80@ T81@ T81@

T82@ T82@

T83@ T83@

T84@ T84@ T85@ T85@

OPI_COMP

T86@ T86@ T87@ T87@

T88@ T88@ T89@ T89@

T51 @T51 @ T52 @T52 @ T53 @T53 @

T58@ T58@

T59@ T59@

T60@ T60@ T61@ T61@ T62@ T62@

T63@ T63@

T54 @T54 @

T55 @T55 @ T56 @T56 @ T57 @T57 @

U1R

AT2

RSVD

AU44

RSVD

AV44

RSVD

D15

RSVD

F22

RSVD

H22

RSVD

J21

RSVD

HASWELL-MCP-E-ULT_BGA116 8

@

CFG Straps for Processor

Physical Debug Enable (DFX Privacy)

CFG3

HASWELL_MCP_E

18 OF 19

CFG3

12

R224

R224 1K_0402_5%

1K_0402_5%

@

1: DISABLED

0: ENABLED; SET DFX ENABLED BIT IN DEBUG INTERFACE MSR

CFG4

12

R225

R225 1K_0402_5%

1K_0402_5%

RSVD RSVD RSVD RSVD

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

Rev1p2

N23 R23 T23 U10

AL1 AM11 AP7 AU10 AU15 AW14 AY14

T64@ T64@ T65@ T65@ T66@ T66@ T67@ T67@

T68@ T68@ T69@ T69@ T70@ T70@ T71@ T71@ T72@ T72@ T73@ T73@ T74@ T74@

12

R222 49.9_0402_1%R222 49.9_0402_1%

R223 49.9_0402_1%R223 49.9_0402_1%

R226 8.2K_0402_5%R226 8.2K_0402_5%

A A

5

CFG_RCOMP

12

OPI_COMP

12

TD_IREF

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/10/30 2014/10/30

Display Port Presence Strap

CFG4

Compal Secret Data

Deciphered Date

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BDW MCP(11/11) RSVD

Z5WAH M/B LA-B161P

1

14 44Tuesday, February 25, 2014

1.0