Compal LA-A921P ZIVY0, Yoga 2 13 Schematic

A
B
C
D
E
Compal Confidential
1 1
File Name : LA-A921PR03 BOM P/N:4319xxxxxx -- ZIVY0
Compal Confidential
2 2
ZIVY0 M/B Schematics Document
Intel SharyBay ULT Processor
3 3
2013-12-01
REV:1.0
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-A921PR01
LA-A921PR01
LA-A921PR01
1.0
1.0
1 38Tuesday, December 17, 2013
1 38Tuesday, December 17, 2013
E
1 38Tuesday, December 17, 2013
1.0
5
4
3
2
1
Compal Confidential
Model Name : File Name :
D D
ZIVY0
LA-A921P
eDP Conn.
HDMI Conn.
page 22
page 23
eDP
DDI1
Dual Channel
1.35V
RAM-DDR3L MD 1600MHz 4G/8G
page 15, 16
Intel Shark Bay
2-Ch. SPK Conn.
DB on Panel side
Digital array MIC*2
C C
Combo Jack Conn.
page 17
page 24
Audio Codec
I2C
Realtek ALC233-VB
page 17
HDA
PCI-E
SPI
(WLAN)
NGFF Half Card Conn.
WLAN & BT
B B
page 21
1X
USB 2.0(BT)
BIOS ROM
8M
page 07
Haswell
ULT
BGA
40mm x 24mm
LPC
EC
ENE KB9012
page 19
page 04~14
Int.KBD
Click Pad
Thermal Sensor
NUVOTON NCT7718W
page 25
page 25
USB3.0
USB2.0
SATA3.0
page 25
LID*2
page 24
USB 2.0
SATA re-driver
TI SN75LVCP601
page 20
Reserved only
SATA re-driver
TI SN75LVCP601
page 20
USB 3.0 Conn.
page 21
USB 2.0 Conn.
page 24
Sensor Hub
ITE IT8350
Touch Panel
Camera
Card Reader
Realtek RTS5170
page 18
page 24
page 24
page 24
NGFF Full Card Conn.
SSD
HDD
I2C
page 20
page 20
DB on Panel side
G-sensor & Gyro
BOSCH BMI055
eCompass
YAMAHA YAS532B-PZ
ALS
Sensortek STK2213
G-sensor
Sensortek STK8313
page 18
Reserved only
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
MB Block Diagram
MB Block Diagram
MB Block Diagram
1
2 38Tuesday, December 17, 2013
2 38Tuesday, December 17, 2013
2 38Tuesday, December 17, 2013
1.0
1.0
1.0
1
Voltage Rails
power plane
A A
State
S0
S3
S5 S4/AC
S5 S4/ Battery only
B B
S5 S4/AC & Battery don't exist
+5VALW
B+
O
O
O
X
X
+1.35V
+3VALW
O
O
O
X
X X X
EC SM Bus1 address
Device
Smart Battery Charger Home Key Button
Address Address
01100000
CPU SM Bus address
Device Address
Touch Pad
C C
+5VS
+3VS
+1.5VS
+1.05VS_VTT
+CPU_CORE
+0.675VS
OO
O
X
X X
X
EC SM Bus2 address
Device
Thermal Sensor NCT7718W SharkBay ULT SML1
CPU SML0 Bus address
X
2
3
4
5
BOM Structure Table
1001100x
AddressDevice
STATE
Full ON
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
BOARD ID Table
Board ID
0 1 2 3 4 5 6 7
PCB Revision
USB 2.0 Port Table
USB 2.0 Port
SLP_S0# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS
ON
ON
ON
ON
ON ON ON
ON
OFF
OFF
OFF
OFF
OFFLOW LOW LOW LOW
HIGH HIGH HIGH HIGH
LOW LOW
HIGH
LOWLOWLOW
HIGH
HIGH
1.0
0.3
0.2
0.1
USB 3.0 Port Table
2 External
0 1 2 3 4 5 6 7
USB Port
USB 2.0 Port (I/O Board) USB 3.0/2.0 Port (MB)
Card Reader Touch Screen (reserve) Camera Mini Card (WLAN/BT) Sensor Fusion
Port
1 2
USB 3.0 Port (MB)
3 4
SATA Port Table
Port
3
NGFF SSD(SATA)
2 1 0
HDD
CPU part
U1
U1
CPU1@
U1
CPU1@
U1
U1
CPU2@
CPU2@
U1
CPU3@
CPU3@
Clock
OFF
OFF
OFF
U1
CPU4@
U1
CPU4@
BTO Item BOM Structure
Connector ME@ 76 LEVEL X76@ Unpop
@
CPU OPTION CPU1@ ~ CPU5@
H4G@DRAM Option M4G@
KB9012 9012@ KB9022
9022@
No Re-driver NR@ TI Re-driver TI@
8520C@PARADE Re-driver
HDDSG@Segate HDD
WD HDD HDDWD@ EMI PART EMI@ ESD PART ESD@ SSD-SATA SSDSATA@
PCIE Port Table
Port
Lane
1 2 3 4
5
6
U1
U1
CPU5@
CPU5@
WLAN
0 1 2 3 0 1 2 3
PCB part
ZZZ0
ZZZ0
E4G@
S4G@ S8G@ E8G@ H8G@H8G@
SMBUS Control Table
Thermal
Touch Pad
+3VS
2
X
V
X X
sensor NCT7718W
XXV
V
+3VS
X X
VX
+3VS
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
X X X X
+3VS
CPU
X
V
+3VS
X X
HomeKeyBATT KB9022
V
+3VLP
X X X X
Changer
HOST
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 SMBCLK SMBDATA SML0CLK SML0DATA
D D
SML1CLK SML1DATA
KB9022
+3VLP
KB9022
+3VS
CPU
+3VALW
CPU
+3VALW
CPU
+3VS
+3VLP
X X X X V
1
V
+3VLP
X X X X
DRAM
H5TC4G63AFR-PBA SA00005AV20
Issued Date
Issued Date
Issued Date
I7-4500U 1.8G C0
I7-4500U 1.8G C0
SA00006SLA0
SA00006SLA0
ZZZ3
H4G@
ZZZ3
H4G@
HYNIX
HYNIX
X7652838L02
X7652838L02
I3-4010U 1.7G C0
I3-4010U 1.7G C0
SA00006SX80
SA00006SX80
ZZZ4
E4G@
ZZZ4
E4G@
ELPIDA
ELPIDA
X7652838L03
X7652838L03
EDJ4216EFBG-GN-F SA00005HT40
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
I5-4200U 1.6G C0
I5-4200U 1.6G C0
SA00006SMC0
SA00006SMC0
ZZZ7
S4G@
ZZZ7
S4G@
SAMSUNG
SAMSUNG
X7652838L01
X7652838L01
K4B4G1646Q-HYK0 SA00005JC40
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4
I3-4100U 1.8G C0
I3-4100U 1.8G C0
SA00006SU30
SA00006SU30
ZZZ8
M4G@
ZZZ8
M4G@
MICRON
MICRON
X7652838L04
X7652838L04
MT41K256M16HA-1 25:E SA00005WD10
I3-4005U 1.7G D0
I3-4005U 1.7G D0
SA000072Q50
SA000072Q50
ZZZ9
S8G@
ZZZ9
S8G@
SAMSUNG
SAMSUNG
X7652838L05
X7652838L05
K4B8G1646Q-MYK0
PCB 138 LA-A921P REV0 M/B 3
PCB 138 LA-A921P REV0 M/B 3
DA8000Z0000
DA8000Z0000
ZZZ5
M8G@
ZZZ5
ZZZ10
E8G@
ZZZ10
E8G@
ELPIDA
ELPIDA
X7652838L07
X7652838L07
EDJ8416E6MB-GN- F SA00006AU00
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
M8G@
MICRON
MICRON
X7652838L08
X7652838L08
MT41K512M16TNA-125E SA00006AV00
Note List
Note List
Note List
LA-A921PR01
LA-A921PR01
LA-A921PR01
5
ZZZ6
H8G@
ZZZ6
H8G@
HYNIX
HYNIX
X7652838L06
X7652838L06
H5TC8G63AMR-PBA SA00006WZ00
3 38Tuesday, December 17, 2013
3 38Tuesday, December 17, 2013
3 38Tuesday, December 17, 2013
1.0
1.0
1.0
5
D D
4
U1A
U1A
HASWELL_MCP_E
HASWELL_MCP_E
3
2
1
C54
DDI1_TXN0
C55
DDI1_TXP0
B58
DDI1_TXN1
C58
DDI1_TXP1
B55
DDI1_TXN2
A55
DDI1_TXP2
A57
DDI1_TXN3
B57
DDI1_TXP3
H_PROCHOT#_R
H_CPUPWRGD
C51 C50 C53 B54 C49 B50 A53 B53
D61 K61 N62
K63
C61
DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3
U1B
U1B
PROC_DETECT CATERR PECI
PROCHOT
PROCPWRGD
1 2
HDMI_TX2-_CK<23>
HDMI
C C
HDMI_TX2+_CK<23> HDMI_TX1-_CK<23> HDMI_TX1+_CK<23> HDMI_TX0-_CK<23> HDMI_TX0+_CK<23> HDMI_CLK-_CK<23> HDMI_CLK+_CK<23>
+1.05VS_VTT
H_PROCHOT#<19,27>
C46 0.1U_0402_16VK7C46 0.1U_0402_16VK7 C47 0.1U_0402_16VK7C47 0.1U_0402_16VK7 C48 0.1U_0402_16VK7C48 0.1U_0402_16VK7 C55 0.1U_0402_16VK7C55 0.1U_0402_16VK7 C56 0.1U_0402_16VK7C56 0.1U_0402_16VK7 C68 0.1U_0402_16VK7C68 0.1U_0402_16VK7 C72 0.1U_0402_16VK7C72 0.1U_0402_16VK7 C74 0.1U_0402_16VK7C74 0.1U_0402_16VK7
H_PECI<19>
1 2
R2
R2
62_0402_5%
62_0402_5%
1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2
R6 10K_0402_5%R6 10K_0402_5%
T111T111
R3
R3 56_0402_5%
56_0402_5%
1 2
CPU_DP2_N0 CPU_DP2_P0 CPU_DP2_N1 CPU_DP2_P1 CPU_DP2_N2 CPU_DP2_P2 CPU_DP2_N3 CPU_DP2_P3
T2T2
DDI EDP
DDI EDP
1 OF 19
1 OF 19
HASWELL_MCP_E
HASWELL_MCP_E
MISC
MISC
JTAG
JTAG
THERMAL
THERMAL
PWR
PWR
EDP_RCOMP
EDP_DISP_UTIL
DDR3 Compensation Signals
B B
DDR3 Compensation Signals: 20mils to comp signals 25mils to non-comp signals 500mil for Max trace length
+1.35V
12
R29
R29 470_0402_5%
470_0402_5%
DIMM_DRAMRST#
A A
1
2
5
C22
C22 10P_0402_50V8J
10P_0402_50V8J
DIMM_DRAMRST# <15,16>
1 2
R9 200_0402_1%R9 200_0402_1%
1 2
R10 120_0402_1%R 10 120_0402_1%
1 2
R11 100_0402_1%R 11 100_0402_1%
Chklist 1.0 SM_RCOMP1 -->120 ohm 1%
4
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 DIMM_DRAMRST# DDR_PG_CTRL
ESD
AU60
SM_RCOMP0
AV60
SM_RCOMP1
AU61
SM_RCOMP2
AV15
SM_DRAMRST
AV61
SM_PG_CNTL1
H_CPUPWRGD
1
C17
C17 100P_0402_50V8J
100P_0402_50V8J
2
ESD@
ESD@
DDR3
DDR3
2 OF 19
2 OF 19
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1
EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3
EDP_AUXN EDP_AUXP
Rev1p2
Rev1p2
PROC_TCK PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
C45 B46 A47 B47
C47 C46 A49 B49
A45 B45
D20 A43
J62
PRDY
K62
PREQ
E60 E61 E59 F63 F62
J60
BPM#0
H60
BPM#1
H61
BPM#2
H62
BPM#3
K59
BPM#4
H63
BPM#5
K60
BPM#6
J61
BPM#7
Rev1p2
Rev1p2
DDR_PG_CTRL
Compal Secret Data
Compal Secret Data
Compal Secret Data
EDP_TXN0 <22> EDP_TXP0 <22> EDP_TXN1 <22> EDP_TXP1 <22>
EDP_AUXN <22> EDP_AUXP <22>
EDP_COMP CPU_INV_PWM
1 2
R1 24.9_0402_1%R1 24.9_0402_1%
T18T18
EDP_COMP: Trace width=20 mils,Spacing=25mil,Max length=100mils
XDP_TCK XDP_TMS XDP_TRST# XDP_TDI XDP_TDO
Deciphered Date
Deciphered Date
Deciphered Date
2
3
T16T16 T17T17 T22T22 T23T23 T24T24
C90
C90
0.1U_0402_16VK7
0.1U_0402_16VK7
U7
U7
NC1VCC
A
GND
74AUP1G07GW_TSSOP5
74AUP1G07GW_TSSOP5
2
+1.35V
1
2
5
4
Y
+VCCIOA_OUT
+5VALW
12
R283
R283 220K_0402_5%
220K_0402_5%
eDP
DDR_VTT_PG_CTRL <31>
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(1/11) DDI,MSIC,XDP
HSW MCP(1/11) DDI,MSIC,XDP
HSW MCP(1/11) DDI,MSIC,XDP
LA-A921PR01
LA-A921PR01
LA-A921PR01
1
4 38Tuesday, December 17, 2013
4 38Tuesday, December 17, 2013
4 38Tuesday, December 17, 2013
1.0
1.0
1.0
5
4
3
2
1
DDR_A_D[0..63]<15>
DDR_A_MA[0..15]<15>
DDR_A_DQS#[0..7]<15>
DDR_A_DQS[0..7]<15>
D D
HASWELL_MCP_E
U1C
U1C
AH63
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22
C C
B B
DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57
AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54
AL55 AK55 AR54 AN54 AY58
AW58
AY56
AW56
AV58 AU58 AV56 AU56 AY54
AW54
AY52
AW52
AV54 AU54 AV52 AU52 AK40 AK42
AM43 AM45
AK45 AK43
AM40 AM42 AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
HASWELL_MCP_E
3 OF 19
3 OF 19
DDR CHANNEL A
DDR CHANNEL A
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3
SA_CS#0 SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0 SA_BA1 SA_BA2
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7
SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7
SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1
AU37 AV37 AW36 AY36
AU43 AW43 AY42 AY43
AP33 AR32
AP32
AY34 AW34 AU34
AU35 AV35 AY41
AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42
AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48
AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49
AP49 AR51 AP51
DDRA_ODT0
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
SA_CLK_DDR#0 <15> SA_CLK_DDR0 <15>
DDRA_CKE0_DIMMA <15> DDRA_CKE1_DIMMA <15>
DDRA_CS0_DIMMA# <15> DDRA_CS1_DIMMA# <15>
T4T4
DDR_A_RAS# <15> DDR_A_WE# <15> DDR_A_CAS# <15>
DDR_A_BS0 <15> DDR_A_BS1 <15> DDR_A_BS2 <15>
SM_DIMM_VREFCA <15> SA_DIMM_VREFDQ <15> SB_DIMM_VREFDQ <16>
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_B_D[0..63]<16>
DDR_B_MA[0..15]<16>
DDR_B_DQS#[0..7]<16>
DDR_B_DQS[0..7]<16>
HASWELL_MCP_E
HASWELL_MCP_E
DDR CHANNEL B
DDR CHANNEL B
4 OF 19
4 OF 19
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3
SB_CS#0 SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0 SB_BA1 SB_BA2
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7
SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7
AM38 AN38 AK38 AL38
AY49 AU50 AW49 AV50
AM32 AK32
AL32
AM35 AK35 AM33
AL35 AM36 AU49
AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46
AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18
AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18
DDRB_ODT0
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
SB_CLK_DDR#0 <16> SB_CLK_DDR0 <16>
DDRB_CKE0_DIMMA <16> DDRB_CKE1_DIMMA <16>
DDRB_CS0_DIMMA# <16> DDRB_CS1_DIMMA# <16>
T5T5
DDR_B_RAS# <16> DDR_B_WE# <16> DDR_B_CAS# <16>
DDR_B_BS0 <16> DDR_B_BS1 <16> DDR_B_BS2 <16>
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25 AU25 AM29
AK29
AL28
AK28 AR29 AN29 AR28
AP28 AN26 AR26 AR25
AP25
AK26 AM26
AK25
AL25
AY23 AW23
AY21 AW21
AV23 AU23
AV21 AU21
AY19 AW19
AY17 AW17
AV19 AU19
AV17 AU17 AR21 AR22
AL21 AM22 AN22
AP21
AK21
AK22 AN20 AR20
AK18
AL18
AK20 AM20 AR18
AP18
U1D
U1D
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
Rev1p2
Rev1p2
Rev1p2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Rev1p2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(2/11) DDRIII
HSW MCP(2/11) DDRIII
HSW MCP(2/11) DDRIII
LA-A921PR01
LA-A921PR01
LA-A921PR01
1
5 38Tuesday, December 17, 2013
5 38Tuesday, December 17, 2013
5 38Tuesday, December 17, 2013
1.0
1.0
1.0
5
4
3
2
1
1 2
R33 10M_0402_5%R33 10M_0402_5%
Y1
Y1
D D
C C
1 2
32.768KHZ 12.5PF 9H03200031
32.768KHZ 12.5PF 9H03200031
1
C3
C3
15P_0402_50V8J
15P_0402_50V8J
2
PCH_INTVRMEN
INTVRMEN (+1.05 VA)
H:Integrated VRM enable
*
L:Integrated VRM disable
PCH_RTCX1
PCH_RTCX2
1
C4
C4
15P_0402_50V8J
15P_0402_50V8J
2
1 2
R39 330K_0402_5%R39 330K_0402_5%
1 2
R40 330K_0402_5%@R40 330K_0402_5%@
+RTCVCC
RTC Battery
W=20mils W=20mils
+RTCVCC +RTCBATT
1 2
R107 0_0402_5%@R107 0_0402_5%@
1
C179
C179 1U_0402_6.3V6K
1U_0402_6.3V6K
2
2/4
Safty suggestion remove EE side ,Keep PWR side
JME2 Short PAD placement to Bottom side.
ME CMOS
+RTCVCC
R36 20K_0402_1%R36 20K_0402_1%
R37 20K_0402_1%R37 20K_0402_1%
1U_0402_6.3V6K
1U_0402_6.3V6K
1 2 1 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C2
C2
C5
C5
JME1
JME1 SHORT PADS
SHORT PADS
1 2
2
@
@
1
JME2
JME2 SHORT PADS
SHORT PADS
1 2
2
@
@
+RTCVCC
1 2
R35 1M_0402_5%R35 1M_0402_5%
HDA_SDIN0<17>
ME_EN<19>
SMT
T108T108
T118T118 T113T113 T119T119
T106T106
PCH_RTCX1 PCH_RTCX2 SM_INTRUDER# PCH_INTVRMEN PCH_SRTCRST# PCH_RTCRST#
HDA_BIT_CLK HDA_SYNC HDA_RST# HDA_SDIN0
ME_EN
PCH_JTAG_RST# PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TCK_JTAGX
U1E
U1E
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
HASWELL_MCP_E
HASWELL_MCP_E
RTC
RTC
5 OF 19
5 OF 19
JTAG
JTAG
SATA_IREF
RSVD RSVD
SATALED
Rev1p2
Rev1p2
J5 H5 B15 A15
J8 H8 A17 B17
J6 H6 B14 C15
F5 E5 C17 D17
V1 U1 V6 AC1
A12 L11 K10 C12 U3
PCH_GPIO34 PCH_GPIO35 PCH_GPIO36 PCH_GPIO37
SATA_RCOMP PCH_SATALED#
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1
SATAAUDIO
SATAAUDIO
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37
SATA_RCOMP
SATA_PRX_DTX_N0 <20> SATA_PRX_DTX_P0 <20> SATA_PTX_DRX_N0 <20> SATA_PTX_DRX_P0 <20>
PCIE_PRX_DTX_N6L0 <20> PCIE_PRX_DTX_P6L0 <20> PCIE_PTX_DRX_N6L0 <20> PCIE_PTX_DRX_P6L0 <20>
1 2
R56 0_0402_5%@ R56 0_0402_5%@
within 500 mils
R43 3.01K_0402_1%R43 3.01K_0402_1%
PCH_GPIO34 <9> PCH_GPIO35 <9> PCH_GPIO36 <9>
NGFF_SSD_PEDET <20>
1 2
PCH_SATALED# <9>
HDD
NGFF(SSD)
+1.05VS_ASATA3PLL
+3VALW_PCH
B B
ME_EN
ME debug mode,t his signal has a weak internal PD * Low = Disable d (Default) High = Enabled [Flash Descript or Security Ove ride]
A A
R1239 1K_0402_5%@R1239 1K_0402_5%@
R86 51_0402_5%@R86 51_0402_5%@
1 2
1 2
ME_EN
HDA_RST_AUDIO#<17> HDA_BITCLK_AUDIO<17> HDA_SDOUT_AUDIO<17>
HDA_SYNC_AUDIO<17>
PCH_JTAG_TCK
SMT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
EMI
RP14
EMI@RP14
EMI@ 1 8 2 7 3 6 4 5
33_8P4R_5%
33_8P4R_5%
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
3
HDA_RST# HDA_BIT_CLK ME_EN HDA_SYNC
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+3VS
1 2
R99 10K_0402_5%@R99 10K_0402_5%@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(3/11) RTC,SATA,XDP
HSW MCP(3/11) RTC,SATA,XDP
HSW MCP(3/11) RTC,SATA,XDP
LA-A921PR01
LA-A921PR01
LA-A921PR01
PCH_GPIO37
1
1.0
1.0
6 38Tuesday, December 17, 2013
6 38Tuesday, December 17, 2013
6 38Tuesday, December 17, 2013
1.0
5
4
3
2
1
HASWELL_MCP_E
U1F
U1F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
U1G
U1G
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME
AA3
SPI_CLK
Y7
SPI_CS0
Y4
SPI_CS1
AC2
SPI_CS2
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
1 2
1 2
PCH_GPIO18
PCH_GPIO19
PCH_GPIO20
CLK_PCIE_WLAN# CLK_PCIE_WLAN
PCH_GPIO22
PCH_GPIO23
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#
PCH_SPI_CLKPCH_SPI_CLK_R PCH_SPI_CS0#
PCH_SPI_MOSI PCH_SPI_MISO PCH_SPI_WP#
PCH_SPI_HOLD#
PCH_GPIO18<9>
CLK_PCIE_WLAN#<21> CLK_PCIE_WLAN<21>
WLAN_CLKREQ#<21,9>
PCH_GPIO19<9>
PCH_GPIO20<9>
PCH_GPIO22<9>
PCH_GPIO23<9>
EMI
RP4
RP4
1 8 2 7 3 6 4 5
15_8P4R_5%
15_8P4R_5%
LPC_FRAME#<19>
EMI@
EMI@
1 2
R5205 33_0402_5%
R5205 33_0402_5%
+3VALW_PCH
PCH_SPI_WP#PCH_SPI_WP#_R PCH_SPI_MOSIPCH_SPI_MOSI_R
PCH_SPI_HOLD#PCH_SPI_HOLD#_R
LPC_AD0<19> LPC_AD1<19> LPC_AD2<19> LPC_AD3<19>
R127
R127
R128
R128
1K_0402_1%
1K_0402_1%
1K_0402_1%
1K_0402_1%
D D
WLAN
C C
CHKLIST1.0 2 SPI Device = 33 ohm
B B
1 SPI Device = 15 ohm
HASWELL_MCP_E
CLOCK
CLOCK
SIGNALS
SIGNALS
6 OF 19
6 OF 19
HASWELL_MCP_E
HASWELL_MCP_E
LPC
LPC
SPI C-LINK
SPI C-LINK
7 OF 19
7 OF 19
SMBUS
SMBUS
XTAL24_IN
XTAL24_OUT
RSVD RSVD
DIFFCLK_BIASREF
TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8
CLKOUT_LPC_0 CLKOUT_LPC_1
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
Rev1p2
Rev1p2
SMBALERT/GPIO11
SMBCLK
SMBDATA
SML0ALERT/GPIO60
SML0CLK
SML1ALERT/PCHHOT/GPIO73
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
CL_CLK
CL_DATA
CL_RST
Rev1p2
Rev1p2
A25 B25
K21 M21 C26
C35 C34 AK8 AL8
AN15 AP15
B35 A35
AN2 AP2 AH1 AL2 AN1 AK1 AU4 AU3 AH3
AF2 AD2 AF4
XTAL24_IN XTAL24_OUT
XCLK_BIASREF
CLKOUT_LPC0
CLK_BCLK_ITP# CLK_BCLK_ITP
SMBCLK SMBDATA PCH_GPIO60 SML0CLK SML0DATA PCH_GPIO73 SML1CLK SML1DATA
1 2
R91 3.01K_0402_1%R91 3.01K_0402_1%
1 2
R92 10K_0402_5%R92 10K_0402_5%
1 2
R93 10K_0402_5%R93 10K_0402_5%
1 2
R100 10K_0402_5%R100 10K_0402_5%
1 2
R95 10K_0402_5%R95 10K_0402_5%
R96 22_0402_5%R96 22_0402_5%
SMT
12
T21T21 T26T26
PCH_GPIO11 <9>
PCH_GPIO60 <9>
PCH_GPIO73 <9>
Y2
Y2
24MHZ_12PF_7V24000020
24MHZ_12PF_7V24000020
1
1
GND
1
C6
C6
15P_0402_50V8J
15P_0402_50V8J
2
+1.05VS_AXCK_LCPLL
CK_LPC_KBC < 19>
2
SMBus :TP
FootPrint :DMN66D0LDW-7_SOT363-6
SMBDATA
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6 Q3A
Q3A
SMBCLK
SMBDATA PCH_SMB_DATA
SMBCLK PCH_SMB_CLK
SML1 Bus :EC/Thermal Sensor
FootPrint :DMN66D0LDW-7_SOT363-6
SML1CLK
SML1DATA
+3VS
R132 2.2K_0402_5%R132 2.2K_0402_5%
2
5
@
@
6 1
1 2
1 2
1 2
R133 2.2K_0402_5%R133 2.2K_0402_5%
+3VS
2
@
@
@
@
3 4
@
@
6 1
3 4
Q3B 2N7002KDWH_SOT363-6
Q3B 2N7002KDWH_SOT363-6
1 2
R157 0_0402 _5%@R157 0_0402_5%@
1 2
R158 0_0402 _5%@R158 0_0402_5%@
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6 Q2417A
Q2417A
Q2417B 2N7002KDWH_SOT363-6
Q2417B 2N7002KDWH_SOT363-6
SML1CLK
R160 0_0402 _5%@R160 0_0402_5%@
SML1DATA
R161 0_0402 _5%@R161 0_0402_5%@
+3VS
1 2
+3VS
PU 2.2K at EC s ide (+3VS)
5
EC_SMB_CK2
EC_SMB_DA2
12
R871M _0402_5% R871M_0402 _5%
GND
4
XTAL24_IN
XTAL24_OUT
3
3
1
C7
C7
15P_0402_50V8J
15P_0402_50V8J
2
PCH_SMB_DATA <25>
PCH_SMB_CLK <25>
EC_SMB_CK2 <19,25>
EC_SMB_DA2 <19,25>
@
@
RP13
RP13
SPI1 ROM ( 8MByte )
U10
U10
PCH_SPI_MISO
A A
1 2
R108
R108
15_0402_5%
15_0402_5%
EC_SPI_MISO<19> EC_SPI_MOSI<19> EC_SPI_CLK<19> EC_SPI_CS0#<19>
5
PCH_SPI_CS0# PCH_SPI_MISO_R PCH_SPI_WP#_R
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q64FVSSIQ_SO8
RP6
RP6
1 8 2 7 3 6 4 5
0_0804_8P4R_5%
0_0804_8P4R_5%
W25Q64FVSSIQ_SO8
SPI ROM 8MB 1st: SA000039A30 - Winbond
VCC
HOLD#(IO3)
CLK
DI(IO0)
PCH_SPI_MISO PCH_SPI_MOSI_R PCH_SPI_CLK_R PCH_SPI_CS0#
8 7
PCH_SPI_HOLD#_R
6
PCH_SPI_CLK_R
5
PCH_SPI_MOSI_R
4
RA39
CA80
CA80 22P_0402_50V8J
22P_0402_50V8J
@
@
EMI
@RA39
@
12
33_0402_5%
33_0402_5%
+3VALW_PCH
1
C8
C8
0.1U_0402_16VK7
0.1U_0402_16VK7
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
SMBCLK SMBDATA SML1DATA SML1CLK
SML0CLK SML0DATA
1 8 2 7 3 6 4 5
2.2K_0804_8P4R_5%
2.2K_0804_8P4R_5%
1 2
R122 2.2K_0402_5%R122 2.2K_0402_5%
1 2
R123 2.2K_0402_5%R123 2.2K_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(4/11) CLK,SPI,SMBUS
HSW MCP(4/11) CLK,SPI,SMBUS
HSW MCP(4/11) CLK,SPI,SMBUS
LA-A921PR01
LA-A921PR01
LA-A921PR01
+3VALW_PCH
1
7 38Tuesday, December 17, 2013
7 38Tuesday, December 17, 2013
7 38Tuesday, December 17, 2013
1.0
1.0
1.0
5
D D
C C
PCH_PWROK APWROK_R
AC_PRESENT<19>
1 2
R146 0_0402_5%@R146 0_0402_5%@
+3VALW_PCH
12
R643
R643 200K_0402_5%
200K_0402_5%
AC_PRESENT
4
Note: SUSACK# a nd SUSWARN# can be tied togeth er if EC does not wan t to involve in the handshake mechanism for the Deep Sl eep state entry and exit
CAN be NC ,if n ot support Deep Sx
T114T114
T109T109
0_0402_5%
0_0402_5%
1 2
@R150
@
SYS_RESET# SYS_PWROK PCH_PWROK APWROK_R H_PLT_RST#
EC_RSMRST# PCH_GPIO30 PBTN_OUT# AC_PRESENT PCH_GPIO72
PCH_GPIO29
T27T27
SYS_RESET#<9> SYS_PWROK<19> PCH_PWROK<19>
1 2
EC_RSMRST#<19>
PCH_GPIO30<9>
PBTN_OUT#<19>
PCH_GPIO72<9>
PCH_GPIO29<9>
R149 10K_0402_5%R149 10K_0402_5%
PCH_BATLOW# Nee d pull high to VCCDSW3_3 (If no deep Sx , connect to VC CSUS3_3)
INVPWM<22>
ENBKL<19>
PCH_ENVDD<22>
PCH_GPIO77<9> PCH_GPIO78<9> PCH_GPIO79<9> WLBT_OFF#<21,9>
PCH_GPIO55<9>
PCH_GPIO52<9>
PCH_GPIO54<9>
PCH_GPIO51<9>
PCH_GPIO53<9>
R150
PCH_GPIO78 PCH_GPIO79
PCH_GPIO52 PCH_GPIO54
PCH_GPIO53
EDP_BKCTL
3
U1H
U1H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST
AW6
RSMRST
AV4
SUSWARN/SUSPW RDNACK/GPIO30
AL7
PWRBTN
AJ8
ACPRESENT/GPIO31
AN4
BATLOW/GPIO72
AF3
SLP_S0
AM5
SLP_WLAN/GPIO29
U1I
U1I
B8
EDP_BKLCTL
A9
EDP_BKLEN
C6
EDP_VDDEN
U6
PIRQA/GPIO77
P4
PIRQB/GPIO78
N4
PIRQC/GPIO79
N2
PIRQD/GPIO80
AD4
PME
U7
GPIO55
L1
GPIO52
L3
GPIO54
R5
GPIO51
L4
GPIO53
HASWELL_MCP_E
HASWELL_MCP_E
SYSTEM POWER MANAGEMENT
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
HASWELL_MCP_E
eDP SIDEBAND
eDP SIDEBAND
GPIO
GPIO
DPWROK: Tired t oghter with RSM RST# that do not sup port Deep Sx
DSWVRMEN
DPWROK
WAKE
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_S4 SLP_S3
SLP_A SLP_SUS SLP_LAN
Rev1p2
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP
DDPB_HPD DDPC_HPD
EDP_HPD
Rev1p2
8 OF 19
8 OF 19
DISPLAY
DISPLAY
2
AW7 AV5 AJ5
V5 AG4 AE6 AP5
AJ6 AT4 AL5 AP4 AJ7
B9 C9 D9
DDI2_CTRL_CK
D11
DDI2_CTRL_DATA
C5 B6 B5 A6
C8 A8 D6
DSWODVRENSUSACK#_R DPWROK PCH_PCIE_WAKE#
PCH_GPIO32
SUSCLK
R152 0_0402_5%@R152 0_0402_5%@
PM_SLP_S5#
PM_SLP_S4# PM_SLP_S3# PM_SLP_A#
DSWODVREN - On Die DSW VR Enab le
H:Enable(DEFAULT)
*
L:Disable
1 2
R134 330K_0402_5%R134 330K_0402_5%
1 2
R139 330K_0402_5%@R139 330K_0402_5%@
1 2
R148 0_0402 _5%@R148 0_0402_5%@
1 2
T120T120 T110T110 T112T112
DDI2_CTRL_CK <23>
DDI2_CTRL_DATA <23>
DDI2_HDMI_HPD <23> EDP_HPD <22>
+RTCVCC
EC_RSMRST#
PCH_PCIE_WAKE# <9>
PCH_GPIO32 <9> PCH_GPIO61 <9> SUSCLK_WLAN <21> PM_SLP_S5# <1 9>
PM_SLP_S4# <1 9> PM_SLP_S3# <1 9>
DDI1_CTRL_DATADDI1_CTRL_DATA
1
@
@
1 2
R310 2.2K_0402_5%
R310 2.2K_0402_5%
DDPB_CTRLDATA: Port B Detected DDPC_CTRLDATA: Port C Detected
1: Port B or C is detected
*
0: Port B or C is not detected (Have internal PD)
+3VS
9 OF 19
9 OF 19
B B
1 2
R155 0_0402_5%@R155 0_0402_5%@
+3VS
ESD
A A
5
4
H_PLT_RST#
1
C14
C14 100P_0402_50V8J
100P_0402_50V8J
2
@
@
H_PLT_RST#
MC74VHC1G08DFT2G_SC70-5
MC74VHC1G08DFT2G_SC70-5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
5
U5
@U5
@
2
P
B
4
Y
1
A
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
12
G
R159
3
R159
100K_0402_5%
100K_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Rev1p2
Rev1p2
PLT_RST# <19,21>
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(5/11) PM,GPIO,DDI
HSW MCP(5/11) PM,GPIO,DDI
HSW MCP(5/11) PM,GPIO,DDI
LA-A921PR01
LA-A921PR01
LA-A921PR01
1
8 38Tuesday, December 17, 2013
8 38Tuesday, December 17, 2013
8 38Tuesday, December 17, 2013
1.0
1.0
1.0
5
4
3
2
1
+3VS
1 8 2 7 3 6 4 5
D D
C C
B B
A A
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
HDDSG@
HDDSG@
1 2
R105 10K_0402_5%
R105 10K_0402_5%
1 2
R106 10K_0402_5%
R106 10K_0402_5%
HDDWD@
HDDWD@
+3VALW_PCH
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
5
PCH_GPIO7 I2C0_SDA_SEN I2C0_SCL_SEN
PCH_GPIO6
RP5 1K_0804_8P4R_1%RP5 1K_0804_8P4R _1%
RP3
RP3
PCH_GPIO48
10K_8P4R_5%
10K_8P4R_5%
KB_RST#
RP28 10K_8P4R_5%RP28 10 K_8P4R_5%
PCH_GPIO67 PCH_GPIO65 EC_SCI#
RP21 10K_8P4R_5%RP21 10 K_8P4R_5%
PCH_GPIO33 PCH_GPIO76 PCH_GPIO17
RP22 10K_8P4R_5%@ RP 22 10K_8P 4R_5%@
PCH_GPIO83
RP23 10K_8P4R_5%@ RP 23 10K_8P 4R_5%@
SERIRQ
RP24 10K_8P4R_5%RP24 10 K_8P4R_5%
PCH_GPIO71 PCH_GPIO16
RP25 10K_8P4R_5%RP25 10 K_8P4R_5%
PCH_GPIO38
RP26 10K_8P4R_5%RP26 10 K_8P4R_5%
RP29 10K_8P4R_5%RP29 10 K_8P4R_5%
PCH_GPIO14
PCH_GPIO45 PCH_GPIO28
RP32 10K_8P4R_5%@ RP 32 10K_8P 4R_5%@
PCH_GPIO44 PCH_GPIO13
PCH_GPIO8
RP27 10K_8P4R_5%@ RP 27 10K_8P 4R_5%@
PCH_GPIO9 PCH_GPIO10
RP30 10K_8P4R_5%RP30 10 K_8P4R_5%
PCH_GPIO22 <7>
WLAN_CLKREQ# <21,7> PCH_GPIO20 <7>
PCH_GPIO19 <7> PCH_GPIO32 <8>
PCH_GPIO36 <6>
PCH_GPIO53 <8>
PCH_GPIO78 <8>
PCH_GPIO77 <8> PCH_GPIO55 <8> PCH_GPIO51 <8>
PCH_GPIO23 <7>
PCH_GPIO35 <6> PCH_GPIO18 <7>
PCH_SATALED# <6> PCH_GPIO34 <6>
PCH_GPIO52 <8> PCH_GPIO79 <8> WLBT_OFF# <21,8>
PCH_GPIO54 <8>
PCH_PCIE_WAKE# <8> PCH_GPIO43 <10> PCH_GPIO73 <7> PCH_GPIO30 <8>
PCH_GPIO61 <8>
PCH_GPIO41 <10>
PCH_GPIO60 <7> USB_OC0# <10,21>
NGFF_SSD_PRESENT#<20>
+3VALW_PCH
+3VALW_PCH
DEVSLP0<20>
1 2
R101 10K_0402_5%R101 10K_0402_5%
1 8 2 7 3 6 4 5
RP37 10K_8P4R_5%@ RP 37 10K_8P 4R_5%@
1 2
R98 10K_0402_5%@R98 10K_0402_5%@
+3VS
1 8 2 7 3 6 4 5
RP33 10K_8P4R_5%RP33 10 K_8P4R_5%
1 8 2 7 3 6 4 5
RP15 10K_8P4R_5%@ RP 15 10K_8P 4R_5%@
4
@
@
1 2
R45 0_0402_5%
R45 0_0402_5%
1 2
R48 0_0402_5%@R 48 0_040 2_5%@
EC_SCI#<19>
SPKR<17>
PCH_GPIO72 <8>
PCH_GPIO27 PCH_GPIO12 PCH_GPIO47
PCH_GPIO87
PCH_GPIO24
PCH_GPIO46 PCH_GPIO25 PCH_GPIO26
SYS_RESET# <8> PCH_GPIO29 <8>
PCH_GPIO42 <10>
HASWELL_MCP_E
U1J
U1J
RAM_ID3
GPIO59
0
0
0
0
0
0
0
0
1
1
1
1
P1
BMBUSY/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
GPIO15
Y1
GPIO16
T3
GPIO17
AD5
GPIO24
AN5
GPIO27
AD7
GPIO28
AN3
GPIO26
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
U4
GPIO48
Y3
GPIO49
P3
GPIO50
Y2
HSIOPC/GPIO71
AT3
GPIO13
AH4
GPIO14
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
AM3
GPIO9
AM2
GPIO10
P2
DEVSLP0/GPIO33
C4
SDIO_POWER_EN/GPIO70
L2
DEVSLP1/GPIO38
N5
DEVSLP2/GPIO39
V2
SPKR/GPIO81
12
R1007
R1007 10K_0402_5%
10K_0402_5%
X76@
X76@
12
R1008
R1008 10K_0402_5%
10K_0402_5%
X76@
X76@
RAM_ID2
GPIO581GPIO57 GPIO56
0
0
0
0
1
1
1
1
0
0
0 0
0
PCH_GPIO76 PCH_GPIO8 PCH_GPIO12 PCH_GPIO15 PCH_GPIO16 PCH_GPIO17 PCH_GPIO24 PCH_GPIO27 PCH_GPIO28 PCH_GPIO26
RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 PCH_GPIO44 PCH_GPIO47 PCH_GPIO48 DGPU_PRSNT#
PCH_GPIO71 PCH_GPIO13 PCH_GPIO14 PCH_GPIO25 PCH_GPIO45 PCH_GPIO46
PCH_GPIO9 PCH_GPIO10
PCH_GPIO33
EC_SCI# SPKR
PCH_GPIO11 <7>
11
1
1
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
1 1
1
1
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
HASWELL_MCP_E
CPU/
CPU/
PCH_OPI_RCOMP
MISC
MISC
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GPIO
GPIO
10 OF 19
10 OF 19
+3VALW_PCH+3VALW_PCH +3VALW_PCH +3VALW_PCH
12
R1005
R1005 10K_0402_5%
10K_0402_5%
X76@
X76@
RAM_ID2RAM_ID3 RAM_ID1 RAM_ID0
12
R1006
R1006 10K_0402_5%
10K_0402_5%
X76@
X76@
RAM_ID1 RAM_ID0
0
0
0 1
1
0 MICRON MT41K256M16HA-125:E
1 1
0 0
0 1
1
1
0
0
1
0
0
1
1
0 0
0
1
1
0
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90 UART0_RXD/GPIO91 UART0_TXD/GPIO92 UART0_RTS/GPIO93
LPIO
LPIO
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2 UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69
12
R1003
R1003 10K_0402_5%
10K_0402_5%
X76@
X76@
12
R1004
R1004 10K_0402_5%
10K_0402_5%
X76@
X76@
RAM P/N
HYNIX H5TC4G63AFR-PBA
SAMSUNG K4B4G1646Q-HYK0
ELPIDA EDJ4216EFBG-GN-F
SAMSUNG K4B8G1646Q-MYK0
ELPIDA EDJ8416E6MB-GN-F
MICRON MT41K512M16TNA-125:E
HYNIX H5TC8G63AMR-PBA
TBD
TBD1
TBD
TBD
TBD
TBD
TBD
TBD
2
THERMTRIP
RCIN/GPIO82
SERIRQ
RSVD RSVD
Rev1p2
Rev1p2
12
12
R1001
R1001 10K_0402_5%
10K_0402_5%
X76@
X76@
R1002
R1002 10K_0402_5%
10K_0402_5%
X76@
X76@
D60 V4 T4 AW15 AF20 AB21
R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2
H_THERMTRIP#
SERIRQ PCH_OPIRCOMP
PCH_GPIO83
PCH_GPIO86 PCH_GPIO87
I2C0_SDA_SEN I2C0_SCL_SEN PCH_GPIO6 PCH_GPIO7
PCH_GPIO65PCH_GPIO38 PCH_GPIO66 PCH_GPIO67
+1.05VS_VTT
12
R179
R179
1K_0402_1%
1K_0402_1%
KB_RST# <19>
R185
R185
1 2
49.9_0402_1%
49.9_0402_1%
SERIRQ <19>
I2C0_SDA_SEN <18> I2C0_SCL_SEN <18>
+3VS
1 UMA 0
R707
R707 10K_0402_5%
10K_0402_5%
1 2 1 2
1 2
1 2
@R712
@
1
1 2
R708
R708 10K_0402_5%
10K_0402_5%
@
@
1 2
+3VS
PCH_GPIO15
9 38Tuesday, December 17, 2013
9 38Tuesday, December 17, 2013
9 38Tuesday, December 17, 2013
DGPU_PRSNT#
PCH_GPIO86
R710 1K_0402_1%@R710 1K_0402_1%@ R711 1K_0402_1%R711 1K_0402_1%
GSPI0_MOSI / GPIO86 : Boot BIOS Strap
1: LPC BUS
0: SPI BUS
*
PCH_GPIO66
(Have internal PD)
R189 1K_0402_1%@R189 1K_04 02_1%@
SDIO_D0 / GPIO66 : Top-Block Swap Override
1: DISABLED
0: ENABLED*(Have internal PD)
+3VALW_PCH
R712 1K_0402_1%
1K_0402_1%
GPIO15 : TLS Confidentiality
1: Intel ME TLS with confidentiality
0: Intel ME TLS with no confidentiality
*
(Have internal PD)
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(6/11) GPIO,LPIO
HSW MCP(6/11) GPIO,LPIO
HSW MCP(6/11) GPIO,LPIO
LA-A921PR01
LA-A921PR01
LA-A921PR01
DIS
1.0
1.0
1.0
5
D D
C C
PCIE_PRX_DTX_N4<21>
WLAN
B B
PCIE_PRX_DTX_P4<21>
PCIE_PTX_C_DRX_N4<21> PCIE_PTX_C_DRX_P4<21>
+1.05VS_AUSB3PLL
R235 3.01K_040 2_1%R235 3.01K_040 2_1%
4
1 2
C29 0.1U_0402_16VK7C29 0.1U_0402_16VK7
1 2
C30 0.1U_0402_16VK7C30 0.1U_0402_16VK7
1 2
PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4
PCIE_RCOMP
F10
E10
C23 C22
F8 E8
B23 A23
H10 G10
B21 C21
E6 F6
B22 A21
G11
F11
C29 B30
F13
G13
B29 A29
G17
F17
C30 C31
F15
G15
B31 A31
E15 E13 A27 B27
U1K
U1K
PERN5_L0 PERP5_L0
PETN5_L0 PETP5_L0
PERN5_L1 PERP5_L1
PETN5_L1 PETP5_L1
PERN5_L2 PERP5_L2
PETN5_L2 PETP5_L2
PERN5_L3 PERP5_L3
PETN5_L3 PETP5_L3
PERN3 PERP3
PETN3 PETP3
PERN4 PERP4
PETN4 PETP4
PERN1/USB3RN3 PERP1/USB3RP3
PETN1/USB3TN3 PETP1/USB3TP3
PERN2/USB3RN4 PERP2/USB3RP4
PETN2/USB3TN4 PETP2/USB3TP4
RSVD RSVD PCIE_RCOMP PCIE_IREF
3
HASWELL_MCP_E
HASWELL_MCP_E
11 OF 19
11 OF 19
PCIe
PCIe
USB3.0 P3 / PCIE P1
USB3.0 P4 / PCIE P2
USB
USB
USB3.0 P1
USB3.0 P2
USB2N0 USB2P0
USB2N1 USB2P1
USB2N2 USB2P2
USB2N3 USB2P3
USB2N4 USB2P4
USB2N5 USB2P5
USB2N6 USB2P6
USB2N7 USB2P7
USB3RN1 USB3RP1
USB3TN1 USB3TP1
USB3RN2 USB3RP2
USB3TN2 USB3TP2
USBRBIAS USBRBIAS
RSVD RSVD
OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43
Rev1p2
Rev1p2
AN8 AM8
AR7 AT7
AR8 AP8
AR10 AT10
AM15 AL15
AM13 AN13
AP11 AN11
AR13 AP13
G20 H20
C33 B34
E18 F18
B33 A33
AJ10 AJ11 AN10 AM10
AL3 AT1 AH2 AV3
USBRBIAS
USB_OC0# PCH_GPIO41 PCH_GPIO42 PCH_GPIO43
2
USB20_N0 USB20_P0
USB20_N1 USB20_P1
USB20_N3 USB20_P3
USB20_N4 USB20_P4
USB20_N5 USB20_P5
USB20_N6 USB20_P6
USB20_N7 USB20_P7
1 2
R233 22.6_0402_1%R233 22.6_0402_1%
USB20_N0 <24> USB20_P0 <24>
USB20_N1 <21> USB20_P1 <21>
USB20_N3 <24> USB20_P3 <24>
USB20_N4 <24> USB20_P4 <24>
USB20_N5 <24> USB20_P5 <24>
USB20_N6 <21> USB20_P6 <21>
USB20_N7 <18> USB20_P7 <18>
USB3_RX2_N <21> USB3_RX2_P <21>
USB3_TX2_N <21> USB3_TX2_P <21>
1
USB2 IO (Sub Board)
USB2/3 IO (Main Board)
Card Reader
Touch Screen
Camera
Mini Card(WLAN+BT)
Sensor
USB2/3 (Main Board)
CAD note: Route single-end 50-ohms and max 450-mils length. Avoid routing next to clock pins or under stitching capacitors. Recommended minimum spacing to other signal traces is 15 mils
USB_OC0# <21,9> PCH_GPIO41 <9> PCH_GPIO42 <9> PCH_GPIO43 <9>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(7/11) PCIE,USB
HSW MCP(7/11) PCIE,USB
HSW MCP(7/11) PCIE,USB
LA-A921PR01
LA-A921PR01
LA-A921PR01
1
1.0
1.0
10 38Tuesday, December 17, 2013
10 38Tuesday, December 17, 2013
10 38Tuesday, December 17, 2013
1.0
5
D D
VCCST_PWRGD<19>
VCCST_PWRGD
Define EC OD pin, need double confirm.
C C
SVID ALERT
+1.05VS_VTT
12
VR_SVID_ALRT#<34>
Place the PU resistors close to C PU
R252
R252 75_0402_5%
75_0402_5%
R254
R254 43_0402_1%
43_0402_1%
12
H_CPU_SVIDALRT#
SVID DATA
+1.05VS_VTT
Place the PU resistors close to C PU
12
R256
R256 130_0402_5%
B B
1 2
@
VR_SVID_DAT<34>
@
R257 0_0402_5%
R257 0_0402_5%
+CPU_CORE
130_0402_5%
H_CPU_SVIDDATA
R256: CRB r0.7 changed from 130 Ohms to 110 Ohms
4
+1.05VS_VTT
12
R286
R286 10K_0402_5%
10K_0402_5%
+1.05VS_VTT
R253 150_0402_1%
150_0402_1%
1 2
R255 10K_0402_5%
10K_0402_5%
1 2
R253: CPU_PWR_DEBUG CRB mount Check list ,XDP use only
@R253
@
CPU_PWR_DEBU G
@R255
@
3
+1.35V
+CPU_CORE
VCCSENSE
T38T38
+VCCIO_OUT_R
+CPU_CORE
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M C36
C36
1
2
T87T87
+1.05VS_VTT
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M C37
C37
1
2
H_CPU_SVIDALRT# VR_SVID_CLK H_CPU_SVIDDATA VCCST_PWRGD
CPU_PWR_DEBU G
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M 10U_0603_6.3V6M
10U_0603_6.3V6M
C38
C38
1
2
T39T39 T40T40 T41T41 T42T42 T43T43 T44T44 T45T45 T46T46 T47T47 T48T48 T49T49 T50T50 T51T51
C39
C39
+VCCIOA_OUT
VR_SVID_CLK<34>
VR_ON<34>
VGATE<34>
+1.35V
VDDQ DECOUPLING
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M C35
C35
1
1
2
2
CRB: +1.35V : 470UF/2V/7343 *2 (Un-mount) 10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
L59
J58
AH26
AJ31 AJ33 AJ37
AN33
AP43
AR48
AY35 AY40 AY44 AY50
F59
N58
AC58
E63
AB23
A59 E20
AD23
AA23 AE59
L62
N63
L63 B59 F60
C59
D63 H59
P62 P60
P61 N59 N61
T59
AD60 AD59
AA59
AE60 AC59 AG58
U59
V59
AC22
AE22
AE23
AB57 AD57 AG57
C24 C28 C32
C40
@C40
@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
2
2
U1L
U1L
RSVD RSVD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VCC RSVD RSVD
VCC_SENSE RSVD VCCIO_OUT VCCIOA_OUT RSVD RSVD RSVD
VIDALERT VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY
VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
VCCST VCCST VCCST
VCC VCC VCC VCC VCC VCC
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C41
C41
2
2
HASWELL_MCP_E
HASWELL_MCP_E
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
12 OF 19
12 OF 19
HSW ULT POWER
HSW ULT POWER
C43
@C43
@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C42
C42
2
C45
C45
2
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
Rev1p2
Rev1p2
C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57
1
+CPU_CORE
12
R12
R12 100_0402_1%
100_0402_1%
CAD Note: PU resistor should be close to CPU
CAD Note: PD resistor should be close to CPU
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
HSW MCP(8/11) Power
HSW MCP(8/11) Power
HSW MCP(8/11) Power
LA-A921PR01
LA-A921PR01
LA-A921PR01
1
11 38Tuesday, December 17, 2013
11 38Tuesday, December 17, 2013
11 38Tuesday, December 17, 2013
1.0
1.0
1.0
12
R13
R13 100_0402_1%
100_0402_1%
VCCSENSE
VSSSENSE
VCCSENSE<34>
A A
VSSSENSE<13,34>
5
5
D D
4
3
2
1
Check Power Source
+1.05VS_VTT +1.05VS_AUSB3PLL
C C
B B
1 2
L1
L1
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L2
L2
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L3
@L3
@
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L4
L4
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L5
@L5
@
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
+1.05VS_VTT
R58
R58
0_0805_5% @
0_0805_5% @
R59
R59
0_0805_5% @
0_0805_5% @
+1.05VS_VTT
+1.05VS_ASATA3PLL
12
+1.05VS_APLLOPI
+1.05VS_AXCK_DCB
12
+1.05VS_AXCK_LCPLL
C49 1U_0402_6.3V6KC49 1U_0402_6.3V6K C50 1U_0402_6.3V6KC50 1U_0402_6.3V6K
Close to N8
1 2
C53 1U_0402_6.3V6K@C53 1U_0402_6.3V6K@
1 2
C58 1U_0402_6.3V6KC58 1U_0402_6.3V6K
1 2
C23 22U_0805_6.3V6MC23 22U_0805_6.3V6M
@
@
1 2
C63 1U_0402_6.3V6K
C63 1U_0402_6.3V6K
1 2
C24 22U_0805_6.3V6MC24 22U_0805_6.3V6M
1 2
C69 1U_0402_6.3V6KC69 1U_0402_6.3V6K
1 2
C26 22U_0805_6.3V6M
C26 22U_0805_6.3V6M
@
@
@
@
1 2
C116 1U_0402_6.3V6K
C116 1U_0402_6.3V6K
1 2
C25 22U_0805_6.3V6MC25 22U_0805_6.3V6M
1 2
C85 1U_0402_6.3V6KC85 1U_0402_6.3V6K
1 2
C27 22U_0805_6.3V6M
C27 22U_0805_6.3V6M
@
@
Close to K9,M9
1 2 1 2
+1.05VS_VTT
+1.05VS_VTT
+1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
T91T91
+3VALW_PCH
T94T94
+3VALW_PCH
+3VS
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
+1.05VS_VTT +1.05VS_VTT
+3VALW_PCH
AA21
W21
AH14
AH13
AH10
AE20 AE21
AC9 AA9
R21
M20
L10
M9 N8
B18 B11
Y20
J13
W9
J18 K19 A20
J17
T21 K18
V21
K9
VCCHSIO VCCHSIO VCCHSIO VCC1_05
P9
VCC1_05 VCCUSB3PLL VCCSATA3PLL
RSVD VCCAPLL VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3 VCCSUS3_3 VCCDSW3_3
V8
VCC3_3 VCC3_3
VCCCLK VCCCLK VCCACLKPLL VCCCLK VCCCLK VCCCLK RSVD RSVD RSVD VCCSUS3_3 VCCSUS3_3
18mA
HASWELL_MCP_E
mPHY
mPHY
OPI
OPI
USB3
USB3
AXALIA/HDA
AXALIA/HDA
VRM/USB2/AZALIA
VRM/USB2/AZALIA
GPIO/LCC
GPIO/LCC
LPT LP POWER
LPT LP POWER
HASWELL_MCP_E
13 OF 19
13 OF 19
RTC
RTC
SPI
SPI
CORE
CORE
THERMAL SENSOR
THERMAL SENSOR
SDIO/PLSS
SDIO/PLSS
SUS OSCILLATOR
SUS OSCILLATOR
USB2
USB2
VCCSUS3_3
VCCRTC DCPRTC
VCCSPI
VCCASW VCCASW
VCC1_05 VCC1_05 VCC1_05 VCC1_05
VCC1_05 DCPSUSBYP DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1 DCPSUS1
VCCTS1_5
VCC3_3 VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD VCC1_05 VCC1_05
Rev1p2
Rev1p2
AH11
C51 1U_0402_6.3V6KC51 1U_0402_6.3V6K
AG10 AE7
+VCCRTCEXT
Y8
AG14 AG13
J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8 AD10 AD8
J15 K14 K16
U8 T9
AB8
AC20 AG16 AG17
C57 0.1U_0402_16V K7
C57 0.1U_0402_16V K7
C60 10U_0603_6.3V6MC60 10U_0603_6.3V6M
C61 1U_0402_6.3V6KC61 1U_0402_6.3V6K
C62 1U_0402_6.3V6KC62 1U_0402_6.3V6K
+PCH_VCCDSW
C66 22U_0603_6.3V6M@C66 22U_0603_6.3V6M@
C67 1U_0402_6.3V6KC67 1U_0402_6.3V6K
T95T95 T90T90
1 2
C71 0.1U_0402_16V K7C71 0.1U_0402_16VK7
1 2
C73 1U_0402_6.3V6KC73 1U_0402_ 6.3V6K
T89T89
+1.05VS_VTT
1 2
C76 1U_0402_6.3V6KC76 1U_0402_ 6.3V6K
1 2
1 2
C52 0.1U_0402_16V K7C52 0.1U_0402_16VK7
1 2
@
@
+1.05VS_VTT
1 2 1 2 1 2
1 2 1 2
+3VALW_PCH
+1.5VS +3VS
+3VS
C64
C64 1U_0402_6.3V6K
1U_0402_6.3V6K
1 2
Share ROM
+3VALW_PCH
+1.05VS_VTT
658mA
+1.05VS_VTT
+RTCVCC
1
C54
C54
2
1U_0402_6.3V6K
1U_0402_6.3V6K
U1M
U1M
Close to AC9/AA9/AE20/AE21
1 2
+3VALW_PCH
+1.05VS_VTT
A A
+1.05VS_VTT
+3VALW_PCH
C78 22U_0603_6.3V6MC78 22U_0603_6.3V6M
1 2
C82 22U_0603_6.3V6MC82 22U_0603_6.3V6M
+3VS
Close to J17
1 2
C87 1U_0402_6.3V6KC87 1U_0402_6.3V6K
Close to R21
1 2
C88 1U_0402_6.3V6KC88 1U_0402_6.3V6K
C75 1U_0402_6.3V6KC75 1U_0402_6.3V6K
5
Close to V8
Close to AH14
12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2013/07/24 2015/07/24
2013/07/24 2015/07/24
2013/07/24 2015/07/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(9/11) Power
HSW MCP(9/11) Power
HSW MCP(9/11) Power
LA-A921PR01
LA-A921PR01
LA-A921PR01
1
1.0
1.0
12 38Tuesday, December 17, 2013
12 38Tuesday, December 17, 2013
12 38Tuesday, December 17, 2013
1.0
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