Compal LA-A481P ZRMAA, Satellite E55, LA-A481P ZEMAA Schematic

A

1 1

B

C

D

E

Compal Confidential

ZRMAA/ZEMAA Schematics Document

2 2

Haswell ULT with DDR3L

nVIDIA N14P-GV2 (Dual Rank)
nVIDIA N14M-GL

LA-A481P REV 0.1 Schematic

3 3

Intel Processor (Haswell)

2013-02-22 Rev 0.1

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

1 49Sunday, April 07, 2013

1 49Sunday, April 07, 2013

1 49Sunday, April 07, 2013

E

0.1

0.1

0.1

A

B

C

D

E

VGA (DDR3)

nVIDIA N14P-GV2 & N14M-GL

1 1

page 18~26

PCI-Express 4X Gen3 8GT/s

eDP 1X 5.4GT/s

Intel Haswell ULT

Memory BUS(DDR3L)

Dual Channel

1.35V DDR3L 1333/1600 MT/s

204pin DDR3-SO-DIMM X2

BANK 0, 1, 2

page 16,17

LVDS Conn.
Colay eDP

page 28

LVDS Translator
RTD2132S (Single)

page 27

HDMI Conn.

page 30

2 2

PCIeMini Card
W

LAN

PCIe port 4

page 34

PCIeMini Card
WIMAX

SATA HDD

Sub Boards

CardReader RTS5176(Port 3)
+USB (Port 2)+Audio Combo jack

page 35

3 3

Touch pad/LED B

page 41

SATA SSD

USB20 port 4

page 34

SATA port 0

page 33

SATA port 1

page 33

PCIe Gen1 1x

1.5V 5GT/s

USB20 1x

5V 480MHz

SATA Gen3 port 0

5V 6GHz(600MB/s)

SATA Gen3 port 1

5V 6GHz(600MB/s)

LPC BUS

3.3V 33 MHz

Haswell ULT

Processor

OPI

Lynx Point - LP

PCH

1168pin BGA

page 05~15

HD Audio

3.3V 24MHz

USB30 2x

5V 5GT/s

USB20 2x

5V 480MHz

USB20 1x

5V 480MHz

USB20 1x

5V 480MHz

USB20 1x

5V 480MHz

SLG3NB282VTR page 34

USB3.0 x2 Right

USB20 port 0,1
USB30 port 1,2

page 37

CardReader Connector

USB20 port 3

page 36

Touch Screen

USB20 port 5

page 28

Int. Camera

USB20 port 7

page 28

GCLK

RTC CKT.

page 7

SPI ROM
(8MB)

page 8

KB9012

page 40

HDA Codec

ALC282 (w/ S&M)

page 38

DC/DC Interface CKT.

page 42

Power Circuit DC/DC

4 4

page 43~51

Touch Pad

Int.KBD

page 41page 41

G-Sensor

page 33

SPK Conn

page 39

JHP

page 39

Power On/Off CKT.

page 41

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

2 49Sunday, April 07, 2013

2 49Sunday, April 07, 2013

2 49Sunday, April 07, 2013

E

0.1

0.1

0.1

A

B+

1 1

SUSP#

RT8243AZQW

TPS22966DPUR

SUSP#

SY8208DQNC

2 2

SUSP#

TPS22966DPUR

PCH_PWR_EN#

P-CHANNEL

-3413

AO

WOWL_EN#

P-CHANNEL

SUSP#

AO-3413

TPS51362RVER

3 3

PCH_PWR_EN

TPS51212DSCR

VR_ON

TPS51622RSM

SYSON

RT8207MZQW

4 4

+3VS_DGPU

NCP81172MNTWG

B

USB_EN#0

SY6288DCAC

USB_CHG_EN#

G547N2P81U

USB_EN#2

SY6288DCAC

+5VS

AP2151DWG-7

KB_LED

A03413-SOT23

VGA_PWROK

2N7002

LCD_ENVDD

APL3512ABI-TRG

DGPU_PWR_EN

P-CHANNEL

AO-3413

1.5V_PWR_EN

FDS6676AS

SUSP

P-

CHANNEL

AO-3413

DESIGN CURRENT 26mA

DESIGN CURRENT 12.47A

DESIGN CURRENT 2A

DESIGN CURRENT 2A

DESIGN CURRENT 2A

DESIGN CURRENT 5.61A

DESIGN CURRENT 2A

DESIGN CURRENT 50mA

DESIGN CURRENT 10.5A

DESIGN CURRENT 5.13A

DESIGN CURRENT 5.824A

DESIGN CURRENT 4.873A

DESIGN CURRENT 2.0A

DESIGN CURRENT 1.02A

DESIGN CURRENT 451mA

DESIGN CURRENT 500mA

DESIGN CURRENT 27.821A

DESIGN CURRENT 11A

DESIGN CURRENT 15.9A

DESIGN CURRENT A

DESIGN CURRENT 32A

DESIGN CURRENT 6A

DESIGN CURRENT 1.5A

DESIGN CURRENT 55.2A

C

+3VL
+5VALW

+USB_VCCB

+USB_VCCA

+USB_VCCC

+5VS

+HDMI_5V_OUT

+5VS_LED

+1.05VS_VTT

+1.05VS_DGPU

+3VALW

+3VS

+LCD_VDD

+3VS_DGPU

+3VS_RT
+3VALW_PCH
+3V_LAN

+3V_WLAN

+1.5VS

+1.5VSDGPU

+VRAM_1.5VS

+1.5VS

+CPU_CORE

+1.35V

+0.675VS

+VGA_CORE

D

E

+LCD_INV

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/10/25 2013/10/05

2012/10/25 2013/10/05

2012/10/25 2013/10/05

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Power Map

Power Map

Power Map

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

E

0.1

0.1

3 49Sunday, April 07, 2013

3 49Sunday, April 07, 2013

3 49Sunday, April 07, 2013

0.1

A

Voltage Rails

power
plane

1 1

State

( O MEANS ON X MEANS OFF )

+RTCVCC

B+

+5VL
+3VL

B

+5VALW
+3VALW
+1.5VALW
+VSB

+1.35V

+5VS
+3VS
+1.8VS_CRT
+1.5VS
+CPU_CORE
+VGA_CORE
+VRAM_1.5VS
+3VS_DGPU
+1.05VS_DGPU
+1.05VS_VTT

C

Platform

BTO Option Table

Function

description

SKU

D

SKU CPU PCH VGA

nVIDIA N13P-GL
(N13PGL@)

MIC

LAN

E

explain

BTO

S0

S1

S3

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

O
O
O
O
O
O

O
O
O
O
O

X

O
O
O
O
O

X

O
O
O
O

X
X

O

X X
X
X X

OO
OO

X

Function

description

X

explain

BTO

Function

PCH SM Bus Address

Power

+3VS
+3VS

Device

DDR SO-DIMM 0
DDR SO-DIMM 1

HEX

Address

1010 0000 bA0 H
1010 0100 bA4 H

description

explain

BTO

Function

3 3

description

explain

BTO

EC SM Bus1 Address

Device Address Address

+3VL

4 4

HEX HEX

6 H

1

0001 0110 bSmart Battery

12 HSmart Charger 0001 0010 b+3VL

Pow

+3VS
+3VS

HEXDevice AddressPower

EC SM Bus2 Address

Device

erPower

96 H

NVIDIA GPU 1001 1010 b

9E H

STATE

Full ON

1001 0110 bPCH

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LO

SIGNAL

SLP_S3# SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

LOW LOW

W LOWLOW

HIGH HIGHHIGH

HIGH

LOW LOWLOW

HIGH

HIGH

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/07/10 2013/07/10

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

0.1

0.1

4 49Sunday, April 07, 2013

4 49Sunday, April 07, 2013

4 49Sunday, April 07, 2013

E

0.1

5

4

3

U1A

HASWELL_MCP_E

2

1

C54

DDI1_TXN0

C55

DDI1_TXP0

B58

DDI1_TXN1

C58

DDI1_TXP1

B55

DDI1_TXN2

A55

DDI1_TXP2

A57

DDI1_TXN3

B57

D D

HDMI

H_PECI<36>

ESD@

H_CPUPW RGD

C C

+1.35V

12

R184
470_0603_5%

CH11100P_0402_50V8J

+1.05VS_VTT

H_PROCHOT#<36>

H_HDMI_TX2-<29>
H_HDMI_TX2+<29>
H_HDMI_TX1-<29>
H_HDMI_TX1+<29>
H_HDMI_TX0-<29>
H_HDMI_TX0+<29>
H_HDMI_TXC-<29>
H_HDMI_TXC+<29>

12

R68

62_0402_5%

1 2

R6 10K_0402_5%

1 2

R11 200_0402_1%

1 2

R13 120_0402_1%

1 2

R41 100_0402_1%

DIMM_DRAMRST#<16,17>

DDR_PG_CTRL<16>

R8
56_0402_5%

1 2

T20 @
T97 @

H_PROCHOT#_R

H_CPUPW RGD

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DIMM_DRAMRST#

C51
C50
C53
B54
C49
B50
A53
B53

D61
K61
N62

K63

C61

AU60
AV60
AU61
AV15
AV61

DDI1_TXP3
DDI2_TXN0

DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3

U1B

PROC_DETECT
CATERR
PECI

PROCHOT

PROCPWRGD

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1

DDR3 Compensation Signals

ESD@

DIMM_DRAMRST#

12

DIMM_DRAMRST#

CH70.1U_0402_10V7K

DDI EDP

1 OF 19

HASWELL_MCP_E

MISC

JTAG

THERMAL

PWR

DDR3

2 OF 19

EDP_AUXN
EDP_AUXP

EDP_RCOMP

EDP_DISP_UTIL

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1

EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3

Rev1p2

PRDY

PREQ
PROC_TCK
PROC_TMS

PROC_TRST

PROC_TDI

PROC_TDO

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

Rev1p2

C45
B46
A47
B47

C47
C46
A49
B49

A45
B45

D20
A43

H_EDP_TXN0 <27>
H_EDP_TXP0 <27>
H_EDP_TXN1 <27>
H_EDP_TXP1 <27>

H_EDP_AUXN <27>
H_EDP_AUXP <27>

1 2

R1 24.9_0402_1%

Trace width=20 mils,Spacing=25mil,Max length=100mils

T154@

T155@
T156@
T148@
T149@
T150@
T151@
T152@
T153@

J62
K62
E60
E61
E59
F63
F62

J60
H60
H61
H62
K59
H63
K60
J61

EDP_COMP

XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

PU/PD for JTAG signals

+VCCIOA_OUT

+1.05VS_VTT

B B

A A

Security Classification

Security Classification

Security Classification

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TDO

XDP_TCK
XDP_TRST#

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

HSW MCP(1/11) DDI,MSIC,XDP

HSW MCP(1/11) DDI,MSIC,XDP

HSW MCP(1/11) DDI,MSIC,XDP

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

1 2

R86 51_0402_5%@

1 2

R87 51_0402_5%XDP@

1 2

R88 51_0402_5%@

1 2

R89 51_0402_5%XDP@

1 2

R90 51_0402_5%XDP@

1 2

R91 51_0402_5%@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

0.1

0.1

0.1

5 49Sunday, April 07, 2013

5 49Sunday, April 07, 2013

5 49Sunday, April 07, 2013

5

4

3

2

1

U1C

AH63

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4

D D

C C

B B

DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57

AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54

AL55
AK55
AR54
AN54
AY58

AW58

AY56

AW56

AV58
AU58
AV56
AU56
AY54

AW54

AY52

AW52

AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

HASWELL_MCP_E

DDR CHANNEL A

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1

SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3

SA_CS#0
SA_CS#1

SA_ODT0

SA_RAS

SA_WE

SA_CAS
SA_BA0

SA_BA1
SA_BA2

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7

SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7

SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1

AU37
AV37
AW36
AY36

AU43
AW43
AY42
AY43

AP33
AR32

AP32
AY34

AW34
AU34

AU35
AV35
AY41

AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42

AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48

AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49

AP49
AR51
AP51

DDRA_ODT0

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

SA_CLK_DDR#0 <16>
SA_CLK_DDR0 <16>
SA_CLK_DDR#1 <16>
SA_CLK_DDR1 <16>

DDRA_CKE0_DIMMA <16>
DDRA_CKE1_DIMMA <16>

DDRA_CS0_DIMMA# <16>
DDRA_CS1_DIMMA# <16>

T4@

DDR_A_RAS# <16>

DDR_A_WE# <16>

DDR_A_CAS# <16>

DDR_A_BS0 <16>
DDR_A_BS1 <16>
DDR_A_BS2 <16>

DDR_A_D[0..63]<16>

DDR_A_MA[0..15]<16>

DDR_A_DQS#[0..7]<16>

DDR_A_DQS[0..7]<16>

SM_DIMM_VREFCA <16>
SA_DIMM_VREFDQ <16>
SB_DIMM_VREFDQ <17>

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AY31

AW31

AY29

AW29

AV31

AU31

AV29

AU29

AY27

AW27

AY25

AW25

AV27

AU27

AV25
AU25
AM29

AK29

AL28

AK28
AR29
AN29
AR28

AP28
AN26
AR26
AR25

AP25

AK26
AM26

AK25

AL25

AY23
AW23

AY21
AW21

AV23
AU23

AV21
AU21

AY19
AW19

AY17
AW17

AV19
AU19

AV17
AU17
AR21
AR22

AL21
AM22
AN22

AP21

AK21

AK22
AN20
AR20

AK18

AL18

AK20
AM20
AR18

AP18

U1D

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

HASWELL_MCP_E

DDR CHANNEL B

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3

SB_CS#0
SB_CS#1

SB_ODT0

SB_RAS

SB_WE

SB_CAS
SB_BA0

SB_BA1
SB_BA2

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7

SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7

AM38
AN38
AK38
AL38

AY49
AU50
AW49
AV50

AM32
AK32

AL32
AM35

AK35
AM33

AL35
AM36
AU49

AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46

AW30
AV26

DDR_B_DQS#1

AN28

DDR_B_DQS#2

AN25

DDR_B_DQS#3

AW22

DDR_B_DQS#4

AV18

DDR_B_DQS#5

AN21

DDR_B_DQS#6

AN18

DDR_B_DQS#7

AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18

DDRB_ODT0

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

DDR_B_DQS#0

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_D[0..63]<17>

DDR_B_MA[0..15]<17>

DDR_B_DQS#[0..7]<17>

DDR_B_DQS[0..7]<17>

SB_CLK_DDR#0 <17>
SB_CLK_DDR0 <17>
SB_CLK_DDR#1 <17>
SB_CLK_DDR1 <17>

DDRB_CKE0_DIMMB <17>
DDRB_CKE1_DIMMB <17>

DDRB_CS0_DIMMB# <17>
DDRB_CS1_DIMMB# <17>

T5@

DDR_B_RAS# <17>
DDR_B_WE# <17>
DDR_B_CAS# <17>

DDR_B_BS0 <17>
DDR_B_BS1 <17>
DDR_B_BS2 <17>

3 OF 19

A A

5

Rev1p2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/07/10 2013/07/10

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4 OF 19

2

Rev1p2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HSW MCP(2/11) DDRIII

HSW MCP(2/11) DDRIII

HSW MCP(2/11) DDRIII

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

1

6 49Sunday, April 07, 2013

6 49Sunday, April 07, 2013

6 49Sunday, April 07, 2013

0.1

0.1

0.1

5

4

3

2

1

PCH_RTCX1_R<31>

D D

+RTCVCC

1 2

RH26 0_0402_5%

CMOS Setting, near DDR Door

1 2

RH23
20K_0402_5%

iME Setting.

1 2

RH24
20K_0402_5%

PCH_INTVRMEN

INTVRMEN

H：Integrated VRM enable

*

C C

L

：

1 2

R73 330K_0402_5%

Integrated VRM disable

GCLK@

PCH_SRTCRST#

PCH_RTCX1

PCH_RTCRST#

1U_0402_6.3V6K

1U_0402_6.3V6K

CH4

CH5

+RTCVCC

JCMOS @

1 2
1 2

JME @

1 2
1 2

+RTCVCC

1 2

R72 1M_0402_5%

AZ_SDIN0_HD<35>

1 2

R9851_0402_5% @

T138 @

T6 @
T7 @

T8 @
T9 @

T95 @
T21 @

T19 @
T15 @
T10 @
T11 @
T22 @
T12 @

PCH_RTCX1
PCH_RTCX2
SM_INTRUDER#
PCH_INTVRMEN
PCH_SRTCRST#
PCH_RTCRST#

HDA_BIT_CLK
HDA_SYNC
HDA_RST#

HDA_SDOUT

PCH_JTAG_RST#
PCH_JTAG_TDI

PCH_JTAG_TDO
PCH_JTAG_TMS

PCH_TCK_JTAGX

U1E

AW5

RTCX1

AY5

RTCX2

AU6

INTRUDER

AV7

INTVRMEN

AV6

SRTCRST

AU7

RTCRST

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST/I2S_MCLK

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN/I2S1_TXD

AV10

HDA_DOCK_RST/I2S1_SFRM

AY8

I2S1_SCLK

AU62

PCH_TRST

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD

AC4

RSVD

AE63

JTAGX

AV2

RSVD

HASWELL_MCP_E

RTC

JTAG

5 OF 19

SATA_IREF

RSVD
RSVD

SATALED

Rev1p2

J5
H5
B15
A15

J8
H8
A17
B17

J6
H6
B14
C15

F5
E5
C17
D17

V1
U1
V6
AC1

A12
L11
K10
C12
U3

PU at Page09

EC_SMI#
ODD_DETECT#

T159@
T165@

SATA_IREFPCH_JTAG_TCK

T13@
T14@

SATA_RCOMP

SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3

SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2

SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1

SATA_TN2/PETN6_L1

SATAAUDIO

SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0

SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0

SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37

SATA_RCOMP

SATA_PRX_C_DTX_N0 <30>
SATA_PRX_C_DTX_P0 <30>
SATA_PTX_DRX_N0 <30>
SATA_PTX_DRX_P0 <30>

SATA_PRX_C_DTX_N1 <33>
SATA_PRX_C_DTX_P1 <33>
SATA_PTX_DRX_N1 <33>
SATA_PTX_DRX_P1 <33>

EC_SMI# <36>

ODD_DETECT# <10>

@

1 2

R75 0_0603_5%

within 500 mils

1 2

R2 3.01K_0402_1%

HDD

SSD

+1.05VS_ASATA3PLL

HDA for AUDIO

RP14

AZ_RST_HD#<35>
AZ_BITCLK_HD<35>
AZ_SDOUT_HD<35>
AZ_SYNC_HD<35>

PWRME_CTRL<36>

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

1 2

R163 0_0402_5%

HDA_RST#
HDA_BIT_CLK
HDA_SDOUT
HDA_SYNC

ME Debug

B B

+RTCBATT

1

+RTCVCC

3

1

CH8

0.1U_0402_10V7K

2

A A

5

4

DH1
BAS40-04_SOT23-3

2

+3VL

Security Classification

Security Classification

Security Classification

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

FAN Control Circuit

+3VS

12

R33
10K_0402_5%

+5VS

FAN_SPEED1<36>

1A

1 2

R32
0_0603_5%

2

+FAN1

1

C4

0.01U_0402_25V7K

@

2

JFAN

6

G2

5

G1

4

4

1

2

C5

3

3

2

2

1

1

E&T_3802-F04N-01R

@

7 49Sunday, April 07, 2013

7 49Sunday, April 07, 2013

7 49Sunday, April 07, 2013

1

FANPWM<36>

+FAN1

12

D1

BAS16_SOT23-3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

Date: Sheet of

Date: Sheet of

Date: Sheet of

10U_0603_6.3V6M

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HSW MCP(3/11) RTC,SATA,XDP

HSW MCP(3/11) RTC,SATA,XDP

HSW MCP(3/11) RTC,SATA,XDP

0.1

0.1

0.1

5

4

3

2

1

RH42

PCH_X1_R<31>

12

D D

C C

B B

NOGCLK@

24MHZ_12PF_7A24000134

1

C2
12P_0402_50V8J

2

NOGCLK@

+3VALW _PCH

RH5 1K_0402_5%
RH16 1K_0402_5%

R481M_0402_5%

Y2

1 2

NOGCLK@

+3VS

12
12

EC_CS0#<36>

EC_SDIO<36>

PCH_X1 PCH_X1
PCH_X2

1

C3
12P_0402_50V8J

2

NOGCLK@

PCH_SPIDO1
PCH_SPIDO2

1 2

PCH_SPIDO2
PCH_SPIDO3

1 2

RH61 15_0402_5%885@

1 2

RH68 15_0402_5%

1 2

RH69 15_0402_5%

1 2

RH72 15_0402_5%885@

PCIE LAN

CLK_REQ_VGA#

RH8910K_0402_5%

SPI ROM for BIOS & ME & Win8 (8MByte )

1 2

0_0402_5%

GCLK@

Placement near to YH2

WLAN

PCH_SPICS0#
PCH_SPI0_DO1
PCH_SPI0_DO2

PCH_X1

CLK_LAN#<32>
CLK_LAN<32>

+3VS
CLKREQ_LAN#<32>
CLK_WLAN#<31>
CLK_WLAN<31>
CLKREQ_WLAN#<10,31>

CLK_PCIE_VGA#<18>
CLK_PCIE_VGA<18>
CLK_REQ_VGA#<18>

UH3

1

CS#

2

SO

3

WP#

4

GND

64M EN25QH64-104HIP SOP 8P

VCC

HOLD#

SCLK

8
7
6
5

SI

T158 @

PCH_GPIO19

1 2

R52 10K_0402_5%

CLK_REQ_VGA#

T160 @

1 2
1 2
1 2

1 2
1 2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

PCH_SPICLK
PCH_SPICS0#

PCH_SPIDI
PCH_SPIDO1
PCH_SPIDO2
PCH_SPIDO3

LPC_AD0<36>
LPC_AD1<36>
LPC_AD2<36>
LPC_AD3<36>

LPC_FRAME#<36>

+3VALW _PCH

CH9 0.1U_0402_10V7K

1 2

PCH_SPI0_DO3 PCH_SPIDO3
PCH_SPI0_CLK
PCH_SPI0_DI

RH65 15_0402_5%
RH66 0_0402_5%@
RH67 15_0402_5%

RH74 15_0402_5%885@
RH78 15_0402_5%885@

U1F

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5/GPIO23

U1G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME

AA3

SPI_CLK

Y7

SPI_CS0

Y4

SPI_CS1

AC2

SPI_CS2

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

PCH_SPICLK
PCH_SPIDI

EC_SCK <36>
EC_SDI <36>

HASWELL_MCP_E

CLOCK

SIGNALS

6 OF 19

HASWELL_MCP_E

LPC

SMBUS

SPI C-LINK

7 OF 19

XTAL24_IN

XTAL24_OUT

RSVD
RSVD

DIFFCLK_BIASREF

TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8

CLKOUT_LPC_0
CLKOUT_LPC_1

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

Rev1p2

SMBALERT/GPIO11

SMBCLK

SMBDATA

SML0ALERT/GPIO60

SML0CLK

SML1ALERT/PCHHOT/GPIO73

SML0DATA

SML1CLK/GPIO75

SML1DATA/GPIO74

CL_CLK

CL_DATA

CL_RST

Rev1p2

DMN66D0LDW-7_SOT363-6

PCH_SMBDATA

PCH_SMBCLK

DMN66D0LDW-7_SOT363-6

A25
B25

K21
M21
C26

C35
C34
AK8
AL8

AN15
AP15

B35
A35

AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3

AF2
AD2
AF4

PCH_X2

T16@
T17@

XCLK_BIASREF

1 2

R140 10K_0402_5%

1 2

R141 10K_0402_5%

1 2

R142 10K_0402_5%

1 2

R148 10K_0402_5%

CLKOUT_LPC0

CLK_BCLK_ITP#
CLK_BCLK_ITP

PCH_SMBCLK
PCH_SMBDATA

PCH_SMLCLK1
PCH_SMLDATA1

SUSWARN#<9>

SLP_CHG_CB0<11,34>

USB_CHG_OC#<11,34,36>

+3VS

Q7A

2

6 1

3 4

Q7B

1 2

R78 3.01K_0402_1%

R390 22_0402_5%

T170@

T23@
T24@
T25@

4.7K_0402_5%

5

12

EMI@

T18@
T130@

SMB_ALERT# <10>

PCH_SMBDATA <10>
LAN_EN <10,32>
SML0CLK <10>
SML0DATA <10>

PU 2.2K at EC side (+3VS)

PCH_SMBCLK

PCH_SMLCLK1
PCH_SMLDATA1

+3VS

R116

1 2

1 2

+1.05VS_AXCK_LCPLL

CLK_PCI_EC <36>

RP8

1 8
2 7
3 6
4 5

RH73 2.2K_0402_5%
RH77 2.2K_0402_5%

R119

4.7K_0402_5%

PM_SMBDATA <16,17,31,33>

2.2K_0804_8P4R_5%

12
12

PM_SMBCLK <16,17,31,33>

+3VALW _PCH

Socket: SP07000F500/SP07000H900
Please place UH3 close to U1 CPU,
Please place RH66, RH67, RH68 near UH3

PCH_SMLDATA1

PCH_SMLCLK1

A A

6 1

QH4A

2N7002DW-T/R7_SOT363-6

5

3

2

QH4B

2N7002DW-T/R7_SOT363-6

4

+3VS

EC_SMB_DA2 <18,36>

EC_SMB_CK2 <18,36>

Security Classification

Security Classification

Security Classification

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HSW MCP(4/11) CLK,SPI,SMBUS

HSW MCP(4/11) CLK,SPI,SMBUS

HSW MCP(4/11) CLK,SPI,SMBUS

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

8 49Sunday, April 07, 2013

8 49Sunday, April 07, 2013

8 49Sunday, April 07, 2013

1

0.1

0.1

0.1

5

+3VS

12

R227
10K_0402_5%

SYS_RESET#

D D

PCH_PW ROK<36>
VCCST_PG_EC<12,36>

12

PCH_RSMRST#

R11710K_0402_5%

+3VALW_PCH

12

R245

100K_0402_5%

D21

ACIN<36,41>

C C

B B

1 2

RB751V40_SC76-2

PCH_ACIN

PCH_RSMRST#<36>

ote for PCH_ACIN: Deep Sx need use

N
EC

GPIO for ACPRESENT function

Need to Check

4

PCH_PW ROK

POK<36,42>

PLT_RST#<36>

SUSWARN#<8>

PBTN_OUT#<36>

1 2
1 2
1 2

R206
0_0402_5%@

0_0402_5%@

1 2

1 2

R63 0_0402_5%@

PCH_RSMRST# PCH_RSMRST#_R

+3VALW _PCH

PCH_PW M_TL<27>
PCH_PW M_EDP<28>

EC_ENBKL<27,28,36>

1 2

R79

1 2

R156 8.2K_0402_5%

RH17 0_0402_5%LVDS@
RH18 0_0402_5%IEDP@
RH19 0_0402_5%IEDP@

LCD_ENVDD<28>

VGA_PW ROK<22,47>

DGPU_PW R_EN<10,22>

DGPU_HOLD_RST#<10>

TP_INTR#<10,33>

DH2

2

3

BAS40-04_SOT23-3

SUSACK#SUSWARN#
SYS_RESET#
SYS_PWROK
PCH_PW ROK
PM_APW ROK
PLT_RST#

SUSWARN#
PCH_ACIN

PCH_BATLOW#

PCH_PW M

EC_ENBKL_R

DGPU_HOLD_RST#

PCH_GPIO55

T157 @

PCH_GPIO54
PCH_GPIO51
PCH_GPIO53

1

T31 @

T26 @

3

PCH_RSMRST#

U1H

AK2

SUSACK

AC3

SYS_RESET

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST

AW6

RSMRST

AV4

SUSWARN/SUSPWRDNACK/GPIO30

AL7

PWRBTN

AJ8

ACPRESENT/GPIO31

AN4

BATLOW/GPIO72

AF3

SLP_S0

AM5

SLP_WLAN/GPIO29

U1I

B8

EDP_BKLCTL

A9

EDP_BKLEN

C6

EDP_VDDEN

U6

PIRQA/GPIO77

P4

PIRQB/GPIO78

N4

PIRQC/GPIO79

N2

PIRQD/GPIO80

AD4

PME

U7

GPIO55

L1

GPIO52

L3

GPIO54

R5

GPIO51

L4

GPIO53

HASWELL_MCP_E

SYSTEM POWER MANAGEMENT

HASWELL_MCP_E

eDP SIDEBAND

GPIO

8 OF 19

DISPLAY

EC_SWI#

CLKRUN/GPIO32

SUS_STAT/GPIO61

SUSCLK/GPIO62

SLP_S5/GPIO63

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP

DDPB_HPD
DDPC_HPD

RH171

DSWVRMEN

DPWROK

WAKE

SLP_S4
SLP_S3

SLP_A

SLP_SUS

SLP_LAN

Rev1p2

EDP_HPD

2

12

1K_0402_5%

AW7

DSWODVREN

AV5

PCH_RSMRST#_R

AJ5

EC_SWI#

V5

CLKRUN#

AG4
AE6
AP5

PM_SLP_S5#

AJ6

PM_SLP_S4#

AT4

PM_SLP_S3#

AL5
AP4
AJ7

PM_SLP_LAN#

B9
C9
D9
D11

C5
B6
B5
A6

C8
A8
D6

1 2

R271 2.2K_0402_5%

H_EDP_HPD

+3VALW _PCH

DSWODVREN - On Die DSW VR Enable

H：Enable(DEFAULT)

*

L：Disable

1 2

R124 330K_0402_5%

EC_SWI# <32,36>

1 2

R157 8.2K_0402_5%

T104@

T27@
T28@

T30@
T96@

1 2

R118

@

10K_0402_5%

not support Deep S4,S5 can NC

DDPB_CTRLDATA: Port B Detected
DDPC_CTRLDATA: Port C Detected

1: Port B or C is detected

*

0: Port B or C is not detected

(Have internal PD)

+3VS

UMA_HDMI_CLK <29>

UMA_HDMI_DATA <29>

HDMI_HPD <10,29>
H_EDP_HPD <27,28>

+3VS

+RTCVCC

CLK_EC <31>
PM_SLP_S5# <36>

T29@

PM_SLP_S4# <36>
PM_SLP_S3# <36>

+3VALW _PCH

1

9 OF 19

PCH_PW ROK

10K_0402_5%

A A

R65 0_0402_5%

12

R208

5

12

SYS_PWROK

+3VS

5

PLT_RST#
DGPU_HOLD_RST#

4

1

IN1

VCC

IN2

GND

U37
MC74VHC1G08DFT2G_SC70-5

OPT@

3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R391
100K_0402_5%

OPT@

3

4

OUT

2

PLTRST_VGA# <18>

Compal Secret Data

Compal Secret Data

2012/07/10 2013/07/10

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Rev1p2

PLT_RST#

2

R403

0_0402_5%

@

+3VS

5

1

IN1

VCC

OUT

2

IN2

GND

U30
MC74VHC1G08DFT2G_SC70-5

3

12

4

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

H_EDP_HPD

12

R417
100K_0402_5%

12

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

PLT_RST_BUF# <31,32>

R416

100K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HSW MCP(5/11) PM,GPIO,DDI

HSW MCP(5/11) PM,GPIO,DDI

HSW MCP(5/11) PM,GPIO,DDI

1

0.1

0.1

0.1

9 49Sunday, April 07, 2013

9 49Sunday, April 07, 2013

9 49Sunday, April 07, 2013

5

+3VS

D D

+3VALW _PCH

C C

+3VS

Note: need check all GPIO PU need or not after BIOS post

1 8

RP34

RP23

RP27

RP35

RP28

2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

SERIRQ
ODD_EN#

10K_0804_8P4R_5%

DEVSLP1

ODD_DA#

10K_0804_8P4R_5%

10K_0804_8P4R_5%

18
27

SLP_CHG_CB1

36
45

10K_0804_8P4R_5%

PCH_GPIO27
PASSWORD_CLEAR#

10K_0804_8P4R_5%

TP_INTR# <33,9>

DGPU_HOLD_RST# <9>
CLKREQ_WLAN# <31,8>

LAN_EN <32,8>
USB_OC#0 <11,34,36>
SMB_ALERT# <8>
SML0CLK <8>

SML0DATA <8>
PCH_SMBDATA <8>

USB_OC#2 <11,33,36>

ODD_DETECT# <7>
DGPU_PW R_EN <22,9>

4

T162 @
T167 @

EC_LID_OUT#<36>

PASSWORD_CLEAR#

12

JPW

@

SLP_CHG_CB1<34>

EC_SCI#<36>

DEVSLP1<33>

PCH_SPKR<35>

T166 @

T163 @
T139 @

T168 @
T169 @

T136 @

EC_LID_OUT#
ODD_EN#
ODD_DA#
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
PCH_GPIO26

PCH_GPIO58
PCH_GPIO59
SLP_CHG_CB1
PCH_GPIO47

PCH_GPIO71
PCH_GPIO14
PCH_GPIO45

PCH_GPIO46
PCH_GPIO9

EC_SCI#

DEVSLP1
PCH_SPKR

3

U1J

P1

BMBUSY/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

HASWELL_MCP_E

GPIO

10 OF 19

CPU/
MISC

LPIO

2

THERMTRIP

RCIN/GPIO82

SERIRQ

PCH_OPI_RCOMP

RSVD
RSVD

GSPI0_CS/GPIO83

GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86

GSPI1_CS/GPIO87

GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90

UART0_RXD/GPIO91

UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94

UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3

I2C0_SDA/GPIO4

I2C0_SCL/GPIO5

I2C1_SDA/GPIO6

I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69

Rev1p2

D60
V4
T4
AW15
AF20
AB21

R6

PCH_GPIO83

L6

PCH_GPIO84

N6

PCH_GPIO85

L8

PCH_GPIO86

R7

DGPU_PRSNT#

L5

PCH_GPIO88

N7

PCH_GPIO89

K2
J1
K3

PCH_GPIO92

J2

PCH_GPIO93

G1
K4
G2
J3
J4

PCH_GPIO3

F2
F3

PCH_GPIO5

G4

PM_I2CSDA1

F1

PM_I2CSCL1

E3

PCH_GPIO64

F4

PCH_GPIO65

D3

PCH_GPIO66

E4

PCH_GPIO67

C3

PCH_GPIO68

E2

SSD_Detect

H_THERMTRIP#
KB_RST#
SERIRQ
PCH_OPIRCOMP

T106@
T32@

T135@
T134@

T114@
T111@

T133@
T132@

1 2

HDMI_HPD <29,9>

PM_I2CSDA1
PM_I2CSCL1

R145

49.9_0402_1%

PM_I2CSDA1 <33>
PM_I2CSCL1 <33>

R274 1K_0402_5%@
R272 1K_0603_5%@

1

H_THERMTRIP#

ODD_DA#

CH6 180P_0402_50V8J

1 2
1 2

KB_RST# <36>

SERIRQ <36>

+1.05VS_VTT

ESD@

1 2

12

2

1

+3VS

R144
1K_0402_5%

ESD@

CH12

0.1U_0402_10V7K

+3VS

+3VS

B B

10K_0402_5%

DGPU_PRSNT#

10K_0402_5%

R306

UMA@

R219

OPT@

12

GPIO87

DGPU_PRSNT#

DIS,Optimus

1 2

UMA

0
1

+3VALW _PCH

1 2

R247 10K_0402_5%

10K_0402_5%

GPIO15 : TLS Confidentiality

1: Intel ME TLS with confidentiality

A A

5

4

0: Intel ME TLS with no confidentiality

*

(Have internal PD)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R215

SSD_Detect

R30
0_0402_5%

@

1 2

EC_LID_OUT#

SSD_Detect <33>

PCH_GPIO86

U

ltra

Non-Ultra

1 2

R273 1K_0402_5%@

GSPI0_MOSI / GPIO86 : Boot BIOS Strap

1: ENABLED
0: SPI ROM

*

Compal Secret Data

Compal Secret Data

2012/07/10 2013/07/10

2012/07/10 2013/07/10

2012/07/10 2013/07/10

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

(Have internal PD)

GPIO69

PROJECT_ID

0
1

2

Need to check the resistors value

+3VS

1 2

R269 1K_0402_1%@

PCH_SPKR

SPKR / GPIO81 : NO REBOOT

1: ENABLED
0: DISABLED

*

(Have internal PD)

PCH_GPIO66

R270 1K_0402_1%@

1 2

SDIO_D0 / GPIO66 : Top-Block Swap Override

1: ENABLED

*

0

: DISABLED

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

HSW MCP(6/11) GPIO,LPIO

HSW MCP(6/11) GPIO,LPIO

HSW MCP(6/11) GPIO,LPIO

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

(Have internal PU)

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

10 49Sunday, April 07, 2013

10 49Sunday, April 07, 2013

10 49Sunday, April 07, 2013

0.1

0.1

0.1

5

PCIE_CTX_C_GRX_N0 PEG_HTX_GRX_N0

PCIE_GTX_C_CRX_N[0..3] <18>

PCIE_GTX_C_CRX_P[0..3] <18>

D D

PCIE_CTX_C_GRX_N[0..3] <18>
PCIE_CTX_C_GRX_P[0..3] <18>

PCIE LAN

WLAN

C C

PCIE_CTX_C_GRX_N1 PEG_HTX_GRX_N1

PCIE_CTX_C_GRX_P2 PEG_HTX_GRX_P2

PCIE_CTX_C_GRX_N3 PEG_HTX_GRX_N3

PCIE_PRX_C_LANTX_N3<32>
PCIE_PRX_C_LANTX_P3<32>

PCIE_PTX_C_LANRX_N3<32>
PCIE_PTX_C_LANRX_P3<32>

PCIE_PRX_WLANTX_N4<31>
PCIE_PRX_WLANTX_P4<31>

PCIE_PTX_C_WLANRX_N4<31>
PCIE_PTX_C_WLANRX_P4<31>

+1.05VS_AUSB3PLL

C78 0.22U_0402_16V7KOPT@
C79 0.22U_0402_16V7KOPT@

C82 0.22U_0402_16V7KOPT@
C83 0.22U_0402_16V7KOPT@

C86 0.22U_0402_16V7KOPT@
C87 0.22U_0402_16V7KOPT@

C90 0.22U_0402_16V7KOPT@
C91 0.22U_0402_16V7KOPT@

R232 3.01K_0402_1%

4

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

C155 0.1U_0402_16V7K

1 2

C160 0.1U_0402_16V7K

1 2

C156 0.1U_0402_16V7K

1 2

C157 0.1U_0402_16V7K

1 2

PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_P0

PEG_HTX_GRX_P0PCIE_CTX_C_GRX_P0

PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P1

PEG_HTX_GRX_P1PCIE_CTX_C_GRX_P1

PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P2

PEG_HTX_GRX_N2PCIE_CTX_C_GRX_N2

PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P3

PEG_HTX_GRX_P3PCIE_CTX_C_GRX_P3

PCIE_PTX_LANRX_N3
PCIE_PTX_LANRX_P3

PCIE_PTX_WLANRX_N4
PCIE_PTX_WLANRX_P4

T33 @

T34 @

PCIE_RCOMP
PCIE_IREF

F10

PERN5_L0

E10

PERP5_L0

C23

PETN5_L0

C22

PETP5_L0

F8

PERN5_L1

E8

PERP5_L1

B23

PETN5_L1

A23

PETP5_L1

H10

PERN5_L2

G10

PERP5_L2

B21

PETN5_L2

C21

PETP5_L2

E6

PERN5_L3

F6

PERP5_L3

B22

PETN5_L3

A21

PETP5_L3

G11

PERN3

F11

PERP3

C29

PETN3

B30

PETP3

F13

PERN4

G13

PERP4

B29

PETN4

A29

PETP4

G17

PERN1/USB3RN3

F17

PERP1/USB3RP3

C30

PETN1/USB3TN3

C31

PETP1/USB3TP3

F15

PERN2/USB3RN4

G15

PERP2/USB3RP4

B31

PETN2/USB3TN4

A31

PETP2/USB3TP4

E15

RSVD

E13

RSVD

A27

PCIE_RCOMP

B27

PCIE_IREF

U1K

3

HASWELL_MCP_E

PCIe

USB3.0 P3 / PCIE P1

USB3.0 P4 / PCIE P2

11 OF 19

USB

USB3.0 P1

USB3.0 P2

USB2N0
USB2P0

USB2N1
USB2P1

USB2N2
USB2P2

USB2N3
USB2P3

USB2N4
USB2P4

USB2N5
USB2P5

USB2N6
USB2P6

USB2N7
USB2P7

USB3RN1
USB3RP1

USB3TN1
USB3TP1

USB3RN2
USB3RP2

USB3TN2
USB3TP2

USBRBIAS
USBRBIAS

RSVD
RSVD

OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43

Rev1p2

AN8
AM8

AR7
AT7

AR8
AP8

AR10
AT10

AM15
AL15

AM13
AN13

AP11
AN11

AR13
AP13

G20
H20

C33
B34

E18
F18

B33
A33

AJ10
AJ11
AN10
AM10

AL3
AT1
AH2
AV3

2

USBRBIAS

R154 22.6_0402_1%

T35@
T36@

1 2

USB20_N0 <34>
USB20_P0 <34>

USB20_N1 <34>
USB20_P1 <34>

USB20_N2 <33>
USB20_P2 <33>

USB20_N3 <33>
USB20_P3 <33>

USB20_N4 <31>
USB20_P4 <31>

USB20_N5 <28>
USB20_P5 <28>

USB20_N7 <28>
USB20_P7 <28>

U3RXDN1 <34>
U3RXDP1 <34>

U3TXDN1 <34>
U3TXDP1 <34>

U3RXDN2 <34>
U3RXDP2 <34>

U3TXDN2 <34>
U3TXDP2 <34>

CAD note:
Route single-end 50-ohms and max 450-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils

USB_OC#0 <10,34,36>
USB_CHG_OC# <34,36,8>
USB_OC#2 <10,33,36>

SLP_CHG_CB0 <34,8>

USB-Right1
USB-Right2
USB-Left1
CardReader
WiMAX / BT
Touch Screen

Camera

USB-Right Rear
USB-Right Front
USB-Left

1

B B

A A

Security Classification

Security Classification

Security Classification

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HSW MCP(7/11) PCIE,USB

HSW MCP(7/11) PCIE,USB

HSW MCP(7/11) PCIE,USB

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

1

0.1

0.1

0.1

11 49Sunday, April 07, 2013

11 49Sunday, April 07, 2013

11 49Sunday, April 07, 2013

5

D D

+3VS

12

R422

100K_0402_5%

C C

VCCST_PG_EC<36,9>

VID ALERT

S

VR_SVID_ALRT#<46>

@

U16

NC1VCC

2

A

3

GND

74AUP1G07GW_TSSOP5

+1.05VS_VTT

Place the PU

12

resistors close to CPU

R171
75_0402_1%

R172
43_0402_1%

+3VALW _PCH

5

4

Y

12

H_CPU_SVIDALRT#

R309

10K_0402_5%

VCCST_PG_EC_R

+1.05VS_VTT

12

R166
0_0402_5%

1 2

4

@

VCCST_PWRGD <36,44>

VR_SVID_CLK<46>

3

+VCCIOA_OUT

VR_ON<46>

VGATE<46>

Reserved Only

C167

1 2

1 2

0.1U_0402_16V7K

@

T131 @

+CPU_CORE

+CPU_CORE

T107 @

+1.05VS_VTT

+1.35V

R1670_0402_5% @

CPU_PW R_DEBUG

T37 @
T38 @

T39 @
T40 @

VCC_SENSE_R

T41 @

+VCCIO_OUT

T42 @
T43 @

T44 @

H_CPU_SVIDALRT#
VIDSOUT

VCCST_PG_EC_R
PCH_VR_EN

T45 @
T46 @
T47 @
T48 @
T98 @
T142 @
T143 @
T144 @
T141 @
T140 @
T147 @
T145 @
T146 @

2

AH26

AJ31
AJ33

AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50

N58

AC58

E63

AB23

A59

E20
AD23
AA23
AE59

N63

B59

C59

D63

H59

P62

P60

P61

N59

N61
AD60

AD59
AA59
AE60
AC59

AG58

U59

V59
AC22

AE22
AE23

AB57
AD57

AG57

C24

C28

C32

L59
J58

F59

L62
L63
F60

T59

U1L

RSVD
RSVD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VCC
RSVD
RSVD

VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD

VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY

VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

VCCST
VCCST
VCCST

VCC
VCC
VCC
VCC
VCC
VCC

HASWELL_MCP_E

HSW ULT POWER

12 OF 19

1

+CPU_CORE

C36

VCC

C40

VCC

C44

VCC

C48

VCC

C52

VCC

C56

VCC

E23

VCC

E25

VCC

E27

VCC

E29

VCC

E31

VCC

E33

VCC

E35

VCC

E37

VCC

E39

VCC

E41

VCC

E43

VCC

E45

VCC

E47

VCC

E49

VCC

E51

VCC

E53

VCC

E55

VCC

E57

VCC

F24

VCC

F28

VCC

F32

VCC

F36

VCC

F40

VCC

F44

VCC

F48

VCC

F52

VCC

F56

VCC

G23

VCC

G25

VCC

G27

VCC

G29

VCC

G31

VCC

G33

VCC

G35

VCC

G37

VCC

G39

VCC

G41

VCC

G43

VCC

G45

VCC

G47

VCC

G49

VCC

G51

VCC

G53

VCC

G55

VCC

G57

VCC

H23

VCC

J23

VCC

K23

VCC

K57

VCC

L22

VCC

M23

VCC

M57

VCC

P57

VCC

U57

VCC

W57

VCC

Rev1p2

B B

A A

SVID DATA

VR_SVID_DAT<46>

100_0402_1%

VCC_SENSE_R

VSS_SENSE_R<14>

100_0402_1%

R177

R233

+1.05VS_VTT

R174
0_0402_5%

12

@

+CPU_CORE

12

Note: 0 ohm PLACED CLOSE TO CPU

12

R178

@

0_0402_5%

12

R235

12

5

0_0402_5%@

Place the PU
resistors close to CPU

12

R173
130_0402_1%

VIDSOUT

VCC_SENSE <46>

VSS_SENSE <46>

4

+1.35V

12

CC53

47U_0805_6.3V6M

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

2012/07/10 2013/07/10

2012/07/10 2013/07/10

3

+1.35V

VDDQ DECOUPLING

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C8

1

1

@

2

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C9

C10

1

2

10U_0603_6.3V6M

C11

1

1

2

1

@

C12

2

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

@

C13

2

10U_0603_6.3V6M

1

1

C14

C15

2

2

+1.35V : 470UF/2V/7343 *2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

Date: Sheet of

Date: Sheet of

Date: Sheet of

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C17

C16

2

10UF/6.3V/0603 * 6

2.2UF/6.3V/0402 * 4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HSW MCP(8/11) Power

HSW MCP(8/11) Power

HSW MCP(8/11) Power

1

0.1

0.1

0.1

12 49Sunday, April 07, 2013

12 49Sunday, April 07, 2013

12 49Sunday, April 07, 2013

5

+1.05VS_VTT

1

1

C21

2

2

D D

+1.05VS_VTT +1.05VS_AUSB3PLL

1 2

L1

2.2UH_LQM2MPN2R2NG0L_30%

Idc 1.2A Rdc 0.11ohm +/-30%

L2

2.2UH_LQM2MPN2R2NG0L_30%

Idc 1.2A Rdc 0.11ohm +/-30%

L3

2.2UH_LQM2MPN2R2NG0L_30%

Idc 1.2A Rdc 0.11ohm +/-30%

C C

+1.05VS_VTT +1.05VS_AXCK_DCB

L4

2.2UH_LQM2MPN2R2NG0L_30%

Idc 1.2A Rdc 0.11ohm +/-30%

L5

2.2UH_LQM2MPN2R2NG0L_30%

Idc 1.2A Rdc 0.11ohm +/-30%

1 2

R210
0_0805_5%

1 2

1 2

@

1 2

1 2

+1.05VS_ASATA3PLL

+1.05VS_APLLOPI

+1.05VS_AXCK_LCPLL

1U_0402_6.3V6K

Near K9 Near L10 Near M9

Near B18

1 2

C42 1U_0402_6.3V6K

1 2

C64 22U_0805_6.3V6M

Near B11

1 2

C46 1U_0402_6.3V6K

1 2

C65 22U_0805_6.3V6M

Near AA21

1 2

C47 1U_0402_6.3V6K

1 2

C66 22U_0805_6.3V6M@

Near J18

1 2

C48 1U_0402_6.3V6K

1 2

C67 22U_0805_6.3V6M

Near A20

1 2

C49 1U_0402_6.3V6K

1 2

C68 22U_0805_6.3V6M

@

1

C20

C31

2

1U_0402_6.3V6K

ESD@

C35

1U_0402_6.3V6K

100P_0402_50V8J

Close to CPU

+1.05VS_VTT

Near J17
Near R21

4

ESD@

ESD@

C39

C60

100P_0402_50V8J

100P_0402_50V8J

HDA --> 3.3V or 1.5V
I2C --> 1.8V

12

Near AC9
Near AH10
Near V8

C57

12

1U_0402_6.3V6K
C56

12

1U_0402_6.3V6K

+1.05VS_AUSB3PLL

+1.05VS_ASATA3PLL

+1.05VS_APLLOPI

+3VALW _PCH

C38
1U_0402_6.3V6K

C28

12

22U_0805_6.3V6M
C59

@

12

0.1U_0402_16V7K
C29

12

22U_0805_6.3V6M

+3VS

+1.05VS_AXCK_DCB

+1.05VS_AXCK_LCPLL

+3VALW _PCH

T99 @

T105 @

T116 @

+3VALW _PCH

T100 @
T101 @
T102 @

B18
B11

Y20

AA21

W21

AH14

AH13

AC9
AA9

AH10

K19
A20

R21
T21
K18

M20

V21
AE20
AE21

K9

L10

M9
N8
P9

J13

V8

W9

J18

J17

U1M

VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL

RSVD
VCCAPLL
VCCAPLL

DCPSUS3

VCCHDA

DCPSUS2

VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3

VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3

3

mPHY

OPI

USB3

AXALIA/HDA

VRM/USB2/AZALIA

GPIO/LCC

LPT LP POWER

HASWELL_MCP_E

13 OF 19

RTC

SPI

CORE

THERMAL SENSOR

SDIO/PLSS

SUS OSCILLATOR

USB2

VCCSUS3_3

VCCRTC
DCPRTC

VCCSPI

VCCASW
VCCASW

VCC1_05
VCC1_05
VCC1_05
VCC1_05

VCC1_05
DCPSUSBYP
DCPSUSBYP

VCCASW
VCCASW

VCCASW
DCPSUS1
DCPSUS1

VCCTS1_5

VCC3_3
VCC3_3

VCCSDIO

VCCSDIO

DCPSUS4

RSVD
VCC1_05
VCC1_05

Rev1p2

+3VALW _PCH

AH11
AG10
AE7

Y8

AG14
AG13

J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8

J15
K14
K16

U8
T9

AB8

AC20
AG16
AG17

C30 1U_0402_6.3V6K

+VCCRTCEXT

C54 0.1U_0402_16V7K

+3VALW _PCH

C58 0.1U_0402_16V7K

C27 10U_0603_6.3V6M
C33 1U_0402_6.3V6K
C40 1U_0402_6.3V6K

+PCH_VCCDSW

C36 22U_0805_6.3V6M
C37 1U_0402_6.3V6K

1 2

C55 0.1U_0402_16V7K

1 2

C44 1U_0402_6.3V6K

T137@

T103@

+1.05VS_VTT

1 2

C45 1U_0402_6.3V6K

2

1 2

1 2

@

1 2
1 2
1 2

1 2
1 2

T108@

12

+RTCVCC

+1.05VS_VTT
+1.05VS_VTT

+1.05VS_VTT

+1.5VS
+3VS

+3VS

C41
1U_0402_6.3V6K

1 2

+RTCVCC

C52

1U_0402_6.3V6K

1

1

1

@

C51

2

2

0.1U_0402_16V7K

1

@

C50

2

0.1U_0402_16V7K

+3VALW to +3VALW_PCH

B B

PCH_PW R_EN#<38>

A A

5

PCH_PW R_EN#

+3VALW

12

RH3 47K_0402_5%

4

Q10
AO3413_SOT23

S

G

1

CH1110.1U_0402_25V6

2

+3VALW _PCH

D

13

2

1

CH1130.1U_0402_10V7K

CH1120.01U_0402_25V7K

2

Security Classification

Security Classification

Security Classification

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HSW MCP(9/11) Power

HSW MCP(9/11) Power

HSW MCP(9/11) Power

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

13 49Sunday, April 07, 2013

13 49Sunday, April 07, 2013

13 49Sunday, April 07, 2013

1

0.1

0.1

0.1

5

4

3

2

1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U1O

HASWELL_MCP_E

15 OF 19

Rev1p2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31

G18
G22

D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49

D50
D51
D53
D54
D55
D57
D59
D62

E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61

H13

U1P

HASWELL_MCP_E

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS
VSS

16 OF 19

VSS_SENSE

Rev1p2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS

VSS

H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63

V58
AH46
V23
E62
AH16

VSS_SENSE_R <12>

HASWELL_MCP_E

D D

C C

B B

A11
A14
A18
A24
A28
A32
A36
A40
A44
A48
A52
A56

AA1
AA58
AB10
AB20
AB22

AB7
AC61
AD21

AD3
AD63
AE10

AE5
AE58

AF11
AF12
AF14
AF15
AF17
AF18

AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57

AJ13
AJ14
AJ23
AJ25
AJ27
AJ29

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U1N

14 OF 19

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Rev1p2

AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20

AP22
AP23
AP26
AP29

AP3
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49

AR5
AR52

AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63

AU1
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55

A A

Security Classification

Security Classification

Security Classification

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HSW MCP(10/11) GND

HSW MCP(10/11) GND

HSW MCP(10/11) GND

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

0.1

0.1

0.1

14 49Sunday, April 07, 2013

14 49Sunday, April 07, 2013

14 49Sunday, April 07, 2013

1

5

4

3

2

1

U1Q

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

CFG16
CFG18
CFG17
CFG19

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

U1S

AC60

CFG0

AC62

CFG1

AC63

CFG2

AA63

CFG3

AA60

CFG4

Y62

CFG5

Y61

CFG6

Y60

CFG7

V62

CFG8

V61

CFG9

V60

CFG10

U60

CFG11

T63

CFG12

T62

CFG13

T61

CFG14

T60

CFG15

AA62

CFG16

U63

CFG18

AA61

CFG17

U62

CFG19

V63

CFG_RCOMP

A5

RSVD

E1

RSVD

D1

RSVD

J20

RSVD

H18

RSVD

B12

TD_IREF

DC_TEST_AY2_AW2
DC_TEST_AY3_AW3

T49 @

DC_TEST_AY61_AW 61
DC_TEST_AY62_AW 62

D D

C C

B B

T50 @

T110 @
T109 @
T112 @

T113 @
T117 @
T115 @
T119 @
T118 @
T121 @
T120 @
T124 @
T122 @
T125 @
T123 @

T128 @
T127 @
T129 @
T126 @

DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63

DC_TEST_C1_C2

CFG_RCOMP

T90 @
T91 @

T92 @
T93 @
T94 @

TD_IREF

HASWELL_MCP_E

17 OF 19

HASWELL_MCP_E

RESERVED

19 OF 19

DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63

Rev1p2

PROC_OPI_RCOMP

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD

RSVD_TP
RSVD_TP

RSVD_TP

RSVD
RSVD

RSVD

RSVD
RSVD

VSS
VSS

RSVD
RSVD

Rev1p2

A3
A4

A60
A61
A62
AV1
AW1
AW2

DC_TEST_AY2_AW2

AW3

DC_TEST_AY3_AW3

AW61

DC_TEST_AY61_AW 61

AW62

DC_TEST_AY62_AW 62

AW63

AV63
AU63

C63
C62
B43

A51
B51

L60
N60
W23

Y22
AY15

AV62
D58

P22
N21

P20
R20

DC_TEST_A3_B3

DC_TEST_A61_B61

T75@
T76@

T77@
T78@
T79@

T80@
T81@

T82@
T83@
T84@

T85@

OPI_COMP

T86@
T87@

T88@
T89@

T58@
T59@
T60@

T61@
T62@

T63@

T51 @
T52 @
T53 @
T54 @

T55 @
T56 @
T57 @

U1R

AT2

RSVD

AU44

RSVD

AV44

RSVD

D15

RSVD

F22

RSVD

H22

RSVD

J21

RSVD

CFG Straps for Processor

Physical Debug Enable (DFX Privacy)

CFG3

HASWELL_MCP_E

18 OF 19

CFG3

12

R224
1K_0402_1%

@

1: DISABLED
0: ENABLED; SET DFX ENABLED BIT

I

N DEBUG INTERFACE MSR

CFG4

12

R225
1K_0402_5%

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

Rev1p2

N23
R23
T23
U10

AL1
AM11
AP7
AU10
AU15
AW14
AY14

T64@
T65@
T66@
T67@

T68@
T69@
T70@
T71@
T72@
T73@
T74@

12

R222 49.9_0402_1%
R223 49.9_0402_1%
R226 8.2K_0402_5%

A A

5

CFG_RCOMP

12
12

OPI_COMP

TD_IREF

Display Port Presence Strap

1 : Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

Security Classification

Security Classification

Security Classification

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/07/10 2013/07/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HSW MCP(11/11) RSVD

HSW MCP(11/11) RSVD

HSW MCP(11/11) RSVD

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

0.1

0.1

0.1

15 49Sunday, April 07, 2013

15 49Sunday, April 07, 2013

15 49Sunday, April 07, 2013

1

A

SA_DIMM_VREFDQ<6>

C158

0.022U_0402_25V7K

1 1

R176

24.9_0402_1%

1 2

1

@

2

12

@

R293
2_0402_1%

+1.35V

12

12

R54

1.8K_0402_1%

R185

1.8K_0402_1%

+V_DDR_REFA

C106

0.1U_0402_16V7K

1

2

Note: Depend on Project

Layout Note:
Place near JDIMM1

+1.35V

C109

C107

1U_0402_6.3V6K

1

@

2

2 2

+1.35V

C111

10U_0603_6.3V6M

1

1

2

2

+1.35V

C115

10U_0603_6.3V6M

1

1

2

2

3 3

+0.675VS

C121

1U_0402_6.3V6K

1

@

@

2

Layout Note:

ace near JDIMM1.203,204

Pl

4 4

1U_0402_6.3V6K

C110

C108

1U_0402_6.3V6K

1

@

2

C112

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

C116

10U_0603_6.3V6M

10U_0603_6.3V6M

1

@

2

C122

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

1

2

2

C114

10U_0603_6.3V6M

C113

1

2

C117

C123

1U_0402_6.3V6K

C124

1U_0402_6.3V6K

1

1

2

2

All VREF traces should
have 10 mil trace width

DDRA_CKE0_DIMMA<6>

DDR_A_BS2<6>

SA_CLK_DDR0<6>
SA_CLK_DDR#0<6>

DDR_A_BS0<6>
DDR_A_WE#<6>

DDR_A_CAS#<6>

DDRA_CS1_DIMMA#<6>

+3VS

+0.675VS

C125

0.1U_0402_16V7K

1

2

DDRA_CKE0_DIMMA

DDR_A_BS2

DDRA_CS1_DIMMA#

@

1 2

DDR_A_D4
DDR_A_D5

DDR_A_D3
DDR_A_D7

DDR_A_D8
DDR_A_D13

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D15
DDR_A_D11

DDR_A_D21
DDR_A_D18

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D23
DDR_A_D17

DDR_A_D33
DDR_A_D36

DDR_A_D35
DDR_A_D39

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

SA_CLK_DDR0
SA_CLK_DDR#0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_A_D45
DDR_A_D40

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D43
DDR_A_D42

DDR_A_D25
DDR_A_D24

DDR_A_D26
DDR_A_D31

DDR_A_D59
DDR_A_D58

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D57
DDR_A_D56

DDR_A_D52
DDR_A_D53

DDR_A_D49
DDR_A_D48

R211

0_0402_5%

@

1 2

+1.35V

0_0402_5%

B

R212

JDDR3L

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

LCN_DAN06-K4406-0103

@

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

CKE1

CK1#

RAS#

ODT0
ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

EVENT#

GND2

BOSS2

VSS
DQ4
DQ5
VSS

VSS
DQ6
DQ7
VSS

VSS
DM1

VSS

VSS

VSS
DM2
VSS

VSS

VSS

VSS

VSS

VDD

VDD

VDD

VDD

VDD
CK1

VDD
BA1

VDD

VDD

VDD
VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SDA

SCL
VTT

C

+1.35V

2
4

DDR_A_D0

6

DDR_A_D1

8
10

DDR_A_DQS#0

12

DDR_A_DQS0

14
16

DDR_A_D6

18

DDR_A_D2

20
22

DDR_A_D9

24

DDR_A_D12

26
28
30

DIMM_DRAMRST#

32
34

DDR_A_D14

36

DDR_A_D10

38
40

DDR_A_D19

42

DDR_A_D20

44
46
48
50

DDR_A_D22

52

DDR_A_D16

54
56

DDR_A_D37

58

DDR_A_D32

60
62

DDR_A_DQS#4

64

DDR_A_DQS4

66
68

DDR_A_D34

70

DDR_A_D38

72

74

DDRA_CKE1_DIMMA

76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

SA_CLK_DDR1
SA_CLK_DDR#1

DDR_A_BS1
DDR_A_RAS#

DDRA_CS0_DIMMA#
SA_ODT0

SA_ODT1

+VREF_CA
DDR_A_D44

DDR_A_D41

DDR_A_D47
DDR_A_D46

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D27

DDR_A_D62
DDR_A_D63

DDR_A_D61
DDR_A_D60

DDR_A_D50
DDR_A_D51

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D55
DDR_A_D54

+0.675VS

A15
A14

A11

A7
A6

A4
A2

A0

S0#

NC

DDR3 SO-DIMM A
Reverse Type
H=4.0mm

DDR_PG_CTRL<5>

DIMM_DRAMRST# <17,5>

DDRA_CKE1_DIMMA <6>

SA_CLK_DDR1 <6>
SA_CLK_DDR#1 <6>

DDR_A_BS1 <6>
DDR_A_RAS# <6>

DDRA_CS0_DIMMA# <6>

0.1U_0402_16V7K
C120

1

2

Note: Depend on Project

PM_SMBDATA <17,31,33,8>
PM_SMBCLK <17,31,33,8>

DDR_A_DQS#[0..7] <6>

DDR_A_DQS[0..7] <6>

DDR_A_D[0..63] <6>

DDR_A_MA[0..15] <6>

+1.35V

12

R56

1.8K_0402_1%
R296

1 2

2_0402_1%

12

R295

1.8K_0402_1%

+VREF_CA <17>

0.1U_0402_16V7K

U45

NC1VCC

2

A

3

GND

74AUP1G07GW_TSSOP5

1

@

2

12

@

C34

1

@

2

5

4

Y

C162

0.022U_0402_25V7K

R294

24.9_0402_1%

+1.35V

SM_DIMM_VREFCA <6>

D

+5VS

R191
100K_0402_5%

1 2

2

G

DDR_VTT_PG_CTRL <43>

+1.35V

Q18
LBSS138LT1G_SOT-23-3

13

D

S

M_A_B_DIMM_ODT

1 2

R187

66.5_0402_1%

R188

1 2

66.5_0402_1%

1 2

R189

66.5_0402_1%

R190

1 2

66.5_0402_1%

E

SA_ODT0

SA_ODT1

SB_ODT0

SB_ODT1

SB_ODT0 <17>

SB_ODT1 <17>

Channel A

<Address: SA1:SA0=00>

Note: Depend on Project

A

DIMM_1 STD H:4mm

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/07/10 2013/07/10

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMA

DDRIII DIMMA

DDRIII DIMMA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

16 49Sunday, April 07, 2013

16 49Sunday, April 07, 2013

E

16 49Sunday, April 07, 2013

0.1

0.1

0.1

A

SB_DIMM_VREFDQ<6>

C159

0.022U_0402_25V7K

1 1

R179

24.9_0402_1%

1 2

1

@

2

12

@

R297
2_0402_1%

+1.35V

12

12

R57

1.8K_0402_1%

R213

1.8K_0402_1%

+V_DDR_REFB

C128

0.1U_0402_16V7K

1

2

Note: Depend on Project

Layout Note:
Place near JDIMM1

+1.35V

C130

1U_0402_6.3V6K

C131

1U_0402_6.3V6K

C132

C129

1U_0402_6.3V6K

1

1

@

2

2 2

+1.35V

10U_0603_6.3V6M

1

2

+1.35V

10U_0603_6.3V6M

1

2

3 3

<BOM Structure>

+0.675VS

1U_0402_6.3V6K

1

2

<BOM Structure>

Layout Note:

ace near JDIMM1.203,204

Pl

4 4

2

C133

C134

10U_0603_6.3V6M

1

2

C137

C138

10U_0603_6.3V6M

1

2

<BOM Structure>

1U_0402_6.3V6K

C143

1

@

2

@

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

1

@

2

C144

<BOM Structure>

1U_0402_6.3V6K

1

1

2

2

C135

C136

10U_0603_6.3V6M

1

2

C139

C145

1U_0402_6.3V6K

C146

1U_0402_6.3V6K

1

1

@

2

2

All VREF traces should

ave 10 mil trace width

h

DDRB_CKE0_DIMMB<6>

DDR_B_BS2<6>

SB_CLK_DDR0<6>
SB_CLK_DDR#0<6>

DDR_B_BS0<6>
DDR_B_WE#<6>

DDR_B_CAS#<6>

DDRB_CS1_DIMMB#<6>

+3VS

R229

10K_0402_5%

+3VS

+0.675VS

1 2

C147

0.1U_0402_16V7K

1

2

DDRB_CKE0_DIMMB

DDR_B_BS2

SB_CLK_DDR0
SB_CLK_DDR#0

DDRB_CS1_DIMMB#

@

1 2

DDR_B_D19
DDR_B_D17

DDR_B_D21
DDR_B_D20

DDR_B_D5
DDR_B_D4

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D3
DDR_B_D2

DDR_B_D24
DDR_B_D25

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D31
DDR_B_D27

DDR_B_D12
DDR_B_D13

DDR_B_D10
DDR_B_D14

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13

DDR_B_D36
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D38
DDR_B_D34

DDR_B_D44
DDR_B_D41

DDR_B_D47
DDR_B_D43

DDR_B_D52
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D54

DDR_B_D63
DDR_B_D62

DDR_B_D60
DDR_B_D58

R231

0_0402_5%

B

+1.35V

JDDR3H

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4406-0102
@

VSS3

DQS#0

DQS0

VSS6

VSS8
DQ12
DQ13

VSS10

DQ14
DQ15

DQ20
DQ21

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3
DQ30

DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30
VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42
VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

DQ4
DQ5

DQ6
DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA
SCL

C

+1.35V

2
4

DDR_B_D16

6

DDR_B_D18

8
10

DDR_B_DQS#2

12

DDR_B_DQS2

14
16

DDR_B_D22

18

DDR_B_D23

20
22

DDR_B_D1

24

DDR_B_D0

26
28
30

DIMM_DRAMRST#

32
34

DDR_B_D6

36

DDR_B_D7

38
40

DDR_B_D29

42

DDR_B_D26

44
46
48
50

DDR_B_D30

52

DDR_B_D28

54
56

DDR_B_D9

58

DDR_B_D8

60
62

DDR_B_DQS#1

64

DDR_B_DQS1

66
68

DDR_B_D11

70

DDR_B_D15

72

74

DDRB_CKE1_DIMMB

76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

SB_CLK_DDR1
SB_CLK_DDR#1

DDR_B_BS1
DDR_B_RAS#

DDRB_CS0_DIMMB#
SB_ODT0

SB_ODT1

+VREF_CA
DDR_B_D37

DDR_B_D32

DDR_B_D39
DDR_B_D35

DDR_B_D45
DDR_B_D40

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D42
DDR_B_D46

DDR_B_D51
DDR_B_D55

DDR_B_D53
DDR_B_D48

DDR_B_D56
DDR_B_D57

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D61
DDR_B_D59

+0.675VS

A15
A14

A11

A7
A6

A4
A2

A0

S0#

G2

DIMM_DRAMRST# <16,5>

DDRB_CKE1_DIMMB <6>

SB_CLK_DDR1 <6>
SB_CLK_DDR#1 <6>

DDR_B_BS1 <6>
DDR_B_RAS# <6>

DDRB_CS0_DIMMB# <6>
SB_ODT0 <16>

SB_ODT1 <16>

0.1U_0402_16V7K

1

2

Note: Depend on Project

PM_SMBDATA <16,31,33,8>
PM_SMBCLK <16,31,33,8>

DDR_B_DQS#[0..7] <6>

DDR_B_DQS[0..7] <6>

DDR_B_D[0..63] <6>

DDR_B_MA[0..15] <6>

DDR3 SO-DIMM B
Reverse Type
H=9.0mm

+VREF_CA <16>

C142

D

E

Channel B

<Address: SA1:SA0=10>

Note: Depend on Project

A

DIMM_2 STD H:4mm

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/07/10 2013/07/10

2012/07/10 2013/07/10

2012/07/10 2013/07/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMB

DDRIII DIMMB

DDRIII DIMMB

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

of

17 49Sunday, April 07, 2013

17 49Sunday, April 07, 2013

E

17 49Sunday, April 07, 2013

0.1

0.1

0.1

A

PCIE_GTX_C_CRX_P[0..3]<11>

PCIE_GTX_C_CRX_N[0..3]<11>

PCIE_CTX_C_GRX_P[0..3]<11>

PCIE_CTX_C_GRX_N[0..3]<11>

1 1

PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3

2 2

3 3

CLK_REQ_VGA#<8>

4 4

PCIE_GTX_C_CRX_P[0..3]

PCIE_GTX_C_CRX_N[0..3]

PCIE_CTX_C_GRX_P[0..3]

PCIE_CTX_C_GRX_N[0..3]

1 2

CV1 0.22U_0402_16V7KOPT@

1 2

CV2 0.22U_0402_16V7KOPT@

1 2

CV3 0.22U_0402_16V7KOPT@

1 2

CV4 0.22U_0402_16V7KOPT@

1 2

CV5 0.22U_0402_16V7KOPT@

1 2

CV6 0.22U_0402_16V7KOPT@

1 2

CV7 0.22U_0402_16V7KOPT@

1 2

CV8 0.22U_0402_16V7KOPT@

CLK_PCIE_VGA<8>

CLK_PCIE_VGA#<8>

PLTRST_VGA#<9>

61

QV2A

2N7002DW-T/R7_SOT363-6

2

OPT@

1 2

@

RV4 200_0402_1%

+3VS_DGPU

PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3

PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3

CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_REQ_GPU#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

RV5

2.49K_0402_1%

OPT@

1 2

B

UV1A

AG6

PEX_RX0

AG7

PEX_RX0_N

AF7

PEX_RX1

AE7

PEX_RX1_N

AE9

PEX_RX2

AF9

PEX_RX2_N

AG9

PEX_RX3

AG10

PEX_RX3_N

AF10

PEX_RX4

AE10

PEX_RX4_N

AE12

PEX_RX5

AF12

PEX_RX5_N

AG12

PEX_RX6

AG13

PEX_RX6_N

AF13

PEX_RX7

AE13

PEX_RX7_N

AE15

NC

AF15

NC

AG15

NC

AG16

NC

AF16

NC

AE16

NC

AE18

NC

AF18

NC

AG18

NC

AG19

NC

AF19

NC

AE19

NC

AE21

NC

AF21

NC

AG21

NC

AG22

NC

AC9

PEX_TX0

AB9

PEX_TX0_N

AB10

PEX_TX1

AC10

PEX_TX1_N

AD11

PEX_TX2

AC11

PEX_TX2_N

AC12

PEX_TX3

AB12

PEX_TX3_N

AB13

PEX_TX4

AC13

PEX_TX4_N

AD14

PEX_TX5

AC14

PEX_TX5_N

AC15

PEX_TX6

AB15

PEX_TX6_N

AB16

PEX_TX7

AC16

PEX_TX7_N

AD17

NC

AC17

NC

AC18

NC

AB18

NC

AB19

NC

AC19

NC

AD20

NC

AC20

NC

AC21

NC

AB21

NC

AD23

NC

AE23

NC

AF24

NC

AE24

NC

AG24

NC

AG25

NC

AE8

PEX_REFCLK

AD8

PEX_REFCLK_N

AC6

PEX_CLKREQ_N

AF22

PEX_TSTCLK_OUT

AE22

PEX_TSTCLK_OUT_N

AC7

PEX_RST_N

AF25

PEX_TERMP

N14P-GV2-S-A2_FCBGA595

N14PGV2@

1

CV17
18P_0402_50V8J

NOGCLK@

2

Part 1 of 6

PCI EXPRESS

YV1

1

1

DACsI2C GPIO

120mA

52mA
71mA
41mA

CLK

NOGCLK@

27MHZ_16PF

GND

2

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC

DACA_VSYNC

DACA_VDD
DACA_VREF
DACA_RSET

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2CS_SCL

I2CS_SDA

CORE_PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

XTAL_OUTBUFF

3

GND

4

18P_0402_50V8J

NC

3

C6
B2
D6
C7
F9
A3
A4
B6
A6
F8
C5
E7
D7
B4
B3
C3
D5
D4
C2
F7
E6
C4

AB6

AG3
AF4
AF3

AE3
AE4

W5
AE2
AF2

B7
A7

C9
C8

A9
B9

D9
D8

L6
M6

N6

C11
B10

A10
C10

XTAL_OUTXTALIN

CV18

NOGCLK@

FB_CLAMP_MON

FB_CLAMP_REQ#
OVERT#_VGA

GPU_EVENT
DGPU_VID

GPS_DOWN#
PSI

VGA_CRT_CLK
VGA_CRT_DATA

HDCP_SCL
HDCP_SDA

VGA_EDID_CLK
VGA_EDID_DATA

SMB_CLK_GPU
SMB_DATA_GPU

+PLLVDD

+GPU_PLLVDD

XTALIN
XTAL_OUT

XTAL_SSIN
XTAL_OUTBUFF

1

2

C

+3VS_DGPU

G

2

QV8

N14PGV2@

13

D

S

2N7002KW_SOT323-3

DGPU_VID <47>

GPS_DOWN# <36>

PSI <47>

1

1

CV9

RV7

CV113

CV10

2

0.1U_0402_10V7K

0.1U_0402_10V7K

OPT@

12

@EMI@

1

@EMI@

2

OPT@

2

CV42, CV43 under GPU
close to ball : AE8,AD7

VGA_X1<31>

10_0402_5%

10P_0402_50V8J

for EMI

DV1

12

RB751V40_SC76-2

OPT@

CLK_REQ_GC6# <36>

EC GPS_DOWN# must be OD\Low

o avoid leakage

t

OPT@

BLM18PG181SN1D_2P

1

CV11

2

4.7U_0603_6.3V6K

OPT@

1 2

RV8 0_0402_5%

DGCLK@

1 2

1

2

OPT@

FB_CLAMP <19,22,36>

+1.05VS_DGPU

LV1

CV12

OPT@

22U_0805_6.3V6M

XTALIN

For GC6

1

2

D

Internal Thermal Sensor

SMB_CLK_GPU

CV13

SMB_DATA_GPU

10U_0603_6.3V6M

+PLLVDD

under GPU
close to AD8

JTAG_TRST<20>
TESTMODE<20>

+3VS_DGPU

5

4

2

2N7002DW-T/R7_SOT363-6

OPT@

QV1A

2N7002DW-T/R7_SOT363-6

61

1

CV14

2

OPT@

0.1U_0402_10V7K

GPS_DOWN#
GPU_EVENT
XTAL_OUTBUFF
XTAL_SSIN

CLK_REQ_GPU#
FB_CLAMP_REQ#
FB_CLAMP_MON
OVERT#_VGA

VGA_EDID_CLK
VGA_EDID_DATA
SMB_CLK_GPU
SMB_DATA_GPU

VGA_CRT_CLK
VGA_CRT_DATA
HDCP_SDA
HDCP_SCL

CLK_REQ_GC6#

FB_CLAMP

OPT@

QV1B

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

3

LV2

1 2

FBMA-L11-160808300LMA25T_2P

1

CV15

2

OPT@

22U_0805_6.3V6M

E

RPV1

10K_8P4R_5%

OPT@

RPV12

10K_8P4R_5%

OPT@

RPV2

2.2K_8P4R_5%

OPT@

RPV3

2.2K_8P4R_5%

OPT@

RPV13

10K_8P4R_5%

OPT@

EC_SMB_CK2 <36,8>

EC_SMB_DA2 <36,8>

OPT@

+3VS_DGPU

+1.05VS_DGPU

1

2

+3VS

CV16

OPT@

10U_0603_6.3V6M

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x PEG & DAC

VGA_N14x PEG & DAC

VGA_N14x PEG & DAC

18 49Sunday, April 07, 2013

18 49Sunday, April 07, 2013

E

18 49Sunday, April 07, 2013

0.1

0.1

0.1

A

VRAM Interface

Place close to the first T point

pl

acement request

+VRAM_1.5VS

12

RV14 100_0402_5%
RV67 100_0402_5%
RV69 100_0402_5%
RV73 100_0402_5%
RV76 100_0402_5%
RV82 100_0402_5%
RV84 100_0402_5%
RV86 100_0402_5%

+VRAM_1.5VS

+VRAM_1.5VS

DDR3

CMDA16
CMDA19
CMDA3
CMDA0
CMDA20

OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@

RV88 100_0402_5%
RV90 100_0402_5%
RV92 100_0402_5%
RV93 100_0402_5%
RV96 100_0402_5%
RV98 100_0402_5%
RV100 100_0402_5%
RV102 100_0402_5%

RV10 100_0402_5%
RV12 100_0402_5%

CMDA12

12

CMDA14

12

CMDA15

12

CMDA7

12

CMDA11

12

CMDA4

12

CMDA5

12

CMDA6

12

CMDA22

12

OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@

RPV8

100_0804_8P4R_5%

OPT@

OPT@
OPT@

Command Bit Default Pull-down

CMDA9

12

CMDA21

12

CMDA24

12

CMDA23

12

CMDA13

12

CMDA8

12

CMDA10

18

CMDA26

27

CMDA25

36

CMDA27

45

CMDA28

12

CMDA29

12

CMDA30

ODTx

10k
10k

CKEx
RST

10k

CS* No Termination

1 2

RV36 10K_0402_5%OPT@

1 2

RV37 10K_0402_5%OPT@

1 2

RV38 10K_0402_5%OPT@

1 2

RV40 10K_0402_5%OPT@

1 2

RV15 10K_0402_5%OPT@

12

RV66 100_0402_5%

12

OPT@

RV68 100_0402_5%

12

OPT@

RV70 100_0402_5%

12

OPT@

RV75 100_0402_5%

12

OPT@

RV81 100_0402_5%

12

OPT@

RV83 100_0402_5%

12

OPT@

RV85 100_0402_5%

12

OPT@

RV87 100_0402_5%

OPT@

12

RV89 100_0402_5%

12

OPT@

RV91 100_0402_5%

12

OPT@

RV94 100_0402_5%

12

OPT@

RV95 100_0402_5%

12

OPT@

RV97 100_0402_5%

12

OPT@

RV99 100_0402_5%

12

OPT@

RV101 100_0402_5%

12

OPT@

RV103 100_0402_5%

OPT@

RPV9

1 8

CMDA28

2 7

CMDA27

3 6

CMDA25

4 5

CMDA26

100_0804_8P4R_5%

OPT@

RV11 100_0402_5%

OPT@

RV13 100_0402_5%

OPT@

12
12

+FB_PLLAVDD

CV20

22U_0805_6.3V6M

1

OPT@

2

MDA[15..0]
MDA[31..16]
MDA[47..32]
MDA[63..48]

Close to H22

CV21

0.1U_0402_10V7K

2

OPT@

1

CV22

OPT@

0.1U_0402_10V7K

1

2

Close to P22

CV114

0.1U_0402_10V7K

1

OPT@

2

UV1B

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

+FB_PLLAVDD

FB_CLAMP<18,22,36>

TV1 PAD
TV2 PAD

E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24

AA24

Y22

AA23

AD27

AB25
AD26
AC25

AA27

AA26

W26

Y25
R26
T25
N27
R27
V26

V27
W27
W25

F16

P22

D23

H22

F3

@

F22

J22

@

Part 2 of 6

FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

62mA

FB_PLLAVDD_1
FB_PLLAVDD_2

FB_VREF_PROBE

FB_DLLAVDD
FB_CLAMP

FBA_DEBUG0
FBA_DEBUG1

N14P-GV2-S-A2_FCBGA595

N14PGV2@

2mA

6

35mA

MEMORY

FBA_DQS_RN0
FBA_DQS_RN1

INTERFACE A

FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_WCK01_N
FBA_WCK23_N
FBA_WCK45_N
FBA_WCK67_N

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01
FBA_WCK23
FBA_WCK45
FBA_WCK67

C27

CMDA0

C26

CMDA1

E24

CMDA2

F24

CMDA3

D27

CMDA4

D26

CMDA5

F25

CMDA6

F26

CMDA7

F23

CMDA8

G22

CMDA9

G23

CMDA10

G24

CMDA11

F27

CMDA12

G25

CMDA13

G27

CMDA14

G26

CMDA15

M24

CMDA16

M23

CMDA17

K24

CMDA18

K23

CMDA19

M27

CMDA20

M26

CMDA21

M25

CMDA22

K26

CMDA23

K22

CMDA24

J23

CMDA25

J25

CMDA26

J24

CMDA27

K27

CMDA28

K25

CMDA29

J27

CMDA30

J26
D19

D14
C17
C22
P24
W24
AA25
U25

F19
C14
A16
A22
P25
W22
AB27
T27

E19
C15
B16
B22
R25
W23
AB26
T26

D24
D25

N22
M22

D18
C18
D17
D16
T24
U24
V24
V25

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7

DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7

CMDA[30..0] <23,24,25,26>

CLKA0 <23,25>
CLKA0# <23,25>

CLKA1 <24,26>
CLKA1# <24,26>

DQMA[3..0] <23,25>

DQMA[7..4] <24,26>

DQSA#[3..0] <23,25>

DQSA#[7..4] <24,26>

DQSA[3..0] <23,25>

DQSA[7..4] <24,26>

MDA[15..0]<23,25>
MDA[31..16]<23,25>
MDA[47..32]<24,26>
MDA[63..48]<24,26>

1 1

30ohms (ESR=0.01)

+1.05VS_DGPU

LV3

OPT@

1 2

FBMA-L11-160808300LMA25T_2P

Place close to BGA

Near GPU Close to F16

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PART Y WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PART Y WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PART Y WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N14x VRAM Interface

N14x VRAM Interface

N14x VRAM Interface

0.1

0.1

19 49Sunday, April 07, 2013

19 49Sunday, April 07, 2013

19 49Sunday, April 07, 2013

0.1

5

UV1C

AC3

IFPA_TXC

AC4

IFPA_TXC_N

Y4

IFPA_TXD0

Y3

IFPA_TXD0_N

AA3

IFPA_TXD1

AA2

IFPA_TXD1_N

AB1

IFPA_TXD2

AA1

IFPA_TXD2_N

AA4

D D

C C

B B

A A

IFPA_TXD3

AA5

IFPA_TXD3_N

AB5

IFPB_TXC

AB4

IFPB_TXC_N

AB3

IFPB_TXD4

AB2

IFPB_TXD4_N

AD3

IFPB_TXD5

AD2

IFPB_TXD5_N

AE1

IFPB_TXD6

AD1

IFPB_TXD6_N

AD4

IFPB_TXD7

AD5

IFPB_TXD7_N

T2

IFPC_L0

T3

IFPC_L0_N

T1

IFPC_L1

R1

IFPC_L1_N

R2

IFPC_L2

R3

IFPC_L2_N

N2

IFPC_L3

N3

IFPC_L3_N

V3

IFPD_L0

V4

IFPD_L0_N

U3

IFPD_L1

U4

IFPD_L1_N

T4

IFPD_L2

T5

IFPD_L2_N

R4

IFPD_L3

R5

IFPD_L3_N

N1

NC

M1

NC

M2

NC

M3

NC

K2

NC

K3

NC

K1

NC

J1

NC

M4

NC

M5

NC

L3

NC

L4

NC

K4

NC

K5

NC

J4

NC

J5

NC

N4

IFPC_AUX_I2CW_SCL

N5

IFPC_AUX_I2CW_SDA_N

P3

IFPD_AUX_I2CX_SCL

P4

IFPD_AUX_I2CX_SDA_N

J2

IFPE_AUX_I2CY_SCL

J3

IFPE_AUX_I2CY_SDA_N

H3

IFPF_AUX_I2CZ_SCL

H4

IFPF_AUX_I2CZ_SDA_N

N14P-GV2-S-A2_FCBGA595

N14PGV2@

Part 3 of 6

NC

GENERAL

MULTI_STRAP_REF0_GND

LVDS/TMDS

TEST

JTAG_TRST_N

SERIAL

BUFRST_N

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

THERMDP

THERMDN

VDD_SENSE

GND_SENSE

TESTMODE

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

F11

NC

AD10

NC

AD7

NC

B19

NC

V5

NC

V6

NC

G1

NC

G2

NC

G3

NC

G4

NC

G5

NC

G6

NC

G7

NC

V1

NC

V2

NC

W1

NC

W2

NC

W3

NC

W4

NC

D11
D10

NC

E9

NC

E10

NC

F10

NC

D1
D2
E4
E3
D3
C1

NC

F6
F4

NC

F5

NC

F12
E12

F2

F1

AD9
AE5
AE6
AF6
AD6
AG4

D12
B12
A12
C12

4

OPT@

1 2

RV16 10K_0402_5%

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

MULTI_STRAP_REF0_GND

VGA_VCC_SENSE

trace width: 16mils
differential voltage sensing.

VGA_VSS_SENSE

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS

ROM_SI
ROM_SO
ROM_SCLK

differential signal routing.

PAD
PAD
PAD @
PAD

N14PGV2@

1 2

RV17 40.2K_0402_1%

+VGA_CORE

RV26
100_0402_1%

OPT@

1 2

VGA_VCC_SENSE <47>

OPT@

12

RV35

100_0402_1%

TESTMODE <18>

@

TV3

@

TV4
TV5
TV6

@

JTAG_TRST <18>

VGA_VSS_SENSE <47>

3

Physical
Strapping pin

ROM_SO

ROM_SCLK

ROM_SI

STRAP0
STRAP1

STRAP2

STRAP3

STRAP4

SKU

Power Rail

+3VS_DGPU

+3VS_DGPU

+3VS_DGPU

+3VS_DGPU
+3VS_DGPU 3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]

+3VS_DGPU
+3VS_DGPU SOR0_EXPOSEDSOR2_EXPOSED SOR1_EXPOSED
+3VS_DGPU DP_PLL_VDD33V

Device ID biit5 to bit0

N14P-GV2

N14M-GL

MULTI LEVEL STRAPS

12

N14PGV2@

RV18

STRAP0
STRAP1 STRAP3
STRAP2

45.3K_0402_1%

12

@

RV27

4.99K_0402_1%

+3VS_DGPU

12

@

10K_0402_1%

RV19

12

N14PGV2@

RV28

45.3K_0402_1%

0x1140 000000

12

12

@

10K_0402_1%

RV20

12

12

N14PGV2@

N14PGV2@

RV29

15K_0402_1%

For X76 (N14M-GL)

FB Memory gDDR3

900MHz

Sa

msung

1
2
8
M

x
1
6

cron

Mi

K4W2G1646E-BC11

1GHz

K4W2G1646E-BC1A

MT41K128M16JT-107G:K

900MHz

N14P-GV2

K4W4G1646B-HC11Samsung

2
5
6
M

x
1
6

Micron

900MHz

MT41K256M16HA-107G:E

900MHz 0100

2

Logical
Strapping Bit3

FB[1]

PCI_DEVID[4]

USER[3]

Logical
Strapping Bit2

FB[0]

SUB_VENDOR

RAMCFG[2]

Logical
Strapping Bit1

SMB_ALT_ADDR

PCI_DEVID[5]

RAMCFG[1]RAMCFG[3]

1

Logical
Strapping Bit0

VGA_DEVICE

PEX_PLLEN_TERM

RAMCFG[0]

USER[0]USER[1]USER[2]

3GIO_PADCFG[3]

PCI_DEVID[3]

PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]

SOR3_EXPOSED
RESERVED

PCIE_SPEED_CHANGE_GEN3

Resistor Values

010010TBD

12

@

@

10K_0402_1%

RV22

RV21

4.99K_0402_1%

STRAP4

12

N14PGV2@

RV31

RV30

45.3K_0402_1%

4.99K_0402_1%

For X76 (N14P-GV2)

ROM_SIGPU

PD 45K

PD 30K

1
2
8
M

x
1
6

Sa

msung

Hynix

Micron

PCIE_MAX_SPEED

5K
10K
15K
20K
25K
30K
35K
45K

ROM_SI
ROM_SO
ROM_SCLK

FB Memory gDDR3

1GHz

1GHz

900MHz

Pull-up to +3VS
_DGPU

1000
1001
1010
1011
1100
1101
1110
1111

12

12

@

N14PGV2@

RV24

RV23

12

N14PGV2@

RV32

4.99K_0402_1%

4.99K_0402_1%

10K_0402_1%

K4W2G1646E-BC11900MHz

K4W2G1646E-BC1A

H5TQ2G63DFR-11C900MHz

H5TQ2G63DFR-N0C

MT41K128M16JT-107G

Pull-down to Gnd

0000
0001
0010
0011
0100
0101
0110
0111

+3VS_DGPU

12

N14PGV2@

RV25

4.99K_0402_1%

STRAP[3:0]GPU

0101

0110

0001

N14M-GL

PD 20K

PD 10K

cron

900MHz

900MHz

900MHz

H5TC4G63AFR-11C

MT41K256M16HA-107G

Samsung K4W4G1646B-HC11

2
5
6
M

Hynix
x
1
6

Mi

1011

1101

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x LVDS&TMDS

VGA_N14x LVDS&TMDS

VGA_N14x LVDS&TMDS

20 49Sunday, April 07, 2013

20 49Sunday, April 07, 2013

1

20 49Sunday, April 07, 2013

0.1

0.1

0.1

5

4

3

2

1

1

CV27

2

OPT@

4.7U_0603_6.3V6K

1

CV38

2

OPT@

4.7U_0603_6.3V6K

Under GPU

1

CV45

2

OPT@

0.1U_0402_10V7K

midway between GPU
and Power supply

1

1

CV29

CV28

2

2

OPT@

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

CV40

CV39

2

2

OPT@

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

Near GPU

1

1

CV46

CV47

2

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

+1.05VS_DGPU

RV1

12

0_0603_5%

N14PGV2@

Under GPU

+VRAM_1.5VS

D D

C C

B B

1

2

1

2

der GPU

Un

1

1

1

1

CV32

OPT@

4.7U_0603_6.3V6K

CV43

OPT@

22U_0805_6.3V6M

CV33

CV24

2

4.7U_0603_6.3V6K

Ne

CV44

OPT@

ar GPU

10U_0603_6.3V6M

2

OPT@

1U_0402_6.3V6K

2

OPT@

1

2

1

CV34

CV25

CV35

2

2

OPT@

OPT@

1U_0402_6.3V6K

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

UV1D

3500 mA 2

B26

FBVDDQ_01

C25

FBVDDQ_02

E23

FBVDDQ_03

E26

FBVDDQ_04

F14

FBVDDQ_05

F21

FBVDDQ_06

G13

FBVDDQ_07

G14

FBVDDQ_08

G15

FBVDDQ_09

G16

FBVDDQ_10

G18

FBVDDQ_11

G19

FBVDDQ_12

G20

FBVDDQ_13

G21

FBVDDQ_14

H24

FBVDDQ_15

H26

FBVDDQ_16

J21

FBVDDQ_17

K21

FBVDDQ_18

L22

FBVDDQ_19

L24

FBVDDQ_20

L26

FBVDDQ_21

M21

FBVDDQ_22

N21

FBVDDQ_23

R21

FBVDDQ_24

T21

FBVDDQ_25

V21

FBVDDQ_26

W21

FBVDDQ_27

V7

IFPAB_PLLVDD_1

W7

IFPAB_PLLVDD_2

AA6

IFPAB_RSET

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

M7

IFPC_PLLVDD_1

N7

IFPC_PLLVDD_2

T6

IFPC_RSET

P6

IFPC_IOVDD

T7

IFPD_PLLVDD_2

R7

IFPD_PLLVDD_1

U6

IFPD_RSET

R6

IFPD_IOVDD

J7

NC

K7

NC

K6

NC

H6

NC

J6

NC

N14P-GV2-S-A2_FCBGA595

N14PGV2@

Part 4 of 6

FB_CAL_TERM_GND

000 mA

PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6

VDD33_1
VDD33_2
VDD33_3
VDD33_4

POWER

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

PEX_PLL_HVDD_1
PEX_PLL_HVDD_2

PEX_SVDD_3V3

120mA

PEX_PLLVDD_1

PEX_PLLVDD_2

AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27

AA22
AB23
AC24
AD25
AE26
AE27

G10
G12
G8
G9

D22

+FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

AA8
AA9

AB8

AA14
AA15

+PEX_PLLVDD

Near Ball

Under GPU

1

CV54

2

OPT@

1

2

1

2

1 2

OPT@

OPT@

OPT@

Near GPU

1

2

0.1U_0402_10V7K

Near GPU

1

CV26

CV23

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV37

CV36

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

+VRAM_1.5VS

RV3940.2_0402_1%

12

RV4142.2_0402_1%

12

RV4251.1_0402_1%

1

CV55

CV56

2

OPT@

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1

1

CV30

2

2

OPT@

22U_0805_6.3V6M

1

1

CV41

2

2

OPT@

22U_0805_6.3V6M

1

1

CV48

2

2

OPT@

1U_0402_6.3V6K

Under GPU
C

lose to AH12/AG12

+1.05VS_DGPU

CV31

OPT@

22U_0805_6.3V6M

+1.05VS_DGPU

CV42

OPT@

22U_0805_6.3V6M

+3VS_DGPU

CV49

OPT@

4.7U_0603_6.3V6K

1

2

Near GPU

1

CV50

CV51

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

+3VS_DGPU

1

1

CV52

CV53

2

2

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x POWER

VGA_N14x POWER

VGA_N14x POWER

1

0.1

0.1

21 49Sunday, April 07, 2013

21 49Sunday, April 07, 2013

21 49Sunday, April 07, 2013

0.1

5

4

3

2

1

+1.05VS_VTT to +1.05VS_DGPU

+5VALW

12

RV43
270K_0402_5%

OPT@

61

2N7002DW-T/R7_SOT363-6

0.01U_0402_25V7K

VGA_PWROK

OPT@

QV4A

2

2

G

OPT@

AO3416_SOT23-3

+1.05VS_DGPU

+1.05VS_VTT

Vgs=4.5V,Id=6.5A,Rds<22mohm

QV3

OPT@

13

D

2

G

S

CV57

OPT@

1

2

+1.5VALW to +VRAM_1.5VS

CV59

OPT@

+1.5VALW

1

2

QV6

OPT@

8

S

D

7

S

D

6

S

D

5

G

D

FDS6676AS_SO8

CV60

OPT@

4.7U_0603_6.3V6K

+VRAM_1.5VS

Vgs=10V,Id=14.5A,Rds=6mohm

1
2
3
4

VRAM_1.5VS_GATE

12

1

2

0.01U_0402_25V7K

RV48
820K_0402_5%OPT@

2N7002DW-T/R7_SOT363-6

1.5V_PWR_EN

1 2

180K_0402_5%

61

QV7A

OPT@

5

OPT@

OPT@

RV47

2

1.5V_PWR_EN#

QV5B

G

34

D

S

VGA_PWROK#

1 2

61

D

QV5A

2N7002KDWH_SOT363-6

S

RV46
470_0805_5%

OPT@

1 2

B+

3

QV7B

5

2N7002DW-T/R7_SOT363-6

OPT@

4

1 2

RV49100K_0402_5%

OPT@

2N7002KDWH_SOT363-6

+1.05VS_DGPU

RV44

22_0805_5%OPT@

1 2
3

OPT@

QV4B

5

2N7002DW-T/R7_SOT363-6

4

+5VALW

RV45100K_0402_5%

OPT@

+5VALW

V18
V16
V14
V12
V10
U17
U15
U13
U11
T18
T16
T14
T12
T10
R17
R15
R13
R11
P18
P16
P14

+3VS

UV2

5

N14PGV2@

B

4

Vcc

Y

A

G

NC7SZ32P5X_SC70-5

3

+VGA_CORE+VGA_CORE

1.5V_PWR_EN

UV1E

A2

A26
AB11
AB14
AB17
AB20

D D

C C

B B

AB24

AC2
AC22
AC26

AC5

AC8
AD12
AD13
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20

AF1
AF11
AF14
AF17
AF20
AF23

AF5

AF8

AG2

AG26

B1
B11
B14
B17
B20
B23
B27

B5

B8
E11
E14
E17

E2
E20
E22
E25

E5

E8

H2
H23
H25

H5

N14P-GV2-S-A2_FCBGA595

N14PGV2@

GND_001
GND_002
GND_003
GND_004
GND_005
GND_006
GND_007
GND_008
GND_009
GND_010
GND_011
GND_012
GND_013
GND_014
GND_015
GND_016
GND_017
GND_018
GND_019
GND_020
GND_021
GND_022
GND_023
GND_024
GND_025
GND_026
GND_027
GND_028
GND_029
GND_030
GND_031
GND_032
GND_033
GND_034
GND_035
GND_036
GND_037
GND_038
GND_039
GND_040
GND_041
GND_042
GND_043
GND_044
GND_045
GND_046
GND_047
GND_048
GND_049
GND_050
GND_051
GND_052
GND_053
GND_054
GND_055
GND_056

Part 5 of 6

GND

GND_057
GND_058
GND_059
GND_060
GND_061
GND_062
GND_063
GND_064
GND_065
GND_066
GND_067
GND_068
GND_069
GND_070
GND_071
GND_072
GND_073
GND_074
GND_075
GND_076
GND_077
GND_078
GND_079
GND_080
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112

GND
GND

K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11
M13
M15
M17
N10
N12
N14
N16
N18
P11
P13
P15
P17
P2
P23
P26
P5
R10
R12
R14
R16
R18
T11
T13
T15
T17
U10
U12
U14
U16
U18
U2
U23
U26
U5
V11
V13
V15
V17
Y2
Y23
Y26
Y5

AA7
AB7

For GC6

K10

VDD_001

K12

VDD_002

K14

VDD_003

K16

VDD_004

K18

VDD_005

L11

VDD_006

L13

VDD_007

L15

VDD_008

L17

VDD_009

M10

VDD_010

M12

VDD_011

M14

VDD_012

M16

VDD_013

M18

VDD_014

N11

VDD_015

N13

VDD_016

N15

VDD_017

N17

VDD_018

P10

VDD_019

P12

VDD_020

N14P-GV2-S-A2_FCBGA595

N14PGV2@

FB_CLAMP<18,19,36>

VGA_PWROK<47,9>

UV1F

Part 6 of 6

POWER

0.1U_0402_10V7K

VDD_041
VDD_040
VDD_039
VDD_038
VDD_037
VDD_036
VDD_035
VDD_034
VDD_033
VDD_032
VDD_031
VDD_030
VDD_029
VDD_028
VDD_027
VDD_026
VDD_025
VDD_024
VDD_023
VDD_022
VDD_021

@

CV58

1

2

2
1

+3VS to +3VS_DGPU

+VGA_CORE

RV51

470_0805_5%

OPT@

1 2
3

QV9B

5

2N7002DW-T/R7_SOT363-6

A A

5

4

OPT@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DGPU_PWR_EN#

4

3

RV52

470_0805_5%

OPT@

1 2
3

QV2B

5

2N7002DW-T/R7_SOT363-6

OPT@

4

Compal Secret Data

Compal Secret Data

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DGPU_PWR_EN<10,9>

2

DGPU_PWR_EN#

+3VS+3VS_DGPU

RV53
10K_0402_5%OPT@

1 2

RV54

1 2

33K_0402_5%

61

QV9A

2N7002DW-T/R7_SOT363-6

OPT@

2

OPT@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet

2

CV61

0.1U_0402_10V7K

OPT@

1

AO3413_SOT23

2

CV62

OPT@

0.01U_0402_25V7K

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VGA_N14x POWER & GND

VGA_N14x POWER & GND

VGA_N14x POWER & GND

+3VS

Vgs=-4.5V,Id=3A,Rds<97mohm

S

QV11

G

2

OPT@

D

1 3

+3VS_DGPU

22 49Sunday, April 07, 2013

22 49Sunday, April 07, 2013

1

22 49Sunday, April 07, 2013

0.1

0.1

0.1

of

5

RANK 0 [31...0]

VRAM DDR3 Chips

DQSA[3..0]
DQSA#[3..0]

DQMA[3..0]

MDA[31..0]

CMDA[30..0]

1

CV63

0.01U_0402_25V7K

OPT@

2

1

CV64

0.01U_0402_25V7K

OPT@

2

+MEM_VREF_CA0

+MEM_VREF_DQ0

243_0402_1%

D D

1K_0402_1%

1K_0402_1%

C C

1K_0402_1%

1K_0402_1%

B B

DQSA#[3..0]<19,25>

CMDA[30..0]<19,24,25,26>

+VRAM_1.5VS

RV55

OPT@

RV56

OPT@

+VRAM_1.5VS

RV57

OPT@

RV58

OPT@

DQSA[3..0]<19,25>

DQMA[3..0]<19,25>

MDA[31..0]<19,25>

12

+MEM_VREF_CA0

12

12

+MEM_VREF_DQ0

12

4

UV3

@

+MEM_VREF_CA0
+MEM_VREF_DQ0

OPT@

RV60

M8

VREFCA

H1

VREFDQ

N3

CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14

CMDA29
CMDA13
CMDA27

CLKA0 CLKA0
CLKA0#
CMDA3

CMDA0
CMDA2
CMDA11
CMDA15
CMDA28

DQSA1
DQSA2

DQMA1
DQMA2

DQSA#1
DQSA#2

CMDA20

12

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA9
MDA12
MDA8
MDA15
MDA13
MDA11
MDA10
MDA14

MDA18
MDA22
MDA16
MDA23
MDA17
MDA20
MDA19
MDA21

+VRAM_1.5VS

+VRAM_1.5VS

3

Group1

Group2

OPT@

RV61

243_0402_1%

+MEM_VREF_CA0
+MEM_VREF_DQ0

CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14

CMDA29
CMDA13
CMDA27

CLKA0#
CMDA3

CMDA0
CMDA2
CMDA11
CMDA15
CMDA28

DQSA0
DQSA3

DQMA0
DQMA3

DQSA#0
DQSA#3

CMDA20

ZQ1ZQ0

12

UV4

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

J7
K7
K9

K1
L2
J3
K3
L3

F3
C7

E7
D3

G3

B7

T2
L8

J1
L1
J9
L9

@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

3

10mA

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA6
MDA1
MDA5
MDA0
MDA4
MDA2
MDA7
MDA3

MDA30
MDA26
MDA29
MDA24
MDA28
MDA27
MDA31
MDA25

+VRAM_1.5VS

+VRAM_1.5VS

2

Mode E
Address

CMD0

Rank 0 Rank 1

0..31

ODT

CMD1

Group0

Group3

CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15

CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14

CAS#
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A7
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0
CMD30

1

32..63

0..31 32..63
ODT
CS1#

CKE
A11

A6
A3
A0
A8
A12 A0
A1

A7 A7
BA1 BA1
A12 A12
A8 A8
A0
A2 A2

RAS# RAS# RAS#
A13

A14
A3

A14
CAS#

A13 A13
CAS# CAS#

ODT

CS0#
CKE
RST RST RST

A6

A4
A11
A2
A10
A5

A5 A5
A9 A9
A1 A1
WE# WE#
A4 A4

BA2
WE#
BA0

A10 A10
BA0 BA0
BA2

A11A9

A14
A3BA1

ODT
CS1#

CKE

A6

BA2

Place close to the first T point

CLKA0<19,25>

CLKA0#<19,25>

12

OPT@

RV63
160_0402_1%

P

lace close to RANK0 VRAM

+VRAM_1.5VS +VRAM_1.5VS

1

2

A A

5

1

1

CV67

CV68

2

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

4

1

1

CV69

2

OPT@

1U_0402_6.3V6K

1

CV71

CV70

2

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV72

CV73

2

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

1

1

CV74

OPT@

0.1U_0402_10V7K

CV76

CV75

2

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

1

CV77

2

2

OPT@

1U_0402_6.3V6K

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

1

1

CV80

CV79

CV78

2

2

OPT@

OPT@

OPT@

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

1U_0402_6.3V6K

1U_0402_6.3V6K

Deciphered Date

Deciphered Date

Deciphered Date

1

2

1

1

CV81

CV82

2

2

OPT@

OPT@

0.1U_0402_10V7K

1U_0402_6.3V6K

2

1

1

CV83

2

OPT@

0.1U_0402_10V7K

1

CV85

CV84

2

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

+VRAM_1.5VS

1

CV86

OPT@

0.1U_0402_10V7K

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

CV87

2

OPT@

22U_0805_6.3V6M

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VGA_N14x VRAM RANK 0L

VGA_N14x VRAM RANK 0L

VGA_N14x VRAM RANK 0L

23 49Sunday, April 07, 2013

23 49Sunday, April 07, 2013

1

23 49Sunday, April 07, 2013

0.1

0.1

0.1

5

RANK 0 [63...32]

VRAM DDR3 Chips

DQMA[7..4]

CMDA[30..0]

CV65

0.01U_0402_25V7K

OPT@

CV66

0.01U_0402_25V7K

OPT@

DQSA[7..4]
DQSA#[7..4]

MDA[63..32]

+MEM_VREF_CA1

+MEM_VREF_DQ1

+MEM_VREF_DQ1

243_0402_1%

DQSA[7..4]<19,26>

+VRAM_1.5VS

RV59

OPT@

RV62

OPT@

+VRAM_1.5VS

RV64

OPT@

RV65

OPT@

DQSA#[7..4]<19,26>

DQMA[7..4]<19,26>
MDA[63..32]<19,26>
CMDA[30..0]<19,23,25,26>

12

+MEM_VREF_CA1

12

12

+MEM_VREF_DQ1

12

1

2

1

2

D D

1K_0402_1%

1K_0402_1%

C C

1K_0402_1%

1K_0402_1%

B B

OPT@

RV71

CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14

CMDA29
CMDA13
CMDA27

CLKA1
CLKA1#
CMDA19

CMDA16
CMDA18
CMDA11
CMDA15
CMDA28

DQSA4
DQSA7

DQMA4
DQMA7

DQSA#4
DQSA#7

CMDA20

12

4

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3

L7
R7
N7
T3
T7

M7

M2

N8

M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

ZQ2

J1

L1

J9

L9

3

UV5

@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

310mA 310mA

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA35
MDA37
MDA32
MDA36
MDA33
MDA38
MDA34
MDA39

MDA58
MDA62
MDA56
MDA63
MDA57
MDA61
MDA59
MDA60

+VRAM_1.5VS

+VRAM_1.5VS

Group4

+MEM_VREF_CA1
+MEM_VREF_DQ1

CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14

CMDA29
CMDA13
CMDA27

CLKA1
CLKA1#
CMDA19

CMDA16
CMDA18
CMDA11
CMDA15
CMDA28

DQSA5
DQSA6

DQMA5
DQMA6

DQSA#5
DQSA#6

CMDA20

OPT@

RV72

243_0402_1%

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

J7
K7
K9

K1
L2
J3
K3
L3

F3
C7

E7
D3

G3

B7

T2
L8

ZQ3

12

J1
L1
J9
L9

UV6

@

96-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

K4B1G1646E-HC12_FBGA96

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA45+MEM_VREF_CA1
MDA41
MDA46
MDA40
MDA44
MDA43
MDA47
MDA42

MDA54
MDA50
MDA55
MDA48
MDA53
MDA51
MDA52
MDA49

+VRAM_1.5VS

+VRAM_1.5VS

2

Mode E
Address

CMD0

Rank 0 Rank 1

0..31
ODT

CMD1

Group5

Group6Group7

CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15

CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#

CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A7
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29

RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0

CMD30

1

32..63

0..31 32..63
ODT
CS1#

CKE
A

11
A6
A3
A0
A8
A12 A0
A1

A7 A7
BA1 BA1
A12 A12
A8 A8
A0

A2 A2
RAS# RAS# RAS#
A13

A14

A3
A14
CAS#

A13 A13

CAS# CAS#
ODT

CS0#
CKE
RST RST RST

A6
A4
A11
A2
A10
A5

A5 A5

A9 A9

A1 A1

WE# WE#

A4 A4
BA2
WE#
BA0

A10 A10

BA0 BA0

BA2

A11A9

A14
A3BA1

ODT
CS1#

CKE

A6

BA2

Place close to the first T point

CLKA1<19,26>

CLKA1#<19,26>

12

OPT@

RV74
160_0402_1%

P

lace close to RANK1 VRAM

+VRAM_1.5VS +VRAM_1.5VS +VRAM_1.5VS

1

1

CV92

2

2

OPT@

1U_0402_6.3V6K

A A

5

4

1

1

CV93

CV94

2

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV96

CV95

2

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV97

CV98

2

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

1

1

CV99

OPT@

0.1U_0402_10V7K

CV101

CV100

2

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

2

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

1

1

CV103

CV102

2

2

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

1

CV104

2

OPT@

1U_0402_6.3V6K

1

1

CV106

CV105

OPT@

1U_0402_6.3V6K

CV107

2

2

2

OPT@

OPT@

0.1U_0402_10V7K

1U_0402_6.3V6K

2

1

1

CV108

2

OPT@

0.1U_0402_10V7K

1

CV110

CV109

OPT@

0.1U_0402_10V7K

CV111

2

2

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet

1

CV112

2

22U_0805_6.3V6M

DRANK@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VGA_N14x VRAM RANK 0H

VGA_N14x VRAM RANK 0H

VGA_N14x VRAM RANK 0H

of

24 49Sunday, April 07, 2013

24 49Sunday, April 07, 2013

1

24 49Sunday, April 07, 2013

0.1

0.1

0.1

5

ANK 1 [31...0]

R

VRAM DDR3 Chips

D D

C C

B B

DQSA[3..0]<19,23>
DQSA#[3..0]<19,23>

DQMA[3..0]<19,23>

MDA[31..0]<19,23>

CMDA[30..0]<19,23,24,26>

DQSA[3..0]
DQSA#[3..0]

DQMA[3..0]

MDA[31..0]

CMDA[30..0]

+MEM_VREF_CA0
+MEM_VREF_DQ0

CLKA0<19,23>
CLKA0#<19,23>

RV77

243_0402_1%

DRANK@

DRANK@

0.01U_0402_25V7K

12

CV88

CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12

CMDA29
CMDA6
CMDA30

CMDA3

CMDA0
CMDA1
CMDA11
CMDA15
CMDA25

DQSA1
DQSA2

DQMA1
DQMA2

DQSA#1
DQSA#2

ZQ4

12

4

UV7

@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA 310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA12
MDA9
MDA15
MDA8
MDA14
MDA10
MDA11
MDA13

MDA22
MDA18
MDA23
MDA16
MDA21
MDA19
MDA20
MDA17

+VRAM_1.5VS

+VRAM_1.5VS

Group1

Group2

+MEM_VREF_CA0
+MEM_VREF_DQ0

3

CV89

0.01U_0402_25V7K

DRANK@

1

2

243_0402_1%

RV78

DRANK@

CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12

CMDA29
CMDA6
CMDA30

CLKA0
CLKA0#
CMDA3

CMDA0
CMDA1
CMDA11
CMDA15
CMDA25

DQSA0
DQSA3

DQMA0
DQMA3

DQSA#0
DQSA#3

CMDA20CMDA20

12

UV8

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3

L7
R7
N7
T3
T7

M7

M2

N8

M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

ZQ5

J1

L1

J9

L9

K4B1G1646E-HC12_FBGA96

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

2

Mode E
Address

CMD0

Rank 0

0..31
ODT

CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7

@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA1
MDA6
MDA0
MDA5
MDA3
MDA7
MDA2
MDA4

MDA26
MDA30
MDA24
MDA29
MDA25
MDA31
MDA27
MDA28

+VRAM_1.5VS

+VRAM_1.5VS

Group0

Group3

CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20

CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#

RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0

1

Rank 1

32..63
ODT
CS1#

CKE

A9

A11

A6
A3

BA1

A0
A8

A8
A0

A1

RAS#RAS#

A13
BA1 A3

A14
A3

A14
CAS#
O

DT

CS0#
CKE
RST
A7CMD21
A4

A6
A5

A11
A2

A1

A10
A5

A4

BA2
WE#
BA0

BA0
BA2

32..630..31

A11
A7A7
BA1
A12A12
A8
A0A12
A2A2
RAS#
A14

A13A13
CAS#CAS#
ODT
CS1#

CKE
RSTRST
A6
A5
A9A9
A1
WE#WE#
A4

A10A10
BA0
BA2

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x VRAM RANK 1L

VGA_N14x VRAM RANK 1L

VGA_N14x VRAM RANK 1L

25 49Sunday, April 07, 2013

25 49Sunday, April 07, 2013

1

25 49Sunday, April 07, 2013

0.1

0.1

0.1

5

RANK 1[63...32]

VRAM DDR3 Chips

DQSA[7..4]<19,24>

D D

C C

B B

DQSA#[7..4]<19,24>

DQMA[7..4]<19,24>

MDA[63..32]<19,24>

CMDA[30..0]<19,23,24,25>

DQSA[7..4]
DQSA#[7..4]

DQMA[7..4]

MDA[63..32]

CMDA[30..0]

+MEM_VREF_CA1
+MEM_VREF_DQ1

CLKA1<19,24>
CLKA1#<19,24>

RV79
243_0402_1%

DRANK@

DRANK@

0.01U_0402_25V7K

12

CV90

CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12

CMDA29
CMDA6
CMDA30

CMDA19

CMDA16
CMDA17
CMDA11
CMDA15
CMDA25

DQSA4
DQSA7

DQMA4
DQMA7

DQSA#4
DQSA#7

CMDA20

ZQ6 ZQ7

12

4

UV9

@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA37
MDA35
MDA36
MDA32
MDA39
MDA34
MDA38
MDA33

MDA62
MDA58
MDA63
MDA56
MDA60
MDA59
MDA61
MDA57

+VRAM_1.5VS

+VRAM_1.5VS

Group7

+MEM_VREF_CA1
+MEM_VREF_DQ1

0.01U_0402_25V7K

3

CV91

DRANK@

1

2

RV80

243_0402_1%

DRANK@

CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12

CMDA29
CMDA6
CMDA30

CLKA1
CLKA1#
CMDA19

CMDA16
CMDA17
CMDA11
CMDA15
CMDA25

DQSA5
DQSA6

DQMA5
DQMA6

DQSA#5
DQSA#6

CMDA20

12

UV10

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

J7
K7
K9

K1
L2
J3
K3
L3

F3
C7

E7
D3

G3

B7

T2
L8

J1
L1
J9
L9

@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

310mA

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA41
MDA45
MDA40
MDA46
MDA42
MDA47
MDA43
MDA44

MDA50
MDA54
MDA48
MDA55
MDA49
MDA52
MDA51
MDA53

+VRAM_1.5VS

+VRAM_1.5VS

2

Mode E
Address

CMD0

Rank 0

0..31
ODT

CMD1

CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1

14

A
CAS#

Group5Group4

Group6

CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20

RST
A7

CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29

A4
A11
A2
A10
A5
BA2
WE#
BA0

CMD30

1

Rank 1

32..63
ODT
CS1#

CKE

A9

A11

A6
A3

BA1

A0
A8

A8
A0

A1

RAS#RAS#

A13
BA1 A3

A14
A3

A14
CAS#
ODT

CS0#
CKE
RST
A7CMD21
A4

A6
A5

A11
A2

A1

A10
A5

A4

BA2
WE#
BA0

BA0
BA2

32..630..31

A11
A7A7
BA1
A12A12
A8
A0A12
A2A2
RAS#
A14

A13A13
CAS#CAS#
ODT
CS1#

CKE
RSTRST
A6
A5
A9A9
A1
WE#WE#
A4

A10A10
BA0
BA2

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

2012/09/28 2013/09/28

2012/09/28 2013/09/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x VRAM RANK 1H

VGA_N14x VRAM RANK 1H

VGA_N14x VRAM RANK 1H

26 49Sunday, April 07, 2013

26 49Sunday, April 07, 2013

1

26 49Sunday, April 07, 2013

0.1

0.1

0.1

5

lose to LT2

+3VS +3VS_RT

100mil 1

1 2

@

RT1 0_0603_5%

00mil

Close to Pin3

0.1U_0402_16V4Z

LVDS@

0.1U_0402_16V4Z

1

CT2

2

LVDS@

10U_0603_6.3V6M

D D

LVDS@

1

CT1

2

+DP_V33

1

CT3

2

C

10U_0603_6.3V6M

LVDS@

0.1U_0402_16V4Z

1

1

CT4

CT5

2

2

LVDS@

+3VS_RT

SWR / LDO Mode select

※

※LDO mode is adopted as default power regulator mode.

※

※

Also can implement SWR mode by add inductor.

C C

IEDP@

1 2

C476 0.1U_0402_10V6K

IEDP@

1 2

C477 0.1U_0402_10V6K

LVDS@

1 2

H_EDP_AUXP<5>

H_EDP_AUXN<5>

B B

H_EDP_TXP0<5>

H_EDP_TXN0<5>

C478 0.1U_0402_10V6K

LVDS@

1 2

C479 0.1U_0402_10V6K

LVDS@

1 2

C480 0.1U_0402_10V6K

LVDS@

1 2

C481 0.1U_0402_10V6K

IEDP@

1 2

C482 0.1U_0402_10V6K

IEDP@

1 2

C483 0.1U_0402_10V6K

Place co-lay Resistor back to back on TOP and BOT

4

Close to Pin18

0.1U_0402_16V4Z

1

CT8

2

LVDS@

12

+DP_V33

12

+SWR_VDD
+SWR_V12

H_EDP_AUXP_C_TL
H_EDP_AUXN_C_TL

H_EDP_TXP0_C_TL
H_EDP_TXN0_C_TL

RT8

12K_0402_1%

LVDS@

+SWR_VDD

1 2

LCD_EDID_CLK_TL
LCD_EDID_DATA_TL
LCD_TL_TXOUT0­LCD_TL_TXOUT0+

H_EDP_AUXP_C_R
H_EDP_AUXN_C_R
H_EDP_TXN0_C_R
H_EDP_TXP0_C_R

22U_0603_6.3V6M

LVDS@

Close to Pin13

1

1

CT7

CT6

2

2

LVDS@

LVDS@

LT1
FBMA-L11-201209-221LMA30T_0805

LVDS@

LT2

100mil 40mil

FBMA-L11-201209-221LMA30T_0805

EC_SMB_CK3<36>
EC_SMB_DA3<36>

H_EDP_HPD<28,9>

80mil

0.1U_0402_16V4Z

Close to Pin8

H_EDP_AUXP_C_R

H_EDP_AUXN_C_R

H_EDP_AUXP_C_TL

H_EDP_AUXN_C_TL

H_EDP_TXP0_C_TL

H_EDP_TXN0_C_TL

H_EDP_TXP0_C_R

H_EDP_TXN0_C_R

40mil

100mil

40mil
40mil
40mil
4

0mil

10U_0603_6.3V6M

LVDS@

UT2

3

DP_V33

13

SWR_VDD

18

PVCC

12

SWR_LX

11

SWR_VCCK

27

VCCK

7

DP_V12

2

AUX_P

1

AUX_N

5

LANE0P

6

LANE0N

9

CIICSCL1

10

CIICSDA1

32

HPD

8

DP_REXT

4

DP_GND

RTD2132R-CG QFN32

LVDS@

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

Close to LT3

0.1U_0402_16V4Z

1

1

CT10

CT9

2

2

LVDS@

Power

LVDS

RTD2132S

DP-IN

GPIO(PWM OUT)

GPIO(Panel_VCC)

GPIO(PWM IN)

GPIO

GPIO(BL_EN)

LVDS

Other

EDID

ROM

RP4

LVDS@

RP5

IEDP@

3

0.1U_0402_16V4Z

LVDS@

Close to
Pin27

TXEC+
TXEC-

TXE2+

TXE2-

TXE1+

TXE1-

TXE0+

TXE0-

MIICSCL1

MIICDA1

MIICSCL0
MIICSDA0

GND

1

CT11

2

19
20

21
22

23
24

25
26

14
15
16
17

29
28

31
30

33

+SWR_V12

0.1U_0402_16V4Z

1

CT12

2

LVDS@

Close to Pin7

LCD_TL_TXOUT1+
LCD_TL_TXOUT1-

LCD_TL_TXOUT0+
LCD_TL_TXOUT0-

TL_INVT_PWM

80mil

LCD_EDID_CLK_TL
LCD_EDID_DATA_TL

MIIC_SCL
MIIC_SDA

LCD_TXCLK+ <28>
LCD_TXCLK- <28>

LCD_TXOUT2+ <28>
LCD_TXOUT2- <28>

LCD_EDID_CLK <28>
LCD_EDID_DATA <28>
LCD_TXOUT0- <28>
LCD_TXOUT0+ <28>

TL_INVT_PWM <28>
PCH_PWM_TL <9>

EC_ENBKL <28,36,9>

+LCD_VDD

2

1

Mode Configure

※

ROM only mode : PIN 30 4.7k pull low, Pin 31 4.7k pull high.

EP mode : PIN 30 4.7k pull high, Pin 31 4.7k pull low.

EEPROM : PIN 30 4.7k pull high, Pin 31 4.7k pull high.

〈 ※

Default mode

MIIC_SDA MIIC_SCL

PIN30 PIN31

+LCD_VDD

LCD_EDID_DATA_TL
LCD_EDID_CLK_TL

80mil

CT13

4.7U_0603_6.3V6K

LVDS@

Close to Panel conn.

132S

2

2132R

* Version R internal Power Switch, can

output 1A, Rds(on)=0.2 ohm

〉

+3VS_RT +3VS_RT

RT4

@

4.7K_0402_5%

1 2

RT6

4.7K_0402_5%LVDS@

1 2

+3VS_RT

PIN16

Accept voltage input (high level)

2132S

2132R

* Version R has internal level shifter, remove

level shifter circuit on AMD platform

2

1

1 2

RT9 4.7K_0402_5%

1 2

RT10 4.7K_0402_5%

+LCD_VDD

12

RT113
100K_0402_5%

LVDS@

PIN15

TL_ENVDD

+LCD_VDD *

LVDS@
LVDS@

LVDS@

RT12

4.7K_0402_5%

1 2

RT7

4.7K_0402_5%@

1 2

3.3V

1.5~3.3V

Different between 2132S and 2132R

IEDP@

1 2

H_EDP_TXP1<5> LCD_TXOUT1+ <28>

A A

LCD_TL_TXOUT1+

LCD_TL_TXOUT1-

5

C62 0.1U_0402_10V7K

IEDP@

1 2

C63 0.1U_0402_10V7K

LVDS@

1 2

R42 0_0402_5%

LVDS@

1 2

R43 0_0402_5%

LCD_TXOUT1- <28>H_EDP_TXN1<5>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/30 2013/06/30

2011/06/30 2013/06/30

2011/06/30 2013/06/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2132S 2132R

1. Support SWR mode

2

1. Support LDO mode and SWR mode

2. Internal ROM

3. Support LCD_VDD(internal Power switch)

4. Integrates Level shifter

Title

Title

Title

LVDS Translator - RTD2132S

LVDS Translator - RTD2132S

LVDS Translator - RTD2132S

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

1

27 49Sunday, April 07, 2013

27 49Sunday, April 07, 2013

27 49Sunday, April 07, 2013

0.1

0.1

0.1

of

A

TOUCH_EMI@

USB20_P5_R

BTO : TOUCH_EMI@

1 1

USB20_N5_R

USB20_N7_R

USB20_P7_R

1 2

R4280 0_0402_5%

L61 DLW21HN900SQ2L_4P

4

4

1

1

@TOUCH_EMI@

1 2

R4281 0_0402_5%

TOUCH_EMI@

L62 DLW21HN900SQ2L_4P

4

4

1

1

CAM_EMI@

B

USB20_P5 <11>

3

3

2

2

USB20_N5 <11>

EMI request - Close to JEDP connector

3

3

2

2

USB20_N7 <11>

USB20_P7 <11>

C

D

E

LCD POWER CIRCUIT (For EDP panel only)

+3VS

W=80mils

+LCD_VDD_SS

12

C475
1500P_0402_50V7K

IEDP@

U18

5

4

VOUT

VIN

GND

SS

APL3512ABI-TRG_SOT23-5

IEDP@

EN

1

W

2

3

100K_0402_5%

IEDP@

=

80mils

R430

+LCD_VDD

LCD_ENVDD <9>

1 2

LVDS colay eDP cable

2 2

3 3

Pin define will be change after ME ready

JLVDS

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

GND

32

GND

33

GND

34

GND

35

GND

@

+5VS_LVDS_TOUCH
USB20_N5_R
USB20_P5_R
BKOFF#

USB20_P7_R
USB20_N7_R
+3VS_LVDS_CAM

LED_PWM
BKOFF#_R

Irush=1.5A

1 2

@

R432 0_0603_5%

LCD_EDID_CLK <27>
LCD_EDID_DATA <27>
LCD_TXOUT0- <27>
LCD_TXOUT0+ <27>
LCD_TXOUT1- <27>
LCD_TXOUT1+ <27>
LCD_TXOUT2- <27>
LCD_TXOUT2+ <27>

LCD_TXCLK- <27>
LCD_TXCLK+ <27>
H_EDP_HPD <27,9>

60mils

+LCD_INV

FBMA-L11-201209-221LMA30T_0805

+LCD_VDD

+LCD_INV

L63

EMI@

R431 0_0603_5%

Irush=1.5A

Irush=1.5A

12

1 2

@

6

B+

INT_MIC_DATA <35>

INT_MIC_CLK <35>

60mils

0mils

+5VS

+3VS

20mils

+3VS

20mils

Touch

Camera

INT_MIC_DATA
INT_MIC_CLK

USB20_P7_R
USB20_N7_R

2

3

D97

ESD@

DA8

ESD@

1 2

1 2

DA9

CK0402101V05_0402-2

CK0402101V05_0402-2

YSLC05CH_SOT23-3

@ESD@

1

Reserve for eDP panel

IEDP@

1 2

R433 0_0402_5%

BKOFF#_R

4 4

1 2

D16 RB751V40_SC76-2

LVDS@

12

R434
10K_0402_5%

A

+3VS

5

U50

1

P

IN1

4

O

2

BKOFF#

IN2

G

3

SN74AHC1G08DCKR_SC70-5

1 2

R436 0_0402_5%

@

Reserve for LVDS panel

EC_ENBKL <27,36,9>
BKOFF# <36>

B

LED_PWM

R435

47K_0402_5%

IEDP@

1 2

D90 RB751V40_SC76-2

1 2

D91 RB751V40_SC76-2

LVDS@

12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PCH_PWM_EDP <9>

TL_INVT_PWM <27>

Compal Secret Data

Compal Secret Data

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LVDS

LVDS

LVDS

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

28 49Sunday, April 07, 2013

28 49Sunday, April 07, 2013

28 49Sunday, April 07, 2013

E

0.1

0.1

0.1

A

B

C

D

E

C500

+HDMI_5V_OUT

2

5

1

1

P

A2Y

G

74AHCT1G125GW_SOT353-5

3

HDMI_HPD

U9

OE#

+3VS+3VS

+HDMI_5V_OUT

1 1

+3VS

RP3

1 8
2 7
3 6
4 5

2.2K_0804_8P4R_5%

HDMI_SCLK
HDMI_SDATA
UMA_HDMI_CLK
UMA_HDMI_DATA

UMA_HDMI_CLK<9>

UMA_HDMI_DATA<9>

UMA_HDMI_CLK

UMA_HDMI_DATA

3 1

BSH111_SOT23-3

2

SGD

2

3 1

SGD

BSH111_SOT23-3

Q191

HDMI_SCLK

Q190

HDMI_SDATA

0.1U_0402_10V7K

4

HDMI_HPD

R438

2.2K_0402_5%

R437

1 2

1K_0402_5%

100K_0402_5%

12

R439

+3VS

HDMI_HPD_CHDMI_HPD_U

2

C501

0.1U_0402_10V7K

1

1 2

HDMI_HPD <10,9>

HDMI Connector

DLW21HN900SQ2L_4P

1 2

H_HDMI_TXC-<5>

H_HDMI_TXC+<5>

2 2

H_HDMI_TX0-<5>

H_HDMI_TX0+<5>

H_HDMI_TX1-<5>

H_HDMI_TX1+<5>

H_HDMI_TX2-<5>

H_HDMI_TX2+<5>

C486 0.1U_0402_10V7K

1 2

C484 0.1U_0402_10V7K

1 2

C490 0.1U_0402_10V7K

1 2

C488 0.1U_0402_10V7K

1 2

C494 0.1U_0402_10V7K

1 2

C492 0.1U_0402_10V7K

1 2

C498 0.1U_0402_10V7K

1 2

C496 0.1U_0402_10V7K

H_DVI_TXC-

H_DVI_TXC+

H_DVI_TXD0- HDMI_R_D0-

H_DVI_TXD0+ HDMI_R_D0+

H_DVI_TXD1-

H_DVI_TXD1+

H_DVI_TXD2- HDMI_R_D2-

H_DVI_TXD2+ HDMI_R_D2+

4

4

1

1

L64
DLW21HN900SQ2L_4P

1

1

4

4

L65
DLW21HN900SQ2L_4P

4

4

1

1

L66
DLW21HN900SQ2L_4P

1

1

4

4

L67

Common CHOKE use 67ohm

EMI@

EMI@

EMI@

EMI@

3

HDMI_R_CK-

3

2

HDMI_R_CK+

2

2

2

3

3

3

HDMI_R_D1-

3

2

HDMI_R_D1+

2

2

2

3

3

+HDMI_5V_OUT

HDMI_HPD_C

HDMI_SDATA
HDMI_SCLK

HDMI_R_CK­HDMI_R_CK+

HDMI_R_D0­HDMI_R_D0+

HDMI_R_D1­HDMI_R_D1+

HDMI_R_D2­HDMI_R_D2+

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Utility

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

ACON_HMR2J-AK120C

GND
GND
GND
GND

@

20
21
22
23

RP1

HDMI_R_D2-

3 3

ZZZ

HDMI Royalty

HDMI45@

RO0000003HM

HDMI W/Logo + HDCP

HDMI W/O Logo: RO0000001HM
HDMI W/Logo: RO0000002HM
HDMI W/Logo + HDCP: RO0000003HM

please manually load
this virtual material to 45@ BOM

4 4

A

B

HDMI_R_D2+
HDMI_R_D1+
HDMI_R_D1-

HDMI_R_CK+
HDMI_R_CK­HDMI_R_D0­HDMI_R_D0+

1 8
2 7
3 6
4 5

680_8P4R_5%

RP2

1 8
2 7
3 6
4 5

680_8P4R_5%

+5VS

HDMI POWER CIRCUIT

VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m
Current Limit: TYP=0.8A ; MAX=1A

+HDMI_5V_OUT

1

13

D

Q192

2

G

S

2N7002KW_SOT323-3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

CY18

0.1U_0402_10V7K

D

2

Date: Sheet of

Date: Sheet of

Date: Sheet of

UY2

1
2
3

AP2151DWG-7_SOT25-5

SA00006H000

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

5

IN

OUT
GND

4

EN

FLG

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HDMI Conn.

HDMI Conn.

HDMI Conn.

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

E

+5VS

29 49Sunday, April 07, 2013

29 49Sunday, April 07, 2013

29 49Sunday, April 07, 2013

0.1

0.1

0.1

SATA HDD Conn.

A

B

C

D

E

ACES_50208-00801-003

1 1

2 2

10

GND

9

GND

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JHDD

@

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

+5VS

12

+5VS

1 2

C511 0.01U_0402_25V7K

1 2

C512 0.01U_0402_25V7K

1 2

C513 0.01U_0402_25V7K

1 2

C514 0.01U_0402_25V7K

Close to JHDD

Place closely JHDD SATA CONN.

1.2A

C515
10U_0805_6.3V6M

1

C516

0.1U_0402_10V7K

2

1

C517

0.1U_0402_10V7K

2

SATA_PTX_DRX_P0 <7>
SATA_PTX_DRX_N0 <7>

SATA_PRX_C_DTX_N0 <7>

SATA_PRX_C_DTX_P0 <7>

3 3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

HDD/Gsensor

HDD/Gsensor

HDD/Gsensor

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

E

0.1

0.1

30 49Sunday, April 07, 2013

30 49Sunday, April 07, 2013

30 49Sunday, April 07, 2013

0.1

A

Slot 1 Half PCIe Mini Card-WLAN

WLAN&BT Combo module circuits

+3V_WLAN

1 1

2 2

0.1U_0402_10V7K

1

CM1

2

0.1U_0402_10V7K

CM2

1

CM3

2

4.7U_0603_6.3V6K

1

2

From EC

BT_ON

BT_ON<36>

B

BT
o

n module

BT
on module

Enable Disable

H L

1 2

RM26

For isolate BT_CTRL and
C

ompal Debug Card.

1K_0402_5%

C

USB20_P4<11>

WiMax/ BT

WLAN/ WiFi

E51_RXDBT_ON

WLAN_WAKE#<36>

USB20_N4<11>

PCIE_PTX_C_WLANRX_P4<11>
PCIE_PTX_C_WLANRX_N4<11>

PCIE_PRX_WLANTX_P4<11>
PCIE_PRX_WLANTX_N4<11>

CLK_WLAN<8>
CLK_WLAN#<8>

CLKREQ_WLAN#<10,8>

1 2

RC285 0_0402_5%

D

NGFF E TYPE

JWLAN

1

GND

3

USB_D+

5

USB_D-

7

GND

9

SDIO_CLK

11

SDIO_CMD

13

SDIO_DAT0

15

SDIO_DAT1

17

SDIO_DAT2

19

SDIO_DAT3

21

SDIO_WAKE#

23

SDIO_RST#

25

GND

27

PET_P0

29

PET_N0

31

GND

33

PER_P0

35

PER_N0

37

GND

39

REFCLK_P0

41

REFCLK_N0

43

GND

45

CLKREQ0#

47

PEWAKE0#

49

GND

51

RSVD/PET_P1

53

RSVD/PET_N1

55

GND

57

RSVD/PER_P1

59

RSVD/PER_N1

61

GND

63

RSVD

65

RSVD

67

GND

68

GND1

LOTES_APCI0019-P002A

3.3VAUX

3.3VAUX
LED1#

PCM_CLK

PCM_SYNC

PCM_IN

PCM_OUT

LED2#

GND

UART_WAKE#

UART_RX

UART_TX
UART_CTS
UART_RTS

RSVD
RSVD

RSVD
COEX3
COEX2
COEX1

SUSCLK

PERST0#
W_DISABLE2#
W_DISABLE1#

I2C_DAT
I2C_CLK

ALERT

RSVD
RSVD
RSVD
RSVD

3.3VAUX

3.3VAUX
GND2

E

+3V_WLAN

2
4
6
8
10
12
14
16
18
20
22

24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66

69

@

E51_TXD
E51_RXD

BT_CTRL_R BT_ON

0_0402_5% @

Need Change to use I2C

E51_TXD <36>

E51_RXD <36>

Debug card using

12

RM25

WL_OFF# <36>
PM_SMBCLK <16,17,33,8>
PM_SMBDATA <16,17,33,8>

CLK_EC <9>
PLT_RST_BUF# <32,9>

1

CCL6

DIS only

3 3

4 4

1

CCL7
18P_0402_50V8J

GCLK@

2

+3VL +1.05VS_VTT+3V_LAN +3VS_DGPU +3VALW

1

CCL1

GCLK@

2

0.1U_0402_10V7K

YCL1 25MHZ 12PF X3G025000DK1H-X

1

1

GND

2

A

GCLK@

GND

0.1U_0402_10V7K

3

3

4

CLK_X2CLK_X1

1

GCLK@

2

CCL2

1

CCL8
18P_0402_50V8J

GCLK@

2

1

CCL3

GCLK@

2

0.1U_0402_10V7K

1

CCL4

DGCLK@

2

0.1U_0402_10V7K

+3VL

1

CCL5

GCLK@

2

0.1U_0402_10V7K

B

+3VALW

+3V_LAN

+1.05VS_VTT

+3VS_DGPU

DIS only

1 2

GCLK@

RCL5 0_0402_5%

+3V_LAN_R PCH_X1_R_R

CLK_X2
CLK_X1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

UCL1 GCLK@

18

V3.3A

3

VDD

14

VIO_32k_B

9

VIO_25M

4

VIOE_24M
VIOE_27M1227M

1

X2

2

X1

5

GND

8

GND

15

GND

19

THERMAL_PAD

SLG3NB282VTR_TQFN18_2X3P5

VBAT

32.768k_A

32.768k_B

24M
25M

VOUT

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

22U_0805_6.3V6M

GCLK@

2

11

+RTCGCLK

10
16

6
7

LAN_X1_R_R

13

VGA_X1_R

17

RCL3 22_0402_5%

2

GCLK@

2.2U_0402_6.3V6M
CCL9

1

LAN_X1_R_R

PCH_X1_R_R

RCL1 0_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

For safety request

RCL4

120_0603_5%

1 2

GCLK@

DGCLK@

1 2

22 ohm for NV chip

1 2

@

RCL2 0_0402_5%

1 2

@

D

+RTC

PCH_RTCX1_R <7>

VGA_X1 <18>

DIS only

LAN_X2 <32>

PCH_X1_R <8>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCIe-WLAN/mSATA/GCLK

PCIe-WLAN/mSATA/GCLK

PCIe-WLAN/mSATA/GCLK

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

Sunday, April 07, 2013

Sunday, April 07, 2013

Sunday, April 07, 2013

E

31 49

31 49

31 49

0.1

0.1

0.1

A

SA00005V700

UL1

LAN_MDI0+

+3V_LAN

LAN_MDI0­LAN_MDI1+

LAN_MDI1­LAN_MDI2+
LAN_MDI2-

LAN_MDI3+
LAN_MDI3-

LANCLK_REQ#

CLK_LAN<8>
CLK_LAN#<8>

+LAN_VDD10

1 1

2 2

+LAN_VDD10

PCIE_PTX_C_LANRX_P3<11>
PCIE_PTX_C_LANRX_N3<11>

For 10/100 LAN SKU

SA000065Y00

UL1

8106E 10/100M

8106E@

SP050007700

UL2

10/100M transformer

8106E@

3 3

1

MDIP0

2

MDIN0

3

AVDD10

4

MDIP1

5

MDIN1

6

MDIP2

7

MDIN2

8

AVDD10

9

MDIP3

10

MDIN3

11

AVDD33

12

CLKREQB

13

HSIP

14

HSIN

15

REFCLK_P

16

REFCLK_N

8111G@

PCIE_WAKE#

LAN_MDI0-

+3V_LAN

LAN_MDI0+

LAN_MDI2-

+3V_LAN

LAN_MDI2+

HSOP
HSON

PERSTB

ISOLATEB

LANWAKEB

DVDD10
VDDREG
REGOUT

LED2

LED1/GPIO

LED0
CKXTAL1
CKXTAL2

AVDD10

RSET

AVDD33

GND

RTL8111G-CG_QFN32_4X4

R42790_0402_5%

12
12

R42830_0402_5%

@

DL2

6

5

4

6

5

4

ESD@

I/O4

VDD

GND

I/O3

AZC099-04S.R7G_SOT23-6

DL3

8111G@ESD@

I/O4

VDD

GND

I/O3

AZC099-04S.R7G_SOT23-6

B

Power trace VDDREG > 40 mil, REGOUT trace > 60 mil

T1PAD
T2PAD

T3PAD

LAN_X1
LAN_X2

+LAN_VDD10
+3V_LAN
+LAN_VDD10

+LAN_VDD10
+3V_LAN

CL18 0.1U_0402_10V7K

1 2
1 2

CL21 0.1U_0402_10V7K

LAN_X2 <31>

12

RL1 2.49K_0402_1%

LAN_MDI3­LAN_MDI3+

LAN_MDI2­LAN_MDI2+

LAN_MDI1­LAN_MDI1+

LAN_MDI0-

1

CL15

0.1U_0402_25V6

2

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33

EC_SWI# <36,9>

LAN_WAKE# <36>

3

I/O2

2

1

I/O1

3

I/O2

2

1

I/O1

PCIE_PRX_LANTX_P3
PCIE_PRX_LANTX_N3
PLT_RST_BUF#

ISOLATE#
PCIE_WAKE#

LAN_MDI1-

LAN_MDI1+

LAN_MDI3-

LAN_MDI3+

C

PCIE_PRX_C_LANTX_P3 <11>

PCIE_PRX_C_LANTX_N3 <11>

PLT_RST_BUF# <31,9>

SP050006B10

UL2

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+
TD2-6MX2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

SUPERWORLD_SWG150401

8111G@

MCT1
MX1+

MX1-

MCT2
MX2+

MCT3
MX3+

MX3-

MCT4
MX4+

MX4-

24
23
22

21
20
19

18
17
16

15
14
13

RJ45_MIDI3­RJ45_MIDI3+

RJ45_MIDI2­RJ45_MIDI2+

RJ45_MIDI1­RJ45_MIDI1+

RJ45_MIDI0­RJ45_MIDI0+LAN_MDI0+

+LAN_VDD10

CL1, CL2,CL3,CL4 close to pin 3,8,22,30 respectively

L5 close to pin 22, CL6 close to pin 30

C
CL 19 close to Pin 24

1 2

CL1 0.1U_0402_10V7K8111G@

1 2

CL2 0.1U_0402_10V7K

1 2

CL3 0.1U_0402_10V7K8111G@

1 2

CL4 0.1U_0402_10V7K

1 2

CL5 1U_0402_6.3V6K8111G@

1 2

CL6 1U_0402_6.3V6K8106E@

1 2

CL19 0.1U_0402_10V7K8111G@

PJ7

@

RL3

1 2

RL4

1 2

RL5

1 2

RL6

1 2

2

112

JUMP_43X39

75_0603_1%

75_0603_1%

75_0603_1%

75_0603_1%

RJ45_GND LANGND

+3VALW_PCH +3V_LAN

8111G@

8111G@

D

Keep de-coupling capacitors close to
RTL8111G/8106E within 200 mil

JRJ45

1 2

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130456-311

@

12

CL17
220P_0603_50V8J

RJ45_MIDI3­RJ45_MIDI3+
RJ45_MIDI1­RJ45_MIDI2­RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI0­RJ45_MIDI0+

CL16 1000P_1206_2KV7K

Compal Electronics, Inc.

+3V_LAN

CL7 close to Pin 11, CL8 close to Pin32

L20 close to Pin23

C

1 2

CL7 0.1U_0402_10V7K8111G@

1 2

CL8 0.1U_0402_10V7K

1 2

CL20 0.1U_0402_10V7K8106E@

YL1 25MHZ_20PF_7V25000016

1

1

CL9
27P_0402_50V8J

NOGCLK@

GND

2

1

2

3

GND

NOGCLK@

4

27P_0402_50V8J

SHLD1
SHLD2

3

LAN_X2LAN_X1

NOGCLK@

9
10

CL10

E

1

2

For LAN function

RL24 10K_0402_5%

+3VS

LAN_EN<10,8>

CLKREQ_LAN#<8>

4 4

12

A

LANCLK_REQ#

2

1 3

D

QL53

2N7002KW_SOT323-3

G

LANCLK_REQ#

S

+3VS

12

1K_0402_5%
RL8

@

15K_0402_5%

ISOLATE#

RL9

RL433 0_0402_5%@

B

1 2

WOL_EN#

Sx Enable
Wake up

LOW

WOL_EN# <36>

Sx Disable
Wake up

HIGH

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

LAN WOL LAN_EN ISOLATEB

---------------------------------------------­ 0 0 0 0 1 1
0 1 0 0 1 1
1 0 1 1 1 1
1 1 1 1 1 0*

*
S3: after SUSP# assert low over 100ms
S4/S5: after SYSON assert low over 100ms

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

C

S0 Sx S0 Sx

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

For ESD, keep close to RJ45 Connector
C

hange back to connect to LANGND only

on 20130201

DL1

ESD@

2

LANGND

3

LANGND

Title

Title

Title

PCIe-LAN-RTL8105E

PCIe-LAN-RTL8105E

PCIe-LAN-RTL8105E

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

YSLC05CH_SOT23-3

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

1

32 49Sunday, April 07, 2013

32 49Sunday, April 07, 2013

E

32 49Sunday, April 07, 2013

0.1

0.1

0.1

5

4

3

2

1

Small board Conn

JSB5

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29

PJ8 @
JUMP_43X79

112

R29

1 2

0_0402_5%

@

@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

31

GND

29

32

3030GND

ACES_51522-03001-P01

+3VS

2

DEVSLP1 <10>

JSB4

@

+USB_VCCC

D D

USB_EN#2<36>

C C

Left USB 2.0 x 1

W=80mils

OUT
OUT
OUT
OCB

+USB_VCCC+5VALW

6
7
8
5

2.0A

U13

2

IN

3

IN

4

EN/ENB

1

GND

G547I2P81U_MSOP8

SA00003TV00
SA00003XM00

USB_OC#2 <10,11,36>

USB20_N2<11>
USB20_P2<11>

USB20_N3<11>
USB20_P3<11>

Close to JSB4

USB20_N2 USB20_N2_R

1 2

R44 0_0402_5%14@

1 2

R45 0_0402_5%14@

1 2

R46 0_0402_5%14@

1 2

R47 0_0402_5%14@

+5VALW +5VALW

+3VL
+3VS

USB20_P2_RUSB20_P2

PL<35>
PR<35>

EXT_MIC_L<35>

NBA_PLUG<35>

USB20_N3_RUSB20_N3
USB20_P3_RUSB20_P3

LID_SW#<36>

BATT_FULL_LED#<36>

BATT_CHG_LOW _LED#<36>

PWR_SUSP_LED#<36>

WL_BT_LED#<36>

TP_DATA<36>

TP_CLK<36>

TP_INTR#<10,9>

TP_I2CSDA1
TP_I2CSCL1

1 2

R471 0_0402_5%

1 2

R472 0_0402_5%

1 2

R473 0_0402_5%@

1 2

R474 0_0402_5%@

TP_I2CSDA1
TP_I2CSCL1

29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

SPK Conn.

JSPK

SPK_L1<35>
SPK_L2<35>
SPK_R1<35>
SPK_R2<35>

B B

1

1

2

2

3

3

4

4

5

G1

6

G2

E&T_3802-F04N-01R

@

SSD_Detect<10>

Close to JNGFF

1 2

SATA_PRX_C_DTX_P1<7>

SATA_PRX_C_DTX_N1<7>

SATA_PTX_DRX_N1<7>

SATA_PTX_DRX_P1<7>

C546 0.01U_0402_25V7K

1 2

C548 0.01U_0402_25V7K

1 2

C545 0.01U_0402_25V7K

1 2

C547 0.01U_0402_25V7K

32

3030GND

31

GND

29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_51522-03001-P01

PM_SMBDATA <16,17,31,8>
PM_SMBCLK <16,17,31,8>

PM_I2CSDA1 <10>
PM_I2CSCL1 <10>

T161 @

SATA_PRX_DTX_P1
SATA_PRX_DTX_N1

SATA_PTX_C_DRX_N1
SATA_PTX_C_DRX_P1

T164 @

T171 @

+USB_VCCC

USB20_N2
USB20_P2

USB20_N3
USB20_P3

Close to JSB5

R49 0_0402_5%15@
R50 0_0402_5%15@

R53 0_0402_5%15@
R51 0_0402_5%15@

1 2
1 2

1 2
1 2

+3VL
+3VS

PL
PR
EXT_MIC_L
NBA_PLUG

LID_SW#
BATT_FULL_LED#
BATT_CHG_LOW _LED#
PWR_SUSP_LED#
WL_BT_LED#

NGFF SSD B Type connector

P/N:SP071212280

JNGFF

1

PRESENCE#

3

GND

5

GND

7
9

11
13

15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67

69

FULL_CARD_POWER_OFF#
USB_D+
USB_D­GND

WWAN_DETECT#
WAKE_ON_WWAN#
DPR
GND
USB3.0-TX­USB3.0-TX+
GND
USB3.0-RX­USB3.0-RX+
GND
SATA-B+
SATA-B­GND
SATA-A­SATA-A+
GND
RESERVED1
RESERVED2
GND
ANTCTRL0
ANTCTRL1
ANTCTRL2
ANTCTRL3
RESET#
PCIE_DETECT
GND
GND
USB3_DETECT

PEG2

CONCR_213BAAA32FA @

3.3VAUX1

3.3VAUX2

W_DISABLE1#

LED#

GPIO_5
GPIO_6
GPIO_7

W_DISABLE2#

UIM_RFU

UIM-RESET

UIM-CLK

UIM-DATA

UIM-PWR

DEVSLP

GPIO_0
GPIO_1
GPIO_2
GPIO_3

GPIO_4
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7

COEX3
COEX2
COEX1

SIM_DETECT

SUSCLK

3.3VAUX3

3.3VAUX4

3.3VAUX5

PEG1

USB20_N2_R5
USB20_P2_R5

USB20_N3_R5
USB20_P3_R5

2

+3VS_NGFF

4
6
8
10

12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66

68

TP_DATA
TP_CLK
TP_INTR#

TP_I2CSDA1
TP_I2CSCL1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

USB-CardReader Genesys GL834L

USB-CardReader Genesys GL834L

USB-CardReader Genesys GL834L

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

33 49Sunday, April 07, 2013

33 49Sunday, April 07, 2013

33 49Sunday, April 07, 2013

1

0.1

0.1

0.1

5

CHG_PWR_GATE#<36>

SLP_CHG_ CB1<10>

EC_CB1<36>

D D

R i g h t r e a r U S B 3 . 0 C o n n .

R i g h t r e a r U S B 3 . 0 C o n n .

R i g h t r e a r U S B 3 . 0 C o n n .R i g h t r e a r U S B 3 . 0 C o n n .

USB20_P0<11>

USB20_N0<11>

C C

U3RXDP1<11>

U3RXDN1<11>

U3TXDP1<11>

U3TXDN1<11>

1 2

C527 0.1U_0402_ 10V7K

1 2

C529 0.1U_0402_ 10V7K

0_0402_ 5%

EC_CB1

U3TXDP1_C

U3TXDN1_C

RR2

USB20_N1 _S
USB20_P1_S

12

CHG_CB1

@

RR7

12

0_0402_ 5%
U5

Address

x35

0

MAX14640ETA+TGH7

14640@

LR7

2

2

3

3

DLW21HN900SQ2 L_4P

L56

1 2

DLW21S N670HQ2 L_4P

L60

1 2

DLW21S N670HQ2 L_4P

EMI@

1

4

EMI@

EMI@

4

SA00006C400

U5

1

CEN

2

DM

3

DP

4

CB1

9

PGND

MAX14641ETA+TGH7_TDFN-E P8_2X2

14641@

1

4

34

34

USB20_P0_R

USB20_N0 _R

U3RXDP1_L

U3RXDN1_L

U3TXDP1_C_ L

U3TXDN1_C_L

8

CB0

7

TDM

6

TDP

5

VCC

EC_SMB_CK1<36,40,41>

EC_SMB_DA1<36,40,41>

CHG_CB0

1

C525

0.1U_040 2_10V7 K

2

RR6

12

RR3

@

12

0_0402_ 5%

USB20_N1 <11>
USB20_P1 <11>

+5VALW

EC_CB0

QR1A

6 1

14640@

0_0402_ 5%

2N7002KDWH_SO T363-6

EC_CB0 <3 6>

2.2U_0402_6.3V6M

SLP_CHG_ CB0 <1 1,8>

CR19

1

@

2

Reserve for Seligo wake function

+3VALW +3VALW

4.7K_0402_5%

2

14640@

5

3 4

QR1B2N7002KDWH_S OT363-6

14640@

3

+3VALW _PCH

U3RXDP2<11>

U3RXDN2<11>

U3TXDP2

U3TXDN2

1 2

RB11 10K_0402_5%

1 2

RB13 10K_0402_5%

USB20_N1 _S

USB20_P1_S US B20_P1 _R

1 2

1 2

U3TXDP2_C

U3TXDN2_C

C526 0.1U_ 0402_1 0V7K

C528 0.1U_ 0402_1 0V7K

EC_CB0

EC_CB1

RR5

RR4

4.7K_0402_5%

14640@

1 2

1 2

CHG_CB1

CHG_CB0

R i g h t f r o n t U S B 3 . 0 C o n n .

R i g h t f r o n t U S B 3 . 0 C o n n .

R i g h t f r o n t U S B 3 . 0 C o n n .R i g h t f r o n t U S B 3 . 0 C o n n .
( S u p p o r t S & C f u n c t i o n )

( S u p p o r t S & C f u n c t i o n )

( S u p p o r t S & C f u n c t i o n )( S u p p o r t S & C f u n c t i o n )

U3TXDP2<11>

U3TXDN2<11>

2

State table for MAX14641

0

0

1

1

LR8

EMI@

3

3

2

2

DLW21HN900SQ2 L_4P

L71

1 2

DLW21S N670HQ2 L_4P

L72

1 2

DLW21S N670HQ2 L_4P

USB Sleep & Charge

Mode

AM2

0

P1

A

PM

CM

EMI@

EMI@

CB1

1

0

1

4

USB20_N1 _R

4

1

1

34

U3RXDP2_L

U3RXDN2_L

34

U3TXDP2_C_ L

U3TXDN2_C_L

1

2A auto-detection charger mode for Apple device.
Resistor dividers are connected to DP/DM. Including DCP

Forced 1A charger mode for Apple devices.
Resistor dividers are connected to DP/DM.

USB pass-through mode.DP/DM are connected to TDP/TDM
USB pass-through mode with CDP emulation.

Autoconnects DP/DM to TDP/TDM depending
on CDP detection status.

STATUS CB0

+USB_VCCA

47U_0805_6.3V6 M

D88

1

2

4

3

8

@ESD@

W=80mils

0.1U_040 2_10V7 K

12

C530

9

10

8

9

7

7

6

65

1

1

CR8

C531

@

2

2

4.7U_060 3_6.3V6K

U3TXDP2_C_ L
U3TXDN2_C_L
U3RXDP2_L
U3RXDN2_L

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

RUSB/S&C

RUSB/S&C

RUSB/S&C

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

1

0.1

0.1

34 49Sunday, April 07, 20 13

34 49Sunday, April 07, 20 13

34 49Sunday, April 07, 20 13

0.1

6

OUT

7

OUT

8

OUT

5

OCB

W=100mils

+USB_VCCA

USB_CHG_OC# <11,36,8 >

JUSBF

1

VBUS

2

D-

3

D+

4

GND

5

StdA-SSRX-

6

StdA-SSRX+

7

GND-DRAIN

8

StdA-SSTX-

9

StdA-SSTX+

SINGA_2UB3914-00 0101F

U3TXDP2_C_ L
U3TXDN2_C_L
U3RXDP2_L
U3RXDN2_L

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

@

10

GND

11

GND

12

GND

13

GND

1
2
4
5
3

TVWDF100 4AD0_SL P2510P 8-10-9

W

=80mils

+5VALW

2.0A

U15

2

IN

3

IN

B B

A A

USB_EN#0<36>

+USB_VCCB

5

4

EN/ENB

1

GND

G547I2P81U_MSOP8

SA00003TV00
S

A00003XM00

USB20_N0 _R
USB20_P0_R

U3RXDN1_L
U3RXDP1_L

U3TXDN1_C_L
U3TXDP1_C_ L

+USB_VCCB

6

OUT

7

OUT

8

OUT

5

OCB

USB_OC#0 <10,11,36>

JUSBR

1

VBUS

2

D-

3

D+

4

GND

5

StdA-SSRX-

6

StdA-SSRX+

7

GND-DRAIN

8

StdA-SSTX-

9

StdA-SSTX+

SINGA_2UB3914-00 0101F

U3TXDP1_C_ L
U3TXDN1_C_L
U3RXDP1_L
U3RXDN1_L

@

GND
GND
GND
GND

D87

1

1

2

2

4

4

5
3

3

8

TVWDF100 4AD0_SL P2510P 8-10-9

+USB_VCCB

W=80mils

0.1U_040 2_10V7 K

1

C533

2

1

C534

@

2

4.7U_060 3_6.3V6K

USB_CHG_EN#<36 >

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WIT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WIT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WIT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

12

C532

47U_0805_6.3V6 M

10
11
12
13

@ESD@

9

U3TXDP1_C_ L

10

8

U3TXDN1_C_L

9

7

U3RXDP1_L

7

6

U3RXDN1_L

65

4

Issued Date

Issued Date

Issued Date

+5VALW

2.5A

U14

2

IN

3

IN

4

EN/ENB

1

GND

SY6288DCA C_MSOP8

SA00006DN00

+USB_VCCA

USB20_N1 _R
USB20_P1_R

U3RXDN2_L
U3RXDP2_L

U3TXDN2_C_L
U3TXDP2_C_ L

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

5

UA1

16

MONO-OUT

JDREF
AC_VREF
HPOUT_L

CBN
CBP

CPVEE
LDO1-CAP

LDO2-CAP
LDO3-CAP

SPKL­SPKL+
SPKR­SPKR+

COMBO_GPI

282@

21

29

MIC2-VREFO

30

MIC1-VREFO-R

31

MIC1-VREFO-L

15

JDREF

28

VREF

32

HPOUT-L(PORT-I-L)

33

HPOUT-R(PORT-I-R)

35

CBN

37

CBP

34

CPVEE

27

LDO1-CAP

39

LDO2-CAP

7

LDO3-CAP

43

SPK-OUT-L-

42

SPK-OUT-L+

44

SPK-OUT-R-

45

SPK-OUT-R+

48

SPDIF-OUT/GPIO2

4

DVSS

25

AVSS1

38

AVSS2

49

Thermal Pad

ALC282-CG_MQFN48_6X6

+MIC2_VREFO

RA38 20K_0402_1%

D D

HP_L
HP_R HPOUT_R

CA24 2.2U_0603_10V6K

CA23 2.2U_0603_10V6K
CA20 10U_0603_6.3V6M

CA21 10U_0603_6.3V6M
CA22 10U_0603_6.3V6M

12

RA20 75_0402_1%
RA21 75_0402_1%

12

12
12

12
12

close to pin, 10mil

AC_VREF

1

12

2

CA25

2.2U_0603_10V6K

CA12

0.1U_0402_10V7K

C C

D

RA2
0_0402_5%

GND

AGND

4

DVDD

DVDD-IO

AVDD1
AVDD2

PVDD1
PVDD2
CPVDD

GPIO0/DMIC-DATA

GPIO1/DMIC-CLK

SDATA-IN

SDATA-OUT

BCLK
SYNC

PCBEEP

Sense A
Sense B

MIC1-L(PORT-B-L)

MIC1-R(PORT-B-R)

MIC2-L(PORT-F-L)

MIC2-R(PORT-F-R)
LINE1-L(PORT-C-L)

LINE1-R(PORT-C-R)

LINE2-L(PORT-E-L)

LINE2-R(PORT-E-R)

RESETB

PDB

1
9

26
40

41
46
36

2
3

8
5

6
10
12
13

14
19

20
17
18

22
21
24
23

11
47

+DVDD
+DVDD

+AVDD1
+AVDD2

+PVDD
+PVDD
+DVDD

INT_MIC_CLK_R
AZ_SDIN0_HD_R

AZ_BITCLK_HD

MONO_IN
SENSE_A

MIC2_R_C_L
MIC2_R_C_R

1 2

For EMI reserve

RA66

FBMA-10-100505-301T

RA50

4.7K_0402_5%

@

CAM_EMI@

12

RA67 33_0402_5%

1 2

CA51 4.7U_0603_6.3V6K

1 2

CA52 4.7U_0603_6.3V6K

EC_MUTE# <36>

Reserve for solve noise issue

Internal AMP

EC_MUTE#

Hight

Enable

L

OW

Disable

For EMI reserve
close to codec

AZ_BITCLK_HD

RA41

10_0402_5% EMI@

INT_MIC_DATA <28>

AZ_SDIN0_HD <7>
AZ_SDOUT_HD <7>

AZ_BITCLK_HD <7>

AZ_SYNC_HD <7>

2

CA65

0.01U_0402_25V7K

1

@ESD@

3

12

MIC2_LINE1_R_L
MIC2_LINE1_R_R

AZ_RST_HD# <7>

1 2

CA53

10P_0402_50V8J EMI@

EMI@

CA61

220P_0402_50V7K

close to pin3

INT_MIC_CLK <28>

0.1U_0402_16V4Z

close to pin1

0.1U_0402_10V7K

lose to pin41

c

close to pin46

0.1U_0402_10V7K

close to pin26

0.1U_0402_10V7K

close to pin40

CA8

0.1U_0402_16V4Z

c

lose to pin36

0.1U_0402_16V4Z

close to pin9

+PVDD

1

CA34

2

CA38

0.1U_0402_10V7K

+AVDD1

1

CA40

2

+AVDD2

1

CA44

2

+DVDD

1

2

1

CA7

2

CA11

2

1

2

1

2

1 2

0_0603_5%

2

CA36

1

10U_0603_6.3V6M

RA28

1 2

0_0603_5%

2

CA39
10U_0603_6.3V6M

1

RA65

1 2

0_0603_5%

1

CA41
10U_0603_6.3V6M

2

RA68

1 2

0_0603_5%

1

CA43
10U_0603_6.3V6M

2

RA27

+5VS

+5VS

+1.5VS

+3VS

1

1 2

@

RA45 0_0603_5%

1 2

@

RA46 0_0603_5%

1 2

@

RA42 0_0603_5%

1 2

@EMI@

RA32 0_0603_5%

1 2

@EMI@

RA31 0_0603_5%

Beep sound

P

CI Beep

PCH_SPKR<10>

B B

Sense Pin

SENSE A

IF need cost down and don't care common design
RA63 change to 1K
RA62 change to reserve

RA63

1 2

47K_0402_5%

RA62

4.7K_0402_5%

Impedance

39.2K
20K
10K

5.

1K

1 2

CA71

1 2

MONO_IN

0.1U_0402_10V7K

CA27

100P_0402_50V8J

For better sound

y customer request

b

Codec Signals

PORT-I (PIN 32, 33)
PORT-B (PIN 21, 22)
PORT-C (PIN 23, 24)
(PIN 48)

Function

Headphone out
Ext. MIC

SPK

SPKL+

SPKL-

SPKR+

SPKR-

30mil

Fo

r EMI reserve

close to codec

1 2

@

RA11 0_0603_5%

1 2

@

RA12 0_0603_5%

1000P_0402_50V7K

1 2

@

RA13 0_0603_5%

1 2

@

RA14 0_0603_5%

1000P_0402_50V7K

CA47

@EMI@

@EMI@

CA42

1

2

1

2

1

CA46
1000P_0402_50V7K

2

@EMI@

1

@EMI@

CA45
1000P_0402_50V7K

2

SPK_L1 <33>

SPK_L2 <33>

SPK_R1 <33>

SPK_R2 <33>

39.2K PORT-E (PIN 14, 15)

A A

SENSE B PORT-F (PIN 16, 17)

Need connector list,
check normal close or open
apple or nokia

20K
10K

5

PORT-H (PIN 20)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/07/25 2013/07/25

2012/07/25 2013/07/25

2012/07/25 2013/07/25

Combo Jack

+MIC2_VREFO

MIC2_LINE1_R_R

MIC2_LINE1_R_L

COMBO_GPI

10U_0603_6.3V6M

if need EMI material
will use SM01000GK00

HP_R

LA7 0_0402_5%Rshort@

HP_L

LA6 0_0402_5%Rshort@

place close to chip

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

RA69 2.2K_0402_5%

1 2

1 2

RA35 1K_0402_5%

RA71

1 2

1

22K_0402_5%

CA48

2

1 2

1 2

@EMI@

RA61 39.2K_0402_1%

2

CA74

EXT_MIC

1

2

100P_0402_50V8J

Change material
to SM01000GK00

LA8

1 2

12

RA70

22K_0402_5%

CA75

1

2

@EMI@

100P_0402_50V8J

SENSE_ANBA_PLUG#

EMI@

SBY100505T-470Y-N 0402

1

2

CA69

PR <33>

PL <33>

NBA_PLUG#

2N7002DW-T/R7_SOT363-6

100P_0402_50V8J

Q5539B

EXT_MIC_L <33>

+DVDD

3

5

4

12

RA5

100K_0402_5%

NBA_PLUG <33>

for Combo Jack normal Close

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

Cover Sheet

Cover Sheet

of

35 49Sunday, April 07, 2013

35 49Sunday, April 07, 2013

1

35 49Sunday, April 07, 2013

0.1

0.1

0.1

A

0.1U_0402_10V7K

1

1

For EMI

CLK_PCI_EC

12

RB4

10_0402_5%

1 1

2 2

+3VL
+3VS

3 3

Signal pull high is default status (ROM only mode).
I

f signal pull low, EC will send translator code to chip.(EP mode)

4 4

@EMI@

1

CB11

22P_0402_50V8J

@EMI@

2

+3VL

RB2

47K_0402_5%

1 2

1 2

CB12 0.1U_0402_10V7K

+3VL

1 2

RPB1

1 8
2 7
3 6
4 5

2.2K_8P4R_5%

RB27

100K_0402_5%

1 2

+3VL

LVDS@

@

CHG_PWR_GATE#

RB26
10K_0402_5%

1 2

RB25
10K_0402_5%

1 2

RB12 10K_0402_5%

TRANS_SEL

For Translator select

EC_RST#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

E51_TXD

A

CB13 0.1U_0402_10V7K

KSI[0..7]<37>

KSO[0..17]<37>

POK<42,9>

ACES_85205-0400

CB1

0.1U_0402_10V7K

ESD@

1 2

EC DEBUG port

@

JDB

1
2
3
4

2

KB_RST#<10>

LPC_FRAME#<8>

CLK_PCI_EC<8>

WOWL_EN#<38>

PLT_RST#

KSI[0..7]
KSO[0..17]

EC_SMB_CK1<34,40,41>
EC_SMB_DA1<34,40,41>
EC_SMB_CK2<18,8>
EC_SMB_DA2<18,8>

PM_SLP_S3#<9>
PM_SLP_S5#<9>

USB_OC#2<10,11,33>
USB_CHG_OC#<11,34,8>
USB_CHG_EN#<34>
USB_EN#2<33>

FAN_SPEED1<7>

PCH_PWROK<9>

1 2

RB7 0_0402_5%

1
2

E51_TXD

3

E51_RXD

4

SERIRQ<10>
LPC_AD3<8>

LPC_AD2<8>
LPC_AD1<8>
LPC_AD0<8>

PLT_RST#<9>
EC_SCI#<10>

EC_SMI#<7>

WL_OFF#<31>

E51_TXD<31>

E51_RXD<31>

KB_LED<37>

BT_ON<31>

@

CB2

CB4

2

0.1U_0402_10V7K

CLK_EC_R

100K_0402_5%

+3VS

0.1U_0402_10V7K

1

@

2

CLK_PCI_EC
PLT_RST#
EC_RST#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

E51_TXD
E51_RXD

12

@

RB22

CB5

B

1

2

10
12

13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

1

CB16
20P_0402_50V8

@

2

+3VL

UB1

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

LPC & MISC

LPC_AD0
CLK_PCI_EC

PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

XCLKI/GPIO5D
XCLKO/GPIO5E

Int. K/B
Matrix

SM Bus

9

EC_VDD/VCC

PS2 Interface

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109

CIN1 pin102

V

VCOUT0 pin104

COUT1 pin103

V

B

>1.2V <1.2V

HIGH

(default)

HIGH

(default)

+3VL

22

33

96

125

111

67

EC_VDD0

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

PWM Output

AD Input

DA Output

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

BATT_CHG_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO55

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04

H_PROCHOT#_EC/GPXIOA06

GPO

GPIO

PCH_APWROK/GPXIOA10

GPI

GND/GND

GND/GND

GND/GND

GND/GND

GND0

11

24

35

69

94

113

LOW

LOW

C

CB3

0.1U_0402_10V7K

1 2

21

GPIO0F

BEEP#/GPIO10

EC_VDD/AVCC

ACOFF/GPIO13

BATT_TEMP/GPIO38

ADP_I/GPIO3A

IMON/GPIO43

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56
VR_ON/GPIO57

PM_SLP_S4#/GPIO59

PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF-A3_LQFP128_14X14

9012@

23
26

GPIO12

27

63

BATT_PRES

64

GPIO39

65
66

GPIO3B

75

GPIO42

GPXIOD06

V18R

UB1
NPCE885NB0DX LQFP 128P

885@

EC_ON_R

885_EC_ON

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

TRANS_SEL

76

68
70

885_EC_ON

71

CB0_WAKE#

72

83
84
85

EC_SMB_CK3

86

EC_SMB_DA3

87

TP_CLK

88

TP_DATA

97
98

GPS_DOWN#

99
109

119
120
126
128

73

WLAN_WAKE#

74
89

CHG_PWR_GATE#KSO17

90
91
92
93
95

SYSON

121
127

100
101
102
103

H_PROCHOT#_EC

104

VCOUT0_PH_L

105
106
107
108

110

ACIN

112

EC_ON_R

114
115

LID_SW#

116

SUSP#

117

+VTT_EC

118

EC_PECI

124

+EC_V18R

9012@

1 2

RB36 0_0402_5%

1 3

D

S

QB2

2N7002K_SOT23-3

G

2

or KB9012 EC_ON low pulse work around

F

C

WL_BT_LED# <33>

USB_EN#0 <34>

FANPWM <7>
CLK_REQ_GC6# <18>

BATT_PRES <40>
USB_OC#0 <10,11,34>
ADP_I <40,41>
ADP_V <41>

EC_ENBKL <27,28,9>

VCCST_PWRGD <12,44>

EC_MUTE# <35>

PM_SLP_S4# <9>

EC_SMB_CK3 <27>

EC_SMB_DA3 <27>

TP_CLK <33>

TP_DATA <33>

EC_CB1 <34>

GPS_DOWN# <18>
PWRME_CTRL <7>

VCIN0_PH <40>

EC_SDIO <8>
EC_SDI <8>
EC_SCK <8>
EC_CS0# <8>

WLAN_WAKE# <31>

WOL_EN# <32>

CHG_PWR_GATE# <34>
BATT_FULL_LED# <33>
CAPS_LED# <37>
PWR_SUSP_LED# <33>
BATT_CHG_LOW_LED# <33>
SYSON <43>
VCCST_PG_EC <12,9>

FB_CLAMP <18,19,22>

PCH_RSMRST# <9>
EC_LID_OUT# <10>
PROCHOT_IN <40>

BKOFF# <28>

PBTN_OUT# <9>
PCH_PWR_EN <38,45>
EC_SWI# <32,9>

ACIN <41,9>

ON/OFFBTN# <37>
LID_SW# <33>

SUSP# <38,44>

1

CB15

4.7U_0805_10V4Z

2

885@

RB20 330K_0402_5%

1

1U_0402_6.3V6K
CB50

2

885@

@

RB24

885@

12

10K_0402_5%

Compal Secret Data

Compal Secret Data

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

CB0_WAKE#

Reserve this signal to EC by SW demand
2011/10/18a

PROCHOT_IN connect
to power portion (9012 only)

1 2

885@

1 2

RB3 0_0402_5%
RB19 43_0402_5%

12

EC_ON <42>

Deciphered Date

Deciphered Date

Deciphered Date

D

VR_HOT#<46>

RR8 0_0402_5%

12

@

12

@

RR9 0_0402_5%

VCIN0_PH connect to
p

ower portion (9012 only)

+1.05VS_VTT

H_PECI <5>

+3VL

D

1 2

RB1 0_0402_5%@

H_PROCHOT#_EC

2N7002_SOT23-3

LAN_WAKE# <32>
EC_CB0 <34>

E

13

D

2

G

QB1

S

BATT_PRES

ACIN

H_PROCHOT#_EC

LID_SW#

WLAN_WAKE#

TP_CLK

TP_DATA

EC_SMB_CK3

EC_SMB_DA3

SYSON

SUSP#

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

1 2

CB9 100P_0402_50V8J@

1 2

CB10 100P_0402_50V8J

1 2

@

RB6 10K_0402_5%

1 2

RB35 47K_0402_5%

1 2

RB37 47K_0402_5%

1 2

RB8 4.7K_0402_5%

1 2

RB9 4.7K_0402_5%

1 2

RB15 2.2K_0402_5%

1 2

RB16 2.2K_0402_5%

1 2

RB10 4.7K_0402_5%

1 2

RB21 10K_0402_5%

1 2

@

RB34 0_0402_5%

1

CB8
47P_0402_50V8J

2

+3VS

H_PROCHOT# <5>

+3VS

+3VL

VS_ON <42>

Close to EC

ESD@

1 2

SUSP#

CB14 180P_0402_50V8J

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LPC-EC-KB9012&930

LPC-EC-KB9012&930

LPC-EC-KB9012&930

Sunday, April 07, 2013

Sunday, April 07, 2013

Sunday, April 07, 2013

E

36 49

36 49

36 49

0.1

0.1

0.1

5

Power Button

15@

TJG-533-V-T/R_6 P

3

1
2

D D

4

5

14@

TJG-533-V-T/R_6 P

3
4

SW3

5

6

SW2

6

1
2

+3VL

R469
100K_04 02_5%

1 2

2

1

ON/OFFBTN#

ESD@

CH13

0.1U_0402_10V7K

ON/OFFBTN# <36 >

4

POWER LED

+5VS

R5

15@

390_040 2_5%

1 2

R7

14@

390_040 2_5%

1 2

R9
390_040 2_5%

1 2

3

D6

2 1

HT-F196BP5_ WHITE

D7

2 1

HT-F196BP5_ WHITE

D8

2 1

HT-F196BP5_ WHITE

2

1

Battery Reset

15@

ENLDO<42>

14@

SW4
TJG-533-V-T/R_6 P

3
4

5

6

1
2

Keyboard LED

Q193
AO3413_ SOT23

S

12

G

13

D

Q194
2N7002KW_SOT323-3

KBL@

S

KBL@

D

13

+5VS_LED

2

CAPS_LED#

+3VS_KB
KSI1
KSI6
KSI5
KSI0
KSI4

10

KSI3

11

KSI2

12

KSI7

13

KSO15

14

KSO12

15

KSO11

16

KSO10

17

KSO9

18

KSO8

19

KSO13

20

KSO7

21

KSO6

22

KSO14

23

KSO5

24

KSO3

25

KSO4

26

KSO0

27

KSO1

28

KSO2

29
30
31

KSO17

32
33

KSO16

34

CVILU_CF17341U0R0 -NH

+5VS

R475

10K_040 2_5%

C C

KB_LED<36 >

14 " KEYBOARD CONN.

JKB4

1

1

2

2

CAPS_LED#<36>

+3VS

B B

R479 300_ 0402_5 %

12

+3VS_KB
KSI1
KSI6
KSI5
KSI0
KSI4
KSI3
KSI2
KSI7
KSO15
KSO12
KSO11
KSO10
KSO9
KSO8
KSO13
KSO7
KSO6
KSO14
KSO5
KSO3
KSO4
KSO0
KSO1
KSO2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

GND1

36

GND2

CVILU_CF17341U0R0 -NH

@

15" KEYBOARD CONN.

KSI[0..7]

KSO[0..17]

KBL@

2

G

KSI[0..7] <36>

KSO[0..17] <36>

ACES_50578-0040N-001

JKB5

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

35

GND1

36

GND2

@

JBLG@

1

1

2

2

3

3

4

4
GND
GND

+5VS_LED

5
6

Screw Hole

H1

H_4P6

@

1

H6

H_3P0

@

1

ISPD

ZZZ

PCB LA-A4 81P

V

GACPU WLAN standoff

H4

H10

H_6P5

@

1

H5
H_3P3

@

1

H11

H_3P3

@

1

H_6P5

@

1

NPTH

H18

H17

H_3P0x2P5 N

H_2P5N

@

@

1

1

H19

H_3P5x3P0 N

@

1

H_4P6x4P2

@

1

H3

H_4P2

@

1

H2

PTH

H9

H8

H_3P5

H_5P0

@

@

1

1

H12

H13
H_3P5

@

1

H7

H_3P5

H_3P0

@

@

1

1

H30

H29

H_3P2

H_3P2

@

@

1

1

H20

H_2P8N

@

1

PCB Fedical Mark PAD

FD3

FD2

FD1

@

@

1

FD4

@

@

1

1

1

GPU

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WIT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WIT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WIT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

TP/ISPD/KB/Screw

TP/ISPD/KB/Screw

TP/ISPD/KB/Screw

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

Sunday, April 07, 2013

Sunday, April 07, 2013

Sunday, April 07, 2013

1

37 49

37 49

37 49

0.1

0.1

0.1

A

+3VALW TO +3VS

+5VALW

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

+5VALW TO +5VS
Load Switch

1 1

C537

1U_0402_6.3V6K

1

@

2

+3VALW

@

1

2

+5VALW

C542
1U_0402_6.3V6K

SUSP#

SUSP#

B

U3

1

VOUT1

VIN1

2

VOUT1

VIN1

3
4
5
6

7

CT1

ON1

GND

VBIAS
ON2

CT2

VIN2

VOUT2

VIN2

VOUT2

GPAD

TPS22966DPUR_SON14_2X3

C

14

+5VS_LS

13
12
11
10
9

8
15

C538 180P_0402_50V8J

1 2

C540 330P_0402_50V7K

1 2

+3VS_LS

1 2

PJ5

@

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

+3VS

1

C541

@

2

0.1U_0402_10V7K

1

C539

0.1U_0402_10V7K

@

2

+5VS

PJ3

@

+3VALW TO +3V_WLAN
for WOWL

WOWL_EN#<36>

D

WOWL@

RM2

100K_0402_5%

+3VALW

12

RM4
10K_0402_5%

1 2

47K_0402_5%

12

RM3

WOWL@

WOWL@

2

CM4

0.1U_0402_10V7K

1

2

WOWL@

CM5

0.01U_0402_25V7K

1

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

S

G

AO3413_SOT23

2

QM1

D

1 3

WOWL@

E

Need mount RM1 if system
do

n't support WOWL

+3V_WLAN

RM1

1 2

0_0603_5%

NOWOWL@

+3VS

+1.5VALW to +1.5VS

+1.5VALW +1.5VS

V_GS(th) : -0.55 V

D

S

Avoid leakage

C43

0.1U_0402_16V7K

2 2

3 3

SUSP

R153
1K_0402_5%

13

Q8

1

G

AO3413_SOT23

2

2

12

C53

0.01U_0402_25V7K

PCH_PWR_EN<36,45>

+5VALW

1 2

SUSP

61

SUSP#<36,44>

2

+3VL

R483
10K_0402_5%

885@

1 2

R485
100K_0402_5%

Q5539A
2N7002DW-T/R7_SOT363-6

+5VALW

R482
10K_0402_5%

1 2

PCH_PWR_EN#

61

Q195A
2N7002DW-T/R7_SOT363-6

2

+0.675VS +1.05VS_VTT

R486
22_0805_5%

1 2

13

D

Q189

2

SUSP

G

S

2N7002KW_SOT323-3

2N7002KW_SOT323-3

Q60

2

G

PCH_PWR_EN# <13>

1 2

13

R487
470_0805_5%

D

S

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC-DC INTERFACE

DC-DC INTERFACE

DC-DC INTERFACE

ZRMAA/ZEMAA

ZRMAA/ZEMAA

ZRMAA/ZEMAA

Sunday, April 07, 2013

Sunday, April 07, 2013

Sunday, April 07, 2013

E

38 49

38 49

38 49

0.1

0.1

0.1

A

B

C

D

Other component (37.1)

DC_IN

A51 need add fuse

PF1

7A_32V_S1206-H-7.0A

21

1 1

2 2

PJP1

@

ACES_50299-00401-001

1

1

2

2

3

3

4

4

+

EMI Part (47.1)

DC_IN_S1

12

PBJ101
ML1220T13RE

@

FBMA-L11-201209-121LMA50T_0805

FBMA-L11-201209-121LMA50T_0805

PC102

12

PC103

EMI@

100P_0603_50V8

12

EMI@

1000P_0603_50V7K

For ML1220 RTC (38.2)

PR101

560_0603_5%

1 2

+RTC

+RTC_R

PL101

EMI@

1 2

1 2

PL102

EMI@

PR102

560_0603_5%

1 2

12

EMI@

100P_0603_50V8

+RTCBATT

PC101

VIN

12

EMI@

1000P_0603_50V7K

PC104

-

3 3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DCIN

DCIN

DCIN
ZRMAA

D

39 49

39 49

39 49

0.1

0.1

0.1

A

B

C

D

1 1

@

PJP2

GND
GND

10
9
8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

Other component (37.1)

PF2

BATT_S1

BATT_P5
EC_SMDA
EC_SMCA

10A_125V_TR2/6125FF10-R

21

12

PR14
1K_0402_1%

EMI Part (47.1)

VMB

FBMA-L11-201209-121LMA50T_0805

FBMA-L11-201209-121LMA50T_0805

12

EMI@

1000P_0402_50V7K

PC7

PL2

EMI@

1 2

1 2

PL3

EMI@

12

PC8

EMI@

0.01U_0402_25V7K

BATT+

+3VL

12

PR16

6.49K_0402_1%

12

PR21
100_0402_1%

PR19

1K_0402_1%

BATT_PRES <36>

EC_SMB_DA1 <34,36,41>

EC_SMB_CK1 <34,36,41>

2 2

PR20

100_0402_1%

2 1

2 1

OTP (39.7)

ADP_I<36,41>

PR2

@

0_0402_5%

PROCHOT_IN<36> VCIN0_PH<36>

1 2

Initial Recovery

45W
UM

A

75W

N14P-GV2

0.55V

0.90V

21

PR1
1K_0402_1%

21

PR3
20K_0402_1%

0.43V

0.72V

PR5

@

0_0402_5%

1 2

12

PC11

@

0.1U_0402_10V7K

+3VL

12

PR4

12.1K_0402_1%

12

PH1

100K_0402_1%_TSM0B104F4251RZ

Initial Recovery

CPU

3 3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

OTP

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

90 C

70 C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

BATTERY CONN / OTP

BATTERY CONN / OTP

ZRMAA

D

40 49

40 49

40 49

0.1

A

B

C

D

for reverse input protection

Charger controller (40.1), Support component (40.2)

13

D

2

PQ209

G

SSM3K7002FU_SC70-3

PR225

1 2

1 1

2 2

3 3

1M_0402_5%

PQ203
TPCA8057-H_PPAK56-8-5

5

12

PC230

2200P_0402_50V7K

1
2
3

4

BQ24735_ACDRV_1

1 2

3M_0402_5%

Vin Dectector

Min. Typ Max.
H-->L 17.23V
L-->H 17.63V

ILIM and external DPM

3.61A

4 4

PR226

S

SI7716ADN-T1-GE3_POWERPAK8-5

1
2
3

12

PC231

0.1U_0402_25V6

12

12

PR235

PR234

4.12K_0603_1%

4.12K_0603_1%

PQ205

4

P2VIN B+P1

5

PC238

+3VL

PR211

0.01_1206_1%

1
2

0.1U_0402_25V6

12

0.1U_0603_25V7K

1 2

PR239 10K_0402_1%

1 2

PC236

BQ24735_ACN

BQ24735_ACP

BQ24735_CMSRC

BQ24735_ACDRV

4
3

12

PC235

0.1U_0402_25V6

PC239

1 2

1U_0603_25V6K

21

1

2

3

4

5

BQ24735_ACOK

VIN

PU200

PAD
ACN

ACP

CMSRC

ACDRV

ACOK

ACIN<36,9>

VIN

12

PR244

422K_0402_1%

12

12

PR245

PC244

66.5K_0402_1%

0.1U_0402_25V6
PC245

100P_0402_50V8J

EMI Part (47.1)

EMI@

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

2

3

PD230
BAS40CW_SOT323-3

0.047U_0402_25V7K

1
12

PC237

1 2

PR228

BQ24735_VCC

20

VCC

BQ24735RGRR_QFN20_3P5X3P5

ACDET6IOUT7SDA8SCL9ILIM

BQ24735_ACDET

12

10_1206_1%

BQ24735_LX

DH_CHG

18

19

PHASE

1 2

0.1U_0402_10V7K

12

PR229

2.2_0603_5%

BQ24735_BST

17

HIDRV

PR246

@

0_0402_5%

@

BTST

PL201

12

PD231
RB751V-40_SOD323-2

BQ24735_REGN

16

REGN

LODRV

GND

SRP

SRN

BATDRV

10

BQ24735_ILIM

12

12

PC246

12

PC214

@EMI@

2200P_0402_25V7K

DH_CHG

PC205

1 2

1U_0603_25V6K

15

DL_CHG

14

10_0603_1%

13

1 2

SRP

6.8_0603_5%

12

1 2

SRN

11

BQ24735_BATDRV

1 2

357K_0402_1%

12

PC243

PR242

100K_0402_1%

0.01U_0402_25V7K

EC_SMB_CK1 <34,36,40>

EC_SMB_DA1 <34,36,40>

ADP_I <36,40>

Please locate the RC
Near EC chip

12

PC211

PR210

0_0603_5%

1 2

PR236

PR237

PR241

12

10U_0805_25V6K

CSOP1

CSON1

+3VALW

PC213

10U_0805_25V6K

5

4

123

5

4

12

PC242

0.1U_0603_16V7K

BQ24735_BATDRV

PQ201
AON7408L

PL202

4.7UH_ETQP3W4R7WFN_5.5A_20%

PQ202

1 2

12

PR206

@EMI@

12

PC206

@EMI@

4.7_1206_5%

680P_0603_50V8J

BQ24735_LX

AON7406L

123

EMI Part (47.1)

309K_0402_1%

47K_0402_1%

Fo

r A51 ADP_V function

1 2

PR233

4.12K_0603_1%

CHG

CSOP1

12

VIN

12

PR247

12

PR249

PQ207
SI7716ADN-T1-GE3_POWERPAK8-5

5

BQ24735_BATDRV_1

PR227

0.01_1206_1%

1
2

PC240

0.1U_0402_25V6

4

4
3

CSON1

12

PR248

10K_0402_1%

1 2

12

PC247

@

0.1U_0402_10V7K

1
2
3

PC241

0.1U_0402_25V6

12

PC234

0.01U_0402_50V7K

BATT+

12

12

PC222

PC223

10U_0805_25V6K

10U_0805_25V6K

ADP_V <36>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CHARGER

CHARGER

CHARGER
ZRMAA

D

41 49

41 49

41 49

0.1

A

B

C

D

3/5VALW controller (35.1), Support component (35.2)

1 1

PC345@

100P_0402_50V8J

PR335

100K_0402_1%

1 2

PR333

0_0402_5%

1 2

1 2

PR330

14K_0402_1%

1 2

PR331

20K_0402_1%

1 2

BST_3V

UG_3V

LX_3V

LG_3V

499K_0402_1%

1 2

12

PC360

2.2K_0402_1%

1 2

@

0_0402_5%

1 2

VFB=2V

PR334

0.1U_0603_25V7K
PR340

PR341

FB_3V

6

7

8

9

10

PGOOD

BOOT2

UGATE2

PHASE2

LGATE2

PR338

100K_0402_1%

5

12

PR342

PR337

PR357

56K_0402_1%

2 1

2 1

2 1

143K_0402_1%

TON_35V

ENTRIP_5V

ENTRIP_3V

2

3

4

FB2

TON

ENTRIP1

ENTRIP2

VIN11ENLDO12SECFB13LDO514LDO3

12

PC342

1U_0603_10V6K

12

PC343

PR332

@

2 1

100K_0402_5%

4.7U_0603_6.3V6K

160K_0402_1%

FB_5V

1

FB1

BOOT1

UGATE1

PHASE1

LGATE1

PU330

15

RT8243AZQW_WQFN20_3X3

B+

EMI Part (47.1)

1 2

PL331

EMI@

HCB2012KF-121T50_0805

2 2

+3VALWP

3VALW
Ipeak : 9 A
Imax : 6.3 A
Iocp : 10.5 A
FSW : 455 kHz

3/5V_B+

PC339

2200P_0402_50V7K

@EMI@

PC340

10U_0805_25V6K

2.2UH_ETQP3W2R2WFN_8.5A_20%

1

+

PC331

2

150U_6.3V_20mohm

PL332

1 2

12

PR336

4.7_1206_5%

@EMI@

SNUB_3V

12

PC336

@EMI@

680P_0603_50V8J

12

12

5

PQ331

AON7408L

123

5

123

4

PC335

0.1U_0402_10V7K

1 2

4

FDMC7692S_MLP8-5
PQ332

Rds=10.8mΩ(Typ)

13.6mΩ(Max)

+3VL

POK<36,9>

BST1_3V

3/5V_B+

EMI Part (47.1)

3 3

EC_ON<36>

VS_ON<36>

PR350

30K_0402_1%

1 2

PR351

19.1K_0402_1%

1 2

VFB=2V

21

PAD

20

BYP1

19

18

17

16

12

PC344

4.7U_0603_10V6K

ENLDO <37>

BST_5V

UG_5V

LX_5V

LG_5V

PR355

0_0402_5%

1 2

+3VLP

12

PC341

4.7U_0603_10V6K

3/5V_B+

PC355

0.1U_0402_10V7K

1 2

BST1_5V

Rds=10.8mΩ(Typ)

12

PC361

10U_0805_25V6K

PQ352

FDMC7692S_MLP8-5

13.6mΩ(Max)

3 5

241

5

4

123

E

PQ351
AON7408L_DFN8-5

PL352

2.2UH_ETQP3W2R2WFN_8.5A_20%

1 2

12

PR356

4.7_1206_5%

@EMI@

SNUB_5V

12

PC356

@EMI@

680P_0603_50V8J

MI Part (47.1)

+5VALWP

1

+

PC351

2

150U_6.3V_20mohm

5VALW
Ipeak : 9.8 A
Imax : 6.8 A
Iocp : 11.8 A
FSW : 390 kHz

PJ332

@

+3VLP +3VL

1

JUMP_43X39

221

+3VALWP +3VALW

+5VALWP +5VALW

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PJ331

@

112

JUMP_43X118

@

112

JUMP_43X118

PJ351

2

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

3VALW/5VALW

3VALW/5VALW

3VALW/5VALW

ZRMAA

D

42 49

42 49

42 49

0.1

0.1

0.1

EMI Part (47.1)

HCB1608KF-121T30_0603

B+

PL151

EMI@

1 2

1.35V_B+

A

DDR controller (35.3), Support component (35.4)

PR155

0_0603_5%

BST_1.35V-1

1 2

BST_1.35V

+1.35V

PR158

15K_0402_1%

1 2

PC162

1U_0603_10V6K

1 2

VDD_1.35V

+5VALW

DH_1.35V

CS_1.35V

1.35V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR161

825K_0402_1%

1 2

16

17

19

18

BOOT

PHASE

UGATE

RT8207MZQW_WQFN20_3X3

S5

PGOOD

TON

8

7

9

10

TON_1.35V

PR164

0_0402_5%

21

EN_0.675VSP

12

20

PU150

VTT

PAD

VLDOIN

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

S3

6

FB_1.35V

VFB=0.75V

PC167

0.1U_0402_10V7K

21
1

2

3

4

5

VTTREF_1.35V

PR162
10K_0402_1%

2 1

+1.35VP

+1.35VP

2 1

12

PC159

10U_0805_6.3V6K

PR160

8.06K_0402_1%

12

PC160

10U_0805_6.3V6K

12

PC152

2200P_0402_50V7K

@EMI@

PL152

+1.35VP

1UH_PCMB063T-1R0MS_12A_20%

DDR 1.35 V
Ipe

ak : 8.9 A
Imax : 6.3 A
Iocp : 11 A
FSW : 306 kHz

1 1

1

+

PC157

2

220U_2.5V_12mohm

I Part (47.1)

EM

+0.675VSP

+1.35VP

12

PJ675

@

1

JUMP_43X39

@

PJ1351

1

JUMP_43X118

12

SNUB_+1.35VP

12

221

221

12

PR156

@EMI@

4.7_1206_5%

PC156

@EMI@

680P_0402_50V7K

+0.675VS

+1.35V

@

PC166

PC164

SW_1.35V

DL_1.35V

12

EN_1.35V

PC154

10U_0805_25V6K

PQ151

AON7408L

123

PQ152

FDMC7692S_MLP8-5

123

SYSON<36>

PC155

5

4

5

4

s=10.8mΩ(Typ)

Rd

13.6mΩ(Max)

1 2

2 1

0.1U_0603_25V7K

PR163

@

0_0402_5%

+5VALW

PR159

5.1_0603_5%

1 2

1U_0603_10V6K

12

0.1U_0402_10V7K

DDR_VTT_PG_CTRL<16>

12

PC163

0.033U_0402_16V7K

+0.675VSP

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0
S3

S4/S5

Hi Hi

HiLo

Lo Lo

On
On

Off

(Discharge)

On
On

Off

(Discharge)

On

Off
(Hi-Z)

Off

(Discharge)

Note: S3 - sleep ; S5 - power off

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

1.35VP/0.675VSP

1.35VP/0.675VSP

1.35VP/0.675VSP
ZRMAA

43 49

43 49

43 49

0.1

5

4

3

2

1

D D

1.05VCCP controller (35.5), Support component (35.6)

PR402

0_0402_5%

12

12

PC402

@

0.1U_0402_16V7K

SUSP# <36,38>

EMI Part (47.1)

EM

I Part (47.1)

PL401

EMI@

B+

HCB2012KF-121T50_0805

C C

B B

12

12

PC404

2200P_0402_50V7K

@EMI@

+3VS

VCCST_PWRGD<12,36>

12

PC401

10U_0805_25V6K

1 2

100K_0402_5%

+3VS

PR401

PU400
SY8208DQNC_QFN10_3X3

8

IN

EN

GND

ILMT
PG

BS

LX

FB

BYP

LDO

9

3
2

1
6

PC406

10

0.1U_0603_25V7K

4
7
5

1 2

12

SW_+1.05VSP

12

PC413

PC412

4.7U_0603_6.3V6K

PR403

@EMI@

4.7_1206_5%

1 2

SNUB_+1.05VSP

PL402

1UH_VMPI0703AR-1R0M-Z01_11A_20%

1 2

+3VALW

2.2U_0603_6.3V6K

@EMI@

680P_0603_50V7K

12

PR404

75K_0402_1%

12

PR405
100K_0402_1%

1 2

12

12

PC403

PC407

PR406

+1.05VS_VTTP

12

12

4700P_0402_25V7K

PC408

1K_0402_1%

22U_0603_6.3V6M

12

12

PC409

PC410

22U_0603_6.3V6M

PC411

22U_0603_6.3V6M

+1.05VS_VTTP

22U_0603_6.3V6M

Ipeak : 10.2 A
Ima
Iocp : 16 A
FSW : 800 kHz

x : 7.2 A

PJ401

@

112

JUMP_43X118

2

+1.05VS_VTT

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.05VS_VCCP

+1.05VS_VCCP

+1.05VS_VCCP

ZRMAA

ZRMAA

ZRMAA

1

44 49

44 49

44 49

0.1

5

4

3

2

1

EMI Part (47.1)

PL601

1.5VS controller (35.31), Support component (35.32)

D D

PU600

PR602

124K_0402_1%

21

PR601

1K_0402_1%

PCH_PW R_EN<36,38>

1 2

PC605

0.1U_0402_16V7K

12

TRIP_1.5VSG

FB_1.5VSG

RF_1.5VSG

12

470K_0402_1%

PR605

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS51212DSCR_SON10_3X3

VBST

DRVH

V5IN

DRVL

10

BST_1.5VSG

9

DH_1.5VSG

8

SW

TP

SW_1.5VSGEN_1.5VSG

7
6

DL_1.5VSG

11

12

1U_0603_10V6K

2.2_0603_5%

1 2

+5VALW

PC606

PR603

PC604

0.1U_0603_25V7K

1 2

Rds=13.5mΩ(Typ)

16.5mΩ(Max)

4

4

1.5VSG_B+

5

PQ601

AON7408L

123

2.2UH_ETQP3W2R2WFN_8.5A_20%

5

12

PQ602

123

12

12

PL602

1 2

PR604

EMI@

4.7_1206_5%

PC608

EMI@

680P_0402_50V7K

12

PC601

10U_0805_25V6K

EMI@

HCB2012KF-121T50_0805

PC602

2200P_0402_50V7K

@EMI@

1

+

2

21

+1.5VALWP

PC607

220U_2.5V_12mohm

B+

C C

B B

VFB=0.704V

12

PR607

10K_0402_1%

PR606

11.5K_0402_1%

21

SI7716ADN-T1-GE3_POWERPAK8-5

+1.5VALW P

I Part (47.1)

EM

@

1

JUMP_43X118

PJ150

221

+1.5VALW

1.5V
Ip

eak : 7.8 A
Imax : 5.5 A
Iocp : 9.5 A
FSW : 290 kHz

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

.5VS

+1
ZRMAA

1

45 4

45 4

45 49

0.1

9

9

5

4

3

2

1

+VCC_CORE controller (36.1), Support component (36.3

iver(36.2), decoupling cap(36.4)

dr

I Part (47.1)

EM

PL501

EMI@

FBMA-L11-201209-121LMA50T_0805

1 2

B+ CPU_B+

PC508

PWM1

1 2

PL504

EMI@

FBMA-L11-201209-121LMA50T_0805

CPU_B+

PC509

12

1 2

12

10U_0805_25V6K

21

12

10U_0805_25V6K

PR518 2.2_0402_1%

PC511 .1U_0402_16V7K

1

+

PC503

33U_25V_M

33U_25V_M

2

EMI Part (47.1)

PC510

2200P_0402_50V7K

@EMI@

9

5

PGND2

VSW

VIN

6

PGND1

BOOT_R

7

BOOT

VDD

8

PWM

SKIP#

PU501

CSD97374CQ4M_SON8_3P5X4P5

1

+

PC504

2

PC507

@EMI@

680P_0402_50V7K

1 2

4
3
2
1

@EMI@

4.7_1206_5%

1 2

PR519

@

0_0402_5%

PR516

21

SKIP#

12

PC514
1U_0402_10V6K

+1.05VS_VTT

12

12

12

VR_HOT#<36>

.1U_0402_16V7K

PC520

@

47P_0402_50V8J

PC515

12

PR525

PR524

130_0402_1%

54.9_0402_1%

PR512

1 2

2.37K_0402_1%

PL502

0.15UH_ETQP4LR15AFM_29A_20%

1 2

+5VS

4700P_0402_25V7K

309K_0402_1%

1 2

13

IMON

THERM

V5A

VREF

28

51622_VREF

12

PC519
1U_0402_10V6K

PR509

12

29

V5A

PC502

1 2

OCP-I

GND

51622_VREF

11

10

F-IMAX

B-RAMP

VCLK

VR_HOT#

31

30

1 2

PR529
10_0603_1%

56K_0402_1%

1 2

B-RAMP

9

O-USR

PGOOD

ALERT#

32

PR510

F-IMAX

VR_ON

SKIP#
PWM1
PWM2

N/C

VDD

VDIO

33

12

100K_0402_1%_TSM0B104F4251RZ

D D

PC505

10K_0402_1%

PR520

PC517

1500P_0402_50V7K

1 2

CSP1
CSN1

CSP2

GFB
VFB

PC516

@

100P_0402_50V8J

10K_0402_1%

21

CPU_B+

0_0402_5%

C C

VSS_SENSE<12>
VCC_SENSE<12>

B B

+3VS

1 2

PR521

@

0_0402_5%

1 2
1 2

PR522

@

0_0402_5%

PH501

B value:4250K

12

12

1000P_0402_50V7K

1 2

PR511

@

10K_0402_1%

PR514

VBAT

17
18
19
20
21
22
23
24

DROOP

21

PR526

21

PR528

4.87K_0402_1%

0.33U_0402_10V6K

1 2

THERM

PR505

9.09K_0402_1%

SLEWA OCP-I

12

PR513
39K_0402_1%

15

14

16

VBAT

SLEWA

CSP1
CSN1
CSN2

PU500

CSP2

TPS51622RSM_QFN32_4X4~D

PU3
N/C
GFB
VFB

COMP

DROOP

26

25

27

COMP

PR527

2.7K_0402_1%

21

12

PC518

12

PR503
PR502

@

PR506

O-USR

8
7
6
5
4
3
2

VDD

1

PAD

+5VALW

100K_0402_1%

12

150K_0402_1%

PR530

0_0402_5%

1 2

12

PC501

VR_SVID_DAT

VR_SVID_ALRT#

VR_SVID_CLK

SKIP#
PWM1

1U_0402_6.3V6K

VR_HOT#

1M_0402_1%

PR507

150K_0402_1%

PR501

12

12

12

PR504

9.31K_0402_1%

12

12

PR508

150K_0402_1%

VR_ON <12>

+1.05VS_VTT

12

PR523
10K_0402_1%

VGATE <12>

1_0402_1%

+3VS

VR_SVID_CLK<12>
VR_SVID_ALRT#<12>
VR_SVID_DAT<12>

)

12

12

PH502

12

12

PR515

16.5K_0402_1%
PR517

10K_0402_1%_TSM0A103F34D1RZ

3.01K_0402_1%

Maximum current: 32A

VIN
MAX current
Th

ermal current
Dynamic current
OCP
Switching frequency
Boot voltage
DC Load- line

PC506

0.1U_0402_10V7K

12

PC512

@

0.1U_0402_10V7K

+CPU_CORE

19V
32A
10A
27A
45A
1MHz

1.7V
2m Ohm

CSP1

CSN1

For BOT side

+CPU_CORE

+CPU_CORE

A A

12

12

r TOP side

Fo

1

2

1

2

5

22U_0603_6.3V6M

PC521

22U_0603_6.3V6M

PC529

22U_0603_6.3V6M

PC537

PC545

22U_0603_6.3V6M

22u*26

22U_0603_6.3V6M

22U_0603_6.3V6M

PC522

12

12

PC530

22U_0603_6.3V6M

12

12

PC538

22U_0603_6.3V6M

1

2

PC546

22U_0603_6.3V6M

1

2

22U_0603_6.3V6M

PC523

PC524

12

12

22U_0603_6.3V6M

PC532

22U_0603_6.3V6M

12

PC531

PC539

22U_0603_6.3V6M

1

2

12

PC540

22U_0603_6.3V6M

1

2

22U_0603_6.3V6M

22U_0603_6.3V6M

PC525

12

22U_0603_6.3V6M

12

PC533

PC541

22U_0603_6.3V6M

1

2

22U_0603_6.3V6M

PC526

12

22U_0603_6.3V6M

12

PC534

PC542

22U_0603_6.3V6M

1

2

4

22U_0603_6.3V6M

PC527

PC528

12

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC535

PC536

PC543

22U_0603_6.3V6M

PC544

22U_0603_6.3V6M

1

1

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPA L ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPA L ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPA L ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE
ZRMAA

46 49

46 49

46 49

1

0.1

A

B

C

D

+VGA_CORE

1 1

+VGA_CORE

1

2

2 2

Under VGA Core

12

12

12

PC903

PC904

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

12

12

PC919

PC918

0.1U_0402_10V7K

0.1U_0402_10V7K

Near VGA Core

12

PC924

PC923

47U_0805_6.3V6M

22U_0603_6.3V6M

12

12

12

PC909

PC905

4.7U_0603_6.3V6M

PC920

0.1U_0402_10V7K

12

PC907

PC908

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

PC921

0.1U_0402_10V7K

12

12

12

PC926

PC925

4.7U_0603_6.3V6M

PC927

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

PRV11 = 71.5K ==>Fsw = 450KHz

PR917

@

0_0402_5%

VGA_VSS_SENSE<20>

VGA_VCC_SENSE<20>

3 3

1 2

PR920

@

0_0402_5%

1 2

12

PC936

1000P_0402_50V7K

47P_0402_50V8J

GB4-128 package

12

PC928

4.7U_0603_6.3V6M

PC937

1 2

12

PC958

4.7U_0603_6.3V6M

12

PC929

PR921

10K_0402_1%

1 2

12

PC912

PC911

4.7U_0603_6.3V6M

12

12

PC952

@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1 2

PC934

.01U_0603_16V7K

PR919

51_0402_1%

1 2

12

PC913

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

PC953

@

4.7U_0603_6.3V6M

20K_0402_1%

VREF

1500P_0402_50V7K

PR914

18K_0402_1%

100P_0402_50V8J

PC955

@

PR915

21

1 2

PC939

12

PC954

@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

21

PC933

@

21

PC940
2700P_0402_50V7K

PR931

34K_0402_1%

1 2

10P_0402_50V8J

FB2_VGA

12

PC956

@

4.7U_0603_6.3V6M

12

21

PC938

1 2

PR922

82K_0402_1%

PR913

20K_0402_1%

12

PR930
2K_0402_1%

REFIN

VREF

FS

FB_VGA

COMP_VGAFB1_VGA

PR909

0_0402_5%

@

21

VIDBUF

PU900

7

REFIN

8

VREF

9

FS

10

FBRTN

11

FB

12

COMP

VGA_CORE controller (43.1), Support component (43.2)

<18>

+3VS_DGPU

DGPU_VID

12

2 1

PR932

PR929

@

2 1

0_0402_5%

10K_0402_5%

GPU_VID

PSI_VGA

6

4

5

VID

VIDBUF

TSNS13TALERT#14VCC15PGOOD16HG217BST2

GND

25

VCC_VGA

12

12

PR926

5.9K_0402_1%

VREF

PSI

<18>

+3VS_DGPU

12

1 2

PR912 10K_0402_5%

EN_VGA

2EN3

PSI

1 2

1 2

PC946
1U_0402_10V6K

PC930
.1U_0402_16V7K

UGATE1_VGA

1

HG1

BST1

24

PH1

23

LG1

22

PGND

21

PVCC

20

LG2

19

PH2

18

NCP81172MNTWG_QFN24_4X4

BOOT2_VGA

UGATE2_VGA

VGA_PWROK <22,9>

+3VS

PR925

10K_0402_5%

PR927

2.2_0402_5%

BOOT1_VGA

PVCC_VGA

+5VS

PR907

2.2_0603_5%

1 2

PHASE1_VGA

BOOT1_2_VGA

1 2

@

PR901

0_0402_5%

PC922

0.22U_0603_10V7K

1 2

LGATE1_VGA

PC935 4.7U_0603_10V6K

1 2

PR924

2.2_0603_5%

PHASE2_VGA

LGATE2_VGA

PR908

0_0603_5%

1 2

1 2

1 2

12

PR911

PR923
0_0603_5%

BOOT2_2_VGA

UGATE1_2_VGA

35.7K_0402_1%

UGATE2_2_VGA

PC944

0.22U_0603_10V7K

1 2

AON7518

TPCA8059

+5VS

PQ901

PQ902

PQ903

AON7518

PQ904

TPCA8059

EMI Part (47.1)

+VGA_B+

12

PR906

4.7_1206_5%

PC906

12

PC915

2200P_0402_50V7K

@EMI@

0.22UH_MMD-06DZNR22MEO1L_25A_20%

12

SNUB1_VGA

12

5

4

123

5

123

@EMI@

@EMI@

680P_0402_50V7K

4

12

PC910

10U_0805_25V6K

PL903

1 2

PC917

10U_0805_25V6K

PL901

EMI@

SUPPRE_ FBMA-L11-453215-800LMA90T_1812

21

+VGA_CORE

1

+

PC931

2

560U_D2_2VM_R4.5M

B+

EMI Part (47.1)

+VGA_B+

5

4

123

5

@EMI@

123

@EMI@

680P_0402_50V7K

4.7_1206_5%

4

12

12

PC942

10U_0805_25V6K

0.22UH_MMD-06DZNR22MEO1L_25A_20%

12

PR916

SNUB2_VGA

12

PC916

Product
EDP-Peak 55A
ED

P-Continue
Max-Current 28A
VID range 0.7125~1.15V

PC943

OCP
Switching frequency

10U_0805_25V6K

PL904

1 2

1

+

PC932

2

330U_D2_2V_Y

N14P-GV2

32A

60A
1MHz

+VGA_CORE

EM

I Part (47.1)

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

VGA_CORE

VGA_CORE

VGA_CORE
ZRMAA

D

47 49

0.1

5

4

3

2

1

P W R P I R ( P r o d u c t I m p r o v e R e c o r d )

V S K T A L A - 9 8 6 5 P S c h e m a t i c C h a n g e L is t

It e m T i m e (W h e n ) P a g e (W h e r e ) L o c a t io n / D i s cr ip t io n ( H o w / W h a t ) R e q u e s t ( W h o ) R e s o n (W h y )

1 E V T - -2 0 1 2 / 1 1 / 2 8 A d d / P C 1 0 1 , P C 1 0 3 , P C 1 0 2 , P C 1 0 4 , P C 7 , P C 8 ,

P L 1 5 1 , P C 1 8 1 , P L 2 , P C 3 , P L 1 0 1 , P L 1 0 2 , P L 3 3 1 ,

D D

2 E V T - -2 0 1 2 / 1 1 / 2 8 P 5 0 - P W R - C P U _C O R E V a lu e c h a n g e / P R 5 2 9 , P R 5 2 0 , P R 5 2 8 , P R 5 0 3 ,

P L 4 0 1 , P L 6 0 1 , P L 5 0 1 , P L 9 0 1

P R 5 0 7 , P R 5 1 5 , P R 5 2 7 , P R 5 0 9 , P R 5 1 0 , P R 5 0 4 , P C 5 1 6 ,
P L 5 0 2 , P C 5 4 3 , P C 5 4 4 , P C 5 4 5 , P C 5 4 6 , P C 5 1 4 , P C 5 1 9

3 E V T - -2 0 1 2 / 1 1 / 2 8 P 4 8 - P W R - 1 . 0 5 V S _ V C C P / 1 .8 V S P V a lu e c h a n g e / P R 4 0 7 , P R 4 0 1 , P R 4 0 4 , P R 4 0 5 ,

P C 4 0 4 , P C 4 0 5

4 E V T - -2 0 1 2 / 1 1 / 2 8 P 4 6 - P W R - 1 . 3 5 V P / 0 . 6 7 5 V S P

S h o r t p a d r e s e r v e / P R 1 6 3 P W R
5 E V T - -2 0 1 2 / 1 1 / 2 8 P 4 7 - P W R - 3 V A L W / 5 V A L W P C 3 5 1 r e s e r v e / P C 3 5 2 m o u n t P W R M E li m it a t i o n
6 E V T - -2 0 1 2 / 1 1 / 2 8 P 5 0 - P W R - C P U _C O R E P C 5 0 4 r e s e r v e P W R M E li m it a t i o n
7 E V T - -2 0 1 2 / 1 1 / 2 8 P 4 4 - P W R - B A T T E R Y C O N N / O T P P F 2 c h a n g e v e n d o r P W R f o r c o s t d o w n p l a n
8 E V T - -2 0 1 2 / 1 1 / 2 9 P 4 6 - P W R - 1 . 3 5 V P / 0 . 6 7 5 V S P c h a n g e m a t e r ia l / P L 1 5 2 P W R F o r d e s ig n c h a n g e
9 D V T -2 0 1 2 / 1 2 / 1 3 P 4 3 - P W R - D C I N m o d if y P B J1 0 1 f o o t p r in t P W R f o r c o m m f o o t p r i n t

1 0 D V T -2 0 1 2 / 1 2 / 1 3 P 4 4 - P W R - B A T T E R Y C O N N / O T P m o d if y P R 2 0 , P R 2 1 p in d e f in e P W R f o r l a y o u t m o d u le r e q u e s t
1 1 D V T -2 0 1 2 / 1 2 / 1 3 P 4 6 - P W R - 1 .3 5 V P / 0 . 6 7 5 V S P ch a n g e P R 1 6 0 t o 8 .0 6 K P W R f o r o u t p u t v o lt a g e le v e l
1 2 D V T -2 0 1 2 / 1 2 / 1 3 P 4 6 - P W R - 1 .3 5 V P / 0 . 6 7 5 V S P m o d i fy P L 1 5 2 , P C 1 5 5 , P R 1 6 4 p in d e f in e P W R f o r l a y o u t m o d u l e r e q u e s t
1 3 D V T -2 0 1 2 / 1 2 / 1 3 P 4 7 - P W R - 3 V A L W / 5 V A L W d e l P C 3 3 1 , P C 3 5 1 P W R M E li m it a t i o n
1 4 D V T -2 0 1 2 / 1 2 / 1 3 P 4 7 - P W R - 3 V A L W / 5 V A L W m o d if y P L 3 3 2 , P R 3 3 7 , P R 3 4 2 , P R 3 5 7 p in d e f in e P W R f o r la y o u t m o d u le r e q u e st
1 5 D V T -2 0 1 2 / 1 2 / 1 3 P 4 7 - P W R - 3 V A L W / 5 V A L W m o d if y t h e V S _ O N d ir e ct i o n P W R i n p u t si g n a l

C C

1 6 D V T -2 0 1 2 / 1 2 / 1 3 P 4 8 - P W R - 1 .0 5 V S _V C C P / 1 . 8 V S P c h a n g e t h e 1 .8 V S P E N t o 6 5 1 1 _ P W R _ E N P W R fo r H ig h e n a b l e
1 7 D V T -2 0 1 2 / 1 2 / 1 3 P 4 8 - P W R - 1 .0 5 V S _V C C P / 1 . 8 V S P m o d if y P R 4 0 1 , P C 4 0 2 , P R 1 8 2 p in d e f in e P W R f o r l a y o u t m o d u l e r e q u e s t
1 8 D V T -2 0 1 2 / 1 2 / 1 3 P 4 9 - P W R - 1 .5 V A L W P c h a n g e P R 6 0 3 t o 0 o h m P W R V B S T r e s is t o r
1 9 D V T -2 0 1 2 / 1 2 / 1 3 P 4 9 - P W R - 1 .5 V A L W P m o d if y P R 6 0 2 , P R 6 0 6 , P L 6 0 1 p in d e f in e P W R fo r l a yo u t m o d u le r e q u e s t
2 0 D V T -2 0 1 2 / 1 2 / 1 3 P 5 0 - P W R - C P U _ C O R E c h a n g e t h e B + E M I b e a d P W R M E li m it a t i o n
2 1 D V T -2 0 1 2 / 1 2 / 1 3 P 5 0 - P W R - C P U _ C O R E m o d if y P C 5 1 6 , P R 5 2 6 , P R 5 2 7 , P C 5 1 7 , P R 5 2 9 , P R 5 1 2 ,

P R 5 1 6 , P R 5 1 8 , P R 5 3 4 , P R 5 3 6 , P R 5 3 0 , P R 5 2 4 p in

d e f i n e

2 2 D V T -2 0 1 2 / 1 2 / 1 3 P 5 1 - P W R - V G A _ C O R E P R 9 1 2 / a d d 1 0 K o h m P W R p u ll h i g h + 3 V S _ D G P U
2 3 D V T -2 0 1 2 / 1 2 / 1 3 P 5 1 - P W R - V G A _ C O R E P C 9 3 4 ch a n g e t o 0 . 0 1 u P W R V R E F p u ll d o w n c a p
2 4 D V T -2 0 1 2 / 1 2 / 1 3 P 5 1 - P W R - V G A _ C O R E m o d if y P L 9 0 1 , P R 9 0 8 , P R 9 0 7 , P R 9 0 1 , P R 9 2 3 , P R 9 2 4 ,

P R 9 2 7 , P C 9 4 6 , P R 9 1 3 , P R 9 1 5 , P R 9 1 4 , P R 9 0 4 , P R 9 2 8 ,

P R 9 3 1 , P R 9 3 2 , P R 9 0 9 p i n d e f in e

2 5 P V T - 2 0 1 3 / 0 1 / 2 5 P 4 7 - P W R - 3 V A L W / 5 V A L W ch a n g e P C 3 3 2 ,P C 3 5 2 , P R 4 0 9 lo c a t io n t o

P C 3 3 1 , P C 3 5 1 , P R 3 3 5

2 6 P V T - 2 0 1 3 / 0 1 / 2 5 P 4 6 - P W R - 1 . 3 5 V P / 0 . 6 7 5 V S P

c h a n g e P L 1 5 2 v a l u e fr o m 1 u H t o 0 .6 8 u H P W R fo r d e s ig n ch a n g e

2 7 P V T - 2 0 1 3 / 0 1 / 2 5 P 4 6 - P W R - 1 . 3 5 V P / 0 . 6 7 5 V S P c h a n g e P C 1 5 7 t o 3 9 0 u F 5 * 5 .7 P W R l ay o u t r e q u e s t
2 8 P V T - 2 0 1 3 / 0 1 / 2 5 P 5 1 - P W R - V G A _ C O R E c h a n g e P C 9 3 4 p a r t n u m b e r P W R c o m m o n c h a n g e

B B

2 9 P V T - 2 0 1 3 / 0 2 / 0 4 P 5 0 - P W R - C P U _ C O R E P C 5 2 9 ,5 3 1 , 5 3 3 ,5 3 4 , 5 3 5 ,5 3 7 r e s e r v e

P C 5 0 5 0 . 1 u F c h a n g e t o 1 0 n F

P R 5 2 7 4 .9 9 k ch a n g e t o 2 . 7 k

P R 5 0 9 3 7 4 k c h a n g e t o 3 0 9 k

P C 5 0 6 0 . 1 5 u ch a n g e t o 0 .1 u

P R 5 1 0 3 9 k ch a n g e t o 5 6 k

3 0 P V T - 2 0 1 3 / 0 2 / 0 4 P 5 1 - P W R - V G A _ C O R E

P C 9 4 7 3 3 0 u r e s e r v e P W R fo r c o st d o w n p la n

3 1 P V T - 2 0 1 3 / 0 2 / 0 4 P 5 1 - P W R - V G A _ C O R E P L 9 0 3 ,9 0 4 ch a n g e P N P W R c o m m o n c h a n g e
3 2 P V T - 2 0 1 3 / 0 2 / 0 4 P 4 9 - P W R - 1 . 5 V A L W P n e t n a m e c h a n g e f r o m 1 .5 V A L W _ E N t o

P C H _ P W R _ E N

3 3 P V T - 2 0 1 3 / 0 2 / 0 7 P 4 9 - P W R - 1 . 5 V A L W P P R 6 0 4 P C 6 0 8 m o u n t

P R 6 0 3 ch a n g e f r o m 0 o h m t o 2 . 2 o h m

3 4 P V T - 2 0 1 3 / 0 2 / 0 7 P 4 9 - P W R - 1 . 5 V A L W P

P L 6 0 2 c h a n g e f r o m 4 .7 u t o 2 .2 u P W R F o r d e s ig n c h a n g e

3 5 P V T - 2 0 1 3 / 0 2 / 0 7 P 4 8 - P W R - 1 . 0 5 V S _V C C P / 1 . 8 V S P P L 4 0 2 c h a n g e P N f r o m R X 0 0 ( H 1 .8 ) t o 5 K 8 0 ( H 3 .0 ) P W R c h a n g e M a t e r i a l fo r u s e f u l h e i gh t

E M I E M I r e q u e s t

P W R T P S 5 1 6 2 2 f o r 1 5 W C P U s e t t in g

P W R F o r T P S 5 1 3 6 2 d e s i gn c h a n g e

P W R f o r l a y o u t m o d u l e r e q u e s t

P W R f o r l a y o u t m o d u l e r e q u e s t

P W R c o m m o n c h a n g e

P W R f o r T P S 5 1 6 2 2 d a t e c o d e 2 B I

d e s i g n c h a n g e

H W f o r c o m m o n d e s ig n c h a n g e

E M I E M I r e q u e s t

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

PIR (PWR)

PIR (PWR)

ZRMAA

48 49Sunday, April 07, 2013

48 49Sunday, April 07, 2013

48 49Sunday, April 07, 2013

1

0.1

A

HW PIR (Product Improve Record)

ZRMAA LA-A481P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.0 TO 0.1
GERBER-OUT DATE: 2013/xx/xx
NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------­1 03/04 36 Add EC_SMB_CK3
2 03/04 27 Add EC_SMB_CK3

1 1

3 03/04 31 Change JWLAN connector For WLAN
4 03/04 31 Change JHDMI connector For HDMI
5 03/04b 30 Change JHDD pin define For HDD
6 03/04b 33 Delete DEVSLP0 For HDD
7 03/04b 37 ADD R5
8 03/05A 07 Change FAN connector For FAN
9 03/05A 16
10 03/05A 33 Change JHP connector For Small board
11 03/05B 19 Change RV4
12 03/06A 19 Delete RV108
13 03/06A 19 ADD RPV8
14 03/06A 06 Update DDR pin for DDR interleave routing For DDR
15 03/06B 33 Change JHP to JSB4 and Add JSB5 For Small board
16 03/06B 33 ADD R44
17 03/06B 33 Change JKB to JKB4
18 03/07A 16
19 03/11A 33 Change JNGFF connector For NGFF SSD
20 03/11A 34 Change JUSBR
21 03/11A 37 Modify Hole For Dummy
22 03/11B 35 ADD RA5
23 03/11B 07 Change JSPK For Speaker
24 03/12A 30 Swap JHDD pin define For HDD

2 2

25 03/12A 29 Swap L64
26 03/12A 37 Change D6
27 03/12A 37 Add SW3 for 14" For Power Button
28 03/12B 37 Add H18
29 03/12C 37 Change CCL2 and RCL5 @ to GCLK@ For Green clock
30 03/12C 37 Delete E51_TXD(RB27)
31 03/12D 31 Change JWLAN to NGFF E type For WLAN
32 03/13A 37 ADD KSO17
33 03/13A 36 Change TRANS_SEL to pin75
34 03/13A 36 ADD KSO17
35 03/13A 36 Delete BT_ON Pin34 For WLAN
36 03/13A 17
37 03/13B 36 Change LAN_WAKE# from UB1.108 to UB1.71 For EC
38 03/13B 36 Change WAKE# to EC_SWI# and connect to UB1.108 For EC
39 03/13B 34 Swap L60
40 03/13B 37 Delete Q196 For WLAN LED
41 03/13B 35 Delete CA54
42 03/13B 35 Swap JSPK For Audio
43 03/14A 34 Swap LR7
44 03/14A 16
45 03/14B 33 Swap R44
46 03/14B 36 ADD JDB for EC debug For Debug

3 3

47 03/14B 18 Change XTAL_OUTBUFF
50 03/14B 18 Change SMB_CLK_GPU
51 03/14B 16
52 03/14B 31
53 03/14B 36 EC_SMB_CK3
54 03/14B 10 Delete R307
55 03/15A 5

、、、、

17 Change DDR net order For DDR

、、、、

17 Change JDDR3S

、、、、

6 Change DDR to no interleave routing For DDR

、、、、

17 Swap JDDR3R

、、、、

17 JDDR3R

、、、、

36 ADD BT_ON For WLAN

、、、、10、、、、

37 Change CH7,D98,D99 BOM config from @ESD@ to ESD@ for ESD's request.

、、、、D6、、、、R7、、、、

、、、、

、、、、

EC_SMB_DA3

、、、、

EC_SMB_DA3 Vendor request for LVDS Translator

D7 For Power LED

、、、、

RV5

、、、、

RV6

、、、、

、、、、

RV109

、、、、

RPV9 For Layout placement

、、、、

R45

、、、、

R46

、、、、

、、、、

JUSBF connector For NGFF SSD

、、、、

Q5539B for Combo Jack Normal Close For Audio

、、、、

L65

、、、、

、、、、

D7 material and Add D8

、、、、

H19 Delete H7

、、、、

KSO16 for 15" keyboard For keyboard

、、、、

KSO16 for 15" keyboard For keyboard

、、、、

L56

、、、、

、、、、

CA56 For Audio

、、、、

LR8 For USB

、、、、

JDDR3S For DDR

、、、、

R45

、、、、

JDDR3S to JDDR3H

、、、、

EC_SMB_DA3 change use 2.2K For LVDS SM Bus

、、、、

R220 For Audio sleep & music

RV7

、、、、

RV110

、、、、

R47 For Small board

、、、、

ADD JKB5 For Keyboard

JDDR3R For DDR

L66

、、、、

L67 For HDMI

、、、、

、、、、

E51_RXD For WLAN

L71

、、、、

L72 For DDR3

R46

、、、、

R47 For Small board

、、、、

XTAL_SSIN to RPV1.3

、、、、

SMB_DATA_GPU to RPV2.3

B

、、、、

RB135

、、、、

RB136 Vendor request for LVDS Translator

、、、、

RV8

、、、、

RV9 For Layout placement

、、、、

RV111

、、、、

RV104

、、、、

RV105

、、、、

RV106

、、、、

RV107 For Layout placement

、、、、

R19 For 14" 15" LED

H14

、、、、

H15 For Hole

，，，，

CHG_PWR_GATE# to pin89 For keyboard

、、、、

RPV1.4 For VGA

、、、、

、、、、

JDDR3L For DDR

RPV2.4 For VGA

C

D

E

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

2012/04/19 2015/04/19

2012/04/19 2015/04/19

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

HW-PIR

HW-PIR

HW-PIR

49 49Sunday, April 07, 2013

49 49Sunday, April 07, 2013

49 49Sunday, April 07, 2013

E

0.1