Compal LA-A341P ZIPS1, ThinkPad Yoga S1 Schematic
1
2
3
4
5
CompalConfidential
ModelName:ZIPS1
A A
FileName:LA‐A341P
BOMP/N:
B B
CompalConfidential
StellaM/BSchematicsDocument
IntelSharkBayULTProcessorwithDDR3L
C C
Rev.1A_20130902A
D D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
4019P2
4019P2
4019P2
Date: Sheet
Date: Sheet
Date: Sheet
5
of
of
of
142Friday, March 07, 2014
142Friday, March 07, 2014
142Friday, March 07, 2014
C
C
C
A
B
C
D
E
Compal Confidential
Model Name :
File Name :
1 1
ST-Note
Block Diagram
eDP Conn.
mHDMI Conn.
Cable Docking
P.18
P.19
P.26
eDP
DDI1
DDI2
Intel Shark Bay
HDA
2-Ch. SPK Conn.
2 2
Combo Jack Conn.
P.20
DMIC
P.20
Card Reader
Audio Codec
P.20
1X
P.22
PCI-E SATA
SMBUS
SPI
ULT MCP
BGA
40mm x 24mm
Dual Channel
1.35V
USB3.0
USB2.0
LPC
1X
mini PCI-E
Half Card Conn.
3 3
WLAN & BT
(WLAN)
USB 2.0(BT)
P.27
BIOS ROM
8M+4M
P.8
EC
P.31
TPM
P.30
RAM-DDR3L
On-Board
USB 2.0
USB 3.0 Conn.
USB3.0 redriver
Sensor Hub
Touch Panel
Camera & DMIC
DMIC
PS8713B
P.18
P.16~17
P.27
P.28
P.21
P.18
USB 2.0
USB 3.0
P.26
Cable Docking
USB 3.0 Conn
AOU4
TPS2543
P.28
ALS
Accelerometer & eCompass
Gyro
Sub board
Accelerometer
P.21
NFC
P.30
Thermal Sensor
APS
P.23
Click Pad
P.29 P.29
Track Point
Int.KBD
P.29
P.29
LID
P.29
(mSATA)
Digitizer
SATA redriver
PS8520CT
P.18
P.23
NGFF Conn.
m-SATA SSD
SSD/HDD
P.24
Sub board
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2015/03/082013/03/08
2015/03/082013/03/08
2015/03/082013/03/08
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
Friday, March 07, 2014
Friday, March 07, 2014
Friday, March 07, 2014
E
422
422
422
CCustom
CCustom
CCustom
1
2
3
4
5
Voltage Rails
SIGNAL
STATE
power
plane
A A
State
+5VALW
+B
+1.35V
+3VALW
+5VS
+3VS
+1.5VS
+VCCP
+CPU_CORE
+0.675VS
+1.05VS
+3VM
+1.05VM
Full ON
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
BOARD ID Table
Board ID
0
1
2
3
S0
S3
S5 S4/AC
S5 S4/ Battery only
(AOU Disable)
S5 S4/AC & Battery
B B
don't exist
(AOU Disable)
O
O
O
O
O
O
O
XX
X
X
X
X
XX X
OO
X
X
O
M3 Supported
O
M3 Supported
O
M3 Supported
4
5
6
7
BOM Structure Table
BTO Item BOM Structure
Connector ME@
EMI Mount
Intel UMA
AOAC AOAC@
TPM TPM@
EC SM Bus1 address
Device
Smart Battery
Charger
Address
0001 011X b
0001 011X b
HEX
16H
12H
SBA SBA@
Unpop
EMI Un-Mount
EC SM Bus2 address
Device
Thermal Sensor Fintek F75303M
C C
Synaptics Inter Touch Click Pad
Address
1001_101xb
HEX
9AH
2CH0010_110xb
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
ON
ON
ON
ON ON ON
ON
OFF
OFF
OFF
OFF
OFFLOW LOW LOW LOW
HIGH HIGH HIGH HIGH
LOW LOW
HIGH
LOWLOWLOW
HIGH
HIGH
USB 2.0 Port Table
PCB Revision
0.1
USB 2.0
USB 3.0 Port Table
EMI@
DIS@dGPU
UMA@
NOSBA@Non-SBA
DDR1@DRAM Option
@
@EMI@
Port
1
USB 3.0 Port (Left)
2
USB 3.0 Port (Right)
3
USB 3.0 Port (Docking)
4
SATA Port Table
Port
0
HDD
1
NGFF SSD
2
33
OFF
OFF
OFF
Port
0
1
2
3
4
5
6
7
3 External
USB Port
USB 3.0 Port + AOU (Left)
USB 3.0 Port (Right)
USB 3.0 Port (Docking)
Mini Card (WLAN/BT)
Touch Screen
Camera
Sensor Hub
Digitizer
PCIE Port Table
Port
Lane
1
2
3
4
5
6
0
1
2
3
0
1
2
WLAN
Cardreader
PCH SM Bus address
Device Address
Security Rom
D D
1
HEX
A8H1010 100xb
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
4019P2
4019P2
4019P2
Date: Sheet
Date: Sheet
Date: Sheet
5
of
of
of
342Friday, March 07, 2014
342Friday, March 07, 2014
342Friday, March 07, 2014
C
C
C
1
H1
H1
H_2P5
H_2P5
0902A
@
0509A
03/06A
@
1
H4
H4
H_2P5
H_2P5
@
@
1
H7
H7
H_2P8
H_2P8
@
@
1
H5
H5
H_4P0
H_4P0
@
@
1
H19
H19
H_4P0X2P5
H_4P0X2P5
@
@
1
H8
H8
H_2P5
H_2P5
H6
H6
H_4P0
H_4P0
H15
H11
H11
H12
H12
H_2P5
H_2P5
H_2P5
H_2P5
@
@
@
@
1
1
1
H10
H10
H9
H9
H_4P0
H_4P0
H_4P0
H_4P0
@
@
@
@
1
1
1
H15
H17
H17
H14
H14
H13
H13
H_2P5
H_2P5
H_2P5
H_2P5
H_2P5
H_2P5
H_2P5
H_2P5
@
@
@
@
@
@
@
1
@
@
@
@
@
1
1
1
FD3
FD3
FD4
FD4
@
@
@
@
@
ZZZ
ZZZ
DAA00074000
DAA00074000
@
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FD2
FD2
@
@
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FD1
FD1
1
FIDUCIAL_C40M80
A A
B B
FIDUCIAL_C40M80
2
H18
H18
H2
H2
H_2P5N
H_2P5N
H_2P1N
H_2P1N
@
@
1
1
[AC Mode]
AC_IN
AC_PRESENT
B+
+3VLP/+VL
EN_5V/EN_3V
+5VALW/+3VALW
ON/OFFBTN#
EC_RSMRST#
SUSCLK
PBTN_OUT#
3
H21
H20
H20
H_4P0X2P5N
H_4P0X2P5N
@
@
@
@
1
H21
NCQF0_MB_SUP_BRK
NCQF0_MB_SUP_BRK
@
@
1
4
5
[DC Mode]
BATT+
AC_PRESENT
B+
T=10ms
moniter AC_IN (51_ON)
Moniter ON/OFFBTN# rising edge
T=10ms
20ms
Moniter ON/OFFBTN# rising edge
T=110ms
+3VLP/+VL
ON/OFFBTN#
+5VALW/+3VALW
EC_RSMRST#
SUSCLK
T=10ms
Moniter ON/OFFBTN#EN_5V/EN_3V
T=10ms
Moniter ON/OFFBTN# and EN_3/5V both of risgin edge
20ms
Moniter ON/OFFBTN# rising edgePBTN_OUT# T=110ms
PM_SLP_S5#
Montier PBTN_OUT# falling edge.
PM_SLP_S4#
PM_SLP_S3#
DDR_VTT_PG_CTRL
+0.675VS
SYSON
T=10ms
After PM_SLP_S4# moniter PBTN_OUT#
immediately, After PM_SLP_S4# falling edge
+1.35V
SUSP#
T=10ms
After PM_SLP_S3# moniter SYSON rising edge.
immediately, After PM_SLP_S3# falling edge
+5VS
+3VS
C C
+1.8VS
+1.5VS
+1.05VS
VCCST_PG_PWR (VCCST Powr Good from PWR IC)
After VCCST_PG_PWR risign edge ,OD pin
VCCST_PG_EC (ALL_SYS_PWRGD,non CPU code VR)
RAM_ID3
GPIO46
GPIO471GPIO48 GPIO49
0
0
0
0
0
010
0
01
0
0
11
0
1100
01
1
0
D D
1
1
1
1
1111
101
01010
0
00
1
0
1
00
11
0
1
1
10101
1
RAM
HYNIX 4GB
SAMSUNG 4GB
0 MICRON 4GB
ELPIDA 4GB
SAMSUNG 8GB
ELPIDA 8GB
0
MICRON 8GB
HYNIX 8GB
TBD
TBD1
TBD
TBD
TBD
TBD
TBD
0
TBD
1
2
RAM_ID1 RAM_ID0
RAM_ID2
VR_ON
VGATE
PCH_PWROK After VCCST_PG_EC rising edge
H_CPUPWRGD
PCH_PLTRST#
3
T=10ms
immediately, VCCST_PG_PWR & VCCST_PG_EC risign edge
Vboot+CPU_CORE
T=10ms
T=99ms
After VCCST_PG_EC assertionSYS_PWROK
After CPUPWRGD/PCH_PWRGD/SYS_PWROK assertion
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
4
immediately, After SUSP# falling edge
immediately, After SUSP# falling edge
immediately, After SUSP# falling edge
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
4019P2
4019P2
4019P2
Date: Sheet
Date: Sheet
Date: Sheet
5
of
442Friday, March 07, 2014
of
442Friday, March 07, 2014
of
442Friday, March 07, 2014
C
C
C
5
4
3
2
1
DDI/ MSIC/ XDP
D D
HASWELL_MCP_E
U1A @
U1A @
HASWELL_MCP_E
CPU_DP1_N0[26]
DP to Docking (2 lane)
HDMI
C C
+1.05VS
H_CPUPWRGD
1
C2222
C2222
100P_0402_50V8J
100P_0402_50V8J
@EMI@
@EMI@
2
B B
+1.35V
12
R29
R29
470_0402_5%
470_0402_5%
DIMM_DRAMRST#
H_CPUPWRGD
0802A
H_PROCHOT#[31,33,34,35]
ESD
DDR3 Compensation Signals
62_0402_5%
62_0402_5%
12
R2
R2
CPU_DP1_P0[26]
CPU_DP1_N1[26]
CPU_DP1_P1[26]
CPU_DP2_N0[19]
CPU_DP2_P0[19]
CPU_DP2_N1[19]
CPU_DP2_P1[19]
CPU_DP2_N2[19]
CPU_DP2_P2[19]
CPU_DP2_N3[19]
CPU_DP2_P3[19]
H_PECI[31]
1 2
R3 56_0402_5%R3 56_0402_5%
1 2
R6 10K_0402_5%R6 10K_0402_5%
DIMM_DRAMRST#[16,17]
T111 @T111 @
T2 @T2 @
PROC_DET#
CATERR#
H_PROCHOT#_R
H_CPUPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DIMM_DRAMRST#
DDR_PG_CTRL
DDR3 Compensation Signals
DDR3 Compensation Signals:
20 mils to comp signals
25 mils to non-comp signals
500 mil for Max trace length
A A
1 2
R9 200_0402_1%R9 200_0402_1%
1 2
R10 120_0402_1%R10 120_0402_1%
1 2
R11 100_0402_1%R11 100_0402_1%
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DDR_PG_CTRL
C54
DDI1_TXN0
C55
DDI1_TXP0
B58
DDI1_TXN1
C58
DDI1_TXP1
B55
DDI1_TXN2
A55
DDI1_TXP2
A57
DDI1_TXN3
B57
DDI1_TXP3
C51
DDI2_TXN0
C50
DDI2_TXP0
C53
DDI2_TXN1
B54
DDI2_TXP1
C49
DDI2_TXN2
B50
DDI2_TXP2
A53
DDI2_TXN3
B53
DDI2_TXP3
U1B @
U1B @
D61
PROC_DETECT
K61
CATERR
N62
PECI
K63
PROCHOT
C61
PROCPWRGD
AU60
SM_RCOMP0
AV60
SM_RCOMP1
AU61
SM_RCOMP2
AV15
SM_DRAMRST
AV61
SM_PG_CNTL1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
U7
U7
NC1VCC
2
A
3
GND
74AUP1G07GW_TSSOP5
74AUP1G07GW_TSSOP5
DDI EDP
DDI EDP
MISC
MISC
THERMAL
THERMAL
PWR
PWR
DDR3
DDR3
+1.35V
1
C90
C90
2
5
4
Y
1 OF 19
1 OF 19
HASWELL_MCP_E
HASWELL_MCP_E
2 OF 19
2 OF 19
+5VALW
12
R283
R283
220K_0402_5%
220K_0402_5%
JTAG
JTAG
To KS RD
EDP_DISP_UTIL
C45
EDP_TXN0
B46
EDP_TXP0
A47
EDP_TXN1
B47
EDP_TXP1
C47
EDP_TXN2
C46
EDP_TXP2
A49
EDP_TXN3
B49
EDP_TXP3
A45
EDP_AUXN
B45
EDP_AUXP
D20
EDP_RCOMP
A43
Rev1p2
Rev1p2
J62
PRDY
K62
PREQ
E60
PROC_TCK
E61
PROC_TMS
E59
PROC_TRST
F63
PROC_TDI
F62
PROC_TDO
J60
BPM#0
H60
BPM#1
H61
BPM#2
H62
BPM#3
K59
BPM#4
H63
BPM#5
K60
BPM#6
J61
BPM#7
Rev1p2
Rev1p2
DDR_VTT_PG_CTRL [37]
EDP_TXN0 [18]
EDP_TXP0 [18]
EDP_TXN1 [18]
EDP_TXP1 [18]
+VCCIOA_OUT
EDP_COMP
CPU_INV_PWM
1 2
1 2
R31
@R31
@
0_0402_5%
0_0402_5%
R1
R1
24.9_0402_1%
24.9_0402_1%
EDP_AUXN [18]
EDP_AUXP [18]
INVPWM [18,9]
EDP_COMP: Trace width=20 mils,Spacing=25mil,Max length=100mils
XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
XDP_PRDY#
XDP_TDO
T16 @T16 @
T107 @T107 @
T15 @T15 @
T97 @T97 @
T98 @T98 @
T99 @T99 @
T100 @T100 @
T101 @T101 @
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
0802A
PU/PD for JTAG signals
XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TDO
XDP_TCK
XDP_TRST#
1 2
R15 51_0402_5%@R15 51_0402_5%@
1 2
R16 51_0402_5%@R16 51_0402_5%@
1 2
R17 51_0402_5%@R17 51_0402_5%@
1 2
R18 51_0402_5%@R18 51_0402_5%@
1 2
R25 51_0402_5%R25 51_0402_5%
1 2
R28 51_0402_5%@R28 51_0402_5%@
+1.05VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
1
of
of
of
542Friday, March 07, 2014
542Friday, March 07, 2014
542Friday, March 07, 2014
C
C
C
5
4
3
2
1
Memory I/F
D D
DDR_A_D[0..63][16]
DDR_A_MA[0..15][16]
DDR_A_DQS#[0..7][16]
DDR_A_DQS[0..7][16]
HASWELL_MCP_E
U1C @
U1C @
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
C C
B B
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
AH63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
HASWELL_MCP_E
3 OF 19
3 OF 19
DDR CHANNEL A
DDR CHANNEL A
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
DDRA_ODT0
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
SA_CLK_DDR#0 [16]
SA_CLK_DDR0 [16]
DDRA_CKE0_DIMMA [16]
DDRA_CKE1_DIMMA [16]
DDRA_CS0_DIMMA# [16]
DDRA_CS1_DIMMA# [16]
T4 @T4 @
DDR_A_RAS# [16]
DDR_A_WE# [16]
DDR_A_CAS# [16]
DDR_A_BS0 [16]
DDR_A_BS1 [16]
DDR_A_BS2 [16]
SM_DIMM_VREFCA [16]
SA_DIMM_VREFDQ [16]
SB_DIMM_VREFDQ [17]
DDR_B_D[0..63][17]
DDR_B_MA[0..15][17]
DDR_B_DQS#[0..7][17]
DDR_B_DQS[0..7][17]
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
U1D @
U1D @
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
HASWELL_MCP_E
HASWELL_MCP_E
DDR CHANNEL B
DDR CHANNEL B
4 OF 19
4 OF 19
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
DDRB_ODT0
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_CLK_DDR#0 [17]
SB_CLK_DDR0 [17]
DDRB_CKE0_DIMMA [17]
DDRB_CKE1_DIMMA [17]
DDRB_CS0_DIMMA# [17]
DDRB_CS1_DIMMA# [17]
T5 @T5 @
DDR_B_RAS# [17]
DDR_B_WE# [17]
DDR_B_CAS# [17]
DDR_B_BS0 [17]
DDR_B_BS1 [17]
DDR_B_BS2 [17]
Rev1p2
Rev1p2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Rev1p2
Rev1p2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
1
C
C
C
of
of
of
642Friday, March 07, 2014
642Friday, March 07, 2014
642Friday, March 07, 2014
5
,
4
3
2
1
RTC/ SATA/ XDP
PCH_RTCX1
1 2
D D
C C
R33 10M_0402_5%R33 10M_0402_5%
Y1
Y1
1 2
32.768KHZ_12.5PF_Q13FC1350000400
32.768KHZ_12.5PF_Q13FC1350000400
1
C3
C3
15P_0402_50V8J
15P_0402_50V8J
2
+RTCVCC
R39 330K_0402_5%R39 330K_0402_5%
R40 330K_0402_5%@R40 330K_0402_5%@
INTVRMEN (+1.05VA)
H：Integrated VRM enable
*
：
Integrated VRM disable
L
12
12
RTC Battery
+RTCVCC +RTCBATT
W=20mils
1
C179
C179
1U_0402_6.3V6K
1U_0402_6.3V6K
2
Safty suggestion remove EE side ,Keep PWR side
PCH_RTCX2
0624A
Need to change symbol
0426A
1
C4
C4
15P_0402_50V8J
15P_0402_50V8J
2
PCH_INTVRMEN
+RTCVCC +RTCVCC
20K_0402_1%
20K_0402_1%
C5
C5
1U_0603_10V6K
1U_0603_10V6K
12
R37
R37
1
JME2
JME2
SHORT PADS
SHORT PADS
1 2
@
@
2
CMOS
12
R36
R36
20K_0402_1%
20K_0402_1%
1
C2
C2
1U_0603_10V6K
1U_0603_10V6K
2
JME1
JME1
SHORT PADS
SHORT PADS
1 2
@
@
ME CMOS
JME2 Short PAD placement to Bottom side.
+RTCVCC
1 2
R35 1M_0402_5%R35 1M_0402_5%
HDA_SDIN0[20]
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
0813A
0502A
T701 @T701 @
T706 @T706 @
PCH_RTCX1
PCH_RTCX2
SM_INTRUDER#
PCH_INTVRMEN
PCH_SRTCRST#
PCH_RTCRST#
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDIN0
HDA_SDOUT
PCH_JTAG_RST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TCK_JTAGX
U1E @
U1E @
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
HASWELL_MCP_E
HASWELL_MCP_E
RTC
RTC
5 OF 19
5 OF 19
JTAG
JTAG
SATA_IREF
RSVD
RSVD
SATALED
J5
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
U1
V6
AC1
A12
L11
K10
C12
U3
EC_SMI#
TS_PRSNC#
PCH_GPIO36
PCH_GPIO37
SATA_RCOMP
PCH_SATALED#
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATAAUDIO
SATAAUDIO
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_RCOMP
SATA_PRX_DTX_N0 [23]
SATA_PRX_DTX_P0 [23]
SATA_PTX_DRX_N0 [23]
SATA_PTX_DRX_P0 [23]
SATA_PRX_DTX_N1 [24]
SATA_PRX_DTX_P1 [24]
SATA_PTX_DRX_N1 [24]
SATA_PTX_DRX_P1 [24]
HDD
mSATA
SATARCompwithin500mils
EC_SMI# [31]
TS_PRSNC# [10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29
PCH_GPIO36 [10]
PCH_GPIO37 [10]
1 2
R43 3.01K_0402_1%R43 3.01K_0402_1%
PCH_SATALED# [10]
+1.05VS_ASATA3PLL
+3VALW_PCH
B B
HDA_SDOUT
ME debug mode,this signal has a weak internal PD
Low = Disabled (Default)
*
High = Enabled [Flash Descriptor Security Overide]
1 2
@
@
R5181 1K_0402_5%
R5181 1K_0402_5%
HDA_SDOUT
ME_FLASH[31]
Closed to U1
HDA_SDOUT_AUDIO[20]
HDA_SYNC_AUDIO[20]
HDA_RST_AUDIO#[20]
HDA_BITCLK_AUDIO[20]
68P_0402_50V8J
68P_0402_50V8J
PH/ PD for PCH JTAG
1 2
R53 0_0402_5%R53 0_0402_5%
1
C5211
C5211
@EMI@
@EMI@
2
RP14
RP14
1 8
2 7
3 6
4 5
33_8P4R_5%
33_8P4R_5%
EMI@
EMI@
EMI
HDA_SDOUT
HDA_SYNC
HDA_RST#
HDA_BIT_CLK
Rev1p2
Rev1p2
RF
HDA_BIT_CLK
12
RA38
A A
0815A
1 2
R86 51_0402_5%@R86 51_0402_5%@
PCH_JTAG_TCK
5
RA38
33_0402_5%
33_0402_5%
@EMI@
@EMI@
CA79
CA79
22P_0402_50V8J
22P_0402_50V8J
@EMI@
@EMI@
EMI
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
1
of
of
of
742Friday, March 07, 2014
742Friday, March 07, 2014
742Friday, March 07, 2014
C
C
C
5
CLK/ SPI/ SMBUS
4
3
2
1
3
3
R133
R133
2.2K_0402_5%
2.2K_0402_5%
1 2
+3VALW_PCH
1
XTAL24_IN
XTAL24_OUT
C7
C7
18P_0402_50V8J
18P_0402_50V8J
1
2
PCH_SMB_DATA [24,27,29,30]
PCH_SMB_CLK [24,27,29,30]
EC_SMB_CK2 [29,31]
EC_SMB_DA2 [29,31]
of
of
of
842Friday, March 07, 2014
842Friday, March 07, 2014
842Friday, March 07, 2014
C
C
C
R87 1M_0402_5%R87 1M_0402_5%
HASWELL_MCP_E
4
HASWELL_MCP_E
CLOCK
CLOCK
SIGNALS
SIGNALS
6 OF 19
6 OF 19
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_WP#
PCH_SPI_HOLD#
PCH_SPI_MOSI
PCH_SPI_WP#
PCH_SPI_MISO
PCH_SPI_HOLD#
+3VM
1
2
+3VM
AU14
AW12
AY12
AW11
AV12
AA3
Y7
Y4
AC2
AA2
AA4
Y6
AF1
C8
C8
0.1U_0402_16V4Z
0.1U_0402_16V4Z
XTAL24_IN
XTAL24_OUT
RSVD
RSVD
DIFFCLK_BIASREF
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
Rev1p2
Rev1p2
U1G @
U1G @
LAD0
LAD1
LAD2
LAD3
LFRAME
SPI_CLK
SPI_CS0
SPI_CS1
SPI_CS2
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3
LPC
LPC
SPI C-LINK
SPI C-LINK
Security ROM
A25
XTAL24_IN
B25
XTAL24_OUT
K21
M21
C26
XCLK_BIASREF
C35
C34
AK8
AL8
AN15
CLKOUT_LPC0
AP15
CLKOUT_LPC1
B35
CLK_BCLK_ITP#
A35
CLK_BCLK_ITP
HASWELL_MCP_E
HASWELL_MCP_E
SMBUS
SMBUS
SML1ALERT/PCHHOT/GPIO73
7 OF 19
7 OF 19
PLT_RST_BUF#[21,22,27,30,31,9]
12
12
12
+1.05VS_AXCK_LCPLL
0628A
1
1
68P_0402_50V8J
68P_0402_50V8J
@EMI@
@EMI@
2
2
CK_LPC_KBC [31]
CLK_PCI_TPM [30]
CLK_PCI_DB [30]
C5213
C5213
1 2
R91 3.01K_0402_1%R91 3.01K_0402_1%
1 2
R5182 10K_0402_5%R5182 10K_0402_5%
1 2
R93 10K_0402_5%R93 10K_0402_5%
1 2
R94 10K_0402_5%R94 10K_0402_5%
1 2
R95 10K_0402_5%R95 10K_0402_5%
R96 33_0402_5%EMI@R96 33_0402_5%EMI@
R97 33_0402_5%EMI@R97 33_0402_5%EMI@
R99 22_0402_5%@R99 22_0402_5%@
T21 @T21 @
T26 @T26 @
C5210
C5210
68P_0402_50V8J
68P_0402_50V8J
@EMI@
@EMI@
RF
SMBALERT/GPIO11
SMBCLK
SMBDATA
SML0ALERT/GPIO60
SML0CLK
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
CL_CLK
CL_DATA
CL_RST
BNFC_IRQ#
AP2
SMBCLK
AH1
SMBDATA
AL2
PCH_GPIO60
AN1
SML0CLK
AK1
SML0DATA
AU4
PCH_GPIO73
AU3
SML1CLK
AH3
SML1DATA
AF2
CL_CLK
AD2
CL_DAT
AF4
CL_RST#
BNFC_IRQ# [10,30]
PCH_GPIO60 [10]
PCH_GPIO73 [10]
CL_CLK [27]
CL_DAT [27]
CL_RST# [27]
AN2
0425A
Rev1p2
Rev1p2
SPI ROM
1st: SA00004MK00
2nd: SA00004ML00
U11
U11
1
NC
2
NC
PLT_RST_BUF#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
3
PROT#
4
GND
PCA24S08D_SO8
PCA24S08D_SO8
8
VCC
7
WP
6
PCH_SMB_CLK
SCL
5
PCH_SMB_DATA
SDA
Compal Secret Data
Compal Secret Data
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
+3VS
1
C91
C91
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Deciphered Date
Deciphered Date
Deciphered Date
2
C6
C6
18P_0402_50V8J
18P_0402_50V8J
1
2
SMBCLK
SMBDATA
SML1DATA
SML1CLK
SML0CLK
SML0DATA
SMBus :SPD/PCIe/Security/TP/NFC
+3VS
0819A
2
6 1
SMBDATA
Q3A
Q3A
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
SMBCLK
3 4
Q3B
Q3B
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
Change Symbol
SML1 Bus :EC/Sensors
2
6 1
SML1CLK
Q2417A
Q2417A
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
SML1DATA
3 4
Q2417B
Q2417B
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
Change Symbol 0819A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
U1F @
D D
12
EMI
PCH_SPI_MOSI_0
PCH_SPI_WP0#
PCH_SPI_MISO_0
PCH_SPI_HOLD0#
PCH_SPI_MOSI_1
PCH_SPI_WP1#
PCH_SPI_MISO_1
PCH_SPI_HOLD1#
PCH_GPIO18
LAN_CLKREQ#
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
WLAN_CLKREQ#
CLK_PCIE_CR#
CLK_PCIE_CR
CR_CLKREQ#
PEG_CLKREQ#
PCH_GPIO23
PCH_GPIO18[10]
LAN_CLKREQ#[10]
1
1
2
2
CLK_PCIE_WLAN#[27]
CLK_PCIE_WLAN[27]
WLAN_CLKREQ#[10,27]
CLK_PCIE_CR#[22]
CLK_PCIE_CR[22]
CR_CLKREQ#[10,22]
PEG_CLKREQ#[10]
PCH_GPIO23[10]
C5214
C5214
68P_0402_50V8J
68P_0402_50V8J
@EMI@
@EMI@
RF
1 2
R106 33_0402_5%EMI@R106 33_0402_5%EMI@
1 2
R107 33_0402_5%SBA@R107 33_0402_5%SBA@
RA39 33_0402_5%@EMI@RA39 33_0402_5%@EMI@
CA80
CA80
22P_0402_50V8J
22P_0402_50V8J
@EMI@
@EMI@
WLAN
Card Reader
C C
PCH_SPI_CLK_R0
PCH_SPI_CLK_R1
C5212
C5212
68P_0402_50V8J
68P_0402_50V8J
@EMI@
@EMI@
SBA - 2 SPI Device = 33 ohm - P/N: SD309330A80
B B
Non-SBA - 1 SPI Device = 15 ohm - P/N: SD300001P00
SPI ROM (8M)
SPI ROM 8MB
1st: SA000039A30 - Winbond
2nd: SA000046400 - E-ON
SPI ROM 4MB
1st: SA00003K820 - Winbond
2nd: SA00004LI00 - E-ON
A A
PCH_SPI_CS0#
PCH_SPI_MISO_0
PCH_SPI_WP0#
U8
U8
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q64FVSSIQ_SO8
W25Q64FVSSIQ_SO8
Need to change symbol
SPI ROM (4M)
U2202
U2202
PCH_SPI_CS1#
PCH_SPI_MISO_1
PCH_SPI_WP1#
5
1
CS#
2
SO
3
WP#
4
GND
W25Q32FVSSIQ SOIC 8P
W25Q32FVSSIQ SOIC 8P
SBA@
SBA@
U1F @
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
LPC_AD0[30,31]
LPC_AD1[30,31]
LPC_AD2[30,31]
LPC_AD3[30,31]
LPC_FRAME#[30,31]
+3VM
1 2
R5001 1K_0402_1%R5001 1K_0402_1%
1 2
R5002 1K_0402_1%R5002 1K_0402_1%
RP4
RP4
1 8
2 7
3 6
4 5
33_8P4R_5%
33_8P4R_5%
RP5
RP5
1 8
2 7
3 6
4 5
33_8P4R_5%
33_8P4R_5%
SBA@
SBA@
0624A
8
VCC
7
HOLD#(IO3)
6
CLK
5
DI(IO0)
0624A
8
VCC
7
HOLD#
6
SCLK
5
SI
Need to change symbol
PCH_SPI_HOLD0#
PCH_SPI_CLK_R0
PCH_SPI_MOSI_0
PCH_SPI_HOLD1#
PCH_SPI_CLK_R1
PCH_SPI_MOSI_1
12
Y2
Y2
24MHZ_12PF_7V24000020
24MHZ_12PF_7V24000020
1
1
GND
GND
2
4
RP13
RP13
1 8
2 7
3 6
4 5
2.2K_0804_8P4R_5%
2.2K_0804_8P4R_5%
1 2
R122 2.2K_0402_5%R122 2.2K_0402_5%
1 2
R123 2.2K_0402_5%R123 2.2K_0402_5%
+3VS
R132
R132
2.2K_0402_5%
2.2K_0402_5%
1 2
5
+3VS
PU 2.2K at EC side (+3VS)
5
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
5
4
3
2
1
PM/ GPIO/ DDI
Note: SUSACK# and SUSWARN# can be tied together if EC does not want to involve
D D
SUSPWRDNACK[10,31]
0620B
C C
PCH_BATLOW# Need pull high to VCCDSW3_3
(If no deep Sx , connect to VCCSUS3_3)
AC_PRESENT_R[31]
in the handshake mechanism for the Deep Sleep state entry and exit.
CAN be NC ,if not support Deep Sx
T115@ T115@
SYS_RESET#[10]
SYS_PWROK[31]
PCH_PWROK[31]
PCH_APWROK[31]
EC_RSMRST#[31]
PBTN_OUT#[31]
PCH_GPIO72[10]
SLP_WLAN#[27]
0807A
+3VALW_PCH
12
R643
R643
10K_0402_5%
10K_0402_5%
AC_PRESENT_R
0628A
R135 0_0402_5%@R135 0_0402_5%@
R146 0_0402_5%SBA@R146 0_0402_5%SBA@
R147 0_0402_5%NOSBA@R147 0_0402_5%NOSBA@
R149
R149
10K_0402_5%
10K_0402_5%
1 2
1 2
1 2
1 2
0620B
T109@ T109@
0620B
SUSACK#_R
SYS_RESET#
SYS_PWROK
PCH_PWROK
PCH_APWROK_R
PLT_RST#
EC_RSMRST#
SUSPWRDNACK
PBTN_OUT#
AC_PRESENT_R
PCH_GPIO72
PM_SLP_S0#
SLP_WLAN#
U1H @
U1H @
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST
AW6
RSMRST
AV4
SUSWARN/SUSPWRDNACK/GPIO30
AL7
PWRBTN
AJ8
ACPRESENT/GPIO31
AN4
BATLOW/GPIO72
AF3
SLP_S0
AM5
SLP_WLAN/GPIO29
1
C2223
C2223
100P_0402_50V8J
100P_0402_50V8J
@EMI@
@EMI@
2
MC74VHC1G08DFT2G_SC70-5
MC74VHC1G08DFT2G_SC70-5
HASWELL_MCP_E
HASWELL_MCP_E
SYSTEM POWER MANAGEMENT
SYSTEM POWER MANAGEMENT
PLT_RST#
8 OF 19
8 OF 19
R155
R155
0_0402_5%
0_0402_5%
2
1
U5
U5
@
@
DPWROK: Tired toghter with RSMRST# that do not support Deep Sx
AW7
DSWVRMEN
DPWROK
WAKE
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
Rev1p2
Rev1p2
12
+3VS
5
P
B
4
Y
12
A
G
R159
3
R159
100K_0402_5%
100K_0402_5%
DSWODVREN
AV5
EC_RSMRST#
AJ5
PCH_PCIE_WAKE#
V5
PCH_GPIO32
AG4
PCH_GPIO61
AE6
SUSCLK
AP5
PM_SLP_S5#
AJ6
PM_SLP_S4#
AT4
PM_SLP_S3#
AL5
PM_SLP_A#
AP4
PM_SLP_SUS#
AJ7
PM_SLP_LAN#
PLT_RST_BUF# [21,22,27,30,31,8]
T110 @T110 @
T112 @T112 @
PCH_PCIE_WAKE# [10]
PCH_GPIO32 [10]
PCH_GPIO61 [10]
PM_SLP_S5# [31]
PM_SLP_S4# [31]
PM_SLP_S3# [31]
PM_SLP_A# [31,32,38]
T117 @T117 @
T118 @T118 @
T119 @T119 @
0620B
DSWODVREN - On Die DSW VR Enable
H：Enable (default)
*
：
Disable
L
DSWODVREN
+RTCVCC
1 2
12
R134
R134
330K_0402_5%
330K_0402_5%
R139
R139
330K_0402_5%
330K_0402_5%
@
@
ESD
B B
HASWELL_MCP_E
eDP SIDEBAND
eDP SIDEBAND
GPIO
GPIO
HASWELL_MCP_E
9 OF 19
9 OF 19
DISPLAY
DISPLAY
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
3
B9
C9
DDI1_CTRL_DATA
D9
DDI2_CTRL_CK
D11
DDI2_CTRL_DATA
C5
B6
B5
A6
C8
A8
D6
Issued Date
Issued Date
Issued Date
DDI1_AUXN
DDI1_AUXP
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
Rev1p2
Rev1p2
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DDI2_CTRL_CK [19]
DDI2_CTRL_DATA [19]
DDI1_AUXN [26]
DDI1_AUXP [26]
DDI1_DP_HPD [26]
DDI2_HDMI_HPD [19]
EDP_HPD [18]
Compal Secret Data
Compal Secret Data
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
DDI1_CTRL_DATA
DDI2_CTRL_DATA
DDI2_CTRL_CK
DDPB_CTRLDATA: Port B Detected
DDPC_CTRLDATA: Port C Detected
1: Port B or C is detected
*
0: Port B or C is not detected
Port have internal PD
1 2
R310 2.2K_0402_5%R310 2.2K_0402_5%
1 2
R311 2.2K_0402_5%R311 2.2K_0402_5%
1 2
R312 2.2K_0402_5%R312 2.2K_0402_5%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
4019P2
4019P2
4019P2
Date: Sheet
Date: Sheet
Date: Sheet
+3VS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
942Friday, March 07, 2014
942Friday, March 07, 2014
1
942Friday, March 07, 2014
C
C
C
of
of
of
U1I @
U1I @
1 2
INVPWM[18,5]
ENBKL[31]
PCH_ENVDD[18]
WLBT_OFF_5#[10,27]
DGPU_PWR_EN[10]
DGPU_HOLD_RST#[10]
WLBT_OFF_51#[10,27]
TS_ON[10,18]
PCH_GPIO52[10]
PCH_GPIO54[10]
PCH_GPIO51[10]
PCH_GPIO53[10]
A A
5
R150 0_0402_5%R150 0_0402_5%
T27@ T27@
EDP_BKCTL
WLBT_OFF_5#
DGPU_PWR_EN
DGPU_HOLD_RST#
WLBT_OFF_51#
TS_ON
PCH_GPIO52
PCH_GPIO54
PCH_GPIO51
PCH_GPIO53
4
B8
A9
C6
U6
P4
N4
N2
AD4
U7
L1
L3
R5
L4
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
GPIO55
GPIO52
GPIO54
GPIO51
GPIO53
5
+3VS
1 8
2 7
3 6
4 5
RP17 10K_8P4R_5%RP17 10K_8P4R_5%
1 8
2 7
+3VALW_PCH
3 6
4 5
RP16 10K_8P4R_5%RP16 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP20 10K_8P4R_5%RP20 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP21 10K_8P4R_5%RP21 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP22 10K_8P4R_5%RP22 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP18 10K_8P4R_5%RP18 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP19 10K_8P4R_5%RP19 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP24 10K_8P4R_5%RP24 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP25 10K_8P4R_5%RP25 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP26 10K_8P4R_5%RP26 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP23 10K_8P4R_5%RP23 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP37 10K_8P4R_5%RP37 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP29 10K_8P4R_5%RP29 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP32 10K_8P4R_5%RP32 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP27 10K_8P4R_5%RP27 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP30 10K_8P4R_5%RP30 10K_8P4R_5%
D D
C C
B B
A A
5
0429A
P_SENSE
PCH_GPIO90
PCH_GPIO92
BNFC_PRSNT#
PCH_GPIO5
P_SENSE2
PCH_GPIO39
PCH_GPIO83
PCH_GPIO76
PCH_GPIO17
PCH_GPIO70
PCH_GPIO68
PCH_GPIO69
PCH_GPIO4
PCH_GPIO94
PCH_GPIO93
PCH_GPIO2
PCH_GPIO91
TS_INT#
PCH_GPIO16
PCH_GPIO71
SERIRQ
HDD_DEVSLP0
KB_RST#
PCH_GPIO85
PCH_GPIO3
PCH_GPIO67
PCH_GPIO59
PCH_GPIO14
PCH_GPIO57
PCH_GPIO13
DOCK_PRSNT#
EC_SCI#
PCH_GPIO54 [9]
0429A
PCH_GPIO37 [7]
PEG_CLKREQ# [8]
SYS_RESET# [9]
WLAN_CLKREQ# [27,8]
CR_CLKREQ# [22,8]
PCH_GPIO32 [9]
WLBT_OFF_51# [27,9]
PCH_GPIO23 [8]
PCH_GPIO18 [8]
TS_ON [18,9]
WLBT_OFF_5# [27,9]
DGPU_PWR_EN [9]
PCH_GPIO52 [9]
PCH_SATALED# [7]
PCH_GPIO53 [9]
PCH_GPIO36 [7]
TS_PRSNC# [11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,34,35,36,37,38,39,4,40,5,7,8,9]
DGPU_HOLD_RST# [9]
SUSPWRDNACK [31,9]
PCH_GPIO43 [11]
PCH_GPIO73 [8]
PCH_GPIO42 [11]
PCH_GPIO41 [11]
PCH_GPIO60 [8]
USB_OC0# [11,27,28]
BNFC_IRQ# [30,8]
0620B
4
+3VS
1 2
R193 10K_0402_5%R193 10K_0402_5%
+3VALW_PCH
1 2
R712 1K_0402_1%R712 1K_0402_1%
MSATA_DEVSLP1
EC_WAKE#
GPIO15 : TLS Confidentiality
1: Intel ME TLS with confidentiality
0: Intel ME TLS with no confidentiality
*
Port have internal PD
DOCK_PRSNT#[26]
EC_WAKE#[31]
EC_SCI#[31]
HDD_DEVSLP0[23]
MSATA_DEVSLP1[24]
SPKR[20]
+3VS
RP1
RP1
4 5
+3VALW_PCH
3 6
2 7
1 8
10K_8P4R_5%
10K_8P4R_5%
1 8
2 7
3 6
4 5
RP33 10K_8P4R_5%RP33 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP15 10K_8P4R_5%RP15 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP31 10K_8P4R_5%RP31 10K_8P4R_5%
1 8
2 7
3 6
4 5
RP35 10K_8P4R_5%RP35 10K_8P4R_5%
R709
R709
10K_0402_5%
10K_0402_5%
4
12
PCH_GPIO89
0807A
PCH_GPIO84
PCH_GPIO88
PCH_GPIO24
PCH_GPIO25
PCH_GPIO27
PCH_GPIO12
PCH_GPIO44
PCH_GPIO58
PCH_GPIO56
PCH_GPIO28
PCH_GPIO45
PCH_GPIO9
PCH_GPIO26
PCH_GPIO76
DOCK_PRSNT#
PCH_GPIO12
EC_WAKE#
PCH_GPIO16
PCH_GPIO17
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
PCH_GPIO26
PCH_GPIO56
PCH_GPIO57
PCH_GPIO58
PCH_GPIO59
PCH_GPIO44
RAM_ID2
RAM_ID1
RAM_ID0
TS_INT#
PCH_GPIO71
PCH_GPIO13
PCH_GPIO14
PCH_GPIO25
PCH_GPIO45
RAM_ID3
PCH_GPIO9
EC_SCI#
HDD_DEVSLP0
PCH_GPIO70
MSATA_DEVSLP1
PCH_GPIO39
SPKR
PCH_GPIO51 [9]
LAN_CLKREQ# [8]
PCH_GPIO72 [9]
PCH_PCIE_WAKE# [9]
PCH_GPIO61 [9]
3
+3VALW_PCH+3VALW_PCH +3VS +3VS
12
R1007
R1007
10K_0402_5%
10K_0402_5%
DDR1@
DDR1@
12
R1008
R1008
10K_0402_5%
10K_0402_5%
DDR1@
DDR1@
U1J @
U1J @
P1
BMBUSY/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
GPIO15
Y1
GPIO16
T3
GPIO17
AD5
GPIO24
AN5
GPIO27
AD7
GPIO28
AN3
GPIO26
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
U4
GPIO48
Y3
GPIO49
P3
GPIO50
Y2
HSIOPC/GPIO71
AT3
GPIO13
AH4
GPIO14
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
AM3
GPIO9
AM2
GPIO10
P2
DEVSLP0/GPIO33
C4
SDIO_POWER_EN/GPIO70
L2
DEVSLP1/GPIO38
N5
DEVSLP2/GPIO39
V2
SPKR/GPIO81
RAM_ID3
GPIO46
0
0
0
0
0
0
0
0
1
1
1
1
12
R1005
R1005
10K_0402_5%
10K_0402_5%
DDR1@
DDR1@
12
R1006
R1006
10K_0402_5%
10K_0402_5%
DDR1@
DDR1@
HASWELL_MCP_E
HASWELL_MCP_E
GPIO
GPIO
RAM_ID2
GPIO471GPIO48 GPIO49
0
0
0
0
1
1
1
1
0
0
00
0
11
1
11
1
1
1
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
12
R1003
R1003
10K_0402_5%
10K_0402_5%
DDR1@
10 OF 19
10 OF 19
DDR1@
12
R1004
R1004
10K_0402_5%
10K_0402_5%
DDR1@
DDR1@
CPU/
CPU/
MISC
MISC
LPIO
LPIO
1.8V rail
RAM_ID2RAM_ID3 RAM_ID1 RAM_ID0
RAM_ID1 RAM_ID0
0
0
01
1
0 MICRON 4GB
11
00
01
0
1
1
1
0
0
0
1
1
00
0
0
1
1
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
12
DDR1@
DDR1@
12
DDR1@
DDR1@
THERMTRIP
RCIN/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD
RSVD
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
Rev1p2
Rev1p2
RAM
HYNIX 4GB
SAMSUNG 4GB
ELPIDA 4GB
SAMSUNG 8GB
ELPIDA 8GB
MICRON 8GB
HYNIX 8GB
TBD
TBD1
TBD
TBD
TBD
TBD
TBD
TBD
Deciphered Date
Deciphered Date
Deciphered Date
2
R1001
R1001
10K_0402_5%
10K_0402_5%
R1002
R1002
10K_0402_5%
10K_0402_5%
D60
V4
T4
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
H_THERMTRIP#
SERIRQ
PCH_OPIRCOMP
PCH_GPIO83
PCH_GPIO84
PCH_GPIO85
PCH_GPIO86
DGPU_PRSNT#
PCH_GPIO88
PCH_GPIO89
PCH_GPIO90
PCH_GPIO91
PCH_GPIO92
PCH_GPIO93
PCH_GPIO94
P_SENSE
P_SENSE2
PCH_GPIO2
PCH_GPIO3
I2C0_SDA_SEN
I2C0_SCL_SEN
I2C1_SDA_TPNL
I2C1_SCL_TPNL
BNFC_PRSNT#
BNFC_ON
PCH_GPIO66
PCH_GPIO67
PCH_GPIO68
PCH_GPIO69
I2C0_SDA_SEN
I2C0_SCL_SEN
I2C1_SDA_TPNL
I2C1_SCL_TPNL
+1.05VS
CHECK Power plane,for VGA thermtrip
12
R179
R179
1K_0402_1%
1K_0402_1%
1 2
R185 49.9_0402_1%R185 49.9_0402_1%
H_THERMTRIP#
1
C1001
C1001
100P_0402_50V8J
100P_0402_50V8J
@EMI@
@EMI@
2
ESD
PCH_GPIO86
GSPI0_MOSI / GPIO86 : Boot BIOS Strap
1: LPC BUS
0: SPI BUS (default)
Port have internal PD
*
PCH_GPIO66
SDIO_D0 / GPIO66 : Top-Block Swap Override
1: Enable
0: Disable
Port have internal PD
*
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
1
GPIO/ LPIO
+3VS
R114 1K_0402_5%R114 1K_0402_5%
R115 1K_0402_5%R115 1K_0402_5%
R117 1K_0402_5%R117 1K_0402_5%
R116 1K_0402_5%R116 1K_0402_5%
KB_RST# [31]
SERIRQ [30,31]
0429A
P_SENSE [18]
P_SENSE2 [30]
I2C0_SDA_SEN [21]
I2C0_SCL_SEN [21]
BNFC_PRSNT# [30]
BNFC_ON [30]
DGPU_PRSNT#
M/B Type
1: UMA
0: dGPU
1 2
R710 1K_0402_1%@R710 1K_0402_1%@
1 2
R711 1K_0402_1%R711 1K_0402_1%
1 2
R189 4.7K_0402_5%@R189 4.7K_0402_5%@
1
12
12
12
12
+3VS
0614A
R707
R707
10K_0402_5%
10K_0402_5%
UMA@
UMA@
1 2
R708
R708
10K_0402_5%
10K_0402_5%
DIS@
DIS@
1 2
10 42Friday, March 07, 2014
10 42Friday, March 07, 2014
10 42Friday, March 07, 2014
+3VS
+3VS
of
of
of
C
C
C
5
4
3
2
1
PCIE/ USB
D D
HASWELL_MCP_E
U1K @
U1K @
F10
PERN5_L0
E10
PERP5_L0
C23
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
C C
PCIE_PRX_DTX_N3[27]
WLAN
Card Reader
USB 2/3 (Docking)
B B
PCIE_PRX_DTX_P3[27]
PCIE_PTX_C_DRX_N3[27]
PCIE_PTX_C_DRX_P3[27]
PCIE_PRX_DTX_N4[22]
PCIE_PRX_DTX_P4[22]
PCIE_PTX_C_DRX_N4[22]
PCIE_PTX_C_DRX_P4[22]
USB3_RX3_N[26]
USB3_RX3_P[26]
USB3_TX3_N[26]
USB3_TX3_P[26]
+1.05VS_AUSB3PLL
1 2
C29 0.1U_0402_16V7KC29 0.1U_0402_16V7K
1 2
C30
C30
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
C31 0.1U_0402_16V7KC31 0.1U_0402_16V7K
1 2
C5241
C5241
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
R235 3.01K_0402_1%R235 3.01K_0402_1%
PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3
PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4
USB3_RX3_N
USB3_RX3_P
USB3_TX3_N
USB3_TX3_P
PCIE_RCOMP
H10
G10
B21
C21
E6
F6
B22
A21
G11
F11
C29
B30
F13
G13
B29
A29
G17
F17
C30
C31
F15
G15
B31
A31
E15
E13
A27
B27
PERN5_L2
PERP5_L2
PETN5_L2
PETP5_L2
PERN5_L3
PERP5_L3
PETN5_L3
PETP5_L3
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4
PETP2/USB3TP4
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
HASWELL_MCP_E
11 OF 19
11 OF 19
PCIe
PCIe
USB3.0 P3 / PCIE P1
USB3.0 P4 / PCIE P2
USB
USB
USB3.0 P1
USB3.0 P2
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
RSVD
RSVD
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
Rev1p2
Rev1p2
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USBRBIAS
R233 22.6_0402_1%R233 22.6_0402_1%
USB_OC0#
PCH_GPIO41
PCH_GPIO42
PCH_GPIO43
1 2
USB20_N0 [28]
USB20_P0 [28]
USB20_N1 [27]
USB20_P1 [27]
USB20_N2 [26]
USB20_P2 [26]
USB20_N3 [27]
USB20_P3 [27]
USB20_N4 [18]
USB20_P4 [18]
USB20_N5 [18]
USB20_P5 [18]
USB20_N6 [21]
USB20_P6 [21]
USB20_N7 [18]
USB20_P7 [18]
USB3_RX1_N [28]
USB3_RX1_P [28]
USB3_TX1_N [28]
USB3_TX1_P [28]
USB3_RX2_N [27]
USB3_RX2_P [27]
USB3_TX2_N [27]
USB3_TX2_P [27]
USB_OC0# [10,27,28]
PCH_GPIO41 [10]
PCH_GPIO42 [10]
PCH_GPIO43 [10]
USB2/3 (Left)
USB2/3 IO (Right)
USB2/3 IO (Docking)
Mini Card(WLAN+BT)
Touch Screen
Camera
Sensor Hub
Digitizer
USB2/3 (Left)
USB2/3 (Right)
CAD note:
Route single-end 50-ohms and max 450-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
1
of
of
of
11 42Friday, March 07, 2014
11 42Friday, March 07, 2014
11 42Friday, March 07, 2014
C
C
C
5
4
3
2
1
Power
HASWELL_MCP_E
+1.35V
D D
+1.05VS
12
R286
R286
10K_0402_5%
10K_0402_5%
VCCST_PG_EC
CAD Note: PU resistor should be close to CPU.
Pull-High at Power side.
1.4A
+CPU_CORE
Define EC OD pin, need double confirm.
+VCCIOA_OUT
VCCSENSE[39]
T38@ T38@
T87@ T87@
SVID ALERT
C C
VR_SVID_ALRT#[39]
SVID DATA
VR_SVID_DAT[39]
+1.05VS
12
R252
R252
75_0402_5%
75_0402_5%
R254
R254
43_0402_1%
43_0402_1%
12
H_CPU_SVIDALRT#
Place the PU resistors close to CPU
+1.05VS
12
R256
0604A
R257
R257
0_0402_5%
0_0402_5%
Place the PU resistors close to CPU
R256
110_0402_5%
110_0402_5%
12
@
@
H_CPU_SVIDDATA
VR_SVID_CLK[39]
VCCST_PG_EC[31]
VR_ON[39]
VGATE[39]
CPU_PWR_DEBUG
0801A
+CPU_CORE
VCCSENSE
+VCCIO_OUT_R
H_CPU_SVIDALRT#
VR_SVID_CLK
H_CPU_SVIDDATA
VCCST_PG_EC
VR_ON
VGATE
CPU_PWR_DEBUG
TBD
+1.05VS
T39@ T39@
T40@ T40@
T41@ T41@
T42@ T42@
T43@ T43@
T44@ T44@
T45@ T45@
T46@ T46@
T47@ T47@
T48@ T48@
T49@ T49@
T50@ T50@
T51@ T51@
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
AC58
AB23
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L59
J58
F59
N58
E63
A59
E20
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
U1L @
U1L @
RSVD
RSVD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCC
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
HASWELL_MCP_E
12 OF 19
12 OF 19
HSW ULT POWER
HSW ULT POWER
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Rev1p2
Rev1p2
+CPU_CORE
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
32A
B B
A A
+1.05VS
R253
R253
150_0402_1%
150_0402_1%
1 2
CPU_PWR_DEBUG
R255
R255
10K_0402_5%
10K_0402_5%
@
@
1 2
For XDP Debug only
+1.35V
C35
C35
C36
C36
C37
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
C37
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
1
2
2
+1.35V @ CRB:
470UF/2V/7343 *2 (Un-mount)
10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C5242
C5242
C38
C38
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
1
2
2
2
C40
C40
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
VDDQ DECOUPLING
C42
C42
C41
C41
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
2
2
C43
C43
C44
C44
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
1
of
of
of
12 42Friday, March 07, 2014
12 42Friday, March 07, 2014
12 42Friday, March 07, 2014
C
C
C
Power
5
4
3
2
1
+RTCVCC
18mA 658mA
+3VM +1.05VM
1
2
+1.05VM
C66
C66
C67
C67
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
22U_0603_6.3V6M
22U_0603_6.3V6M
2
2
C71
C71
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1
C58
C58
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
C63
C63
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
C5244
C5244
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
C83
C83
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
C85
C85
1U_0402_6.3V6K
1U_0402_6.3V6K
2
41mA
42mA
57mA
200mA
31mA
VCCHDA=11mA
VCCDSW3_3= 114mA
Close to AH10
2
C81
C81
1U_0402_6.3V4Z
1U_0402_6.3V4Z
@
@
1
41mA
1
C88
C88
1U_0402_6.3V6K
1U_0402_6.3V6K
2
Close to J17Close to R21
C53
C53
1
1U_0402_6.3V6K
1U_0402_6.3V6K
@
@
2
Close to AH14
2
C75
C75
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
Close to V8
+3VS
1
C82
C82
22U_0603_6.3V6M
22U_0603_6.3V6M
2
+1.05VS_AXCK_LCPLL
+1.05VS
1
C87
C87
1U_0402_6.3V6K
1U_0402_6.3V6K
2
Close to K9, L10Close to M9
C49
C49
C50
C50
1
1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
+1.05VS_AUSB3PLL+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
+3VALW_PCH
T53@ T53@
T55@ T55@
+1.05VS_AXCK_DCB
+3VALW_PCH
1
C78
C78
22U_0603_6.3V6M
22U_0603_6.3V6M
2
Close to AC9,AA9,
AE20,AE21
1838mA
+1.05VS
HASWELL_MCP_E
mPHY
mPHY
OPI
OPI
USB3
USB3
AXALIA/HDA
AXALIA/HDA
VRM/USB2/AZALIA
VRM/USB2/AZALIA
GPIO/LCC
GPIO/LCC
LPT LP POWER
LPT LP POWER
HASWELL_MCP_E
13 OF 19
13 OF 19
RTC
RTC
SPI
SPI
CORE
CORE
THERMAL SENSOR
THERMAL SENSOR
SDIO/PLSS
SDIO/PLSS
SUS OSCILLATOR
SUS OSCILLATOR
USB2
USB2
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
Rev1p2
Rev1p2
AH11
AG10
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
U1M @
U1M @
K9
VCCHSIO
L10
VCCHSIO
M9
VCCHSIO
N8
VCC1_05
P9
VCC1_05
B18
VCCUSB3PLL
B11
VCCSATA3PLL
Y20
RSVD
AA21
VCCAPLL
W21
VCCAPLL
J13
DCPSUS3
AH14
VCCHDA
AH13
DCPSUS2
AC9
VCCSUS3_3
AA9
VCCSUS3_3
AH10
VCCDSW3_3
V8
VCC3_3
W9
VCC3_3
J18
VCCCLK
K19
VCCCLK
A20
VCCACLKPLL
J17
VCCCLK
R21
VCCCLK
T21
VCCCLK
K18
RSVD
M20
RSVD
V21
RSVD
AE20
VCCSUS3_3
AE21
VCCSUS3_3
Only availible on External Suspend VR powered.
DcpSus1= 109mA
DcpSus2= 25mA
DcpSus3= 10mA
DcpSus4= 1mA
+3VALW_PCH
12
R264
R264
0_0603_5%@
0_0603_5%@
1
C51
C51
1U_0402_6.3V6K
1U_0402_6.3V6K
2
+RTCVCC
+VCCRTCEXT
+PCH_VCCDSW
T58 @T58 @
T59 @T59 @
T56 @T56 @
+1.05VS
C76
C76
1
1U_0402_6.3V6K
1U_0402_6.3V6K
2
63/62mA
0604A
1
C52
C52
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C57
C57
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
2
+1.5VS
3mA
+3VS +3VS
17mA
C73
C73
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
+1.05VS +1.05VS_AUSB3PLL
L1
L1
2.2UH_LQM2MPN2R2NG0L_30%
D D
C C
B B
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L2
L2
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L3
L3
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L4
L4
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L5
L5
2.2UH_LQM2MPN2R2NG0L_30%
2.2UH_LQM2MPN2R2NG0L_30%
1 2
1
C59
C59
100U_1206_6.3V6M
100U_1206_6.3V6M
2
1
C65
C65
100U_1206_6.3V6M
100U_1206_6.3V6M
2
1
C5243
C5243
100U_1206_6.3V6M
100U_1206_6.3V6M
@
@
2
1
C84
C84
100U_1206_6.3V6M
100U_1206_6.3V6M
2
1
C86
C86
100U_1206_6.3V6M
100U_1206_6.3V6M
2
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
1
C54
C54
1U_0402_6.3V6K
1U_0402_6.3V6K
2
C62
C62
1U_0402_6.3V6K
1U_0402_6.3V6K
1
@
@
2
<1mA
1
C55
C55
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C61
C61
1U_0402_6.3V6K
1U_0402_6.3V6K
2
C64
C64
1U_0402_6.3V6K
1U_0402_6.3V6K
1741/1632mA
+1.05VS
1
C5245
C5245
10U_0603_6.3V6M
10U_0603_6.3V6M
2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/03/08 2015/03/08
2013/03/08 2015/03/08
2013/03/08 2015/03/08
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
SCHEMATIC, MB AA341
4019P2
4019P2
4019P2
1
of
of
of
13 42Friday, March 07, 2014
13 42Friday, March 07, 2014
13 42Friday, March 07, 2014
C
C
C
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