Compal LA-A141P Schematic

A
1 1
B
C
D
E
Compal Confidential
2 2
LA-A141P Schematics Document
Intel Clover View
2013-03-25
REV: 0.3
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-A141P
LA-A141P
LA-A141P
1 38Tuesday, May 14, 2013
1 38Tuesday, May 14, 2013
1 38Tuesday, May 14, 2013
E
0.3
A
B
C
D
E
VIXJ0
LS-A141P Audio/B LS-A142P PWR/B
A143P Docking/B
LS
System Block Diagram
1 1
P
AZOTEQ
2 2
IQS12800100TSR
Sensor Board
Accelerometer
pass
Com
ST LSM303DLHC
Gyro
ST
ALS
Capella
CM3218
ge 14
Pa
L3G4200D
Page 14
Page 14
roximity(3G OPTION)
I2C_SCL-SENSOR_3P3
C_SDA-SENSOR_3P3
I2
Sensor HUB
STM32F103CBU6TR
Page 14
WLAN/BT conn
Page 16
GPS (OPTION)
M47511IUBG_WLBGA42
BC
Page 26
I2C
5 (P14)
I2S UART SDIO
Clover View
14mmx14mm
2GB LPDDR2 CO-POP
800MHZ
1066Mhz need check with Intel
Samsung
Platfrom Security Storage (OPTION)
3G NGFF(OPTION)
Page 27
3 3
IPJ-P6001-Q2AT_XQFN8_1.6X1.6
USB
Page 28
USB PHY ULPI 1
TI/TUSB1211
Page 18
I2C
2G K3PE0E000A-XGC2
MIPI_DSIX4
HD
MI
I2C 3
MIPI-CSI 0x1 I2C
I2C I2S 3 I2S
eMMC
SDIO Mirco SD
SPI_0 SVID
_PWRGD
Vibrator
C1020B009F
USB Switch
USB
USB PHY
TI/TUSB1211
Page 17
ULPI 0
Page 5~10
PMIC
PMIC_INT EXITSTBY Power rails
MIPI 2LVDS Bridge
Renesas UPD60802A
5
0
SPI
Page 11, 12
I2C 0
HDMI LS + ESD
Page 13
1.3M Camera conn
ge 29
Pa
AUDIO CODEC
Realtek
ALC5640
Page 15
eMMC
Samsung
KLMCG8GE4A
-A
001000
ge 19
Pa
SPI NOR
Winbond W25X40C
4Mbit
Page 20
Page 23
PMIC
TI PSNB5072A1ZNB
Page 31 ~ 33
LVDS
LCD
HDMI conn
ypeD
T
Headphone combo
Jack
Digital Mic X 1
Pa
ge 15
XDP/ITP Debug card
I2C
Touch Screen
Page 21
AC Brick
System VR
3V 5V
Charger
TI/BQ24193
Battery
1S4P 25Whr
Fuel gauge
TI/BQ27541-C2
Page 29
Page 35
Page 34
ro USB2.0
Mic
4 4
CONN
Docking daugher board
A
Audio daugher board
B
Pogo Pin Conn.
C
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-A141P
LA-A141P
LA-A141P
E
2 38Tuesday, May 14, 20 13
2 38Tuesday, May 14, 20 13
2 38Tuesday, May 14, 20 13
0.3
5
Power rail
Net name
DC_IN +V_BATTERY +VBATA +V5A +V3.3A
D D
PMIC B
K
UC
Converter
PMIC LDO
PMIC
C C
PWM output
+V5S +V3.3S +V_VCC +V_VNN +V_VNNAON +V_1P22_VCCAON +V_1P80_AON +V_1P08_VCCAON +V_1P08_VCCAS +V_1P08_VCC +V_1P00_VCCAS +V_1P00_VCCA +V_2P85_1P80_VCCSDIO +V_2P80_VPROG1 +V_2P80_VPROG2 +V_2P85_EMMC1 +V_2P85_EMMC2 +V_1P80_AON +V_1P80_VCCAON +V_1P80_VCC +V_3P30_VCC
Voltage Comment
5V or 12V Max 4.2V
3.4V~4.2V 5V
3.3V 5V
3.3V
0.3~1.2V
0.6~1.2V
0.6~1.2V
1.250V
1.836V
1.08V
1.08V
1.08V
1.025V
1.025V
2.85V
1.2V
1.2V
2.85V
2.85V
1.8V
1.8V
1.8V
3.3V
1.836V is default value
2.85V is default value
1.2V is default value
1.2V is default value
No routing
4
adapter input Battery input It's tablet's "B+" Should be 5VALW Should be 3VALW Should be 5VS Should be 3VS
0.95V is default value
0.95V is default value
0.95V is default value
1.25V is default value
IO MAP
MIPI DSI MIPI CSI
MIPI HSI LPC EMMC
HDMI SDIO
SVID SPI
ULPI
UART
I2S
I2C
3
DeviceInterface
LVDS Bridger NC
X4
1.3M Camera
X1
NC NC EMMC
0
NC
1
HDMI Conn. Micro SD
0
WIFI/BT
1
NC
2
PMIC FLASH ROM/PMIC/XDP
0
XDP
1
Test Point
2
NC
3
External USB/POGO
0
USB 3G (Reserve)
1
WIFI/BT
0
GPS
1
XDP
2
Codec
0
BT PCM
1
NC
2
Codec
3
Panel / Touch screen
0
NC
1
Battery/PSS
2
HDMI
3
1.3M camera
4
Codec / Sensor Hub
5
2
BOM Structure
ME@ ME usage 3G@ for 3G/LTE reservation
NO_XDP@ for XDP function disable
M@ for EMI/ESD/RF Request
AM64@
S SAM32@ SDK64@ SDK32@ GPS@ PSS@ For PPS SKU
RF@ RF request to reseve
for XDP functionXDP@
for SAMSUNG DRAMSAMMEM@ for HYNIX DRAMHYNMEM@
for SAMSUNG 64G eMMC for SAMSUNG 32G eMMC for Sandisk 64G eMMC for Sandisk 32G eMMC For GPS SKU
1
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
5
4
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
3
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-A141P
LA-A141P
LA-A141P
1
3 38Tuesday, May 14, 2013
3 38Tuesday, May 14, 2013
3 38Tuesday, May 14, 2013
of
of
of
0.3
5
4
3
2
1
I2C Routing
Clock Distribution
MB
I2C_0_SCL
AT28
I2C_0_SDA
AN27
+V_1P80_VCCAON
VEL : 1.8V
D D
LE
Level shifter
I2C_0_SCL_LS_TS
U7
I2C_0_SDA_LS_TS
+V3.3S LE
VEL : 3.3V
Panel Touch
Ad
dress:0x50(7bit)
I2
C_1_SCL
AU27
I2C_1_SDA
AT
26
+V_1P80_VCCAON LEVEL : 1.8V
I2
C_2_SCL
AM26
I2C_2_SDA
AV26
C C
Intel Clover Lake
+V_1P80_VCCAON LEVEL : 1.8V
I2
C_3_SCL_HDMI
F8
I2C_3_SDA_HDMI
H4
+V_1P22_VCCAON LEVEL : 1.25V
PSS
Address: 6EH/6FH (7bit)
1
U3
Level shifter
Charger
Address: 0x6B(7bit)
SCL_HDMI_CONN SDA_HDMI_CONN
+5VS LE
VEL : 5V
dress:0x4A(7bit)
Ad
Battery
Address: 0x55(7bit)
SOC
PMIC
OSC_CLK_OUT_0 (19.2MHz)
C_CLK_OUT_1 (6~27MHZ)
OS
OSC_CLK_OUT_2 (6~27MHZ)
OSC_CLK_OUT_3 (19.2MHz)
USB_ULPI_0_REFCLK (19.2MHz)
USB_ULPI_1_REFCLK (19.2MHz)
Y1
Crystal
38.4MHz
SLP_CLKOUT1 (32.768KHz)
SLP_CLKOUT2 (32.768KHz)
Y1201
Crystal 32
.768KHz
Codec
JTAG2_TDI
JTAG2_TCK / 2M Camera
JTAG2_TMS, LVDS bridge
USB PHY
USB PHY
S
GP
WIFI/BT
HDMI
SD/BD
I2
C_4_SCL
AE5
I2C_4_SDA
AF4
+V_1P80_VCCAON
B B
LEVEL : 1.8V
GPS
Crystal
32.768KHz
SD/BD
Crystal 1
2MHz
UB
S
1.3M CAM
Address: 0x36(7bit)
Sensor
Hub
I2C_5_SCL
AF6
I2C_5_SDA
AD
2
+V_1P80_VCCAON LEVEL : 1.8V
Level shifter
CODEC
Address: 0x1C(7bit) Address:
A A
5
U12
4
_5_SCL_LS_3P3
I2C
C_5_SDA_LS_3P3
I2
+V3.3A LEVEL : 3.3V
Sensor Hub
Address: 0x40(7bit)
I2C_SCL_SENSOR_3P3 I2C_SDA_SENSOR_3P3
+3VS
VEL : 3.3V
LE
Gyro
Address: R=0xD3,W=0xD2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROMTHE CUSTODYOF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROMTHE CUSTODYOF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROMTHE CUSTODYOF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZEDBY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZEDBY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZEDBY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY ORDIS CLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTENCONSENT OFCOMPAL ELECTRONICS, INC.
MAY BE USED BY ORDIS CLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTENCONSENT OFCOMPAL ELECTRONICS, INC.
MAY BE USED BY ORDIS CLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTENCONSENT OFCOMPAL ELECTRONICS, INC.
3
G-Sensor
+
E
-Compass
Address: E-Compass R=0x3D,W=0x3C
G-Sensor R=0x33,W=0x32
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
ALS
0x48,0x0C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Sensor/BD
Crystal
2MHz
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
I2C ROUING/Clock Distribution
I2C ROUING/Clock Distribution
I2C ROUING/Clock Distribution
LA-A141P
LA-A141P
LA-A141P
1
4 38Tuesday, May 14, 2013
4 38Tuesday, May 14, 2013
4 38Tuesday, May 14, 2013
0.3
5
1204 Intel recommend to add and reserve for backligh
D D
C218
C218
0.1U_0201_10V6K
0.1U_0201_10V6K
I2C_1_SCL I2C_1_SDA
+V_1P80_VCCAON
1
@
@
2
0_0201_5%
0_0201_5%
1 2
10K_0201_5%
10K_0201_5% R154
R154
@
@
+V3.3A
@
@
R151
R151
1 2
C1 B2
D1 C2
TCA9406YZPR_DSBGA8
TCA9406YZPR_DSBGA8
1
@
@
C215
C215
0.1U_0201_10V6K
0.1U_0201_10V6K
2
@
@
U1710
U1710
Vcca
SDA_B
Vccb SCL_AD2SCL_B SDA_A OE
A1 A2
B1
GND
4
boost chip.
t
I2C_1_SDA_LS [36] I2C_1_SCL_LS [36]
1.3M Camera
3
U1AU1A
W5
MCSI_X4_CLKP
W3
MCSI_X4_CLKN
MCSI_1_CLK_DP
TP1TP1
MCSI_1_CLK_DN
TP2TP2
MCSI_1_DATA_DP
TP3TP3
MCSI_1_DATA_DN
TP4TP4
MCSI_1_CLK_DP[29] MCSI_1_CLK_DN[29] MCSI_1_DATA_DP[29] MCSI_1_DATA_DN[29]
12
MCSI_COMP
R5
R5 150_0201_1%
150_0201_1%
AA5 AA3
Y4
Y2 AA7 AA9
V6
V4 V10
V8
W9 W7
Y8
MCSI_X4_DP0 MCSI_X4_DN0 MCSI_X4_DP1 MCSI_X4_DN1 MCSI_X4_DP2 MCSI_X4_DN2 MCSI_X4_DP3 MCSI_X4_DN3
MCSI_X1_CLKP MCSI_X1_CLKN MCSI_X1_DP MCSI_X1_DN MCSI_COMP
2
@
+V_1P80_VCCAON
@
DISP_BRDG_RESET_N HDMI_EXTR
1 2
R2 10K_0201_5%
R2 10K_0201_5%
M10
MDSI_A_CLKP
M8
MDSI_A_CLKN
N9
MDSI_A_DP0
N7
MDSI_A_DN0
N5
MDSI_A_DP1
N3
MDSI_A_DN1
L5
MDSI_A_DP2
L7
MDSI_A_DN2
K4
MDSI_A_DP3
K2
MDSI_A_DN3
L9
MDSI_COMP
M4
MDSI_C_CLKP
M2
MDSI_C_CLKN
HDMI_CLKP HDMI_CLKN
HDMI_DP0
HDMI_DN0
HDMI_DP1
HDMI_DN1
HDMI_DP2
HDMI_DN2
HDMI_EXTR
RSVD[0]
GP_CORE_037
HDMI_5V_DET
AB4 AD4
D2 E3 B8 D8 C7 A7 B6 C5 H6 G3 J7 E5
GP_MDSI_A_TE GP_MDSI_C_TE
MDSI_A_CLK_DP MDSI_A_CLK_DN MDSI_A_DATA0_DP MDSI_A_DATA0_DN MDSI_A_DATA1_DP MDSI_A_DATA1_DN MDSI_A_DATA2_DP MDSI_A_DATA2_DN MDSI_A_DATA3_DP MDSI_A_DATA3_DN MDSI_COMP TP_MDSI_C_CLK_DP TP_MDSI_C_CLK_DN
HDMI_CLK_DP HDMI_CLK_DN HDMI_DATA0_DP HDMI_DATA0_DN HDMI_DATA1_DP HDMI_DATA1_DN HDMI_DATA2_DP HDMI_DATA2_DN HDMI_EXTR HDMI_SENSE HDMI_HPD HDMI_5V_DET
R6 1M_0201_1%R6 1M_0201_1%
MDSI_COMP
MDSI_A_CLK_DP [11] MDSI_A_CLK_DN [11] MDSI_A_DATA0_DP [11] MDSI_A_DATA0_DN [11] MDSI_A_DATA1_DP [11] MDSI_A_DATA1_DN [11] MDSI_A_DATA2_DP [11] MDSI_A_DATA2_DN [11] MDSI_A_DATA3_DP [11] MDSI_A_DATA3_DN [11]
TP5TP5 TP6TP6
HDMI_CLK_DP [13] HDMI_CLK_DN [13] HDMI_DATA0_DP [13] HDMI_DATA0_DN [13] HDMI_DATA1_DP [13] HDMI_DATA1_DN [13] HDMI_DATA2_DP [13] HDMI_DATA2_DN [13]
12
HDMI_HPD [13]
TP7TP7
1
+V_1P80_VCCAON
R1
R1
1 2
150_0201_1%
150_0201_1%
R3
R3
1 2
2.49K_0201_1%
2.49K_0201_1%
DSI Bridge to LVDS
DISP_BRDG_TE [11] DISP_BRDG_RESET_N [11]
HDMI
10/10, CPU P/N change to SA000061C40- QS
C C
Audio Codec
BT PCM
Audio Codec
1204 Follow Intel's recommand.
+V_1P80_VCCAON
Flash ROM/PMIC/XDP
B B
XDP DEBUG
I2S_0_CLK[15] I2S_0_FS[15]
I2S_0_RXD[15]
I2S_0_TXD[15]
I2S_1_CLK[16] I2S_1_FS[16]
I2S_1_RXD[16]
I2S_1_TXD[16]
I2S_3_CLK[15]
I2S_3_FS[15]
I2S_3_RXD[15]
I2S_3_TXD[15]
1 2
R8 10K_0201_5%R8 10K_0201_5%
SPI_0_CLK[20,31]
SPI_0_SDI[20,31]
SPI_0_SDO[20,31] SPI_0_SS0[20,31]
SPI_1_CLK[21]
SPI_1_SDI[21]
SPI_1_SDO[21] SPI_1_SS0[21] SPI_1_SS1[20] SPI_1_SS2[20] SPI_1_SS3[20] SPI_1_SS4[20]
JACK_DET#[15]
1 2
R7 0_0201_5%R7 0_0201_5%
TP9TP9 TP10TP10 TP11TP11 TP12TP12 TP13TP13
@
@
R108
R108
1 2
0_0201_5%
0_0201_5%
12
R142 49.9_0201_1%R142 49.9_0201_1%
I2S_1_CLK_R
MHSI_CAWAKE
SPI_2_CLK SPI_2_SDI SPI_2_SDO SPI_2_SS0 TP_SPI_2_SS1
11/4, Remove TPM, LPC net
AV28 AM28 AR27 AN29 AT30 AP28 AV30 AR29
AN35
AL35 AT38 AN37 AN33 AK36 AP36
AL33 AM32
D32 D28 B32 C33
E29 F30 B28 E31
N33 N31 N37 P36
D30 B30 H38 K36
E21 F16 G21 E15 D18 D20 E19 C21 B20
T36 U35 T34 T32
K34 M34 M38 M32 M36
L35 K38 L33
J35
K32
U1BU1B
GP_I2S_0_CLK GP_I2S_0_FS GP_I2S_0_RXD GP_I2S_0_TXD
GP_I2S_1_CLK GP_I2S_1_FS GP_I2S_1_RXD GP_I2S_1_TXD
I2S_2_CLK I2S_2_FS I2S_2_RXD I2S_2_TXD
GP_I2S_3_CLK GP_I2S_3_FS GP_I2S_3_RXD GP_I2S_3_TXD
MHSI_ACDATA MHSI_ACFLAG MHSI_ACREADY MHSI_ACWAKE MHSI_CADATA MHSI_CAFLAG MHSI_CAREADY MHSI_CAWAKE MHSI_RCOMP
GP_SPI_0_CLK GP_SPI_0_SDI GP_SPI_0_SDO GP_SPI_0_SS0
GP_SPI_1_CLK GP_SPI_1_SDI GP_SPI_1_SDO GP_SPI_1_SS0 GP_SPI_1_SS1 GP_SPI_1_SS2 GP_SPI_1_SS3 GP_SPI_1_SS4
GP_SPI_2_CLK GP_SPI_2_SDI GP_SPI_2_SDO GP_SPI_2_SS0 GP_SPI_2_SS1
GP_SPI_3_CLK GP_SPI_3_SDI GP_SPI_3_SDO GP_SPI_3_SS0 GP_AON_051
GP_LPC_AD0 GP_LPC_AD1 GP_LPC_AD2 GP_LPC_AD3 GP_LPC_CLKOUT GP_LPC_CLKRUN GP_LPC_FRAME# GP_LPC_RESET# GP_AON_089
GP_CAMERA_SB0 GP_CAMERA_SB1 GP_CAMERA_SB2 GP_CAMERA_SB3 GP_CAMERA_SB4 GP_CAMERA_SB5 GP_CAMERA_SB6 GP_CAMERA_SB7 GP_CAMERA_SB8 GP_CAMERA_SB9
GP_CORE_082
GP_XDP_C0_BPM0# GP_XDP_C0_BPM1# GP_XDP_C0_BPM2# GP_XDP_C0_BPM3# GP_XDP_C1_BPM0# GP_XDP_C1_BPM1# GP_XDP_C1_BPM2# GP_XDP_C1_BPM3#
GP_XDP_PREQ# GP_XDP_PRDY#
GP_XDP_BLK_DP
GP_XDP_BLK_DN
GP_AON_042 GP_AON_043 GP_AON_044
GP_AON_045 GP_XDP_PWRMODE0 GP_XDP_PWRMODE1 GP_XDP_PWRMODE2
GP_AON_049
GP_I2C_0_SCL GP_I2C_0_SDA GP_I2C_1_SCL GP_I2C_1_SDA GP_I2C_2_SCL
GP_I2C_2_SDA GP_I2C_3_SCL_HDMI GP_I2C_3_SDA_HDMI
GP_I2C_4_SCL
GP_I2C_4_SDA
GP_I2C_5_SCL
GP_I2C_5_SDA
PMIC_PWRGOOD
PMIC_RESET#
OSCIN
OSCOUT OSC_CLK0 OSC_CLK1 OSC_CLK2 OSC_CLK3
OSC_CLK_CTRL0 OSC_CLK_CTRL1
GP_COMS_INT0 GP_COMS_INT1 GP_COMS_INT2 GP_COMS_INT3
AV6 AT10 AU7 AV4 AD8 AC5 AB8
GP_CAMERA_SB6
AB2 AB6 AC3 AE7
AK32 AK34 AJ35 AJ33 AJ37 AG33 AH32 AH38 AH36 AG35 AF32 AE37 AF38
1G_MEM_SKU_DET
AF36 AB32
2ND_PHY_SKU_DET
AA33 AE33 AD36 AA37 AE35
AT28 AN27 AU27 AT26 AM26 AV26 F8 H4 AE5 AF4 AF6 AD2
R35 T38
C9 E11 G15 D16 G17 H14 C13 E9
H36 G31 H32 G33
I2S_RESET#
I2C_1_SCL I2C_1_SDA
XTAL_19P2M_IN XTAL_19P2M_OUT
TP15TP15
DISP_STBY# [11]
GPS_RESET# [26]
I2S_RESET# [15]
TP18TP18
CAM_1_PWRDWN [29] CAM_1_RST_N [29]
CLV_KBD_DKIN0 [21] CLV_KBD_DKIN1 [21] CLV_KBD_DKIN2 [21] CLV_KBD_DKIN3 [21] CLV_KBD_MKIN0 [21] CLV_KBD_MKIN1 [21] CLV_KBD_MKIN2 [21] CLV_KBD_MKIN3 [21] CLV_KBD_MKIN4 [21] CLV_KBD_MKIN5 [21] CLV_KBD_MKIN6 [21] CLV_KBD_MKIN7 [21]
DISP_PWR_DOWN [11]
3G_SYS_RST# [27]
CLV_KBD_MKOUT4 [21]
CLV_KBD_MKOUT5 [21] CLV_KBD_MKOUT6 [21] ACPI_PWR_BUTTON [22]
I2C_0_SCL [12]
I2C_0_SDA [12]
I2C_2_SCL [28,34]
I2C_2_SDA [28,34]
I2C_3_SCL_HDMI [13]
I2C_3_SDA_HDMI [13]
I2C_4_SCL [29]
I2C_4_SDA [29]
I2C_5_SCL [14,15]
I2C_5_SDA [14,15]
PMIC_PWRGD [21,31] PMIC_RESET# [31]
TP14TP14
JTAG2_TDO [21]
PMIC_SPI_DEBUG [21,31] WLAN_BT_WAKE# [16]
GPS_SKU_DET[7]
1214 Add 3G_SYS_RST#
LVDS/Touch Screen/Panel
Reserve for backlight boost chip.
Charger/Battery/PSS
HDMI
1.3M camera
Codec/Sensor Hub
OSC_CLK_OUT_0 OSC_CLK_OUT_1 OSC_CLK_OUT_2 OSC_CLK_OUT_3
1
RFA@
RFA@
2
C3
C3
10P_0201_25VJ
10P_0201_25VJ
1G_MEM_SKU_DET 2ND_PHY_SKU_DET
1
1
RFA@
RFA@
C4
C4
10P_0201_25VJ
10P_0201_25VJ
2
2
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
NO_GPS@
NO_GPS@
RFA@
RFA@
C5
C5
10P_0201_25VJ
10P_0201_25VJ
12
R111
C6
C6
10P_0201_25VJ
10P_0201_25VJ
12
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
R111
R139
R139
OSC_CLK_OUT_0 [15] OSC_CLK_OUT_1 [21] OSC_CLK_OUT_2 [21] OSC_CLK_OUT_3 [21]
R109
R109
GPS@
GPS@
R110
R110
1
RFA@
RFA@
2
+V_1P80_VCCAON
12
@
@
12
@
@
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
NO_3G@
NO_3G@
12
R140
R140
3G@
3G@
12
R141
R141
Clover View Has internal PU(20K).
I2C_1_SCL I2C_1_SDA I2C_2_SCL I2C_2_SDA I2C_5_SCL I2C_5_SDA I2C_0_SCL I2C_0_SDA I2C_4_SCL I2C_4_SDA
R19
R19 100K_0201_5%
100K_0201_5%
1 2
1
C1
C1
18P_0201_50V
18P_0201_50V
2
0123 According to vendor test result. Change C1 and C2 into 18pf.
1 2
R9 2.2K_0201_1%@R9 2.2K_0201_1%@
1 2
R10 2.2K_0201_1%@R10 2.2K_0201_1%@
1 2
R11 2.2K_0201_1%@R11 2.2K_0201_1%@
1 2
R12 2.2K_0201_1%@R12 2.2K_0201_1%@
1 2
R13 2.2K_0201_1%@R13 2.2K_0201_1%@
1 2
R14 2.2K_0201_1%@R14 2.2K_0201_1%@
1 2
R15 2.2K_0201_1%@R15 2.2K_0201_1%@
1 2
R16 2.2K_0201_1%@R16 2.2K_0201_1%@
1 2
R17 2.2K_0201_1%@R17 2.2K_0201_1%@
1 2
R18 2.2K_0201_1%@R18 2.2K_0201_1%@
Y1
Y1
1
IN GND4GND
38.4MHz
OUT
Y_8Z38420001_4P
Y_8Z38420001_4P
3 2
+V_1P80_VCCAON
1
C2
C2 18P_0201_50V
18P_0201_50V
2
U1_POP
U1_POP
U1_POP
SAMMEM@
A A
FD1FD1
FD2FD2
1
1
FD4FD4
FD3FD3
1
1
5
SAMMEM@
S IC D2 512M32/1066 K3PE0E000A-XGC2 C38
S IC D2 512M32/1066 K3PE0E000A-XGC2 C38 SA0
SA0
0005GC50
0005GC50
4
U1_POP
HYNMEM@
HYNMEM@
S IC D2 512M32 H9TKNNNBPDARAR-NGM FBGA
S IC D2 512M32 H9TKNNNBPDARAR-NGM FBGA SA0
SA0
0005JM40
0005JM40
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
3
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. CLOVERVIEW (1 OF 6)
CLOVERVIEW (1 OF 6)
CLOVERVIEW (1 OF 6)
LA-A141P
LA-A141P
LA-A141P
1
5 38Tuesday, May 14, 2013
5 38Tuesday, May 14, 2013
5 38Tuesday, May 14, 2013
of
of
of
0.3
5
4
3
2
1
Must Disable internal pull-high for uSD unterface !!
D D
11/28 EMI request to add R332
MicroSD
11/29 R24 follow LTK11 to stuff
WIFI/BT
11/22 BT without RESET request
GPS_UART_RTS#[26]
C C
GPS_UART_CTS#[26]
ULPI USB 0 (external USB)
STIO_0_CD_N[23]
STIO_0_CLK[23]
STIO_0_CMD[23] STIO_0_DATA0[23] STIO_0_DATA1[23] STIO_0_DATA2[23] STIO_0_DATA3[23]
SPI_INT_N[21]
STIO_1_CLK[16]
STIO_1_CMD[16] STIO_1_DATA0[16] STIO_1_DATA1[16] STIO_1_DATA2[16] STIO_1_DATA3[16]
HALL_OUT[21]
TOUCH_INT#[29]
ALS_INT_N[14]
SENSOR_HUB_WAKE[14]
SAR_INT[14]
UART_1_RX_3G[26] UART_1_TX_3G[26]
UART_2_RX[21]
USB_ULPI_0_CLK[17] USB_ULPI_0_DATA0[17] USB_ULPI_0_DATA1[17] USB_ULPI_0_DATA2[17] USB_ULPI_0_DATA3[17] USB_ULPI_0_DATA4[17] USB_ULPI_0_DATA5[17] USB_ULPI_0_DATA6[17] USB_ULPI_0_DATA7[17]
USB_ULPI_0_DIR[17]
USB_ULPI_0_NXT[17]
USB_ULPI_0_REFCLK[17]
USB_ULPI_0_STP[17]
1 2
R332 0_0201_5%R332 0_0201_5%
12
R24 10K_0201_5%R24 10K_0201_5%
COMBO_BT_RESET#
TP17TP17
1 2
R345 0_0201_5%R345 0_0201_5%
GPS_UART_RTS# GPS_UART_CTS#
STIO_0_CLK_R
STIO_0_WP# EMMC_1_CLK_CPU
SAR_INT_R
AD34 AC33 AC35
AA35 AB36
AL5 AK8 AK6 AJ5 AJ7
AG5
AJ9 AH8 AH4 AG9 AG3 AK4
AM2 AP2 AN7 AM4 AN5 AM8
AM6 AP4 AR5 AR3 AU3 AT2
C37
F34
F38
F36 D36
E35
E37
E33 C35
W35
Y36
Y32 W33
V32
Y38 U33
V36
U1CU1C
GP_SD_0_CD# GP_SD_0_CLK GP_SD_0_CMD GP_SD_0_D0 GP_SD_0_D1 GP_SD_0_D2 GP_SD_0_D3 GP_SD_0_D4 GP_SD_0_D5 GP_SD_0_D6 GP_SD_0_D7 GP_SD_0_WP#
GP_SDIO_1_CLK GP_SDIO_1_CMD GP_SDIO_1_D0 GP_SDIO_1_D1 GP_SDIO_1_D2 GP_SDIO_1_D3
SDIO_2_CLK SDIO_2_CMD SDIO_2_D0 SDIO_2_D1 SDIO_2_D2 SDIO_2_D3
GP_AON_062 GP_AON_063 GP_AON_060 GP_AON_061 GP_UART_1_RX GP_UART_1_TX GP_UART_1_RTS GP_UART_2_RX GP_UART_1_CTS
ULPI_0_CLK ULPI_0_D0 ULPI_0_D1 ULPI_0_D2 ULPI_0_D3 ULPI_0_D4 ULPI_0_D5 ULPI_0_D6 ULPI_0_D7 ULPI_0_CDIR ULPI_0_NXT ULPI_0_REFCLK ULPI_0_STP
EMMC_0_CLK
EMMC_0_CMD
EMMC_0_D0 EMMC_0_D1 EMMC_0_D2 EMMC_0_D3 EMMC_0_D4 EMMC_0_D5 EMMC_0_D6 EMMC_0_D7
EMMC_1_CLK
EMMC_1_CMD
EMMC_1_D0 EMMC_1_D1 EMMC_1_D2 EMMC_1_D3 EMMC_1_D4 EMMC_1_D5 EMMC_1_D6 EMMC_1_D7
EMMC_RCOMP
MPTI_CLK
MPTI_D0 MPTI_D1 MPTI_D2 MPTI_D3
ULPI_1_CLK
ULPI_1_D0 ULPI_1_D1 ULPI_1_D2 ULPI_1_D3 ULPI_1_D4 ULPI_1_D5 ULPI_1_D6
ULPI_1_D7 ULPI_1_STP ULPI_1_NXT
ULPI_1_REFCLK
ULPI_1_CDIR
AT18 AP24 AR21 AM20 AP20 AT20 AU19 AL19 AM18 AR17
AN19 AM24 AR23 AU23 AN23 AT22 AL21 AM22 AN21 AL23
AR19 AR7
AU5 AT8 AT6 AP8
AV36 AT32 AR31 AU33 AU31 AU35 AN31 AR35 AT34 AU37 AP32 AT36 AR33
FLSH_RCOMP
EMMC_0_CLK [19] EMMC_0_CMD [19] EMMC_0_DATA0 [19] EMMC_0_DATA1 [19] EMMC_0_DATA2 [19] EMMC_0_DATA3 [19] EMMC_0_DATA4 [19] EMMC_0_DATA5 [19] EMMC_0_DATA6 [19] EMMC_0_DATA7 [19]
TP16TP16
11/5, Del R520
1 2
R25 22_0201_1%R25 22_0201_1%
USB_ULPI_1_CLK [18] USB_ULPI_1_DATA0 [18] USB_ULPI_1_DATA1 [18] USB_ULPI_1_DATA2 [18] USB_ULPI_1_DATA3 [18] USB_ULPI_1_DATA4 [18] USB_ULPI_1_DATA5 [18] USB_ULPI_1_DATA6 [18] USB_ULPI_1_DATA7 [18] USB_ULPI_1_DIR [18]
USB_ULPI_1_NXT [18] USB_ULPI_1_REFCLK [18]
USB_ULPI_1_STP [18]
Those two pins were labeled in error on the SoC and in
the EDS The correct pinout is: ULPI_1_DIR = AU37 ULPI_1_STP = AR33
EMMC
1204 Follow Intel's recommand. Change to 22 ohm
ULPI USB 1 (3G)
12
C8
C8 22P_0402_50V8J
22P_0402_50V8J
RTCXTALIN RTCXTALOUT
B B
Y2
Y2
1 2
32.768KHZ_12.5PF_9H03200019
32.768KHZ_12.5PF_9H03200019
SJ100001K00
SJ100001K00
12
C7
C7 22P_0402_50V8J
22P_0402_50V8J
RTCXTALIN [31] RTCXTALOUT [31]
1221 Change PN to SJ100001K00
Place close to PU1201
Shielding Clip
CLIP3
CLIP3
CLIP4
CLIP1
CLIP1
CLIP2
CLIP2
HOLEA
HOLEA
HOLEA
HOLEA
1
CLIP16
CLIP16 HOLEA
HOLEA
1
1
A A
HOLEA
HOLEA
1
CLIP18
CLIP18 HOLEA
HOLEA
1
CLIP4
CLIP5
CLIP5
HOLEA
HOLEA
HOLEA
HOLEA
1
1
CLIP19
CLIP19
CLIP20
CLIP20
HOLEA
HOLEA
HOLEA
HOLEA
1
5
CLIP7
CLIP7
CLIP6
CLIP6
HOLEA
HOLEA
HOLEA
HOLEA
1
1
1
CLIP8
CLIP8 HOLEA
HOLEA
1
CLIP9
CLIP9 HOLEA
HOLEA
1
CLIP10
CLIP10 HOLEA
HOLEA
1
CLIP11
CLIP11 HOLEA
HOLEA
CLIP12
CLIP12 HOLEA
HOLEA
1
1
4
CLIP13
CLIP13 HOLEA
HOLEA
1
CLIP14
CLIP14 HOLEA
HOLEA
CLIP15
CLIP15 HOLEA
HOLEA
1
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
3
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. CLOVERVIEW (2 OF 6)
CLOVERVIEW (2 OF 6)
CLOVERVIEW (2 OF 6)
LA-A141P
LA-A141P
LA-A141P
1
6 38Tuesday, May 14, 2013
6 38Tuesday, May 14, 2013
6 38Tuesday, May 14, 2013
of
of
of
0.3
5
4
3
2
1
+V_1P80_VCCAON
12
R26
D D
KSEL_STRAP0 KSEL_STRAP1 KSEL_STRAP2
JTAG_TCK[21] JTAG_TDI[21]
JTAG_TDO[21]
JTAG_TMS[21]
C C
B B
JTAG_TRST_N[21]
THERMTRIP#[31]
+V_1P80_VCCAON
+V_1P22_VCCAON
TP21TP21
TP24TP24 TP22TP22 TP26TP26 TP23TP23
1 2
R45 10K_0201_5%@R45 10K_0201_5%@
1 2
R49 49.9_0201_1%R49 49.9_0201_1%
1 2
R50 1K_0201_5%R50 1K_0201_5%
1 2
R52 1K_0201_5%R52 1K_0201_5%
1 2
R54 240_0201_1%R54 240_0201_1%
1 2
R55 240_0201_1%R55 240_0201_1%
TP32TP32
THRMDA0_R THRMDC0_R THRMDA1_R THRMDC1_R
M0_RPUEXT M0_SPDEXT M0_SPUEXT
ZQ-A ZQ-B
CLV_RESETOUT_N
R26 10K_0201_5%
10K_0201_5%
12
R35
R35 10K_0201_5%
10K_0201_5%
@
@
AT24 AR25 AN25
AV20 AM38
B14 D14 J17 E13 E17
B16
V26 U25 V20 U21
B18 E27
F28
D4
G35
F4
U1DU1D
JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST#
IERR#
RSVD[12] RSVD[14] RSVD[13] RSVD[15]
THERMTRIP# RSVD[8]
RSVD[9]
RSVD[3] RSVD[4]
M_RCOMP0 M_RCOMP1 M_RCOMP2
ZQ_A ZQ_B
RESETOUT#
12
12
R27
R27 10K_0201_5%
10K_0201_5%
@
@
R36
R36 10K_0201_5%
10K_0201_5%
@
@
12
R28
R28 10K_0201_5%
10K_0201_5%
@
@
12
R37
R37 10K_0201_5%
10K_0201_5%
@
@
GP_UART_2_TX
GP_SDIO_1_PWR
GP_SDIO_2_PWR
GP_EMMC_0_RST# GP_EMMC_1_RST#
GP_UART_0_RX
GP_UART_0_TX GP_UART_0_CTS GP_UART_0_RTS
GPIO_RCOMP18 GPIO_RCOMP30
GP_CORE_068 GP_CORE_067 GP_CORE_069 GP_CORE_072
GP_CORE_071 GP_CORE_070
PROCHOT#
GP_AON_093 GP_AON_094
GP_AON_072
GP_AON_076 GP_AON_077 GP_AON_078 GP_AON_079
GP_CORE_012
GP_SD_0_PWR
GP_CORE_015 GP_CORE_016 GP_CORE_017 GP_CORE_018
GP_CORE_020
GP_CORE_030 GP_CORE_031 GP_CORE_032 GP_CORE_033 GP_CORE_073 GP_CORE_074 GP_CORE_075
+V_1P80_VCCAON
12
R32
R32
2.2K_0201_1%
2.2K_0201_1%
FW_STRAP0 FW_STRAP1 FW_STRAP2
FW_STRAP0 is also used to detect XDP_PRESENT#, need to connect to XDP connector pin 60
D12
KSEL_STRAP2
G19 B12
KSEL_STRAP0
C17
FW_STRAP2
U37 B10 AC7 D10 H16 H20
AW37 AM34 AP38
H12 G13
F10
J37 J33
AP16 AR15 AV16 AT14
AM16 AN17 AR13 AT16 AP12 AN15 AV14 AR11 AU15 AV12 AN13 AM14 AV8 AN11 AR9 AM12 AM10 AU11 AN9 K6 J5 J9
AL3 AL7
HFPLLN
HFPLLC
HFPLLS
KSEL_STRAP1
FW_STRAP1
USB_PHY0_RST#_R
GPS_WAKEUP
STIO_0_PWR_R
SUS_STAT#
STIO_2_PD_R
MODEM_PWR_ON
EMMC_GPO_RST1
GPIO_RCOMP18
GPIO_RCOMP30
34.8_0603_1%
34.8_0603_1%
RSVD[6] RSVD[5] RSVD[7]
RSVD[1]
RSVD[2]
RSVD[10] RSVD[11]
12
R38
R38
2.2K_0201_1%
2.2K_0201_1%
@
@
1 2
R44 0_0201_5%R44 0_0201_5%
11/4, Delete net TPM_PWREN
R56
R56
TP25TP25
TP27TP27
TP28TP28
1 2
R46 0_0201_5%R46 0_0201_5%
GPS_WAKEUP [26]
1 2
R51 0_0201_5%R51 0_0201_5%
1 2
R53 0_0201_5%@R53 0_0201_5%@
TP30TP30
TP33TP33
12
12
R57
R57 51_0201_1%
51_0201_1%
12
12
R33
R33
2.2K_0201_1%
2.2K_0201_1%
@
@
R39
R39
2.2K_0201_1%
2.2K_0201_1%
@
@
12
R34
R34
2.2K_0201_1%
2.2K_0201_1%
@
@
12
R40
R40
2.2K_0201_1%
2.2K_0201_1%
@
@
FW_STRAP0 [21]
PROCHOT_N [31]
CHG_INT# [34] MSIC_BATT_ALRT [34]
Need power confirm battery spec.
DBG_UART_2_TX [21]
GPS_SKU_DET [5]
USB_PHY0_RST# [17]
STIO_0_PWR [23] COMBO_BT_EN [16]
11/22 015, 018 cancel NFC control
ULPI1_CS_R [18]
TP45TP45
MODEM_PWR_ON [27]
EMMC_GPO_RST0 [19]
UART_0_RX [16]
UART_0_TX [16]
UART_0_CTS [16]
UART_0_RTS [16]
GPS_UART_RXD [26]
GPS_UART_TXD [26] TOUCH_RST# [29]
COMBO_BT_WAKEUP [16] COMBO_WLAN_EN [16] ULPI0_CS [17]
+V_1P22_VCCAON
HFPLLN HFPLLC HFPLLS
USB_SPH_OC#
WIFI/BT
GPS
12
R29
R29 100_0201_1%
100_0201_1%
@
@
12
R41
R41 100_0201_1%
100_0201_1%
@
@
1 2
R48 10K_0201_5%R48 10K_0201_5%
12
12
R30
R30 100_0201_1%
100_0201_1%
@
@
R42
R42 100_0201_1%
100_0201_1%
@
@
12
R31
R31 100_0201_1%
100_0201_1%
@
@
12
R43
R43 100_0201_1%
100_0201_1%
@
@
+V_1P80_VCCAON
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
5
4
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
3
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. CLOVERVIEW (3 OF 6)
CLOVERVIEW (3 OF 6)
CLOVERVIEW (3 OF 6)
LA-A141P
LA-A141P
LA-A141P
1
7 38Tuesday, May 14, 2013
7 38Tuesday, May 14, 2013
7 38Tuesday, May 14, 2013
of
of
of
0.3
5
+V_1P08_VCC_SOC +V_1P08_VCCAON_SOC
+V_1P08_VCC
R58
R58 0_0402_5%
0_0402_5%
1 2
D D
1
1
C9
0.47U_0201_6.3V6KC90.47U_0201_6.3V6K
2
1
C10
C10
C11
C11
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C12
C12
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C13
C13
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C14
C14
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
@
@
C19
C19
C16
C16
C15
C15
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
4
+V_1P08_VCCAON
R59
R59 0_0402_5%
0_0402_5%
1 2
3
+V_1P80_VCCAON_SOC+V_1P80_VCCAON
R60
R60 0_0402_5%
1
1
C29
C29
C18
C18
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
0_0402_5%
1 2
1
2
1
1
C22
C20
C20
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
C22
C21
C21
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
C24
C24
C23
C23
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C26
C26
C25
C25
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
1
1
C28
C28
C27
C27
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
2
+V_2P85_1P80_VCCSDIO
1
1
C31
C31
C30
C30
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
1
C32
C32
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
C17
C17
C33
C33
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
R61
R61 0_0402_5%
0_0402_5%
1 2
1
+V_2P85_1P80_VCCSDIO_SOC
1
1
C34
C34
C35
C35
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
U1EU1E
R67
R67 0_0402_5%
0_0402_5%
1 2
AK28
VCC108[0]
AL27
VCC108[1]
W23
VCC108[2]
W21
VCC108[3]
J15
VCC108AON_OSC
AA21
VCC108[4]
AA23
VCC108[5]
AA25
VCC108[6]
AB12
VCC108[7]
AB22
VCC108[8]
AB24
VCC108[9]
AC11
VCC108[10]
AC21
VCC108[11]
AC23
VCC108[12]
AC25
VCC108[13]
AD12
VCC108[14]
AE11
VCC108[15]
N11
VCC108[16]
N17
VCC108[17]
K28
VCC108[18]
L29
VCC108[19]
AA29
VCC108AON_SRAM
AB30
VCC108AS[0]
F32
VCC108AS[1]
AW33
VCC122_180AON_I2C
G39
VCC122_180AON_I2S[0]
AL39
VCC122_180AON_I2S[1]
AL25
VCC122AON_MCLK[0]
AK30
VCC122AON_MCLK[1]
AW11
VCC122AON[0]
AF2
VCC122AON[1]
L1
VCC122AON[2]
N1
VCC122AON[3]
G9
VCC122AON[4]
H18
VCC122AON[5]
J39
VCC122AON[6]
L39
VCC122AON[7]
AM30
VCC122AON[8]
AV22
VCC180AON[0]
AV24
VCC180AON[1]
AW23
VCC180AON[2]
A9
VCC180AON[3]
A11
VCC330
AC29
VNNAON[0]
AF28
VNNAON[1]
AF30
VNNAON[2]
AJ11
VNNAON[3]
AL17
VNNAON[4]
J11
VNNAON[5]
K10
VNNAON[6]
K30
VNNAON[7]
N29
VNNAON[8]
R29
VNNAON[9]
U29
VNNAON[10]
W11
VNNAON[11]
W29
VNNAON[12]
1
2
VCCA100_CPUPLL[0] VCCA100_CPUPLL[1]
VCCA100AS_USBPLL
VCCA100AS_LFHPLL
VCCA100_DPHYPLL
1
C89
C89
C88
C88
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
C90
C90
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
+V_1P08_VCCAS +V_1P08_VCCAS_SOC
R63
R63 0_0402_5%
0_0402_5%
1 2
1
C45
C45
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C46
C46
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
+V_1P08_VCC_SOC
+V_1P08_VCCAON_SOC
+V_1P08_VCC_SOC
+V_1P08_VCCAON_SOC
+V_1P08_VCCAS_SOC
+V_1P80_VCCAON_SOC
C C
+V_3P30_VCC +V_3P30_VCC_SOC
R64
R64 0_0402_5%
0_0402_5%
1 2
1
C52
C52
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
+V_1P22_VCCAON_SOC
+V_1P80_VCCAON_SOC
+V_3P30_VCC_SOC
+V_VNNAON_SOC
B B
+V_VNNAON +V_VNNAON_SOC
R66
R66 0_0402_5%
0_0402_5%
1 2
1
@
@
C79
C79
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C80
C80
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
C81
C81
2
1
@
@
@
@
C82
C82
C83
C83
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C84
C84
2
1
@
@
C85
C85
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
+V_1P80_AON +V_1P80_AON_SOC
1
C87
C87
C86
C86
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
VCC180AON[4] VCC180AON[5] VCC180AON[6] VCC180AON[7] VCC180AON[8]
VCC180AON[9] VCC180AON[10] VCC180AON[11] VCC180AON[12] VCC180AON[13]
VCCA100_HFHPLL
VCCA100_DSIPLL
VCCA100[0] VCCA100[1]
VCCA100AS
VCCSDIO
VDD1[0] VDD1[1] VDD1[2] VDD1[3] VDD1[4] VDD1[5]
VDD2[0] VDD2[1] VDD2[2] VDD2[3] VDD2[4] VDD2[5] VDD2[6] VDD2[7] VDD2[8]
VDD2[9] VDD2[10] VDD2[11] VDD2[12] VDD2[13]
C91
C91
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
AW13 AW15 AJ1 E1 F2 A21 AA39 AC39 N39 W39
A19 A27 G27 K18 H26 J27 L19
V14 T26
F6 AK2 AN39
AV18 AE1 A29 C1 C3
AW25 AW17 AW5 AW7 AG1 AH2 A3 B4 A35 B36 V38 AK38 AV34 AW35
+V_1P22_VCCAON
1
1
C93
C93
C92
C92
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C94
C94
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1 2
1
C95
C95
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
+V_1P80_VCCAON_SOC
+V_1P00_VCCA_SOC
+V_1P00_VCCAS
+V_1P00_VCCA_SOC
+V_1P00_VCCAS +V_2P85_1P80_VCCSDIO_SOC +V_1P80_AON_SOC
+V_1P22_VCCAON_SOC
+V_1P22_VCCAON_SOC
R65
R65 0_0402_5%
0_0402_5%
1
C55
C55
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C97
C97
C96
C96
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
0.47U_0201_6.3V6K
2
1
C49
C49
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
2
1
1
1
C57
C57
C56
C56
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
+V_1P00_VCCA_SOC+V_1P00_VCCA
R62
R62 0_0402_5%
0_0402_5%
1 2
1
C38
C38
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
C40
C40
C39
C39
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C41
C41
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C42
C42
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C43
C43
C44
C44
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
+V_1P00_VCCAS
1
1
C48
C48
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C50
C50
C51
C51
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
TOP Side_close U1
C58
C59
C59
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
C61
C61
C60
C60
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
1
C58
1
1
C63
C63
C62
C62
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
1
C65
C65
C64
C64
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
C66
C66
C67
C67
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C68
C68
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
@
@
C36
C36
2
1
@
@
C37
C37
C47
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
C47
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
+V_1P22_VCCAON_SOC
1
C69
C69
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
@
@
C71
C71
C70
C70
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C72
C72
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C73
C73
C74
C74
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C76
C76
C75
C75
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C78
C78
C77
C77
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFEREDF ROM THECUSTODY OF THE COMPETENT DIVISION OF R&D
ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFEREDF ROM THECUSTODY OF THE COMPETENT DIVISION OF R&D
ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFEREDF ROM THECUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHERTHIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHERTHIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHERTHIS SHEET NOR THE INFORMATION IT CONTAINS MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTENCONSENT OF COMPAL ELECTRONICS, INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTENCONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTENCONSENT OF COMPAL ELECTRONICS, INC.
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Custom
Custom
Custom
Compal Electronics, Inc.
CLOVERVIEW (4 OF 6)
CLOVERVIEW (4 OF 6)
CLOVERVIEW (4 OF 6)
LA-A141P
LA-A141P
LA-A141P
8 38Tuesday, May 14, 2013
8 38Tuesday, May 14, 2013
1
8 38Tuesday, May 14, 2013
of
of
of
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
0.3
5
4
3
2
1
D D
+V_VCC_SOC
1
1
C101
C101
C98
C98
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
+V_VCC
J1
@J1
@
JUMP_43X118
JUMP_43X118
J2
J2
43x39
43x39
1
1
C99
C99
C100
C100
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
0.47U_0201_6.3V6K
2
12
12
@
@
C102
C102
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
TOP Side_close U1
+V_VCC_SOC
C C
1
1
1
C113
C113
C114
C114
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
0.47U_0201_6.3V6K
2
1
C115
C115
C116
C116
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
0.47U_0201_6.3V6K
2
12
12
@
@
C117
C117
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
TOP Side_close U1
SVID_CLKSYNC
TP34TP34
SVID_DIN
TP35TP35
SVID_CLKOUT
TP36TP36
SVID_DOUT
B B
TP37TP37
+V_VCC_SOC
3A 3.8A
12
1A
@
@
21
12
@
@
@
@
C103
C103
C176
C176
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
12
@
@
@
@
C185
C185
C118
C118
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
0.47U_0402_LE_4VX7SM
SVID_CLKSYNC[31] SVID_DIN[31]
SVID_CLKOUT[31] SVID_DOUT[31]
AA19 AA27 AC19 AC27
A23 A25
B22 B24 B26 C23 C25 D22 D24 D26 E23 E25 F22
F24 G23 H22 H24
J21
J23 K22 K24
L21
L23
L25
L27 M20 M22 M24 M26 N19 N21 N23 N25 N27 P20 P22 P26 R19 R21 R23 R27 T22 T24 U19 U23 U27 V22 V24
W19 W27
R33 P38
N35 P32
U1FU1F
VCC[0] VCC[1] VCC[2] VCC[3] VCC[4] VCC[5] VCC[6] VCC[7] VCC[8] VCC[9] VCC[10] VCC[11] VCC[12] VCC[13] VCC[14] VCC[15] VCC[16] VCC[17] VCC[18] VCC[19] VCC[20] VCC[21] VCC[22] VCC[23] VCC[24] VCC[25] VCC[26] VCC[27] VCC[28] VCC[29] VCC[30] VCC[31] VCC[32] VCC[33] VCC[34] VCC[35] VCC[36] VCC[37] VCC[38] VCC[39] VCC[40] VCC[41] VCC[42] VCC[43] VCC[44] VCC[45] VCC[46] VCC[47] VCC[48] VCC[49] VCC[50] VCC[51] VCC[52] VCC[53]
SVID_CLKSYNCH SVID_DIN
SVID_CLKOUT SVID_DOUT
VCC122AON_MEM[0] VCC122AON_MEM[1] VCC122AON_MEM[2] VCC122AON_MEM[3] VCC122AON_MEM[4] VCC122AON_MEM[5] VCC122AON_MEM[6] VCC122AON_MEM[7] VCC122AON_MEM[8]
VCC122AON_MEM[9] VCC122AON_MEM[10] VCC122AON_MEM[11] VCC122AON_MEM[12] VCC122AON_MEM[13] VCC122AON_MEM[14] VCC122AON_MEM[15] VCC122AON_MEM[16] VCC122AON_MEM[17] VCC122AON_MEM[18] VCC122AON_MEM[19] VCC122AON_MEM[20] VCC122AON_MEM[21] VCC122AON_MEM[22] VCC122AON_MEM[23] VCC122AON_MEM[24] VCC122AON_MEM[25] VCC122AON_MEM[26] VCC122AON_MEM[27] VCC122AON_MEM[28] VCC122AON_MEM[29] VCC122AON_MEM[30] VCC122AON_MEM[31] VCC122AON_MEM[32] VCC122AON_MEM[33] VCC122AON_MEM[34] VCC122AON_MEM[35] VCC122AON_MEM[36] VCC122AON_MEM[37]
VNN_VSSSENSE
VNNSENSE
VCC_VSSSENSE
VCCSENSE
A13 A17 A31 A37 A39 AC1 AE39 AJ39 AN1 AR1 AU1 AV10 AW1 AW27 AW3 AW31 AW9 B34 C39 D38 E39 G1 J1 R39 U39 W1 AL29 AW29 AK10 AL1 AA1 Y10 A15 J13 A33 H28 AG39 AH30
AA13 Y14
R25 P24
1A
J3
@J3
@
43x39
43x39
2 1
1A
+V_1P22_VCCAON_SOC
VNNPUSENSE [33] VSSPUSENSE [33]
VCCPUSENSE [33]
+V_1P22_VCCAON+V_1P22_VCCAON_SOC
1
C119
C119
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
+V_1P22_VCCAON_SOC
1
C104
C104
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
C120
C120
C121
C121
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
0.47U_0201_6.3V6K
2
1
1
1
1
1
1
1
C107
C107
C108
C108
C109
C109
C110
C105
C105
C106
C106
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
C122
C122
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
2
@
@
1
1
C123
C123
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
0.47U_0201_6.3V6K
2
1
C124
C124
C125
C125
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
C110
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
2
0.47U_0201_6.3V6K
2
1
C126
C126
C127
C127
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
@
@
C111
C111
C112
C112
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
2
0.47U_0201_6.3V6K
2
1
C128
C128
C129
C129
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
@
@
@
@
C54
C54
C53
C53
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
2
C131
C131
C130
C130
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
C133
C133
C132
C132
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
Power Rail Checklist FFRD Tango
VNN VNNAON VCC VCC108 VCC108AS VCC108AON VCC122_180AON_I2C/I2S
VCC180AON_SRAM
VCC122AON VDD2
VCC122AON_MEM VCCA100
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
5
4
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
3
VCCA100AS VCCSDIO VDD1 VCC330
Compal Secret Data
Compal Secret Data
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
0.47uF x 5
0.47uF x 2
0.47uF x (2 + 6)
0.47uF x 7
0.47uF x 1
0.47uF x 2
2
NA
NA
NA NA NA NA NA
0.47uF x 7 (@2)
0.47uF x 5
0.47uF x 10 (@2)
0.47uF x 7
0.47uF x 2
0.47uF x 2
0.47uF x 12
0.47uF x 25
0.47uF x 14
0.47uF x 7
0.47uF x 3
0.47uF x 2
0.47uF x 10
0.47uF x 1
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
CLOVERVIEW (5 OF 6)
CLOVERVIEW (5 OF 6)
CLOVERVIEW (5 OF 6)
0.47uF x 15 (@10)
0.47uF x 9 (@7)
0.47uF x 12 (@4)
0.47uF x 7
0.47uF x 2
0.47uF x 5 (@3)
0.47uF x 13
0.47uF x 24
0.47uF x 24 (@9)
0.47uF x 7
0.47uF x 5 (@2)
0.47uF x 2 (@2)
0.47uF x 10
0.47uF x 3 (@2)
LA-A141P
LA-A141P
LA-A141P
1
9 38Tuesday, May 14, 2013
9 38Tuesday, May 14, 2013
9 38Tuesday, May 14, 2013
of
of
of
0.3
5
4
3
2
1
D D
+V_VNN_SOC+V_VNN +V_VNN_SOC
3A 3.5A
J4
@J4
@
JUMP_43X118
JUMP_43X118
12
J5
@J5
@
1A
43x39
43x39
2 1
C C
AA15 AA17 AB16 AC15 AC17 AD16 AD18 AE15 AE17 AE19 AE21 AE23 AE25 AE27 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AG13 AG15 AG19 AG23 AG27 AH14 AH16 AH18 AH20 AH22 AH24 AH26
AJ13 AJ15 AJ17 AJ19 AJ21 AJ23 AJ25 AJ27
AW19
U1HU1H
VNN[0] VNN[1] VNN[2] VNN[3] VNN[4] VNN[5] VNN[6] VNN[7] VNN[8] VNN[9] VNN[10] VNN[11] VNN[12] VNN[13] VNN[14] VNN[15] VNN[16] VNN[17] VNN[18] VNN[19] VNN[20] VNN[21] VNN[22] VNN[23] VNN[24] VNN[25] VNN[26] VNN[27] VNN[28] VNN[29] VNN[30] VNN[31] VNN[32] VNN[33] VNN[34] VNN[35] VNN[36] VNN[37] VNN[38] VNN[39] VNN[40] VNN[41]
VNN[42] VNN[43] VNN[44] VNN[45] VNN[46] VNN[47] VNN[48] VNN[49] VNN[50] VNN[51] VNN[52] VNN[53] VNN[54] VNN[55] VNN[56] VNN[57] VNN[58] VNN[59] VNN[60] VNN[61] VNN[62] VNN[63] VNN[64] VNN[65] VNN[66] VNN[67] VNN[68] VNN[69] VNN[70] VNN[71] VNN[72] VNN[73] VNN[74] VNN[75] VNN[76] VNN[77] VNN[78] VNN[79] VNN[80] VNN[81] VNN[82] VNN[83]
AW21 L11 L13 L15 L17 N13 N15 P12 P14 P16 P4 P8 R1 R11 R13 R15 R17 R3 R5 R7 R9 T10 T12 T14 T16 T2 T4 T6 T8 U1 U11 U13 U15 U17 U3 U5 U7 U9 V16 W15 W17 Y16
+V_VNN_SOC
1
C134
B B
C134
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
1
C136
C136
C135
C135
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C138
C138
C137
C137
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
@
@
C140
C140
C139
C139
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
1
C141
C141
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
1
@
@
@
@
C142
C142
C143
C143
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
0.47U_0201_6.3V6K
2
1
1
1
1
1
2
@
@
@
@
@
@
@
C145
C145
C144
C144
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
@
C146
C146
C147
C147
2200P_0201_50V7K
2200P_0201_50V7K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
1
@
@
@
@
C148
C148
C149
C149
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
0.47U_0201_6.3V6K
2
2
AA11 AA31 AB10 AB14 AB18 AB20 AB26 AB28 AB34 AB38 AC13 AC31 AC37
AD10 AD14 AD20 AD22 AD24 AD26 AD28 AD30 AD32 AD38
AE13 AE29
AE31
AF10 AF12 AF34
AG11 AG17 AG21 AG25 AG29 AG31 AG37
AH10 AH12 AH28 AH34
AJ29
AJ31 AK12 AK14 AK16 AK18 AK20 AK22 AK24 AK26
AL11
AL13
AL15
AL31
AL37 AM36 AP10
AP14 AP18 AP22 AP26 AP30 AP34
AR37 AR39 AT12
AU13 AU17 AU21 AU25 AU29 AU39
U1GU1G
A1
VSS[0]
A5
VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14]
AC9
VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25]
AD6
VSS[26] VSS[27] VSS[28]
AE3
VSS[29] VSS[30]
AE9
VSS[31] VSS[32] VSS[33] VSS[34]
AF8
VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42]
AG7
VSS[43] VSS[44] VSS[45] VSS[46] VSS[47]
AH6
VSS[48] VSS[49]
AJ3
VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64]
AL9
VSS[65] VSS[66]
AN3
VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74]
AP6
VSS[75] VSS[76] VSS[77] VSS[78]
AT4
VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85]
VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171]
AU9 AV2 AV32 AV38 AW39 B2 B38 C11 C15 C19 C27 C29 C31 D34 D6 E7 F12 F14 F18 F20 F26 G11 G25 G29 G37 G5 G7 H10 H2 H30 H34 H8 J19 J25 J29 J3 J31 K12 K14 K16 K20 K26 K8 L3 L31 L37 M14 M16 M18 M28 M30 M6 P10 P18 P2 P28 P30 P34 P6 R31 R37 T18 T20 T28 T30 U31 V12 V18 V2 V28 V30 V34 W13 W25 W31 W37 Y12 Y18 Y20 Y22 Y24 Y26 Y28 Y30 Y34 Y6
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
5
4
MAY BE USED BYOR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
3
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. CLOVERVIEW (6 OF 6)
CLOVERVIEW (6 OF 6)
CLOVERVIEW (6 OF 6)
LA-A141P
LA-A141P
LA-A141P
1
10 38Tuesday, May 14, 2013
10 38Tuesday, May 14, 2013
10 38Tuesday, May 14, 2013
of
of
of
0.3
5
D D
C C
+V_1P80_VCCAON_LVDS
DISP_BRDG_CLKSEL
12
R70
R70 100K_0201_5%
100K_0201_5%
@
@
12
R76
R76 100K_0201_5%
100K_0201_5%
12
12
R71
R71 100K_0201_5%
100K_0201_5%
@
@
R77
R77 100K_0201_5%
100K_0201_5%
12
12
R72
R72 100K_0201_5%
100K_0201_5%
@
@
R78
R78 100K_0201_5%
100K_0201_5%
12
12
R73
R73 100K_0201_5%
100K_0201_5%
R79
R79 100K_0201_5%
100K_0201_5%
@
@
4
12
R74
R74 100K_0201_5%
100K_0201_5%
12
R80
R80 100K_0201_5%
100K_0201_5%
@
@
DISP_BRDG_VCSEL_1 DISP_BRDG_VCSEL_0
DISP_BRDG_LANSEL_0 DISP_BRDG_LANSEL_1
3
R68 0_0201_5%R68 0_0201_5%
1 2 1 2
DISP_STBY#[5]
R69 0_0201_5%@R69 0_0201_5%@
DISP_BRDG_RESET_N[5]
DISP_PWR_DOWN[5]
DISP_CLKIN[21]
DISP_BRDG_TE[5]
PWM0_LVDS_BRDG[36]
1 2
R81 10K_0201_5%R81 10K_0201_5% R82 10K_0201_5%R82 10K_0201_5%
1 2
R83 10K_0201_5%R83 10K_0201_5%
1 2 1 2
R84 10K_0201_5%R84 10K_0201_5% R85 10K_0201_5%R85 10K_0201_5%
1 2
R87
R87
1K_0201_5%
1K_0201_5%
DISP_BRDG_STDBY_NDISP_BRDG_RESET_N
DISP_BRDG_STDBY_N
DISP_BRDG_CLKSEL DISP_BRDG_VCSEL_1
DISP_BRDG_VCSEL_0 DISP_BRDG_LANSEL_0
DISP_BRDG_LANSEL_1
R75 0_0201_5%R75 0_0201_5%
1 2
I2C_0_SDA_BRDG_LS I2C_0_SCL_BRDG_LS
DISP_BRDG_TEST_I_0 DISP_BRDG_TEST_I_1 DISP_BRDG_TEST_I_2 DISP_BRDG_TEST_I_3 DISP_BRDG_TEST_I_4
+V_1P80_VCCAON_LVDS
12
12
R88
R88 1K_0201_5%
1K_0201_5%
I2C_0_SCL_BRDG_LS I2C_0_SDA_BRDG_LS
D8
H10
J7 C1 A8 C7
C8 B7
A7 L9 J9 K9 L8
K8 J8 H9
K7 L7
C10
D9
D10
A9 B8
H7 F8 G8 M7
U2A
U2A
RESET_N PD STANBY_N CLKIN CLKSEL VCSEL[1]
VCSEL[0] LANESEL[0]
LANESEL(1) TE INT PWM GPIO[0]
GPIO[1] GPIO[2] GPIO[3]
SDA SCL TEST_I[0]
TEST_I[1] TEST_I[2] TEST_I[3] TEST_I[4]
TEST_O[0] TEST_O[1] TEST_O[2] TEST_O[3]
SA00005ER20
SA00005ER20
BRIDGE
BRIDGE UPD60802
UPD60802
InternalConnect
UPD60802F1-A10-BND_PBGA144
UPD60802F1-A10-BND_PBGA144
12/04, change new PN to SA00005ER20.
o
llow Intel's recommand to change to UPD60802A
F Pin to Pin with 60802F
DRXCP
DRXCN DRXD0P DRXD0N DRXD1P DRXD1N DRXD2P DRXD2N DRXD3P DRXD3N
LTX0CP
LTX0CN LTX0D0P LTX0D0N LTX0D1P LTX0D1N LTX0D2N LTX0D2P LTX0D3P LTX0D3N
LTX1CP
LTX1CN LTX1D0P LTX1D0N LTX1D1P LTX1D1N LTX1D2P LTX1D2N LTX1D3P LTX1D3N
2
MDSI_A_CLK_DP MDSI_A_CLK_DN MDSI_A_DATA0_DP
B3 C3 B4 C4 C2 B2 C5 B5 A3 A2
H2 H3 F2 F3 G2 G3 J2 J3 H1 J1
K4 L4 L2 K2 K3 L3 K5 L5 M3 M4
G9
12
C6
Open
E7
R86
Open Open
R86
M9
10K_0201_5%
10K_0201_5%
MDSI_A_DATA0_DN
MDSI_A_CLK_DP [5] MDSI_A_CLK_DN [5] MDSI_A_DATA0_DP [5] MDSI_A_DATA0_DN [5] MDSI_A_DATA1_DP [5] MDSI_A_DATA1_DN [5] MDSI_A_DATA2_DP [5] MDSI_A_DATA2_DN [5] MDSI_A_DATA3_DP [5] MDSI_A_DATA3_DN [5]
LVDS_CH_1_CLK_P [12] LVDS_CH_1_CLK_N [12] LVDS_CH_1_DATA0_P [12] LVDS_CH_1_DATA0_N [12] LVDS_CH_1_DATA1_P [12] LVDS_CH_1_DATA1_N [12] LVDS_CH_1_DATA2_N [12] LVDS_CH_1_DATA2_P [12] LVDS_CH_1_DATA3_P [12] LVDS_CH_1_DATA3_N [12]
TP38TP38 TP39TP39 TP40TP40 TP41TP41
From SOC(U1)
to LVDS conn.(JLVDS1)
0122 RF request to reserve
LVDS_CH_1_CLK_P
LVDS_CH_1_CLK_N
RF@
RF@
C287
C287
10P_0201_25V8
10P_0201_25V8
1
2
RF@
RF@
1
C286
C286 10P_0201_25V8
10P_0201_25V8
2
1
+V_1P80_VCCAON_LVDS
12
C153 0.1U_0201_6.3V6KC153 0.1U_0201_6.3V6K C155 0.1U_0201_6.3V6KC155 0.1U_0201_6.3V6K
12 12
C150 0.1U_0201_6.3V6KC150 0.1U_0201_6.3V6K C151 0.1U_0201_6.3V6KC151 0.1U_0201_6.3V6K
12
+V_1P80_VCCAON_LVDS
C159 0.1U_0201_6.3V6KC159 0.1U_0201_6.3V6K
C160 0.1U_0201_6.3V6KC160 0.1U_0201_6.3V6K
1
1
B B
+V_1P80_VCCAON_LVDS+V_1P80_VCCAON
R89 0_0603_5%R89 0_0603_5%
1 2
11/5, L1,L2 change footprint
2
2
+V_1P80_VCCAON_LVDS
C161 0.1U_0201_6.3V6KC161 0.1U_0201_6.3V6K
C163 0.1U_0201_6.3V6KC163 0.1U_0201_6.3V6K
1
1
+V_1P80_VCCAON_LVDS
C164 0.1U_0201_6.3V6KC164 0.1U_0201_6.3V6K
1
2
2
2
C165 0.1U_0201_6.3V6KC165 0.1U_0201_6.3V6K
1
C167 4.7U_0402_6.3V6MC167 4.7U_0402_6.3V6M
2
1 2
1 2
C168 2.2U_0402_6.3V6MC168 2.2U_0402_6.3V6M
L1 SUPPRE_ BLM15AX601SN1DL1 SUPPRE_ BLM15AX601SN1D
1 2
C169 0.1U_0201_6.3V6KC169 0.1U_0201_6.3V6K
C170 0.01U_0201_10V7KC170 0.01U_0201_1 0V7K
1
1
2
2
12
L2
SUPPRE_ BLM15AX601SN1DL2SUPPRE_ BLM15AX601SN1D
L1,L2 change PN, follow vendor require
A A
5
4
U2B
U2B
A11
VDDIO
B1
VDDIO
B6
VDDIO
B11
VDDIO
C9
VDDIO
E3
VDDIO
G6
VDDIO
H8
VDDIO
M8
VDDIO
M11
VDDIO
D4
AVDD_1
E4
AVDD_1
J12
AVDD_2
K12
AVDD_2
L12
AVDD_2
F12
AVDD_3
G12
AVDD_3
H11
VSS
E1
VR_RVDD
E2
VR_RVDD
F5
VR_PLLVDD
F4
VR_PLLVDD_LVDS
K1
VDD_PLL_LVDS
L1
VSS_PLL_LVDS
D2
VSSI_1
D3
VSSI_1
F1
VSSI_1
J10
VSSI_2
K10
VSSI_2
L10
VSSI_2
E10
VSSI_3
F10
VSSI_3
G10
VSSI_3
E5
VSS_PLL
M12
VSS
M10
VSS
M6
VSS
M5
VSS
M1
VSS
UPD60802F1-A10-BND_PBGA144
UPD60802F1-A10-BND_PBGA144
BRIDGE
BRIDGE UPD60802
UPD60802
+V_1P80_VCCAON_LVDS
VDD_MIPI VDD_MIPI VDD_MIPI
VDD_LVDS VDD_LVDS VDD_LVDS VDD_LVDS
VR_EDVDD_1 VR_EDVDD_1 VR_EDVDD_1
VR_EDVDD_2 VR_EDVDD_2 VR_EDVDD_2
MIPI_EX12V
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AVDD_3
VSS VSS VSS VSS VSS
A4 D5 E6
H5 H6 G5 M2
J11 K11 L11
E11 F11 G11
A5 A1
A6 A10 A12 B9 B10 B12 C11 C12 D1 D6 D7 D11 D12 E8 E9 E12 F6 F7 F9 G1 G4 G7 H4 H12 J4 J5 J6 K6 L6
C152 0.1U_0201_6.3V6KC152 0.1U_0201_6.3V6K
1 2 1 2
C154 0.1U_0201_6.3V6KC154 0.1U_0201_6.3V6K
+V_1P80_VCCAON_LVDS
1 2
C156 0.1U_0201_6.3V6KC156 0.1U_0201_6.3V6K C157 0.1U_0201_6.3V6KC157 0.1U_0201_6.3V6K
1 2
C158 4.7U_0402_6.3V6MC158 4.7U_0402_6.3V6M
1 2
C162 4.7U_0402_6.3V6MC162 4.7U_0402_6.3V6M
1 2
C166 1U_0201_6.3V6MC166 1U_0201_6.3V6M
1 2
+V_1P80_VCCAON_LVDS
1
RFA@
RFA@
C288
C288
68P_0201_50V
68P_0201_50V
2
3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Custom
Custom
Custom
Compal Electronics, Inc.
LVDS Bridge
LVDS Bridge
LVDS Bridge
LA-A141P
LA-A141P
1
LA-A141P
11 38Tuesday, May 14, 2013
11 38Tuesday, May 14, 2013
11 38Tuesday, May 14, 2013
of
of
of
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
0.3
5
D D
+V_1P80_VCCAON
1
@
@
C178
C178
0.1U_0201_10V6K
I2C_0_SCL[5]
0.1U_0201_10V6K
I2C_0_SDA[5]
C C
B B
A A
2
I2C_0_SCL I2C_0_SDA
0_0201_5%
0_0201_5%
1 2
10K_0201_5%
10K_0201_5% R144
R144
+V3.3S
R114
R114
1 2
C1 B2
D1 C2
TCA9406YZPR_DSBGA8
TCA9406YZPR_DSBGA8
PMIC_BACKLIGHT_EN[31,36]
1
@
@
0.1U_0201_10V6K
0.1U_0201_10V6K
2
U1708
U1708
Vcca Vccb SCL_AD2SCL_B SDA_A OE
4
+V3.3A
1
C172
C172
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
2
1 2
A1 A2
B1
GND
R93 0_0201_5%R93 0_0201_5%
1 2
R95 0_0201_5%@R95 0_0201_5%@
I2C_0_SDA_LS I2C_0_SCL_LS
PMIC_PANEL_EN[31]
C204
C204
SDA_B
2
1
BLK_EN
12
R97
R97
100K_0201_5%
100K_0201_5%
C173
C173
0.1U_0201_10V6K
0.1U_0201_10V6K
U3
U3
A2
VIN_A2
B2
VIN_B2
C2
ON
C1
GND
TPS22924CYZPR_DSBGA6
TPS22924CYZPR_DSBGA6
I2C_0_SCL_LS I2C_0_SDA_LS
R115 0_0201_5%R115 0_0201_5%
R116 0_0201_5% @R116 0_0201_5% @
1 2
R159 0_0201_5%R159 0_0201_5%
1 2
I2C_0_SCL
R118 0_0201_5%R118 0_0201_5%
R120 0_0201_5% @R120 0_0201_5% @
1 2
1 2
I2C_0_SDA
R160 0_0201_5%R160 0_0201_5%
VOUT_A1 VOUT_B1
10K_0201_5%
10K_0201_5%
1 2
1 2
3
+VDD_3P3
A1 B1
2
1
C174
C174
0.1U_0201_10V6K
0.1U_0201_10V6K
1
C175
C175
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
2
+V3.3S
12
12
R112
R112
R113
R113 10K_0201_5%
10K_0201_5%
Do we need to pop R670 & R671? What's the value? Need to check with vender ~ 1210 Check with Intel
@
@
@
@
I2C_0_SCL_LS_EDID
I2C_0_SCL_LS_TS [29]
12/10 Follow Intel recommend
I2C_0_SDA_LS_EDID
I2C_0_SDA_LS_TS [29]
2
R90
R90 0_0402_5%
0_0402_5%
LVDS_CH_1_CLK_N
LVDS_CH_1_CLK_P
1
1
RF@
RF@
C317
C317 10P_0201_25V8
10P_0201_25V8
2
2
1 2
LVDS_CH_1_DATA0_N_R LVDS_CH_1_DATA0_P_R
LVDS_CH_1_DATA1_N_R LVDS_CH_1_DATA1_P_R
LVDS_CH_1_DATA2_N_R LVDS_CH_1_DATA2_P_R
LVDS_CH_1_CLK_N_R LVDS_CH_1_CLK_P_R
LVDS_CH_1_DATA3_N_R LVDS_CH_1_DATA3_P_R
10P_0201_25V8
10P_0201_25V8
RF@
RF@
C318
C318
+VDD_3P3
0123 RF request to reserve
LVDS_CH_1_DATA0_N[11]
LVDS_CH_1_DATA0_P[11]
LVDS_CH_1_DATA1_N[11]
LVDS_CH_1_DATA1_P[11]
LVDS_CH_1_DATA2_N[11]
LVDS_CH_1_DATA2_P[11]
LVDS_CH_1_CLK_N[11]
LVDS_CH_1_CLK_P[11]
LVDS_CH_1_DATA3_N[11]
LVDS_CH_1_DATA3_P[11]
C231
C231
68P_0201_50V
68P_0201_50V
RFA@
RFA@
1
2
68P_0201_50V
68P_0201_50V
1
2
C233
C233
11/4, change power rail
+V3.3S
RFA@
RFA@
C171
C171
C232
C232
68P_0201_50V
68P_0201_50V
0.1U_0201_10V6K
0.1U_0201_10V6K
+Panel PWR
1
RFA@
RFA@
2
1
2
I2C_0_SCL_LS_EDID I2C_0_SDA_LS_EDID
LED6[36] LED5[36] LED4[36] LED3[36] LED2[36] LED1[36]
11/6, DEL R649,R650
NO_3G@
NO_3G@
R191 0_0402_5%
R191 0_0402_5%
1 2
L4115
3G@L4115
3G@
1 2
DLP11TB800UL2L_4P
DLP11TB800UL2L_4P
1 2
R192 0_0402_5%NO_3G@R192 0_0402_5%NO_3G@
NO_3G@
NO_3G@
R193 0_0402_5%
R193 0_0402_5%
1 2
L4116
3G@L4116
3G@
1 2
DLP11TB800UL2L_4P
DLP11TB800UL2L_4P
1 2
R194 0_0402_5%NO_3G@R194 0_0402_5%NO_3G@
NO_3G@
NO_3G@
1 2
R195 0_0402_5%
R195 0_0402_5%
L4117
3G@L4117
3G@
1 2
DLP11TB800UL2L_4P
DLP11TB800UL2L_4P
1 2
R196 0_0402_5%NO_3G@R196 0_0402_5%NO_3G@
NO_3G@
NO_3G@
1 2
R197 0_0402_5%
R197 0_0402_5%
L4118
3G@L4118
3G@
1 2
DLP11TB800UL2L_4P
DLP11TB800UL2L_4P
1 2
R198 0_0402_5%NO_3G@R198 0_0402_5%NO_3G@
NO_3G@
NO_3G@
1 2
R199 0_0402_5%
R199 0_0402_5%
L4119
3G@L4119
3G@
1 2
DLP11TB800UL2L_4P
DLP11TB800UL2L_4P
1 2
R200 0_0402_5%NO_3G@R200 0_0402_5%NO_3G@
34
34
34
34
34
1
ME@
ME@
ACES_88194-3041
ACES_88194-3041
3030GND
29
GND
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
JLVDS1
JLVDS1
LVDS_CH_1_DATA0_N_R
LVDS_CH_1_DATA0_P_R
LVDS_CH_1_DATA1_N_R
LVDS_CH_1_DATA1_P_R
LVDS_CH_1_DATA2_N_R
LVDS_CH_1_DATA2_P_R
LVDS_CH_1_CLK_N_R
LVDS_CH_1_CLK_P_R
LVDS_CH_1_DATA3_N_R
LVDS_CH_1_DATA3_P_R
32 31
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2012/09/20 2014/09/20
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Custom
Custom
Custom
Compal Electronics, Inc.
LVDS CONNECTOR
LVDS CONNECTOR
LVDS CONNECTOR
LA-A141P
LA-A141P
LA-A141P
12 38Tuesday, May 14, 2013
12 38Tuesday, May 14, 2013
1
12 38Tuesday, May 14, 2013
of
of
of
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
0.3
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