Compal LA-A041P V1JB1 UMA SAGE 3G Schematic

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Compal Confidential

Model Name : SAGE 3G

1 1

Compal Project Name : V1JB1 File Name : LA-A041P

Compal Confidential

2 2

V1JB1 UMA M/B Schematics Document

Intel Ivy/Sandy Bridge SFF BGA 1023p Processor /Panther Point 989p PCH / DDR3L Memory Down *8

3 3

2013-03-26

REV:2.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

V1JB1 M/B LA-A041P Schematic

E

1 52Tuesday, March 26, 2013

2.0

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B

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D

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1 1

Fan (PWM)

page 34

eDP Conn.

page 22

eDP

120MHz

Intel

Ivy Bridge ULV

Processor

Memory BUS(DDR3L)

Dual Channel

1.35V DDR3L 1333

DDRIII-ON BOARD

page 11,12

BGA1023

DDRIII-ON BOARD

page 4~10

HDMI Conn.

page 23

100MHz 100MHz

2.7GT/s

2 2

PCI-Express x 8 (PCIE2.0 5GT/s)

port 2

Card Reader

Realtek RTS5209

page 32

port 1

WLAN

On Board WLAN/BT MD222

page 24

SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

mSATA Module

TMDS

port 0,1

page 25

100MHz

SMLink

Intel

Panther Point-M

PCH

989pin BGA

DMI x4FDI x8

1GB/s x4

page 13~21

USBx14

HD Audio

SPI

JEDP1

USB port 3

page 22

Ext. USB3.0 JUSB1

USB20 port 1 USB30 port 2

3.3V 48MHz

3.3V 24MHz

SPI ROM (ME-2MB)

page 13

Touch Screen

PROX SENSOR STM8T143

3 3

Connect to EC

RTC CKT.

page 13

Sub/Board

SMLink1

HSPI

ITE IT 8518

LPC BUS

33MHz

page 28

TPM SLB9655

page 26

Camera1 JCMOS1(FRONT)

USB port 10

page 27

BT - On Board WLAN

USB port 8

page 24

HDA Codec

ALC271X-VB6 SUB/B

Int. Speaker Phone Jack

WLAN Frequency :

802.11b/g/n : 2.412 ~ 2.4835 GHz

802.11a/n : 5.15 ~ 5. 85GHz

Power On/Off CKT.

page 29

DC/DC Interface CKT.

page 34

Power Circuit DC/DC

4 4

page 35~46

A

Sub/Board

ALS CM3218

page 30

ACCEL with E-COMPASS LSM303D

page 30

B

Sensor Hub STM32F

page 30

I2C1

GYRO L3GD20TR

page 30

USB Port 0

BT Frequency :

2.402~2.480 GHz

FSPI

SMBUS1

SPI ROM (BIOS+EC) (4MB)

page 28

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

SMBUS2

C

Battery Charger IC

page 36, 37

WWAN: WCDMA/HSDPA/HSUPA/HSPA+: 850 MHz/900 MHz/1700 MHz(AWS)/1900 MHz/2100 MHz GPRS/EDGE:

Thermal Sensor

page 11

Compal Secret Data

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

850 MHz/900 MHz/1800 MHz/1900 MHz GPS: L1

D

Camera2 JCMOS2(REAR)

USB port 11

page 33

Sub/Board

3G Module MU736

USB port 2

page 31

Sub/Board

Int. MIC

COM_MIC

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

V1JB1 M/B LA-A041P Schematic

Digital MIC

E

page 33

2 52Tuesday, March 26, 2013

0.1

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Voltage Rails

S1

Power Plane Description

VIN

BATT+ Battery power supply (12.6V) N/A N/A N/A

B+

1 1

+CPU_CORE

+VGFX_CORE Core voltage for UMA graphic ON OFF OFF

+1.05VS_VTT

+1.35V

+1.35VS

+0.675VS +0.675VSP to +0.675VS switched power rail for DDR3L terminator

+1.5VS +1.5VSP to +1.5VS power rail for PCH

+1.8VS (+5VALW or +3VALW) to 1.8VS switched power rail for PCH

+3VALW +3VALWP to +3VALW always on power rail

+VCCSUS3_3 +3VALW to +VCCSUS3_3 power rail for PCH ON ON

+3VS

+5VALW

+V5REF_SUS

2 2

+5VS +5VALW to +5VS switched power rail OFFON OFF

+VSB +VSBP to +VSB always on power rail for sequence control ON ON*

+RTCVCC RTC power

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

+1.05VS_VTTP to +1.05VS_VTT switched power rail for CPU

+1.35VP to +1.35V power rail for DDR3L

+1.35V to +1.35VS switched power rail

+3VALW to +3VS power rail

+5VALWP to +5VALW always on power rail

+5VALW to +V5REF_SUS power rail for PCH

S3 S5

N/A N/A N/A

N/AN/AN/A

OFF

ON

ON OFF OFF

ON OFF OFF+1.05VS_PCH +1.05VS_VTT to +1.05VS_PCH power for PCH

ON ON OFF

ON OFF OFF

ON

ON ON

ON

OFF

ON ON*

ON*

OFF

ON ON*

ON*

ONON

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

BOARD ID Table

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address

Device

Smart Battery

Address Address

0001 011X b

PCH SM Bus address

Device Address

ChannelA

ChannelB

3 3

A0A41010 000X

1010 010X

EC SM Bus2 address

Device

Sensor HUB SM Bus address

Device Address

Gyroscope

E-compass + G sensor

ALS sensor

D1 1101 000X b

D3 1101 001X b

33 0011 001X b

0010 000X b21

BOM Config

Sensors List

Connect to Sensor Hub Sensor Hub PCH(USB P3) Sensor Hub EC

4 4

Function

Gyroscope Accel+E-Compass

Device

ST - L3GD20TR

ST - LSM303DLHCTR Sensor Hub ST - STM32F103RCY6TR ALS Capella - CM3218

ST-STM8T143AU62TTRC06Prox

Board ID

0 1 2 3 4 5 6 7

Note :

USB Port Table

USB 2.0 USB 1.1 Port

EHCI1

EHCI2

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

HIGH

LOW LOW LOW LOW

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

PCB Revision

0.1

0.2

0.3

1.0

2.0*

2 External USB Port

0

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

Sensor Hub

1

Ext. USB Connector

2

3G Module - MU736/ME906

3

Touch Screen

4 5 6 7 8

BlueTooth(WLAN Module)

9

Debug Port(Reserve)

10

Camera(Front)

11

Camera(Rear)

12 13

LOWLOWLOW

ON

HIGHHIGHHIGH

HIGH

V typ

AD_BID

ON

OFF

ON

OFF

V

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

BTO Item BOM Structure

Unpop

UMA UMA@ CPU DDR3 DDR3L On Board DRAM Dual Channel DDR 128@

PCH Normal S3 Deep S3 TPM TPM@ Non TPM SKU WOTPM@

Foxconn MD222 Lite-On MD222

For EMI/RF(Unpop) XEMC@ Sensor(Intel F/W) INTEL@ Sensor(ST F/W) ST@

ON ON

ON

LOW

OFF

max

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

BTO Option Table

@ CONN@Connector

IVB@ DDR3@ DDR3L@ X76@

eDP@eDP HM77@ S3@ DS3@

LID@Hall Sensor FOXMD222@ LIONMD222@ EMC@For EMI/RF(Pop)

3G@3G SKU 3GEMC@3G SKU(EMC part)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

V1JB1 M/B LA-A041P Schematic

E

3 52Wednesday, March 13, 2013

0.1

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D

E

+1.05VS_ VTT

12

R532

24.9_040 2_1%

UCPU1A

1 1

DMI_CRX_P TX_N015 DMI_CRX_P TX_N115 DMI_CRX_P TX_N215 DMI_CRX_P TX_N315

DMI_CRX_P TX_P015 DMI_CRX_P TX_P115 DMI_CRX_P TX_P215 DMI_CRX_P TX_P315

DMI_CTX_P RX_N015 DMI_CTX_P RX_N115 DMI_CTX_P RX_N215 DMI_CTX_P RX_N315

DMI_CTX_P RX_P015 DMI_CTX_P RX_P115 DMI_CTX_P RX_P215 DMI_CTX_P RX_P315

FDI_CTX_P RX_N015 FDI_CTX_P RX_N115 FDI_CTX_P RX_N215

2 2

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms should not be left floating ,even if disable eDP function...

+1.05VS_ VTT

12

R118

24.9_040 2_1%

W=4mil,S=15mil,L=500mil

3 3

W=12mil,S=15mil,L=500mil

Add eDP circuit

+1.05VS_ VTT

12

R809

R809 1K_0402 _5%eDP@

1K_0402 _5%eDP@

EDP_HPD #22

EDP_HPD #

FDI_CTX_P RX_N315 FDI_CTX_P RX_N415 FDI_CTX_P RX_N515 FDI_CTX_P RX_N615 FDI_CTX_P RX_N715

FDI_CTX_P RX_P015 FDI_CTX_P RX_P115 FDI_CTX_P RX_P215 FDI_CTX_P RX_P315 FDI_CTX_P RX_P415 FDI_CTX_P RX_P515 FDI_CTX_P RX_P615 FDI_CTX_P RX_P715

FDI_FSYNC015 FDI_FSYNC115

FDI_INT15

FDI_LSYNC015 FDI_LSYNC115

EDP_COM P

EDP_HPD #

EDP_AUX N22 EDP_AUX P22

EDP_TXN 022 EDP_TXN 122

EDP_TXP 022 EDP_TXP 122

UCPU1A

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD#

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

IVY-BRIDGE_BGA1 023

IVB@

CPU P/N:

1.I3-3217 SA00005L5C0:S IC AV8063801058401 SR0N9 L1 1.8G ABO!

2.I5-3317 SA00005K6B0:S IC AV8063801058002 SR0N8 L1 1.7G ABO!

3.I3-2365 SA000051H60:S IC AV8062701047904 SR0CV J1 1.4G ABO!

DMI Intel(R) FDI

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

G3 G1 G4

H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7

K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6

G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4

F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4

PEG_COM P

G3,W=4mil,S=15mil,L=500mil G1,W=12mil,S=15mil,L=500mil G4,W=4mil,S=15mil,L=500mil

UCPU1_B 22

UCPU1_A 19

UCPU1_B 14

UCPU1_A 11 UCPU1_B 10

UCPU1_B 6

T25 PAD@ T25 PAD@

T26 PAD@ T26 PAD@

T27 PAD@ T27 PAD@

T22 PAD@ T22 PAD@ T34 PAD@ T34 PAD@

T39 PAD@ T39 PAD@

UMA only=>PEG NC

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms

PEG_ICOMPO signals should be routed with - max length = 500 milstypical impedance = 14.5 mohms

SAGE 3G PVT For DFB demand

4 4

Security Class ification

2011/06/ 24 2012/06/ 02

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 24 2012/06/ 02

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

V1JB1 M/B LA-A041P Schematic

4 52Wednesd ay, March 13, 20 13

E

0.1

A

B

C

D

E

1 1

PCH->CPU UNCOREPWRGOOD: SM_DRAMPWROK:DRAM power ok RESET#:

都都都都ok後後後後後後後後

CPU

非非非非

CORE

做做做做

reset

外外外外外外外外外外外外

OK

Follow DG 1.2 & CRB1.0

@

C784 0.1U_0201_10V6K

R223 10K_0402_5%R223 10K_0402_5%

12

Follow DG 1.2 & CRB1.0 Use open drain MOS:

Buffered reset to CPU

2 2

PLT_RST#17,26,28,31,32

RESET#:

+3VS

1

NC

2

A

都都都都ok後後後後後後後後

5

P

G

3

H_CPUPWRGD

SAGE 3G

1

2

U15

Y

SN74LVC1G07DCKR_SC70-5

CPU

Processor Pullups follow CRB1.0

+1.05VS_VTT PH pop 75ohm series resister pop 43ohm

+1.05VS_VTT

C396

0.1U_0402_16V4Z

4

BUFO_CPU_RST#

做做做做

reset

H_PROCHOT#28,36

PROC_SELECT# Future platforms,PH VCPLL and connect to PCH DF_TVS

H_SNB_IVB#17

偵偵偵偵偵偵偵偵

CPU

有有有有有有有有有有有有有有有有

XBOX

三三三三三三三三三三三三三三三三

12

H_THRMTRIP#18

H_CPUPWRGD18

H_PM_SYNC15

UNCOREPWRGOOD:

12

R226

R226 75_0402_5%

75_0402_5%

R227

43_0402_1%

1 2

+1.05VS_VTT

R220 62_0402_5%R220 62_0402_5%

BUF_CPU_RST#

SAGE 3G

@

H_CATERR#

T1 PAD@T1 PAD

H_PECI

R216

56_0402_5%

1 2

H_PROCHOT#_RH_PROCHOT#

R80 0_0402_5%

1 2

H_CPUPWRGD_R

@

除除除除除除除除

CPU_CORE

PM_DRAM_PWR GD_R

以以以以以以以以以以以以以以以以

SM_DRAMPWROK:DRAM power ok

BUF_CPU_RST#

UCPU1B

F49

PROC_SELECT#

C57

PROC_DETECT#

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

C48

PM_SYNC

B46

UNCOREPWRGOOD

OK

BE45

SM_DRAMPWR OK

D44

RESET#

IVY-BRIDGE_BGA1023

IVB@

J3

BCLK

MISC THERMAL PWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

BCLK#

PRDY#

PREQ#

TCK TMS

TRST#

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

H2

AG3

CLK_CPU_DPLL

AG1

CLK_CPU_DPLL#

AT30

SM_DRAMRST#

BF44

SM_RCOMP0

BE43

SM_RCOMP1

BG43

SM_RCOMP2

DDR3 Compensation Signals Trace:10mil ,Spacing:13mil, Max.Length:500mil

N53 N55

L56

XDP_TCK

L55

XDP_TMS

J58

XDP_TRST#

M60

XDP_TDI

TDI

L59

XDP_TDO

K58

XDP_DBRESET#

G58 E55 E59 G55 G59 H60 J59 J61

CLK_CPU_DMI 14 CLK_CPU_DMI# 14

CLK_CPU_DPLL 14 CLK_CPU_DPLL# 1 4

SM_DRAMRST# 6H_PECI28

R149 140_0402_1%R149 140_0402_1% R486 25.5_0402_1%R486 25.5_0402_1% R484 200_0402_1%R484 200_0402_1%

12 12 12

T2PAD@ T2PAD@ T3PAD@ T3PAD@ T4PAD@ T4PAD@

T5PAD@ T5PAD@ T6PAD@ T6PAD@

1 2

C102 100P_0402_50V8J

100P_0402_50V8J

XDP_DBRESET# 15

XEMC@C102

XEMC@

For EMI

SAGE 3G

+1.05VS_VTT

CLK_CPU_DPLL#

CLK_CPU_DPLL

Checklist1.0 P.64 Processor Graphis Disable Guide DIS only SKU or UMA eDP disable DPLL_REF_SSCLK PD 1K_5% to GND DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT

XDP_DBRESET#

CRB1.0 PH 1K +3VS Check list 1.0 PH 5K +3VS Check list 1.2 PH 10K +3VS Debug port DG1.1-1.2 50~5K ohm

R116 1K_0402_5%@R 116 1K_0402_5%@

R117 1K_0402_5%@R 117 1K_0402_5%@

R569 1K_0402_5%R569 1K_0402_5%

12

+3VS

12

3 3

Follow DG 1.2 & CRB1.0

0.1U_0402_16V4Z

1 2

VR_ON28,42

SYS_PWROK15

R82 0_0402_5%@R82 0_0402_5%@

R81 0_0402_5%@R81 0_0402_5%@

PM_DRAM_PWR GD15

1 2

C101

+3VALW

1

2

5

U5

2

P

B

Y

1

A

G

MC74VHC1G09DFT2G_SC70-5

3

+1.35VS

12

R88

R88 200_0402_5%

200_0402_5%

4

PM_SYS_PWRGD_BUF PM_DRAM_ PWRGD_R

Use open drain MOS: +1.35VS PH pop 200ohm series resister pop 130ohm

1 2

R97 130_0402_5%R97 130_04 02_5%

SAGE 3G

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(2/7) PM,XDP,CLK

V1JB1 M/B LA-A041P Schematic

E

5 52Wednesday, March 13, 2013

0.1

A

UCPU1C

DDR_A_D[0..63]11

1 1

2 2

3 3

DDR_A_BS011 DDR_A_BS111 DDR_A_BS211

DDR_A_CAS#11 DDR_A_RAS#11 DDR_A_WE#11

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

UCPU1C

AG6

SA_DQ[0]

AJ6

SA_DQ[1]

AP11

SA_DQ[2]

AL6

SA_DQ[3]

AJ10

SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7]

AR11

SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13]

AT13

SA_DQ[14]

AU13

SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17]

BA13

SA_DQ[18]

BB11

SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22]

AY13

SA_DQ[23]

AV14

SA_DQ[24]

AR14

SA_DQ[25]

AY17

SA_DQ[26]

AR19

SA_DQ[27]

BA14

SA_DQ[28]

AU14

SA_DQ[29]

BB14

SA_DQ[30]

BB17

SA_DQ[31]

BA45

SA_DQ[32]

AR43

SA_DQ[33]

AW48

SA_DQ[34]

BC48

SA_DQ[35]

BC45

SA_DQ[36]

AR45

SA_DQ[37]

AT48

SA_DQ[38]

AY48

SA_DQ[39]

BA49

SA_DQ[40]

AV49

SA_DQ[41]

BB51

SA_DQ[42]

AY53

SA_DQ[43]

BB49

SA_DQ[44]

AU49

SA_DQ[45]

BA53

SA_DQ[46]

BB55

SA_DQ[47]

BA55

SA_DQ[48]

AV56

SA_DQ[49]

AP50

SA_DQ[50]

AP53

SA_DQ[51]

AV54

SA_DQ[52]

AT54

SA_DQ[53]

AP56

SA_DQ[54]

AP52

SA_DQ[55]

AN57

SA_DQ[56]

AN53

SA_DQ[57]

AG56

SA_DQ[58]

AG53

SA_DQ[59]

AN55

SA_DQ[60]

AN52

SA_DQ[61]

AG55

SA_DQ[62]

AK56

SA_DQ[63]

BD37

SA_BS[0]

BF36

SA_BS[1]

BA28

SA_BS[2]

BE39

SA_CAS#

BD39

SA_RAS#

AT41

SA_WE#

IVY-BRIDGE_BGA1023

IVB@

Follow CRB1.0

CPU通通DIMM做reset

SM_DRAMRST#5

4.99K_0402_1%

4 4

DRAMRST_CNTRL_PC H14

DRAMRST_CNTRL_EC28

A

1 2

R413 0_0402_5%DS3@R413 0_0402_5%DS3@

SAGE 3G DVT

R79

1 2

C78

.047U_0402_16V7K

S

G

2

1

2

D

13

DIMM_DRAMRST#_RSM_DRAMRST#

Q6

Q6 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

SAGE 3G

B

AU36

SA_CK[0]

AV36

SA_CK#[0]

AY26

SA_CKE[0]

AT40

SA_CK[1]

AU40

SA_CK#[1]

BB26

SA_CKE[1]

BB40

SA_CS#[0]

BC41

SA_CS#[1]

AY40

SA_ODT[0]

BA41

SA_ODT[1]

AL11

SA_DQS#[0]

AR8

SA_DQS#[1]

AV11

SA_DQS#[2]

AT17

SA_DQS#[3]

AV45

SA_DQS#[4]

AY51

SA_DQS#[5]

AT55

SA_DQS#[6]

AK55

SA_DQS#[7]

AJ11

SA_DQS[0]

AR10

SA_DQS[1]

AY11

SA_DQS[2]

AU17

SA_DQS[3]

AW45

SA_DQS[4]

AV51

SA_DQS[5]

AT56

SA_DQS[6]

AK54

SA_DQS[7]

DDR SYSTEM MEMORY A

BG35

SA_MA[0]

BB34

SA_MA[1]

BE35

SA_MA[2]

BD35

SA_MA[3]

AT34

SA_MA[4]

AU34

SA_MA[5]

BB32

SA_MA[6]

AT32

SA_MA[7]

AY32

SA_MA[8]

AV32

SA_MA[9]

BE37

SA_MA[10]

BA30

SA_MA[11]

BC30

SA_MA[12]

AW41

SA_MA[13]

AY28

SA_MA[14]

AU26

SA_MA[15]

+1.35V

12

R66

1K_0402_5%

R63

R63 1K_0402_5%

1K_0402_5%

1 2

S0 DRAMRST_CNTRL_PCH hgih ,MOS ON SM_DRAMRST# HIGH,DDR3 DRAMRST# HIGH Dimm not reset S3 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# Low,DDR3 DRAMRST# HIGH Dimm not reset S4,S5 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# Low,DDR3 DRAMRST# Low Dimm reset

B

DDR_A_CLK1 DDR_A_CLK1#

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DIMM_DRAMRST# 11,12

DDR_A_CKE1 11

C

UCPU1D

DDR_B_D[0..63]12

DDR_A_CLK0 11 DDR_A_CLK0# 11 DDR_A_CKE0 11

12

R263

R263 75_0402_1%

75_0402_1%

DDR_A_CS0# 11 DDR_A_CS1# 11

SAGE 3G PVT SAGE 3G PVT

DDR_A_ODT0 11 DDR_A_ODT1 11

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11

DDR_B_BS012 DDR_B_BS112 DDR_B_BS212

DDR_B_CAS#12 DDR_B_RAS#12 DDR_B_WE#12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

2011/06/24 2012/06/02

UCPU1D

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17]

BD13

SB_DQ[18]

BF12

SB_DQ[19]

BF8

SB_DQ[20]

BD10

SB_DQ[21]

BD14

SB_DQ[22]

BE13

SB_DQ[23]

BF16

SB_DQ[24]

BE17

SB_DQ[25]

BE18

SB_DQ[26]

BE21

SB_DQ[27]

BE14

SB_DQ[28]

BG14

SB_DQ[29]

BG18

SB_DQ[30]

BF19

SB_DQ[31]

BD50

SB_DQ[32]

BF48

SB_DQ[33]

BD53

SB_DQ[34]

BF52

SB_DQ[35]

BD49

SB_DQ[36]

BE49

SB_DQ[37]

BD54

SB_DQ[38]

BE53

SB_DQ[39]

BF56

SB_DQ[40]

BE57

SB_DQ[41]

BC59

SB_DQ[42]

AY60

SB_DQ[43]

BE54

SB_DQ[44]

BG54

SB_DQ[45]

BA58

SB_DQ[46]

AW59

SB_DQ[47]

AW58

SB_DQ[48]

AU58

SB_DQ[49]

AN61

SB_DQ[50]

AN59

SB_DQ[51]

AU59

SB_DQ[52]

AU61

SB_DQ[53]

AN58

SB_DQ[54]

AR58

SB_DQ[55]

AK58

SB_DQ[56]

AL58

SB_DQ[57]

AG58

SB_DQ[58]

AG59

SB_DQ[59]

AM60

SB_DQ[60]

AL59

SB_DQ[61]

AF61

SB_DQ[62]

AH60

SB_DQ[63]

BG39

SB_BS[0]

BD42

SB_BS[1]

AT22

SB_BS[2]

AV43

SB_CAS#

BF40

SB_RAS#

BD45

SB_WE#

IVY-BRIDGE_BGA1023

IVB@

Compal Secret Data

Deciphered Date

D

BA34

SB_CK[0]

AY34

SB_CK#[0]

AR22

SB_CKE[0]

BA36

SB_CK[1] SB_CK#[1] SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0]

SB_MA[1]

SB_MA[2]

SB_MA[3]

SB_MA[4]

SB_MA[5]

SB_MA[6]

SB_MA[7]

SB_MA[8]

SB_MA[9]

SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

D

DDR_B_CLK1

BB36

DDR_B_CLK1#

BF27

BE41 BE47

AT43 BG47

AL3

DDR_B_DQS#0

AV3

DDR_B_DQS#1

BG11

DDR_B_DQS#2

BD17

DDR_B_DQS#3

BG51

DDR_B_DQS#4

BA59

DDR_B_DQS#5

AT60

DDR_B_DQS#6

AK59

DDR_B_DQS#7

AM2

DDR_B_DQS0

AV1

DDR_B_DQS1

BE11

DDR_B_DQS2

BD18

DDR_B_DQS3

BE51

DDR_B_DQS4

BA61

DDR_B_DQS5

AR59

DDR_B_DQS6

AK61

DDR_B_DQS7

BF32

DDR_B_MA0

BE33

DDR_B_MA1

BD33

DDR_B_MA2

AU30

DDR_B_MA3

BD30

DDR_B_MA4

AV30

DDR_B_MA5

BG30

DDR_B_MA6

BD29

DDR_B_MA7

BE30

DDR_B_MA8

BE28

DDR_B_MA9

BD43

DDR_B_MA10

AT28

DDR_B_MA11

AV28

DDR_B_MA12

BD46

DDR_B_MA13

AT26

DDR_B_MA14

AU22

DDR_B_MA15

Size Document Number Rev

Custom

Date: Sheet of

DDR_B_CKE1 12

Address 0~13:For 128*16 Address 0~14:For 256*16 Address 0~15:For 512*16

Title

PROCESSOR(3/7) DDRIII

V1JB1 M/B LA-A041P Schematic

DDR_B_CLK0 12 DDR_B_CLK0# 12 DDR_B_CKE0 12

DDR_B_CS0# 12 DDR_B_CS1# 12

DDR_B_ODT0 12 DDR_B_ODT1 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

DDR_B_MA[0..15] 12

Compal Electronics, Inc.

E

12

E

R264

R264 75_0402_1%

75_0402_1%

0.1

6 52Wednesday, March 13, 2013

0.1

A

B

C

D

E

Default "1",EDS R1.0 P.88

CFG Straps for Processor

UCPU1E

T72 PAD @T72 PA D@

1 1

2 2

3 3

+CPU_CO RE

1 2

+VGFX_C ORE

1 2

R810

@

49.9_040 2_1%

R812

@

49.9_040 2_1%

R811

@

49.9_040 2_1%

R813

@

49.9_040 2_1%

VCC_VAL _SENSE

VSS_VAL _SENSE

VAXG_VA L_SENSE

VSSAXG_ VAL_SENSE

CFG0

CFG2

CFG4 CFG5 CFG6 CFG7

VCC_VAL _SENSE VSS_VAL _SENSE

VAXG_VA L_SENSE VSSAXG_ VAL_SENSE

T56 PAD @T56 PA D@

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

IVY-BRIDGE_BGA1 023

IVB@

RESERVED

BCLK_ITP#

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3

DC_TEST_D1 DC_TEST_A58 DC_TEST_A59

DC_TEST_C59

DC_TEST_A61

DC_TEST_C61 DC_TEST_D61

DC_TEST_BD61

DC_TEST_BE61

DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1

BCLK_ITP

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RSVD45

N59 N58

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3

DC_TEST _C4_D3

D1 A58 A59 C59

DC_TEST _A59_C59

A61 C61

DC_TEST _A61_C61

D61 BD61 BE61 BE59

DC_TEST _BE59_BE61

BG61 BG59

DC_TEST _BG59_BG61

BG58 BG4 BG3 BE3

DC_TEST _BE3_BG3

BG1 BE1

DC_TEST _BE1_BG1

BD1

These pins are for solder joint reliability and non-critical to function. For BGA only.

CLK_RES _ITP 14 CLK_RES _ITP# 14

PEG Static Lane Reversal - CFG2 is for the 16x

1: Normal Operation; Lane # definition matches

CFG2

socket pin map definition

0:Lane Reversed

*

CFG2

12

R234

R234 1K_0402 _1%

1K_0402 _1%

eDP enable

CFG4

1:Disable

*

0:Enable

CFG4

12

eDP@

R204

R204 1K_0402 _1%

1K_0402 _1%

PCIE Port Bifurcation Straps

11: (Default) 1x16 PCI Express

*

CFG[6:5]

10: 2x8 PCI Express

01: Reserved

00: 1x8,2x4 PCI Express

CFG6

CFG5

12

R230

1K_0402 _1% @

R228

1K_0402 _1%@

PEG DEFER TRAINING

CFG7

1: (Default) PEG Train immediately following xxRESETB de assertion

CRB1.0 P.12

0: PEG Wait for BIOS for training

CFG7

4 4

Security Class ification

2011/06/ 24 2012/06/ 02

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 24 2012/06/ 02

C

Compal Secret Data

Deciphered Date

D

12

R224

R224 1K_0402 _1%@

1K_0402 _1%@

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

V1JB1 M/B LA-A041P Schematic

7 52Wednesd ay, March 13, 20 13

E

0.1

A

INTEL Recommend VCC 3*330uF,12*22uF(0805),16*2.2uF(0402) PD0.9

1 1

2 2

3 3

4 4

B

UCPU1F

ULV SC/DC 33A

+CPU_CORE

UCPU1F

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

IVY-BRIDGE_BGA1023

IVB@

C

POWER

CORE SUPPLY

VCCIO[1] VCCIO[3] VCCIO[4] VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCIO[9] VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24] VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29]

VCCIO[30] VCCIO[31] VCCIO[32]

PEG IO AND DDR IO

VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]

VCCIO50

VCCIO51

VCCIO_SEL

VCCPQE[1] VCCPQE[2]

RAILS

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID QUIET

8.5A

AF46 AG48 AG50 AG51 AJ17 AJ21 AJ25 AJ43 AJ47 AK50 AK51 AL14 AL15 AL16 AL20 AL22 AL26 AL45 AL48 AM16 AM17 AM21 AM43 AM47 AN20 AN42 AN45 AN48

AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

BC22

AM25 AN22

A44 B43 C44

F43 G43

AN16 AN17

VCCSENSE_R VSSSENSE_R

VCCIO_SEL_R

+1.05VS_VTT

1

C951

C951 1U_0402_6.3V6K

1U_0402_6.3V6K

2

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

VCCIO_SENSE VSSIO_SENSE

D

+1.05VS_VTT

INTEL Recommend VCCIO PD 0.9

330uF 1+1 10uF (0603) *5 1uF (0201) *16

+1.05VS_VTT

330uF 1 10uF (0603) *5 1uF (0201) *10

10K_0402_5%

+1.05VS_VTT

R582

1 2

+1.05VS_VTT

SAGE 3G

Place the PU,PD resistors close to CPU

1 2

R579 0_0402_5%@R579 0_0402_5%@ R581 0_0402_5%@R581 0_0402_5%@

1 2

R107 10_0402_5%R107 10_0402_5%

12

R105

R105 10_0402_5%

10_0402_5%

VCCIO_SEL

10K_0402_5% @

0_0402_5%@

12

R574

R574 130_0402_5%

130_0402_5%

+1.05VS_VTT

VCCIO_SENSE 40

Should change to connect from power cirucit & layout differential with VCCIO_SENSE.

+3VALW

VCCIO_SEL For 2012 CPU support

R521

R520

1 2

R576 43_0402_1%R576 43_0402_1% R577 0_0402_5%@R577 0_0402_5%@

1 2 1 2

R578 0_0402_5%@R578 0_0402_5%@

+CPU_CORE

1 2

12

A19

R588

R588 100_0402_1%

100_0402_1%

R589

R589 100_0402_1%

100_0402_1%

E

1 : +1.05VS_VTT

*

0: +1.0VS_VTT

Check List R1.5 VIDALERT#:75ohm ±5% pull-up to VCCIO close to IMVP7 VIDSCLK: 55ohm ±5% pull-up to VCCIO close to IMVP7 VIDSOUT: 130ohm ±5% pull-up to VCCIO close to CPU 130ohm ±5% pull-up to VCCIO close to IMVP7

VR_SVID_ALRT# 42 VR_SVID_CLK 42 VR_SVID_DAT 42

VCCSENSE 42 VSSSENSE 42

Check List R1.5 VCCSENSE:100ohm ±1% pull-up to VCC near processor. VSSSENSE:100ohm ±1% pull-down to GND near processor.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/7) PWR,BYPASS

V1JB1 M/B LA-A041P Schematic

E

8 52Wednesday, March 13, 2013

0.1

A

INTEL Recommend VAXG

+VGFX_CORE

2*330uF,5*22uF(0805),6*10uF(0603),6*1uF(0402) PD 0.9

1 1

2 2

Check List R1.5 VCCAXG_SENSE:100ohm ±5% pull-up to VCC near processor. VSSAXG_SENSE:100ohm ±5% pull-down to GND near processor.

INTEL Recommend VCCPLL 1*330uF,2*1uF(0402) PD 0.9

3 3

SAGE 3G

+1.8VS

+1.35VS

+VCCSA

J16

112

JUMP_43X39

R500

R500 0_0805_5%

0_0805_5%

1 2

@

@J16

@

2

1

+

C607

C607 330U_B2_2VM_R15M

330U_B2_2VM_R15M

SGA00004700

2

1

+

C606

C606 220U_B2_2.5VM_R15M

220U_B2_2.5VM_R15M

SGA00004I00

2

VCC_AXG_SENSE42

VSS_AXG_SENSE42

+VCCSA

+1.8VS_VCCPLL

SAGE 3G

C1181

1U_0402_6.3V6K

1

2

B

ULV SC/DC GT1: 18A GT2: 33A

R381

1 2

100_0402_5%

1 2

100_0402_5%

1U_0402_6.3V6K

1

2

R381

R396

1.2A

C584

1U_0402_6.3V6K

C584

1U_0402_6.3V6K

C583

1

2

+VGFX_CORE

6A

C1179

C1180

1U_0402_6.3V6K

1

2

UCPU1G

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

VAXG[4]

AB52

VAXG[5]

AB53

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

IVY-BRIDGE_BGA1023

IVB@

POWER

VREF

DDR3 - 1.5V RAILS

GRAPHICS

SENSE

LINES

SENSE

LINES

1.8V RAIL

SA RAIL

VCCSA VID

C

SM_VREF

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

VCCDQ[1] VCCDQ[2]

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

SENSE LINES

VCCSA_VID[0] VCCSA_VID[1]

lines

SA_DIMM_VREFDQ SB_DIMM_VREFDQ For Future CPU M3 support, Sandey bridge not support M3, Check list1.0 & CRB say can NC

AY43

+V_SM_VREF

BE7

SA_DIMM_VREFDQ

BG7

SB_DIMM_VREFDQ

5A

AJ28

VDDQ[1]

AJ33

VDDQ[2]

AJ36

VDDQ[3]

AJ40

VDDQ[4]

AL30

VDDQ[5]

AL34

VDDQ[6]

AL38

VDDQ[7]

AL42

VDDQ[8]

AM33

VDDQ[9]

AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

AM28 AN26

BC43 BA43

U10

D48 D49

+1.35VS

VCCSA_SENSE

CPU EDS1.3 P.93 VCCSA_VID0 Must PD

H_VCCSA_VID0 H_VCCSA_VID1

12

@

R69

1K_0402_1%

Place BOT OUT Conn

C985

1U_0402_6.3V6K

C985

1U_0402_6.3V6K

1

SAGE 3G

2

12

R129

R129 0_0402_5%

0_0402_5%

@

R68

1K_0402_1%

C977

1U_0402_6.3V6K

1

2

D

SAGE 3G

C978

C979

1U_0402_6.3V6K

1

2

C998

C999

10U_0603_6.3V6M

12

@

SAGE 3G

@

T55

H_VCCSA_VID0 41 H_VCCSA_VID1 41

+1.35VS

+V_SM_VREF should have 20 mil trace width

1

C647

0.1U_0402_16V4Z

2

INTEL Recommend VDDQ 1*330uF,8*10uF(0603) ,10*1uF(0402) PD0.9

Short for +1.35VS to +1.35V_CPU_VDDQ

1

+

C599

C599 330U_B2_2VM_R15M

330U_B2_2VM_R15M

SGA00004700

2

10U_0603_6.3V6M

VCCSA

SNB IVB

Vout

0.9V

0.8V

0.85V V

0.725V

0.675V

12

PAD

SAGE 3G

C990

10U_0603_6.3V6M

12

@

C970

C987

C989

10U_0603_6.3V6M

12

@

VCCSA_VID

For 2012 future CPU VCCSA voltage select

VID0

VID1

0

1

0

0 X1

1 1

12

R534

1K_0402_1%

12

R540

1K_0402_1%

V V

V

E

+1.35VS

ULV

V

VX

V

INTEL Recommend VCCSA

4 4

1*330uF,5*10uF(0603) ,5*1uF(0402)

C995

10U_0603_6.3V6M

12

C997

C996

10U_0603_6.3V6M

12

PD0.9

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(6/7) PWR

V1JB1 M/B LA-A041P Schematic

E

9 52Wednesday, March 13, 2013

0.1

A

1 1

2 2

3 3

B

UCPU1H

A13

AA13 AA50 AA51 AA52 AA53 AA55 AA56

AB16 AB18 AB21 AB48 AB61 AC10 AC14 AC46

AC6 AD17 AD20

AD4 AD61 AE13

AE8

AF1

AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58

AF59 AG10 AG14 AG18 AG47 AG52 AG61

AG7 AH4

AH58

AJ13

AJ16

AJ20

AJ22

AJ26

AJ30

AJ34

AJ38

AJ42

AJ45

AJ48

AK1

AK52

AL10

AL13

AL17

AL21

AL25

AL28

AL33

AL36

AL40

AL43

AL47

AL61 AM13 AM20 AM22 AM26 AM30 AM34

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

VSS[10]

A53

VSS[11]

A9

VSS[12]

AA1

VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20]

AA8

VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69]

AJ7

VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90]

VSS

VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

C

UCPU1I

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46 D50 D54 D58

E25 E29

E35 E40 F13 F15 F19 F29 F35 F40 F55 G51

G61 H10 H14 H17 H21

H53 H58

K11 K21 K51

M11 M15

VSS[204] VSS[205] VSS[206] VSS[207]

D6

VSS[208] VSS[209] VSS[210]

E3

VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221]

G6

VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227]

H4

VSS[228] VSS[229] VSS[230]

J1

VSS[231]

J49

VSS[232]

J55

VSS[233] VSS[234] VSS[235] VSS[236]

K8

VSS[237]

L16

VSS[238]

L20

VSS[239]

L22

VSS[240]

L26

VSS[241]

L30

VSS[242]

L34

VSS[243]

L38

VSS[244]

L43

VSS[245]

L48

VSS[246]

L61

VSS[247] VSS[248] VSS[249]

VSS

NCTF

VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

D

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59 G48

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

T58PAD@ T58PAD@ T59PAD@ T59PAD@ T60PAD@ T60PAD@ T61PAD@ T61PAD@ T62PAD@ T62PAD@ T63PAD@ T63PAD@ T64PAD@ T64PAD@ T65PAD@ T65PAD@ T66PAD@ T66PAD@ T67PAD@ T67PAD@ T68PAD@ T68PAD@ T69PAD@ T69PAD@ T70PAD@ T70PAD@ T71PAD@ T71PAD@

E

CR CheckList Rev1.5

IVY-BRIDGE_BGA1023

IVB@

IVY-BRIDGE_BGA1023

4 4

A

B

IVY-BRIDGE_BGA1023

IVB@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

V1JB1 M/B LA-A041P Schematic

E

10 52Wednesday, March 13, 2013

0.1

A

B

C

D

E

Channel A

DDR_A_MA[0..15]6

DDR_A_DQS#[0..7]6

DDR_A_DQS[0..7]6

DDR_A_D[0..63]6

+VREFCA_A

1 1

C1252

0.1U_0402_16V4Z

C1252

0.1U_0402_16V4Z

1

2

+VREFDQ_A

C1253

0.1U_0402_16V4Z

C1253

0.1U_0402_16V4Z

1

2

2 2

DIMM_DRAMRST#12,6

DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_D[0..63]

U56

M8

VREFCA

H1

VREFDQ

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12

C1258

2.2U_0603_6.3V6K@C1258

2.2U_0603_6.3V6K

12

DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 DDR_A_MA15 DDR_A_MA15 DDR_A_MA15

@

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CKE0

DDR_A_ODT0 DDR_A_CS0# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_DQS1 DDR_A_DQS0

DDR_A_DQS#1 DDR_A_DQS#0

DIMM_DRAMRST#

1 2

R992

240_0402_1%

DDR_A_ODT1 DDR_A_CS1# DDR_A_CKE1

1 2

R996

240_0402_1%

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

DDR_A_D8

F7

DDR_A_D10

F2

DDR_A_D13

F8

DDR_A_D11

H3

DDR_A_D12

H8

DDR_A_D15

G2

DDR_A_D9

H7

DDR_A_D14

D7

DDR_A_D3

C3

DDR_A_D1

C8

DDR_A_D2

C2

DDR_A_D4

A7

DDR_A_D7

A2

DDR_A_D0

B8

DDR_A_D6

A3

DDR_A_D5

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

+VREFCA_A

C1255

0.1U_0402_16V4Z

C1255

0.1U_0402_16V4Z

1

2

+VREFDQ_A

C1254

0.1U_0402_16V4Z

C1254

0.1U_0402_16V4Z

1

2

SAGE 3G PVTSAGE 3G PVT SAGE 3G PVT SAGE 3G PVT

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12

C1259

2.2U_0603_6.3V6K@C1259

2.2U_0603_6.3V6K

12

DDR_A_MA13 DDR_A_MA14

@

DDR_A_BS0

DDR_A_BS1 DDR_A_BS2

SAGE 3GSAGE 3G SAGE 3G SAGE 3G

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CKE0

DDR_A_ODT0 DDR_A_CS0# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_DQS2 DDR_A_DQS3

DDR_A_DQS#2 DDR_A_DQS#3

DIMM_DRAMRST#

1 2

R993

240_0402_1%

DDR_A_ODT1 DDR_A_CS1# DDR_A_CKE1

1 2

R997

240_0402_1%

U57

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

U58

E3

DDR_A_D16

F7

DDR_A_D19

F2

DDR_A_D20

F8

DDR_A_D18

H3

DDR_A_D22

H8

DDR_A_D23

G2

DDR_A_D17

H7

DDR_A_D21

D7

DDR_A_D25

C3

DDR_A_D29

C8

DDR_A_D27

C2

DDR_A_D28

A7

DDR_A_D31

A2

DDR_A_D30

B8

DDR_A_D26

A3

DDR_A_D24

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

+VREFCA_A

C1256

0.1U_0402_16V4Z

C1256

0.1U_0402_16V4Z

+VREFDQ_A

1

2

C1260

0.1U_0402_16V4Z

C1260

0.1U_0402_16V4Z

1

2

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12

C1261

2.2U_0603_6.3V6K@C1261

2.2U_0603_6.3V6K

12

DDR_A_MA13 DDR_A_MA14

@

DDR_A_BS0

DDR_A_BS1 DDR_A_BS2

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CKE0

DDR_A_ODT0 DDR_A_CS0# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_DQS4 DDR_A_DQS5

DDR_A_DQS#4 DDR_A_DQS#5

DIMM_DRAMRST#

1 2

R994

240_0402_1%

DDR_A_ODT1 DDR_A_CS1# DDR_A_CKE1

1 2

R998

240_0402_1%

U58

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

+1.35V

+VREFCA_A

C1257

0.1U_0402_16V4Z

C1257

0.1U_0402_16V4Z

+VREFDQ_A

E3

DDR_A_D32

F7

DDR_A_D34

F2

DDR_A_D33

F8

DDR_A_D39

H3

DDR_A_D37

H8

DDR_A_D35

G2

DDR_A_D36

H7

DDR_A_D38

D7

DDR_A_D42

C3

DDR_A_D45

C8

DDR_A_D47

C2

DDR_A_D44

A7

DDR_A_D46

A2

DDR_A_D40

B8

DDR_A_D43

A3

DDR_A_D41

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

U59

M8

VREFCA

H1

1

2

C1262

0.1U_0402_16V4Z

C1262

0.1U_0402_16V4Z

1

2

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12

C1263

2.2U_0603_6.3V6K@C1263

2.2U_0603_6.3V6K

12

DDR_A_MA13 DDR_A_MA14

@

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CKE0

DDR_A_ODT0 DDR_A_CS0# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_DQS6 DDR_A_DQS7

DDR_A_DQS#6 DDR_A_DQS#7

DIMM_DRAMRST#

1 2

R995

240_0402_1%

DDR_A_ODT1 DDR_A_CS1# DDR_A_CKE1

1 2

R999

240_0402_1%

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

DDR_A_D52

F7

DDR_A_D54

F2

DDR_A_D48

F8

DDR_A_D50

H3

DDR_A_D53

H8

DDR_A_D55

G2

DDR_A_D49

H7

DDR_A_D51

D7

DDR_A_D63

C3

DDR_A_D57

C8

DDR_A_D58

C2

DDR_A_D60

A7

DDR_A_D59

A2

DDR_A_D56

B8

DDR_A_D62

A3

DDR_A_D61

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.35V+1.35V +1.35V

SAGE 3G

3 3

+0.675VS

C1459

1U_0402_6.3V6K

C1459

C1461

1U_0402_6.3V6K

C1461

1U_0402_6.3V6K

C1462

1U_0402_6.3V6K

C1462

1U_0402_6.3V6K

12

Layout Note: Place near each memory part

+1.35V

C1466

1U_0402_6.3V6K

C1466

1U_0402_6.3V6K

C1476

1U_0402_6.3V6K

C1476

1U_0402_6.3V6K

12

+1.35V

4 4

C1479

10U_0603_6.3V6M

C1479

10U_0603_6.3V6M

C1469

10U_0603_6.3V6M

C1469

10U_0603_6.3V6M

12

1U_0402_6.3V6K

C1460

1U_0402_6.3V6K

C1460

1U_0402_6.3V6K

12

C1477

1U_0402_6.3V6K

C1477

1U_0402_6.3V6K

12

C1463

10U_0603_6.3V6M

C1463

10U_0603_6.3V6M

12

C1514

1U_0402_6.3V6K

C1514

1U_0402_6.3V6K

12

C1467

1U_0402_6.3V6K

C1467

1U_0402_6.3V6K

C1470

1U_0402_6.3V6K

C1470

1U_0402_6.3V6K

12

C1465

10U_0603_6.3V6M

C1465

10U_0603_6.3V6M

C1475

10U_0603_6.3V6M

C1475

10U_0603_6.3V6M

12

SAGE 3G

C1512

1U_0402_6.3V6K

C1512

1U_0402_6.3V6K

C1511

1U_0402_6.3V6K

C1511

C1513

1U_0402_6.3V6K

C1513

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

SAGE 3G

1K_0402_1%

R1108

R1107

+1.35V

12

C1483

0.1U_0402_16V4Z

C1483

0.1U_0402_16V4Z

12

1

2

C1478

1U_0402_6.3V6K

C1478

1U_0402_6.3V6K

C1468

1U_0402_6.3V6K

C1468

C1471

1U_0402_6.3V6K

C1471

1U_0402_6.3V6K

12

C1473

10U_0603_6.3V6M

C1473

10U_0603_6.3V6M

12

1U_0402_6.3V6K

12

C1472

10U_0603_6.3V6M

C1472

10U_0603_6.3V6M

C1474

10U_0603_6.3V6M

C1474

10U_0603_6.3V6M

330U_D2_2V_Y

C1464

12

+

+VREFCA_A

2.2U_0603_6.3V6K

C1482

+1.35V

12

R1106

R1106 1K_0402_1%

1K_0402_1%

+VREFDQ_A

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C1480

C1480

0.1U_0402_16V4Z

12

R1104

R1104 1K_0402_1%

1K_0402_1%

0.1U_0402_16V4Z

1

12

2

12

near U56 near U57 near U58 near U59

A

B

+0.675VS

C1481

DDR3 CTL/ADD Termination

1 8

RP30

RP31

RP32

RP33

RP34

RP35

DDR_A_ODT0

2 7

DDR_A_RAS#

3 6

DDR_A_CAS#

4 5

DDR_A_CKE0

36_8P4R_5%

1 8

DDR_A_CS0#

2 7

DDR_A_MA10

3 6

DDR_A_WE#

4 5

DDR_A_MA15

36_8P4R_5%

1 8

DDR_A_BS0

2 7

DDR_A_BS1

3 6

DDR_A_BS2

4 5

DDR_A_MA12

36_8P4R_5%

1 8

DDR_A_MA3

2 7

DDR_A_MA4

3 6

DDR_A_MA0

4 5

DDR_A_MA1

36_8P4R_5%

1 8

DDR_A_MA2

2 7

DDR_A_MA11

3 6

DDR_A_MA5

4 5

DDR_A_MA6

36_8P4R_5%

1 8

DDR_A_MA9

2 7

DDR_A_MA14

3 6

DDR_A_MA13

4 5

DDR_A_MA8

36_8P4R_5%

1 2

DDR_A_MA7

R332 36_0201_1%R332 36_0201_1%

1 2

DDR_A_CKE1

R333 36_0201_1%R333 36_0201_1%

1 2

DDR_A_CS1#

R335 36_0201_1%R335 36_0201_1%

1 2

DDR_A_ODT1

R336 36_0201_1%R336 36_0201_1%

SAGE 3G PVT

C

C1458

1 2

0.1U_0402_16V4Z

DDR_A_ODT0 6 DDR_A_RAS# 6 DDR_A_CAS# 6 DDR_A_CKE0 6

DDR_A_CS0# 6

DDR_A_WE# 6

DDR_A_BS0 6 DDR_A_BS1 6 DDR_A_BS2 6

DDR_A_CKE1 6

DDR_A_CS1# 6

DDR_A_ODT1 6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

DDR_A_CLK06

DDR_A_CLK0#6

1.CAD Note: Cterm= 1.8pF should be kept near feeding point of first SDRAM

2.CAD Note: Rtt= 30.1ohms, Ctt= 0.1uF should be kept within 600mils from last SDRAM

0.1U_0402_16V4Z

30.1_0402_1%

1

C1457

1.8P_0402_50V8

2

Compal Secret Data

2011/06/24 2012/07/12

Compal Secret Data

SAGE 3G

DDR3 CLK Termination

12

R1102

Deciphered Date

D

R1103

30.1_0402_1%

END topology

TM_D+33

TM_D-33

1

C233

2

2200P_0402_50V7K

External DDR Thermal Sensor

+3VS

C97

1 2

0.1U_0402_16V4Z

U4

1

VDD

2

TM_D+

TM_D-

D+

3

D-

THERM#4GND

W83L771AWG-2 TSSOP8P

SA00003PU00

SA00003PU00 S IC W83L771AWG-2 TSSOP 8P SENSOR

Title

DDRIII DIMMA

Size Document Number Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet of

8

SCLK

7

SDATA

6

5

E

1 2

R546 10K_0402_5%R546 10K_0402_5%

ALERT#

Compal E lectronics, Inc.

EC_SMB_CK2 14,28

EC_SMB_DA2 14,28

11 52Wednesday, March 13, 2013

+3VS

0.1

A

B

C

D

E

U60

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

DDR_B_DQS#[0..7] 6

DDR_B_DQS[0..7] 6

DDR_B_D[0..63] 6

DDR_B_MA[0..15] 6

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

SAGE 3G SAGE 3G SAGE 3G SAGE 3G

DDR_B_D14 DDR_B_D8 DDR_B_D15 DDR_B_D9 DDR_B_D11 DDR_B_D12 DDR_B_D10 DDR_B_D13

DDR_B_D5 DDR_B_D6 DDR_B_D2 DDR_B_D3 DDR_B_D0 DDR_B_D7 DDR_B_D4 DDR_B_D1

C1295

0.1U_0402_16V4Z

C1295

0.1U_0402_16V4Z

+VREFDQ_B+VREFDQ_B

128@

+VREFCA_B

1

2

128@

1

2

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12

C1293

2.2U_0603_6.3V6K@C1293

2.2U_0603_6.3V6K

C1299

0.1U_0402_16V4Z

C1299

0.1U_0402_16V4Z

12

DDR_B_MA13 DDR_B_MA14

@

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CLK0 DDR_B_CLK0# DDR_B_CKE0

DDR_B_ODT0 DDR_B_CS0# DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_B_DQS2 DDR_B_DQS3

DDR_B_DQS#2 DDR_B_DQS#3

DIMM_DRAMRST#

R1006

1 2

240_0402_1%

DDR_B_ODT1 DDR_B_CS1# DDR_B_CKE1

R1010

1 2

240_0402_1%

128@

128@R1006

128@

U61

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

U62

128@R1007

128@

U62

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

DDR_B_D34

F7

DDR_B_D36

F2

DDR_B_D39

F8

DDR_B_D37

H3

DDR_B_D35

H8

DDR_B_D32

G2

DDR_B_D38

H7

DDR_B_D33

D7

DDR_B_D40

C3

DDR_B_D46

C8

DDR_B_D45

C2

DDR_B_D42

A7

DDR_B_D41

A2

DDR_B_D43

B8

DDR_B_D44

A3

DDR_B_D47

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

E3

DDR_B_D23

DQL0

F7

DDR_B_D21

DQL1

F2

DDR_B_D18

DQL2

F8

DDR_B_D17

DQL3

H3

DDR_B_D19

DQL4

H8

DDR_B_D20

DQL5

G2

DDR_B_D22

DQL6

H7

DDR_B_D16

DQL7

D7

DDR_B_D24

C3

DDR_B_D26

C8

DDR_B_D29

C2

DDR_B_D31

A7

DDR_B_D25

A2

DDR_B_D30

B8

DDR_B_D28

A3

DDR_B_D27

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

C1296

0.1U_0402_16V4Z

C1296

0.1U_0402_16V4Z

1

2

128@

+VREFDQ_B

0.1U_0402_16V4Z

1

128@

+1.35V +1.35V

2

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12

C1291

2.2U_0603_6.3V6K@C1291

2.2U_0603_6.3V6K

C1300

12

DDR_B_MA13 DDR_B_MA14

@

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CLK0 DDR_B_CLK0# DDR_B_CKE0

DDR_B_ODT0 DDR_B_CS0# DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_B_DQS4 DDR_B_DQS5

DDR_B_DQS#4 DDR_B_DQS#5

DIMM_DRAMRST#

R1007

1 2

240_0402_1%

DDR_B_ODT1 DDR_B_CS1# DDR_B_CKE1

R1011

1 2

240_0402_1%

128@

C1297

0.1U_0402_16V4Z

C1297

0.1U_0402_16V4Z

+VREFDQ_B

128@

+VREFCA_B+VREFCA_B

1

2

128@

0.1U_0402_16V4Z

1

2

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12

C1301

C1302

2.2U_0603_6.3V6K@C1302

2.2U_0603_6.3V6K

12

DDR_B_MA13 DDR_B_MA14

@

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

SAGE 3GSAGE 3GSAGE 3GSAGE 3G

DDR_B_CLK0 DDR_B_CLK0# DDR_B_CKE0

DDR_B_CS0# DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_B_DQS7 DDR_B_DQS6

DDR_B_DQS#7 DDR_B_DQS#6

DIMM_DRAMRST#

R1008

1 2

240_0402_1%

DDR_B_ODT1 DDR_B_CS1# DDR_B_CKE1

R1012

1 2

240_0402_1%

128@

128@R1008

128@

U63

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

X76@

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

E3

DDR_B_D58

DQL0

F7

DDR_B_D56

DQL1

F2

DDR_B_D63

DQL2

F8

DDR_B_D60

DQL3

H3

DDR_B_D62

DQL4

H8

DDR_B_D61

DQL5

G2

DDR_B_D59

DQL6

H7

DDR_B_D57

DQL7

D7

DDR_B_D49

DQU0

C3

DDR_B_D55

DQU1

C8

DDR_B_D52

DQU2

C2

DDR_B_D51

DQU3

A7

DDR_B_D53

DQU4

A2

DDR_B_D50

DQU5

B8

DDR_B_D48

DQU6

A3

DDR_B_D54

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

+1.35V+1.35V

Channel B

+VREFCA_B

1 1

2 2

C1294

0.1U_0402_16V4Z

C1294

0.1U_0402_16V4Z

1

2

128@

0.1U_0402_16V4Z

1

128@

2

DIMM_DRAMRST#11 ,6

SAGE 3G PVT SAGE 3G PVT SAGE 3G PVT SAGE 3G PVT

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12

C1292

2.2U_0603_6.3V6K@C1292

2.2U_0603_6.3V6K

C1298

12

DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 DDR_B_MA15 DDR_B_MA15 DDR_B_MA15

@

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CLK0 DDR_B_CLK0# DDR_B_CKE0

DDR_B_ODT0 DDR_B_ODT0 DDR_B_CS0# DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_B_DQS1 DDR_B_DQS0

DDR_B_DQS#1 DDR_B_DQS#0

DIMM_DRAMRST#

R1005

128@R1005

128@

1 2

240_0402_1%

DDR_B_ODT1 DDR_B_CS1# DDR_B_CKE1

R1009

1 2

240_0402_1%

128@

+VREFCA_B

2.2U_0603_6.3V6K

C1507

+1.35V

12

R1123

R1123 1K_0402_1%

1K_0402_1%

128@

+VREFDQ_B

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C1509

C1509

128@

R1121

R1121 1K_0402_1%

1K_0402_1%

128@

C1510

0.1U_0402_16V4Z

C1510

0.1U_0402_16V4Z

1

12

2

128@

C

12

128@

12

+0.675VS

SAGE 3G

DDR3 CTL/ADD Termination

RP36

4 5

DDR_B_ODT0

3 6

DDR_B_CKE0

2 7

DDR_B_RAS#

1 8

DDR_B_CAS#

36_8P4R_5%128@

RP37

4 5

DDR_B_CS0#

3 6

DDR_B_WE#

2 7

DDR_B_MA10

1 8

DDR_B_BS0

36_8P4R_5%128@

RP38

4 5

DDR_B_MA15

3 6

DDR_B_BS2

2 7

DDR_B_BS1

1 8

DDR_B_MA0

36_8P4R_5%128@

RP39

4 5

DDR_B_MA12

3 6

DDR_B_MA3

2 7

DDR_B_MA1

1 8

DDR_B_MA2

36_8P4R_5%128@

RP40

4 5

DDR_B_MA4

3 6

DDR_B_MA5

2 7

DDR_B_MA11

1 8

DDR_B_MA9

36_8P4R_5%128@

RP41

4 5

DDR_B_MA6

3 6

DDR_B_MA7

2 7

DDR_B_MA14

1 8

DDR_B_MA13

36_8P4R_5%128@

128@

1 2

DDR_B_MA8

R390 36_0 201_1%

128@

1 2

DDR_B_CKE1

R339 36_0 201_1%

128@

1 2

DDR_B_CS1#

R340 36_0 201_1%

128@

1 2

DDR_B_ODT1

R342 36_0 201_1%

SAGE 3G PVT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_B_ODT0 6 DDR_B_CKE0 6 DDR_B_RAS# 6 DDR_B_CAS# 6

DDR_B_CS0# 6

DDR_B_WE# 6

DDR_B_BS0 6

DDR_B_BS2 6 DDR_B_BS1 6

DDR_B_CKE1 6

DDR_B_CS1# 6

DDR_B_ODT1 6

Compal Secret Data

D

Compal Secret Data

Deciphered Date

2011/06/24 2012/06/02

1.CAD Note: Cterm= 1.8pF should be kept near feeding point of first SDRAM

2.CAD Note: Rtt= 30.1ohms, Ctt= 0.1uF should be kept within 600mils from last SDRAM

SAGE 3G

DDR_B_CLK06

DDR_B_CLK0#6

DDR3 CLK Termination

C1506

128@ C1506

128@

1 2

0.1U_0402_16V4Z

R1117

30.1_0402_1%

12

R1118

30.1_0402_1%

128@

END topology

1

C1505

1.8P_0402_50V8

128@

2

Compal Electronics, Inc.

Title

DDRIII DIMMB

Size Document Number Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet o f

E

0.1

12 52Wednesday, March 13, 2013

+0.675VS

C1504

1U_0402_6.3V6K@C1504

1U_0402_6.3V6K

C1503

1U_0402_6.3V6K@C1503

1U_0402_6.3V6K

12

3 3

4 4

12

@

Layout Note: Place near each memory part

+1.35V

C1497

1U_0402_6.3V6K@C1497

1U_0402_6.3V6K

C1487

1U_0402_6.3V6K@C1487

1U_0402_6.3V6K

12

@

+1.35V

C1490

10U_0603_6.3V6M@C1490

10U_0603_6.3V6M

C1500

10U_0603_6.3V6M@C1500

10U_0603_6.3V6M

@

12

A

C1501

1U_0402_6.3V6K@C1501

1U_0402_6.3V6K

C1502

1U_0402_6.3V6K@C1502

1U_0402_6.3V6K

12

@

C1488

1U_0402_6.3V6K@C1488

1U_0402_6.3V6K

C1498

1U_0402_6.3V6K@C1498

1U_0402_6.3V6K

12

@

C1496

10U_0603_6.3V6M@C1496

10U_0603_6.3V6M

C1485

10U_0603_6.3V6M@C1485

10U_0603_6.3V6M

@

12

SAGE 3G

+1.35V

12

R1120

1K_0402_1%

128@

12

C1508

0.1U_0402_16V4Z

C1508

0.1U_0402_16V4Z

1

R1119

1K_0402_1%

128@

B

2

A

12

1

R568

+RTCVCC

R338 20K_0402_5%R338 20K_0402_ 5%

R337 20K_0402_5%R337 20K_0402_ 5%

1 1

C516

1U_0402_6.3V6K

1 2

C502

1U_0402_6.3V6K

R568 0_0603_5%

0_0603_5%

@

2

PCH_RTCRST#

PCH_SRTCRST#

12

1

R561

R561 0_0603_5%

0_0603_5%

@

2

SAGE 3G

1 2

R638 10M_0402_5%R638 10M_0402_5%

X1

SJ100004Z00

12

32.768KHZ_12.5PF_1TJF125DP1A000D

1

C756

C756 15P_0402_50V8J

15P_0402_50V8J

2

SAGE 3G DVT

R561, R568 put on TOP

+RTCVCC

1 2

R353 1M_0402_5%R353 1M_0402_5%

1 2

R347 330K_0402_5%R347 330K_0402_5 %

INTVRMEN

H

：：：：

Integrated VRM enable

*

L

：：：：

Integrated VRM disable

SM_INTRUDER#

PCH_INTVRMEN

(INTVRMEN should always be pull high.)

+3VS

HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature

LOW= Disable (Default internal PD)

*

2 2

HDA_SDO28

HDA_SDO

ME debug mode,this signal has a weak internal PD

Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+VCCSUS3_3

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

1.5V when smapled high

*

1.8V when sampled low Needs to be pulled High for Huron River platfrom

HDA_BITCLK_AUDIO33

3 3

HDA_SYNC_AUDIO33 HDA_RST_AUDIO#33

HDA_SDOUT_AUDIO33

@

1 2

R405 1K_0402_5%

+VCCSUS3_3

R328 1K_0402_ 5%R328 1K_0402_5%

1K_0402_5%

0_0402_5%

12

R322

@R32 2

@

R320

12

HDA_SYNC_PCH

PCH_SPKR

HDA_SDOUT_PCH

SAGE 3G

RP11

45

HDA_BITCLK_PCH

36

HDA_SYNC_PCH_R

27

HDA_RST_PCH#

18

HDA_SDOUT_PCH

33_8P4R_5%

SAGE 3G Reserve for RF / Close to PCH

12

PCH_SPI_CLK_0

C1031.8P_0402_50V8XEMC@ C1031.8P_0402 _50V8XEMC@

12

PCH_SPI_CLK_1

C1041.8P_0402_50V8XEMC@ C1041.8P_0402_50V8XEMC@

12

HDA_BITCLK_AUDIO

C1051.8P_0402_50V8XEMC@ C1051.8P_0402 _50V8XEMC@

Prevent back drive issue.

+5VS

G

2

Q20

Q20 BSS138W-7-F_SOT323

BSS138W-7-F_SOT323

13

HDA_SYNC_PCH

D

S

D

S

R302

1 2

0_0402_5%@

R468

R468 1M_0402_5%

1M_0402_5%

PCH_SPI_CLK_0

PCH_SPI_CLK_1

SAGE 3G

PCH_SPI_MOSI_0

PCH_SPI_MOSI_1

PCH_SPI_MISO_0

PCH_SPI_MISO_1

0_0402_5%@

R739 33_0402_5%R739 33_0402_ 5%

R704 33_0402_5%R704 33_0402_ 5%

R737 33_0402_5%R737 33_0402_ 5%

R734 33_0402_5%R734 33_0402_ 5%

R736 33_0402_5%R736 33_0402_ 5%

R738 33_0402_5%R738 33_0402_ 5%

12

HSPI to EC

PCH_SPI_CS1#28

4 4

PCH_SPI_CLK_128

PCH_SPI_MISO_128

PCH_SPI_MOSI_128

PCH_SPI_CS1# PCH_SPI_CLK_1 PCH_SPI_MISO_1 PCH_SPI_MOSI_1

B

PCH_RTCX1

PCH_RTCX2

1

C757

C757 15P_0402_50V8J

15P_0402_50V8J

2

PCH_SPKR33

HDA_SDIN033

12

R672

51_0402_5%

T57 PAD @T57 PAD @

T73 PAD @T73 PAD @

T75 PAD @T75 PAD @

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BITCLK_PCH

HDA_SYNC_PCH

PCH_SPKR

HDA_RST_PCH#

HDA_SDIN0

HDA_SDOUT_PCH

SAGE 3G

12

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_MOSI

PCH_SPI_MISO

+RTCVCC

+RTCBATT

3

1

C197

0.1U_0402_16V4Z

2

U37A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

COUGARPOINT_FCBGA989~D

HM77@

1

D5

D5 BAS40-04_SOT23-3

BAS40-04_SOT23-3

2

+CHGRTC

20MIL

RTC Battery:Chargeable

RTCIHDA

JTAG

SPI

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

C

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

C38 A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

PCH_GPIO23

SERIRQ

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

PCH_GPIO19

LPC_AD0 26,2 8 LPC_AD1 26,2 8 LPC_AD2 26,2 8 LPC_AD3 26,2 8

LPC_FRAME# 26,28

PCH_GPIO23 18

SERIRQ 26, 28

SATA_PRX_DTX_N0 25 SATA_PRX_DTX_P0 25 SATA_PTX_DRX_N0 25 SATA_PTX_DRX_P0 25

SATA_PRX_DTX_N1 25 SATA_PRX_DTX_P1 25 SATA_PTX_DRX_N1 25 SATA_PTX_DRX_P1 25

+1.05VS_PCH

R389

37.4_0402_1%

1 2

+1.05VS_PCH

R388

49.9_0402_1%

1 2

R650 750_0402_1%R650 750_0402_1%

D

PCH_GPIO201 4

No use PH 10K +3VS

GPIO19 has internal Pull up

SAGE 3G

SERIRQ PCH_SATALED# PCH_GPIO20 PCH_GPIO21

Switchable

*

Boot BIOS

Reserved

*

CRB:10K ohm Check List 1.0:8.2K ohm

4 5 3 6 2 7 1 8

RP28 10K_8P4R_5 %RP28 10K_8P4R_5 %

R688 10K_0402_5%

12

@

Switchable Graph

GPIO21

0

Non SG

PCH_GPIO19

Debug Port DG 1.2 PH 4.7K +3VS

Boot BIOS Strap

1

R674

4.7K_0402_5%

GPIO51

LPC

0 0 0

-

SPI

1 1 1

E

+3VS

12

GPIO19

1 0

R703 3.3K_0402_5%R703 3.3K_0402_5%

+3VS

A

1 2

PCH_SPI_CS0# PCH_SPI_MISO_0 SPI_WP0#

2MB=16Mb

U42

1

CS#

2

SO

3

WP#

4

GND

W25Q16CVSSIG_SO8

SA00003FO10

VCC

HOLD#

SCLK

+3VS

8 7

SPI_HOLD0#

6

PCH_SPI_CLK_0

5

PCH_SPI_MOSI_0

SI

B

R701 3.3K_0402_5%R701 3.3K_0402_5%

12

Security Classification

Issued Date

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Do cument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC, XDP

V1JB1 M/B LA-A041P Schematic

E

13 52Wednesday, March 13, 2 013

0.1

A

Mini Card 1 On Board WLAN

Card Reader

1 1

2 2

Mini Card 1 (On Board WLAN)

PCIE_PRX_DTX_N124

PCIE_PRX_DTX_P124 PCIE_PTX_C_DRX_N124 PCIE_PTX_C_DRX_P124

PCIE_PRX_DTX_N232

PCIE_PRX_DTX_P232 PCIE_PTX_C_DRX_N232 PCIE_PTX_C_DRX_P232

SAGE 3G

No use PH 10K +3VALW

CLK_PCIE_MINI1#24 CLK_PCIE_MINI124

MINI1_CLKREQ#24

1 2

C573 0.1U_0402_16V7KC573 0.1U_0402_16V7K

1 2

C572 0.1U_0402_16V7KC572 0.1U_0402_16V7K

1 2

C574 0.1U_0402_16V7KC574 0.1U_0402_16V7K

1 2

C575 0.1U_0402_16V7KC575 0.1U_0402_16V7K

No use PH 10K +3VS

PCH_GPIO2013

No use PH 10K +3VS

No use PH 10K +3VALW

SAGE 3G

3 3

CLK_PCIE_CARD#32 CLK_PCIE_CARD32

CARD_CLKREQ#32

No use PH 10K +3VALW

CLK_RES_ITP#7 CLK_RES_ITP7

R1134 0_0201_5%@R1134 0_0201_5%@ R1135 0_0201_5%@R1135 0_0201_5%@

12 12

No use PH 10K +3VALW

AK14:CLKOUT_ITPXDP_N AK13:CLKOUT_ITPXDP_P

SAGE 3G

4 4

+3VS

+VCCSUS3_3

4 5 3 6 2 7 1 8

RP22 10K_8P4R_5%RP22 10K_8P4R_5%

4 5 3 6 2 7 1 8

RP21 10K_8P4R_5%RP21 10K_8P4R_5%

A

CARD_CLKREQ# PCH_GPIO25 PEG_CLKREQ# MINI1_CLKREQ#

PCH_GPIO73 PCH_GPIO44 PCH_GPIO45 PCH_GPIO46

B

PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 PCIE_PTX_DRX_N1 PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCH_GPIO73

MINI1_CLKREQ#

PCH_GPIO20

PCH_GPIO25

CARD_CLKREQ#

PCH_GPIO44

PEG_CLKREQ#

PCH_GPIO45

PCH_GPIO46

CLK_BCLK_ITP# CLK_BCLK_ITP

B

U37B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GP IO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GP IO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GP IO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GP IO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GP IO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GP IO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GP IO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GP IO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

SMBUSController

SML1ALERT# / PC HHOT# / GPIO74

PCI-E*

CLOCKS

CLKOUT_DP_N / C LKOUT_BCLK1_N

CLKOUT_DP_P / C LKOUT_BCLK1_P

CLKIN_GND1_N CLKIN_GND1_P

C

SMBALERT# / GP IO11

SMBCLK

SMBDATA

SML0ALERT# / GP IO60

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO7 5

CL_CLK1

Link

PEG_A_CLKRQ# / GPIO47

CLKIN_SATA_N / CKS SCD_N CLKIN_SATA_P / CKS SCD_P

FLEX CLOCKS

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_DMI2_N CLKIN_DMI2_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / G PIO64

CLKOUTFLEX1 / G PIO65

CLKOUTFLEX2 / G PIO66

CLKOUTFLEX3 / G PIO67

E12

SMB_ALERT#

H14

PCH_SMBCLK

C9

PCH_SMBDATA

A12

DRAMRST_CNTRL_PC H

C8

PCH_SML0CLK

G12

PCH_SML0DATA

C13

PCH_GPIO74

E14

PCH_SML1CLK

M16

PCH_SML1DATA

M7

T11

P10

M10

PCH_GPIO47

AB37 AB38

AV22

CLK_CPU_DMI#

AU22

CLK_CPU_DMI

AM12

CLK_CPU_DPLL#

AM13

CLK_CPU_DPLL

BF18

CLK_BUF_CPU_DMI#

BE18

CLK_BUF_CPU_DMI

BJ30

CLKIN_GND1#

BG30

CLKIN_GND1

G24

CLK_BUF_DREF_96M#

E24

CLK_BUF_DREF_96M

AK7

CLK_BUF_PCIE_SATA#

AK5

CLK_BUF_PCIE_SATA

K45

CLK_BUF_ICH_14M

H45

CLK_PCI_LPBACK

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

XCLK_RCOMP

K43

CLK_FLEX0

F47

CLK_FLEX1

H47

CLK_FLEX2

K49

DGPU_PRSNT#

DRAMRST_CNTRL_PC H 6

S3 reduse

CLK_CPU_DMI# 5 CLK_CPU_DMI 5

CLK_CPU_DPLL# 5 CLK_CPU_DPLL 5

1 2

R357 10K_0402_5 %R357 10K_0402_5%

1 2

R358 10K_0402_5 %R358 10K_0402_5%

1 2

R330 10K_0402_5 %R330 10K_0402_5%

1 2

R331 10K_0402_5 %R331 10K_0402_5%

1 2

R346 10K_0402_5 %R346 10K_0402_5%

1 2

R345 10K_0402_5 %R345 10K_0402_5%

1 2

R387 10K_0402_5 %R387 10K_0402_5%

1 2

R393 10K_0402_5 %R393 10K_0402_5%

1 2

R292 10K_0402_5 %R292 10K_0402_5%

R293 33_0402_5%

XEMC@

Reserve for EMI please close to PCH

R289

90.9_0402_1%

1 2

@

PAD

T52

@

PAD

T53

@

PAD

T21

D

No use PH 10K +3VALW

PH 2.2K +3VALW

No use PH 10K +3VALWS3 reduse

No use PH 10K +3VALW

PH 2.2K +3VALW

No use PH 10K +3VALW

120MHz for eDP.

12

1 2

C421 22P_0402_50V8J

XEMC@

+1.05VS_PCH

Pull down 10K ohm for using internal Clock

SAGE 3G

SAGE 3G DVT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

E

SAGE 3G

RP18

PCH_SMBCLK PCH_SMBDATA PCH_SML0CLK PCH_SML0DATA

PCH_SML1CLK

PCH_SML1DATA

DRAMRST_CNTRL_PC H

SMB_ALERT# PCH_GPIO74 PCH_GPIO47 DGPU_PRSNT#

DIS,Optimus

+3VS

PCH_SML1DATA

PCH_SML1CLK

CLK_PCI_LPBACK 17

3 4

Q22A

Q22A DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

XTAL25_IN

XTAL25_OUT

C744

C744 12P_0402_50V8J

12P_0402_50V8J

Title

Size Document Number Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet of

4 5 3 6 2 7 1 8

2.2K_8P4R_5%

1 2

R375 2.2K_0402_5%R375 2.2K_0402_5%

1 2

R369 2.2K_0402_5%R369 2.2K_0402_5%

1 2

R648 1K_0402_5%R648 1K_0402_5%

RP23

4 5 3 6 2 7 1 8

10K_8P4R_5%

GPIO67

DGPU_PRSNT#

0

UMA

5

SGD

2

G

6 1

S

D

S

D

Q22B

Q22B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

1

2

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

1

Pull up at EC side.

For DDR,EC

EC_SMB_DA2

EC_SMB_CK2

1 2

R611 1M_0402_5%R611 1M_0402_5%

25MHZ_10PF_7V25000014

3

GND

4

Y1

E

+VCCSUS3_3

EC_SMB_DA2 11,28

EC_SMB_CK2 11,28

1

GND

2

1

14 52Wednesday, March 13, 2013

+3VS

1

C745

C745 12P_0402_50V8J

12P_0402_50V8J

2

0.1

A

SAGE 3G

+3VLP

R341 100K_0402_5%R341 100K_0402_5%

+VCCSUS3_3

1 1

R373 200_0402_5%R373 200_0402_5%

RP24 10K_8P4R_5%RP24 10K_8P4R_5%

4 5 3 6 2 7 1 8

12

PCH_ACIN

PM_DRAM_PWR GD

PCH_GPIO72 PCH_GPIO30 RI# PCH_RSMRST#

SAGE 3G

not support Deep S4,S5 mux with SUS_PWR_DN_ACK

not support AMT APWROK can mux

2 2

with PWROK (check list1.0 P.40)

SAGE 3G

No use PH 10K +3VALW

SAGE 3G

12

C7530.1U_0201_10V6K

XEMC@

PM_DRAM_PWR GD

XDP_DBRESET#

T16PAD@ T16PAD@

3 3

Ring Indicator CRB1.0 PH 10K +3VALW

SUSACK#28

XDP_DBRESET#5

SAGE 3G

SA_PGOOD28,41

PM_DRAM_PWR GD5

PCH_RSMRST#28

SUSWARN#28

PBTN_OUT#28

ACPRESENT28

PCH_BATLOW#28

B

DMI_CTX_PRX_N04 DMI_CTX_PRX_N14 DMI_CTX_PRX_N24 DMI_CTX_PRX_N34

DMI_CTX_PRX_P04 DMI_CTX_PRX_P14 DMI_CTX_PRX_P24 DMI_CTX_PRX_P34

DMI_CRX_PTX_N04 DMI_CRX_PTX_N14 DMI_CRX_PTX_N24 DMI_CRX_PTX_N34

DMI_CRX_PTX_P04 DMI_CRX_PTX_P14 DMI_CRX_PTX_P24 DMI_CRX_PTX_P34

+1.05VS_PCH

R632 750_0402_1%R632 750_0402_1%

4mil width and place within 500mil of the PCH

PCH_GPIO30

R409 0_0402_5%

R372 0_0402_5%

R661 0_0402_5%

PCH_PWROK

R382 0_0402_ 5%

R412 0_0402_5%

R456

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

R625 49.9_0402_1%R625 49.9_0402_1%

1 2

S3@

1 2

1 2 1 2

1 2

0_0402_5%

1 2

@

R502 0_0402_5%

@

1 2

@

DMI_IRCOMP

DMI2RBIAS

XDP_DBRESET#_R

SYS_PWROK

PCH_PWROK_R

APWROK

R4870_0402_5% @ R4870_0402_5% @

R4930_0402_5% @ R4930_0402_5% @

PM_DRAM_PWR GD

PCH_RSMRST#

PCH_GPIO30

PBTN_OUT#

PCH_ACIN

PCH_GPIO72

RI#

U37C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PW R_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

C

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

1 2

R426

1 2

R421

PCH_PCIE_WAKE#

CLKRUN#

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

SLP_A#

SLP_SUS#

H_PM_SYNC

PCH_GPIO29

是是是是是是是是是是是是是是是是

S3@R426

S3@

NC

@R421

@

PCH_RSMRST#

0_0402_5%

DPWROK

0_0402_5%

T19 PAD

@

T18 PAD

@

T51 PAD

@

D

FDI_CTX_PRX_N0 4 FDI_CTX_PRX_N1 4 FDI_CTX_PRX_N2 4 FDI_CTX_PRX_N3 4 FDI_CTX_PRX_N4 4 FDI_CTX_PRX_N5 4 FDI_CTX_PRX_N6 4 FDI_CTX_PRX_N7 4

FDI_CTX_PRX_P0 4 FDI_CTX_PRX_P1 4 FDI_CTX_PRX_P2 4 FDI_CTX_PRX_P3 4 FDI_CTX_PRX_P4 4 FDI_CTX_PRX_P5 4 FDI_CTX_PRX_P6 4 FDI_CTX_PRX_P7 4

FDI_INT 4

FDI_FSYNC0 4

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_LSYNC1 4

DPWROK 28

PCH_PCIE_WAKE# 24

No use PH 10K +3VS

PM_SLP_S5# 28

PM_SLP_S4# 28

PM_SLP_S3# 28

SLP_SUS# 28

H_PM_SYNC 5

No use PH 10K +3VALW

SAGE 3G

Can be left NC when IAMT is not support on the platfrom

not support Deep S4,S5 can NC PCH EDS1.2 P.74

E

+RTCVCC

DSWODVREN

*

not support Deep S4,S5 DPWROK mux with RSMRST# check list1.0 P.42

PCH_PCIE_WAKE#

PCH_GPIO29

CLKRUN#

DPWROK

R361 330K_0402_5%R361 330K_0402_5%

R360 330K_0402_5%@R360 330 K_0402_5%@

DSWODVREN - On Die DSW VR Enable

H

：：：：

Enable internal DSW +1.05VS

L

：：：：

Disable

Must always PH at +RTCVCC

CRB=>1k ohm Follow Check Li st R1.5

R656 10K_0402_5%R656 10K_0402_5%

R395 10K_0402_5%@R395 10K_0402_5%@

R653 8.2K_0402_5%R653 8.2K_0402_5%

R667 100K_0402_5%R667 100K_0402_5%

12

+VCCSUS3_3

1 2

+3VS

1 2

CR CHKLST Rev2.0

For EMI

tell PCH all power ok but cpu core

PCH_PWROK28

4 4

A

12

R680

R680 10K_0402_5%

10K_0402_5%

VGATE42

+3VS

5

U39

2

B

1

A

3

ALL power OK

P

4

SYS_PWROK

Y

G

MC74VHC1G08DFT2G_SC70-5

12

R681

R681 10K_0402_5%

10K_0402_5%

B

1

C603

.047U_0402_16V7K

2

@

SYS_PWROK 5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM

V1JB1 M/B LA-A041P Schematic

E

of

15 52Wednesday, March 13, 2013

0.1

A

B

C

D

E

UMA Panel Backlight ON/OFF

ENBKL28

R612 0_0402_5%@R612 0_04 02_5%@

12

PD 100K at EC side

1 1

2 2

3 3

IGPU_BKLT_ENENBKL

U37D

PCH_ENVDD22

INVTPWM4 4

IGPU_BKLT_EN

Delete LVDS function

LVDS disable: DATA/Clock/Control can NC VCC_TX_LVDS,VCCA_LVDS connected to GND

CRT disable: DATA/Clock/Control can NC DAC_IREF still need PD VCCADAC connected to +3VS

CRT_IREF

For CRT diable =>Change 1K 0.5% to 5%

1K_0402_5%

R307

12

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGARPOINT_FCBGA989~D

HM77@

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

CRT

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA0 0005AGI0

DDPD_HPD

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

SDVO_CTRLDATA strap pull high at level shift page

P38

SDVO_SCLK

M39

SDVO_SDATA

AT49 AT47 AT40

PCH_DPB_HPD

AV42

PCH_DPB_N0

AV40

PCH_DPB_P0

AV45

PCH_DPB_N1

AV46

PCH_DPB_P1

AU48

PCH_DPB_N2

AU47

PCH_DPB_P2

AV47

PCH_DPB_N3

AV49

PCH_DPB_P3

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_SCLK 2 3 SDVO_SDATA 23

PCH_DPB_HPD 23

PCH_DPB_N0 23 PCH_DPB_P0 23 PCH_DPB_N1 23 PCH_DPB_P1 23 PCH_DPB_N2 23 PCH_DPB_P2 23 PCH_DPB_N3 23 PCH_DPB_P3 23

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

4 4

Security Classification

2011/06/24 2012/06/02

Issued Date

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/06/02

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH (4/9) LVDS,CRT,DP,HDMI

V1JB1 M/B LA-A041P Schematic

16 52Wednesday, Ma rch 13, 2013

E

0.1

A

B

C

D

E

+3VS

1 1

+3VS

2 2

GNT1#/ GPIO51

Internal PH

只只只只只只只只

Only GPIO function

3 3

不不不不如如如如只只只只只只只只

無無無無無無無無

SAGE 3G Reserve for RF / Close to PCH

SAGE 3G

RP8

4 5 3 6 2 7 1 8

10K_8P4R_5%

RP9

4 5 3 6 2 7 1 8

10K_8P4R_5%

RP12

4 5 3 6 2 7 1 8

10K_8P4R_5%

1 2

R267 10K_0402_5 %R267 10K_0402_5%

接接

1 2

R310 8.2K_0402_5%R310 8.2K_0402_5%

+3VS還還GND

Boot BIOS Strap

Boot BIOS

GPIO51GPIO19

Bit10

0

Destination

Reserved

Bit11

0 1

1

1 1

00

GPIO

的的的的的的的的的的的的的的的的的的的的要要要要

PH +3VS,

的的的的的的的的的的的的的的的的的的的的

strap function

如如如如如如如如

strap function

如如如如如如如如

12 12 12

GPIO

GPIO PH(Internal PH),

SAGE 3G R10

PCI_PIRQC# PCI_PIRQB#

PCI_PIRQA#

PCI_PIRQD#

PCH_GPIO55 PCH_GPIO53 PCH_GPIO52

PCH_GPIO5

PCH_GPIO51 PCH_GPIO2 ODD_DA# PCH_GPIO4

DGPU_PWR_EN

DGPU_HOLD_RST#

PCI

SPI

*

LPC

GPIO PH +3VS

CLK_PCI_LPBACK

C1061.8P_0402_50V8XEMC@ C1061.8P_0402_50V8X EMC@

CLK_PCI_LPC

C1071.8P_0402_50V8XEMC@ C1071.8P_0402_50V8X EMC@

CLK_PCI_TXM

C1081.8P_0402_50V8XEMC@ C1081.8P_0402_50V8X EMC@

CLK_PCI_LPBACK14

CLK_PCI_LPC28 CLK_PCI_TXM26

USB3.0

PCI Interrupt Requests

CLK_PCI_LPBACK CLK_PCI_LPC CLK_PCI_TXM

PCH_USB3_RX2_N27

PCH_USB3_RX2_P27

PCH_USB3_TX2_N27

PCH_USB3_TX2_P27

SAGE 3G

PLT_RST#26,28,31,32,5

PCH_USB3_RX2_N

PCH_USB3_RX2_P

PCH_USB3_TX2_N

PCH_USB3_TX2_P USB20_N3

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# PCH_GPIO52 DGPU_PWR_EN

PCH_GPIO51 PCH_GPIO53 PCH_GPIO55

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

T13PAD @T13PAD @

PLT_RST#

45

RP43

36 27 18

T7PAD @T7PAD @ T8PAD @T8PAD @

22_8P4R_5%

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4

SAGE 3G

PLT_RST#

IRST_RST#2 8

4 4

SAGE 3G

1 2

C1214 1U_0402_6.3V6KC1214 1U_ 0402_6.3V6K

+3VS

5

U26

2

PLT_RST#

MC74VHC1G08DFT2G_SC70-5

P

B

1

A

G

3

4

Y

12

R376

100K_0402_5%

PLT_RST_BUF# 24

U37E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28:USB3Rn1

BE28

TP25

BC30:USB3Rn2

BC30

TP26

BE32:USB3Rn3

BE32

TP27

BJ32:USB3Rn4

BJ32

TP28

BC28:USB3Rp1

BC28

TP29

BE30:USB3Rp2

BE30

TP30

BF32:USB3Rp3

BF32

TP31

BG32:USB3Rp4

BG32

TP32

AV26:USB3Tn1

AV26

TP33

BB26:USB3Tn2

BB26

TP34

AU28:USB3Tn3

AU28

TP35

AY30:USB3Tn4

AY30

TP36

AU26:USB3Tp1

AU26

AY26:USB3Tp2

TP37

AY26

AV28:USB3Tp3

TP38

AV28

AW30:USB3Tp4

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989~D

HM77@

AY7

NV_CE#0

AV7

NV_CE#1

AU3

NV_CE#2

BG4

NV_CE#3

AT10

NV_DQS0

BC8

NV_DQS1

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

Ball AY1 : DF_TVS

AV5 AY1

DF_TVS

AV10

AT8

AY5 BA2

AT12 BF3

C24

USB20_N0

A24

USB20_P0

C25

USB20_N1_R

B25

USB20_P1_R

C26

USB20_N2

A26

USB20_P2

K28 H28

USB20_P3

E28

USB20_N4

D28

USB20_P4

C28 A28 C29 B29 N28

Some PCH config not support USB port 6 & 7.

M28 L30

USB20_N8

K30

USB20_P8

G30

USB20_N9

E30

USB20_P9

C30

USB20_N10

A30

USB20_P10

L32

USB20_N11

K32

USB20_P11

G32 E32 C32 A32

C33

USBRBIAS

B33

A14

USB_OC0#

K20

USB_OC1#

B17

USB_OC2#

C16

USB_OC3#

L16

USB_OC4#

A16

USB_OC5#

D14

USB_OC6#

C14

USB_OC7#

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

RSVD

NV_RE#_WRB0 NV_RE#_WRB1

NV_WE#_CK0 NV_WE#_CK1

PCI

USB

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

DMI,FDI Termination Voltage

DF_TVS

DG1.2 CRB1.0 PH 2.2K series 1K For 2012 support

R654 1K_0402_5%R654 1K_0402_5%

Set to Vcc when HIGH

Set to Vss when LOW

+1.8VS

12

R651

2.2K_0402_5%

12

CLOSE TO THE BRANCHING POINT

USB20_N0 30

1 2

R713 0_0 402_5%@R713 0_0402_5%@

1 2

R710 0_0 402_5%@R710 0_0402_5%@

USB20_N2 31 USB20_P2 31 USB20_N3 22 USB20_P3 22

T15 PAD@ T15 PAD@ T17 PAD@ T17 PAD@

1 2

R714 0_0402_5%@R714 0_0402_5%@

1 2

R715 0_0402_5%@R715 0_0402_5%@

USB20_N10 27 USB20_P10 27 USB20_N11 33 USB20_P11 33

1 2

R620 22.6_0402_1%R 620 22.6_0402_1%

Within 500 mils

USB_OC0# 27

USB20_P0 30 USB20_N1 27 USB20_P1 27

3G

Touch Screen

USB20_N1 USB20_P1

CMOS Camera

USB20_N8 24 USB20_P8 24

Debug Port

H_SNB_IVB# 5

Sensor Hub

USB Connector

EHCI 1

EHCI 2

Bluetooth

SAGE 3G

USB_OC0# USB_OC2# USB_OC7# USB_OC5#

USB_OC1# USB_OC4# USB_OC3# USB_OC6#

RP14

4 5 3 6 2 7 1 8

10K_8P4R_5%

RP15

4 5 3 6 2 7 1 8

10K_8P4R_5%

+VCCSUS3_3

Sideband signal for Touch screen

R463

12

@

TS_INT#22

A

@

0_0402_5%

PCH_GPIO4

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

PCH (5/9) PCI, USB, NVRAM

V1JB1 M/B LA-A041P Schematic

E

17 52Wednesday, March 13, 2013

0.1

A

HDA_SYNC PH(PLL =+1.5VS)

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

H

：：：：

On-Die PLL voltage regulator enable

*

L

：：：：

On-Die PLL Voltage Regulator disable

+VCCSUS3_3

+3VLP

12

R422

4.7K_0402_5%

PCH_GPIO28

R417

@

1K_0402_5%

1 2

Debug Port DG 1.2 PH 4.7K +3VALW_PCH

1 2

R506 100K_0402_ 5%DS3@R506 100K_0402_5%DS3@

1 2

R362 10K_0402_5 %@R362 10K_0402_5%@

SAGE 3G

PCH_GPIO27

No use PH 10K +3VS

No use PH +3VALW

No use PH +3VS

No use PH 10K +3VS

1 1

Deep S4,S5 wake event signal RTC alarm,Power BTN,GPIO27 PCH_GPIO27 (Have internal Pull-High)

CRB1.0 PH 10K +3VALW

2 2

1 2

R364 10K_0402_5%R364 10K_0402_5%

WWAN_OFF#

No use PD 10K to GND

No use PH 10K +3VALW

No use PH 10K +3VS

No use can NC(+3VS power plane)

Can't PH

SATA2GP/GPIO36,SATA3GP/GPIO37

1.Used as for Mechanical Presence detect Use a weak external pull-up (150K-200k Ohms) to Vcc3_3 or use 10K external pull-up that is enabled only after PLTRST# de-assertion.

2.Used as GP Input (Pin HW default) Ensure GPI is not driven high during strap sampling window

3.Unused as GPIO or SATA*GP Use 8.2K-10K pull-down to ground.

+3VS

3 3

RP16

4 5 3 6 2 7 1 8

10K_8P4R_5%

RP17

4 5 3 6 2 7 1 8

10K_8P4R_5%

PCH_GPIO0 PCH_GPIO1 DGPU_HPD_INT# MSATA_DET#

DGPU_PWROK PCH_GPIO34 PCH_GPIO48 PCH_GPIO49

SAGE 3G

+VCCSUS3_3

1 2

R391 1K_0402_5%R391 1K_0402_5%

+3VS

RP29

4 5 3 6 2 7

4 4

1 8

10K_8P4R_5%

GPIO24 Unmultiplexed NOTE: GPIO24 configuration register bits are not cleared by CF9h reset event. CRB1.0 PH10K to +3VALW

EC_LID_OUT#

PCH_GPIO12 PCH_GPIO57 EC_KBRST# ODD_DETECT#

A

No use PH 10K +3VS

SATA5GP&TEMP_ALERT# CRB PH 10K +3VS

No use PH +3VALW

+3VS

UMA@

1 2

R429 10K_0402_5%

@

1 2

R430 10K_0402_5%

Muxless

*

nonMuxless

Define Q5LJ1(DDR3) or V1JV1(DDR3L)

+VCCSUS3_3

1 2

R458 10K_0402_5%

DDR3@

1 2

R457 10K_0402_5%

DDR3L@

*

DDR3L(V1JV1) DDR3

GPIO36/GPIO37 is Strap functionality that requires internal pull down to be sampled at rising PWROK. When uses as SATA2GP/SATA3GP for mechanical presence detect

-use a external pull up 150K-200K ohm to Vcc3_3 When used as GP input

-ensure GPI is not driven high during strap sampling window When Unused as GPIO or SATA*GP

-use 8.2K-10K pull-down check list page 47

B

HUB_DFU_EN#30

HUB_PWRGATE30

RAID0_DET25

EC_SCI#28

EC_SMI#28

EC LID SW OUT

EC_DS3_WAKE#28

EC_LID_OUT#28

MSATA_DET#25

R595 0_0 402_5%

Optimus(L)/ non optimus(H)

OPTIMUS_EN#

GPIO38

OPTIMUS_EN#

0 1

PCH_GPIO24

GPIO24

PCH_GPIO24

0 1

B

1 2

@

PCH_GPIO0

PCH_GPIO1

DGPU_HPD_INT#

EC_SCI#

EC_SMI#

PCH_GPIO12

EC_LID_OUT#

MSATA_DET#

DGPU_PWROK

PCH_GPIO22

PCH_GPIO24

PCH_GPIO27

PCH_GPIO28

PCH_GPIO34

PCH_GPIO35

ODD_DETECT#

WWAN_OFF#

OPTIMUS_EN#

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

PCH_GPIO68

R2560_0402_5%@R2560_0402_5%

PCH_GPIO35

R2490_0402_5%@R2490_0402_5%

PCH_GPIO1

R2580_0402_5%@R2580_0402_5%

C

SAGE 3G

U37F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

GPIO

CPU/MISC

NCTF

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

PROCPWRGD

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

C40

PCH_GPIO68

B41

PCH_GPIO69

C41

PCH_GPIO70

A40

PCH_GPIO71

P4

A20GATE

AU16

PECI

RCIN#

THRMTRIP#

INIT3_3V#

NC_1

NC_2

NC_3

NC_4

NC_5

2011/06/24 2012/06/02

PCH_PECI_R

P5

EC_KBRST#

AY11

AY10

PCH_THRMTRIP#_R

T14

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

Compal Secret Data

DDR3L-1333 DDR3L-1333 DDR3L-1333 DDR3L-1333 DDR3L-1600 DDR3L-1600 DDR3L-1600 DDR3L-1600

Deciphered Date

D

R616

@R616

@

10K_0402_5%

PCH_GPIO69 PCH_GPIO70

R619

10K_0402_5%

+3VS

T45 PAD@ T45 PAD@

1 2

R385 390_0402_5%R385 390_0402_5%

INIT3_3V

This signal has weak internal PU, can't pull low,leave NC

TS_VSS1~4 PD to GND

T46 PAD@ T46 P AD@

R419

R419 10K_0402_5%

10K_0402_5%

1 2

SAGE 3G

EC_KBRST# 28

H_CPUPWRGD 5

Check list1.0 P.59

SA000059110 / ELPIDA DDR3L-1333 SA00005FV10 / HYNIX DDR3L-1333 SA00005HT80 / ELPIDA DDR3L-1600

Elpida Mono 512MB*4(Ch A) Hynix Mono 512MB*4(Ch A) Elpida Mono 512MB*8(Ch A,B) Hynix Mono 512MB*8(Ch A,B) Elpida Mono 512MB*4(Ch A)

Elpida Mono 512MB*8(Ch A,B)

D

+3VS +3VS

12

1 2

R617

10K_0402_5%

TPM@

R621

10K_0402_5%

WOTPM@

HW, SW without support TPM Infineon TPM SLB9655

GATEA20 28

H_THRMTRIP#

+3VS

E

12

1 2

SW base on TPM table to detect HW TPM status

TPM Status GPIO70

GPIO69

0 0 1 1

+3VS

H_THRMTRIP# 5

PCH_GPIO68

x x

PECI CPU-EC

CTRL+ALT+DEL

non CPU power ok

130c shut sown

1 2

R324 10K_0402_5 %R324 10K_0402_5%

GPIO22GPIO23GPIO39

0 0 0

0 0

1 0 1 1 1

0 0 1 0 1 1

1 0 1 1 1

1 2

R274 10K_0402_5 %X76@R274 10K_0402_5%X76@

1 2

R275 10K_0402_5 %X76@R275 10K_0402_5%X76@

1 2

R278 10K_0402_5 %X76@R278 10K_0402_5%X76@

1 2

R279 10K_0402_5 %X76@R279 10K_0402_5%X76@

1 2

R281 10K_0402_5 %X76@R281 10K_0402_5%X76@

1 2

R282 10K_0402_5 %X76@R282 10K_0402_5%X76@

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (6/9) GPIO, CPU, MISC

V1JB1 M/B LA-A041P Schematic

PCH_GPIO22

PCH_GPIO23

PCH_GPIO39

E

PCH_GPIO23 13

18 52Wednesday, March 13, 2013

0 1 0 1

0 1 0

0.1

A

+1.05VS_VCCPP

PAD-OPEN 4x4m

1 1

On-Die PLL Voltage Regulator

H

：：：：

On-Die PLL voltage regulator enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

2 2

3 3

On-Die PLL Voltage Regulator

H

：：：：

On-Die PLL voltage regulator enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

4 4

J3

@J3

@

+1.05VS_PCH

1

2

+3VS

SAGE 3G

12

C754

10U_0603_6.3V6M@C754

10U_0603_6.3V6M

C519

1U_0402_6.3V6K

C519

1U_0402_6.3V6K

1

12

@

2

Place Near AA23

SAGE 3G

C543

10U_0603_6.3V6M

C543

10U_0603_6.3V6M

1

2

C486

1U_0402_6.3V6K@C486

1U_0402_6.3V6K

C496

1U_0402_6.3V6K

C496

1U_0402_6.3V6K

1

@

2

Place Near AN16,AN21,AN33

1

C749

0.1U_0402_16V7K

Place Near BH29

0.1U_0402_16V7K

2

+VCCAFDI_VRM

SAGE 3G

A

C517

1U_0402_6.3V6K

C517

1U_0402_6.3V6K

1

2

T33PAD @T33PAD @

C474

1U_0402_6.3V6K

C474

1U_0402_6.3V6K

1

2

SAGE 3G

+1.05VS_VCCAPLL_FDI

@

T14PAD@T14PAD

+1.05VS_PCH

U37G

PPT:1700mA CPT:1300mA

1

C491

C491 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Near AU20

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

PPT:3711mA CPT:3709mA

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989~D

SA00005AGI0

SA00005AGI0 HM77@

HM77@

+1.5VS

VCCVRM==>1.5V FOR MOBILE VCCVRM==>1.8V FOR DESKTOP VCCVRM = 160mA detal waiting for newest spec

配配配配

HDA_SYNC PH(PLL =+1.5VS)

+1.05VS_PCH +VCCADAC

C505

1U_0402_6.3V6K

C505

1U_0402_6.3V6K

1

2

+VCCAPLLEXP

C492

1U_0402_6.3V6K@C492

1U_0402_6.3V6K

1

@

2

Trace 20mil

B

POWER

PPT:63mA

VCC CORE

CPT:1mA

40mA

CRTLVDS

1mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

228mA

VCC3_3[7]

PPT:167mA CPT:175mA

PPT:47mA CPT:42mA

VCCIO

FDI

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!

1 2

R394 0_0402_5%@R394 0_0402_5%@

B

2mA

DMI

NAND / SPI HVCMOS

10mA

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

+VCCAFDI_VRM

C

Thermal Senser share with VCCADAC power rail so can't remove this power

C419

0.01U_0402_16V7K

+VCCA_LVDS

+3VS

1

2

+1.05VS_PCH

1

C480

C480 1U_0402_6.3V6K

1U_0402_6.3V6K

place

2

near AB36

+1.8VS

1

2

+3VS

1

C770

C770 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VCCAFDI_VRM

Place Near U48

1

2

12

0_0402_5%

@

R270

Place Near V33

C449

0.1U_0402_16V7K

+VCCAFDI_VRM

+1.05VS_PCH

1

C477

C477 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C523

0.1U_0201_10V6K

place near AG16

C420

0.1U_0402_16V7K

1

2

SAGE 3G

Trace 20mil

place near AT20

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

VCCPNAND change to VccDFTERM

V1

HCB1608KF-221T2_2P

C418

C418 10U_0603_6.3V6M

10U_0603_6.3V6M

L23

+3VS

12

+VCCTX_LVDS

SAGE 3G R10

12

0_0402_5%

@

R280

I/O Buffer Voltage

Internal PLL and VRM(+1.5VS)

DMI buffer logic

Core Well I/O Buffer

VccDFTERM should PH +1.8VS or +3VS

For SPI control logi

Compal Secret Data

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

SAGE 3G

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

VccIO 2.925

VccASW 1.01

VccSPI 0.02

VccDSW 0.003

Voltage

1.05

5

3.3

1.05

3.3

S0 Iccmax Current(A)

0.001

0.266

0.001

0.08

1.3

0.042

1.8 0.19VccpNAND

VccRTC 6 uA

VccSus3_3

3.3

0.266

3.3

3.3 / 1.5VccSusHDA

0.01

VccVRM 1.8 / 1.5 0.16

VccCLKDMI

VccSSC 0.095

VccDIFFCLKN 0.055

VccALVDS

VccTX_LVDS 0.06

D

1.05

3.3

1.8

0.02

0.001

E

Processor I/F

PCH Core Well Reference Voltage

Suspend Well Reference Voltag

I/O Buffer Voltage

Display DAC Analog Power. This power is supplied by the core well.

Display PLL A power

Display PLL B power

Internal Logic Voltage

DMI Buffer Voltage

Core Well I/O buffers

1.05 V Supply for Intel R Management Engine and Integrated LAN

3.3 V Supply for SPI Controller Logic

3.3v supply for Deep S4/S5 well

1.8V power supply for DF_TVS

Battery Voltage

Suspend Well I/O Buffer Voltage

High Definition Audio Controller Suspend Voltage

1.8 V Internal PLL and VRMs (1.8 V for Desktop)

DMI Clock Buffer Voltage

Spread Modulators Power Supply

Differential Clock Buffers Power Supply

Analog power supply for LVDS (Mobile Only) Analog power supply for LVDS (Mobile Only)

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (7/9) PWR

V1JB1 M/B LA-A041P Schematic

E

19 52Tuesday, March 26, 2013

0.1

A

+3VS

L26

10UH_LB2012T100MR_20%

1 2

10U_0603_6.3V6M

1 1

C465

+3VS_VCC_CLKF33

1

2

Near T38

+1.05V analog internal clock PLL Can NC

C440

1U_0402_6.3V6K

C440

1U_0402_6.3V6K

1

Not support Deep S4,S5 connect to +3VALW

2

suppied by internal

1.05V VR must NC

SAGE 3G

GPIO28

On-Die PLL Voltage Regulator

H

：：：：

On-Die PLL voltage regulator enable

,VCCAPLLSATA

+3VLP +VC CDSW3_3

1 2

R276 0_0402_5%@R276 0_0402_5%@

2 2

suppied by internal

1.05V VR must NC

SAGE 3G

+1.05VS_PCH

3 3

+1.05VS_PCH

C524

1

1U_0402_6.3V6K

Place

2

near AF17

isolation between SSC (AG33) and DIFFCLKN(AF33,AF34,AG34) 18mil width(DIFFCLKN) 10mil (SSC)

4 4

L54

10UH_LB2012T100MR_20%

1 2

L49

10UH_LB2012T100MR_20%

+1.05VS_PCH

+1.05VS_VCCA_A_DPL

C751

22U_0805_6.3V6M

C751

22U_0805_6.3V6M

1

2

+1.05VS_VCCA_B_DPL

C752

22U_0805_6.3V6M

C752

22U_0805_6.3V6M

1

2

SAGE 3G

C467

1

1U_0402_6.3V6K

Place

2

near AF33, AF34,AG34

C426

1U_0402_6.3V6K

C426

1U_0402_6.3V6K

1

Near BD47

2

C429

1U_0402_6.3V6K

C429

1U_0402_6.3V6K

1

Near BF47

2

suppied by internal

1.05V VR Must NC

SAGE 3G

+1.05VS_PCH

1

2

C476

C476 1U_0402_6.3V6K

1U_0402_6.3V6K

Place near AG33

+1.05VS_PCH

Near N16

C521 0.1U_0201_10V6KC521 0.1U_0201_10V6K

VCCIO[8,9, 11] change to VccDIF FCLKN VCCIO[10] change to VccSSC

Near V16

4.7U_0603_6.3V6K

1

2

Place near BJ8

SAGE 3G

A

+1.05VS_PCH

1U_0402_6.3V6K@C518

1U_0402_6.3V6K

1

2

C544

C537

0.1U_0402_16V7K

C537

0.1U_0402_16V7K

1

2

B

+1.05VS_PCH

+VCCDSW3_3

1

2

T12PAD @T12PAD @

T32PAD @T32PAD @

T9PAD @T9PAD @

1

2

C518

1

@

2

Near AA19

12

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

T10PAD@T10PAD

C541

0.1U_0201_10V6K

C541

0.1U_0201_10V6K

1

2

B

R273

@R273

@

1 2

0_0402_5%

C520

0.1U_0402_16V7K

Near T16

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCAPLL_CPY_PCH

+1.05VS_PCH

+VCCSUS1

C547

22U_0805_6.3V6M

C547

22U_0805_6.3V6M

C552

22U_0805_6.3V6M

C552

22U_0805_6.3V6M

1

2

C513

1U_0402_6.3V6K

C513

1U_0402_6.3V6K

C478

1U_0402_6.3V6K

C478

1U_0402_6.3V6K

1

2

+VCCRTCEXT

12

C526 0.1U_0201_10V6KC526 0.1U_0201_10V6K

+1.05VM_VCCSUS

@

+RTCVCC

0.1U_0402_16V7K

C493

1U_0402_6.3V6K

C493

1U_0402_6.3V6K

1

2

Near A22

+VCCACLK

+VCCSST

0.1U_0402_16V7K

C494

1

2

U37J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCIO[8]

AF34

VCCIO[9]

AG34

VCCIO[11]

AG33

VCCIO[10]

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

1mA

BJ8

V_PROC_IO

A22

VCCRTC

C495

COUGARPOINT_FCBGA989~D

HM77@

POWER

1mA

Deep S3 PPT:126mA CPT:119mA

903mA

Clock and Miscellaneous

PPT:80mA CPT:75mA

55mA

95mA

CPURTC

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

C

D

For Deep S3 turn off +V5REF_SUS,+VCCSUS3_3

@J13

@

2

12

SAGE 3G

+VCCSUS3_3

C817

0.1U_0201_10V6K

C817

0.1U_0201_10V6K

1

2

R334

100_0402_5%

RB751V-40_SOD323-2

PCI/GPIO/LPCMISC

SATA USB

HDA

1mA

10mA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

V5REF

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+1.05VS_PCH

1

C468

C468 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C490

0.1U_0402_16V7K

2

+1.05VS_PCH

+PCH_V5REF_SUS

+VCCA_USBSUS

+VCCSUS3_3

+PCH_V5REF_RUN

+1.05VS_PCH

+VCCSATAPLL

+1.05VS_PCH

1

C473

0.1U_0201_10V6K

2

PCH_PWR_EN#34

Near N26

SAGE 3G

1

C497

0.1U_0402_16V7K

2

Near M26

T11 PAD @

PAD @

1

C501

0.1U_0201_10V6K

2

1

C771

0.1U_0402_16V7K

Place near

2

AJ2

Near AH13,AH14,AF13

1

C533

C533 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VCCAFDI_VRM

Near N20

@C771

@

T48 PAD@ T48 PAD@

0.1U_0402_16V4Z

+VCCSUS3_3

1 2

C484

T11

Near AC16

1

C482

C482 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW

AP2301GN-HF_SOT23-3 DS3@

1 2

R756

2.2K_0402_5%

DS3@

0.01U_0402_16V7K

+VCCSUS3_3

Near P24Near T23VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2

RB751V-40_SOD323-2

suppied by internal

1.05V VR Must NC

SAGE 3G

1

C522

0.1U_0402_16V7K

Place near

2

AA16,W16

GPIO28

SAGE 3G

On-Die PLL Voltage Regulator

H

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

+1.05VS_PCH

+VCCSUS3_3

J13

112

JUMP_43X39

3 1

Q68

2

1

C819

2

DS3@

+VCCSUS3_3 +V5REF_SUS

21

D16

+3VS

1

C471

@C471

@

0.1U_0402_16V7K

Place near

2

T34

：：：：

On-Die PLL voltage regulator enable

Need +3VALW and 0.1U close PCH

Near P32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

E

+V5REF_SUS

0.1U_0402_16V7K

1

2

10mil20mil

R752

20K_0402_5%

R752

20K_0402_5%

12

C816

12

R755

20K_0402_5%

R755

20K_0402_5%

PCH_PWR_EN#

+5VALW

AP2301GN-HF_SOT23-3 DS3 @

1 2

1K_0402_5%

DS3@

0.01U_0402_16V7K

R757

C820

DS3@

1 2

S3@

R751 0_0402_5%

3 1

Q64

2

1

2

SAGE 3G

+3VS +5VS

21

12

D14

C470

1U_0402_10V6K

D14

R321

100_0402_5%

1

2

Near P34

(RF requirement)

+VCCSUS3_3

XEMC@

18P_0201_50V8J

C511

1

2

Title

Size Document Number Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet of

+1.05VS_PCH +PCH_V5REF_SUS

XEMC@

18P_0201_50V8J

C515

1

2

Compal Electronics, Inc.

PCH (8/9) PWR

XEMC@

18P_0201_50V8J

C525

C512

1

2

C512

1

2

E

XEMC@

18P_0201_50V8J

1

2

C514

20 52Wednesday, March 13, 2013

0.1

A

1 1

2 2

3 3

4 4

A

U37H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

B

U37I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

B

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBGA989~D

HM77@

C

H46

VSS[259]

K18

VSS[260]

K26

VSS[261]

K39

VSS[262]

K46

VSS[263]

K7

VSS[264]

L18

VSS[265]

L2

VSS[266]

L20

VSS[267]

L26

VSS[268]

L28

VSS[269]

L36

VSS[270]

L48

VSS[271]

M12

VSS[272]

P16

VSS[273]

M18

VSS[274]

M22

VSS[275]

M24

VSS[276]

M30

VSS[277]

M32

VSS[278]

M34

VSS[279]

M38

VSS[280]

M4

VSS[281]

M42

VSS[282]

M46

VSS[283]

M8

VSS[284]

N18

VSS[285]

P30

VSS[286]

N47

VSS[287]

P11

VSS[288]

P18

VSS[289]

T33

VSS[290]

P40

VSS[291]

P43

VSS[292]

P47

VSS[293]

P7

VSS[294]

R2

VSS[295]

R48

VSS[296]

T12

VSS[297]

T31

VSS[298]

T37

VSS[299]

T4

VSS[300]

W34

VSS[301]

T46

VSS[302]

T47

VSS[303]

T8

VSS[304]

V11

VSS[305]

V17

VSS[306]

V26

VSS[307]

V27

VSS[308]

V29

VSS[309]

V31

VSS[310]

V36

VSS[311]

V39

VSS[312]

V43

VSS[313]

V7

VSS[314]

W17

VSS[315]

W19

VSS[316]

W2

VSS[317]

W27

VSS[318]

W48

VSS[319]

Y12

VSS[320]

Y38

VSS[321]

Y4

VSS[322]

Y42

VSS[323]

Y46

VSS[324]

Y8

VSS[325]

BG29

VSS[328]

N24

VSS[329]

AJ3

VSS[330]

AD47

VSS[331]

B43

VSS[333]

BE10

VSS[334]

BG41

VSS[335]

G14

VSS[337]

H16

VSS[338]

T36

VSS[340]

BG22

VSS[342]

BG24

VSS[343]

C22

VSS[344]

AP13

VSS[345]

M14

VSS[346]

AP3

VSS[347]

AP1

VSS[348]

BE16

VSS[349]

BC16

VSS[350]

BG28

VSS[351]

BJ28

VSS[352]

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA 00005AGI0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

Custom

Date: Sheet of

D

Date: Sheet of

E

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

PCH (9/9) VSS

V1JB1 M/B LA-A041P Schematic

E

21 52Wednesday, March 13, 2013

0.1

5

4

3

2

1

Panel POWER CIRCUIT

SM010014520 3000ma

+LCDVDD

W=60mils

SAGE 3G

C562

D D

+3VS

1

C489

C489 1U_0402_6.3 V6K

1U_0402_6.3 V6K

2

U2007

5

IN

4

IN

G5243T11U_SOT23-5

SA000028Y00

OUT

GND

+LCDVDD

1

2

3

EN

W=60mils

R186

0_0402_5%

1 2

@

1

C542

0.1U_0402_1 6V4Z

@

2

4.7U_0603_6 .3V6K

PCH_ENVDD 16

SAGE 3G PVT

C562

1

2

C10

0.1U_0402_1 6V4Z

2

220ohm@100mhz DCR 0.04

+LG_VOUT +INVPWR_ B+

FBMA-L11-201 209-221LMA30T_0805

L1

68P_0402_5 0V8J

W=40mils

12

1

C7

2

1

C11

C11 680P_0402_ 50V7K

680P_0402_ 50V7K

2

eDP PANEL Conn.

+INVPWR_B+

C C

SAGE 3G

EDP_AUXN4 EDP_AUXP4

EDP_TXP04 EDP_TXN04

EDP_TXP14 EDP_TXN14

1 2 1 2

Touch Screen

B B

FB444 FB344 FB244 FB144

60mils

+LCDVDD

C9150 .1U_0402_16V7K eDP@ C9150 .1U_0402_16V7K eDP@ C9140 .1U_0402_16V7K eDP@ C9140 .1U_0402_16V7K eDP@

C9100 .1U_0402_16V7K eDP@ C9100 .1U_0402_16V7K eDP@ C9110 .1U_0402_16V7K eDP@ C9110 .1U_0402_16V7K eDP@

C9120 .1U_0402_16V7K eDP@ C9120 .1U_0402_16V7K eDP@ C9130 .1U_0402_16V7K eDP@ C9130 .1U_0402_16V7K eDP@

R465 0_0402_ 5%

+3VS

USB20_N317

USB20_P31 7

TS_INT#17

EDP_HPD

+5V_TS

@

EDP_AUXN_C EDP_AUXP_C

EDP_TXP0_C EDP_TXN0_C

EDP_TXP1_C EDP_TXN1_C

12

W=40mils

I-PEX_20455-030 E-12

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

CONN@

JEDP1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

31

G1

32

G2

33

G3

34

G4

+5VS

J18

112

JUMP_43X39

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

+5V_TS

@J18

@

2

10mil

EDP_HPD#4

D

eDP@

Q29

DMN65D8LW -7_SOT323-3

Compal Secret Data

2011/06/24 2012/06/02

3

Compal Secret Data

Q29

SB00000UO00

Deciphered Date

S

13

2

EDP_HPD

G

12

eDP@

R480

100K_0402_ 5%

Date: Sheet of

2

Date: Sheet of

JEDP1

I-PEX_20455-030E-12_30P-T

SAGE 3G

USB20_N3

USB20_P3

Title

Size Document Num ber Rev

Custom

V1JB1 M/B LA-A041P Schematic

D15

3

2

Compal Electronics, Inc.

LVDS Connector

1

TVNST52302AB0_SOT52 3-3

XEMC@

XEMC@ SCA00001W0 0

SCA00001W0 0

1

22 52Wednesday, Ma rch 13, 2013

0.1

5

R242

@R2 42

@

0_0603_5%

1 2

D10

+5VS

D D

2 1

RB491D-YS_SOT23-3

+HDMI_5V

1.1A_6VDC_FUSE

F1

W=40mils

+HDMI_5V_OUT

21

1

C345

0.1U_0402_1 6V4Z

2

SAGE 3G

PCH_DPB_N016 PCH_DPB_P016

PCH_DPB_N116 PCH_DPB_P116

PCH_DPB_N216 PCH_DPB_P216

PCH_DPB_N316 PCH_DPB_P316

C C

+3VS

1 2

R250 2.2K_0402_5 %R250 2.2K_0402_5 %

1 2

R253 2.2K_0402_5 %R253 2.2K_0402_5 %

C280 0.1U_0402_ 16V7KC280 0.1U_0402_ 16V7K C281 0.1U_0402_ 16V7KC281 0.1U_0402_ 16V7K

C283 0.1U_0402_ 16V7KC283 0.1U_0402_ 16V7K C282 0.1U_0402_ 16V7KC282 0.1U_0402_ 16V7K

C287 0.1U_0402_ 16V7KC287 0.1U_0402_ 16V7K C286 0.1U_0402_ 16V7KC286 0.1U_0402_ 16V7K

C285 0.1U_0402_ 16V7KC285 0.1U_0402_ 16V7K C284 0.1U_0402_ 16V7KC284 0.1U_0402_ 16V7K

12 12

SDVO_SCLK

SDVO_SDATA

Pull high at connector side

SDVO_SCLK16

SDVO_SDATA16

B B

SDVO_SDATA

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

+3VS

RB751V-40_SOD3 23-2

SAGE 3G

2

G

61

S

D

S

D

Q16B

Q16B DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

Place closed to JHDMI1

4

21

D12

R257

5

34

SGD

Q16A

Q16A DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

R257

1 2

D3

HDMI_R_CK- HDMI_R_CK-

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D2+

HDMI_R_D2-

HDMI_R_D1+

HDMI_R_D1-

+HDMI_5V_OUT

21

D11

D11 RB751V-40_SOD3 23-2

RB751V-40_SOD3 23-2

R255

1 2

2.2K_0402_5%

1

2

4

5

3

8

TVWDF1004AD0 _DFN

D13

1

2

4

5

3

8

TVWDF1004AD0 _DFN

HDMI_SCLKSDVO_SCLK

HDMI_SDATA

3

9

10

8

HDMI_R_CK+HDMI_R_CK+

9

7

HDMI_R_D0-

7

6

HDMI_R_D0+

65

XEMC@

9

HDMI_R_D2+

10

8

HDMI_R_D2-

9

7

HDMI_R_D1+

7

6

HDMI_R_D1-

65

XEMC@

SAGE 3G DVT SD034499080 S RES 1/16W 499 +-1% 0402

HDMI_SCLK

HDMI_SDATA

HDMI_HPD

SC300002800 S DIO(BR) TVWDF1004AD0 DFN ESD

D7

1

2

4

5

3

8

TVWDF1004AD0 _DFN

9

HDMI_SCLK

10

8

HDMI_SDATA

9

7

HDMI_HPD

7

6

65

XEMC@

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

2

HDMI_CLK-

HDMI_CLK+

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2-

SAGE 3G R10

1 2

R592 499_0402 _1%R592 499_0402 _1%

1 2

R594 499_0402 _1%R594 499_0402 _1%

1 2

R583 499_0402 _1%R583 499_0402 _1%

1 2

R587 499_0402 _1%R587 499_0402 _1%

1 2

R564 499_0402 _1%R564 499_0402 _1%

1 2

R570 499_0402 _1%R570 499_0402 _1%

1 2

R573 499_0402 _1%R573 499_0402 _1%

1 2

R590 499_0402 _1%R590 499_0402 _1%

+3VS

SM070001310 400ma 90ohm@100mhz DCR 0.3

1 2

R575 0_0402_5%@R57 5 0_0 402_5%@

L38

L38 DLW21SN900 HQ2L_0805

DLW21SN900 HQ2L_0805

XEMC@

L36

L36 DLW21SN900 HQ2L_0805

DLW21SN900 HQ2L_0805

XEMC@

L39

L39 DLW21SN900 HQ2L_0805

DLW21SN900 HQ2L_0805

XEMC@

L40

L40 DLW21SN900 HQ2L_0805

DLW21SN900 HQ2L_0805

XEMC@

HDMI_GND

1

4

R585 0_0402_5%@R58 5 0_0 402_5%@

R565 0_0402_5%@R56 5 0_0 402_5%@

1

4

R571 0_0402_5%@R57 1 0_0 402_5%@

R584 0_0402_5%@R58 4 0_0 402_5%@

1

4

R586 0_0402_5%@R5 86 0_0402_5%@

R591 0_0402_5%@R5 91 0_0402_5%@

1

4

R593 0_0402_5%@R5 93 0_0402_5%@

61

G

2

1

4

1 2

1

4

1 2

1

4

1 2

1

4

1 2

D

Q14B

S

DMN66D0LDW -7_SOT363-6

2

SM070001E0 0

3

2

SM070001E0 0

3

2

SM070001E0 0

3

2

SM070001E0 0

3

1

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+HDMI_TX2+

Micro HDMI connector PCB Footrpint : E-T_0733K-S19M-00R_19P-T-S

+3VS

+HDMI_5V_OUT

12

R198

1M_0402_5 %

PCH_DPB_HPD16

A A

5

Q14A

Q14A DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

34

SGD

R219

100K_0402_ 5%

HDMI_HPDHDMI_HPD

1

12

C324

C324 100P_0402_ 50V8J

100P_0402_ 50V8J

2

4

Security Classification

2011/06/24 2012/06/02

Issued Date

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/06/02

3

Compal Secret Data

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

HDMI_HPD

Deciphered Date

JHDMI1

19

+5V

18

SDA

17

SCL

16

DDC/CEC_GND

15

CEC

14

CK-

13

CK_shield

12

CK+

11

D0-

10

D0_shield

9

D0+

8

D1-

7

D1_shield

6

D1+

5

D2-

4

D2_shield

3 2 1

E-T_0733K-S19M -00R_19P-T

GND

D2+

GND

Utility

GND

HP_DET

GND

E&T_0733K-S19M -00R

CONN@

2

20 21 22 23

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

HDMI Connector

V1JB1 M/B LA-A041P Schematic

23 52Tuesday, March 26, 2013

1

0.1

5

4

3

2

1

For Wireless LAN

60mil

J10

1 2

JUMP_43 X79

@

D D

@

Without Support ISCT

+3VALW +3VS_W LAN

1

C2109

1U_0402 _6.3V6K

C C

1U_0402 _6.3V6K

2

BT_ON#

BT_CTRL

BT_ON#28

+3VS_W LAN+3VS +3VS_ WLAN

1

C403

4.7U_060 3_6.3V6K

2

Support ISCT

U2008

5

IN

4

IN

G5243T1 1U_SOT23-5

SA00002 8Y00

OUT

GND

EN

BT BT

Enable Disable

L H

H L

13

D

2

G

S

1

C735

0.1U_040 2_16V4Z

2

1

40mil(1A)

2

3

1

2

BT_CTRL

Q62

2N7002K W_SOT323 -3

R185

0_0402_ 5%

1 2

@

C539

0.1U_040 2_16V4Z

@

SAGE 3G

Mini Card Power Rating

+3VS_W LAN

1

C387

0.1U_040 2_16V4Z

@

2

SAGE 3G

AOAC_ON 28

SAGE 3G PVT

SAGE 3G

CLK_PCIE_ MINI1#14

CLK_PCIE_ MINI114

MINI1_CLKREQ #14

PCIE_PRX_ DTX_N114

PCIE_PRX_ DTX_P114 PCIE_PTX_ C_DRX_P114 PCIE_PTX_ C_DRX_N114

USB20_P 817 USB20_N 817

PLT_RST _BUF#17 PCH_PCIE_ WAKE#15 EC_PCIE_WAKE#2 8,31

WL_ OFF#28

+3VS_W LAN

1 2

R427 10K_0 402_5%R427 10K_0402_ 5%

1 2

R464 10K_0 402_5%@R464 10 K_0402_5%@

1 2

R702 0_040 2_5%@R 702 0_0402_5%@

1 2

R490 0_040 2_5%@R 490 0_0402_5%@

1 2

R491 0_040 2_5%@R 491 0_0402_5%@

A4,D12,F5,F9,F10,G5

-> GND at MD225

-> NC at MD222

+3VS_W LAN

PCH_PCIE_ WAKE#_R

BT_CTRL _RBT_CTRL

T74PA D @T74 PAD @

PCH_PCIE_ WAKE#_R

MINI1_CLKREQ #

BT_LED

U1

F12

3V3

G4

3.3VAUX

L4

REFCLK-

L5

REFCLK+

F1

CLKREQ_L

L6

PERN0

L7

PERP0

L8

PETN0

L9

PETP0

G9

USB_D+

G10

USB_D-

D1

PERST_L

E1

WAKE_L

G6

WIFI_DISABLE

G7

WIFI_LED

E12

BT_DISABLE

G8

BT_LED

F4

NC

G1

GND[1]

G3

GND[2]

G5

GND[3]

G12

GND[4]

H1

GND[5]

H2

GND[6]

H11

GND[7]

H12

GND[8]

L1

GND[9]

L2

GND[10]

L3

GND[11]

L10

GND[12]

L11

GND[13]

L12

GND[14]

F10

GND[15]

F9

GND[16]

F8

GND[17]

T77H281 .01_81P

PK29S00 3M00

PK29S00 3M00 FOXMD22 2@

FOXMD22 2@

Power

Clock

PCIE signal

USB signal

Control

GND

GND[18] GND[19] GND[20] GND[21] GND[22] GND[23] GND[24] GND[25] GND[26] GND[27] GND[28] GND[29] GND[30] GND[31] GND[32] GND[33] GND[34] GND[35] GND[36] GND[37] GND[38] GND[39] GND[40] GND[41] GND[42] GND[43] GND[44] GND[45] GND[46] GND[47] GND[48] GND[49] GND[50] GND[51] GND[52] GND[53] GND[54] GND[55] GND[56] GND[57] GND[58] GND[59] GND[60] GND[61] GND[62] GND[63]

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 B1 B2 B11 B12 C1 C4 C5 C6 C7 C8 C9 C10 C12 D3 D4 D5 D6 D7 D8 D9 D10 D12 E3 E4 E5 E6 E7 E8 E9 E10 F3 F5 F6 F7

B B

A A

Security Class ification

2011/06/ 24 2012/06/ 02

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 24 2012/06/ 02

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

On Board WLAN

24 52Wed nesday, March 13, 2013

1

0.1

A

For mSATA

60mil

+3VS_FU LL +1.5VS+3VS +3 VS_FULL

J8

1 2

JUMP_43 X79

@

1 1

2 2

@

1

C455

4.7U_060 3_6.3V6K

2

SAGE 3G

1

C475

0.1U_040 2_16V4Z

2

1

C466

0.1U_040 2_16V4Z

2

B

20mil

1

C442

0.1U_040 2_16V4Z

2

1

C441

0.1U_040 2_16V4Z

2

SATA_PT X_DRX_N113

SATA_PT X_DRX_P113

SATA_PR X_DTX_P113

SATA_PR X_DTX_N113

SATA_PR X_DTX_P013

SATA_PR X_DTX_N013

SATA_PT X_DRX_N013

SATA_PT X_DRX_P013

E51TXD_ P80DATA28

E51RXD_ P80CLK28

C

SAGE 3G

1 2

C625 0 .01U_0402_16V 7K@ C 625 0.01U_0 402_16V7K@

1 2

C627 0 .01U_0402_16V 7K@ C 627 0.01U_0 402_16V7K@

1 2

C628 0 .01U_0402_16V 7K@ C 628 0.01U_0 402_16V7K@

1 2

C626 0 .01U_0402_16V 7K@ C 626 0.01U_0 402_16V7K@

SATA_PT X_C_DRX_N1 SATA_PT X_C_DRX_P1

SATA_PR X_C_DTX_P1 SATA_PR X_C_DTX_N1

From DG=>Change to 0.01u

1 2

C621 0 .01U_0402_16V 7KC 621 0.01U_04 02_16V7K

1 2

C622 0 .01U_0402_16V 7KC 622 0.01U_04 02_16V7K

1 2

C623 0 .01U_0402_16V 7KC 623 0.01U_04 02_16V7K

1 2

C624 0 .01U_0402_16V 7KC 624 0.01U_04 02_16V7K

+3VS_FU LL

18 27

MSATA_D ET#18

100K_04 02_5%

R300

12

36 45

RP42 1K_ 8P4R_5%RP42 1K _8P4R_5%

1 2

R476 0_040 2_5%@R 476 0_0402_5%@

SATA_PR X_C_DTX_P0 SATA_PR X_C_DTX_N0

SATA_PT X_C_DRX_N0 SATA_PT X_C_DRX_P0

E51TXD_ P80DATA_R E51RXD_ P80CLK_R

D

JMINI1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

ACES_51 700-0520W-0 01

CONN@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

GND2

JMINI1 SP07000LL00 ACES_51700-0520W-001_52P

E

Function

Port0,1

+3VS_FU LL+1.5 VS

12

R329

100K_04 02_5%

Port0

RAID0_DET

H

L

RAID0_DET 18

3 3

4 4

Security Class ification

2011/06/ 24 2012/06/ 02

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 24 2012/06/ 02

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

mSATA HDD Connector

V1JB1 M/B LA-A041P Schematic

25 52Wed nesday, March 13, 2013

E

0.1

5

D D

4

3

2

1

TPM

+3VS

112

JUMP_43X39

10U_0603_6.3V6M

SAGE 3G

J15

@J15

@

@ C1

@

2

12

C1

C534

0.1U_0402_16V4Z

1

TPM@C534

TPM@

2

C535

0.1U_0402_16V4Z

1

TPM@C535

TPM@

2

10mil

+3V_TPM

C536

0.1U_0402_16V4Z

1

TPM@C536

TPM@

2

C538

0.1U_0402_16V4Z

1

TPM@C538

TPM@

2

TPM - Infineon SA00005XH40 S IC SLB9655TT1.2 FW4.31 TSSOP 28P TPM

+3V_TPM

near pin10near pin5 near pin19 near pin24

19

U7

26 23 20 17

21 22 16

27

9

7

U7

LAD0 LAD1 LAD2 LAD3

LCLK LFRAME# LRESET# LRESET# SERIRQ

PP

C C

CLK_PCI_TXM LPC_FRAME# PLT_RST#

SERIRQ

R9670_0402_5% @ R9670_0402_5% @ R9880_0402_5% @ R9880_0402_5% @

XEMC@

C724

1 2

22P_0402_50V8J

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

TPM_PP

LPC_AD013,28 LPC_AD113,28 LPC_AD213,28

SAGE 3G

PLT_RST#17,28,31,32,5

+3V_TPM

CLK_PCI_TXM

B B

LPC_AD313,28

CLK_PCI_TXM17

LPC_FRAME#13,28

R966 0_0402_5%@R966 0_0402_5%@

SERIRQ13,28

XEMC@

1 2

R716

33_0402_5%

1 2

1 2 1 2

5

VDD24VDD

VDD10VDD

TPM

TPM SLB 9655 TT 1.2

SLB 9655 TT 1.2

GND4GND11GND18GND

25

6

GPIO

28

NC

15

NC

14

NC

13

NC

8

NC

1

NC

3

NC

12

NC

2

NC

SLB9655TT1.2_TSSOP28

TPM@

TPM@ SA00005XH40

SA00005XH40

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2010/11/1 2011/11/1

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

TPM Infineon-SLB9655

V1JB1 M/B LA-A041P Schematic

1

26 52Wednesday, March 13, 2013

0.1

5

1 2

R9 0 _0402_5%@R 9 0_0402 _5%@

EMC@

12

PCH_USB 3_TX2_P17

PCH_USB 3_TX2_N17

D D

PCH_USB 3_RX2_P17

PCH_USB 3_RX2_N17

C424 0 .1U_0402_16V7 KC424 0.1U_ 0402_16V7K

C422 0 .1U_0402_16V7 KC422 0.1U_ 0402_16V7K

PCH_USB 3_TX2_P_C

12

PCH_USB 3_TX2_N_C

PCH_USB 3_RX2_P

EMC@

2

3

L3 D LW21SN90 0HQ2L_0805

1 2

R10 0_0402_ 5%@R10 0_0402_ 5%@

SAGE 3G R10

1 2

R11 0_0402_ 5%@R11 0_0402_ 5%@

EMC@

2

3

L4 DLW 21SN900HQ2L_ 0805

1 2

R12 0_0402_ 5%@R12 0_0402_ 5%@

SAGE 3G R10

1 2

@

R691 0_040 2_5%

EMC@

USB20_N 117

USB20_P 117

C C

JCMOS2.5 to GND (Shielding GND as SED's requir ement)

CAMERA1

USB20_N 1017

USB20_P 1017

D17

TVNST52 302AB0_SOT52 3-3

D17

XEMC@

SCA0000 1W00

Resister overlap with L52

+3VS

2

3

1

2

3

L52 DLW 21SN900HQ2L _0805

1 2

R689 0_040 2_5%

JCMOS1

1

2

3

4

7

5

G1

5

8

6

G2

6

ACES_88 460-00601-P01

CONN@

1

SM07000 1E00

4

@

JCMOS1 SP010013W00 ACES_88460-00601-P01_6P S H-CONN ACES 88460-00601-P01 6P P0.8

4

1

SM07000 1E00

4

1

SM07000 1E00

4

U2DN0

U2DP0

U3TXDP2

U3TXDN2

XEMC@

U3RXDP2

U3RXDN2PCH_USB 3_RX2_N

XEMC@

SAGE 3G Reserve for RF

XEMC@

1.8P_0402_50V8

1

C109

C110

2

XEMC@

1.8P_0402_50V8

1

C112

C111

2

SAGE 3G

For ESD request

U3TXDP2

U3TXDN2

1.8P_0402_50V8

U3RXDP2

1.8P_0402_50V8

3

SC300002800 S DIO(BR) TVWDF1004AD0 DFN ESD

D35

XEMC@

1

2

4

5

3

8

SC30000 2800

TVW DF1004AD0_DF N

9

10

8

9

7

6

65

For USB2.0 ESD request

D24

U2DP0

U2DN0

D24

3

2

TVNST52 302AB0_SOT52 3-3

XEMC@

XEMC@ SCA0000 1W00

SCA0000 1W00

SAGE 3G

1

U3TXDP2

U3TXDN2

U3RXDP2

U3RXDN2U3RXDN2

2

SAGE 3G

U17

C432

@ C432

@

0.01U_04 02_16V7K

1 2

USB_EN#28 USB_OC0 # 17

1

+

2

C394

U3TXDP2

U3TXDN2 U2DP0

U2DN0 U3RXDP2

U3RXDN2

+USB3_V CCA

C393

470P_0402_50V7K

C393

470P_0402_50V7K

2

1

SGA0000 2N80

W=80mils

150U_B2_6.3VM_R35M

U17

1

GND

2

VIN VIN3VOUT

4

EN

SGA00001E00 S POLY C 150U 6.3V M B2LESR45M PSL H1.9

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

E&T_612 0K-S09N-00R

CONN@

CONN@ E-T_6120 K-S09N-00R_9P-T

E-T_6120 K-S09N-00R_9P-T

+USB3_V CCA+5VALW

8

VOUT

7

VOUT

6 5

FLG

EPAD

AP2301M PG-13_MSOP8

9

JUSB1

E-T_6120K-S09N-00R_9P-T

10

GND

11

GND

12

GND

13

GND

R314

1 2

@

0_0402_ 5%

1

C443

0.1U_020 1_10V6K

@

2

1

USB3.0 Conn.

B B

SAGE 3G

A A

Security Class ification

2011/06/ 24 2012/06/ 13

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 24 2012/06/ 13

3

Compal Secret Data

Deciphered Date

Title

Size Document Num ber Rev

Custom

Date: Sheet of

2

Date: Sheet of

USB3.0

V1JB1 M/B LA-A041P Schematic

27 52Tuesday, March 26 , 2013

1

0.1

J11

@J11

@

2

112

JUMP_43X39

+EC_VBAT + 3VS

C1216

0.1U_0402_16V4Z

C1216

0.1U_0402_16V4Z

1

2

1

+3VALW_EC

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

12mil

C1198

C1219

C1200

0.1U_0402_16V4Z

C1200

0.1U_0402_16V4Z

C1199

0.1U_0402_16V4Z

C1199

0.1U_0402_16V4Z

1

2

+RTCVCC +EC_V BAT

2 1

D58 RB751V-40_SOD323-2D58 RB751V-40_SOD323-2

SAGE 3G

0.1U_0402_16V4Z

1

2

+3VLP

SAGE 3G

A A

EC SMI/SCI default PH

1 2

R697 0_0402_5%@R697 0_0402_ 5%@

EC_SMI#18

EC_SCI#18

XEMC@ C1205

XEMC@

22P_0402_50V8J

B B

+3VALW_EC

R938 100K_0402_ 5%R938 100K_0 402_5%

C528 1U_0 402_6.3V6KC528 1U_0402_6.3V6K

RP25

4 5 3 6 2 7 1 8

100K_8P4R_5%

1 2

R943 100K_0402_5%@R943 100 K_0402_5%@

1 2

R962 10K_0402_5%R962 10K_0402_5%

1 2

R954 2.2K_0402_5%@R954 2.2K_0402_5%@

1 2

R953 2.2K_0402_5%@R953 2.2K_0402_5%@

2 1

D40 RB751V-40_SOD323-2@D40 RB751V-40_SOD323-2@

1 2

R708 0_0402_5%@R708 0_0402_5%@

2 1

D48 RB751V-40_SOD323-2D48 RB751V-40_SOD323-2

R933

XEMC@ R933

XEMC@

C1205

33_0402_5%

12

EC_SMI# VOL_UP#_R VOL_DOWN#_R HOME_KEY

EC_PCIE_WAKE#

IRST_RST#

EC_SMB_DA3 EC_SMB_CK3

SAGE 3G

+3VALW_EC

+3VS

C C

+3VS

D D

RP27

4 5 3 6 2 7 1 8

2.2K_8P4R_5%

1 2

R946 10K_0402_5 %R946 10K_0402_5%

1 2

R949 100K_0402_ 5%R949 100K_0 402_5%

1 2

C1209 0.01U_0402_16V7K

R758 1K_0402_5%@R758 1K_0402_5%@

+3VALW_EC +3VALW_EC

Ra

Rb Rb

EMC@

SAGE 3G DVT

1 2

Project ID

Analog Project ID definition

R454

R454 100K_0402_5%

100K_0402_5%

1 2

AD_PID0 AD_BID0

12

R455

R455 56K_0402_5%@

56K_0402_5%@

1

EC_SMB_DA1 EC_SMB_CK1 EC_SMB_CK2 EC_SMB_DA2

EC_SCI# PLT_RST#

ESD request

D_LOCK

1

C1217

0.1U_0402_16V4Z

2

+3VALW_EC

C1201

C1203

0.1U_0402_16V4Z

C1203

0.1U_0402_16V4Z

1

2

EC_SMI#_R

EC_SCI#_R

CLK_PCI_LPC

EC_RST#

HOME_KEY33

D_LOCK33

SAGE 3G

R957

R957 100K_0402_5%

100K_0402_5%

Ra

1 2

56K_0402_5%

56K_0402_5% R960

R960

1 2

SAGE 3G R20

2

L58

1 2

FBMA-L11-160808-800LMT_0603

C1211

0.1U_0402_16V4Z

C1211

0.1U_0402_16V4Z

1

2

EC_KBRST#18

SERIRQ13,26

LPC_FRAME#13,26

LPC_AD313,26 LPC_AD213,26 LPC_AD113,26 LPC_AD013,26

CLK_PCI_LPC17

EC_RST#33

EC_3G_PWR_EN#31

BKOFF#44

GATEA2018

SAGE 3G R20

0_0402_5%

R724

1 2

@

VOL_UP#33

VOL_DOWN#33

IO/B_DET = 1 -> IO/B connected. IO/B_DET = 0 -> IO/B disconnected.

@

1 2

@

R725

0_0402_5%

SAGE 3G DVT

1 2

R952 100K_0402_ 5%R952 100K_0 402_5%

IO/B_DET33

EC_3G_ON_OFF#31

EC_3G_RST#31

PM_SLP_S5#15

DRAMRST_CNTRL_EC6

EC_SMB_CK136,37 EC_SMB_DA136,37 EC_SMB_CK211,14 EC_SMB_DA211,14

1 2 1 2

Board ID

Analog Board ID definition, Please see page 3.

LID_SW#33

R719 0_0402_5%R719 0_0402_5% R709 0_0402_5%R709 0_0402_5%

PM_SLP_S3#15 PM_SLP_S4#15

PCH_RSMRST#15

ON/OFF33

EC_ON38

3G_OFF#31

PCH_PWROK15 MAINPWON_L36 PCH_PWR_EN31,34

XTAL

X3

12

32.768KHZ_12.5PF_1TJF125DP1A000D

SJ100004Z00

1

C758

10P_0402_50V8J

2

SAGE 3G

1

C1213

0.1U_0402_16V4Z

2

3

+EC_VCCPLL+3VALW_EC

0.1U_0402_16V4Z

1

2

SAGE 3G

EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 CLK_PCI_LPC EC_RST# EC_SMI#_R EC_3G_PWR_EN# BKOFF# PLT_RST#_R EC_SCI#_R GATEA20

VOL_UP#_R VOL_DOWN#_R

IO/B_DET EC_3G_ON_OFF# EC_3G_RST# PM_SLP_S5#

DRAMRST_CNTRL_EC

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 EC_PECI

LID_SW# EC_SMB_CK3 EC_SMB_DA3

PM_SLP_S3#

PM_SLP_S4#

PCH_RSMRST#

ON/OFF

EC_ON

3G_OFF#

MAINPWON_L

PCH_PWR_EN

EC_CK32KE

EC_CK32K

1

C759

10P_0402_50V8J

2

H_PECI5

USB_EN#27

PLT_RST#17,26,31,32,5

3

SAGE 3G

+VCORE_EC

C1212

PLT_RST# PLT_RST#_R

+3VS

C1210

0.1U_0402_16V4Z

C1210

0.1U_0402_16V4Z

1

+EC_VBAT

2

U53

H4

KBRST#/GPB6

G2

SERIRQ/GPM6

H1

LFRAME#/GPM5

H2

LAD3/GPM3

J1

LAD2/GPM2

J2

LAD1/GPM1

K1

LAD0/GPM0

K2

LPCCLK/GPM4

L1

WRST#

L2

ECSMI#/GPD4

M2

PWUREQ#/BBO/SMCLK2ALT/GPC7

M1

LPCPD#/WUI6/GPE6

M4

LPCRST#/WUI4/GPD2

N4

ECSCI#/GPD3

F1

GA20/GPB5

J12

KSI0/STB#

J13

KSI1/AFD#

J9

KSI2/INIT#

H12

KSI3/SLIN#

H9

KSI4

H10

KSI5

H13

KSI6

G9

KSI7

M8

KSO0/PD0

J7

KSO1/PD1

N9

KSO2/PD2

M9

KSO3/PD3

K8

KSO4/PD4

J8

KSO5/PD5

N10

KSO6/PD6

M10

KSO7/PD7

N11

KSO8/ACK#

K9

KSO9/BUSY

N12

KSO10/PE

N13

KSO11/ERR#

M13

KSO12/SLCT

L12

KSO13

L13

KSO14

K12

KSO15

K13

KSO16/SMOSI/GPC3

J10

KSO17/SMISO/GPC5

B4

SMCLK0/GPB3

A2

SMDAT0/GPB4

B3

SMCLK1/GPC1

B2

SMDAT1/GPC2

B1

SMCLK2/PECI/WUI22/GPF6

C1

SMDAT2/PECIRQT#/WUI23/GPF7

E8

WUI17/SIN1/SMCLK3/GPH1/ID1

D7

WUI18/SOUT1/GPH2/SMDAT3/ID2

N1

RI1#/WUI0/GPD0

N3

RI2#/WUI1/GPD1

A1

RING#/PWRFAIL#/CK32KOUT/LPCRST# /GPB7

E2

PWRSW/GPE4

N2

L80HLAT/BAO/WUI24/GPE0

M3

L80LLAT/WUI7/GPE7

N7

GINT/CTS0#/GPD5

N8

RTS1#/WUI5/GPE5

D8

CLKRUN#/WUI16/GPH0/ID0

G1

CK32KE/GPJ7

F2

CK32K/GPJ6

R951 0_0402_5%@R951 0_0402_5%@

R711

1 2

@

0_0402_5%

4

+3VALW_EC +3VALW_EC

J4

LPC

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

Clock

12

R95843_0402_1% R95843_0402_1%

12

+EC_VCCPLL

+EC_AVCC

C1204

0.1U_0402_16V4Z

C1204

0.1U_0402_16V4Z

K5

VBAT/VCC

VCORE/VCC

WAKE UP

VSS/GND

F4

E5

EC_PECI

4

J5

VCC/VCC

DAC

PS2

EXTERNAL SERIAL FLASH

GPIO

VSS/GND

VSS/GNDF5VSS/GND

G4

USB_EN#_R

E9

K4

K10

D5

D10

E4

AVCC

VSTBY/VCC

VSTBY/VCCD4VSTBY/VCC

VSTBY/VCC

PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3

PWM

PWM4/GPA4

PWM5/GPA5 PWM6/SSCK/GPA6 PWM7/RIG1#/GPA7

TMRI0/WUI2/GPC4 TMRI1/WUI3/GPC6

ADC0/GPI0 ADC1/GPI1

ADC

SPI Flash ROM

UART

VSS/GND

H5

G5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

ADC2/GPI2 ADC3/GPI3

ADC4/WUI28/GPI4 ADC5/DCD1#/WUI29/GPI5 ADC6/DSR1#/WUI30/GPI6

ADC7/CTS1#/WUI31/GPI7

DAC2/TACH0B/GPJ2 DAC3/TACH1B/GPJ3

DAC4/DCD0#/GPJ4

DAC5/RIG0#/GPJ5

PS2CLK0/TMB0/GPF0

PS2DAT0/TMB1/GPF1 PS2CLK1/DTR0#/GPF2 PS2DAT1/RTS0#/GPF3 PS2CLK2/WUI20/GPF4 PS2DAT2/WUI21/GPF5

HSCE#/WUI19/GPH3/ID3

HSCK/GPH4/ID4 HMISO/GPH5/ID5 HMOSI/GPH6/ID6

RXD/SIN0/GPB0

TXD/SOUT0/GPB1

EGAD/WUI25/GPE1 EGCS#/WUI26/GPE2 EGCLK/WUI27/GPE3

SSCE0#/GPG2

GPIO

SSCE1#/GPG0

DSR0#/GPG6

DTR1#/SBUSY/GPG1/ID7

TMA0/GPB2

TACH2/GPJ0

TACH1A/TMA1/GPD7

TACH0A/GPD6

AVSS/AGND

IT8518VG-HX_VFBGA128

E10

L57

ECAGND

FBMA-L11-160808-800LMT_0603

5

L56

FBMA-L11-160808-800LMT_0603

1000P_0402_50V7K

1

C1202

2

ECAGND

M5

PROX_DET_EC

N5

POUT

M6

PWR_LED#

N6

BATT_AMB_LED#

K6

FAN_PWM

J6

USB_EN#_R

M7

HDA_SDO

K7

BEEP#

C2

EC_ACIN

E1

BI_DET

G10

AD_BID0

G13

AD_PID0

G12

CHG_TEMP

F9

BATT_TEMP

F13

EC_PCIE_WAKE#

F10

ADP_I

F12

SUSWARN#

E13

SLP_SUS#

D12

PCH_BATLOW#

C13

SA_PGOOD

B13

AOAC_ON

C12

EC_MUTE#

A11

EAPD

B11

IRST_RST#

A10

ENBKL

B10

WL_OFF#

D9

ON/OFF_R

B9

EC_LID_OUT#

A9

PCH_SPI_CS1#

B8

PCH_SPI_CLK_1

A8

PCH_SPI_MISO_1

B7

PCH_SPI_MOSI_1

A7

FSCE#

FMOSI FMISO

FSCK

GPJ1

GPC0

EC_SPICS#/FSEL#

B6

EC_SO_SPI_SI

A6

EC_SI_SPI_SO

B5

EC_SPICLK

A4

E51RXD_P80CLK

A3

E51TXD_P80DATA

A13

SYSON

A12

SUSP#

B12

VR_ON

D13

PBTN_OUT#

E7

DPWROK

E6

H_PROCHOT#_EC

D6

BT_ON#

A5

GPS_OFF#

D1

EC_DS3_WAKE#

D2

SUSACK#

E12

ACPRESENT

M12

EC_3G_USB_ON

M11

FAN_SPEED1

12

2011/06/24 2012/06/02

5

12

+3VALW_EC

1

XEMC@

C451

0.1U_0201_10V6K

R694 4.7K_0402_5%R694 4.7K_0402_5% R690 4.7K_0402_5%R690 4.7K_0402_5%

Compal Secret Data

2

PROX_DET_EC 31

POUT 33 PWR_LED# 33 BATT_AMB_LED# 33

FAN_PWM 29

HDA_SDO 13

BEEP# 33

BI_DET 33

CHG_TEMP 36 BATT_TEMP 36

EC_PCIE_WAKE# 24,31

ADP_I 36,37

SUSWARN# 15

SLP_SUS# 15

PCH_BATLOW# 15

SA_PGOOD 15,41 AOAC_ON 24 EC_MUTE# 33

EAPD 33 IRST_RST# 17 ENBKL 16

WL_OFF# 24

EC_LID_OUT# 18

PCH_SPI_CS1# 13 PCH_SPI_CLK_1 13

PCH_SPI_MISO_1 13

PCH_SPI_MOSI_1 13

12

E51RXD_P80CLK 25

E51TXD_P80DATA 25

SYSON 34,39 SUSP# 34,39,40,41

VR_ON 42,5

PBTN_OUT# 15

DPWROK 15

BT_ON# 24

GPS_OFF# 31 EC_DS3_WAKE# 18 SUSACK# 15

ACPRESENT 15 EC_3G_USB_ON 31 FAN_SPEED1 29

1 2 1 2

Deciphered Date

6

SAGE 3G DVT

FAN_PWMFAN _SPEED1

1

2

R726 0_0402_5%

1 2

@

EC_SPICLK_R

R6980_0402_5% @ R69 80_0402_5% @

EC_SPICS#/FSEL#

6

LID_SW#

EC_MUTE#

XEMC@

C450

0.1U_0201_10V6K

ON/OFF

1

C1486

1.8P_0402_50V8

XEMC@

2

SAGE 3G Reserve for RF / Close to EC

BKOFF#

EC_ACIN

VR_HOT#42

SAGE 3G

SAGE 3G R20

SAGE 3G Reserve for RF

4MB=32Mb

U40

1

CS#

SPI_WP# SPI_HOLD#

3 7 4

VCC

WP#

SCLK

HOLD#

SO

GND

W25Q32BVSSIG_SO8

SA00003K800

SI

7

R948 100K_0402_5%R948 100K_0402_5%

R928 10K_0402_5%@R928 10K_0402_5%@

R934 10K_0402_5%@R934 10K_0402_5%@

R936 200K_0402_5%R936 200K_0402_5% R935 200K_0402_5%@R935 200 K_0402_5%@

D37 RB751V-40_SOD323-2D37 RB751V-40_SOD323-2

C1207 100P_0402_50V8JC1207 100P_0402_50V8J

ENBKL

R950 100K_0402_ 5%R950 100K_0 402_5%

BATT_TEMP ECAGND

CHG_TEMP ECAGND

PLT_RST#

EC_ON

SYSON

PCH_PWROK

EC_SMB_CK3 EC_SMB_DA3 E51RXD_P80CLK E51TXD_P80DATA

+3VALW_EC

8 6

EC_SPICLK_R

5

EC_SO_SPI_SI_R

2

EC_SI_SPI_SO_R

EC_SPICLK_R

Title

EC ITE-IT8518

Size Document Number Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet of

7

12

1 2

12 12

2 1

12

R940

0_0402_5%

VR_HOT#

H_PROCHOT#_EC

C1206 100P_0402_50V8JC1206 100P_0402_50V8J

C1208 100P_0402_50V8JC1208 100P_0402_50V8J

C723 47P_0 402_50V8J

C722 0.1U_0402 _16V4ZC722 0.1U_0402_16V4Z

12

@

2

G

12

EMC@

1 2

C764 0.1U_0402 _16V4Z

1 2

C766 0.1U_02 01_10V6K

XEMC@

For EMI

JEC2

1

2

3

G1

4

G2

4

ACES_50208-0040N-001

SP01000Q810

ACES_50208-0040N-001_4P

CONN@

XEMC@

1 2

R705 0_0402_5%@R705 0_0402_5%@

1 2

R692 0_0402_5%@R692 0_0402_5%@

R695

XEMC@ R695

XEMC@

1 2

0_0402_5%

Compal Electronics, Inc.

8

ACIN 34,37

H_PROCHOT# 36,5

13

D

Q60

Q60 2N7002KW_SOT323-3

2N7002KW_SOT323-3

S

T20 PAD@T2 0 PAD @

T24 PAD@T2 4 PAD @

5 6

XEMC@ C727

XEMC@

33P_0402_50V8K

8

+3VALW

+3VS

+3VLP +3VALW

EC_SO_SPI_SI EC_SI_SPI_SO

C727

28 52Wednesday, March 13, 2013

0.1

FAN Conn

FAN_SPEED128

CLIP1

ICSRC6510-015SFR_1P

1

20mil

+5VS

+3VS

CLIP2

ICSRC6510-015SFR_1P

1

112

JUMP_43X39

12

R489

R489 10K_0402_5%

10K_0402_5%

1

C579

C579 1000P_0402_50V7K

1000P_0402_50V7K

2

CLIP3

ICSRC6510-015SFR_1P

J17

FAN_PWM28

1

SAGE 3G

@J17

@

2

C585

10U_0805_25V6K

1 2

C587

1000P_0402_50V7K

1 2

FAN_SPEED1 FAN_PWM

CLIP4

ICSRC6510-015SFR_1P

1

JFAN1

1

2

3 4

ACES_50208-0040N-001

ACES_50208-0040N-001_4P

JFAN1 conn SP01000Q810 ACES_50208-0040N-001_4P S H-CONN ACES 50208-0040N-001 4P P.8

ICSRC6510-015SFR_1P

3

G1 G2

4

SP01000Q810

CONN@

CLIP5

1

5 6

CLIP6

ICSRC6510-015SFR_1P

CLIP7

ICSRC6510-015SFR_1P

1

CLIP9

ICSRC6510-015SFR_1P

1

定定定定定定定定螺螺螺螺

FD1

@

1

FIDUCIAL_C40M80

H2

H1

H_4P2

@

1

螺螺螺螺螺螺螺螺

H11

H12

H_2P5

@

1

H6

H_4P0x3P0

@

1

CLIP8

ICSRC6510-015SFR_1P

1

FD2

1

FIDUCIAL_C40M80

H3

H_4P2

@

1

H7

H_3P0

@

1

CLIP10

ICSRC6510-015SFR_1P

1

@

H4

H_4P2

FIDUCIAL_C40M80

@

1

H_2P5

FD4

H_3P2

@

1

FD4

@

1

FIDUCIAL_C40M80

H5

@

1

3G Stand-Off

H19

H_3P2

@

1

H20

H_2P5

@

1

FD3

@

1

mSATA Stand-OffThermal module

H15

H16

H_2P5

@

1

CLIP12

ICSRC6510-015SFR_1P

1

CLIP22

ICSRC6510-015SFR_1P

1

CLIP32

ICSRC6510-015SFR_1P

1

CLIP38

ICSRC6510-015SFR_1P

1

CLIP11

ICSRC6510-015SFR_1P

1

CLIP21

ICSRC6510-015SFR_1P

1

CLIP31

ICSRC6510-015SFR_1P

1

CLIP39

ICSRC6510-015SFR_1P

1

CLIP13

ICSRC6510-015SFR_1P

1

CLIP23

ICSRC6510-015SFR_1P

1

CLIP33

ICSRC6510-015SFR_1P

1

CLIP40

ICSRC6510-015SFR_1P

1

CLIP14

ICSRC6510-015SFR_1P

1

CLIP24

ICSRC6510-015SFR_1P

1

CLIP34

ICSRC6510-015SFR_1P

1

CLIP41

ICSRC6510-015SFR_1P

1

CLIP15

ICSRC6510-015SFR_1P

1

CLIP25

ICSRC6510-015SFR_1P

1

CLIP35

ICSRC6510-015SFR_1P

1

CLIP46

ICSRC6510-015SFR_1P

1

CLIP16

ICSRC6510-015SFR_1P

1

CLIP26

ICSRC6510-015SFR_1P

1

CLIP36

ICSRC6510-015SFR_1P

1

CLIP45

ICSRC6510-015SFR_1P

1

CLIP17

ICSRC6510-015SFR_1P

1

CLIP27

ICSRC6510-015SFR_1P

1

CLIP37

ICSRC6510-015SFR_1P

1

CLIP20

CLIP19

ICSRC6510-015SFR_1P

1

CLIP29

ICSRC6510-015SFR_1P

1

CLIP43

ICSRC6510-015SFR_1P

1

CLIP18

ICSRC6510-015SFR_1P

1

CLIP28

ICSRC6510-015SFR_1P

1

CLIP42

ICSRC6510-015SFR_1P

1

CLIP20

ICSRC6510-015SFR_1P

1

CLIP30

ICSRC6510-015SFR_1P

1

CLIP44

ICSRC6510-015SFR_1P

1

SAGE 3G DVT

CLIP47

CLIP48

CLIP49

ICSRC6510-015SFR_1P

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

CLIP48

ICSRC6510-015SFR_1P

1

2011/06/24 2012/06/02

CLIP47

ICSRC6510-015SFR_1P

1

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FAN,Screw Hole

V1JB1 M/B LA-A041P Schematic

29 52Wednesday, March 13, 2013

0.1

C483 0.1U_0402_16V7KC483 0.1U_0402_16V7K

CS : 1 -> I2C mode 0 -> SPI mode

ST design Co-lay BOM control

R524 0_0402_5%ST@R524 0_0402_5%ST@

+3V_SEN

1 2

+3V_SEN

I2C_1_SCL_SENSOR

I2C_1_SDA_SENSOR

GYRO_SA0

GYRO_DRDY

GYRO_INT

GYRO_SA0

GYRO SA00005HQ00 L3GD20TR

U143

1

VDD_IO

2

SCL/SPC

3

SDA/SDI/SDO

4

SDO/SA0

5

CS

6

DRDY/INT2

7

INT1

8

RES_0

L3GD20TR_LGA16_4X4

INTEL@

1 2

R240 100K_0402_5%

RES_1

RES_2

RES_3

RES_4

RES_5

RES_6

9

10

11

12

13

GND

14

15

16

VDD

+3V_SEN

C481

0.1U_0402_16V7K

1 2

C630 0.01U_0402_16V7KC630 0.01U_0402_16V7K

SAGE 3G

1

2

+3V_SEN

1

C1269

C1269 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1 2

C487 0.1U_0402_16V7KC487 0.1U_0402_16V7K

C1288

0.22U_0402_10V6K

ACCEL+E-COMPASS

+3V_SEN

C1290

1

2

C1290

4.7U_0603_6.3V6K

MAG_DRDY ACCEL_INT2

U141

1

12

Vdd_IO

6

C1

12

SETP

13

SETC

8

Reserved

9

Reserved

10

Reserved

11

Reserved

7

GND

LSM303DLHCTR_LGA14_3X5

Vdd

SDA

SCL

INT1

INT2

14

3

2

5

4

+3V_SEN

I2C_1_SDA_SENSOR

I2C_1_SCL_SENSOR

ACCEL_INT1

+3V_SEN

1

C485

0.1U_0402_16V7K

1 2

R481 100K_0402_5%

INTEL@

2

1

C510

C510 10U_0603_6.3V6M

10U_0603_6.3V6M

2

SAGE 3G

Resister overlap with L68

1 2

USB20_N017

Sensor Hub

USB20_P017

X4

32.768KHZ_12.5PF_1TJF125DP1A000D

SJ100004Z00

INTEL@

1

C762

C762 18P_0402_50V8J

18P_0402_50V8J

INTEL@

2

1 2

R495 0_0402_5%@R495 0_0402_5%@

Y3 8MHZ_12PF_FSX5M-8.000000M12FAO

1

INTEL@

C761

2

18P_0402_50V8J

INTEL@

Y3

12MHZ_12PF_X1H012000DC1H-HX

ST design Co-lay BOM control

R706 0_0402_5%@R706 0_0402_5%@

2

@

L68

3

1 2

R707 0_0402_5%@R707 0_0402_5%@

HUB_32_OUT

12

HUB_32_IN

1

C763

C763 18P_0402_50V8J

18P_0402_50V8J

INTEL@

2

34 21

ST@Y3

ST@ JHDB1

For Sensor Orientation Setting

12

ST@

12

@

R606

R606 10K_0402_5%

10K_0402_5%

R607

R607 10K_0402_5%

10K_0402_5%

12

@

R601

R601 10K_0402_5%

10K_0402_5%

12

ST@

R605

R605 10K_0402_5%

10K_0402_5%

USB20_N1_HUB

1

SM070001E00

4

DLW21SN900HQ2L_0805

4

HUB_XCLKOUT

HUB_XCLKIN

1

C760

2

18P_0402_50V8J

INTEL@

ST@

2 1C761 15P_0402_50V8J

ST@

2 1C760 15P_0402_50V8J

(303I, 303m, 303n)=(PA1, PA2, PA3)= 1,0,0 (4200I, 4200m, 4200n)=(PA4, PA5, PA6)= 1,1,0

12

@

R599

R599 10K_0402_5%

10K_0402_5%

12

ST@

R580

R580 10K_0402_5%

10K_0402_5%

USB20_P1_HUB

12

ST@

R602

R602 10K_0402_5%

10K_0402_5%

HUB_PA4HUB_PA1 HUB_PA5 HUB_PA6HUB_PA2 HUB_PA3

12

R603

R603 10K_0402_5%

10K_0402_5%

@

SAGE 3G R10

ACES_85201-1005N

12

ST@

12

@

+3V_SEN

JHDB1

CONN@

SP01000H400

R600

R600 10K_0402_5%

10K_0402_5%

R597

R597 10K_0402_5%

10K_0402_5%

1 2

R453 2.2K_0402_1%R453 2.2K_0402_1%

1 2

R466 2.2K_0402_1%R466 2.2K_0402_1%

1 2

R1109 1.5K_0402_1%INTEL@R1109 1.5K_0402_1%INTEL@

4 5 3 6 2 7 1 8

INTEL@

1 2 1 2

1 2 3 4 5 6 7 8 9 10 11 12

INTEL@

+3V_SEN

HUB_DBG_PB4 HUB_DBG_PA15 HUB_DBG_PA13 HUB_DBG_PA14 HUB_DBG_PB3 HUB_RST#

RP26 10K_8P4R_5%

R1322 0_0402_5%@R1322 0_0402_5%@ R1319 0_0402_5%INT EL@R1319 0_0402_5%INTEL@

R1323 0_0402_5%INT EL@R1323 0_0402_5%INTEL@ R473 10K_0402_5%INTEL@R473 10K_0402_5%INTEL@

1 2 3 4 5 6 7 8 9

10 GND GND

ST design Co-lay

+3V_SEN+3V_SEN+3V_SEN+3V_SEN+3V_SEN+3V_SEN

12

@

R598

R598 10K_0402_5%

10K_0402_5%

12

ST@

R596

R596 10K_0402_5%

10K_0402_5%

SAGE 3G

I2C_1_SCL_SENSOR I2C_1_SDA_SENSOR USB20_P1_HUB

HUB_DBG_PB3 HUB_DBG_PB4 HUB_DBG_PA13 HUB_DBG_PA15

HUB_BOOT0

HUB_BOOT1 HUB_DBG_PA14

0_0402_5%

R1320

12

HUB_RST#

@

SAGE 3G PVT

To PCH GPIO68

ST design Co-lay

1 2

HUB_PA10 USB20_P1_HUB

ACCEL_INT1 ACCEL_INT2

GYRO_INT GYRO_DRDY

ST@

R1110 1.5K_0402_1%

R1343

ST@R1343

ST@

1 2

0_0402_5%

1 2

0_0402_5%

ST@R1342

ST@

ST@R1345

ST@ 1 2 1 2

ST@R1344

ST@

0_0402_5%

0_0402_5% 0_0402_5%

0_0402_5%

R1342

R1345

R1344

ALS_INT33

TO Sensor (HUB Host)

HUB_DFU_EN#18

HUB_PB0 HUB_PB1

HUB_BOOT1 HUB_DBG_PB3

+3V_SEN

0.1U_0402_16V7K

C503

1

2

0.1U_0402_16V7K

C504

1

2

0.1U_0402_16V7K

C509

C506

1

2

C509

C507

1

2

SAGE 3G

ACCEL_INT1 ALS_INT GYRO_INT

MAG_DRDY GYRO_DRDY

ACCEL_INT2

1 2

R477 0_0402_5%INTEL@R477 0_0402_5%I NTEL@

1 2

R478 0_0402_5%INTEL@R478 0_0402_5%I NTEL@

1 2

R479 0_0402_5%INTEL@R479 0_0402_5%I NTEL@

1 2

R488 0_0402_5%INTEL@R488 0_0402_5%I NTEL@

1 2

R492 0_0402_5%INTEL@R492 0_0402_5%I NTEL@

1 2

R494 0_0402_5%INTEL@R494 0_0402_5%I NTEL@

I2C_1_SCL_SENSOR33

I2C_1_SDA_SENSOR33

1 2

R497 0_0402_5%@R497 0_0402_5%@

1 2

R496 0_0402_5%INTEL@R496 0_0402_5%INTEL@

1 2

R1346 0_0402_5%ST@R1346 0_0402_5%ST@

1 2

MAG_DRDY HUB_DFU_EN#_R

R1347 0_0402_5%ST@R1347 0_0402_5%ST@

HUB_BOOT0

BOM control

HUB_PA0 HUB_PA1 HUB_PA2 HUB_PA3 HUB_PA4 HUB_PA5 HUB_PA6

HUB_PA8 HUB_PA9

T31PAD@ T31PAD@

HUB_PA10 USB20_N1_HUB USB20_P1_HUB HUB_DBG_PA13 HUB_DBG_PA14 HUB_DBG_PA15 HUB_PB0 HUB_PB1 HUB_BOOT1 HUB_DBG_PB3 HUB_DBG_PB4

I2C_1_SCL_SENSOR I2C_1_SDA_SENSOR

HUB_PB13 HUB_DFU_EN#_R HUB_PB15

ST@

2 1R1319 20K_0402_5%

+3VALW

PC10 PC11 PC12 PC13 PC14 PC15

Vref+

+3VLP+3VALW

12

13

D

2

G

S

E8

PC0

F8

PC1

D6

PC2

H6

PC4

H5

PC5

E1

PC6

E2

PC7

E3

PC8

D1

PC9

A2 B3 C4 C8 B8

HUB_32_IN

B7

HUB_32_OUT

A3

PD2

C7

HUB_RST#

A6

HUB_BOOT0

F7 C6

Vbat

D8

HUB_XCLKIN

D7

HUB_XCLKOUT

SAGE 3G

R1328

R1328 1M_0402_5%

1M_0402_5%

@

To PCH GPIO35

1

R1329

0.1U_0402_16V7K

2

HUB_PWRGATE 18

SAGE 3G

HUB_RST#

1 2

R1326 0_0402_5%ST@R1326 0_0402_5%ST@

1 2

R1330 0_0402_5%INT EL@R1330 0_0402_5%INTEL@

1 2

C456 0.1U_0402_16V7KC456 0.1U_0402_16V7K

+3V_SEN

12

1

2

+3V_SEN

+3VLP

R459

R459 100K_0402_5%

100K_0402_5%

ST@

C508

0.1U_0402_16V7K

+3V_SEN

1M_0402_5%

1U_0402_6.3V6K

3 1

0.1U_0402_16V7K

1U_0402_6.3V6K

C530

C531

1

2

R1331

2

R1331

2

1M_0402_5%

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3 Q69

Q69

100K_0402_5%

1 2

2N7002K_SOT23-3 G

2N7002K_SOT23-3

R469

Q83

SAGE 3G

+3V_SEN

A8

A1

G8

G6

H1

U140

F6

PA0-WKUP

E6

PA1

H8

PA2

G7

PA3

H7

PA4

E5

PA5

G5

PA6

G4

PA7

E4

PA8

D2

PA9

D3

PA10

C1

PA11

C2

PA12

D4

PA13

B2

PA14

C3

PA15

H4

PB0

F4

PB1

H3

PB2

A4

PB3

B4

PB4

A5

PB5

B5

PB6

C5

PB7

D5

PB8

B6

PB9

G3

PB10

F3

PB11

G2

PB12

G1

PB13

F2

PB14

F1

PB15

HUB_PB15ALS_INT

VDDA

VDD_3

VDD_2

VDD_4

VDD_1

NRST

BOOT0

OSC_IN

OSC_OUT

VSS_3

BYPASS/VSS_2

VSSA

VSS_4

VSS_1

STM32F103RCY6TR_WLCSP64

F5

SA00005P210

A7

B1

E7

H2

S IC STM32F103RCY6TRC16 WLCSP MC U V1JV1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

SENSOR

V1JB1 M/B LA-A041P Schematic

30 52Tuesday, March 26, 2013

0.1

5

1 2

XEMC@

R712 0_0402_5%

1 2

USB20_P2_SW

@

USB20_P217

USB20_N217

D D

USB20_P2 USB20_N2

USB SW truth table

@

R730 0_0402_5%

1 2

USB20_N2_SW

@

R731 0_0402_5%

PCH_PWR_EN28,34

EC_3G_USB_ON28

U24

1

Y+

2

Y-

3

GND

4

M-

5

M+

PI3USB102ZLEX_TQFN10_1P6X1P3

3G@ SA000036200

SEL nOE Y+ Y-

X H Hi-Z Hi-Z

L L M+ M-

H L D+ D-

2

3

L53 DLW21SN900HQ2L_0805

1 2

R727 0_0402_5%

Resister overlap with L53

1 2

R728 0_0402_5%@R728 0_0402_5%@

1 2

R729 0_0402_5%3G@R729 0_0402_5%3G@

1 2

R451 100K_0402_5%@R 451 100K_0402_5%@

10

EC_3G_USB_ON_R

SEL

9

Vdd

8

OE

7

USB20_P2_SW

D+

6

USB20_N2_SW

D-

1

4

XEMC@

SAGE 3G R20

1

SM070001E00

SM070001E00 4

3GEMC@

+3VALW

1

2 3G@

3G@

USB20_P2_R

USB20_N2_R

SAGE 3G R10

0.01U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K C631

C631

C488

1

2

3G@

SAGE 3G DVT

SIM_CLK SIM_IO SIM_DET

SIM_RST

33P_0402_50V8K

470P_0402_50V7K

C397

C395

1

SIM_PWR

2

3G@

C C

3G@

SIM_DET

SIM_RST

CLK

2

I/O

3

SIM Card Detect

4

RST

5

Vpp

6

Vcc

7

GND

8

GND

MOLEX_503960-0694

CONN@

CONN@ MOLEX_503960-0694_8P-T

MOLEX_503960-0694_8P-T

D25

3

1

2

TVNST52302AB0_SOT523-3

XEMC@

XEMC@ SCA00001W00

SCA00001W00

9

GND

10

GND

11

GND

12

GND

13

GND

14

GND

JSIM1

1

SAGE 3G R20

B B

4

+3VALW

R499 100K_0402_5%3G@R499 100K_0402_5%3G@

EC_3G_PWR_EN#28

SAGE 3G R20

SIM_PWR

SIM_CLK

SIM_RST

Rds=13.5mΩ(Typ)

16.5mΩ(Max)

C402

33P_0402_50V8K

1

XEMC@C402

XEMC@

2

+VSB

20mil

1 2

C549 1U_0402_6.3V6K

C400 33P_0402_50V8K

C398 33P_0402_50V8K

C399 33P_0402_50V8K

3G@

1 2

3G@

1 2

3G@

EC_3G_PWR_EN#

DMN66D0LDW-7_SOT363-6

PROX_DET_EC28

C553

1

XEMC@C553

XEMC@

2

0.1U_0402_16V4Z

3G@

R483

47K_0402_5%

+3VALW to +3VS_WWAN

+3VALW

U23

U23 SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5

C545

4.7U_0603_6.3V6K

C546

4.7U_0603_6.3V6K

2

3G@C546

3G@

1

12

5

Q93A

3G@

2

1

33_0402_5%

34

SAGE 3G PVT

D

G

S

+1.8VS

PROX_DET_EC

3G@C545

3G@

R637

R501

1 2

3G@

10K_0402_5%

5

12

T35PAD @TPC32 T35PAD @TPC32 T36PAD @TPC32 T36PAD @TPC32 T37PAD @T37PAD @ T38PAD @T38PAD @

2

G

3

3G@

4

+3VS_WWAN

1 2 3

240mil

10mil

1

C548

0.1U_0603_25V7K

3G@

2

+3VS

R482

R482 200_0603_5%

200_0603_5%

3G@

1 2

SAGE 3G R20

61

D

G

2

EC_3G_PWR_EN#3VS_WWAN_GATE

S

Q93B

Q93B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

3G@

240mil

J12

@ J12

@

112

JUMP_43X118

+3VS_WWAN

2

SAGE 3G DVT

T23PAD @T23PAD @

SAGE 3G R10

EC_PCIE_WAKE#24,28

+3VS_WWAN

1 2

T28PAD @T28PAD @

1 2

10K_0402_5%@

10K_0402_5%@ R485

R485

R6440_0402_5% 3G@ R6440_0402_5% 3G@

WAKE_OUT_WWAN BODYSAR_DET#

For Tunable Antenna

12

C40133P_0402_50V8K 3G@C40133P_0402_50V8K 3G@

12

C825330P_0402_50V7K @C825330P_0402_50V7K @

12

C826330P_0402_50V7K @C826330P_0402_50V7K @

12

C827330P_0402_50V7K @C827330P_0402_50V7K @

12

C828330P_0402_50V7K @C828330P_0402_50V7K @

ANT_TUNE_0_AP ANT_TUNE_1_AP ANT_TUNE_2_AP ANT_TUNE_3_AP 3G_RESET# 3G_RESET#_R

BODYSAR_DET#

13

D

Q94

2N7002KW_SOT323-3

3G@

S

1 2 1 2 1 2 1 2 1 2

R6390_0402_5% @ R6390_0402_5% @ R6400_0402_5% @ R6400_0402_5% @ R6410_0402_5% @ R6410_0402_5% @ R6420_0402_5% @ R6420_0402_5% @ R6430_0402_5% @ R6430_0402_5% @

T29PAD @T29PAD @

T30PAD @T30PAD @

2

220U_B2_2.5VM_R15M

22U_0805_6.3V6M

33P_0402_50V8K

1

XEMC@C404

XEMC@

2

GPS_DISABLE# GPS_OFF#

W_DISABLE# 3G_OFF#

PWR_ON_OFF#

R645 0_0402_5%3G@R645 0_0402_5%3G@

R655 0_0402_5%3G@R655 0_0402_5%3G@

R1333 100K_0402_5%3G@R1333 100K_0402_5%3G@

C824

1

2

3G@

1

2

3G@

1 2

C551

1U_0402_6.3V6K

330P_0402_50V7K

C404

33P_0402_50V8K

3G Module Connector (NGFF)

J3G1

3G_CONFIG3

USB20_P2_R USB20_N2_R WWAN_LED#

3G_CONFIG0

ANT_TUNE_0 ANT_TUNE_1 ANT_TUNE_2 ANT_TUNE_3

3G_CONFIG1

3G_CONFIG2

1

CONFIG_3

3

Ground

5

Ground

7

USB_D+

9

USB_D-

11

Ground

13

CONFIG_0

15

Wake_On_WW AN#

17

BODYSAR_N

19

Ground

21

NC

23

NC

25

Ground

27

NC

29

NC

31

Ground

33

NC

35

NC

37

Ground

39

NC

41

NC

43

Ground

45

NC

47

NC

49

Ground

51

ANTCTL0

53

ANTCTL1

55

ANTCTL2

57

ANTCTL3

59

Reset#

61

CONFIG_1

63

Ground

65

Ground

67

CONFIG_2

69

GND

BELLW_80149-3223_67P

BELLW_80149-3223_67P-T

CONN@

Power_On_Off

W_DISABLE#

LED#

Reserved Reserved Reserved

GPS_DISABLE#

Reserved

UIM-RESET

UIM-CLK

UIM-DATA

UIM-PWR

Reserved Reserved Reserved Reserved Reserved

Reserved Reserved Reserved SIM_DET

GND

3.3V

NC

NC NC NC NC NC

NC

3.3V

22U_0805_6.3V6M

0.1U_0402_16V4Z

C540

1

2

3G@

2 4 6 8 10

12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68

1

C608

C550

1

+

2

3G@

+3VS_WWAN

PWR_ON_OFF# W_DISABLE#

GPS_DISABLE#

SIM_RST SIM_CLK SIM_IO SIM_PWR

SIM_DET

1

+3VS_WWAN

220U_B2_2.5VM_R15M

1

C609

+

2

3G@

Connect to EC

GPS_OFF# 28

3G_OFF# 28

+3VS_WWAN

220U_B2_2.5VM_R15M

C610

T44 PAD@ T44 PAD@

+3VS_WWAN

12

R260

100K_0402_5%

@

12

@

PWR_ON_OFF#

0.1U_0402_16V4Z

C407

@

SAGE 3G PVT

R1136 0_0201_5%@R1136 0_0201_5%@

R1137 0_0201_5%@R1137 0_0201_5%@

R1138 0_0201_5%

EC_3G_RST#28

PLT_RST#17,26,28,32,5

+3VALW_EC

R504

1 2

@

100K_0402_5%

A A

100K_0402_5%

EC_3G_ON_OFF#28

1 2

R311

@

8.2K_0402_5%

1

2

3G_RESET#

12

10K_0402_5%

10K_0402_5% R505

R505

@

SAGE 3G R10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

3G/GPS HUAWEI MU736

V1JB1 M/B LA-A041P Schematic

1

31 52Tuesday, March 26, 2013

0.1

5

+3VS +3VS_CARD

Card Reader

PCIE_PTX_ C_DRX_P214

PCIE_PTX_ C_DRX_N214

D D

CLK_PCIE_ CARD14

CLK_PCIE_ CARD#14

PCIE_PRX_ DTX_P214

PCIE_PRX_ DTX_N214

+ODR_PW R

+3VS_CA RD

C1524

10U_0603_6.3V6M

C1524

10U_0603_6.3V6M

C1525

0.1U_0402_10V7K@C1525

0.1U_0402_10V7K

1

@

2

C C

@

1 2

C1529

5P_0402 _50V8C

PCIE_PTX_ C_DRX_P2

PCIE_PTX_ C_DRX_N2

CLK_PCIE_ CARD

CLK_PCIE_ CARD#

1 2

C1521 4 .7U_0603_6.3V6 KC1521 4.7U_060 3_6.3V6K

1 2

C1522 0 .1U_0402_10V7 KC 1522 0.1U_040 2_10V7K

1 2

C1519 0 .1U_0402_10V7 KC 1519 0.1U_040 2_10V7K

1 2

C1523 0.1 U_0402_10V7KC1523 0.1U_ 0402_10V7K

AV12

PCIE_PRX_ C_DTX_P2PCIE_PRX_ DTX_P2

PCIE_PRX_ C_DTX_N2PCIE_PRX_DTX _N2

DV12

20 mils

20 mils 40 mils 40 mils

20 mils

0.1U_0402_10V7K

4.7U_0603_6.3V6K

@

C1526

1

2

1 2

SD_D1_R SD_D1

R1573 0_0402_ 5%

1 2

SD_D0_R SD_D0

R1574 0_0402_ 5%

1 2

SD_CLK_ R S D_CLK

R1575 1 0_0402_5%R1575 10_04 02_5%

1 2

R1576 0_0402_ 5%

1 2

R1577 0_0402_ 5%

DV33_18

C1527

@

SD_CMDSD_CMD_ R

@

SD_D3SD_D3_R

@

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

4

J14

@J 14

@

112

JUMP_43 X39

U145

HSIP

HSIN

REFCLKP

REFCLKN

AV12

HSOP

HSON

GND

DV12

Card1_3V3

3V3_IN

Card2_3V3

XD_CD#

DV33_18

GND

SP1

SP2

SP3

SP4

SD_D1

SD_D0

SD_CLK

SD_CMD

SD_D3

RTS5209 -GR_LQFP48_7X 7

3

2

1

40 mils40 mils

+3VS_CA RD

12

SAGE 3G PVT

RREF

3V3_IN

CLK_REQ#

PERST#

EEDO

EECS

EESK

GPIO/EEDI

MS_INS#

SD_CD#

SP15

SP14

SP13

SP12

SP11

SP10

SP9

SP8

SP7

SP6

SP5

DV12_S

GND

SD_D2

10 mils

48

RREF

R1572 6.2K_0603 _1%R15 72 6.2K_0 603_1%

40 mils

47

46

CARD_CL KREQ#

45

PLT_RST #

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

SD_CD#

SP15_SD WP_XDD7

20 mils

DV12_S

1 2

SD_D2 SD_D2_R

@

R1578 0_0402_ 5%

12

C1520 0.1 U_0402_10V7KC1520 0.1U_04 02_10V7K

CARD_CL KREQ# 14

PLT_RST # 17,26,28,31,5

1 2

R720 0_040 2_5%@R 720 0_0402_5%@

1 2

C1528 4 .7U_0603_6.3V6 KC1528 4.7U_060 3_6.3V6K

1 2

C1530 0 .1U_0402_10V7 K@C1530 0.1U_0402_ 10V7K@

JREAD1

Reserve for EMI

B B

A A

5

please close to JREAD1

XEMC@

1 2

12

XEMC@

R1579

C1531

6P_0402 _50V8D

R1579

33_0402 _5%

4

+ODR_PW R

SD_D2_R SD_D3_R SD_CMD_ R

SD_CLK_ R

SD_D0_R SD_D1_R SD_CD#

1 2

@

R1581 0_040 2_5%

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

JREAD1

1

DAT2

2

CD/DAT3

3

CMD

4

VDD

5

CLK

6

VSS

7

DAT0

8

DAT1

9

SWITCH TERM CD

10

DET TERM (GND)

PROCO_8 79S-N010-03A0

SP07000 US00

SP07000 US00 S SOCKET PROCONN 879S-N0 10-03A0 10P M-SD

S SOCKET PROCONN 879S-N0 10-03A0 10P M-SD PROCO_8 79S-N010-03A0_ 10P

PROCO_8 79S-N010-03A0_ 10P CONN@

CONN@

2011/06/ 24 2012/06/ 02

3

15

G5

14

G4

13

G3

12

G2

11

G1

Compal Secret Data

Deciphered Date

+ODR_PW R

C1534

0.1U_0402_10V7K@C1534

0.1U_0402_10V7K

C1533

10U_0603_6.3V6M

C1533

10U_0603_6.3V6M

C1532

0.1U_0402_10V7K@C1532

@

12

0.1U_0402_10V7K

R1580

100K_0402_5%@R1580

100K_0402_5%

1

@

2

1

2

C1535

0.1U_0402_10V7K@C1535

0.1U_0402_10V7K

1

@

2

Close to connector

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Card Reader RTS5209

32 52Wed nesday, March 13, 2013

1

0.1

5

D D

SAGE 3G DVT

C C

4

JIO1

1

3

5

7

7 9910 111112

13 15 17 19 21 23 25 27 29 31 33 35

39 41 43 45 47 49

PANAS_AXK8L50124BG_50P-T

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

30

29

32

31

34

33

36

35 373738 39

40

41

42

43

44

45

46

47

48

49

50

GND51GND GND53GND

PANAS_AXK8L50124BG

CONN@

VOL_DOWN#28

VOL_UP#28

HOME_KEY28

TM_D-11

TM_D+11

D_LOCK28

+3VLP

+3V_SEN

+3VS_WWA N

+RTCBATT_R

+RTCVCC

IO/B_DET28

+5VS

+3VS

TM_DTM_D+ ON/OFFBTN# D_LOCK VOL_DOWN# VOL_UP# HOME_KEY

IO/B_DET

2 4 6 8

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

52 54

3

USB20_P11 USB20_N11

DMIC_CLK

HDA_BITCLK_AUDIO

HDA_SYNC_AUDIO

HDA_SDIN0

HDA_RST_AUDIO#

HDA_SDOUT_AUDIO

I2C_1_SDA_SENSOR

I2C_1_SCL_SENSOR

DMIC_DATA

EAPD

BEEP#

EC_MUTE#

PCH_SPKR

ALS_INT

PWR_LED#

BATT_AMB_LED#

POUT

BI_DET BI_GATE

BI

USB20_P11 17 USB20_N11 17

HDA_BITCLK_AUDIO 13 HDA_SYNC_AUDIO 13

HDA_SDIN0 13

HDA_RST_AUDIO# 13

HDA_SDOUT_AUDIO 13

I2C_1_SDA_SENSOR 30 I2C_1_SCL_SENSOR 30

EAPD 28

BEEP# 28

EC_MUTE# 28

PCH_SPKR 13

ALS_INT 30

PWR_LED# 28

BATT_AMB_LED# 28

POUT 28

BI 36 BI_DET 28

SAGE 3G PVT

2

+3VLP

1

R348

R348 10K_0402_5%

10K_0402_5%

1 2

34

1

D

G

LID_SW# 28

2

Q80A

5

S

C346

0.1U_0402_16V4Z

2

BI_GATE

DMN66D0LDW-7_SOT363-6

B B

ON/OFF

+3VLP

R147

R147 100K_0402_5%

100K_0402_5%

1 2

MIC2

6

VDD

5

LEFT/RIGHT

DATA

4

CLOCK

SPM0423HD4H-WB-2_6P

GND

ON/OFF 28

1 2 3

+3VS_DMIC

+3VALW

LID Switch

12

LID@

1

C13

0.1U_0402_16V4Z

LID@

2

S IC AH180WG-7 SC-59 3P SENSOR SW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

LID@

2

U9

VDD

OUTPUT

GND

1

LID@

R13

R13 47K_0402_5%

47K_0402_5%

D6

3

D6

21

LID_SW#

LID@

RB751V-40_SOD323-2

1

C15

LID@

10P_0402_50V8J

2

Compal Secret Data

2010/11/1 2011/11/1

Compal Secret Data

Deciphered Date

SAGE 3G DVT

SW5 -Reserve for Debug

D21

SW5

@ SW 5

@

SMT1-05-A_4P

3

1

2

ON/OFFBTN#

4

5

6

SAGE 3G R10

Digital MIC

A A

SCA00001W00

D21

1

BAV70W_SOT323-3

ON/OFF BTN

+3VS +3VS_DMIC

1 2

DMIC_DATA DMIC_CLK

XEMC@

1 2 1 2

XEMC@

1

D55

TVNST52302AB0_SOT523-3

5

2

3

R658

R658 0_0402_5%

0_0402_5%

C23220P_0402_50V7K

C23220P_0402_50V7K C22220P_0402_50V7K

C22220P_0402_50V7K

3

2

61

D

G

2

S

Q80B

Q80B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

IO Board ( Audio / WIN / RST/ LED )

V1JB1 M/B LA-A041P Schematic

EC_RST# 28

SAGE 3G PVT

1

0.1

33 52Thursday, March 14, 2013

0.1

A

B

C

D

E

+5VALW to +5VS

Rds=13.5mΩ(Typ)

16.5mΩ(Max)

@

1 1

+VSB

R437

R437 20K_0402_5%

20K_0402_5%

20mil

SUSP

DMN66D0LDW-7_SOT363-6

+5VALW

C472

4.7U_0603_10V6K@C472

4.7U_0603_10V6K

C464

4.7U_0603_10V6K

C464

4.7U_0603_10V6K

2

1

12

R633 0_0402_5%R633 0_0402_5%

34

D

G

5

S

Q19A

U22

U22 SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5

5

4

10mil

12

5VS_GATE

1 2 3

+5VS

4.7U_0603_10V6K

2

1

C499

C499 .1U_0603_25V7K

.1U_0603_25V7K

2

C469

1U_0603_10V6K

C469

1U_0603_10V6K

C498

1

2

R440

R440 470_0603_5%

470_0603_5%

1 2

61

D

G

2

SUSP

S

Q19B

Q19B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

+3VALW

+5VALW

SAGE 3G For RF Requirement (Cross Moat)

XEMC@

1 2

C725 47P_0 402_50V8J

XEMC@

1 2

C726 47P_0 402_50V8J

XEMC@

1 2

C728 47P_0 402_50V8J

XEMC@

1 2

C729 47P_0 402_50V8J

XEMC@

1 2

C737 47P_0 402_50V8J

XEMC@

1 2

C738 47P_0 402_50V8J

+5VS

+3VS

1 2

C730 47P_0 402_50V8J

1 2

C731 47P_0 402_50V8J

1 2

C732 47P_0 402_50V8J

+5VS

1 2

C733 47P_0 402_50V8J

1 2

C734 47P_0 402_50V8J

+3VS

1 2

C736 47P_0 402_50V8J

XEMC@

+3VALW

+1.35V

+1.05VS_VCCPP

+3VALW to +3VS

Rds=13.5mΩ(Typ)

16.5mΩ(Max)

@

2

R368

47K_0402_5%

1

2 2

+VSB

20mil

SUSP

DMN66D0LDW-7_SOT363-6

+3VALW

C459

4.7U_0603_6.3V6K

C459

4.7U_0603_6.3V6K

C460

4.7U_0603_6.3V6K@C460

4.7U_0603_6.3V6K

5

2

1

12

R635 0_0402_5%R635 0_0402_5%

G

5

Q25A

12

34

D

S

U21

U21 SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5

4

10mil

3VS_GATE

1 2 3

+3VS

2

1

C463

C463 .1U_0603_25V7K

.1U_0603_25V7K

2

C461

4.7U_0603_6.3V6K

C461

4.7U_0603_6.3V6K

C458

1U_0402_6.3V6K

C458

1U_0402_6.3V6K

1

2

R436

R436 470_0603_5%

470_0603_5%

1 2

61

D

G

2

SUSP

S

Q25B

Q25B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

SUSP39

Q59A

34

DMN66D0LDW-7_SOT363-6

D

G

SUSP#28,39,40,41

5

S

SAGE 3G

SYSON28,39

SUSP# SYSON# SUSP SYSON

100K_8P4R_5%

61

D

G

2

Q59B

S

DMN66D0LDW-7_SOT363-6

RP45

+5VALW

18 27 36 45

Rds=2.6mΩ(Typ)

3.2mΩ(Max)

C378

4.7U_0603_6.3V6K

C378

4.7U_0603_6.3V6K

C375

4.7U_0603_6.3V6K@C375

4.7U_0603_6.3V6K

@

2

1

3 3

1

+VSB

R269

R269 33K_0402_5%

20mil

33K_0402_5%

SUSP

DMN66D0LDW-7_SOT363-6

12

R636 10K_0402_5 %R636 10K_0402_5%

G

5

Q15A

+1.35V to +1.35VS

+1.35V +1.35VS

U12

U12 SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5

5

4

10mil

12

34

D

S

ACIN28,37

1.35VS_GATE SUS P

2

ACIN

G

1 2 3

12

@

R268

510K_0402_5%@R268

510K_0402_5%

13

D

@

Q21

Q21 2N7002KW_SOT323-3

2N7002KW_SOT323-3

S

2

@

1

C380

C380 .1U_0603_25V7K

.1U_0603_25V7K

2

SAGE 3G

C339

4.7U_0603_6.3V6K@C339

4.7U_0603_6.3V6K

C338

1U_0402_6.3V6K@C338

1U_0402_6.3V6K

1

@

2

R245

R245 470_0603_5%

470_0603_5%

1 2

61

D

G

2

S

Q15B

Q15B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

+5VALW

R449

R449 100K_0402_5%

100K_0402_5%

1 2

PCH_PWR_EN#20

13

D

2

Q26

PCH_PWR_EN28,31

100K_0402_5%

R450

12

G

Q26 2N7002KW_SOT323-3

2N7002KW_SOT323-3

S

+1.8VS+0.675VS +1.05VS_VTT+1.35V

4 4

R365

@R365

@

470_0603_5%

1 2

Q24

13

D

@

2

G

2N7002KW_SOT323-3

S

12

R366

R366 22_0603_5%

22_0603_5%

13

D

Q23

2

G

2N7002KW_SOT323-3

S

A

R29

R29 470_0603_5%

470_0603_5%

1 2 13

D

Q5

2

G

2N7002KW_SOT323-3

S

R508

R508 470_0603_5%

470_0603_5%

1 2 13

D

Q34

SUSP SUSPSUSPSYSON#

B

2

G

2N7002KW_SOT323-3

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DC Interface

V1JB1 M/B LA-A041P Schematic

E

34 52Wednesday, March 13, 2013

0.1

A

PL101

1 1

CONN@

PJP101

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

2 2

DC_IN_S1

12

PC101

PC101 1000P_0603_50V7K

1000P_0603_50V7K

12

PC102

100P_0603_50V8

ADAPDET 37

1 2

HCB2012KF-121T50_0805

PL102

1 2

HCB2012KF-121T50_0805

B

12

PC103

100P_0603_50V8

VIN

12

PC104

PC104 1000P_0603_50V7K

1000P_0603_50V7K

C

D

3 3

+CHGRTC

4 4

A

PR101

@PR101

@

0_0402_5%

1 2

PR102

560_0603_5%

1 2

PR103

560_0603_5%

1 2

+3VLP

+RTCBATT+RTCBATT_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 Date of EOP

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DCIN/PRECHARGE

SAGE 3G

D

35 52

1.0

A

B

C

D

+3VLP +3VALW

CONN@

ACES_88231-08001

1 1

2 2

GND1 GND2

PJP201

1

2

3

4

5

6

7

8

9 10

BATT_S1

12

EC_SMDA EC_SMCA TH BI+

PL201

1 2

HCB2012KF-121T50_0805

PL202

1 2

HCB2012KF-121T50_0805

PC201

PC201 1000P_0402_50V7K

1000P_0402_50V7K

BATT+

12

PC203

0.01U_0402_25V7K

12

PR201

12

100_0402_1%

12

PJ201

100_0402_1%

2

PR204

100_0402_1%

12

PR207

PR207 1K_0402_5%

1K_0402_5%

BI 33

+VSBP +VSB

PR210

@PR210

@

6.49K_0402_1%

PR213

6.49K_0402_1%

PR215 1K_0402_1%PR215 1K_0402_1%

1 2

@ PJ201

@

112

JUMP_43X39

EC_SMB_DA1 28,37

EC_SMB_CK1 28,37

+3VALWP

+3VLP

BATT_TEMP 28

H_PROCHOT#

PQ202A

@

PQ202A

@

DMN66D0LDW-7_SOT363-6

61

D

2

G

S

H_PROCHOT#

+3VLP +3VALW

12

PR203

0_0402_5%

PR202

0_0402_5%

@ PR203

@

1 2

12

PC202

@

.1U_0402_16V7K

34

D

S

12

PR208@

100K_0402_1%

PR206

@

100K_0402_1%

5

G

PQ202B

@

PQ202B

@

DMN66D0LDW-7_SOT363-6

PH11 near

PU201

@

PU201

@

1

VCC

TMSNS1

2

GND

RHYST1

3

~OT1

TMSNS2

~OT24RHYST2

G718TM1U_SOT23-8

100K_0402_1%_NCP15WF104F03R C

風風

8

7

6

5

9.53K_0402_1%

PH201

@

PH201

@

PH2 near charger

PR211

@PR211

@

12

PR205

@PR205

@

21K_0402_1%

1 2

@PR214

@

10.5K_0402_1%

12

PR214

PH202

12

100K_0402_1%_NCP15WF104F03RC

PR209

3.92K_0402_1%

PR212

@PR212

@

1 2

0_0402_5%

CHG_TEMP28

PH9 under CPU botten side : CPU thermal protection at 92 degree C

PJ202

@ PJ202

@

2

112

JUMP_43X39

PQ201

TP0610K-T1-E3_SOT23-3

B+

100K_0402_1%

3 3

VL

12

PR227

100K_0402_1%

PR228

1K_0402_5%

SPOK38

1 2

1U_0402_6.3V6K

PC208

2

G

12

100K_0402_1%

PR225

22K_0402_1%

13

D

PQ204

2N7002KW_SOT323-3

S

PR222

12

PC205

@

0.22U_0603_25V7K

12

0.22U_0603_25V7K

13

2

+VSBP

12

PC206

.1U_0603_25V7K

H_PROCHOT#28,5

13

D

PQ203

2N7002KW_SOT323-3

For 45W adapter==>action 48W , Recovery 37W

For 45W adapter==>action 48W , Recovery 37WFor 45W adapter==>action 48W , Recovery 37W

S

PR219

100K_0402_1%

2

G

12

PR216

PR217

0_0402_5%

@

@ PR217

@

1 2

12

PC204

0.1U_0603_25V7K

12

MAINPWON38

0.1U_0603_25V7K

100K_0402_1%

1 2

MAINPWON_L28

PR224

12

PR220@

MAINPWON

0_0402_5%@

PU202

1

VCC

TMSNS1

2

GND

RHYST1

3

~OT1

TMSNS2

~OT24RHYST2

G718TM1U_SOT23-8

1000P_0402_50V7K

此此此此此

8

7

6

5

9.53K_0402_1%

PC207

EC pin

21K_0402_1%

PR223

12

PR218

12

PR221

3.92K_0402_1%

12

1 2

PR226

39K_0402_1%

12

PH203

12

PR229

PR229 33K_0402_1%

33K_0402_1%

ADP_I28,37

100K_0402_1%_NCP15WF104F03RC

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2011/06/24 Date of EOP

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

SAGE 3G

D

36 52

1.0

A

B

C

D

for reverse input protection

13

D

2

G

PQ302

4

1 2 3

ADAPDET35

1 2

PR302

3M_0402_5%

12

A

1 2

PR301

1 1

PC301

2200P_0402_50V7K

2 2

3 3

4 4

PR301

1M_0402_5%

VIN

SIS412DN-T1-GE3_POWERPAK8-5

5

12

S

12

PR304

@

0_0402_5%

12

PR323

100K_0402_5%

PR325

100K_0402_5%

PQ301

2N7002KW_SOT323-3

PQ303

SIS412DN-T1-GE3_POWERPAK8-5

1 2 3

PC302

0.1U_0402_25V6

PR307

4.12K_0603_1%

4

12

PR308

4.12K_0603_1%

ACIN28,34

VIN VIN

12

100K_0402_5%

2

G

12

PR321

13

D

S

PQ307

2N7002KW_SOT323-3

P2P1

5

+3VLP

2

0.1U_0402_25V6

12

PC311

13

100ppm

PR303

0.02_1206_1%

1

2

PC307

1 2

0.1U_0603_25V7K

BQ24725_ACP

BQ24725_CMSRC

BQ24725_ACDRV

1 2

PR316

100K_0402_1%

PQ308

PDTC115EU_SOT323-3

4

3

PR320

422K_0402_1%

12

PC323

0.22U_0402_16V7K

BQ24725_ACN

ACOK

VIN

B

B+

VIN

3

12

PC309

0.1U_0402_25V6

PC312

1 2

1U_0603_25V6K

PU301

21

PAD

1

ACN

2

ACP

BQ24725A_VQFN20_3P5X3P5

3

CMSRC

4

ACDRV

5

ACOK

12

ACDET

12

PR322

66.5K_0402_1%

PC324

100P_0402_50V8J

CHG_B+

SIS412DN-T1-GE3_POWERPAK8-5

1 2

PR306

4.12K_0603_1%

PL302

CSOP1

12

112

JUMP_43X79

2

PD301

PD301 BAS40CW_SOT323-3

BAS40CW_SOT323-3

1

PC310

0.047U_0402_25V7K

1 2

12

PR309

20

VCC

ACDET6IOUT7SDA8SCL9ILIM

12

PR310

10_1206_1%

BQ24725_LX

19

PHASE

PR310

DH_CHG

BQ24725_BST

17

18

BTST

HIDRV

PJ301

2

12

2.2_0603_5%

2.2_0603_5% PD302

PD302 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1U_0603_25V6K

16

REGN

LODRV

GND

SRP

SRN

BATDRV

10

12

PR319

100K_0402_1%

12

DH_CHG

PC313

1 2

15

14

13

12

11

12

PC326

RF@ PC326

RF@

12

PC303

68P_0402_50V8J

10U_0805_25V6K

PR311

2.2_0603_5%

1 2

DL_CHG

10_0603_5%

1 2

SRN

6.8_0603_5%

BQ24725_BATDRV

1 2

PR317

@PR317

@

316K_0402_1%

1 2

PR318

316K_0402_1%

PC322

0.01U_0402_25V7K

12

DH_CHG-1

PR314

PR315

12

PC304

10U_0805_25V6K

CSOP1SRP

CSON1

PC305

@

4

+3VALW

+3VLP

PC306

2200P_0402_50V7K

0.1U_0402_25V6

5

PQ305

SIS412DN-T1-GE3_POWERPAK8-5

123

4.7UH_PCMC063T-4R7MN_5.5A_20%

BQ24725_LX CHG

5

PQ306

123

12

SIS412DN-T1-GE3_POWERPAK8-5

PC321

0.1U_0603_25V7K

BQ24725_BATDRV

1 2

12

PR313

4.7_1206_5%

12

PC320

680P_0402_50V7K

Vin Dectector

Min. Typ Max. VIN 17.26V 19.06V 22.66V ACDET 2.4V 2.65V 3.15 V

EC_SMB_CK1 28,36

EC_SMB_DA1 28,36

12

1 2

PR324

@ PR324

@

0_0402_5%

12

PC325

@PC325

@

0.1U_0402_16V7K

ADP_I 28,36

Close EC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 Date of EOP

Compal Secret Data

ILIM and external DPM

Min. Typ Max.

3.906A 3.966A 4.027A

Deciphered Date

C

5

0.01_1206_1%

1

2

PC316

0.1U_0402_25V6

PQ304

1 2 3

4

PR312

4

3

CSON1

12

PC317

0.1U_0402_25V6

Title

Size Document Number Rev

Custom

Date: Sheet of

12

1 2

12

PR305

@

PC308

PC328

RF@ PC328

RF@

PC327

RF@ PC327

RF@

Compal Electronics, Inc.

SAGE 3G

0.01U_0402_50V7K

0.1U_0402_25V6

12

68P_0402_50V8J

0_0402_5%

12

PC315

PC314

10U_0805_25V6K

CHARGER

D

12

PC318

@

2200P_0402_50V7K

10U_0805_25V6K

BATT+

12

PC319

@

0.01U_0402_50V7K

37 52

1.0

5

B+

PL401

HCB2012KF-121T50_0805

1 2

12

PC401

D D

PC401

PC403

PC404

@

0.1U_0603_25V7K

PC404

10U_0805_25V6K

2200P_0402_50V7K

SPOK36

C C

4

PU401

7

IN

8

12

PC405

10U_0805_25V6K

IN

9

GND

PG2LDO

SY8208BQNC_QFN10_3X3

OUT

EN1

EN2

1

3

6

BS

10

LX

4

5

ENM

PR401

1 2

2.2_0603_5%

LX_3V

+3VLP

12

PC410

4.7U_0603_6.3V6K

FB_3V

BST_3V_1BST_3V

3

ENLDO_3V5V

PC402

1 2

0.1U_0603_25V7K

PC429

0.01U_0402_25V4Z

1 2

1UH_PCMB053T-1R0MS_7A_ 20%

1 2

5*5*3 NW00

12

PR404

4.7_1206_5%

12

PC411

680P_0402_50V7K

1 2

PL402

PR414

1K_0402_5%

2

12

PC424

PC425

PC426

RF@ PC425

RF@

RF@ PC426

RF@

0.1U_0603_25V7K

0.1U_0603_25V7K 2200P_0402_50V7K

2200P_0402_50V7K

PR403

PC406

RF@ PC424

RF@

68P_0402_50V8J

PC406

150K_0402_1%

499K_0402_1%

12

1U_0603_25V6K

PR402

1

12

B+

+3VALWP

12

PC409

PC407

22U_0805_6.3VAM

PC409

PC408

22U_0805_6.3VAM

B+

PL403

HCB2012KF-121T50_0805

1 2

PR410

PC428

6800P_0402_25V7K

1 2

1UH_PCMB053T-1R0MS_7A_ 20%

12

PR406

4.7_1206_5%

12

PC422

2.2_0603_5%

1 2

LX_5V

VL

PC421

4.7U_0603_6.3V6K

PR405

FB_5V

PC416

0.1U_0603_25V7K

1 2

PU402

8

9

5

2

PC417

4.7U_0603_6.3V6K

IN

GND

VCC

PG

SY8208CQNC_QFN10_3X3

12

PC415

PC412

10U_0805_25V6K

B B

PR407

@PR407

@

ENM

PR408

2.2K_0402_5%

EC_ON28

MAINPWON36

2.2K_0402_5%

1 2

PD401 SBR2U30P1-7_POW ERDI123-2@PD 401 SBR2U30P1-7_POWERDI123-2@

1 2

PR409

@PR409

@

1 2

0_0402_5%

1 2

0_0402_5%

12

PC414

PC413

@

0.1U_0603_25V7K

2200P_0402_50V7K

12

1

ENM

EN1

3

EN2

6

BST_5V BST_5V_1

BS

10

LX

4

OUT

7

LDO

12

PR410

1K_0402_5%

1 2

5*5*3 NW00

PL404

12

680P_0402_50V7K

+5VALWP

12

PC427

RF@ PC427

RF@

68P_0402_50V8J

+3VALWP +3VALW

+5VALWP +5VALW

12

PC418

PC419

PC420

22U_0805_6.3VAM

PJ401

@PJ401

@

2

112

JUMP_43X118

PJ402

@PJ402

@

2

112

JUMP_43X118

12

PR411

@ PR411

@

402K_0402_1%

A A

5

402K_0402_1%

For EC use +3VALW,

12

mark "@" if use +3VLP

PC423

4.7U_0603_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/06/24 Date of EOP

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

3VALW/5VALW

SAGE 3G

1

38 52

1.0

A

Ipeak=12.2 A ; Imax=8 .54A ;Iocp =14.64A Delta I=3. 23=>1/2Del ta I=1.62A (F=285K H z) Rds(on)=14 m ohm(max) ; Rds(on) =11.5m ohm (typical) Ilimit_min =(18.7K*10 uA)/(14m)= 13.36A Ilimit_max =(18.7K*10 uA)/(11.5m )=16.26A Iocp=Ilimi t+1/2Delta I =14.97~ 17.88A

+0.675VSP

12

2012/08/01

靠靠

12

PC516

RF@ PC516

RF@

68P_0402_50V8J

12

PC506

PC507

10U_0805_25V6K

+VTT_REFP

+1.35VP

12

PC510

0.033U_0402_16V7K

PR507

PR507 680K_0402_1%

680K_0402_1%

SUSP#28,34,40,41

1 1

SYSON28,34

1 2

0.1U_0402_16V4Z

SUSP34

PC513

@

0_0402_5%

1 2

1

2

13

D

2

SUSP

G

PQ503

2N7002KW_SOT323-3

S

Output Cap PAD

PR508

PC514

@PC514

@

0.1U_0402_16V7K

5.76K_0402_1%

+1.35VS

PJ507

1

JUMP_43X39

1

2

PU501

21

1

2

3

4

5

PR510

+1.35VP

@PJ507

@

1

JUMP_43X39

1

2

20

19

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

12

VLDOIN

RT8207MZQW_W QFN20_3X3

FB

S3

6

7

S3_1.35V

DDR3L@ PR509

DDR3L@

FB=0.75V

12

To GND = 1.5V To VDD = 1.35V

PJ503

BST_1.35V

18

BOOT

S5

8

S5_1.35V

4.64K_0402_1%

@PJ503

@

PR502

LX_1.35V

UG_1.35V

2.2_0603_5%

1 2

BST_1.35V-1

prevent the switching too fast to short through

16

17

PHASE

PR509

UGATE

TON

9

LGATE

PGND

CS

VDDP

VDD

PGOOD

10

PR501

887K_0402_1%

12

15

LG_1.35V

14

PR504

18.7K_0402_1%

13

12

11

+3VALW

12

PR506

@

12

1.35V_B+

12

PC511

1U_0603_10V6K

PGOOD_1.35V

10K_0402_5%

PC505

0.1U_0603_25V7K

1 2

12

PR505

5.1_0603_5%

PC512

1U_0603_10V6K

5

4

5

4

12

1.35V_B+

12

PC502

4.7U_0805_25V6-K

PQ501

123

MDV1528URH_PDFN33-8-5

PQ502

123

MDV1525URH_PDFN33-8-5

Rds=11.5mΩ(Typ) 14mΩ(Max)

+5VALW

12

PC503

4.7U_0805_25V6-K

12

PR503

4.7_1206_5%

12

PC509

680P_0402_50V7K

12

PC504

PC501

@ PC504

@

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

1 2

1.5UH_MMD-06CZ-1R5M-V1_9A_20%

1.5UH_MMD-06CZ-1R5M-V1_9A_20% PL502

PL502

PJ501

@ PJ501

@

112

JUMP_43X118

2

B+

OVP=110%~120%

+1.35VP

1

12

+

PC508

PC515

330U_D2_2V_Y

2

RF@ PC515

RF@

68P_0402_50V8J

PJ504

@ PJ504

@

+1.35VP +1.35V

JUMP_43X118

+0.675VSP +0.675VS

JUMP_43X79

112

PJ506

@ PJ506

@

112

2

STATE S3 S5 1.35VP VTT_REFP 0.675VSP

S0

S3

S4/S5

Hi Hi

HiLo

Lo Lo

On

Off (Discharge)

On

Off (Discharge)

On

Off (Hi-Z)

Off (Discharge)

Note: S3 - sleep ; S5 - power off

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

2011/06/24 Date of EOP

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

1.5VP/0.75VSP/1.8VSP

SAGE 3G

39 52

1.0

5

D D

B+

PL601

HCB2012KF-121T50_0805

1 2

12

PC603

@ PC603

@

PR608

12

PC606

PC605

PC604

0.1U_0402_25V6

2200P_0402_50V7K

12

PC620

PC613

@ PC613

@

RF@ PC620

RF@

0.1U_0402_16V7K

2200P_0402_50V7K

12

10U_0805_25V6K

12

10U_0805_25V6K

PR606

PR606 1M_0402_1%

1M_0402_1%

12

PC621

RF@ PC621

RF@

68P_0402_50V8J

+3VS

12

68P_0402_50V8J

12

PC619

RF@ PC619

RF@

68P_0402_50V8J

10K_0402_1%

1 2

C C

+3VS

PR604

@ PR604

@

10K_0402_1%

VCCPPWRGOOD41

4

PU601

8

IN

EN

9

3

2

BS

LX

GND

FB

BYP

ILMT

PG

LDO

SY8208DQNC_QFN10_3X3

1

6

10

4

7

5

EN_+1.05VSP

BST_+1.05VSP

SW_+1.05VSP

FB_+1.05VSP

12

PC615

4.7U_0603_6.3V6K

PR601

0_0603_5%

1 2

PC616

4.7U_0603_6.3V6K

0.1U_0603_25V7K

+3VALW

PC601

1 2

12

VFB=0.6V

3

PL602

0.68UH_PCMC063T-R68MN_15.5A_20 %

1 2

7*7*3 5K80

PR605

4.7_0805_5%

PC614

680P_0402_50V7K

100K_0402_1%

PR602

330K_0402_1%

PR603

@PR603

@

1M_0402_1%

1 2

PC602

@ PC602

@

0.1U_0402_16V7K

1 2

12

PR607

12

PC622

.1U_0402_16V7K

PC617

12

220P_0402_50V8J

2

SUSP# 28,34,39,41

12

PC618

PC607

RF@ PC618

RF@

68P_0402_50V8J

22U_0805_6.3V6M

1

+1.05VS_VCCPP

12

PC608

22U_0805_6.3V6M

12

PC609

PC610

22U_0805_6.3V6M

12

PC611

22U_0805_6.3V6M

PC612

@

22U_0805_6.3V6M

+1.05VS_VCCPP

PJ601

@PJ601

@

112

JUMP_43X118

2

+1.05VS_VTT

12

PR609

133K_0402_1%

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/06/24 Date of EOP

PC623

1000P_0402_50V7K@

Compal Secret Data

Deciphered Date

PR610

1.2K_0402_1%@

12

2

PR611

100_0402_1%

12

1 2

VCCIO_SENSE 8

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

1.05VS_VTTP

SAGE 3G

1

40 52

1.0

5

4

3

2

1

VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.85V 1 0 0.775V 1 1 0.75V

D D

PC725

1 2

68P_0402_50V8J

RF@ PC725

+1.05VS_VTT

SA_PGOOD15,28

+3VS

C C

PR701

100K_0402_5 %

12

VCCPPWRGOOD40

RF@

+VCCSA_PWRG D

12

PC701

22U_0805_6.3V6M

+5VALW

1 2

@ PR704

@

0_0402_5%

PC702

PR704

2

PC703

1

@ PC703

@

2200P_0402_50V7K

12

PC704

1 2

22U_0805_6.3V6M

0.1U_0603_25V7K

PU701

9

GND

5

VIN

6

VPP

7

POK

8

VEN/MODE

G978F11U_SO 8

PC711

PC712

1 2

1U_0603_6.3V6M

4

Vo

3

PR703

@ PR703

@

Vo

0_0402_5%

2

1 2

D1

1

1 2

D0

PR705

@ PR705

@

0_0402_5%

PR702

1K_0402_5%

PR706

1K_0402_5%

12

H_VCCSA_VID1 9

H_VCCSA_VID0 9

12

PC705

12

PC709

PC708

PC706

1 2

@

22U_0805_6.3V6M

0.1U_0402_16V7K

PC708

PC707

1 2

22U_0805_6.3V6M

2200P_0402_50V7K

output voltage adjustable network

+VCCSAP

12

@PJ70 1

@

112

JUMP_43X39

@PJ70 5

@

112

JUMP_43X39

PJ701

PJ705

12

PC726

PC710

1 2

RF@ PC726

RF@

68P_0402_50V8J

22U_0805_6.3V6M

2

0.9V

+VCCSA+VCCSAP

PR707

@PR70 7

@

0_0402_5%

PR713

PR716

12

PR709

1M_0402_5%

12

Rup

12

Rdown

1 2

+1.8VSP_ON

12

PC714

@ PC714

PU703

1

FB

PJ702

@PJ 702

B B

+3VALW

@

2

112

JUMP_43X79

PC719

22U_0805_6. 3VAM

12

2

PG

3

IN

4

PGND

SY8003DFC_DF N8_2X2

FB=0.6V

Note:Iload(max)=3A

PGND SGND

9 8

7

EN

6

LX

NC

LX_1.8V

5

@

0.1U_0402_16V7K

PL701

1UH_PH041H-1 R0MS_3.8A_20%

1 2

12

20K_0402_1%

PR712

4.7_0603_5%

FB_1.8V

12

10K_0402_1%

PC724

680P_0402_50V7K

+1.8VSP +1.8VS

A A

5

4

SUSP#

Note:Iload(max)=2.5A

+1.8VSP

12

PC720

68P_0402_50V8J

12

PC722

22U_0805_6.3VAM

PC728

PC723

RF@ PC728

RF@

68P_0402_50V8J

22U_0805_6.3VAM

Vout=0.6V* (1+Rup/Rdown)

PJ704

@ PJ704

@

2

112

JUMP_43X79

4.7U_0603_6 .3V6K

PR711

1_0402_1%

SUSP#28,34,39,40

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

2011/06/24 Date of EOP

+3VS

12

PC713

@PC 713

@

1U_0402_6.3 V6K

Note:Iload(max)=3A

PU702

PU702 APL5930KAI-TRG_S O8

APL5930KAI-TRG_S O8

6

VCNTL

5

VIN

9

12

PR714

@PR71 4

@

22K_0402_5%

VIN

8

EN

7

POK

2

12

PC715

+1.5VSP_ON FB_1.5VSP

12

PC721

0.1U_0402_1 6V7K

Ien=10uA, Vth=0.3V, notice the res. and pull high voltage from HW

Compal Secret Data

Deciphered Date

3

VOUT

4

VOUT

2

FB

GND

1

FB=0.8V

12

PR710

20K_0402_1%

12

PR715

22.6K_0402_1 %

Title

Size Document Num ber Rev

Custom

Date: Sheet of

12

PC716

0.022U_0402_16V7K

Compal Electronics, Inc.

SAGE 3G

12

PC717

@

22U_0805_6.3V6M

PJ703

@PJ 703

@

112

JUMP_43X39

VCC_SAP

1

+1.5VSP

12

PC727

PC718

RF@ PC727

RF@

22U_0805_6.3V6M

68P_0402_50V8J

2

41 5 2

+1.5VS+1.5VSP

1.0

5

4

3

2

1

FBG

PR839

+3VS

28

COMPG

12

649_0402_1%

12

PR812

27

PGOODG

PC831

12

137K_0402_1%

12

PR810

24.9K_0402_1%

1.91K_0402_1%

25

26

BOOTG

UGATEG

PHASEG

LGATEG

VCCP

VDD

PWM2

LGATE1

PHASE1

UGATE1

16

PR831 1.91K_0402_1%PR831 1 .91K_0402_1%

For17 W 1+1 CPU_CORE LL= -2 .9mΩ, OCP ~40A GFX_CORE LL= -3 .9mΩ, OCP ~34A

12

PR836

511_0402_1%

6800P_0402_25V7K

1 2

+VGFX_CORE

VCC_AXG_SENSE9 VSS_AXG_SENSE9

PR803

@PR803

@

10_0402_1%

PC806

PH801

D D

C C

VR_ON28,5

VR_SVID_ALRT#8

VR_SVID_CLK8

VR_SVID_DAT8

VR_HOT#28

@ PC818

@

47P_0402_50V8J

PC818

1 2

PR821 0_0402_5%@ PR821 0_0402_5%@

1 2

PR823 0_0402_5%@ P R823 0 _0402_5%@

12

VSUMG-

PC801

0.1U_0402_16V7K

VSUMG+

PR817

27.4K_0402_1%

PH802

470K_0402_5%_ TSM0B474J4702RE

1 2

+1.05VS_VTT

B B

PC828

470P_0402_50V7K

PR833

2K_0402_1%

12

PC830

12

499_0402_1%

PR844

1.91K_0402_1%

PR837

+CPU_CORE

A A

5

VCCSENSE8

VSSSENSE8

10K_0402_1%_ERTJ0EG103FA

12

PR818 0_0402_5%@ PR818 0 _0402_5%@

PR820

@ PR82 0

@

PR824

@

0_0402_5%

1 2

12

@PC820

@

0.1U_0402_16V7K

12

PR845

130K_0402_1%

@ PR846

@

10_0402_1%

@ PR847

@

10_0402_1%

PH801

1 2

PR809

PR801

1 2

2.61K_0402_1%

0_0402_5%

PR826

PR825

1 2

130_0402_1%

PC820

PR834

42.2K_0402_1%

PC832

56P_0402_50V8

PC835

150P_0402_50V8J

12

PR846

12

PR847

1 2

11K_0402_1%

1 2

75_0402_5%

12

PC808

1 2

0.1U_0603_25V7K

PR819

3.83K_0402_1%

1 2

PR827

54.9_0402_1%

12

PC812

@ PC812

@

PH803

1000P_0402_50V7K

ALERT#

SDA

470K_0402_5%_ TSM0B474J4702RE

PC806

2200P_0402_50V7K

1 2

12

PC809

1 2

0.01UF_0402_25V7K

NTCG

SCLK

12

PR828

3.83K_0402_1%

12

1 2

PR830

27.4K_0402_1%

PC838

@PC838

@

330P_0402_50V7K

12

PC840

0.01UF_0402_25V7K

4

649_0402_1%

1 2

PR808

280_0402_1%

PU801

1

NTCG

2

VR_ON

3

SCLK

4

ALERT#

5

SDA

6

VR_HOT#

7

NTC

8

ISEN2

PR829

@ PR829

@

0_0402_5%

+5VS

PR802 10_0402_1%@ PR802 10_0402_1%@

12

PR806

12

29

30

31

32

33

PAD

RTNG

ISUMPG

ISUMNG

ISL95833HRTZ-T_TQFN32_4X4

ISEN19ISUMP10ISUMN11RTN12FB13COMP14PGOOD15BOOT1

12

PC839

@

330P_0402_50V7K

@ PC802

@

1000P_0402_50V7K

0.01UF_0402_25V7K

PC804

68P_0402_50V8J

12

PC807

150P_0402_50V8J

12

PR805

PR810= 24.9 Kohm==>Freq= 400KHz

PR810= 24.9 Kohm==>Freq= 400KHzPR810= 24.9 Kohm==>Freq= 400KHz

BOOTG

UGATEG1

PHASEG

LGATEG

24

23

22

21

20

19

LGATE1

18

PHASE1

17

UGATE1

BOOT1

VGATE 15

12

+3VS

PC829

PC833

@ PC829

@

1 2

0.1U_0603_25V7K

0.01UF_0402_25V7K

Close Phase 1 choke

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

PC802

PC803

12

3

PR838 11K_ 0402_1%PR838 11K_0402_1%

12

1 2

PC805

470P_0402_50V7K

12

PR807

1.65K_0402_1%

12

PC817

1U_0603_10V6K

12

PR835

2.61K_0402_1%

12

PH804

12

PC837

12

PR804

499_0402_1%

12

PR811

0_0603_5%

UGATEG1 UGATEG1-1

PHASEG

BOOTG

LGATEG

1_0603_5%

10K_0402_1%_ERTJ0EG103FA

0.1U_0402_16V7K

PR813

2.2_0603_5%

12

PR822

12

VSUM+

VSUM-

2011/06/24 Date of EOP

1 2

PC815

0.22U_0603_16V7K

12

1 2

Rds(on)=2.7m-3.3m ohm

Rds(on)=2.7m-3.3m ohm Rds(on)=2.7m-3.3m ohm

+5VS

PC819

1U_0603_10V6K

PR832

0_0603_5%

1 2

UGATE1

PHASE1

PR840

2.2_0603_5%

BOOT1

LGATE1

12

0.22U_0603_16V7K

Compal Secret Data

Deciphered Date

UGATE1-1

1 2

PC834

4

56via

For ULV 17W 1+1

For ULV 17W 1+1For ULV 17W 1+1 CPU_CORE LL= -2.9mΩ,Iocp_cpu=39.6A

CPU_CORE LL= -2.9mΩ,Iocp_cpu=39.6A

CPU_CORE LL= -2.9mΩ,Iocp_cpu=39.6ACPU_CORE LL= -2.9mΩ,Iocp_cpu=39.6A GFX_CORE LL= -4.6mΩ,Iocp_gfx=21.6A

GFX_CORE LL= -4.6mΩ,Iocp_gfx=21.6A

GFX_CORE LL= -4.6mΩ,Iocp_gfx=21.6AGFX_CORE LL= -4.6mΩ,Iocp_gfx=21.6A

12

PC843

PC813

RF@ PC843

RF@

2200P_0402_50V7K

10U_0805_25V6K

PL803

0.24UH_FDUE0630J-H-R24M-P3_22A_20%

1 2

SAGE 3G

PR815

1 2

3.65K_0603_1%

VSUMG+

1

+

PC841

2

PC845

RF@ PC845

RF@

68P_0402_50V8J

33U_D2_25VM_R60M

0.24UH_FDUE0630J-H-R24M-P3_22A_20%

SAGE 3G

12

3.65K_0603_1%

PR841

4.7_1206_5%

PR842

VSUM+

Compal Electronics, Inc.

CPU_CORE/VGFX_CORE

SAGE 3G

680P_0402_50V7K

Custom

12

4

42via

5

2

5

CPU_B+

123

12

PC844

PC842

0.1U_0402_25V6

RF@ PC844

RF@

RF@ PC842

RF@

68P_0402_50V8J

PQ801

123

MDV1525URH_PDFN33-8-5

12

PR814

4.7_1206_5%

PQ802

123

PQ803

MDV1525URH_PDFN33-8-5

PQ804

MDU1511RH_POWERDFN56-8-5

4.7_1206_5%

12

PC816

680P_0402_50V7K

MDU1511RH_POWERDFN56-8-5

12

PC823

PC822

10U_0805_25V6K

PC836

Title

Size Document Number Rev

Date: Sheet of

CPU_B+

12

PC814

10U_0805_25V6K

OVP=VID +(120mV~ 200mV)

12

PR816

VSUMG-

12

PC826

@ P C826

@

0.1U_0402_25V6

PL804

1 2

+VGFX_CORE

1_0402_5%

HCB2012KF-121T50_0805

1 2

HCB2012KF-121T50_0805

1 2

12

PC827

2200P_0402_50V7K

12

PR843

PR843 1_0402_5%

1_0402_5%

VSUM-

1

PL801

PL802

+CPU_CORE

42 52

B+

1.0

5

4

3

2

1

PWR Rule 17W@ULV(CR BGA1023_GT2) CPU2.9m GFx3.9m CPU 330uF/9m *3, 22uF(0805) *12, 2.2uF(0402)*16

+VGFX_CORE

GFX 330uF/9m*2, 22uF(0805)*6, 10uF(0603)*6, 1uF(0402)*11

1.05V 330uF*2,10uF(0603)*10,1uF(0402)*26

12

D D

PC901

PC910

1U_0402_6.3V6K

12

PC928

PC929

10U_0603_6.3V6M

12

PC912

PC911

1U_0402_6.3V6K

12

PC930

PC931

10U_0603_6.3V6M

12

PC913

1U_0402_6.3V6K

12

PC932

10U_0603_6.3V6M

12

PC914

PC915

1U_0402_6.3V6K

12

PC933

10U_0603_6.3V6M

12

PC917

PC916

1U_0402_6.3V6K

12

PC919

PC918

1U_0402_6.3V6K

+CPU_CORE

PC906

2.2U_0402_6.3V6M

PC906

2.2U_0402_6.3V6M

12

PC904

2.2U_0402_6.3V6M

PC904

2.2U_0402_6.3V6M

12

PC903

2.2U_0402_6.3V6M

PC903

2.2U_0402_6.3V6M

PC902

2.2U_0402_6.3V6M

PC902

2.2U_0402_6.3V6M

PC905

2.2U_0402_6.3V6M

PC905

2.2U_0402_6.3V6M

12

PC908

2.2U_0402_6.3V6M

PC908

2.2U_0402_6.3V6M

PC907

2.2U_0402_6.3V6M

PC907

2.2U_0402_6.3V6M

12

PC909

2.2U_0402_6.3V6M

PC909

2.2U_0402_6.3V6M

12

For BOT side

PC922

2.2U_0402_6.3V6M

PC922

PC920

2.2U_0402_6.3V6M

PC920

2.2U_0402_6.3V6M

12

2.2U_0402_6.3V6M

PC921

2.2U_0402_6.3V6M

PC921

2.2U_0402_6.3V6M

12

2.2U_0402_6.3V6M

12

PC924

2.2U_0402_6.3V6M

PC924

2.2U_0402_6.3V6M

PC923

12

PC925

2.2U_0402_6.3V6M

PC925

2.2U_0402_6.3V6M

12

PC927

2.2U_0402_6.3V6M

PC927

2.2U_0402_6.3V6M

PC926

2.2U_0402_6.3V6M

PC926

2.2U_0402_6.3V6M

12

22U_0805_6.3V6M

1

ESR=9m ohm

C C

2

+

PC942

PC941

2

330U_D2_2V_Y

1

PC943

2

22U_0805_6.3V6M

1

PC944

PC945

PC946

2

22U_0805_6.3V6M

PC946

2

22U_0805_6.3V6M

1

PC948

PC947

2

22U_0805_6.3V6M

Vaxg

Can connect to GND if motherboard only

‧‧‧‧

supports external graphics and if GFX VR is not stuffed in a common motherboard design,

VAXG can be left floating in a common

‧‧‧‧

motherboard design (Gfx VR keeps VAXG from floating) if the VR is stuffed

12

PC956

PC957

PC958

PC959

1U_0402_6.3V6K

12

B B

12

PC972

12

PC973

1U_0402_6.3V6K

PC959

1U_0402_6.3V6K

12

PC974

PC975

1U_0402_6.3V6K

12

PC961

PC960

1U_0402_6.3V6K

12

PC976

PC977

1U_0402_6.3V6K

12

PC963

PC962

1U_0402_6.3V6K

12

PC979

PC978

1U_0402_6.3V6K

12

PC990

PC991

10U_0603_6.3V6M

12

PC964

PC965

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

PC992

PC965

1U_0402_6.3V6K

12

PC981

PC980

1U_0402_6.3V6K

12

PC986

PC985

10U_0603_6.3V6M

12

PC993

10U_0603_6.3V6M

12

PC966

1U_0402_6.3V6K

12

PC982

1U_0402_6.3V6K

12

PC987

10U_0603_6.3V6M

12

1

+

PC994

2

10U_0603_6.3V6M

+1.05VS_VTT

12

PC967

PC968

1U_0402_6.3V6K

12

PC983

PC984

1U_0402_6.3V6K

12

PC988

PC989

10U_0603_6.3V6M

PC995

ESR=9m ohm

330U_D2_2V_Y

ESR=9m ohm

+CPU_CORE

2

1

2

1

+

330U_D2_2V_Y

PC969

2

1

2

PC950

22U_0805_6.3V6M

PC950

22U_0805_6.3V6M

PC949

22U_0805_6.3V6M

PC949

22U_0805_6.3V6M

1

2

1

+

330U_D2_2V_Y

PC970

2

22U_0805_6.3V6M

PC936

22U_0805_6.3V6M

PC936

22U_0805_6.3V6M

1

2

PC951

22U_0805_6.3V6M

PC951

22U_0805_6.3V6M

1

2

1

+

330U_D2_2V_Y

PC971

2

PC938

22U_0805_6.3V6M

PC938

22U_0805_6.3V6M

PC937

PC952

1

2

PC953

22U_0805_6.3V6M

PC953

22U_0805_6.3V6M

1

2

PC935

22U_0805_6.3V6M

PC935

22U_0805_6.3V6M

PC934

22U_0805_6.3V6M

PC934

@

PC939

22U_0805_6.3V6M

PC939

22U_0805_6.3V6M

PC940

22U_0805_6.3V6M@PC940

22U_0805_6.3V6M

1

2

For TOP side

@

PC954

22U_0805_6.3V6M

PC954

22U_0805_6.3V6M

PC955

22U_0805_6.3V6M@PC955

22U_0805_6.3V6M

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 Date of EOP

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE_CAP

SAGE 3G

1

43 52

1.0

5

B+

D D

PR1404

INVTPWM16

C C

1 2

10K_0402_1%

PC1404

12

PR1406

12

0.1U_0603_50V7K

12

PC1409

1M_0402_1%

100P_0402_50V8J

DCTRL

4

PR1405

3

PQ1401

P5103EMG_SOT23-3

12

PC1405

100P_0402_50V8J

1 2

51_1206_5%

PQ1401

D

S

D

S

13

G

2

PR1402

1 2

100K_0402_5%

1 2

12

PD1401

PR1403

0_0603_5%

PU1401

1

PGND

4.7UH_PCMC06 3T-4R7MN_5.5A_20%

12

PC1406

2.2U_1206_50V7K

LL4148_LL34-2

16EN15

17

TPAD

FAULT

2.2U_1206_50V7K

EN

14

IFB6

PL1401

1 2

13

IFB5

IFB4

SBR3U40P1-7_POW ERDI123-2

SW

12

PR1401

10_1206_1%

12

PC1401

S CER CAP 220P 50V J NPO 0603

12

PD1402

2 1

2

VOUT

12

2.2U_1206_50V7K

FB4 22

12

PC1408

PC1402

@ PC1402

@

2.2U_1206_50V7K

12

PC1403

2.2U_1206_50V7K

12

PC1407

1

+LG_VOUT

0.1U_0603_50V7K

2

SW

PR1407

BKOFF#28

B B

A A

5

1 2

10K_0402_1%

12

PR1408

1M_0402_1%

EN

12

PC1410

@ PC1410

@

100P_0402_50V8J

GND GND_SIGNAL

12

PC1411

PJ1401

@ PJ1401

@

1 2

PAD-OPEN1x1m

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

PC1412

@P C1412

@

1U_0805_50V7K

VOUT

12

100P_0402_50V8J

SW

3

VBAT

4

VO

2011/06/13

TPS61181ARTER_QFN16_3X 3

ISET

CIN6IFB1

5

12

62K_0402_1%

PR1409

Compal Secret Data

3

12

PC1414

0.1U_0402_10V7K

7

Deciphered Date

DCTRL

IFB2

8

GND

IFB3

11

DCTRL

10

9

2012/06/13

2

FB3 22

FB2 22

FB1 22

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LED Converter

SAGE 3G

Wednesday, March 13, 2013

1

44 52

0.1

5

4

3

2

Version change list (P.I.R. List) Page 1of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

D D

2

3

Add Adapter Detection Circuit.

4

C C

5

6

7

Design Change.

8

9

Design Change of IC Application.

Design Change of DC Jack Application.

Design Change of IC Application.Design Change.

Design Change of IC Application.

Design Change of IC Application.Design Change.

0.2 38 2012/12/13 DVTDesign Change.

0.2 44 2012/12/13 DVTDesign Change.

0.2

35

37

0.2 42 2012/12/24 DVT

0.2 44 2012/12/24 DVTFactory lack of material.Change Component Part Number.

0.2 42 2012/12/26 DVTFactory lack of material.Change Component Part Number.

0.2 44 2012/12/26 DVTX1 Code.Change Component Part Number.

0.3 38 2012/01/29 PVT

Add @PR410.@PR414 to SD028100180(S RES 1/16W 1K +-5% 0402) Add @PC429 to SE075472K80(S CER CAP 4700P 25V K X7R 0402) Add @PC428 to SE075472K80(S CER CAP 0.047U 25V K X7R 0402) Add PR412.@PR413.PR415 to SD028000080(S RES 1/16W 0 +-5% 0402)

Delete PC1413.

Add PR325 to SD028000080(S RES 1/16W 0 +-5% 0402) Add PR321.PR323 to SD028100380(S RES 1/16W 100K +-5% 0402) Add PQ307 to SB201440000(S TR PDTA144EU PNP SOT323) Add PQ308 to SB301150200(S TR PDTC115EU NPN SOT323)

Change PC831 to SE075682K80(S CER CAP 6800P 25V K X7R 0402) Change PC832 to SE071560J80(S CER CAP 56P 50V J NPO 0402)

Change PL1401 to SH000006J80 (S COIL 4.7UH +-20% PCMC063T-4R7MN 5.5A)

Change PC841 to SGA00007I00 (S POLY C 33U 25V M D2 ESR60M TQC H1.9)

Change PD1402 to SCS00005Y00 (S SCH DIO SBR3U40P1-7 POWERDI123-2)

Delete PR412.PR413.PR415.

Change @PR410.@PR414.@PC428.@PC429 to PR410.PR414.PC428.PC429.

2012/12/13 DVT

B B

10

11

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

0.3 38Design Change of IC Application.

0.4 37Design Change of Adapter Detection.

Compal Secret Data

2011/06/24 Date of EOP

3

Compal Secret Data

Change PC428 to SE075682K80(S CER CAP 6800P 25V K X7R 0402) Change PC429 to SE072103Z80(S CER CAP .01U 25V Z Y5V 0402)

Change PQ307 to SB000009Q80(S TR 2N7002KW 1N SOT323-3) Add PR325 to SD028100380(S RES 1/16W 100K +-5% 0402)

Title

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet of

2013/02/22 PVTDesign Change.

2013/02/23 Pre MPDesign Change.

Compal Electronics, Inc.

PIR (PWR)

EG51_HX M/B LA-9491P Schematics

1

45 52

1.0

5

4

3

2

1

VIN = B+

LDO = VL

PU402

D D

QFN10 Page 38

VIN = B+

LDO = +3VLP

(+VCCDSW3_3 = +3VLP)

PU401

SY8208CQNC_3X3

EC_ON

MAINPWON (VIN)

SYSON

SUSP#

ADAPTER

C C

B+

SUSP#

BATTERY

VR_ON

CHARGER

BKOFF#

B B

SY8208BQNC_3X3

QFN10 Page 38

PU501 RT8207MZQW_3X3

Page 39WQFN20

VIN = +5VALW

PU601 +1.05VS_VCCP SY8208DQNC_3X3

QFN10 Page 40

VIN = B+

PU801 ISL95833HRTZ-T_4X4

Page 42TQFN32

VIN = +5VS

PU1401 TPS61181ARTER_3X3

Page 44QFN16

VIN = B+

+5VALW

Page 27

PCH_PWR_EN#

Q64 AP2301GN-HF

SOT23-3 Page 20

+V5REF_SUS

EC

+3VALW_EC

4

SUSP

U22 SI7716ADN-T1-GE3

POWERPAK8-5 Page 34

+5VS

AUDIO CODEC

JIO1 (Audio)

A A

FAN

+5VS (FAN)

HDMI

+HDMI_5V_OUT

5

Page 33

Page 29

Page 23

USB_EN#

U17 AP2301MPG-13

MSO8

+USB3_VCCA

+3VLP

+5VALW

+3VALW

+1.35V

+0.675VS

(+1.05VS_VTT) (+1.05VS_PCH)

(VCCPPWRGOOD)

+CPU_CORE

+VGFX_CORE

+LG_VOUT (+INVPWR_B+)

Page 28

(VGATE)

PU702 APL5930KAI-TRG

SO8

Page 41

+1.8VS

+1.5VS

SUSP#

VIN = +3VS

PU703 SY8003DFC_2X2

DFN8 Page 41

VIN = +3VALW

PU701 G978F11U

SO8 Page 41

VIN = +1.05VS_VTT

VCCPPWRGOOD

U12

SUSP

SI7716ADN-T1-GE3

POWERPAK8-5 Page 34

+VCCSA

(SA_PGOOD)

U21 SI7716ADN-T1-GE3

+1.35VS

LED & LID

+3VALW (LED & LID)

AOAC_ON @WIFI

+3VS_WLAN

+3VS_WWAN

WIFI (w/o IOAC)

+3VS_WLAN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

2

Page 33

Page 24

Page 31

Page 24 Page 32

HUB_PWRGATE @SENSOR

AUDIO CODEC

CAMERA

TPM

mSATA

PCH_ENVDD @LCD

Custom

Date: Sheet of

+3VALW

SUSP

PCH_PWR_EN#

Q68

Page 34POWERPAK8-5

+3VS

+3V_SEN

+3VS (MIC)

+3VS (CAMERA)

+3V_TPM

+3VS_FULL

+LCDVDD

+3VS_WWAN

Page 30

Page 33

Page 27,33

Page 26

Page 25

Page 22

Page 31

AP2301GN-HF

Page 20SOT23-3

+VCCSUS3_3

+3VS_CARD

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

POWER TREE

V1JB1 M/B LA-A041P Schematic

1

46 52Wednesday, March 13, 2013

0.1

5

4

3

2

1

AC

Adapter IN

D D

VIN

-11

Switch MosFET

-8

VI

KBC

VI

KBC

EC_ON

DPWROK

GPG2

GPE0

PCH_RSMRST#

GPB7

GPI7

KBC

GPD5 APWROK

GPE1

GPE2

GPH0

GPJ1

+V5REF_SUS

VO

+VCCSUS3_3

VO

-5

PCH_PWROK

SYSON

SUSP#

PCH_PWR_EN

PBTN_OUT#

PM_SLP_S4#

PM_SLP_S3#

5

6

-2

+3VLP

10

VCC

GPE4

9

GPJ3

GPF1

GPD0

GPD1

+5VALW

EN

+3VALW

EN

5

ON/OFF

1

PWR BTN

C C

SA_PGOOD

VR_ON

B B

PCH_PWR_EN#

-3

A A

Battery_IN

Switch MosFET

-6

-1

SLP_SUS#

11

-4

2

3

4

DC

BATT+

-3

DPWROK

RSMRST#

SLP_SUS#

PWROK

PWRBTN#

SYSON

5

SUSP#

6

SUSP#

6

SUSP#

6

B+

-10

-2

4

Charger

PCH

SLP_S4# SLP_S3#

B+

+5VALW

B+

VLDOIN

+1.35V

KBC

+3VALW

VI

KBC

VDD/VDDP

KBC

PGOOD

VOEN

PHASE

SW

EN_S5

EN_S3

EN

EC_ON (S5 enable)

-8

EN

LX

SW2

3V

LDO

VIN

PGOOD

+1.35V

+0.675VS

VTT

+1.05VS_VCCP (+1.05VS_VTT) (+1.05VS_PCH)

VCCPPWRGOOD

+1.8VS

EC_ON (S5 enable)

-8

+3VALWP

+3VLP

SPOK

SYS_PWROK

DRAMPWROK

PROCPWRGD

PLTRST#

-7

-9

-1

+3VS

AND Gate

PM_DRAM_PWRGD

P

AB

Y

SYS_PWROK

16

PLT_RST#

SUSP

6

EN

5V

VIN

12

17

+VSB

7

+VSB

7

+VSB

7

SUSP#

8

VCCPPWRGOOD

8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/06/24 2012/06/02

+5VALWP

LX

SW2

VL

LDO

PGOOD

+3VALW

P

B

AND Gate

A

H_CPUPWRGD

+3VS

A

Buffer

NC

+5VALW

EN

+3VALW

+1.35V

+3VS

+1.05VS_VTT

KBC

EN

Compal Secret Data

Y

13

P

Y

VI

KBC

VO

VI

KBC

VOEN

VI

KBC

VOEN

VI

KBC

VOEN

VI

VO

PGOOD

Deciphered Date

-7

-9

-1

PM_DRAM_PWRGD_R

BUF_CPU_RST#

+5VS

+3VS

+1.35VS

+1.5VS

+VCCSA

SA_PGOOD

9

2

SM_DRAMPWROK

UNCOREPWRGOOD

RESET#

SVID

10

14

SVID_CLK/DATA/ALERT#

CPU

B+

+5VS

VR_ON

Title

Size Document Number Rev

Custom

V1JB1 M/B LA-A041P Schematic

Date: Sheet of

VDD/VCCP

VR_ON

KBC

SVID

PGOOD

Compal Electronics, Inc.

POWER TREE

PHASE1

PHASEG

1

+CPU_CORE

+VGFX_CORE

VGATE

15

47 52Wednesday, March 13, 2013

0.1

A

B

C

D

E

V1JV1 CLOCK MAP

XTAL

32.768K Hz

1 1

RTCX1 RTCX2

WLAN MD222

CLK_PCIE_MINI1 CLK_PCIE_MINI1#

100MHz

CLKOUT_PCIE1P CLKOUT_PCIE1N

XTAL 25M Hz

XTAL25_IN XTAL25_OUT

CLKOUT_DP_P CLKOUT_DP_N

CLKOUT_DMI_P

120MHz

100MHz

CLK_CPU_DPLL CLK_CPU_DPLL#

CLK_CPU_DMI CLK_CPU_DMI#

CPU

Ivy Bridge

CLKOUT_DMI_N

Card Reader RTS5209

2 2

Audio Codec

HDA_BITCLK_AUDIO

33 Ohm

AL271X

2MB

PCH_SPI_CLK_0

SPI ROM

3 3

33 Ohm

CLK_PCIE_CARD CLK_PCIE_CARD#

HDA_BITCLK_PCH

PCH_SPI_CLK

100MHz

24MHz

CLKOUT_PCIE4P CLKOUT_PCIE4N

CLKOUT_PCIE7P CLKOUT_PCIE7N

SPI_CLK

Intel

Panther Point-M

CLKIN_PCILOOPBACK

PCH

CLKOUT_PCI0

CLKOUT_PCI2

CLKOUT_PCI1

33MHz

CLK_PCI0

CLK_PCI_LPBACK

CLK_PCI2

CLK_PCI1

22 Ohm

CLK_PCI_TXM

CLK_PCI_LPC

TPM SLB9655

HSCK

LPCCLK

CLK_PCI_LPCPCH_SPI_CLK_1

EC IT8518

CK32K

Issued Date

C

CK32KE

2011/06/24 2012/06/02

4MB SPI ROM

4 4

A

B

EC_SPICLK

FSCK

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

XTAL

32.768K Hz

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CLOCK MAP

V1JB1 M/B LA-A041P Schematic

E

48 52Wednesday, March 13, 2013

0.1

A

B

SMBUS Block Diagram

C

D

E

1 1

+3VS

SDVO_SCLK SDVO_SDATA

+VCCSUS3_3

PCH_SMBCLK PCH_SMBDATA

Intel

2 2

Panther Point-M

PCH

PCH_SML0CLK PCH_SML0DATA

PCH_SML1CLK PCH_SML1DATA

+3VS

HDMI_SCLK HDMI_SDATA

EC_SMB_CK2 EC_SMB_DA2

HDMI Connector

ST Sensor HUB

(USB interface)

I2C_1_SCL_SENSOR I2C_1_SDA_SENSOR

I2C_SCL_GYRO I2C_SDA_GYRO

I2C_SCL_ACCEL I2C_SDA_ACCEL

I2C_SCL_ALS I2C_SDA_ALS

ST Gyroscope

ST G-sensor+E-compass

Capella Light sensor

DDR

+3VS

Thermal sensor

+3VS_LC

EC_SMB_CK2 EC_SMB_DA2

EC

3 3

ITE 8518

EC_SMB_CK1 EC_SMB_DA1

+3VALW_EC

TB_SMB_CK TB_SMB_DA

EC_SMCA EC_SMDA

ThunderBolt

Cactus - Ridge

Battery

EC SM Bus1 address

Device

Smart Battery

DCIN / Charge

PCH SM Bus address

Device Address

ST sensor HUB

4 4

Sensor HUB SM Bus address

Device Address

Gyroscope

E-compass + G sensor

ALS sensor

Address Address

XXXX XXXX b

XX

0001 001X b

13

PCH SM Bus address(Link 1)

XX XXXX XXXX b

D1 1101 000X b

D3 1101 001X b

33 0011 001X b

0010 000X b21

A

EC SM Bus2 address

Device

DDR Thermal sensor

Thunderbolt

AddressDevice

99

1001 101X b

0010 100X b(CIO P1)

29

0010 101X b(CIO P2)2B

2D 0010 110X b(CIO P3)

0010 111X b(CIO P4)2F

B

DCIN / charge

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SMBUS Block Diagrams

V1JB1 M/B LA-A041P Schematic

E

49 52Wednesday, March 13, 2013

0.1

A

B

C

D

E

V1JB1 SYSTEM Diagram

1 1

SYSTEM MB

FPC between MB & IO Board

JIO1

2 2

IO BOARD

JIO1

Audio Codec Rear Camera ALS RTC Battery

JSW1,JSW2

JWIN1

Wire between IO/B & WIN/B

3 3

FFC between IO/B & SW/B ( FFC x 2 )

JWIN1

JSW1,JSW2

WIN BUTTON BOARD

SWITCH BOARD

ON/OFF BTN VOL UP/DOWN BTN POWER LED (BLUE/AMB)

Window Home Key Reset BTN Prox Sensor

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2011/06/24 2012/06/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SYSTEM MAP

V1JB1 M/B LA-A041P Schematic

E

50 52Wednesday, March 13, 2013

0.1

5

R e qu est

Ite m

Ite m Issu e D es c rip t ion

Ite mIt e m

D D

DVT

01. Add net " IO/B_DET" to detect IO/B

- Avoid thermal sensor wrong action by remote mode cause system auto shut down

02. Add 3 clips at ext USB area (RF requirement)

03. Move D_LOCK pull up resistor from IO/B to M/B side (Reserve function)

04. Move ON/OFFBTN# circuit from IO/B to M/B side(Sub/B just SW BTN only)

05. Change R960 to 8.2k ohm (Board ID update)

06. Change RP19, RP20 package to R_0402*8 (HDMI signal fine tune requirement)

07. Change C451,C450 BOM structure to XEMC@

08. Delete R78 for Layout components reduce

09. Change SIM Card Connecotor as MOLEX_503960-0694 (ME requirement)

10. Change C548 to 0 ohm resistor (3G power from +3VS, not +3VALW)

11. Base on crystal vender suggest, change C756, C757 to 15pF, C744 & C745 to 12pF

PVT

01. Add test point at CPU pin B22, A19, B14, A11, B10, B6 (DFB requirement)

02. Modify EC_RST# circuit for Reset Button (Dual Mosfet)

C C

03. Add ODT1, CKE1, CS1# net to DDR for 8Gb DRAMs

04. Remove EC_ON, MAINPWON net from JIO1 (un-used net)

05. Change R960 to 18k ohm (Board ID update)

06. Change R185, R186, R720 to short pad

07. Change R637 to 33 ohm (3G PWR SEQ)

08. Reserve 0 ohm resistor to GND for sensor PB13 as ST suggestion

09. Remove Screw "H18" (ME outline modify)

10. Unstuff 3G power switch circuit (un-used -> 3G power source tie to +3VS directly)

11. Add 3G@ BOM option for WiFi only sku

12. Change R499, R503, R504 from 10k to 100k for DS5 power consumption

P a ge # T itle

P a ge #P a ge#

Title

TitleTitle

D ate

D ateD at e

R e qu estR eq ue st

O w ner

O w nerO w ner

4

V ersio n C hange L ist ( P . I. R . L ist )

V ersio n C hange L ist ( P . I. R . L ist )V ersio n C hange L ist ( P . I. R . L ist )

Issu e D es c rip t ionDa t e

Issu e D es c rip t ionI ssu e D es c rip t ion

3

Page 1

Page 1P age 1

2

So l u tio n D es cr ip tio n

So l u tio n D es cr ip tio n R e v.

So l u tio n D es cr ip tio nSolu t ion D esc r i p tio n

1

R e v.P a ge #

R e v.R ev .

R10

01. Change RP43 part number from SD302220A00(22 ohm) to SD309220A80 (22 ohm) for Green BOM request

02. Unstuff component of reserve circuit (un-used function) -> R503, Q7 (SIM_DET# to EC), R504 (EC_3G_ON_OFF#), R260, R311, R505, C407 (3G Ext. RST#)

03. Change R960 to 33k ohm (Board ID update)

B B

04. Unstuff R485 to avoid leakage to wlan module ( 3G provide power when S3/DS3)

05. Unstuff SW5 (for test phase only, MP remove)

06. Update PCB PN to R10

07. As source request (cancel vender-Cheng Hann), change below parts~

1. Change L23 PN from SM01000AX00 to SM01000EP00

2. Change L3, L4, L36, L38, L39, L40, L53, L68 PN from SM070001600 to SM070001E00

3. Change L52 PN from SM070001310 to SM070001E00

R20

01. Add USB switch to 3G USB signals for avoid DS3 leakage

02. Delete Q7, R503 (un-used component)

03. Rename EC_SIM_DET# to EC_3G_PWR_EN# (correct net name to meet actual function)

04. Change EC GPD7 (U53.M12) to EC_3G_USB_ON for 3G USB switch

05. Change R960 to 56k ohm (Board ID update)

06. Update PCB PN to R20

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2011/06/13 2012/06/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

EE P.I.R

V1JB1 M/B LA-A041P Schematic

1

51 52Tuesday, March 26, 2013

0.1

A

B

C

D

E

PCB

ZZZ1

1 1

LA-A041P MB Rev0: DAA0006P000

LA-A041P MB Rev1: DAA0006P010

LA-A041P MB Rev2: DAA0006P020

LA-A041P REV2

DAA0006 P020

CPU

UCPU1

I33217@

AV80638 01058401 SR0N 9 L1 1.8G ABO!

UCPU1

I53317@

AV80638 01058002 SR0N 8 L1 1.7G ABO!

2 2

UCPU1

I32365M@

AV80627 01313000 SR0U 3 J1 1.4G ABO!

S IC AV8063801058401 SR0N9 L1 1.8G ABO!

SA00005L5C0

S IC AV8063801058002 SR0N8 L1 1.7G ABO!

SA00005K6B0

S IC AV8062701313000 SR0U3 J1 1.4G ABO!

SA00005UH40

WLAN/BT Module

U1

WCBN 3501A W/BT MD222

UCPU1

AV80638 01119500 SR0X F L1 1.9G ABO!

UCPU1

AV80638 01129900 SR0X L L1 1.8G ABO!

UCPU1

AV80627 01313100 SR0U 4 J1 1.5G ABO!

LIONMD222 @

PK29S004B00

PK29S004B00 S_W/L_MOD WCBN3501A W /BT MD222 ABO!

S_W/L_MOD WCBN3501A W /BT MD222 ABO!

S IC AV8063801119500 SR0XF L1 1.9G ABO!

I33227@

I53337@

I32375M@

S IC AV8063801119500 SR0XF L1 1.9G ABO!

SA00006D990

S IC AV8063801129900 SR0XL L1 1.8G ABO!

SA00006D860

S IC AV8062701313100 SR0U4 J1 1.5G ABO!

SA00006ED50

SAGE 3G

3 3

4 4

Security Class ification

2011/06/ 24 2012/07/ 12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 24 2012/07/ 12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Option Component

V1JB1 M/B LA-A041P Schematic

52 52Thursday, March 14, 2013

E

0.1

Compal LA-A041P V1JB1 UMA SAGE 3G Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual