Compal LA-9861P Schematics

Page 1
CyberForum.ru
A
1 1
B
C
D
E
Rosetta 10FT/10FTG
2 2
LA-9861P REV 0.3 Schematic
Intel Processor (Ivy Bridge/Sandy Bridge)+
3 3
PCH(Panther Point)
2013-01-11 Rev 0.3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
VFKTA
VFKTA
VFKTA
1 56Thursday, January 17, 2013
1 56Thursday, January 17, 2013
1 56Thursday, January 17, 2013
E
0.3
0.3
0.3
of
of
of
Page 2
CyberForum.ru
A
B
C
D
E
VGA (DDR3)
nVIDIA N14x
page 13,14,15,16,17,18,19,20,21
1 1
PCI-Express Gen3 4X
8GT/s
eDP 1.1 2x
2.7GT/s
LVDS colay eDP Conn.
page 22
2 2
HDMI Conn.
RJ45 Conn.
page 23
RTL8106E & 8111G
PCIe port 1
USB Left
USB20 port 2
page 35
page 35
To sub-board
PCIe Gen1 1x
1.5V 5GT/s
USB20 2x
5V 480MHz
Intel CPU Ivy Bridge 35W
BGA-1023
31mm*24mm
page 5,6,7,8,9,10
FDI X8
2.7GT/s
DMI X4
5GT/s
Intel PCH Panther Point
FCBGA-989
25mm*25mm
page 24,25,26,27,28,29,30,31,32
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 1066/1333/1600 MT/s
USB30 2x
5V 5GT/s
USB20 3x
5V 480MHz
USB20 2x
5V 480MHz
PCIe Gen1 1x
1.5V 5GT/s
USB20 2x
5V 480MHz
SATA Gen3 1x
5V 6GHz(600MB/s)
SATA Gen2 1x
5V 3GHz(300MB/s)
USB Right
USB20 port 0,1 USB30 port 1,2
CardReader GL834L
PCIeMini Card WLAN and BT
SATA HDD
SATA ODD
200pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3
page 37
page 11,12
Int. Camera
USB port 11
page 22
SATA port 0
page 33
SATA port 2
page 34
USB20 port 8
page 37
PCIe port 2 &USB port 9
page 34
3 3
RTC CKT.
page 24
SPI ROM (4MB + 2MB)
page 24
Debug Port
page 42
LPC BUS
3.3V 33 MHz
KB9012
page 40
HD Audio
3.3V 24MHz
HDA Codec
ALC259
page 38
DC/DC Interface CKT.
page 42
Power Circuit DC/DC
page 43,44,45,46,47,48, 49,50,51
GCLK
4 4
SLG3NB300VTR
page 34
Touch Pad
Power/B
page 41
To sub-board
A
Int.KBD
page 41page 41
B
CIR
page 41
G-Sensor
page 41
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
LED+LID/B
C
page 41
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
SPK Conn
page 39
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
JPIO (HP & MIC)
page 39
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
VFKTA
VFKTA
VFKTA
2 56Thursday, January 17, 2013
2 56Thursday, January 17, 2013
2 56Thursday, January 17, 2013
E
of
of
of
0.3
0.3
0.3
Page 3
CyberForum.ru
5
4
3
2
1
DESIGN CURRENT 0.1A
B+
D D
RT8243AZQW
C C
VR_ON
B B
ISL95833HRTZ
SUSP#
SY8208DQNC
SYSON
RT8207MZQW
A A
DGPU_PWR_EN
NCP81172MNTWG
5
Ipeak=8.5A, Imax=5.95A, Iocp min=10.2
SUSP#
SY8032ABC
SUSP#
TPS22966DPUR
Ipeak=5A, Imax=3.5A, Iocp min=6.12A
SUSP#
TPS22966DPUR
Ipeak=14.37A, Imax=10.06A, Iocp min=17.24A
VGA_PWROK#
N-CHANNEL
AO3416
VCCP_PWRGOOD
G978F11U
Ipeak=16.66A, Imax=11.66A, Iocp min=20A
0.75VR_ON
SUSP
N-CHANNEL
FDS6676AS
1.5_PWR_EN#
N-CHANNEL
FDS6676AS
Ipeak=50A, Imax=35A, Iocp min=60A
P-CHANNEL
P-CHANNEL
G9191-330T1U
P-CHANNEL
P-CHANNEL
P-CHANNEL
APL3512ABI
P-CHANNEL
4
PCH_PWR_EN#
AO-3413
KB_LED
AO-3413
+5VS
LDO
ODD_EN#
AO-3413
WOWL_EN#
AO-3413
PCH_PWR_EN#
AO-3413
LCD_ENVDD
DGPU_PWR_EN
AO-3413
DESIGN CURRENT 5A
DESIGN CURRENT 2A
DESIGN CURRENT 6A
DESIGN CURRENT 400mA
DESIGN CURRENT 300mA
DESIGN CURRENT 1.6A
DESIGN CURRENT 5A
DESIGN CURRENT 330mA
DESIGN CURRENT 3A
DESIGN CURRENT 6A
DESIGN CURRENT 1.5A
DESIGN CURRENT 0.1A
DESIGN CURRENT 65A
DESIGN CURRENT 40A
DESIGN CURRENT 3A
DESIGN CURRENT 6A
DESIGN CURRENT 2A
DESIGN CURRENT 1.5A
DESIGN CURRENT 2A
DESIGN CURRENT 2A
DESIGN CURRENT 11A
DESIGN CURRENT 30A
+3VL
+5VALW
+5VALW_PCH
+1.8VS
+5VS
+5VS_LED
+3VS_HDP
+5VS_ODD
+3VALW
+3V_LAN
+3V_WLAN
+3VALW_PCH
+3VS
+LCD_VDD
+3VS_DGPU
+CPU_CORE
+GFX_CORE
+1.05VS_VCCP
+1.05VS_DGPU
+VCCSA
+1.5V
+0.75VS
+1.5V_CPU
+1.5VS
+VRAM_1.5VS
+VGA_CORE
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Power Tree
Power Tree
Power Tree
VFKTA
VFKTA
VFKTA
1
of
3 61Thursday, January 17, 2013
of
3 61Thursday, January 17, 2013
of
3 61Thursday, January 17, 2013
0.3
0.3
0.3
Page 4
CyberForum.ru
+5VALW
+3VALW
B
BTO Option Table
+1.5V
+5VS
+3VS
+1.8VS
+1.5VS
+1.05VS
+0.75VS
+CPU_CORE
+VGA_CORE
+GFX_CORE
+VTT
+VRAM_1.5V S
+3VS_DGPU
+1.05VS_DGPU
Function
description
description
A
Voltage Rails
power plane
1 1
State
( O MEANS ON X MEANS OFF )
+RTCVCC
B+
+5VL
+3VL
explain
BTO
Function
explain
BTO
C
CPU
Ivy Bridge i3
Ivy Bridge i3 Ivy Bridge i5
CPUI3@ CPUI5@
WOWL
WOWL
WOWL
WOWL@
Ivy Bridge i5
G-SENSOR
G-SENSOR
G-SENSOR
GSENSOR@
w/
ZPODD@
ZPODD
ZPODD
D
w/o
NONZP@
LVDS-eDP
LVDS-eDP
LVDS eDP
LVDS@ IEDP@
Camera & Mic
Camera & Mic
Camera & Mic
CAM@
CAM@EMI@ @CAM@EMI@
E
KB Light
KB Light
KB Light
KBL@
S0
S1
S3
2 2
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
O
O
O
O
O
O
O
O
O
O
O
X
O
O
O
O
O
X
O
O
O
O
X
X
O
X X
X
X X
OO
OO
X
description
explain
BTO
Function
X
description
explain
BTO
EMI@ @EMI@ ESD@ @ESD@ @RF@
Function
Function
PCH SM Bus Address
HEX
0001 0110 bSmart Battery
Address
1010 0000 bA0 H
1010 0100 bA4 H
PowerPower
+3VS
+3VS
+3VS
EC SM Bus2 Address
Device
96 H
1001 0110 bPCH
NVIDIA GPU 1001 1010 b
9E H
40 H
0100 0000 b
Power
+3VS
+3VS
+3VS
3 3
Device
DDR SO-DIMM 0
DDR SO-DIMM 1
WLAN/WIMAX
EC SM Bus1 Address
Device Address Address
+3VL
+3VL USB S&C 14640 35 H 0011 0101 b G-Sensor
HEX HEX
16 H
12 H 0001 0010 bSmart Charger+3VL
description
explain
BTO
KB9012 NPCE885N
GPU
N14M-GL
N14MGL@
9012@ 885@
N14P-GV2
N14P-GV2N14M-GL
N14PGV2@
EMI/ESD/RF part
EMI/ESD/RF part
EMI/ESD/RF part
EC
EC
GCLK@
ISPD
HDMI Logo
HDMI Logo
HDMI45@
GCLK
GCLK non-GCLK
GCLK@EMI@ @GCLK@EMI@
w/ S&M w/o S&M
GCLK
Sleep & Music
Sleep & Music
269@ 259@
non-GCLK
NOGCLK@
CRT
CRT
w/ CRT w/o CRT
CRT@ CRT@EMI@ NOCRT@
Panther Point
HM76R1@
PCH
Dual Rank
HM70HM76
HM70R1@
Red Word: don't mount
Dual Rank
DRANK@
Touch Screen
Touch Screen
Touch Screen
TOUCH@EMI@
VRAM
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Notes List
Notes List
Notes List
VFKTA
VFKTA
VFKTA
4 56Thursday, January 17, 2013
4 56Thursday, January 17, 2013
4 56Thursday, January 17, 2013
E
0.3
0.3
0.3
of
of
of
Page 5
CyberForum.ru
H_PROCHOT#<41>
H_THERMTRIP#<30>
H_PM_SYNC<27>
H_PWRGOOD<30>
+1.5V_CPU
12
RC14
RC14 200_0402_5%
200_0402_5%
B
H_SNB_IVB#<30>
T1 PADT1 PAD
T2 PADT2 PAD
H_PECI<41>
1 2
RC170 130_0402_5%RC170 130_0402_5%
H_SNB_IVB#
TP_SKTOCC#
H_CATERR#
H_PECI
RC159
RC159
1 2
H_PROCHOT#_R
56_0402_5%
56_0402_5%
H_THERMTRIP#
H_PM_SYNC
1 2
H_PWRGOOD_R
@
@
RC183 0_0402_5%
RC183 0_0402_5%
PM_DRAM_PWR GD_RPM _SYS_PWRGD_BUF
BUF_CPU_RST#
UC1B
UC1B
F49
PROC_SELECT#
C57
PROC_DETECT#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
C48
PM_SYNC
B46
UNCOREPWRGOOD
BE45
SM_DRAMPWR OK
D44
RESET#
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
A
@
@
12
PM_DRAM_PWR GD_R
CC621000P_0402_50V7K
CC621000P_0402_50V7K
ESD@
ESD@
1 2
@ESD@
@ESD@
1 2
1 1
H_PWRGOOD_R
CC63180P_0402_50V8J
CC63180P_0402_50V8J
H_THERMTRIP#
CC1100P_0402_50V8J
CC1100P_0402_50V8J
by ESD requestion and place near CPU
+1.05VS_VCCP
12
DRAMPWROK
+3VS
DRAMPWROK
12
12
RC44 62_0402_5%RC44 62_0402_5%
RC45 10K_0402_5%RC45 10K_0402_5%
2 2
+3VALW_PCH
RC11 200_0402_5%RC11 200_0402_5%
DRAMPWROK<27>
H_PROCHOT#
H_PWRGOOD
@
@
12
CC701000P_0402_50V7K
CC701000P_0402_50V7K
@
@
12
CC671000P_0402_50V7K
CC671000P_0402_50V7K
@
@
12
CC661000P_0402_50V7K
CC661000P_0402_50V7K
H_PECI
H_PM_SYNC
BUF_CPU_RST#
Please place near JCPU
+3VALW_PCH
@
@
0.1U_0402_10V7K
0.1U_0402_10V7K CC33
CC33
UC3
UC3
5
74AHC1G09GW_TSSOP5
12
1
B
2
A
74AHC1G09GW_TSSOP5
P
4
PM_SYS_PWRGD_BUF
O
G
3
10K_0402_5%
10K_0402_5%
RC13
RC13
12
C
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
MISC
MISC
BCLK
BCLK#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PRDY#
PREQ#
TCK TMS
TRST#
TDO
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
D
100 MHz
J3
CLK_CPU_DMI
H2
CLK_CPU_DMI#
120 MHz
AG3
CLK_CPU_EDP
AG1
CLK_CPU_EDP#
AT30
H_DRAMRST#
BF44
SM_RCOMP_0
BE43 BG43
N53 N55
L56 L55 J58
M60
TDI
L59
K58
G58 E55 E59 G55 G59 H60 J59 J61
RC56 140_0402_1%RC56 140_0402_1%
SM_RCOMP_1
RC59 25.5_0402_1%RC59 25.5_0402_1%
SM_RCOMP_2
RC61 200_0402_1%RC61 200_0402_1%
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
Close to CPU side
CLK_CPU_DMI <26> CLK_CPU_DMI# <26>
CLK_CPU_EDP <26> CLK_CPU_EDP# <26>
H_DRAMRST# <7>
12 12 12
T3 PAD@T3 PAD@ T4 PAD@T4 PAD@
1 2
RC55 51_0402_5%RC55 51_0402_5%
T6 PAD@T6 PAD@ T7 PAD@T7 PAD@
Stuff RC158&RC157 if do not support eDP
CLK_CPU_EDP#
CLK_CPU_EDP
H_DRAMRST#
by ESD requestion and place near CPU
DDR3 Compensatio n Signals Layout Note:Plac e these resistors near P rocessor
H_DRAMRST#
Routed as a sing le daisy chain
E
LVDS@
LVDS@
1 2
RC157 1K_0402_5%
RC157 1K_0402_5%
1 2
RC158 1K_0402_5%
RC158 1K_0402_5%
LVDS@
LVDS@
@ESD@
@ESD@
1 2
CC34 180P_0402_50V8J
CC34 180P_0402_50V8J
@ESD@
@ESD@
1 2
CC35 180P_0402_50V8J
CC35 180P_0402_50V8J
+1.05VS_VCCP
3 3
Buffered Rest to CPU
+3VS
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CC36
CC36
@
PLT_RST# <29,35,36,41>
UC2
UC2
PLT_RST#
4 4
1
OE#
2
IN
3
GND
74AHC1G125GW_SOT353-5
74AHC1G125GW_SOT353-5
A
@
2
5
VCC
4
BUFO_CPU_RST# BUF_CPU_RST#
OUT
+1.05VS_VCCP
12
RC38
RC38 75_0402_5%
75_0402_5%
43_0402_1%
43_0402_1%
1 2
RC35
RC35
B
XDP Connector
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
For power consumption
+5VS +3VS
R1
1A
Compal Secret Data
Compal Secret Data
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
C
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
R1
1 2
0_0603_5%
0_0603_5%
D
FAN_SPEED1<41>
FAN Control Circuit
+FAN1
12
R2
R2 10K_0402_5%
10K_0402_5%
1
C4
C4
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
JFAN
6
GND
5
GND
4
4
FANPWM<41>
+FAN1
12
D1
D1
BAS16_SOT23-3
BAS16_SOT23-3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Ivy Bridge_JTAG/XDP/FAN
Ivy Bridge_JTAG/XDP/FAN
Ivy Bridge_JTAG/XDP/FAN
VFKTA
VFKTA
VFKTA
10U_0603_6.3V6M
10U_0603_6.3V6M
E
3 2 1
ACES_50273-0040N-001
ACES_50273-0040N-001
1
C5
C5
2
5 56Thursday, January 17, 2013
5 56Thursday, January 17, 2013
5 56Thursday, January 17, 2013
3 2 1
of
of
of
@JFAN
@
0.3
0.3
0.3
Page 6
CyberForum.ru
A
B
C
D
E
+1.05VS_VCCP
RC1
RC1
24.9_0402_1%
UC1A
UC1A
1 1
2 2
+1.05VS_VCCP
eDP_COMP signals should be shorted near balls and routed with typical impedance <25m ohm
3 3
+1.05VS_VCCP
CPU_EDP_HPD<22>
4 4
2
G
G
IEDP@
IEDP@
RC9
RC9 100K_0402_5%
100K_0402_5%
1 2
DMI_PTX_CRX_N0<27> DMI_PTX_CRX_N1<27> DMI_PTX_CRX_N2<27> DMI_PTX_CRX_N3<27>
DMI_PTX_CRX_P0<27> DMI_PTX_CRX_P1<27> DMI_PTX_CRX_P2<27> DMI_PTX_CRX_P3<27>
DMI_CTX_PRX_N0<27> DMI_CTX_PRX_N1<27> DMI_CTX_PRX_N2<27> DMI_CTX_PRX_N3<27>
DMI_CTX_PRX_P0<27> DMI_CTX_PRX_P1<27> DMI_CTX_PRX_P2<27> DMI_CTX_PRX_P3<27>
FDI_CTX_PRX_N0<27> FDI_CTX_PRX_N1<27> FDI_CTX_PRX_N2<27> FDI_CTX_PRX_N3<27> FDI_CTX_PRX_N4<27> FDI_CTX_PRX_N5<27> FDI_CTX_PRX_N6<27> FDI_CTX_PRX_N7<27>
FDI_CTX_PRX_P0<27> FDI_CTX_PRX_P1<27> FDI_CTX_PRX_P2<27> FDI_CTX_PRX_P3<27> FDI_CTX_PRX_P4<27> FDI_CTX_PRX_P5<27> FDI_CTX_PRX_P6<27> FDI_CTX_PRX_P7<27>
FDI_FSYNC0<27> FDI_FSYNC1<27>
FDI_INT<27>
FDI_LSYNC0<27> FDI_LSYNC1<27>
1 2
RC2 24.9_0402_1%RC2 24.9_0402_1%
RC10
RC10 1K_0402_5%
1K_0402_5%
1 2
H_EDP_HPD#
13
D
D
2N7002_SOT23-3
2N7002_SOT23-3 QC1
QC1
IEDP@
IEDP@
S
S
H_EDP_AUXN<22> H_EDP_AUXP<22>
H_EDP_TXP0<22> H_EDP_TXP1<22>
H_EDP_TXN0<22> H_EDP_TXN1<22>
DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3
DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_FSYNC0 FDI_FSYNC1
FDI_INT
FDI_LSYNC0 FDI_LSYNC1
EDP_COMP
H_EDP_HPD#
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2]
P10
DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2]
P11
DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0]
W11
FDI0_TX#[1]
W1
FDI0_TX#[2]
AA6
FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2]
AC9
FDI1_TX#[3]
U6
FDI0_TX[0]
W10
FDI0_TX[1]
W3
FDI0_TX[2]
AA7
FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1]
AA3
FDI1_TX[2]
AC8
FDI1_TX[3]
AA11
FDI0_FSYNC
AC12
FDI1_FSYNC
U11
FDI_INT
AA10
FDI0_LSYNC
AG8
FDI1_LSYNC
AF3
eDP_COMPIO
AD2
eDP_ICOMPO
AG11
eDP_HPD#
AG4
eDP_AUX#
AF4
eDP_AUX
AC3
eDP_TX#[0]
AC4
eDP_TX#[1]
AE11
eDP_TX#[2]
AE7
eDP_TX#[3]
AC1
eDP_TX[0]
AA4
eDP_TX[1]
AE10
eDP_TX[2]
AE6
eDP_TX[3]
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
DMI Intel(R) FDI
DMI Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
G3 G1 G4
H22
PCIE_GTX_C_CRX_N0
J21
PCIE_GTX_C_CRX_N1
B22
PCIE_GTX_C_CRX_N2
D21
PCIE_GTX_C_CRX_N3
A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7
K22
PCIE_GTX_C_CRX_P0
K19
PCIE_GTX_C_CRX_P1
C21
PCIE_GTX_C_CRX_P2
D19
PCIE_GTX_C_CRX_P3
C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6
G22
PCIE_CTX_GRX_N0
C23
PCIE_CTX_GRX_N1
D23
PCIE_CTX_GRX_N2
F21
PCIE_CTX_GRX_N3
H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4
F22
PCIE_CTX_GRX_P0
A23
PCIE_CTX_GRX_P1
D24
PCIE_CTX_GRX_P2
E21
PCIE_CTX_GRX_P3
G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4
PEG_COMP
24.9_0402_1%
CC8 0.22U_0402_16V7KOPT@CC8 0.22U_0402_1 6V7KOPT@ CC11 0.22U_0402_16V7KOPT@C C11 0.22U_0402_16V7KOPT@ CC16 0.22U_0402_16V7KOPT@C C16 0.22U_0402_16V7KOPT@ CC20 0.22U_0402_16V7KOPT@C C20 0.22U_0402_16V7KOPT@
CC10 0.22U_0402_16V7KOPT@C C10 0.22U_0402_16V7KOPT@ CC5 0.22U_0402_16V7KOPT@CC5 0.22U_0402_1 6V7KOPT@ CC6 0.22U_0402_16V7KOPT@CC6 0.22U_0402_1 6V7KOPT@ CC7 0.22U_0402_16V7KOPT@CC7 0.22U_0402_1 6V7KOPT@
IVY Bridge
SANDY Bridge Gen1/Gen2 180 nF~265 nF
NV N13X Gen1/2/3 Suggest 220 nF
PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical
12
impedance = 43 m ohm (4 mils) PEG_ICOMPO signals should be routed with ­max length = 500 mils
- typical impedance = 14.5 m ohm (12 mils)
PCIE_GTX_C_CRX_N[0..15] <13>
PCIE_GTX_C_CRX_P[0..15] <13>
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_P3
PEG DG suggest AC cap
Gen1/Gen2
Gen3
75 nF~265 nF
180 nF~265 nF
PCIE_CTX_C_GRX_N[0..15] <13>
PCIE_CTX_C_GRX_P[0..15] <13>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge_DMI/PEG/FDI
Ivy Bridge_DMI/PEG/FDI
Ivy Bridge_DMI/PEG/FDI
VFKTA
VFKTA
VFKTA
6 56Thursday, January 17, 2013
6 56Thursday, January 17, 2013
6 56Thursday, January 17, 2013
E
0.3
0.3
0.3
of
of
of
Page 7
CyberForum.ru
A
DDR_A_D[0..63]<11>
UC1C
UC1C
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6
1 1
2 2
DDR_A_BS0<11> DDR_A_BS1<11>
3 3
DDR_A_BS2<11>
DDR_A_CAS#<11> DDR_A_RAS#<11>
DDR_A_WE#<11>
DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_CAS# DDR_A_RAS# DDR_A_WE#
AG6
AP11
AJ10
AR11
AU6
AR6
AT13
AU13
BC7
BA13 BB11
AY13 AV14 AR14
AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43
AW48
BC48 BC45 AR45
AT48
AY48 BA49 AV49 BB51
AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54
AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56
BD37
BF36 BA28
BE39 BD39
AT41
SA_DQ[0]
AJ6
SA_DQ[1] SA_DQ[2]
AL6
SA_DQ[3] SA_DQ[4]
AJ8
SA_DQ[5]
AL8
SA_DQ[6]
AL7
SA_DQ[7] SA_DQ[8]
AP6
SA_DQ[9] SA_DQ[10]
AV9
SA_DQ[11] SA_DQ[12]
AP8
SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16]
BB7
SA_DQ[17] SA_DQ[18] SA_DQ[19]
BA7
SA_DQ[20]
BA9
SA_DQ[21]
BB9
SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
B
SA_CK[0] SA_CK#[0] SA_CKE[0]
SA_CK[1] SA_CK#[1] SA_CKE[1]
SA_CS#[0] SA_CS#[1]
SA_ODT[0] SA_ODT[1]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
DDR_B_D[0..63]<12>
AU36
DDRA_CLK0
AV36
DDRA_CLK0#
AY26
DDRA_CKE0
AT40
DDRA_CLK1 DDRB_ CLK1
AU40
DDRA_CLK1# DDRB_ CLK1#
BB26
DDRA_CKE1 DDRB_CKE1
BB40
DDRA_SCS0# DDRB_SCS0#
BC41
DDRA_SCS1#
AY40
DDRA_ODT0 DDRB_ODT0
BA41
DDRA_ODT1
AL11
DDR_A_DQS#0
AR8
DDR_A_DQS#1
AV11
DDR_A_DQS#2
AT17
DDR_A_DQS#3
AV45
DDR_A_DQS#4
AY51
DDR_A_DQS#5
AT55
DDR_A_DQS#6
AK55
DDR_A_DQS#7
AJ11
DDR_A_DQS0
AR10
DDR_A_DQS1
AY11
DDR_A_DQS2
AU17
DDR_A_DQS3
AW45
DDR_A_DQS4
AV51
DDR_A_DQS5
AT56
DDR_A_DQS6
AK54
DDR_A_DQS7
BG35
DDR_A_MA0
BB34
DDR_A_MA1
BE35
DDR_A_MA2
BD35
DDR_A_MA3
AT34
DDR_A_MA4
AU34
DDR_A_MA5
BB32
DDR_A_MA6
AT32
DDR_A_MA7
AY32
DDR_A_MA8
AV32
DDR_A_MA9
BE37
DDR_A_MA10
BA30
DDR_A_MA11
BC30
DDR_A_MA12
AW41
DDR_A_MA13
AY28
DDR_A_MA14
AU26
DDR_A_MA15
DDRA_CLK0 <11> DDRB_CLK0 <12> DDRA_CLK0# <11> DDRA_CKE0 <11> DDRB_CKE0 <12>
DDRA_CLK1 <11> DDRA_CLK1# <11> DDRB_CLK1# <12> DDRA_CKE1 <11>
DDRA_SCS0# <11> DDRA_SCS1# <11> DDRB_SCS1# <12>
DDRA_ODT0 <11> DDRB_ODT0 <12> DDRA_ODT1 <11> DDRB_ODT1 <12>
DDR_A_DQS#[0..7] <11>
DDR_A_DQS[0..7] <11>
DDR_A_MA[0..15] <11>
C
UC1D
UC1D
BD13 BF12
BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54
BA58 AW59 AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59 AM60
AL59
AF61
AH60
BG39
BD42
AT22
AV43
BF40
BD45
AL4 AL1 AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9 BD9
BF8
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>
DDR_B_CAS#<12> DDR_B_RAS#<12>
DDR_B_WE#<12>
DDR_B_BS0 DDR_B_BS1 DDR_B_BS2
DDR_B_CAS# DDR_B_RAS# DDR_B_WE#
D
BA34 AY34 AR22
BA36 BB36 BF27
BE41 BE47
AT43 BG47
AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59
AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61
BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22
DDRB_CLK0 DDRB_CLK0# DDRB_CKE0
DDRB_SCS1#
DDRB_ODT1
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8
DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
SB_CK[0] SB_CK#[0] SB_CKE[0]
SB_CK[1] SB_CK#[1] SB_CKE[1]
SB_CS#[0] SB_CS#[1]
SB_ODT[0] SB_ODT[1]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
E
DDRB_CLK0# <12>
DDRB_CLK1 <12>
DDRB_CKE1 <12>
DDRB_SCS0# <12>
DDR_B_DQS#[0..7] <12>
DDR_B_DQS[0..7] <12>
DDR_B_MA[0..15] <12>
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
+1.5V
12
RC76
RC76
1K_0402_5%
1K_0402_5%
QC3
QC3
D
S
D
S
13
H_DRAMRST#<5>
RC78
RC78
4.99K_0402_1%
4.99K_0402_1%
4 4
DRAMRST_CNTRL_PC H<26,9>
1 2
RC73 0_0402_5%RC73 0_0402_5%
A
1 2
DRAMRST_CNTRL
BSS138 1N SOT23-3
BSS138 1N SOT23-3
G
G
2
1
CC37
CC37
0.047U_0402_25V6K
0.047U_0402_25V6K
2
DDR3_DRAMRST#_RH_DRAMRST#
B
RC77
RC77 1K_0402_5%
1K_0402_5%
1 2
SM_DRAMRST# <11,12>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge_DDR3
Ivy Bridge_DDR3
Ivy Bridge_DDR3
VFKTA
VFKTA
VFKTA
7 56Thursday, January 17, 2013
7 56Thursday, January 17, 2013
7 56Thursday, January 17, 2013
E
of
of
of
0.3
0.3
0.3
Page 8
CyberForum.ru
A
B
C
D
E
+CPU_CORE +1.05VS_VCCP
1 1
2 2
3 3
UC1F
UC1F
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
POWER
POWER
CORE SUPPLY
CORE SUPPLY
8.5A33A
AF46
VCCIO[1]
AG48
VCCIO[3]
AG50
VCCIO[4]
AG51
VCCIO[5]
AJ17
VCCIO[6]
AJ21
VCCIO[7]
AJ25
VCCIO[8]
AJ43
VCCIO[9]
AJ47
VCCIO[10]
AK50
VCCIO[11]
AK51
VCCIO[12]
AL14
VCCIO[13]
AL15
VCCIO[14]
AL16
VCCIO[15]
AL20
VCCIO[16]
AL22
VCCIO[17]
AL26
VCCIO[18]
AL45
VCCIO[19]
AL48
VCCIO[20]
AM16
VCCIO[21]
AM17
VCCIO[22]
AM21
VCCIO[23]
AM43
VCCIO[24]
AM47
VCCIO[25]
AN20
VCCIO[26]
AN42
VCCIO[27]
AN45
VCCIO[28]
AN48
VCCIO[29]
AA14
VCCIO[30]
AA15
VCCIO[31]
AB17
VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]
VCCIO50 VCCIO51
1mA
VCCIO_SEL
VCCPQE[1] VCCPQE[2]
VIDALERT#
VIDSCLK
VIDSOUT
AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15
+1.05VS_VCCP
W16 W17
BC22
+1.05VS_VCCP
AM25 AN22
A44
H_CPU_SVIDALRT#
B43 C44
PEG IO AND DDR IO
PEG IO AND DDR IO
RAILS
RAILS
For DDR
For PEG
1
CC71
CC71 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VS_VCCP
1
1
CC17
2
ESD@ CC17
ESD@
100P_0402_50V8J
100P_0402_50V8J
1
CC18
CC19
2
2
ESD@ CC18
ESD@
ESD@ CC19
ESD@
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
by ESD requestion and place near CPU
+1.05VS_VCCP+1.05VS_VCCP
12
RC91
RC91 130_0402_5%
130_0402_5%
1 2
RC90 43_0402_1%RC90 43_0402_1%
+CPU_CORE
12
RC89
RC89 75_0402_5%
75_0402_5%
VR_SVID_ALRT# <5 1> VR_SVID_CLK <51> VR_SVID_DAT <51>
Pull high resistor on VR side
RC93
RC93 100_0402_1%
100_0402_1%
Issued Date
Issued Date
Issued Date
1 2
12
RC97
RC97 100_0402_1%
100_0402_1%
Close to CPU
C
VCCSENSE <51> VSSSENSE <51>
Compal Secret Data
Compal Secret Data
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge_POWER-1
Ivy Bridge_POWER-1
Ivy Bridge_POWER-1
VFKTA
VFKTA
VFKTA
8 56Thursday, January 17, 2013
8 56Thursday, January 17, 2013
8 56Thursday, January 17, 2013
E
of
of
of
0.3
0.3
0.3
VCC_SENSE VSS_SENSE
4 4
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
A
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID QUIET
SENSE LINES SVID QUIET
B
F43 G43
AN16 AN17
Close to CPU
VCCIO_SENSE
12
RC96
RC96 10_0402_1%
10_0402_1%
VCCIO_SENSE <49>
12
RC98
RC98 10_0402_1%
10_0402_1%
+1.05VS_VCCP
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Page 9
CyberForum.ru
A
B
C
D
E
+GFX_CORE
UC1G
UC1G
29A
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
1 1
2 2
+GFX_CORE
12
RC105
RC105 100_0402_1%
100_0402_1%
Close to CPU
CC59
CC59
CC41
CC41
2
1
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
VCC_AXG_SENSE VSS_AXG_SENSE
1 2
+1.8VS_VCCPLL
CC60
CC60
1
2
CC43
CC43
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
RC106
RC106
100_0402_1%
100_0402_1%
1
CC61
@ CC61
@
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VCC_AXG_SENSE<51> VSS_AXG_SENSE<51>
3 3
VCCPLL Decoupling: 1X 330U (6m ohm), 1X 10U, 2x1U
+1.8VS
Reserve for power consumption Remove on PVT phase
RC119 0_0805_5%R C119 0_0805_5%
+VCCSA
CC44
CC44
12
@
@
47U_0805_6.3V6M
47U_0805_6.3V6M
1 2
10U_0603_6.3V6M
10U_0603_6.3V6M
CC40
CC40
12
@
@
47U_0805_6.3V6M
47U_0805_6.3V6M
CC42
CC42
2
1
Place TOP IN BGA
10U_0603_6.3V6M
10U_0603_6.3V6M
Place BOT OUT BGA
CC75
CC77
CC77
1
4 4
2
+VCCSA Decoupling:
CC75
CC74
CC74
CC73
CC76
CC76
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CC73
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
1.2A
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
6A
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
1U_0402_6.3V6K
1U_0402_6.3V6K
POWER
POWER
VREF
VREF
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GRAPHICS
GRAPHICS
SENSE
LINES
SENSE
LINES
1.8V RAIL
1.8V RAIL
SA RAIL
SA RAIL
VCCSA VID
VCCSA VID
SM_VREF
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]
VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]
1mA
VCCDQ[1] VCCDQ[2]
QUIET RAILS
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
SENSE LINES
VCCSA_VID[0] VCCSA_VID[1]
lines
lines
5A
+V_SM_VREF should have 20 mil trace width
AY43
BE7 BG7
AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33
AM28 AN26
BC43 BA43
U10
D48 D49
+V_SM_VREF
+VREF_DQA_M3 +VREF_DQB_M3
CC57
CC57
2
1
CC82
CC82
1
2
+1.5V_CPU
1
CC72
CC72 1U_0402_6.3V6K
1U_0402_6.3V6K
2
H_VCCSA_VID0 H_VCCSA_VID1
Please kindly ch eck whether there is pull-do wn resister in PWR-side or H W-side
CC65
CC65
1
2
0.1U_0402_10V7K
0.1U_0402_10V7K
Place TOP IN BGA
CC52
CC52
CC51
CC51
2
2
1
1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CC80
CC80
CC81
CC81
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
H_VCCSA_VID0 <50> H_VCCSA_VID1 <50>
RC120 1K_0402_0.5%RC120 1K_0402_0.5%
RC109 1K_0402_0.5%RC109 1K_0402_0.5%
CC55
CC55
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
Place BOT OUT BGA
CC79
CC79
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.5V_CPU
1 2
1 2
+1.5V_CPU
CC50
CC50
CC53
12
@
@
47U_0805_6.3V6M
47U_0805_6.3V6M
CC86
CC86
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VCCSA_VID1
CC85
CC85
1
2
12
CC53
@
@
0
1
0
47U_0805_6.3V6M
47U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
CC54
CC54
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
CC78
CC78
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VCCSA_VID0
CC56
CC56
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CC87
CC87
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0
0
1
1 1
+1.5V_CPU +1.5V
1 2
CC46 0.1U_0402_10V7K@CC46 0.1U_0402_10V7K@
1 2
CC47 0.1U_0402_10V7K@CC47 0.1U_0402_10V7K@
1 2
CC48 0.1U_0402_10V7K@CC48 0.1U_0402_10V7K@
1 2
CC45 0.1U_0402_10V7K@CC45 0.1U_0402_10V7K@
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
Intel DDR Vref M3
BSS138 1N SOT23-3
BSS138 1N SOT23-3
+VREF_DQA_M3
+VREF_DQB_M3
BSS138 1N SOT23-3
BSS138 1N SOT23-3
+1.5V_CPU Decoupling: 2X 47U(MLCC), 6X 10U, 8X 1U
+VCCSA
0.90 V
0.80 V
0.725 V
0.675 V
Vgs=10V,Id=14.5A ,Rds=6mohm
RC203
RC203
470_0805_5%
470_0805_5%
1 2 34
SUSP
5
QC5B
QC5B
For Sandy Bridge
1
CC68
CC68 10U_0603_6.3V6M@
10U_0603_6.3V6M@
2
0.1U_0402_25V6
0.1U_0402_25V6
CC69
CC69
S
S
G
G
2
G
G
2
S
S
1 2 3 4
FDS6676AS_SO8
FDS6676AS_SO8
1
2
QC7
QC7
D
D
13
13
D
D
QC8
QC8
PJ1
@ PJ1
@
2
JUMP_43X39
JUMP_43X39
QC4
QC4
S S S G
RUN_ON_CPU1.5VS3
12
RC205
RC205 820K_0402_5%
820K_0402_5%
+VREF_DQA
DRAMRST_CNTRL_PC H <26,7>
+VREF_DQB
+1.5VS+1.5V_CPU
112
+1.5V
8
D
7
D
6
D
5
D
@
@
1 2
CC83
CC83
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
RC204
RC204
1 2
220K_0402_5%
220K_0402_5%
61
QC5A
QC5A
2
SUSP
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
B+
SUSP <43>
2X 47U(MLCC), 3X 10U, 5X 1U
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge_POWER-2
Ivy Bridge_POWER-2
Ivy Bridge_POWER-2
VFKTA
VFKTA
VFKTA
9 56Thursday, January 17, 2013
9 56Thursday, January 17, 2013
9 56Thursday, January 17, 2013
E
0.3
0.3
0.3
of
of
of
Page 10
CyberForum.ru
VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249]
B
VSS
VSS
VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11
NCTF
NCTF
VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14
M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59 G48
A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61
T89 PAD@T89 PAD@
A
UC1H
UC1H
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
A37
VSS[7]
A40
VSS[8]
A45
AA13 AA50 AA51 AA52 AA53 AA55 AA56
AB16 AB18 AB21 AB48 AB61 AC10 AC14 AC46
AC6 AD17 AD20
AD4 AD61 AE13
AE8
AF1 AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58 AF59 AG10 AG14 AG18 AG47 AG52 AG61
AG7
AH4 AH58
AJ13 AJ16 AJ20 AJ22 AJ26 AJ30 AJ34 AJ38 AJ42 AJ45 AJ48
AK1 AK52
AL10 AL13 AL17 AL21 AL25 AL28 AL33 AL36 AL40 AL43 AL47
AL61 AM13 AM20 AM22 AM26 AM30 AM34
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20]
AA8
VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69]
AJ7
VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90]
VSS
VSS
1 1
2 2
3 3
VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]
AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13
UC1I
UC1I
BG17 BG21 BG24 BG28 BG37 BG41 BG45 BG49 BG53
BG9
C29 C35 C40 D10 D14 D18 D22 D26 D29 D35
D4 D40 D43 D46 D50 D54 D58
D6 E25 E29
E3 E35 E40 F13 F15 F19 F29 F35 F40 F55 G51
G6 G61 H10 H14 H17 H21
H4 H53 H58
J1 J49 J55
K11 K21 K51
K8 L16 L20 L22 L26 L30 L34 L38 L43 L48 L61
M11 M15
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
C
UC1E
UC1E
B50
CFG0
CFG2
CFG4 CFG5 CFG6 CFG7
@
T87PAD@T87PAD
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
RESERVED
RESERVED
These pins are for s older joi nt reliabilit y and non- critical to function. For BGA on ly.
DC_TEST_A4 DC_TEST_C4 DC_TEST_D3 DC_TEST_D1
DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61
DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59
DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58
DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1
BCLK_ITP
BCLK_ITP#
RSVD30 RSVD31 RSVD32 RSVD33
RSVD34 RSVD35 RSVD36 RSVD37 RSVD38
RSVD39 RSVD40
RSVD41 RSVD42 RSVD43 RSVD44
RSVD45
D
N59 N58
N42 L42 L45 L47
M13 M14 U14 W14 P13
AT49 K24
AH2 AG13 AM14 AM15
N50
A4 C4 D3
DC_TEST_C4_D3
D1 A58 A59 C59
DC_TEST_A59_C59
A61 C61
DC_TEST_A61_C61
D61 BD61 BE61 BE59
DC_TEST_BE61_BE59
BG61 BG59
DC_TEST_BG61_BG59
BG58 BG4 BG3 BE3
DC_TEST_BG3_BE3
BG1 BE1
DC_TEST_BG1_BE1
BD1
E
CFG Straps for Processor
(CFG[17:0] internal pull high 5~15K to VCCIO)
CFG2
12
RC79
RC79 1K_0402_1%
1K_0402_1%
@
@
PEG Static Lane Reversal - CFG2 is for the 16x
1: Normal Operation; Lane # definition
CFG2
matches socket pin map definition
0:Lane Reversed
*
CFG4
12
RC82
RC82 1K_0402_1%
1K_0402_1%
IEDP@
IEDP@
Embedded Display Port Presence Strap
1 : Disabled; No Physical Display Port attached to Embedded Display Port
*
CFG4
0 : Enabled; An external Display Port device is connected to the Embedded Display Port
CFG7
12
RC85
RC85 1K_0402_1%
1K_0402_1%
@
@
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB de assertion
*
CFG7
0: PEG Wait for BIOS for training
CFG6
CFG5
1K_0402_1%
1K_0402_1%
RC83
RC83
12
12
RC84
RC84 1K_0402_1%
1K_0402_1%
@
@
@
@
PCIE Port Bifurcation Straps
IVY-BRIDGE_BGA1023 <BOM>
IVY-BRIDGE_BGA1023 <BOM>
CPU@
CPU@
CFG[6:5]
4 4
11: (Default) x16 - Device 1 functions 1 and 2 disabled
*
10: x8, x8 - Device 1 function 1 enabled; function 2 disabled
01: Reserved - (Device 1 function 1 disabled; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Ivy Bridge_GND/RSVD/CFG
Ivy Bridge_GND/RSVD/CFG
Ivy Bridge_GND/RSVD/CFG
VFKTA
VFKTA
VFKTA
10 56Thursday, January 17, 2013
10 56Thursday, January 17, 2013
10 56Thursday, January 17, 2013
E
0.3
0.3
0.3
of
of
of
Page 11
CyberForum.ru
5
4
3
2
1
+1.5V
JDDR3L
+VREF_DQA
1
CD2
CD1
CD1
0.1U_0402_10V7K
0.1U_0402_10V7K
2
D D
Close to JDDRL.1
C C
B B
A A
+3VS
DDR_A_BS2<7>
DDRA_CLK0<7> DDRA_CLK0#<7>
DDR_A_BS0<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
DDRA_SCS1#<7>
0.1U_0402_10V7K
0.1U_0402_10V7K
DDR_A_D0 DDR_A_D1
1
@CD2
@
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_D26 DDR_A_D27
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
DDR_A_MA10
DDR_A_MA13
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_D58 DDR_A_D59
1
CD26
CD26
2
SPD setting (SA0 , SA1) PU/PD by Channel A/B
->Channel A 00
->Channel B 01
5
+0.75VS
JDDR3L
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LCN_DAN06-K4406-0102
LCN_DAN06-K4406-0102 @
@
VSS3
DQS#0
DQS0 VSS6
VSS8 DQ12 DQ13
VSS10
DQ14 DQ15
DQ20 DQ21
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
VSS31
DQ38 DQ39
VSS33
DQ44
DQ45 VSS35 DQS#5
DQS5 VSS38
DQ46
DQ47 VSS40
DQ52
DQ53 VSS42
VSS43
DQ54
DQ55 VSS45
DQ60
DQ61 VSS47 DQS#7
DQS7 VSS50
DQ62
DQ63 VSS52
EVENT#
VTT2
DQ4 DQ5
DQ6 DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA SCL
+1.5V
2 4
DDR_A_D4
6
DDR_A_D5
8 10
DDR_A_DQS#0
12
DDR_A_DQS0
14 16
DDR_A_D6
18
DDR_A_D7
20 22
DDR_A_D12
24
DDR_A_D13
26 28 30 32 34
DDR_A_D14
36
DDR_A_D15
38 40
DDR_A_D20
42
DDR_A_D21
44 46 48 50
DDR_A_D22
52
DDR_A_D23
54 56
DDR_A_D28
58
DDR_A_D29
60 62
DDR_A_DQS#3
64
DDR_A_DQS3
66 68
DDR_A_D30
70
DDR_A_D31
72
74 76 78
A15 A14
A11
A7
A6 A4
A2 A0
S0#
G2
DDR_A_MA15
80
DDR_A_MA14
82 84
DDR_A_MA11
86
DDR_A_MA7
88 90
DDR_A_MA6
92
DDR_A_MA4
94 96
DDR_A_MA2
98
DDR_A_MA0
100 102 104 106 108 110 112 114 116 118 120 122 124 126
+VREF_CAA
128 130
DDR_A_D36
132
DDR_A_D37
134 136 138 140
DDR_A_D38
142
DDR_A_D39
144 146
DDR_A_D44
148
DDR_A_D45
150 152
DDR_A_DQS#5
154
DDR_A_DQS5
156 158
DDR_A_D46
160
DDR_A_D47
162 164
DDR_A_D52
166
DDR_A_D53
168 170 172 174
DDR_A_D54
176
DDR_A_D55
178 180
DDR_A_D60
182
DDR_A_D61
184 186
DDR_A_DQS#7
188
DDR_A_DQS7
190 192
DDR_A_D62
194
DDR_A_D63
196 198 200 202 204
+0.75VS
206
4
DDR3 SO-DIMM A Standard Type
SM_DRAMRST# <12,7>
DDRA_CKE1 <7>DDRA_CKE0<7>
DDRA_CLK1 <7> DDRA_CLK1# <7>
DDR_A_BS1 <7> DDR_A_RAS# <7>
DDRA_SCS0# <7> DDRA_ODT0 <7>
DDRA_ODT1 <7>
1
1
CD16
CD16
CD15
CD15
close to JDDRL.126
PM_SMBDATA <12,26,35,42> PM_SMBCLK <12,26,35,42>
0.1U_0402_10V7K
0.1U_0402_10V7K
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
@
@
2
2
DDR_A_DQS[0..7] <7>
DDR_A_DQS#[0..7] <7>
DDR_A_D[0..63] <7>
DDR_A_MA[0..15] <7>
+1.5V
12
RD1
RD1
1K_0402_1%
1K_0402_1%
+VREF_DQA
+1.5V
12
RD6
RD6
1K_0402_1%
1K_0402_1%
12
RD7
RD7
1K_0402_1%
1K_0402_1%
Layout Note: Place near JDDRL
+1.5V +1.5V +0.75VS
1 2
CD8 10U_0603_6.3V6MCD8 10U_0603_6.3V6M
1 2
CD9 10U_0603_6.3V6MCD9 10U_0603_6.3V6M
1 2
CD10 10U_0603_6.3V6MCD10 10U_0603_6.3V6M
1 2
CD11 10U_0603_6.3V6MCD11 10U_0603_6.3V6M
1 2
CD12 10U_0603_6.3V6MCD12 10U_0603_6.3V6M
1 2
CD13 10U_0603_6.3V6MCD13 10U_0603_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
12
Deciphered Date
Deciphered Date
Deciphered Date
+VREF_DQB
RD2
RD2
1K_0402_1%
1K_0402_1%
Layout Note: Place these 4 Caps near Command and Control signals of DIMMA
CD20 0.1U_0402_10V7KCD20 0.1U_0402_10V7K
CD17 0.1U_0402_10V7KCD17 0.1U_0402_10V7K
CD18 0.1U_0402_10V7KCD18 0.1U_0402_10V7K
CD19 0.1U_0402_10V7KCD19 0.1U_0402_10V7K
2
1 2
1 2
1 2
1 2
+1.5V
12
RD10
RD10
1K_0402_1%
1K_0402_1%
12
RD11
RD11
1K_0402_1%
1K_0402_1%
Date: Sheet
Date: Sheet
Date: Sheet
Layout Note: Place near JDDRL1.203 and 204
12
CD24 1U_0402_6.3V6KCD24 1U_0402_6.3V6K
12
CD21 1U_0402_6.3V6KCD21 1U_0402_6.3V6K
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Compal Electronics, Inc.
DDRIII-SODIMM0
DDRIII-SODIMM0
DDRIII-SODIMM0
VFKTA
VFKTA
VFKTA
11 56Thursday, January 17, 2013
11 56Thursday, January 17, 2013
11 56Thursday, January 17, 2013
1
of
of
of
0.3
0.3
0.3
Page 12
CyberForum.ru
A
B
C
D
E
DQ4 DQ5
DQ6 DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA SCL
+1.5V
2 4
DDR_B_D4
6
DDR_B_D5
8 10
DDR_B_DQS#0
12
DDR_B_DQS0
14 16
DDR_B_D6
18
DDR_B_D7
20 22
DDR_B_D12
24
DDR_B_D13
26 28 30 32 34
DDR_B_D14
36
DDR_B_D15
38 40
DDR_B_D20
42
DDR_B_D21
44 46 48 50
DDR_B_D22
52
DDR_B_D23
54 56
DDR_B_D28
58
DDR_B_D29
60 62
DDR_B_DQS#3
64
DDR_B_DQS3
66 68
DDR_B_D30
70
DDR_B_D31
72
74 76 78
A15 A14
A11
A7
A6 A4
A2 A0
S0#
G2
DDR_B_MA15
80
DDR_B_MA14
82 84
DDR_B_MA11
86
DDR_B_MA7
88 90
DDR_B_MA6
92
DDR_B_MA4
94 96
DDR_B_MA2
98
DDR_B_MA0
100 102 104 106 108 110 112 114 116 118 120 122 124 126
+VREF_CAB
128 130
DDR_B_D36
132
DDR_B_D37
134 136 138 140
DDR_B_D38
142
DDR_B_D39
144 146
DDR_B_D44
148
DDR_B_D45
150 152
DDR_B_DQS#5
154
DDR_B_DQS5
156 158
DDR_B_D46
160
DDR_B_D47
162 164
DDR_B_D52
166
DDR_B_D53
168 170 172 174
DDR_B_D54
176
DDR_B_D55
178 180
DDR_B_D60
182
DDR_B_D61
184 186
DDR_B_DQS#7
188
DDR_B_DQS7
190 192
DDR_B_D62
194
DDR_B_D63
196 198 200 202 204
+0.75VS
206
B
DDRB_CKE1 <7>
DDRB_CLK1 <7> DDRB_CLK1# <7>
DDR_B_BS1 <7> DDR_B_RAS# <7>DDR_B_BS0<7>
DDRB_SCS0# <7> DDRB_ODT0 <7>
DDRB_ODT1 <7>
CD46
CD46
Close to JDDRH.126
PM_SMBDATA <11,26,35,42> PM_SMBCLK <11,26,35,42>
DDR3 SO-DIMM B Standard Type
SM_DRAMRST# <11,7>
CD47
CD47
1
@
@
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
0.1U_0402_10V7K
0.1U_0402_10V7K
2
2
DDR_B_DQS#[0..7] <7>
DDR_B_DQS[0..7] <7>
DDR_B_D[0..63] <7>
DDR_B_MA[0..15] <7>
+1.5V
12
RD12
RD12
1K_0402_1%
1K_0402_1%
12
RD13
RD13
1K_0402_1%
1K_0402_1%
Layout Note: Place near JDDRH
+1.5V +0.75VS+1.5V
1 2
CD31 47U_0805_6.3V6MCD31 47U_0805_6.3V6M
1 2
CD41 10U_0603_6.3V6MCD41 10U_0603_6.3V6M
1 2
CD36 10U_0603_6.3V6MCD36 10U_0603_6.3V6M
1 2
CD37 10U_0603_6.3V6MCD37 10U_0603_6.3V6M
1 2
CD38 10U_0603_6.3V6MCD38 10U_0603_6.3V6M
1 2
CD39 10U_0603_6.3V6MCD39 10U_0603_6.3V6M
1 2
CD40 10U_0603_6.3V6MCD40 10U_0603_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Layout Note: Place these 4 Caps near Command and Control signals of DIMMB
CD33 0.1U_0402_10V7KCD33 0.1U_0402_10V7K
CD29 0.1U_0402_10V7KCD29 0.1U_0402_10V7K
CD30 0.1U_0402_10V7KCD30 0.1U_0402_10V7K
CD32 0.1U_0402_10V7KCD32 0.1U_0402_10V7K
Deciphered Date
Deciphered Date
Deciphered Date
D
1 2
1 2
1 2
1 2
Date: Sheet
Date: Sheet
Date: Sheet
Layout Note: Place near JDDRH.203 and 204
12
CD45 1U_0402_6.3V6KCD45 1U_0402_6.3V6K
12
CD42 1U_0402_6.3V6KCD42 1U_0402_6.3V6K
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Compal Electronics, Inc.
DDRIII-SODIMM1
DDRIII-SODIMM1
DDRIII-SODIMM1
VFKTA
VFKTA
VFKTA
12 56Thursday, January 17, 2013
12 56Thursday, January 17, 2013
12 56Thursday, January 17, 2013
E
of
of
of
0.3
0.3
0.3
+1.5V
JDDR3H
+VREF_DQB
CD28
CD28
1
@
@
2.2U_0402_6.3V6M
1 1
2.2U_0402_6.3V6M
2
Close to JDDRH.1
+3VS
DDRB_CKE0<7>
DDR_B_BS2<7>
DDRB_CLK0<7> DDRB_CLK0#<7>
DDR_B_WE#<7> DDR_B_CAS#<7>
DDRB_SCS1#<7>
1
CD49
CD49
2
0.1U_0402_10V7K
0.1U_0402_10V7K
2 2
3 3
4 4
DDR_B_D0 DDR_B_D1
CD27
CD27
1
DDR_B_D2 DDR_B_D3
0.1U_0402_10V7K
0.1U_0402_10V7K
2
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
DDR_B_MA10
DDR_B_MA13
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_D42 DDR_B_D43
DDR_B_D48 DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_D58 DDR_B_D59
12
RD15 10K_0402_5%R D15 10 K_0402_5%
SPD setting (SA0 , SA1) PU/PD by Channel A/B
->Channel A 00
->Channel B 01
A
+0.75VS
JDDR3H
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LCN_DAN06-K4806-0102
LCN_DAN06-K4806-0102
@
@
VSS3
DQS#0
DQS0
VSS6
VSS8 DQ12 DQ13
VSS10
DQ14 DQ15
DQ20 DQ21
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
VTT2
Page 13
CyberForum.ru
A
PCIE_GTX_C_CRX_P[0..3]<6>
PCIE_GTX_C_CRX_N[0..3]<6>
PCIE_CTX_C_GRX_P[0..3]<6>
PCIE_CTX_C_GRX_N[0..3]<6>
1 1
PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_N0 PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_N1 PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_N2 PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_N3
2 2
3 3
CLK_REQ_VGA#<26>
4 4
PCIE_GTX_C_CRX_P[0..3]
PCIE_GTX_C_CRX_N[0..3]
PCIE_CTX_C_GRX_P[0..3]
PCIE_CTX_C_GRX_N[0..3]
1 2
CV1 0.22U_0402_16V7KOPT@CV1 0.22U_0402_16V7KOPT @
1 2
CV2 0.22U_0402_16V7KOPT@CV2 0.22U_0402_16V7KOPT @
1 2
CV3 0.22U_0402_16V7KOPT@CV3 0.22U_0402_16V7KOPT @
1 2
CV4 0.22U_0402_16V7KOPT@CV4 0.22U_0402_16V7KOPT @
1 2
CV5 0.22U_0402_16V7KOPT@CV5 0.22U_0402_16V7KOPT @
1 2
CV6 0.22U_0402_16V7KOPT@CV6 0.22U_0402_16V7KOPT @
1 2
CV7 0.22U_0402_16V7KOPT@CV7 0.22U_0402_16V7KOPT @
1 2
CV8 0.22U_0402_16V7KOPT@CV8 0.22U_0402_16V7KOPT @
CLK_PCIE_VGA<26>
CLK_PCIE_VGA#<26>
PLTRST_VGA#<29>
61
QV2A
QV2A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
OPT@
OPT@
2
1 2
@
@
RV4 200_04 02_1%
RV4 200_04 02_1%
+3VS_DGPU
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_GTX_CRX_P0 PCIE_GTX_CRX_N0 PCIE_GTX_CRX_P1 PCIE_GTX_CRX_N1 PCIE_GTX_CRX_P2 PCIE_GTX_CRX_N2 PCIE_GTX_CRX_P3 PCIE_GTX_CRX_N3
CLK_PCIE_VGA CLK_PCIE_VGA# CLK_REQ_GPU#
PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
RV5
RV5
2.49K_0402_1%
2.49K_0402_1%
OPT@
OPT@
1 2
B
UV1A
UV1A
AG6
PEX_RX0
AG7
PEX_RX0_N
AF7
PEX_RX1
AE7
PEX_RX1_N
AE9
PEX_RX2
AF9
PEX_RX2_N
AG9
PEX_RX3
AG10
PEX_RX3_N
AF10
PEX_RX4
AE10
PEX_RX4_N
AE12
PEX_RX5
AF12
PEX_RX5_N
AG12
PEX_RX6
AG13
PEX_RX6_N
AF13
PEX_RX7
AE13
PEX_RX7_N
AE15
NC
AF15
NC
AG15
NC
AG16
NC
AF16
NC
AE16
NC
AE18
NC
AF18
NC
AG18
NC
AG19
NC
AF19
NC
AE19
NC
AE21
NC
AF21
NC
AG21
NC
AG22
NC
AC9
PEX_TX0
AB9
PEX_TX0_N
AB10
PEX_TX1
AC10
PEX_TX1_N
AD11
PEX_TX2
AC11
PEX_TX2_N
AC12
PEX_TX3
AB12
PEX_TX3_N
AB13
PEX_TX4
AC13
PEX_TX4_N
AD14
PEX_TX5
AC14
PEX_TX5_N
AC15
PEX_TX6
AB15
PEX_TX6_N
AB16
PEX_TX7
AC16
PEX_TX7_N
AD17
NC
AC17
NC
AC18
NC
AB18
NC
AB19
NC
AC19
NC
AD20
NC
AC20
NC
AC21
NC
AB21
NC
AD23
NC
AE23
NC
AF24
NC
AE24
NC
AG24
NC
AG25
NC
AE8
PEX_REFCLK
AD8
PEX_REFCLK_N
AC6
PEX_CLKREQ_N
AF22
PEX_TSTCLK_OUT
AE22
PEX_TSTCLK_OUT_N
AC7
PEX_RST_N
AF25
PEX_TERMP
N14P-GV2-S-A2_FCBGA595
N14P-GV2-S-A2_FCBGA595
N14PGV2@
N14PGV2@
1
CV17
CV17 18P_0402_50V8J
18P_0402_50V8J
NOGCLK@
NOGCLK@
2
Part 1 of 6
Part 1 of 6
PCI EXPRESS
PCI EXPRESS
YV1
YV1
1
1
DACsI2C GPIO
DACsI2C GPIO
120mA
52mA
71mA
41mA
CLK
CLK
NOGCLK@
NOGCLK@
27MHZ_16PF
27MHZ_16PF
GND
2
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC DACA_VSYNC
DACA_VDD DACA_VREF DACA_RSET
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CS_SCL
I2CS_SDA
CORE_PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_IN
XTAL_OUT
XTAL_SSIN
XTAL_OUTBUFF
3
3
GND
4
18P_0402_50V8J
18P_0402_50V8J
NC
XTAL_OUTXTALIN
NOGCLK@
NOGCLK@
C6 B2 D6 C7 F9 A3 A4 B6 A6 F8 C5 E7 D7 B4 B3 C3 D5 D4 C2 F7 E6 C4
AB6
AG3 AF4 AF3
AE3 AE4
W5 AE2 AF2
B7 A7
C9 C8
A9 B9
D9 D8
L6 M6
N6
C11 B10
A10 C10
CV18
CV18
FB_CLAMP_MON
FB_CLAMP_REQ#
OVERT#_VGA GPU_EVENT
DGPU_VID GPS_DOWN# PSI
VGA_CRT_CLK VGA_CRT_DATA
HDCP_SCL HDCP_SDA
VGA_EDID_CLK VGA_EDID_DATA
SMB_CLK_GPU SMB_DATA_GPU
+PLLVDD
+GPU_PLLVDD
XTALIN XTAL_OUT
XTAL_SSIN XTAL_OUTBUFF
1
2
C
+3VS_DGPU
G
G
2
QV8
QV8
13
D
D
S
S
2N7002KW_SOT323-3
2N7002KW_SOT323-3
DGPU_VID <53>
GPS_DOWN# <41 >
PSI <53>
1
2
CV42, CV43 under GPU close to ball : AE8,AD7
VGA_X1<35>
10_0402_5%
10_0402_5%
10P_0402_50V8J
10P_0402_50V8J
RB751V40_SC76-2
RB751V40_SC76-2
OPT@
OPT@
N14PGV2@
N14PGV2@
EC GPS_DOWN# must be OD\Low to avoid leakage
1
CV9
CV9
CV10
CV10
2
0.1U_0402_10V7K
0.1U_0402_10V7K
12
RV7
@EMI@RV7
@EMI@
1
CV113
@EMI@CV113
@EMI@
2
for EMI
DV1
DV1
12
CLK_REQ_GC6# <41>
BLM18PG181SN1D_2P
BLM18PG181SN1D_2P
1
CV11
CV11
2
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 2
RV8 0_0402_5%
RV8 0_0402_5%
GCLK@
GCLK@
LV1
LV1
1 2
1
CV12
CV12
2
22U_0805_6.3V6M
22U_0805_6.3V6M
FB_CLAMP <14,17,41>
For GC6
+1.05VS_DGPU
1
CV13
CV13
2
10U_0603_6.3V6M
10U_0603_6.3V6M
XTALIN
D
Internal Thermal Sensor
SMB_CLK_GPU
SMB_DATA_GPU
under GPU close to AD8
JTAG_TRST<15> TESTMODE<15>
OPT@
OPT@
QV1A
QV1A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+PLLVDD
1
2
GPS_DOWN# GPU_EVENT XTAL_OUTBUFF XTAL_SSIN
VGA_EDID_DATA VGA_EDID_CLK SMB_DATA_GPU SMB_CLK_GPU
VGA_CRT_CLK VGA_CRT_DATA HDCP_SCL HDCP_SDA
FB_CLAMP OVERT#_VGA FB_CLAMP_MON FB_CLAMP_REQ#
CLK_REQ_GC6#
CLK_REQ_GPU#
+3VS_DGPU
5
OPT@
OPT@
QV1B
QV1B
4
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
61
1
CV14
2
OPT@ CV14
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
E
RPV1
RPV1
1 8 2 7 3 6 4 5
10K_8P4R_5%
10K_8P4R_5%
OPT@
OPT@
RPV2
RPV2
1 8 2 7 3 6 4 5
2.2K_8P4R_5%
2.2K_8P4R_5%
OPT@
OPT@
RPV3
RPV3
1 8 2 7 3 6 4 5
2.2K_8P4R_5%
2.2K_8P4R_5%
OPT@
OPT@
RPV12
RPV12
1 8 2 7 3 6 4 5
10K_8P4R_5%
10K_8P4R_5%
OPT@
OPT@
RPV13
RPV13
1 8 2 7 3 6 4 5
10K_8P4R_5%
10K_8P4R_5%
OPT@
OPT@
3
LV2
1 2
FBMA-L11-160808300LMA25T_2P
FBMA-L11-160808300LMA25T_2P
CV15
OPT@ CV15
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
EC_SMB_CK2 <26,34,41>
EC_SMB_DA2 <26,34,41>
+1.05VS_DGPU
OPT@LV2
OPT@
+3VS_DGPU
1
2
+3VS
CV16
OPT@ CV16
OPT@
10U_0603_6.3V6M
10U_0603_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
VGA_N14x PEG & DAC
VGA_N14x PEG & DAC
VGA_N14x PEG & DAC
13 56Thursday, January 17, 2013
13 56Thursday, January 17, 2013
E
13 56Thursday, January 17, 2013
0.3
0.3
0.3
of
of
of
Page 14
CyberForum.ru
A
VRAM Interface
+FB_PLLAVDD
CV20
22U_0805_6.3V6M
22U_0805_6.3V6M
1
OPT@CV20
OPT@
2
MDA[15..0]
MDA[31..16]
MDA[47..32]
MDA[63..48]
Close to H22
CV21
0.1U_0402_10V7K
0.1U_0402_10V7K
2
OPT@CV21
OPT@
1
CV22
1
OPT@CV22
OPT@
2
Close to P22
CV114
0.1U_0402_10V7K
0.1U_0402_10V7K
OPT@CV114
OPT@
UV1B
UV1B
Part 2 of 6
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
FB_CLAMP<13,17,41>
MDA59 MDA60 MDA61 MDA62 MDA63
+FB_PLLAVDD
TV1 PAD
TV1 PAD TV2 PAD
TV2 PAD
E18 F18 E16 F17 D20 D21 F20 E21 E15 D15 F15 F13 C13 B13 E13 D13 B15 C16 A13 A15 B18 A18 A19 C19 B24 C23 A25 A24 A21 B21 C20 C21 R22 R24 T22 R23 N25 N26 N23 N24 V23 V22 T23 U22 Y24
AA24
Y22 AA23 AD27 AB25 AD26 AC25 AA27 AA26
W26
Y25
R26
T25
N27
R27
V26
V27
W27 W25
F16
P22
D23
H22
@
@
F22
J22
@
@
FBA_D00 FBA_D01 FBA_D02 FBA_D03 FBA_D04 FBA_D05 FBA_D06 FBA_D07 FBA_D08 FBA_D09 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FB_PLLAVDD_1 FB_PLLAVDD_2
FB_VREF_PROBE
FB_DLLAVDD
F3
FB_CLAMP
FBA_DEBUG0 FBA_DEBUG1
N14P-GV2-S-A2_FCBGA595
N14P-GV2-S-A2_FCBGA595
N14PGV2@
N14PGV2@
Part 2 of 6
MEMORY
MEMORY
62mA 62mA
35mA
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_RN0 FBA_DQS_RN1
INTERFACE A
INTERFACE A
FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26
D19 D14 C17 C22 P24 W24 AA25 U25
F19 C14 A16 A22 P25 W22 AB27 T27
E19 C15 B16 B22 R25 W23 AB26 T26
D24 D25
N22 M22
D18 C18 D17 D16 T24 U24 V24 V25
CMDA0 CMDA1 CMDA2 CMDA3 CMDA4 CMDA5 CMDA6 CMDA7 CMDA8 CMDA9 CMDA10 CMDA11 CMDA12 CMDA13 CMDA14 CMDA15 CMDA16 CMDA17 CMDA18 CMDA19 CMDA20 CMDA21 CMDA22 CMDA23 CMDA24 CMDA25 CMDA26 CMDA27 CMDA28 CMDA29 CMDA30
DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7
CMDA[30..0] <18,19,20,21>
CLKA0 <18,20> CLKA0# <18,20>
CLKA1 <19,21> CLKA1# <19,21>
DQMA[3..0] <18,20>
DQMA[7..4] <19,21>
DQSA#[3..0] <18,20>
DQSA#[7..4] <19,21>
DQSA[3..0] <18,20>
DQSA[7..4] <19,21>
MDA[15..0]<18,20>
MDA[31..16]<18,20>
MDA[47..32]<19,21>
MDA[63..48]<19,21>
1 1
30ohms (ESR=0.01)
+1.05VS_DGPU
LV3
OPT@LV3
OPT@
1 2
FBMA-L11-160808300LMA25T_2P
FBMA-L11-160808300LMA25T_2P
Place close to B GA
Near GPU Close to F16
Place close to t he first T poin t
+VRAM_1.5VS
109876
12345
+VRAM_1.5VS
109876
12345
+VRAM_1.5VS
DDR3
CMDA16 CMDA19 CMDA3 CMDA0 CMDA20
RV10 100_0402_5%
RV10 100_0402_5%
RV12 100_0402_5%
RV12 100_0402_5%
CMDA12 CMDA14 CMDA15 CMDA7
RPV4
RPV4 100_1206_10P8R_5%
100_1206_10P8R_5%
OPT@
OPT@
CMDA11 CMDA4 CMDA5 CMDA6
CMDA22 CMDA9 CMDA21 CMDA24
RPV6
RPV6 100_1206_10P8R_5%
100_1206_10P8R_5%
OPT@
OPT@
CMDA23 CMDA13 CMDA8 CMDA10
RPV8
RPV8
18
CMDA26
27
CMDA25
36
CMDA27
45
CMDA28
100_0804_8P4R_5%
100_0804_8P4R_5%
OPT@
OPT@
12
OPT@
OPT@
12
OPT@
OPT@
Command Bit Default Pull-down
ODTx
CKEx
RST
CS* No Termination
1 2
RV36 10K_0402_5%OPT@RV36 10K_0 402_5%OPT@
1 2
RV37 10K_0402_5%OPT@RV37 10K_0 402_5%OPT@
1 2
RV38 10K_0402_5%OPT@RV38 10K_0 402_5%OPT@
1 2
RV40 10K_0402_5%OPT@RV40 10K_0 402_5%OPT@
1 2
RV15 10K_0402_5%OPT@RV15 10K_0 402_5%OPT@
CMDA29
CMDA30
10k
10k
10k
109876
12345
109876
12345
1 8
CMDA28
2 7
CMDA27
3 6
CMDA25
4 5
CMDA26
RV11 100_0402_5%
RV11 100_0402_5%
RV13 100_0402_5%
RV13 100_0402_5%
RPV5
RPV5 100_1206_10P8R_5%
100_1206_10P8R_5%
OPT@
OPT@
RPV7
RPV7 100_1206_10P8R_5%
100_1206_10P8R_5%
OPT@
OPT@
RPV9
RPV9
100_0804_8P4R_5%
100_0804_8P4R_5%
OPT@
OPT@
12
OPT@
OPT@
12
OPT@
OPT@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
N14x VRAM Interface
N14x VRAM Interface
N14x VRAM Interface
14 56Thursday, January 17, 2013
14 56Thursday, January 17, 2013
14 56Thursday, January 17, 2013
of
of
of
0.3
0.3
0.3
Page 15
CyberForum.ru
5
UV1C
UV1C
AC3
IFPA_TXC
AC4
IFPA_TXC_N
Y4
IFPA_TXD0
Y3
IFPA_TXD0_N
AA3
IFPA_TXD1
AA2
IFPA_TXD1_N
AB1
IFPA_TXD2
AA1
IFPA_TXD2_N
AA4
D D
C C
B B
A A
IFPA_TXD3
AA5
IFPA_TXD3_N
AB5
IFPB_TXC
AB4
IFPB_TXC_N
AB3
IFPB_TXD4
AB2
IFPB_TXD4_N
AD3
IFPB_TXD5
AD2
IFPB_TXD5_N
AE1
IFPB_TXD6
AD1
IFPB_TXD6_N
AD4
IFPB_TXD7
AD5
IFPB_TXD7_N
T2
IFPC_L0
T3
IFPC_L0_N
T1
IFPC_L1
R1
IFPC_L1_N
R2
IFPC_L2
R3
IFPC_L2_N
N2
IFPC_L3
N3
IFPC_L3_N
V3
IFPD_L0
V4
IFPD_L0_N
U3
IFPD_L1
U4
IFPD_L1_N
T4
IFPD_L2
T5
IFPD_L2_N
R4
IFPD_L3
R5
IFPD_L3_N
N1
NC
M1
NC
M2
NC
M3
NC
K2
NC
K3
NC
K1
NC
J1
NC
M4
NC
M5
NC
L3
NC
L4
NC
K4
NC
K5
NC
J4
NC
J5
NC
N4
IFPC_AUX_I2CW_SCL
N5
IFPC_AUX_I2CW_SDA_N
P3
IFPD_AUX_I2CX_SCL
P4
IFPD_AUX_I2CX_SDA_N
J2
IFPE_AUX_I2CY_SCL
J3
IFPE_AUX_I2CY_SDA_N
H3
IFPF_AUX_I2CZ_SCL
H4
IFPF_AUX_I2CZ_SDA_N
N14P-GV2-S-A2_FCBGA595
N14P-GV2-S-A2_FCBGA595
N14PGV2@
N14PGV2@
Part 3 of 6
Part 3 of 6
NC
NC
GENERAL
GENERAL
MULTI_STRAP_REF0_GND
LVDS/TMDS
LVDS/TMDS
VDD_SENSE
GND_SENSE
TEST
TEST
JTAG_TRST_N
SERIAL
SERIAL
BUFRST_N
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
THERMDP
THERMDN
TESTMODE
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
F11
NC
AD10
NC
AD7
NC
B19
NC
V5
NC
V6
NC
G1
NC
G2
NC
G3
NC
G4
NC
G5
NC
G6
NC
G7
NC
V1
NC
V2
NC
W1
NC
W2
NC
W3
NC
W4
NC
D11
D10
NC
E9
NC
E10
NC
F10
NC
D1 D2 E4 E3 D3 C1
NC
F6 F4
NC
F5
NC
F12
E12
F2
F1
AD9 AE5 AE6 AF6 AD6 AG4
D12 B12 A12 C12
4
OPT@
OPT@
1 2
RV16 10K_0402_5%
RV16 10K_0402_5%
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
MULTI_STRAP_REF0_GND
VGA_VCC_SENSE
trace width: 16mils differential voltage sensing.
VGA_VSS_SENSE
JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS
ROM_SI ROM_SO ROM_SCLK
differential signal routing.
PAD
PAD PAD
PAD PAD @
PAD @ PAD
PAD
N14PGV2@
N14PGV2@
1 2
RV17 40.2K_0402_1%
RV17 40.2K_0402_1%
+VGA_CORE
RV26
RV26 100_0402_1%
100_0402_1%
OPT@
OPT@
1 2
OPT@
OPT@
12
RV35
RV35
100_0402_1%
100_0402_1%
TESTMODE <13>
@
@
TV3
TV3
@
@
TV4
TV4 TV5
TV5 TV6
@TV6
@
JTAG_TRST <13>
VGA_VCC_SENSE < 53>
VGA_VSS_SENSE <53>
N14P-GV2
3
Physical Strapping pin
ROM_SO
ROM_SCLK
ROM_SI
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
Power Rail
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU 3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]
+3VS_DGPU
+3VS_DGPU SOR0_EXPOSEDSOR2_EXPOSED SOR1_EXPOSED
+3VS_DGPU DP_PLL_VDD33V
Logical Strapping Bit3
FB[1]
PCI_DEVID[4]
USER[3]
3GIO_PADCFG[3]
PCI_DEVID[3]
SOR3_EXPOSED
RESERVED
SKU Device ID biit5 to b it0
N14P-GV2
N14M-GL
MULTI LEVEL STRAPS
12
12
@
@
N14PGV2@
N14PGV2@
RV18
RV18
45.3K_0402_1%
STRAP0 STRAP1 STRAP3 STRAP2
45.3K_0402_1%
12
12
@
@
N14PGV2@
N14PGV2@
RV27
RV27
4.99K_0402_1%
4.99K_0402_1%
0x1140 000000
+3VS_DGPU
12
@
@
10K_0402_1%
10K_0402_1%
10K_0402_1%
RV19
RV19
RV28
RV28
10K_0402_1%
RV20
RV20
12
N14PGV2@
N14PGV2@
RV29
RV29
45.3K_0402_1%
45.3K_0402_1%
15K_0402_1%
15K_0402_1%
N14PGV2@
N14PGV2@
FB Memory gDDR3
900MHz
1 2 8 M
x 1 6
2 5 6 M
x 1 6
Samsung
Hynix
Micron
Micron
1GHz
900MHz
1GHz
900MHz
900MHz
900MHz
K4W2G1646E-BC11
K4W2G1646E-BC1A
H5TQ2G63DFR-11C
H5TQ2G63DFR-N0C
MT41K128M16JT-107G
K4W4G1646B-HC11Samsung
MT41K256M16HA-107G
010010TBD
12
12
@
@
@
@
RV21
RV21
RV22
RV22
4.99K_0402_1%
4.99K_0402_1%
12
12
N14PGV2@
N14PGV2@
RV31
RV31
RV30
RV30
4.99K_0402_1%
4.99K_0402_1%
ROM_SIGPU
PD 45K
PD 34.8K
PD 30K
PD 20K
PD 10K
10K_0402_1%
10K_0402_1%
STRAP4
45.3K_0402_1%
45.3K_0402_1%
2
PCIE_SPEED_CHANGE_GEN3
RV31
RV31
10K_0402_1%
10K_0402_1%
N14MGL@
N14MGL@
N14M-GL
Logical Strapping Bit2
FB[0]
SUB_VENDOR
Resistor Values
For X76 (N14P-GV2)For X76 (N14M-GL)
Samsung
1 2 8 M
Hynix
x 1 6
Micron
Samsung K4W4G1646B-HC11
2 5 6 M
Hynix
x 1 6
Micron
Logical Strapping Bit1
SMB_ALT_ADDR
PCI_DEVID[5]
RAMCFG[1]RAMCFG[3] RAMCFG[2]
PCIE_MAX_SPEED
5K
10K
15K
20K
25K
30K
35K
45K
ROM_SI ROM_SO ROM_SCLK
FB Memory gDDR3
1GHz
1GHz
900MHz
900MHz
900MHz
900MHz
1
Logical Strapping Bit0
VGA_DEVICE
PEX_PLLEN_TERM
RAMCFG[0]
USER[0]USER[1]USER[2]
PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]
Pull-up to +3VS _DGPU
1000
1001
1010
1011
1100
1101
1110
1111
12
12
@
@
RV23
RV23
4.99K_0402_1%
4.99K_0402_1%
N14PGV2@
N14PGV2@
12
12
N14MGL@
N14MGL@
N14MGL@
N14MGL@
RV32
RV32
10K_0402_1%
10K_0402_1%
K4W2G1646E-BC11900MHz
K4W2G1646E-BC1A
H5TQ2G63DFR-11C900MHz
H5TQ2G63DFR-N0C
MT41K128M16JT-107G
H5TC4G63AFR-11C
MT41K256M16HA-107G
Pull-down to Gnd
0000
0001
0010
0011
0100
0101
0110
0111
+3VS_DGPU
12
N14PGV2@
N14PGV2@
RV24
RV24
RV25
RV25
4.99K_0402_1%
4.99K_0402_1%
12
N14MGL@
N14MGL@
RV33
RV33
RV34
RV34
10K_0402_1%
10K_0402_1%
STRAP[3:0]GPU
4.99K_0402_1%
4.99K_0402_1%
10K_0402_1%
10K_0402_1%
0101
0110
0001
1011
0100
1101
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
VGA_N14x LVDS&TMDS
VGA_N14x LVDS&TMDS
VGA_N14x LVDS&TMDS
15 56Thursday, January 17, 2013
15 56Thursday, January 17, 2013
1
15 56Thursday, January 17, 2013
0.3
0.3
0.3
of
of
of
Page 16
CyberForum.ru
5
4
3
2
1
Under GPU
+VRAM_1.5VS
D D
Under GPU
1
1
1
1
CV32
CV24
2
2
2
OPT@ CV32
OPT@
OPT@ CV24
OPT@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV33
2
OPT@ CV33
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CV34
CV25
CV35
2
2
OPT@ CV34
OPT@
OPT@ CV25
OPT@
OPT@ CV35
1U_0402_6.3V6K
1U_0402_6.3V6K
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
Near GPU
1
1
CV44
CV43
2
2
OPT@ CV44
OPT@
OPT@ CV43
OPT@
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
C C
B B
UV1D
UV1D
B26 C25 E23 E26 F14 F21 G13 G14 G15 G16 G18 G19 G20 G21 H24 H26
J21 K21
L22
L24
L26
M21
N21 R21 T21 V21
W21
V7
W7 AA6
W6
Y6
M7 N7
T6 P6
T7 R7 U6 R6
J7
K7
K6 H6
J6
N14P-GV2-S-A2_FCBGA595
N14P-GV2-S-A2_FCBGA595
N14PGV2@
N14PGV2@
Part 4 of 6
Part 4 of 6
3500 mA 2000 mA
FBVDDQ_01 FBVDDQ_02 FBVDDQ_03 FBVDDQ_04 FBVDDQ_05 FBVDDQ_06 FBVDDQ_07 FBVDDQ_08 FBVDDQ_09 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27
IFPAB_PLLVDD_1 IFPAB_PLLVDD_2 IFPAB_RSET IFPA_IOVDD IFPB_IOVDD
IFPC_PLLVDD_1 IFPC_PLLVDD_2 IFPC_RSET IFPC_IOVDD
IFPD_PLLVDD_2 IFPD_PLLVDD_1 IFPD_RSET IFPD_IOVDD
NC NC NC NC NC
PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8
PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14
PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6
VDD33_1 VDD33_2 VDD33_3 VDD33_4
POWER
POWER
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
PEX_PLL_HVDD_1 PEX_PLL_HVDD_2
PEX_SVDD_3V3
120mA
PEX_PLLVDD_1
PEX_PLLVDD_2
AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27
AA22 AB23 AC24 AD25 AE26 AE27
G10 G12 G8 G9
D22
C24
B25
AA8 AA9
AB8
AA14 AA15
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
Under GPU
1
2
Near Ball
1 2
Near GPU
1
CV54
2
OPT@ CV54
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV55
OPT@ CV55
OPT@
1
2
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Near GPU
1
CV26
CV23
2
OPT@ CV26
OPT@
OPT@ CV23
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CV37
CV36
2
OPT@ CV37
OPT@
OPT@ CV36
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+VRAM_1.5VS
RV3940.2_0402_1 %
RV3940.2_0402_1 %
12
RV4142.2_0402_1 %
RV4142.2_0402_1 %
12
RV4251.1_0402_1 %
RV4251.1_0402_1 %
1
CV56
2
OPT@ CV56
OPT@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
midway between G PU and Power supply
1
1
CV28
CV27
2
2
OPT@ CV28
OPT@
OPT@ CV27
OPT@
10U_0603_6.3V6M
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
CV38
CV39
2
2
OPT@ CV39
OPT@
OPT@ CV38
OPT@
10U_0603_6.3V6M
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
Under GPU
1
1
CV46
CV45
2
2
OPT@ CV46
OPT@
OPT@ CV45
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
+1.05VS_DGPU
LV4
LV4
N14MGL@
N14MGL@
RV1
RV1
0_0603_5%
0_0603_5%
N14PGV2@
N14PGV2@
12
12
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
1
CV29
2
OPT@ CV29
OPT@
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV40
2
OPT@ CV40
OPT@
10U_0603_6.3V6M
10U_0603_6.3V6M
Near GPU
1
CV47
2
OPT@ CV47
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
+1.05VS_DGPU
1
1
CV30
2
2
OPT@ CV30
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
+1.05VS_DGPU
1
1
CV41
2
2
OPT@ CV41
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
CV48
2
2
OPT@ CV48
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
Under GPU Close to AH12/AG 12
CV31
OPT@ CV31
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
CV42
OPT@ CV42
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
+3VS_DGPU
CV49
OPT@ CV49
OPT@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
2
Near GPU
1
CV50
CV51
2
OPT@ CV50
OPT@
OPT@ CV51
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
+3VS_DGPU
1
1
CV52
CV53
2
2
OPT@ CV52
OPT@
OPT@ CV53
OPT@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
VGA_N14x POWER
VGA_N14x POWER
VGA_N14x POWER
1
0.3
0.3
16 56Thursday, January 17, 2013
16 56Thursday, January 17, 2013
16 56Thursday, January 17, 2013
0.3
of
of
of
Page 17
CyberForum.ru
5
4
3
2
1
+1.05VS_VCCP to +1.05VS_DGPU
+5VALW
12
RV43
RV43 270K_0402_5%
270K_0402_5%
OPT@
OPT@
61
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
0.01U_0402_25V7K
0.01U_0402_25V7K
VGA_PWROK
OPT@
OPT@
QV4A
QV4A
2
VGA_PWROK#
QV5A
QV5A
2
G
G
OPT@
OPT@
AO3416_SOT23-3
AO3416_SOT23-3
+1.05VS_DGPU
+1.05VS_VCCP
Vgs=4.5V,Id=6.5A ,Rds<22mohm
QV3
OPT@
QV3
OPT@
13
D
D
2
G
G
S
S
CV57
CV57
OPT@
OPT@
1
2
+1.5V to +VRAM_1.5VS
CV59
CV59
OPT@
OPT@
+1.5V
QV6
OPT@QV6
OPT@
8
D
7
D
6
D
5
D
FDS6676AS_SO8
FDS6676AS_SO8
1
CV60
CV60
OPT@
OPT@
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+VRAM_1.5VS
Vgs=10V,Id=14.5A ,Rds=6mohm
1
S
2
S
3
S
4
G
VRAM_1.5VS_GATE
1
12
RV48
RV48 820K_0402_5%OPT@
0.01U_0402_25V7K
0.01U_0402_25V7K
820K_0402_5%OPT@
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2
1.5V_PWR_EN
OPT@
OPT@
RV47
RV47
1 2
180K_0402_5%
180K_0402_5%
61
QV7A
QV7A
2
OPT@
OPT@
QV5B
QV5B
5
G
G
OPT@
OPT@
B+
1.5V_PWR_EN#
34
D
D
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
S
S
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1 2
OPT@
OPT@
61
D
D
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
S
S
RV46
RV46 470_0805_5%
470_0805_5%
OPT@
OPT@
1 2
3
QV7B
QV7B
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
OPT@
OPT@
4
1 2
RV49100K_0402_5%
RV49100K_0402_5%
OPT@
OPT@
+1.05VS_DGPU
RV44
RV44
22_0805_5%OPT@
22_0805_5%OPT@
1 2
3
OPT@
OPT@
QV4B
QV4B
5
4
RV45100K_0402_5%
RV45100K_0402_5%
+5VALW
+5VALW
+3VS
5
3
+VGA_CORE+VGA_CORE
V18 V16 V14 V12 V10 U17 U15 U13 U11 T18 T16 T14 T12 T10 R17 R15 R13 R11 P18 P16 P14
UV2
UV2
4
Vcc
G
1.5V_PWR_EN
Y
NC7SZ32P5X_SC70-5N14PGV2@
NC7SZ32P5X_SC70-5N14PGV2@
UV1E
UV1E
A2
A26 AB11 AB14 AB17 AB20
D D
C C
B B
AB24
AC2 AC22 AC26
AC5
AC8 AD12 AD13 AD15 AD16 AD18 AD19 AD21 AD22 AE11 AE14 AE17 AE20
AF1 AF11 AF14 AF17 AF20 AF23
AF5
AF8
AG2 AG26
B1 B11 B14 B17 B20 B23 B27
B5
B8 E11 E14 E17
E2 E20 E22 E25
E5
E8
H2 H23 H25
H5
N14P-GV2-S-A2_FCBGA595
N14P-GV2-S-A2_FCBGA595
N14PGV2@
N14PGV2@
GND_001 GND_002 GND_003 GND_004 GND_005 GND_006 GND_007 GND_008 GND_009 GND_010 GND_011 GND_012 GND_013 GND_014 GND_015 GND_016 GND_017 GND_018 GND_019 GND_020 GND_021 GND_022 GND_023 GND_024 GND_025 GND_026 GND_027 GND_028 GND_029 GND_030 GND_031 GND_032 GND_033 GND_034 GND_035 GND_036 GND_037 GND_038 GND_039 GND_040 GND_041 GND_042 GND_043 GND_044 GND_045 GND_046 GND_047 GND_048 GND_049 GND_050 GND_051 GND_052 GND_053 GND_054 GND_055 GND_056
Part 5 of 6
Part 5 of 6
GND
GND
GND_057 GND_058 GND_059 GND_060 GND_061 GND_062 GND_063 GND_064 GND_065 GND_066 GND_067 GND_068 GND_069 GND_070 GND_071 GND_072 GND_073 GND_074 GND_075 GND_076 GND_077 GND_078 GND_079 GND_080 GND_081 GND_082 GND_083 GND_084 GND_085 GND_086 GND_087 GND_088 GND_089 GND_090 GND_091 GND_092 GND_093 GND_094 GND_095 GND_096 GND_097 GND_098 GND_099 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112
GND GND
K11 K13 K15 K17 L10 L12 L14 L16 L18 L2 L23 L25 L5 M11 M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5
AA7 AB7
For GC6
VGA_PWROK<30,53>
K10
VDD_001
K12
VDD_002
K14
VDD_003
K16
VDD_004
K18
VDD_005
L11
VDD_006
L13
VDD_007
L15
VDD_008
L17
VDD_009
M10
VDD_010
M12
VDD_011
M14
VDD_012
M16
VDD_013
M18
VDD_014
N11
VDD_015
N13
VDD_016
N15
VDD_017
N17
VDD_018
P10
VDD_019
P12
VDD_020
N14P-GV2-S-A2_FCBGA595
N14P-GV2-S-A2_FCBGA595
N14PGV2@
N14PGV2@
FB_CLAMP<13,14,41>
UV1F
UV1F
Part 6 of 6
Part 6 of 6
POWER
POWER
0.1U_0402_10V7K
0.1U_0402_10V7K
VDD_041 VDD_040 VDD_039 VDD_038 VDD_037 VDD_036 VDD_035 VDD_034 VDD_033 VDD_032 VDD_031 VDD_030 VDD_029 VDD_028 VDD_027 VDD_026 VDD_025 VDD_024 VDD_023 VDD_022 VDD_021
@
@
1
CV58
CV58
2
2
B
1
A
1 2
RV50 0_0402_5%
RV50 0_0402_5%
N14MGL@
N14MGL@
+3VS to +3VS_DGPU
+VGA_CORE
RV51
RV51
470_0805_5%
470_0805_5%
OPT@
OPT@
1 2 3
QV9B
QV9B
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
A A
5
4
OPT@
OPT@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
DGPU_PWR_EN#
4
3
RV52
RV52
470_0805_5%
470_0805_5%
OPT@
OPT@
1 2 3
QV2B
QV2B
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
OPT@
OPT@
4
Compal Secret Data
Compal Secret Data
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
DGPU_PWR_EN<29>
2
DGPU_PWR_EN#
+3VS+3VS_DGPU
RV53
RV53 10K_0402_5%OPT@
10K_0402_5%OPT@
1 2
RV54
RV54
1 2
33K_0402_5%
33K_0402_5%
61
OPT@
QV9A
QV9A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
OPT@
2
OPT@
OPT@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
CV61
CV61
0.1U_0402_10V7K
0.1U_0402_10V7K
OPT@
OPT@
1
AO3413_SOT23
AO3413_SOT23
2
CV62
CV62
OPT@
OPT@
0.01U_0402_25V7K
0.01U_0402_25V7K
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
VGA_N14x POWER & GND
VGA_N14x POWER & GND
VGA_N14x POWER & GND
+3VS
Vgs=-4.5V,Id=3A, Rds<97mohm
S
S
QV11
QV11
G
G
2
OPT@
OPT@
D
D
1 3
+3VS_DGPU
17 56Thursday, January 17, 2013
17 56Thursday, January 17, 2013
1
17 56Thursday, January 17, 2013
0.3
0.3
0.3
of
of
of
Page 18
CyberForum.ru
5
4
RANK 0 [31...0]
VRAM DDR3 Chips
+VRAM_1.5VS
12
12
+VRAM_1.5VS
12
12
DQSA[3..0]
DQSA#[3..0]
DQMA[3..0]
MDA[31..0]
CMDA[30..0]
+MEM_VREF_CA0
1
CV63
CV63
0.01U_0402_25V7K
0.01U_0402_25V7K
OPT@
OPT@
2
+MEM_VREF_DQ0
1
CV64
CV64
0.01U_0402_25V7K
0.01U_0402_25V7K
OPT@
OPT@
2
+MEM_VREF_CA0
+MEM_VREF_DQ0
UV3
@
UV3
@
+MEM_VREF_CA0 +MEM_VREF_DQ0
OPT@
OPT@
RV60
RV60
243_0402_1%
243_0402_1%
M8
VREFCA
H1
VREFDQ
N3
CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14
CMDA29 CMDA13 CMDA27
CLKA0 CLKA0 CLKA0# CMDA3
CMDA0 CMDA2 CMDA11 CMDA15 CMDA28
DQSA1 DQSA2
DQMA1 DQMA2
DQSA#1 DQSA#2
CMDA20
12
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
A13
T7
A14
M7
A15/BA3
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE/CKE0
K1
ODT/ODT0
L2
CS/CS0
J3
RAS
K3
CAS
L3
WE
310mA
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
NC/ODT1
L1
NC/CS1
J9
NC/CE1
L9
NCZQ1
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
MDA9 MDA12 MDA8 MDA15 MDA13 MDA11 MDA10 MDA14
MDA18 MDA22 MDA16 MDA23 MDA17 MDA20 MDA19 MDA21
+VRAM_1.5VS
+VRAM_1.5VS
DQSA[3..0]<14,20>
D D
DQSA#[3..0]<14,20>
DQMA[3..0]<14,20>
MDA[31..0]<14,20>
CMDA[30..0]
RV55
RV55
1K_0402_1%
1K_0402_1%
OPT@
OPT@
RV56
RV56
1K_0402_1%
1K_0402_1%
OPT@
OPT@
C C
RV57
RV57
1K_0402_1%
1K_0402_1%
OPT@
OPT@
RV58
RV58
1K_0402_1%
1K_0402_1%
OPT@
OPT@
B B
Group1
Group2
3
OPT@
OPT@
RV61
RV61
243_0402_1%
243_0402_1%
+MEM_VREF_CA0 +MEM_VREF_DQ0
CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14
CMDA29 CMDA13 CMDA27
CLKA0# CMDA3
CMDA0 CMDA2 CMDA11 CMDA15 CMDA28
DQSA0 DQSA3
DQMA0 DQMA3
DQSA#0 DQSA#3
CMDA20
ZQ1ZQ0
12
UV4
@
UV4
M8
H1
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
M7
M2
N8
M3
J7 K7 K9
K1 L2 J3 K3 L3
F3 C7
E7 D3
G3
B7
T2
L8
J1 L1 J9 L9
@
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
310mA
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
MDA6 MDA1 MDA5 MDA0 MDA4 MDA2 MDA7 MDA3
MDA30 MDA26 MDA29 MDA24 MDA28 MDA27 MDA31 MDA25
+VRAM_1.5VS
+VRAM_1.5VS
2
Mode E Address
CMD0
Rank 0 Rank 1
0..31
ODT
CMD1
Group0
Group3
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A7
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
CMD30
1
32..63
0..31 32..63
ODT
CS1#
CKE
A11
A6
A3
A0
A8
A12 A0
A1
A7 A7
BA1 BA1
A12 A12
A8 A8
A0
A2 A2
RAS# RAS# RAS#
A13
A14
A3
A14
CAS#
A13 A13
CAS# CAS#
ODT
CS0#
CKE
RST RST RST
A6
A4
A11
A2
A10
A5
A5 A5
A9 A9
A1 A1
WE# WE#
A4 A4
BA2
WE#
BA0
A10 A10
BA0 BA0
BA2
A11A9
A14
A3BA1
ODT
CS1#
CKE
A6
BA2
Place close to t he first T poin t
CLKA0<14,20>
CLKA0#<14,20>
12
OPT@
OPT@
RV63
RV63 160_0402_1%
160_0402_1%
Place close to R ANK0 VRAM
+VRAM_1.5VS +VRAM_1.5VS
1
1
CV67
2
2
OPT@ CV67
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
A A
5
4
1
1
CV68
CV69
2
2
OPT@ CV68
OPT@
OPT@ CV69
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CV70
CV71
2
2
OPT@ CV70
OPT@
OPT@ CV71
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CV72
CV73
2
2
OPT@ CV72
OPT@
OPT@ CV73
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
CV74
OPT@ CV74
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
CV76
CV75
2
2
OPT@ CV76
OPT@
OPT@ CV75
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
1
1
CV77
2
2
OPT@ CV77
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
1
1
CV79
CV78
2
2
OPT@ CV79
OPT@
OPT@ CV78
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
1
CV80
CV81
2
2
OPT@ CV80
OPT@
OPT@ CV81
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
1
CV82
2
OPT@ CV82
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
CV84
CV83
OPT@ CV83
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
CV85
2
2
2
OPT@ CV84
OPT@
OPT@ CV85
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
+VRAM_1.5VS
1
CV86
OPT@ CV86
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
CV87
2
OPT@ CV87
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
VGA_N14x VRAM RANK 0L
VGA_N14x VRAM RANK 0L
VGA_N14x VRAM RANK 0L
18 56Thursday, January 17, 2013
18 56Thursday, January 17, 2013
18 56Thursday, January 17, 2013
of
of
1
of
0.3
0.3
0.3
Page 19
CyberForum.ru
5
4
RANK 0 [63...32]
VRAM DDR3 Chips
12
+MEM_VREF_CA1
12
12
+MEM_VREF_DQ1
12
DQSA[7..4]
DQSA#[7..4]
DQMA[7..4]
MDA[63..32]
CMDA[30..0]
1
CV65
CV65
0.01U_0402_25V7K
0.01U_0402_25V7K
OPT@
OPT@
2
1
CV66
CV66
0.01U_0402_25V7K
0.01U_0402_25V7K
OPT@
OPT@
2
+MEM_VREF_CA1
+MEM_VREF_DQ1
+MEM_VREF_DQ1
CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14
CMDA29 CMDA13 CMDA27
CLKA1 CLKA1# CMDA19
CMDA16 CMDA18 CMDA11 CMDA15 CMDA28
DQSA4 DQSA7
DQMA4 DQMA7
DQSA#4 DQSA#7
CMDA20
OPT@
OPT@
RV71
RV71
243_0402_1%
243_0402_1%
ZQ2
12
UV5
@
UV5
@
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
A13
T7
A14
M7
A15/BA3
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE/CKE0
K1
ODT/ODT0
L2
CS/CS0
J3
RAS
K3
CAS
L3
WE
310mA 310mA
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
NC/ODT1
L1
NC/CS1
J9
NC/CE1
L9
NCZQ1
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
MDA35 MDA37 MDA32 MDA36 MDA33 MDA38 MDA34 MDA39
MDA58 MDA62 MDA56 MDA63 MDA57 MDA61 MDA59 MDA60
+VRAM_1.5VS
+VRAM_1.5VS
DQSA[7..4]<14,21>
D D
C C
B B
DQSA#[7..4]<14,21>
DQMA[7..4]<14,21>
MDA[63..32]<14,21>
CMDA[30..0]<14,18,20,21>
RV59
RV59
1K_0402_1%
1K_0402_1%
OPT@
OPT@
RV62
RV62
1K_0402_1%
1K_0402_1%
OPT@
OPT@
RV64
RV64
1K_0402_1%
1K_0402_1%
OPT@
OPT@
RV65
RV65
1K_0402_1%
1K_0402_1%
OPT@
OPT@
+VRAM_1.5VS
+VRAM_1.5VS
Group4
3
+MEM_VREF_CA1 +MEM_VREF_DQ1
CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14
CMDA29 CMDA13 CMDA27
CLKA1 CLKA1# CMDA19
CMDA16 CMDA18 CMDA11 CMDA15 CMDA28
DQSA5 DQSA6
DQMA5 DQMA6
DQSA#5 DQSA#6
CMDA20
OPT@
OPT@
RV72
RV72
243_0402_1%
243_0402_1%
ZQ3
12
UV6
@
UV6
@
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
A13
T7
A14
M7
A15/BA3
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE/CKE0
K1
ODT/ODT0
L2
CS/CS0
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
NC/ODT1
L1
NC/CS1
J9
NC/CE1
L9
NCZQ1
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
MDA45+MEM_VREF_CA1 MDA41 MDA46 MDA40 MDA44 MDA43 MDA47 MDA42
MDA54 MDA50 MDA55 MDA48 MDA53 MDA51 MDA52 MDA49
+VRAM_1.5VS
+VRAM_1.5VS
2
Mode E Address
CMD0
Rank 0 Rank 1
0..31
ODT
CMD1
Group5
Group6Group7
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A7
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
CMD30
1
32..63
0..31 32..63
ODT
CS1#
CKE
A11
A6
A3
A0
A8
A12 A0
A1
A7 A7
BA1 BA1
A12 A12
A8 A8
A0
A2 A2
RAS# RAS# RAS#
A13
A14
A3
A14
CAS#
A13 A13
CAS# CAS#
ODT
CS0#
CKE
RST RST RST
A6
A4
A11
A2
A10
A5
A5 A5
A9 A9
A1 A1
WE# WE#
A4 A4
BA2
WE#
BA0
A10 A10
BA0 BA0
BA2
A11A9
A14
A3BA1
ODT
CS1#
CKE
A6
BA2
Place close to t he first T poin t
CLKA1<14,21>
CLKA1#<14,21>
12
OPT@
OPT@
RV74
RV74 160_0402_1%
160_0402_1%
Place close to R ANK1 VRAM
+VRAM_1.5VS +VRAM_1.5VS +VRAM_1.5VS
1
1
CV92
2
2
OPT@ CV92
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
A A
5
4
1
1
CV93
CV94
2
2
OPT@ CV93
OPT@
OPT@ CV94
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CV96
CV95
2
2
OPT@ CV96
OPT@
OPT@ CV95
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CV97
CV98
2
2
OPT@ CV97
OPT@
OPT@ CV98
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
CV99
OPT@ CV99
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
CV101
CV100
2
2
OPT@ CV101
OPT@
OPT@ CV100
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
1
2
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
1
1
CV103
CV102
2
2
OPT@ CV103
OPT@
OPT@ CV102
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
1
CV104
CV105
2
2
OPT@ CV104
OPT@
OPT@ CV105
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CV106
CV107
2
2
OPT@ CV107
OPT@
OPT@ CV106
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
1
CV108
2
OPT@ CV108
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CV110
CV109
OPT@ CV109
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
CV111
2
2
OPT@ CV110
OPT@
OPT@ CV111
OPT@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
CV112
2
22U_0805_6.3V6M
22U_0805_6.3V6M
DRANK@ CV112
DRANK@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
VGA_N14x VRAM RANK 0H
VGA_N14x VRAM RANK 0H
VGA_N14x VRAM RANK 0H
19 56Thursday, January 17, 2013
19 56Thursday, January 17, 2013
19 56Thursday, January 17, 2013
of
of
1
of
0.3
0.3
0.3
Page 20
CyberForum.ru
5
4
RANK 1 [31...0]
VRAM DDR3 Chips
DQSA[3..0]<14,18>
D D
DQSA#[3..0]<14,18>
DQMA[3..0]<14,18>
MDA[31..0]<14,18>
CMDA[30..0]
C C
B B
DQSA[3..0]
DQSA#[3..0]
DQMA[3..0]
MDA[31..0]
CMDA[30..0]
+MEM_VREF_CA0 +MEM_VREF_DQ0
CLKA0<14,18> CLKA0#<14,18>
RV77
RV77
243_0402_1%
243_0402_1%
DRANK@
DRANK@
DRANK@
DRANK@
0.01U_0402_25V7K
0.01U_0402_25V7K
12
CV88
CV88
CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12
CMDA29 CMDA6 CMDA30
CMDA3
CMDA0 CMDA1 CMDA11 CMDA15 CMDA25
DQSA1 DQSA2
DQMA1 DQMA2
DQSA#1 DQSA#2
ZQ4
12
UV7
@
UV7
@
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
A13
T7
A14
M7
A15/BA3
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE/CKE0
K1
ODT/ODT0
L2
CS/CS0
J3
RAS
K3
CAS
L3
WE
310mA 310mA
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
NC/ODT1
L1
NC/CS1
J9
NC/CE1
L9
NCZQ1
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
MDA12 MDA9 MDA15 MDA8 MDA14 MDA10 MDA11 MDA13
MDA22 MDA18 MDA23 MDA16 MDA21 MDA19 MDA20 MDA17
+VRAM_1.5VS
+VRAM_1.5VS
Group1
Group2
+MEM_VREF_CA0 +MEM_VREF_DQ0
3
CV89
CV89
0.01U_0402_25V7K
0.01U_0402_25V7K
DRANK@
DRANK@
1
2
243_0402_1%
243_0402_1%
RV78
RV78
DRANK@
DRANK@
CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12
CMDA29 CMDA6 CMDA30
CLKA0 CLKA0# CMDA3
CMDA0 CMDA1 CMDA11 CMDA15 CMDA25
DQSA0 DQSA3
DQMA0 DQMA3
DQSA#0 DQSA#3
CMDA20CMDA20
12
UV8
UV8
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
A13
T7
A14
M7
A15/BA3
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE/CKE0
K1
ODT/ODT0
L2
CS/CS0
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ5
ZQ/ZQ0
J1
NC/ODT1
L1
NC/CS1
J9
NC/CE1
L9
NCZQ1
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
@
@
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
2
MDA1 MDA6 MDA0 MDA5 MDA3 MDA7 MDA2 MDA4
MDA26 MDA30 MDA24 MDA29 MDA25 MDA31 MDA27 MDA28
+VRAM_1.5VS
+VRAM_1.5VS
Group0
Group3
Mode E Address
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
0..31
ODT
CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
1
Rank 0
32..63
A9
A6
A3
A0
A8
A1
A13
BA1 A3
A14
CAS#
ODT
CS0#
CKE
RST
A7CMD21
A4
A11
A2
A10
A5
BA2
WE#
BA0
ODT
CS1#
CKE
A11
BA1
A8
A0
RAS#RAS#
A14
A3
A6
A5
A1
A4
BA0
BA2
Rank 1
32..630..31
A11
A7A7
BA1
A12A12
A8
A0A12
A2A2
RAS#
A14
A13A13
CAS#CAS#
ODT
CS1#
CKE
RSTRST
A6
A5
A9A9
A1
WE#WE#
A4
A10A10
BA0
BA2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
VGA_N14x VRAM RANK 1L
VGA_N14x VRAM RANK 1L
VGA_N14x VRAM RANK 1L
20 56Thursday, January 17, 2013
20 56Thursday, January 17, 2013
20 56Thursday, January 17, 2013
of
of
1
of
0.3
0.3
0.3
Page 21
CyberForum.ru
5
4
RANK 1[63...32]
VRAM DDR3 Chips
DQSA[7..4]<14,19>
DQSA#[7..4]<14,19>
D D
DQMA[7..4]<14,19>
MDA[63..32]<14,19>
CMDA[30..0]
C C
B B
DQSA[7..4]
DQSA#[7..4]
DQMA[7..4]
MDA[63..32]
CMDA[30..0]
+MEM_VREF_CA1 +MEM_VREF_DQ1
CLKA1<14,19> CLKA1#<14,19>
RV79
RV79
243_0402_1%
243_0402_1%
DRANK@
DRANK@
DRANK@
DRANK@
0.01U_0402_25V7K
0.01U_0402_25V7K
12
CV90
CV90
CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12
CMDA29 CMDA6 CMDA30
CMDA19
CMDA16 CMDA17 CMDA11 CMDA15 CMDA25
DQSA4 DQSA7
DQMA4 DQMA7
DQSA#4 DQSA#7
CMDA20
ZQ6 ZQ7
12
UV9
@
UV9
@
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
A13
T7
A14
M7
A15/BA3
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE/CKE0
K1
ODT/ODT0
L2
CS/CS0
J3
RAS
K3
CAS
L3
WE
310mA
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
NC/ODT1
L1
NC/CS1
J9
NC/CE1
L9
NCZQ1
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
MDA37 MDA35 MDA36 MDA32 MDA39 MDA34 MDA38 MDA33
MDA62 MDA58 MDA63 MDA56 MDA60 MDA59 MDA61 MDA57
+VRAM_1.5VS
+VRAM_1.5VS
Group7
+MEM_VREF_CA1 +MEM_VREF_DQ1
3
CV91
CV91
0.01U_0402_25V7K
0.01U_0402_25V7K
DRANK@
DRANK@
1
2
RV80
RV80
243_0402_1%
243_0402_1%
DRANK@
DRANK@
CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12
CMDA29 CMDA6 CMDA30
CLKA1 CLKA1# CMDA19
CMDA16 CMDA17 CMDA11 CMDA15 CMDA25
DQSA5 DQSA6
DQMA5 DQMA6
DQSA#5 DQSA#6
CMDA20
12
UV10
@
UV10
M8
H1
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3
L7 R7 N7 T3 T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3 C7
E7 D3
G3
B7
T2
L8
J1
L1
J9
L9
@
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3
BA0 BA1 BA2
CK CK CKE/CKE0
ODT/ODT0 CS/CS0 RAS CAS WE
310mA
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NCZQ1
96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
K4B1G1646E-HC12_FBGA96
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
MDA41 MDA45 MDA40 MDA46 MDA42 MDA47 MDA43 MDA44
MDA50 MDA54 MDA48 MDA55 MDA49 MDA52 MDA51 MDA53
+VRAM_1.5VS
+VRAM_1.5VS
2
Mode E Address
CMD0
Rank 0
0..31
ODT
CMD1
Group5Group4
Group6
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CS0#
CKE
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
CMD18
CMD19
CMD20
RST
A7
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
A4
A11
A2
A10
A5
BA2
WE#
BA0
CMD30
1
Rank 1
32..63
ODT
CS1#
CKE
A9
A11
A6
A3
BA1
A0
A8
A8
A0
A1
RAS#RAS#
A13
BA1 A3
A14
A3
A14
CAS#
ODT
CS0#
CKE
RST
A7CMD21
A4
A6
A5
A11
A2
A1
A10
A5
A4
BA2
WE#
BA0
BA0
BA2
32..630..31
A11
A7A7
BA1
A12A12
A8
A0A12
A2A2
RAS#
A14
A13A13
CAS#CAS#
ODT
CS1#
CKE
RSTRST
A6
A5
A9A9
A1
WE#WE#
A4
A10A10
BA0
BA2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/28 2013/09/28
2012/09/28 2013/09/28
2012/09/28 2013/09/28
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
VGA_N14x VRAM RANK 1H
VGA_N14x VRAM RANK 1H
VGA_N14x VRAM RANK 1H
21 56Thursday, January 17, 2013
21 56Thursday, January 17, 2013
21 56Thursday, January 17, 2013
of
of
1
of
0.3
0.3
0.3
Page 22
CyberForum.ru
A
B
C
D
E
For eDP Panel
USB20_P11_R
IEDP@
IEDP@
1 2
C890 0.1U_0402_1 0V7K
H_EDP_AUXP<6>
1 1
H_EDP_AUXN<6>
H_EDP_TXP0<6>
H_EDP_TXN0<6>
H_EDP_TXP1<6>
H_EDP_TXN1<6>
C890 0.1U_0402_1 0V7K
IEDP@
IEDP@
1 2
C891 0.1U_0402_1 0V7K
C891 0.1U_0402_1 0V7K
IEDP@
IEDP@
1 2
C912 0.1U_0402_1 0V7K
C912 0.1U_0402_1 0V7K
IEDP@
IEDP@
1 2
C913 0.1U_0402_1 0V7K
C913 0.1U_0402_1 0V7K
IEDP@
IEDP@
1 2
C914 0.1U_0402_1 0V7K
C914 0.1U_0402_1 0V7K
IEDP@
IEDP@
1 2
C915 0.1U_0402_1 0V7K
C915 0.1U_0402_1 0V7K
LVDS_EDID_CLK
LVDS_EDID_DATA
LVDS_TXOUT0+
LVDS_TXOUT0-
LVDS_TXOUT1+
LVDS_TXOUT1-
USB20_N11_R
USB20_P8_R
USB20_N8_R
CAM@EMI@
CAM@EMI@
1
1
4
4
L55
L55
2
2
3
3
WCM-2012-900T_0805
WCM-2012-900T_0805
Reserve fo r EMI requ est
@TOUCH_EMI@
@TOUCH_EMI@
1 2
R267 0_0402_5%
R267 0_0402_5%
TOUCH@EMI@
TOUCH@EMI@
1
1
4
4
L57
L57
1 2
R266 0_0402_5%
R266 0_0402_5%
@TOUCH_EMI@
@TOUCH_EMI@
2
2
3
3
WCM-2012-900T_0805
WCM-2012-900T_0805
USB20_P11 <29>
USB20_N11 <29>
USB20_P8 <29>
USB20_N8 <29>
LCD POWER CIRCUIT
Need check eDP&LVDS both 3V power rail.
+3VS
W=60mils
1.5A
+LCD_VDD_SS
12
C7
C7 1500P_0402_50V7K
1500P_0402_50V7K
U16
U16
5
VIN
4
SS
APL3512ABI-TRG_SOT23-5
APL3512ABI-TRG_SOT23-5
LCD_ENVDD<28>
VOUT
GND
EN
Reserve for power consumption Remove on PVT phase
1
+LCD_VDD_OUT
2
3
1 2
R112
R112 100K_0402_5%
100K_0402_5%
1 2
R106 0_0805_5%R106 0_08 05_5%
+LCD_VDD
W=60mils
I rush=1.5A
Reserve fo r EMI requ est
For LVDS 1ch Panel
1 2
LVDS@
2 2
3 3
LCD_TXOUT0+<28>
LCD_TXOUT0-<28>
LCD_TXOUT1+<28>
LCD_TXOUT1-<28>
LCD_TXOUT2+<28>
LCD_TXOUT2-<28>
LCD_TXCLK+<28>
LCD_TXCLK-<28>
LCD_EDID_CLK<28>
LCD_EDID_DATA<28>
Reserve for eDP panel potential issue
LVDS@
R262 0_0402_5%
R262 0_0402_5%
1 2
LVDS@
LVDS@
R263 0_0402_5%
R263 0_0402_5%
1 2
LVDS@
LVDS@
R265 0_0402_5%
R265 0_0402_5%
1 2
LVDS@
LVDS@
R264 0_0402_5%
R264 0_0402_5%
1 2
LVDS@
LVDS@
R300 0_0402_5%
R300 0_0402_5%
1 2
LVDS@
LVDS@
R299 0_0402_5%
R299 0_0402_5%
+3VS
LVDS_TXOUT0+
LVDS_TXOUT0-
LVDS_TXOUT1+
LVDS_TXOUT1-
LCD_TXOUT2+
LCD_TXOUT2-
LCD_TXCLK+
LCD_TXCLK-
LVDS_EDID_CLK
LVDS_EDID_DATA
LVDS colay eDP cable
Pin define will be change after ME ready
pin1-4 Touch function for panel
pin5-10 For Webcam with single or dual MIC
pin11-30 For LVDS or EDP panel
@
JLVDS@JLVDS
GND GND GND GND GND
+5VS
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31 32 33 34 35
+5VS_LVDS_TOUCH USB20_N8_R USB20_P8_R BKOFF# INT_MIC_DATA INT_MIC_CLK
USB20_P11_R USB20_N11_R +3VS_LVDS_CAM +LCD_VDD
+3VS LVDS_EDID_CLK LVDS_EDID_DATA LVDS_TXOUT0­LVDS_TXOUT0+ LVDS_TXOUT1­LVDS_TXOUT1+ LCD_TXOUT2­LCD_TXOUT2+
LCD_TXCLK­LCD_TXCLK+
LED_PWM BKOFF#_R
1 2
@
@
R389 0_0603_5%
R389 0_0603_5%
+LCD_VDD
+LCD_INV
Irush=1.5A
+LCD_INV
CPU_EDP_HPD <6>
1 2
@
@
R390 0_0603_5%
R390 0_0603_5%
INT_MIC_DATA <39> INT_MIC_CLK <39>
Irush=1.5A
Irush=1.5A
60mils
60mils
60mils
L2
L2
EMI@
EMI@
12
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
+3VS
20mils
+3VS
20mils
B+
1 2
IEDP@
IEDP@
R103 0_0402_5%
R103 0_0402_5%
BKOFF#_R
4 4
1 2
D15 RB751V40_S C76-2
D15 RB751V40_S C76-2
LVDS@
LVDS@
12
R113
R113 10K_0402_5%
10K_0402_5%
A
IEDP@
IEDP@
5
U17
U17
1
P
IN1
4
O
2
IN2
G
3
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
1 2
R147 0_0402_5%
R147 0_0402_5%
LVDS@
LVDS@
EC_ENBKL <28,41>
BKOFF# <41>
EMI@
EMI@
1 2
C17 100P_0402_50V 8J
C17 100P_0402_50V 8J
For EMI request , cut in on PVT phase. Place close CONN.
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
LED_PWM
D
LED_PWM
R131
R131
47K_0402_5%
47K_0402_5%
12
1 2
D17RB751V40_SC76-2 D17RB751V40_SC76-2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
LVDS
LVDS
LVDS
VFKTA
VFKTA
VFKTA
E
PCH_PWM <28>
22 56Thursday, January 17, 2013
22 56Thursday, January 17, 2013
22 56Thursday, January 17, 2013
of
of
of
0.3
0.3
0.3
Page 23
CyberForum.ru
A
B
C
D
E
CRT CONNECTOR
1 1
1 2
L3 NBQ1005 05T-800Y_0402
UMA_CRT _R<28>
UMA_CRT _G<28>
UMA_CRT _B<28>
CRT@
CRT@
2 2
+HDMI_5V_ OUT
2
@
@
C250
C250
0.1U_040 2_10V7K
0.1U_040 2_10V7K
1
3 3
R138
R138
UMA_CRT _VSYNC<28>
UMA_CRT _HSYNC<28>
UMA_CRT _DATA<28>
UMA_CRT _CLK<28>
CRT@
CRT@
CRT@
CRT@
R139
R139
12
12
150_0402_1%
150_0402_1%
+HDMI_5V_ OUT
R140
R140
150_0402_1%
150_0402_1%
CRT@
CRT@
12
150_0402_1%
150_0402_1%
+3VS
+3VS
C238
C238
1
C239
C239
2
2.2P_0402_50V8C
2.2P_0402_50V8C
L3 NBQ1005 05T-800Y_0402
CRT@EMI@
CRT@EMI@
1 2
L4 NBQ1005 05T-800Y_0402
L4 NBQ1005 05T-800Y_0402
CRT@EMI@
CRT@EMI@
1 2
L5 NBQ1005 05T-800Y_0402
L5 NBQ1005 05T-800Y_0402
CRT@EMI@
CRT@EMI@
CRT@
CRT@
CRT@
CRT@
1
2
1
C240
C240
2
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
U49
U49
1
VCC_SYNC
2
VCC_VIDEO
7
VCC_DDC
10
DDC_IN1
11
DDC_IN2
13
SYNC_IN1
15
SYNC_IN2
6
GND
TPD7S01 9-15DBQR_SSOP 16
TPD7S01 9-15DBQR_SSOP 16
C241
C241
CRT@
CRT@
1
2
VIDEO1
VIDEO2
VIDEO3
DDC_OUT1
DDC_OUT2
SYNC_OUT1
SYNC_OUT2
CRT@
CRT@
CRT@
CRT@
C242
C242
2.2P_0402_50V8C
2.2P_0402_50V8C
8
BYP
3
4
5
9
12
14
16
1
C243
C243
2
2.2P_0402_50V8C
2.2P_0402_50V8C
C15 0.22 U_0402_16V7K
C15 0.22 U_0402_16V7K
CRT@
CRT@
1
2
2.2P_0402_50V8C
2.2P_0402_50V8C
CRT@
CRT@
1 2
VSYNC_R
HSYNC_R
CRT_R_L
CRT_G_L
CRT_B_L
CRT_R_L
CRT_G_L
CRT_B_L
R62
R62
1 2
R63
R63
1 2
4.7K_040 2_5%
4.7K_040 2_5%
CRT@
CRT@
CRT@
CRT@
+HDMI_5V_ OUT
USE HDMI POWER
+HDMI_5V_ OUT
R159
R159
R153
R153
4.7K_040 2_5%
4.7K_040 2_5%
CRT@
CRT@
CRT@
22_0402 _5%
22_0402 _5%
22_0402 _5%
22_0402 _5%
CRT@
1 2
1 2
VSYNC
HSYNC
CRT_R_L
CRT_DDC _DAT CRT_G_L
HSYNC CRT_B_L
VSYNC
CRT_DDC _CLK
CRT_DDC _DAT
CRT_DDC _CLK
T65, T66: for AT E
T65 PADT65 PAD
T66 PADT66 PAD
JCRT
JCRT
6
11
1 7
12
2 8
13
3 9
14
G
G
4
G
G
10 15
5
C-H_13-12 201513CP
C-H_13-12 201513CP
@
@
16 17
4 4
Security Class ification
Security Class ification
Security Class ification
2012/09/ 24 2013/09/ 24
2012/09/ 24 2013/09/ 24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/09/ 24 2013/09/ 24
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
CRT
CRT
CRT
VFKTA
VFKTA
VFKTA
23 56Thursday, January 17, 20 13
23 56Thursday, January 17, 20 13
23 56Thursday, January 17, 20 13
E
0.3
0.3
0.3
of
of
of
Page 24
CyberForum.ru
A
B
C
D
E
RPY1
+3VS
+HDMI_5V_OUT
1 1
UMA_HDMI_CLK<28>
UMA_HDMI_DATA<28>
2 2
UMA_HDMI_CLK-<28>
UMA_HDMI_CLK+<28>
UMA_HDMI_TX0-<28>
UMA_HDMI_TX0+<28>
3 3
UMA_HDMI_TX1-<28>
UMA_HDMI_TX1+<28>
UMA_HDMI_CLK HDMI_SCLK
UMA_HDMI_DATA HDMI_SD ATA
1 8 2 7 3 6 4 5
2.2K_0804_8P4R_5%
2.2K_0804_8P4R_5%
3 1
BSH111_SOT23-3
BSH111_SOT23-3
CY2 0.1U_0402_16V7KCY2 0.1U_0402_16V7K
CY1 0.1U_0402_16V7KCY1 0.1U_0402_16V7K
CY5 0.1U_0402_16V7KCY5 0.1U_0402_16V7K
CY3 0.1U_0402_16V7KCY3 0.1U_0402_16V7K
CY7 0.1U_0402_16V7KCY7 0.1U_0402_16V7K
CY6 0.1U_0402_16V7KCY6 0.1U_0402_16V7K
2
SGD
SGD
+3VS
3 1
BSH111_SOT23-3
BSH111_SOT23-3
QY2
QY2
1 2
1 2
1 2
1 2
1 2
1 2
UMA_HDMI_CLK UMA_HDMI_DATA
HDMI_SCLK HDMI_SDATA
2
SGD
SGD
QY1
QY1
HDMI_TXC-
HDMI_TXC+
HDMI_TXD0-
HDMI_TXD0+
HDMI_TXD1-
HDMI_TXD1+
LY1
EMI@LY1
EMI@
1
1
4
4
WCM-2012HS-900T_4P
WCM-2012HS-900T_4P
LY2
EMI@LY2
EMI@
1
1
4
4
WCM-2012HS-900T_4P
WCM-2012HS-900T_4P
LY3
EMI@LY3
EMI@
1
1
4
4
WCM-2012HS-900T_4P
WCM-2012HS-900T_4P
L
L L
L
H H
H
X Z
+HDMI_5V_OUT
5
1
UY1
UY1
P
OE#
A2Y
G
74AHCT1G125GW_SOT353-5
74AHCT1G125GW_SOT353-5
3
HDMI_HPD
2
2
3
3
2
2
3
3
2
2
3
3
4
HDMI_HPD
RY1
RY1
1 2
1K_0402_5%
1K_0402_5%
RY3
RY3
2.2K_0402_5%
2.2K_0402_5%
12
RY2
RY2
100K_0402_5%
100K_0402_5%
+3VS
HDMI_HPD <28,30>
HDMI_HPD_CHDMI_HPD_U
1 2
2
CY4
CY4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
HDMI POWER CIRCUIT
VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m Current Limit: TYP=0.8A ; MAX=1A
+HDMI_5V_OUT
CY18
CY18
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
UY2
UY2
1
IN
OUT
2
GND
3
EN
FLG
AP2151DWG-7_SOT25-5
AP2151DWG-7_SOT25-5
SA00006H00 0
5
4
+5VS
HDMI Connector
JHDMI@JHDMI
+HDMI_5V_OUT
HDMI_HPD_C
HDMI_SDATA HDMI_SCLK
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2+
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
@
GND GND GND GND
23 22 21 20
RPY1
OE# A Y
680 +-5% 8P4R
680 +-5% 8P4R
HDMI_R_D0-
HDMI_R_D0+
LY4
EMI@LY4
1 2
UMA_HDMI_TX2-<28>
UMA_HDMI_TX2+<28>
HDMI Royalty
4 4
HDMI W/O Logo: RO0000001HM HDMI W/Logo: RO0000002HM HDMI W/Logo + HDCP: RO0000003HM
please manually load this virtual material to 45@ BOM
A
CY9 0.1U_0402_16V7KCY9 0.1U_0402_16V7K
1 2
CY8 0.1U_0402_16V7KCY8 0.1U_0402_16V7K
ZZZ
HDMI45@ZZZ
HDMI45@
RO0000003HM
HDMI W/Logo + HDCP
HDMI W/Logo + HDCP
HDMI_TXD2-
HDMI_TXD2+
B
EMI@
1
1
4
4
WCM-2012HS-900T_4P
WCM-2012HS-900T_4P
2
2
3
3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
HDMI_R_CK­HDMI_R_CK+
HDMI_R_D1­HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2+
+5VS
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
45 36 27 18
RPY3
RPY3
680 +-5% 8P4R
680 +-5% 8P4R
45 36 27 18
RPY4
RPY4
2
G
G
D
13
D
D
QY4
QY4
S
S
2N7002KW_SOT323-3
2N7002KW_SOT323-3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HDMI Conn.
HDMI Conn.
HDMI Conn.
VFKTA
VFKTA
VFKTA
24 56Thursday, January 17, 2013
24 56Thursday, January 17, 2013
24 56Thursday, January 17, 2013
E
of
of
of
0.3
0.3
0.3
Page 25
CyberForum.ru
5
CMOS Setting, near DDR Door
1 2
1 2
PCH_RTCRST#
PCH_SRTCRST#
RH23
+RTCVCC
D D
RH23 20K_0402_5%
20K_0402_5%
iME Setting.
RH24
RH24 20K_0402_5%
20K_0402_5%
CH4
CH4
1U_0402_6.3V6K
1U_0402_6.3V6K
CH5
CH5
1U_0402_6.3V6K
1U_0402_6.3V6K
JCMOS @JCMOS @
1 2
1 2
JME @JME @
1 2
1 2
PCH_RTCX1_R<35>
Placement near to YH 1
4
RH26
GCLK@RH26
GCLK@
1 2
0_0402_5%
0_0402_5%
PCH_RTCX1
CH2 15P_0402_50V8J
CH2 15P_0402_50V8J
NOGCLK@
NOGCLK@
32.768KHZ_12.5P_1TJF125DP1A000D
32.768KHZ_12.5P_1TJF125DP1A000D
CH3 15P_0402_50V8J
CH3 15P_0402_50V8J
12
NOGCLK@
NOGCLK@
12
YH1
YH1
12
NOGCLK@
NOGCLK@
RH2
RH2
1 2
10M_0402_5%
10M_0402_5%
Integrated SUS 1.05V VRM Enable
PCH_INTVRMEN
+RTCVCC
RH12
RH12
RH33
RH33
+3VS
+RTCVCC
C C
AZ_BITCLK_HD<39> AZ_SYNC_HD<39> AZ_RST_HD#<39> AZ_SDOUT_HD<39>
HDA_SDO
ME debug mode, this signal has a weak internal pull down Low = Disable (default)
*
High = Enable (flash descriptor security overide)
B B
HDA_SYNC
This signal has a weak internal pull down
*
H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V Need to pull high for Chief River Mobile platform
High - Enable Internal VRs (must be always pulled high)
1 2
1M_0402_5%
1M_0402_5%
1 2
330K_0402_5%
330K_0402_5%
@
@
1 2
RH36 1K_0402_5%
RH36 1K_0402_5%
3
1
CH8
CH8
0.1U_0402_10V7K
0.1U_0402_10V7K
2
AZ_SYNC_R
1M_0402_5%
1M_0402_5%
1
RH56
RH56
2
SM_INTRUDER#
PCH_INTVRMEN
DH1
DH1 BAS40-04_SOT23-3
BAS40-04_SOT23-3
AZ_BITCLK_HD
1 2
PCH_SPKR
+RTCBATT
+3VL
RPH2
RPH2
1 8 2 7 3 6 4 5
33_8P4R_5%
33_8P4R_5%
+5VS
G
G
2
QH1
QH1
13
D
S
D
S
BSS138 1N SOT23-3
BSS138 1N SOT23-3
PCH_SPKR High = Enabled "No Reboot Mode"
*
Low = Disabled (Default)
AZ_BITCLK AZ_SYNC_R AZ_RST# AZ_SDOUT
+3VALW_PCH
RH55
RH55 1K_0402_5%
1K_0402_5%
1 2
AZ_SYNC
PCH_SPKR<39>
AZ_SDIN0_HD<39>
1 2
@
PWRME_CTRL<41>
Change Net name due to this function is high active
@
RH25 0_0402_5%
RH25 0_0402_5%
T70 PADT70 PAD
T67 PADT67 PAD
T68 PADT68 PAD
T69 PADT69 PAD
SPI ROM for BIOS & ME (4MByte )
UH3
UH3
RH68
RH68
1 2
0_0402_5%
0_0402_5%
PCH_SPICS0# PCH_SPI0_DOPCH_SPIDO
+3VALW_PCH
1
CS#
2
DO
3
WP#
4
GND
W25Q32BVSSIG_SO8
W25Q32BVSSIG_SO8
4MB ROM P/N: SA00003K800 SA00004LI00
Please place UH3 & UH4 close to UH1 PCH, please place RH66, RH67, RH68 near UH3
NOGCLK@
NOGCLK@
VCC
HOLD#
CLK
3
UH1A
UH1A
PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
AZ_BITCLK
AZ_SYNC
PCH_SPKR
AZ_RST#
AZ_SDIN0_HD
AZ_SDOUT
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPICLK
PCH_SPICS0#
PCH_SPICS1#
PCH_SPIDI
PCH_SPIDO
8 7 6 5
DI
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
HM76R1@
HM76R1@
+3VALW_PCH
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
CH6
@ CH6
@
RH66 0_0402_5%
RH66 0_0402_5%
1 2
PCH_SPI0_DI PCH_SPIDI
1 2
RH67 0_0402_5%R H67 0_0402_5%
@
@
INT.PH 20K INT.PH 20K INT.PH 20K INT.PH 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PH 20K
INT.PH 20K
JTAG
JTAG
INT.PD 20K
INT.PH 20K
PCH_SPICLKPCH_SPI0_CLK
LPC
LPC
INT.PH 20K INT.PH 20K
RTCIHDA
RTCIHDA
SATA
SATA
SPI
SPI
SATA0GP / GPIO21
SATA1GP / GPIO19
INT.PH 20K
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN SATA0RXP
SATA0TXN SATA0TXP
SATA1RXN SATA1RXP
SATA 6G
SATA 6G
SATA1TXN SATA1TXP
SATA2RXN SATA2RXP
SATA2TXN SATA2TXP
SATA3RXN SATA3RXP
SATA3TXN SATA3TXP
SATA4RXN SATA4RXP
SATA4TXN SATA4TXP
SATA5RXN SATA5RXP
SATA5TXN SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
PCH_SPIDO
0_0402_5%
0_0402_5%
2
C38 A38 B37 C37
D36
E36 K36
V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
RH269
@RH269
@
1 2
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME#
SERIRQ
SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0
SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2
SATAICOMP
SATA3_COMP
RBIAS_SATA3
SATA_LED#
PCH_GPIO21
PCH_GPIO19
1 2
RH43 37.4_0402_1%RH43 37.4_0402_1%
1 2
RH48 49.9_0402_1%RH48 49.9_0402_1%
1 2
RH41 750_0402_1%RH41 750_0402_1%
SPI ROM (2MByte )
PCH_SPICS1# PCH_SPI1_DO
+3VALW_PCH
LPC_AD0 <41> LPC_AD1 <41> LPC_AD2 <41> LPC_AD3 <41>
LPC_FRAME# <41>
SERIRQ <41>
SATA_PRX_C_DTX_N0 <34> SATA_PRX_C_DTX_P0 <34> SATA_PTX_DRX_N0 <34> SATA_PTX_DRX_P0 <34>
SATA_PRX_C_DTX_N2 <34> SATA_PRX_C_DTX_P2 <34> SATA_PTX_DRX_N2 <34> SATA_PTX_DRX_P2 <34>
+1.05VS_PCH
+1.05VS_PCH
PCH_GPIO19 <29>
BOOT BIOS Strap Bit 0
UH4
@UH4
@
1
CS#
2
SO
3
WP#
4
GND
MX25L1606EM2I-12G_SO8
MX25L1606EM2I-12G_SO8
VCC
HOLD#
SCLK
(PH)
+3VALW_PCH
8 7 6
PCH_SPI1_CLK
5
PCH_SPI1_DI PCH_SPIDI
SI
2MB ROM P/N: SA000041N00 SA00003FO10
HDD
ODD
SERIRQ PCH_GPIO21 PCH_GPIO19 SATA_LED#
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
CH100
@ CH100
@
1
RH267 0_0402_5%@RH267 0_0402_5%@
RH271 0_0402_5%
RH271 0_0402_5%
RPH1
RPH1
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
10K_0804_8P4R_5%
1 2 1 2
@
@
+3VS
PCH_SPICLK
Please place RH267 near RH66, Please place RH271 near RH67, Please place RH269 near RH68.
A A
RPH9
RPH9
EC_SDIO<41>
EC_CS0#<41> EC_SCK< 41>
EC_SDI<41>
1 8 2 7 3 6 4 5
33_8P4R_5%
33_8P4R_5%
885@
885@
Reserve for NPCE885N EC
5
PCH_SPI0_DO PCH_SPICS0# PCH_SPI0_CLK PCH_SPI0_DI
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PCH_HDA/JTAG/SATA/SPI/LPC
PCH_HDA/JTAG/SATA/SPI/LPC
PCH_HDA/JTAG/SATA/SPI/LPC
VFKTA
VFKTA
VFKTA
25 56Thursday, January 17, 2013
25 56Thursday, January 17, 2013
25 56Thursday, January 17, 2013
of
of
1
of
0.3
0.3
0.3
Page 26
CyberForum.ru
5
PCIE_PRX_C_LANTX_N1<36>
LAN
WLAN
D D
+3VS
Intel Spec: PCIECLK_RQ0# is suspend well, but we pull high to +3VS for LAN en/disable function
+3VALW_PCH
C C
PCIE_PRX_C_LANTX_P1<36> PCIE_PTX_C_LANRX_N1<36> PCIE_PTX_C_LANRX_P1<36>
PCIE_PRX_WLANTX_ N2<35>
PCIE_PRX_WLANTX_ P2<35> PCIE_PTX_C_WLANR X_N2<35> PCIE_PTX_C_WLANR X_P2<35>
1 2
RH104 10K_0402_5%RH104 10K_0402_5%
1 2
RH95 10K_0402_5%RH95 10K_0402_5%
RPH10
RPH10
18 27 36
10K_0804_8P4R_5%
10K_0804_8P4R_5%
45
CLKREQ_WLAN#
CLKREQ_LAN#
RI# LVDS_SEL
PCH_GPIO28
PASSWORD_CLEAR #
LAN
WLAN
+3VALW_PCH
B B
+3VALW_PCH
RPH6
RPH6
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
10K_0804_8P4R_5%
1 2
LVDS@
LVDS@
RH119 10K_0402_5%
RH119 10K_0402_5%
1 2
IEDP@
IEDP@
RH276 10K_0402_5%
RH276 10K_0402_5%
EC_SWI# LAN_EN PCH_SUSPWRD N#_R USB_CHG_OC#
PANEL_SEL
PANEL_SEL
12
CH13 0.1U_0402_10V7KCH13 0.1U_0402_10V7K
12
CH11 0.1U_0402_10V7KCH11 0.1U_0402_10V7K
12
CH14 0.1U_0402_10V7KCH14 0.1U_0402_10V7K
12
CH17 0.1U_0402_10V7KCH17 0.1U_0402_10V7K
RI# <27>
PCH_GPIO28 <30>
CLK_LAN#<36> CLK_LAN<36>
CLKREQ_LAN#<36>
CLK_WLAN#<35> CLK_WLAN<35>
CLKREQ_WLAN#<35>
EC_SWI# <27,36>
PCH_SUSPWRD N#_R <27> USB_CHG_OC# <29,38,41>
Note: place in D DR area
LVDS_SEL
LVDS_SEL
A A
Channel
H L
Single (Default)
5
Dual
PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1
PCIE_PRX_WLANTX_ N2 PCIE_PRX_WLANTX_ P2 PCIE_PTX_WLANRX_ N2 PCIE_PTX_WLANRX_ P2
CLK_LAN# CLK_LAN
CLKREQ_LAN#
CLK_WLAN# CLK_WLAN
CLKREQ_WLAN#
PASSWORD_CLEAR #
12
JPW@JPW
@
LVDS_SEL
PANEL_SEL
PANEL_SEL
PANEL_SEL
Channel LVDS
4
UH1B
UH1B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
PANTHER-POINT_FCBGA989HM76R1@
PANTHER-POINT_FCBGA989HM76R1@
H L
EDP
4
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
INT. PH 20K
INT. PH 20K
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKIN_PCILOOPBACK
INT. PD 20K
CLKOUTFLEX0 / GPIO64
INT. PD 20K
CLKOUTFLEX1 / GPIO65
INT. PD 20K
CLKOUTFLEX2 / GPIO66
INT. PD 20K
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO58
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_DMI_N CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_GND1_N CLKIN_GND1_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
3
E12
PCH_SMBALERT#
H14
PCH_SMBCLK
C9
PCH_SMBDATA
A12
DRAMRST_CNTRL_PC H
C8
PCH_SMLCLK0
G12
PCH_SMLDATA0
C13
LAN_EN
E14
PCH_SMLCLK1
M16
PCH_SMLDATA1
M7
Control Link only for support Intel IAMT.
T11
P10
M10
CLK_REQ_VGA#
AB37
CLK_PCIE_VGA#
AB38
CLK_PCIE_VGA
AV22 AU22
AM12 AM13
BF18
PCH_CLK_DMI#
BE18
PCH_CLK_DMI
BJ30
CLKIN_GND1#
BG30
CLKIN_GND1
G24
CLK_DOT#
E24
CLK_DOT
AK7
CLK_SATA#
AK5
CLK_SATA
K45
CLK_14M_PCH
H45
CLK_PCILOOP
V47
PCH_X1
V49
PCH_X2
Y47
K43
F47
H47
K49
XCLK_RCOMP
CLK_FLEX0
CLK_FLEX1
CLK_FLEX2
DGPU_PRSNT#
1 2
0_0402_5%
0_0402_5%
Place close PCH side
EMI request for 200M noise.
PCH_SMBALERT# <27>
DRAMRST_CNTRL_PC H <7,9>
LAN_EN <36>
CLK_REQ_VGA# <13>
CLK_PCIE_VGA# < 13> CLK_PCIE_VGA <13>
CLK_CPU_DMI# <5> CLK_CPU_DMI <5>
CLK_CPU_EDP# <5> CLK_CPU_EDP <5>
CLK_PCILOOP <29>
RH38
RH38
XCLK_RCOMP_R
EMI@
EMI@
T72 PADT72 PAD
T74 PADT74 PAD
T73 PADT73 PAD
1 2
RH261 10K_0402_5%RH261 10K_0402_5%
(PH)
From Clock Gen.
2
+3VALW_PCH
RPH5
RPH5
2.2K_0804_8P4R_5%
2.2K_0804_8P4R_5%
VGA
120 MHz for eDP
1 2
RH115 90.9_0402_1%RH115 90.9_0402_1%
45
PCH_SMBDATA
36
PCH_SMBCLK
27
PCH_SMLDATA1
18
PCH_SMLCLK1
DRAMRST_CNTRL_PC H
PCH_SMLCLK0
PCH_SMLDATA0
RH275 10K_0402_5%
RH275 10K_0402_5%
PCH_CLK_DMI# PCH_CLK_DMI CLKIN_GND1# CLKIN_GND1
CLK_SATA# CLK_SATA CLK_DOT# CLK_DOT
CLK_14M_PCH
CLK_PCILOOP
PCH_X1_R<35>
+1.05VS_VCCDIFFCLKN
CH26
CH26
27P_0402_50V8J
27P_0402_50V8J
NOGCLK@
NOGCLK@
PCH_X1 PCH_X2
1
2
DGPU_PRSNT#
DGPU_PRSNT#
M/B SKU UMA
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
H L
DIS/OPT
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal common design SW request to add DGPU_Present on this GPIO67
2
1
+3VS
3
2
QH3A
QH3A
6 1
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
QH4B
QH4B
3
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
QH4A
QH4A
6 1
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
@
@
12
CLK_REQ_VGA#
QH3B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
5
RH76 1K_0402_5%RH76 1K _0402_5%
RH73 2.2K_0402_5%RH73 2.2K_0402_5%
RH77 2.2K_0402_5%RH77 2.2K_0402_5%
RH103 4.7K_0402_5%RH103 4.7K_0 402_5%
4
+3VS
4
1 2
12
12
12
RH89 10K_0402_5%RH89 10K_0402_5%
EC_SMB_CK2 <13,34,41>
RH102 4.7K_0402_5%RH102 4.7K_0 402_5%
5
QH3B
PM_SMBDATA <11,12,35,42>
PM_SMBCLK <11 ,12,35,42>
EC_SMB_DA2 <13,34,41>
+3VALW_PCH
+3VALW_PCH
Need to check dG PU
RPH3
RPH3
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
10K_0804_8P4R_5%
RPH4
RPH4
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
10K_0804_8P4R_5%
1 2
RH87 10K_0402_5%RH87 10K_0402_5%
@EMI@
@EMI@
1 2
RH70 10_0402_5%
RH70 10_0402_5%
RH37
RH37
1 2
0_0402_5%
0_0402_5%
GCLK@
GCLK@
@EMI@
@EMI@
1 2
CH9 10P_0402_50V8J
CH9 10P_0402_50V8J
PCH_X1
Placement near to YH 2
NOGCLK@
NOGCLK@
RH117 1M_0402_5 %
RH117 1M_0402_5 %
YH2
YH2
1
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
25MHZ_20PF_7V25000016NOGCLK@
25MHZ_20PF_7V25000016NOGCLK@
GND
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
3
3
GND
4
PCH_PCI-E/SMBUS/CLK
PCH_PCI-E/SMBUS/CLK
PCH_PCI-E/SMBUS/CLK
VFKTA
VFKTA
VFKTA
1
1
CH27
CH27
27P_0402_50V8J
27P_0402_50V8J
2
NOGCLK@
NOGCLK@
26 56Thursday, January 17, 2013
26 56Thursday, January 17, 2013
26 56Thursday, January 17, 2013
of
of
of
0.3
0.3
0.3
Page 27
CyberForum.ru
5
DMI_CTX_PRX_N0<6>
+3VALW_PCH
D D
C C
Stuff R137 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit
B B
RPH7
RPH7
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
10K_0804_8P4R_5%
RH163 10K_0402_5%RH163 10K_0402_5%
RPH17
RPH17
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
10K_0804_8P4R_5%
RH282 0_0402_5%
RH282 0_0402_5%
PCH_LOW_BAT# SLP_CHG_CB0
PCH_SMBALERT#
EC_SMI#
12
PM_PWROK PCH_GPIO32 PCH_GPIO37 OPTIMUS_EN#
12
PCH_SUSPWRD N#_RSU SACK#_R
@
@
PCH_RSMRST#
SLP_CHG_CB0 <29,38> PCH_SMBALERT# <26> EC_SMI# <30,41>
PCH_GPIO37 <30> OPTIMUS_EN# <30>
Reserve this signal to EC by SW demand 2011/10/18a
SUSACK#<41>
PCH_SUSPWRD N#_R<26>
(PH)
PCH_SUSPWRD N#<41>
+3VALW_PCH
ACIN<41,46>
Reserve this signal to EC by SW demand 2011/10/18a
DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>
DMI_PTX_CRX_N0<6> DMI_PTX_CRX_N1<6> DMI_PTX_CRX_N2<6> DMI_PTX_CRX_N3<6>
DMI_PTX_CRX_P0<6> DMI_PTX_CRX_P1<6> DMI_PTX_CRX_P2<6> DMI_PTX_CRX_P3<6>
+1.05VS_PCH
+3VS
VGATE<41,51>
DRAMPWROK<5>
PCH_RSMRST#<41>
PBTN_OUT#<41>
1 2
RH161 330K_0402_5%RH161 330K_0402_5%
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
4
1 2
RH126 49.9_0402_1%RH126 49.9_0402_1%
1 2
RH127 750_0402_1%RH127 750_0402_1%
1 2
@
@
RH133 0_0402_5%
RH133 0_0402_5%
1 2
RH47 1K_0402_5%RH47 1K_0402_5%
PM_PWROK<41>
1 2
@
@
RH132 0_0402_5%
RH132 0_0402_5%
DH2
DH2
21
RI#<26>
(PH)
DMI_COMP
RBIAS_CPY
SUSACK#_R
XDP_DBRESET#
PM_PWROK
DRAMPWROK
PCH_RSMRST#
PCH_SUSPWRD N#_R
PBTN_OUT#
PCH_ACIN
PCH_LOW_BAT#
RI#
UH1C
UH1C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
INT.PH 20K
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPW RDNACK/GPIO30
E20
H20
E10
A10
INT.PH 20K
PWRBTN#
ACPRESENT / GPIO31
BATLOW# / GPIO72
RI#
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
HM76R1@
HM76R1@
INT.PD 20K
INT.PH 20K
3
BJ14
FDI_RXN0
AY14
FDI_RXN1
BE14
FDI_RXN2
BH13
FDI_RXN3
BC12
FDI_RXN4
BJ12
FDI_RXN5
BG10
FDI_RXN6
BG9
FDI_RXN7
BG14
FDI_RXP0
BB14
FDI_RXP1
BF14
FDI_RXP2
BG13
FDI_RXP3
BE12
FDI_RXP4
BG12
FDI_RXP5
BJ10
FDI_RXP6
DMI
FDI
DMI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_RXP7
FDI_INT
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
PCH_DPWROK
EC_SWI#
PCH_GPIO32
SUS_STAT#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PM_SLP_A#
PM_SLP_SUS#
H_PM_SYNC
FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
EC_SWI# <26 ,36>
T76 PADT76 PAD
32.768 KHz
CLK_EC <41>
PM_SLP_S5# <4 1>
PM_SLP_S4# <4 1>
PM_SLP_S3# <4 1>
T77 PADT77 PAD
T78 PADT78 PAD
H_PM_SYNC <5>
(PH)
2
RH128 0_0402_5%
RH128 0_0402_5%
1 2
@
@
1
PCH_RSMRST#PCH_DPWROK
Do not support DeepSX state
+RTCVCC
DSWVREN
RH150 330K_0402_5%RH150 330K_0402_5%
12
DSWVREN must be always pulled high to +RTCVCC
DSWVREN - Internal Deep Sleep 1.05V regulator H
::::
Enable
*
L
::::
Disable
Follow EC check list demand, but don't implement CLKRUN# this fuction
DH5
DH5
2 1
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
DH6
POK<47>
A A
5
DH6
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
4
21
PCH_RSMRST#PM_PWROK PCH_RSMRST#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH_DMI/FDI/PM
PCH_DMI/FDI/PM
PCH_DMI/FDI/PM
VFKTA
VFKTA
VFKTA
1
27 56Thursday, January 17, 2013
27 56Thursday, January 17, 2013
27 56Thursday, January 17, 2013
of
of
of
0.3
0.3
0.3
Page 28
CyberForum.ru
5
1 2
RH125 100K_040 2_5%RH125 100K_04 02_5%
D D
+3VS
RPH8
RPH8
1 8 2 7 3 6 4 5
2.2K_080 4_8P4R_5%
2.2K_080 4_8P4R_5%
RH142 2.2K_0402 _5%
RH142 2.2K_0402 _5%
RH144 2.2K_0402 _5%
C C
B B
RH144 2.2K_0402 _5%
1 2
RH154 150_0402 _1%
RH154 150_0402 _1%
CRT@
CRT@
1 2
RH156 150_0402 _1%
RH156 150_0402 _1%
CRT@
CRT@
1 2
RH152 150_0402 _1%
RH152 150_0402 _1%
CRT@
CRT@
CRT@
CRT@
CRT@
CRT@
EC_ENBK L
LCTL_CL K LCTL_DA TA LCD_EDID_ CLK LCD_EDID_ DATA
12
UMA_CRT _DATA
12
UMA_CRT _CLK
UMA_CRT _B
UMA_CRT _G
UMA_CRT _R
EC_ENBK L<2 2,41> LCD_ENV DD<22>
LCD_EDID_ CLK<22>
LCD_EDID_ DATA< 22>
LCD_TXC LK-<22> LCD_TXC LK+< 22>
LCD_TXO UT0-<22> LCD_TXO UT1-<22> LCD_TXO UT2-<22>
LCD_TXO UT0+<2 2> LCD_TXO UT1+<2 2> LCD_TXO UT2+<2 2>
UMA_CRT _B<23> UMA_CRT _G<23> UMA_CRT _R<23>
UMA_CRT _CLK<23> UMA_CRT _DATA<23>
UMA_CRT _HSYNC<23> UMA_CRT _VSYNC<23>
4
PCH_PW M<22 >
1 2
RH143 2.37K_040 2_1%RH143 2.37K_040 2_1%
RH138 1K_0402_ 0.5%
RH138 1K_0402_ 0.5%
CRT@
CRT@
RH138
RH138 1K_0402 _5%
1K_0402 _5%
NOCRT@
NOCRT@
EC_ENBK L LCD_ENV DD
PCH_PW M
LCD_EDID_ CLK LCD_EDID_ DATA
LCTL_CL K LCTL_DA TA
LVDS_IBG
UMA_CRT _B UMA_CRT _G UMA_CRT _R
UMA_CRT _CLK UMA_CRT _DATA
12
CRT_IREF
UH1D
UH1D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
INT.PD 20K
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
PANTHER -POINT_FCBGA989
PANTHER -POINT_FCBGA989
HM76R1@
HM76R1@
INT.PD 50 INT.PD 50
3
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AP43 AP45
AM42 AM40
AP39 AP40
P38 M39
AT49 AT47 AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
SDVO_TVCLKINN
INT.PD 50 INT.PD 50
LVDS
LVDS
CRT
CRT
SDVO_TVCLKINP
SDVO_STALLN
INT.PD 50 INT.PD 50
SDVO_STALLP
SDVO_INTN SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
INT.PD 20K
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPC_CTRLCLK
DDPC_CTRLDATA
INT.PD 20K
DDPC_AUXN DDPC_AUXP
DDPC_HPD
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
INT.PD 20K
DDPD_AUXN DDPD_AUXP
DDPD_HPD
2
UMA_HDM I_CLK < 24> UMA_HDM I_DATA <2 4>
HDMI_HPD HDMI_HPD
RH141 100K_04 02_5%RH141 100K_04 02_5%
RH255 100K_04 02_5%RH255 100K_04 02_5%
HDMI_HPD < 24,30>
UMA_HDM I_TX2- <24> UMA_HDM I_TX2+ < 24> UMA_HDM I_TX1- <24> UMA_HDM I_TX1+ < 24> UMA_HDM I_TX0- <24> UMA_HDM I_TX0+ < 24> UMA_HDM I_CLK- < 24> UMA_HDM I_CLK+ < 24>
12
12
HDMI
1
@
@
12
100K_04 02_5%
100K_04 02_5% RH254
RH254
A A
Security Class ification
Security Class ification
Security Class ification
2012/09/ 24 2013/09/ 24
2012/09/ 24 2013/09/ 24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/09/ 24 2013/09/ 24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PCH_CRT/LVDS/HDMI
PCH_CRT/LVDS/HDMI
PCH_CRT/LVDS/HDMI
VFKTA
VFKTA
VFKTA
1
0.3
0.3
0.3
28 56Thursday, January 17, 20 13
28 56Thursday, January 17, 20 13
28 56Thursday, January 17, 20 13
of
of
of
Page 29
CyberForum.ru
CLK_EC_R CLK_PCH CLK_PCI_DDR
4
UH1E
UH1E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3Tp1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
HM76R1@
HM76R1@
RSVD
RSVD
INT.PU 20K INT.PU 20K INT.PU 20K
INT.PU 20K
INT.PD 20K INT.PD 20K INT.PD 20K INT.PD 20K INT.PD 20K
PCI
PCI
INT.PD 20K
EHCI 1
EHCI 2
USB
USB
RSVD1 RSVD2 RSVD3 RSVD4
RSVD5 RSVD6
RSVD7 RSVD8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
RSVD23 RSVD24
RSVD25
RSVD26 RSVD27
RSVD28 RSVD29
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
5
D D
+3VS
C C
B B
RPH12
RPH12
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
8.2K_0804_8P4R_5%
RPH13
RPH13
1 8 2 7 3 6 4 5
8.2K_0804_8P4R_5%
8.2K_0804_8P4R_5%
RH17610K_0402_5% RH17610K_0402_5%
1 2
RH3058.2K_0402_5% R H3058.2K_04 02_5%
1 2
RH3068.2K_0402_5% R H3068.2K_04 02_5%
1 2
PCH_GPIO52 PCH_GPIO2 PCH_GPIO51 ODD_DA#
PCI_PIRQD# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC#
DGPU_PWR_EN
PCH_GPIO4
PCH_GPIO5
CLK_PCI_EC<41> CLK_PCILOOP<26>
ODD_DA#<34>
PLT_RST#<35,36,41,5>
1 2 1 2
T80 PADT80 PAD
T81 PADT81 PAD
U3RXDN1 U3RXDN2
U3RXDP1 U3RXDP2
U3TXDN1 U3TXDN2
U3TXDP1 U3TXDP2
RH16722_0402_5% EMI@ RH16722_0402_5% EMI@ RH1660_0402_5% @ R H1660_0402_5% @
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
DGPU_RST# PCH_GPIO52 DGPU_PWR_EN
PCH_GPIO51
PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5
PCI_PME#
PLT_RST#
U3RXDN1<38> U3RXDN2<38>
U3RXDP1<38> U3RXDP2<38>
U3TXDN1<38> U3TXDN2<38>
U3TXDP1<38> U3TXDP2<38>
DGPU_PWR_EN<17>
1
@RF@
@RF@
CH115
CH115
2
22P_0402_50V8J
22P_0402_50V8J
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AV10
AT8
AY5 BA2
AT12 BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
3
For Optimus
100K_0402_5%
100K_0402_5%
NV_ALE
Note: HM70 only enable USB port 0, 1, 2, 3, 8, 9, 10, 11
USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3
USB20_N8 USB20_P8 USB20_N9 USB20_P9
USB20_N11 USB20_P11
USBBIAS
USB_OC#0 USB_CHG_OC# USB_OC#2 SLP_CHG_CB1 SLP_CHG_CB0 USB_OC#5_7
USB20_N0 <38> USB20_P0 <38> USB20_N1 <38> USB20_P1 <38> USB20_N2 <36> USB20_P2 <36> USB20_N3 <37> USB20_P3 <37>
USB20_N8 <22> USB20_P8 <22> USB20_N9 <35> USB20_P9 <35>
USB20_N11 <22> USB20_P11 <22>
1 2
RH165 22.6_0402_1%RH165 22.6_0402_1%
Within 500 mils
USB_OC#0 <38,41> USB_CHG_OC# <26,38,41>
USB_OC#2 <36,41> SLP_CHG_CB1 <38> SLP_CHG_CB0 <27,38>
PLT_RST#
DGPU_RST#
RH173
RH173
1 2
USB-Right1
USB-Right2
USB-Left
CardReader
Touch Screen
BT
NFC
Int. Camera
USB-Right Rear USB-Right Front USB-Left
RH287
RH287
1K_0402_5%
1K_0402_5%
@
@
+3VS
12
1 2
2
RH175
RH175 10K_0402_5%
10K_0402_5%
1
2
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
2
CH12
CH12
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
1
+3VS
@
@
1 2
CH30 0.1U_0402_10V7K
CH30 0.1U_0402_10V7K
5
UH6
UH6
P
IN1
4
O
IN2
G
3
100K_0402_5%
100K_0402_5%
NV_ALE
PLTRST_VGA# <13>
RH288
RH288
12
Intel Anti-Theft Techonlogy
High=Endabled
Low=Disable(floating)
NV_ALE
OC#1 PH @ page 26 CB0 PH @ page 27
USB_OC#0 USB_OC#5_7 SLP_CHG_CB1 USB_OC#2
1 2
@
@
RH164 1K_0402_5%
RH164 1K_0402_5%
+3VALW_PCH
RPH11
RPH11
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
10K_0804_8P4R_5%
1
*
+1.8VS
Boot BIOS Strap
PCH_GPIO51
ESD@
ESD@
1 2
A A
ODD_DA#
CH105180P_0 402_50V8J
CH105180P_0 402_50V8J
12
PCH_GPIO51
RH2931K_0402_5% @ RH2931K_0402_5% @
12
PCH_GPIO19
RH2941K_0402_5% @ RH2941K_0402_5% @
PCH_GPIO19 <25>
PCH_GPIO19 Boot BIOS Loaction
0 0 1
0 1 0
1 1
LPC
Reserved
PCI
SPI
*
A16 Swap Override Strap
WL_OFF#
5
4
Low= A16 swap override Enable High= A16 swap override Disable
*
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH_PCI/USB/NAND
PCH_PCI/USB/NAND
PCH_PCI/USB/NAND
VFKTA
VFKTA
VFKTA
1
29 56Thursday, January 17, 2013
29 56Thursday, January 17, 2013
29 56Thursday, January 17, 2013
of
of
of
0.3
0.3
0.3
Page 30
CyberForum.ru
5
+3VALW _PCH
RH204 1K_0402_5%RH204 1K_0402_5%
D D
+3VS
RH178 200K_ 0402_5%RH178 200K _0402_5%
+3VS
C C
RH203 10K_0 402_5%
RH203 10K_0 402_5%
RH200 10K_0 402_5%
RH200 10K_0 402_5%
RH201 10K_0 402_5%
RH201 10K_0 402_5%
RH205 10K_0 402_5%
RH205 10K_0 402_5%
RH199 10K_0 402_5%
RH199 10K_0 402_5%
B B
12
1 2
RPH15
RPH15
1 8 2 7 3 6 4 5
10K_080 4_8P4R_5%
10K_080 4_8P4R_5%
GVDR@
GVDR@
12
269@
269@
12
259@
259@
12
GVSR@
GVSR@
12
12
@
@
EC_LID_OU T#
ODD_DET ECT#
PCH_GPIO3 4 PCH_GPIO1 6 EC_SCI# PCH_GPIO4 9
VRAM_DR _SR#
SM_DET
SM_DET
VRAM_DR _SR#
PCH_GPIO2 7
VRAM_DR_SR#
Follow Compal ORB and Intel Check list 460603 V1.5
GPIO28
On-Die PLL Voltage Regulator H: Enable
*
L: Disable
4
(PH)
EC_LID_OU T#< 41>
For Optimus
VGA_PW ROK<17 ,53>
PCH_GPIO2 8<26>
(PH)
ODD_DET ECT#<34>
PCH_GPIO3 7<27>
(PH)
OPTIMUS_E N#< 27>
(PH)
Single Rank
0
Daul Rank1
HDMI_HPD<24,28 >
EC_SCI#<41>
EC_SMI#<27,4 1>
HDMI_HPD
EC_SCI#
EC_LID_OU T#
PCH_GPIO1 6
VGA_PW ROK
VRAM_DR _SR#
PCH_GPIO2 7
PCH_GPIO3 4
ODD_DET ECT#
SM_DET
PCH_GPIO4 9
T7
A42
H36
E38
C10
C4
G2
U2
D40
T5
E8
E16
P8
K1
K4
V8
M5
N2
M3
V13
V3
D6
A4
A44
A45
A46
A5
A6
B3
B47
BD1
BD49
BE1
BE49
BF1
BF49
PANTHER -POINT_FCBGA989
PANTHER -POINT_FCBGA989
3
UH1F
UH1F
BMBUSY# / GPIO0
TACH1 / GPIO1
TACH2 / GPIO6
TACH3 / GPIO7
GPIO8
LAN_PHY_PWR_CTRL / GPIO12
GPIO15
SATA4GP / GPIO16
TACH0 / GPIO17
SCLOCK / GPIO22
GPIO24
GPIO27
GPIO28
STP_PCI# / GPIO34
GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
SLOAD / GPIO38
SDATAOUT0 / GPIO39
SDATAOUT1 / GPIO48
SATA5GP / GPIO49 / TEMP_ALERT#
GPIO57
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
HM76R1@
HM76R1@
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PD 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PD 20K
INT.PD 20K
GPIO
GPIO
INT.PH 20K
INT.PD 20K
INT.PH 20K
TACH4 / GPIO68
INT.PH 20K
TACH5 / GPIO69
INT.PH 20K
TACH6 / GPIO70
INT.PH 20K
TACH7 / GPIO71
INT.PD 350
PROCPWRGD
THRMTRIP#
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
NCTF
NCTF
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
A20GATE
PECI
RCIN#
INIT3_3V#
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
ODD_EN#
CPU_PGA _BGA#
SPK_DET
GATEA20
KB_RST#
H_PW RGOOD
PCH_THR MTRIP#
NV_CLE
2
ODD_EN# <43>
for common BIOS on PBA/BGA CP U
SPK_DET <4 0>
GATEA20 <41>
KB_RST# <41>
1 2
RH191 390_0402 _5%RH191 390_0402 _5%
This signal has weak internal pull-up, can't be pulled low
H_PW RGOOD < 5>
H_THERM TRIP# <5>
SM_DET BIOS setup
1
0
SPK_DET
DMI & FDI Termination Voltage
NV_CLE
NV_CLE
1
RPH16
RPH16
ODD_EN# GATEA20 KB_RST#
CPU_PGA _BGA#
1 8 2 7 3 6 4 5
10K_080 4_8P4R_5%
10K_080 4_8P4R_5%
RH202 10K_0 402_5%RH202 10K_0 402_5%
H_THERM TRIP#
12
@ESD@
@ESD@
1 2
CH1 100P_0402_ 50V8J
CH1 100P_0402_ 50V8J
by ESD requestion and place near CPU
Speaker Type
Harman/KardonS&M option
Non Harman
BOM
269@
259@
Non-Harman detection
ONKYO
0
Non-Brand1
Set to VCC when HIGH
Set to VSS when LOW
+1.8VS
12
RH187
RH187
2.2K_040 2_5%
2.2K_040 2_5%
RH189 1K_0402_5%RH189 1K_0402_5%
12
H_SNB_IVB # <5>
+3VS
OPTIMUS_EN#
GPIO8
Integrated Clock Chip Enable (Removed) H: Disable L: Enable
*
A A
OPTIMUS_EN#
SKU NonOPT
H L
Optimus
Integrated clock enable functionality is achieved by soft-strap The current default is clock enable
5
4
Security Class ification
Security Class ification
Security Class ification
2012/09/ 24 2013/09/ 24
2012/09/ 24 2013/09/ 24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/09/ 24 2013/09/ 24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PCH_CPU/GPIO
PCH_CPU/GPIO
PCH_CPU/GPIO
VFKTA
VFKTA
VFKTA
30 56Thursday, January 17, 20 13
30 56Thursday, January 17, 20 13
30 56Thursday, January 17, 20 13
1
0.3
0.3
0.3
of
of
of
Page 31
CyberForum.ru
5
+1.05VS_VCCP
D D
C C
10U_0603_6.3V6M
10U_0603_6.3V6M
B B
PJ4
@ PJ4
@
2
112
JUMP_43X79
JUMP_43X79
CH32
CH32
10U_0603_6.3V6M
10U_0603_6.3V6M
This pin can be left as NC if On-Die VR is enabled (Default)
+1.05VS_PCH
1
CH45
CH45
CH43
CH43
2
1U_0402_6.3V6K
1U_0402_6.3V6K
This pin can be left as NC if On-Die VR is enabled (Default)
1
CH33
CH33
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CH46
CH46
2
+3VS
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CH31
CH31
2
1
CH47
CH47
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CH34
CH34
2
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.05VS_PCH
1
CH44
CH44
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
CH50
CH50
0.1U_0402_10V7K
0.1U_0402_10V7K
2
+1.05VS_PCH
+VCCP_VCCDMI
+1.05VS_PCH +VCCA_DAC
1
2
T82PAD T82PAD
1
2
+VCCAFDI_VRM
T83PAD T83PAD
4
UH1G
UH1G
1730mA
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
HM76R1@
HM76R1@
3709mA
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
1mA
CRTLVDS
CRTLVDS
1mA
VCCTX_LVDS[1]
VCCTX_LVDS[2]
60mA
VCCTX_LVDS[3]
VCCTX_LVDS[4]
DMI
DMI
75mA
VCCDFTERM
VCCDFTERM[1]
VCCDFTERM[2]
190mA
VCCDFTERM[3]
VCCDFTERM[4]
DFT / SPI HVCMOS
DFT / SPI HVCMOS
20mA
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
0.01U_0402_25V7K
0.01U_0402_25V7K
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
3
0.01U_0402_25V7K
0.01U_0402_25V7K
+VCCA_LVDS
+VCCTX_LVDS
CH38
CH38
1
CH42
CH42
0.1U_0402_10V7K
0.1U_0402_10V7K
2
+VCCAFDI_VRM
+VCCP_VCCDMI
+1.05VS_VCC_DMI
1
CH51
CH51
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
CH53
CH53 1U_0402_6.3V6K
1U_0402_6.3V6K
2
CH35
CH35
0.01U_0402_25V7K
0.01U_0402_25V7K
+VCCP_VCCDMI
RH214 0_0402_5%
RH214 0_0402_5%
1
CH49
CH49 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+3VALW_PCH
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CH36
CH36
2
1 2
@
@
RH208 0_0402_5%
RH208 0_0402_5%
1
CH40
CH40 22U_0805_6.3V6M
22U_0805_6.3V6M
CH39
CH39
2
+3VS
+VCCAFDI_VRM
@
@
+1.8VS
+1.05VS_PCH
1 2
RH309
RH309
1 2
1_0603_1%
1_0603_1%
1
CH37
CH37 10U_0603_6.3V6M
10U_0603_6.3V6M
2
+3VS
RH221 0_0402_5%
RH221 0_0402_5%
1 2
+VCCA_DAC_R
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
@
@
RH213 0_0402_5%
RH213 0_0402_5%
1
CH48
CH48 1U_0402_6.3V6K
1U_0402_6.3V6K
2
LH2
LH2
1 2
@
@
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
12
+1.5VS
LH1
LH1
12
+1.8VS
+1.05VS_VCCP
2
+3VS
PCH Power Rail Table Refer to PCH EDS R1.0
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
5
5
3.3
3.3
1.05
1.05
1.05
1.1
S0 Iccmax Current (A)
0.001
0.001
0.001
0.228
0.063
0.08
0.08
1.7
0.047
1
1.05VccIO 3.711
1.05VccASW 0.903
3.3VccSPI 0.01
3.3VccDSW 0.001
1.8 0.002VccDFTERM
3.3VccRTC N/A
3.3VccSus3_3
3.3VccSusHDA
0.095
0.01
VccVRM 1.5 0.167
1.05VccCLKDMI
0.07
VccSSC 1.05 0.095
VccDIFFCLKN 1.0 5 0.055
VccALVDS 3.3
0.001
1.8VccTX_LVDS 0.04
+3VALW to +3VALW_PCH
+3VALW
A A
PCH_PWR_EN#<32,43>
PCH_PWR_EN#
5
12
RH3 47K_0402_5%RH3 47K_0402_5%
@ PJ2
@
2
JUMP_43X39
JUMP_43X39
QH2
QH2 AO3413_SOT23
AO3413_SOT23
S
S
G
G
1
CH1110.1U_0402_25V 6 CH1110.1U_0402_25V6
2
PJ2
112
D
D
13
2
CH1120.01U_0402_25V7K CH1120 .01U_0402_25V7K
CH1130.1U_0402_10V7K CH1130.1U _0402_10V7K
1
2
4
+3VALW_PCH
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH_POWER-1
PCH_POWER-1
PCH_POWER-1
VFKTA
VFKTA
VFKTA
1
31 56Thursday, January 17, 2013
31 56Thursday, January 17, 2013
31 56Thursday, January 17, 2013
of
of
of
0.3
0.3
0.3
Page 32
CyberForum.ru
5
+3VS
LH5
LH5
1 2
10UH_LB2012T100MR_20%
10UH_LB2012T100MR_20%
D D
C C
+1.05VS_PCH
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
B B
1
CH73
CH73 10U_0603_6.3V6M
10U_0603_6.3V6M
2
LH7
LH7
1 2
LH8
LH8
1 2
+3VS_VCC_CLKF33
1
CH74
CH74 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VS_VCCADPLLB
1
CH94
CH94
CH93
CH93
1U_0402_6.3V6K
1U_0402_6.3V6K
2
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.05VS_VCCADPLLA
1
CH95
CH95
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
+3VALW_PCH
+1.05VS_PCH
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CH96
CH96 1U_0402_6.3V6K
1U_0402_6.3V6K
2
0.1U_0402_10V7K
0.1U_0402_10V7K
+1.05VS_PCH
Place CH79 near pin AF17
1U_0402_6.3V6K
+1.05VS_PCH +1.05VS_VCCDIFFCLKN
A A
RH247 0_0402_5%
RH247 0_0402_5%
1 2
@
@
+1.05VS_VCCDIFFCLKN
1
CH81
CH81 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+1.05VS_VCCP
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1U_0402_6.3V6K
+1.05VS_PCH
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CH87
CH87
CH86
CH86
2
CH84
CH84
Place CH86, CH87 , CH88 near pin BJ8
4
This pin can be left as NC if On-Die VR is enabled (Default)
1
CH55
CH55
0.1U_0402_10V7K
0.1U_0402_10V7K
2
+1.05VS_PCH
1
CH65
CH65
CH64
CH64
22U_0805_6.3V6M
22U_0805_6.3V6M
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CH69
CH68
CH68
1U_0402_6.3V6K
1U_0402_6.3V6K
2
+VCCRTCEXT
1
+VCCAFDI_VRM
2
+1.05VS_VCCADPLLA
+1.05VS_VCCADPLLB
+1.05VS_VCCDIFFCLKN
+VCCSST
1
0.1U_0402_10V7K
0.1U_0402_10V7K
CH85
CH85
2
+RTCVCC
CH69
CH67
CH67
2
CH78
CH78
1
CH79
CH79
2
1
2
1
1
CH88
CH88
0.1U_0402_10V7K
0.1U_0402_10V7K
2
2
+3VS_VCC_CLKF33
1
2
1
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CH90
CH90
2
UH1J
UH1J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
1mA
BJ8
V_PROC_IO
A22
VCCRTC
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
3mA
1010mA
80mA 80mA
55mA
95mA
HM76R1@
HM76R1@
POWER
POWER
3
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
+PCH_V5REF_SUS
+PCH_V5REF_RUN
+VCCAFDI_VRM
VCCSUS3_3[7]
119mA
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
1mA
VCCSUS3_3[1]
1mA
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
VCCAPLLSATA
SATA USB
SATA USB
VCCASW[22]
VCCASW[23]
10mA
HDA
HDA
VCCASW[21]
VCCSUSHDA
CPURTC
CPURTC
+1.05VS_PCH
1
CH56
CH56 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+3VALW_PCH
1
CH60
CH60
0.1U_0402_10V7K
0.1U_0402_10V7K
2
+1.05VS_PCH
1 2
CH66 0.1U_0402_10V7KCH66 0.1U_0402_10V7K
1 2
CH75
CH75
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
1
CH92
CH92
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
2
+3VALW_PCH
+3VALW_PCH
1
CH70
CH70 1U_0402_6.3V6K
1U_0402_6.3V6K
2
+3VS
+3VS
CH76
CH76
0.1U_0402_10V7K
0.1U_0402_10V7K
This pin can be left as NC if On-Die VR is enabled (Default)
+VCCAFDI_VRM
+1.05VS_PCH
+3VALW_PCH
+3VALW_PCH
CH61
CH61
0.1U_0402_10V7K
0.1U_0402_10V7K
+3VS
1
CH72
CH72
0.1U_0402_10V7K
0.1U_0402_10V7K
2
+1.05VS_PCH
1
CH82
CH82 1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
1
RH328
PCH_PWR_EN#<31,43>
RH328
47K_0402_5%
47K_0402_5%
2
12
Change RH232, RH237 to 10 ohm by follow Compal ORB abd Intel CRB
10_0402_5%
10_0402_5%
10_0402_5%
10_0402_5%
+1.05VS_PCH
1
CH77
CH77 1U_0402_6.3V6K
1U_0402_6.3V6K
2
Place CH77 near pin AF13, AH13, AH14, AF14
Place CH82 near pin AC16, AC17, AD17
JUMP_43X39
JUMP_43X39
PJ5
@ PJ5
@
2
112
QH6
QH6
AO3413_SOT23
AO3413_SOT23
D
S
D
S
13
G
G
2
CH80
CH80
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+5VALW_PCH +3VALW_PC H
12
RH232
RH232
+5VS +3VS
12
RH237
RH237
1
+5VALW_PCH+5VALW
1
CH59
CH59
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
21
DH3
DH3
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
+PCH_V5REF_SUS
1
CH63
CH63
0.1U_0402_10V7K
0.1U_0402_10V7K
2
CH63 & CH71 are different by Intel CRB.
21
DH4
DH4
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
+PCH_V5REF_RUN
1
CH71
CH71 1U_0402_6.3V6K
1U_0402_6.3V6K
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PCH_POWER-2
PCH_POWER-2
PCH_POWER-2
VFKTA
VFKTA
VFKTA
1
32 56Thursday, January 17, 2013
32 56Thursday, January 17, 2013
32 56Thursday, January 17, 2013
0.3
0.3
0.3
of
of
of
Page 33
CyberForum.ru
AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28
4
5
UH1H
UH1H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
D D
C C
B B
A A
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
PANTHER-POINT_FCB GA989
PANTHER-POINT_FCB GA989
HM76R1@
HM76R1@
VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]
3
UH1I
UH1I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
PANTHER-POINT_FCB GA989
PANTHER-POINT_FCB GA989
HM76R1@
HM76R1@
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
2
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PCH_GND
PCH_GND
PCH_GND
VFKTA
VFKTA
VFKTA
33 56Thursday, January 17, 2013
33 56Thursday, January 17, 2013
33 56Thursday, January 17, 2013
1
0.3
0.3
0.3
of
of
of
Page 34
CyberForum.ru
A
SATA HDD Conn.
JHDD
JHDD
True
1 1
23
GND
24
GND
SUYIN_127043FR022G196ZR
SUYIN_127043FR022G196ZR
@
@
GND
GND
GND
GND GND GND
GND
DAS/DSS
GND
1 2
A+
A-
B-
B+
V33 V33 V33
V5 V5 V5
V12 V12 V12
SATA_PTX_C_DRX_P0
3
SATA_PTX_C_DRX_N0
4 5
SATA_PRX_DTX_N0
6
SATA_PRX_DTX_P0 SATA_PTX_C_DRX_N2
7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
Close to JHDD
1 2
C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K
1 2
C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K
1 2
C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K
1 2
C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K
+3VS
+5VS
+5VS
Place closely JHDD SATA CONN.
1.2A
1
C356
C356
10U_0805_10V4Z
10U_0805_10V4Z
2
1
C357
C357
0.1U_0402_10V7K
0.1U_0402_10V7K
2
B
SATA_PTX_DRX_P0 <25> SATA_PTX_DRX_N0 <25>
SATA_PRX_C_DTX_N0 <25>
SATA_PRX_C_DTX_P0 <25>
1
C358
C358
0.1U_0402_10V7K
0.1U_0402_10V7K
2
SATA ODD Conn
15
GND
14
GND
SANTA_202401-1
SANTA_202401-1
@
@
C
JODD
JODD
GND
GND
GND
GND GND
1 2 3 4 5 6 7
8 9 10 11 12 13
SATA_PTX_C_DRX_P2
SATA_PRX_DTX_N2 SATA_PRX_DTX_P2
+5VS_ODD
A+
A-
B-
B+
DP +5V +5V
MD
Close to JODD
1 2
C376 0.01U_0402_ 25V7KC376 0.01U_0402_25V7K
1 2
C377 0.01U_0402_ 25V7KC377 0.01U_0402_25V7K
1 2
C378 0.01U_0402_ 25V7KC378 0.01U_0402_25V7K
1 2
C375 0.01U_0402_ 25V7KC375 0.01U_0402_25V7K
ODD_DETECT# <30>
ODD_DA# <29>
D
+5VS_ODD
1
2
SATA_PTX_DRX_P2 <25> SATA_PTX_DRX_N2 <25>
SATA_PRX_C_DTX_N2 <25>
SATA_PRX_C_DTX_P2 <25>
Place components closely ODD CONN.
C355
C355
10U_0805_10V4Z
10U_0805_10V4Z
1
C360
C360
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
C380
C380
0.1U_0402_10V7K
0.1U_0402_10V7K
2
E
Power Consumption
Peak 1800 mA Read (CD) 1100 mA Read (DVD) 950 mA Write 1300 mA Standby 20mA
G-Sensor
2 2
+5VS +3VS_HDP
1
CG12
CG12
1U_0402_6.3V6K
1U_0402_6.3V6K
GSENSOR@
GSENSOR@
3 3
4 4
2
+3VS_HDP
UG3
GSENSOR@UG3
GSENSOR@
1
VIN
VOUT
2
GND
3
SHDN#
BP
G9191-330T1U_SOT23-5
G9191-330T1U_SOT23-5
SA000022I00
RPG1
RPG1
1 8 2 7 3 6 4 5
4.7K_8P4R_5%
4.7K_8P4R_5%
GSENSOR@
GSENSOR@
5
4
+3VS_HDP_R GXOUT GXIN +3VS_HDP_M
1
CG13
CG13
1U_0402_6.3V6K
1U_0402_6.3V6K
GSENSOR@
GSENSOR@
2
HDPINT<41>
HDPINT
+3VS_HDP
SELF_TEST
+3VS_HDP
EC_SMB_CK2<13,26,41>
SELF_TEST
+3VS_HDP_R
GXOUT
GXIN
+3VS_HDP
+3VS_HDP_M
RG7 1K_0402_5%
RG7 1K_0402_5%
GSENSOR@
GSENSOR@
CG7
CG7
0.1U_0402_10V7K
0.1U_0402_10V7K
GSENSOR@
GSENSOR@
12
UG1
2
12
4 6 8
9
TSH352TR LGA 16P
TSH352TR LGA 16P
SA00004GB00
1
1
CG8
CG8
GSENSOR@
GSENSOR@
0.1U_0402_10V7K
0.1U_0402_10V7K
2
2
GSENSOR@UG1
GSENSOR@
3
VOUTX
Vdd1 Vdd2
ST PD FS
Rev
Voutx
5
Vouty
7
Voutz
10
NC1
11
NC2
14
NC3
15
NC4
16
NC5
1
GND1
13
GND2
UG2
UG2
1
P3_5/SSCK/SCL/CMP1_2
2
P3_7/CNTR0#/SSO/TXD1
3
RESET#
4
XOUT/P4_7
5
VSS/AVSS
6
XIN/P4_6
7
VCC/AVCC
8
MODE
9
P4_5/INT0#/RXD1
10
P1_7/CNTR00/INT10#
R5F211B4D34SP GSENSOR@
R5F211B4D34SP GSENSOR@
VOUTY VOUTZ
SA00003A600
CG1 0.033U_0402_16V7KGSENSOR@CG1 0.033U_0402_16V7KGSENSOR@ CG2 0.033U_0402_16V7KGSENSOR@CG2 0.033U_0402_16V7KGSENSOR@ CG3 0.033U_0402_16V7KGSENSOR@CG3 0.033U_0402_16V7KGSENSOR@
1 2 1 2 1 2
P1_6/CLK0/SSI01
P1_5/RXD0/CNTR01/INT11#
P1_4/TXD0
P1_3/KI3#/AN11/TZOUT
P1_2/KI2#/AN10/CMP0_2
P4_2/VREF
P1_1/KI1#/AN9/CMP0_1
P1_0/KI0#/AN8/CMP0_0
P3_3/TCIN/INT3#/SSI00/CMP1_0
P3_4/SCS#/SDA/CMP1_1
11
12
13
14
15
VOUTZ
16
17
VOUTX
18
VOUTY
19
20
RG9
RG9 47K_0402_5%
47K_0402_5%
GSENSOR@
GSENSOR@
1 2
HDPACT <41>
HDPLOCK <41>
RG10 47K_0402_5%
RG10 47K_0402_5%
12
GSENSOR@
GSENSOR@
+3VS_HDP
1
CG6
CG6
0.1U_0402_10V7K
0.1U_0402_10V7K
GSENSOR@
GSENSOR@
2
EC_SMB_DA2 <13,26,41>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
HDD/ODD/G-Sensor
HDD/ODD/G-Sensor
HDD/ODD/G-Sensor
VFKTA
VFKTA
VFKTA
E
0.3
0.3
0.3
of
34 56Thursday, January 17, 2013
of
34 56Thursday, January 17, 2013
of
34 56Thursday, January 17, 2013
Page 35
CyberForum.ru
A
B
C
D
E
Slot 1 Half PCIe Mini Card-WLAN
40 mils
+3V_WLAN
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
CM2
CM2
CM1
CM1
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1
1
CM3
CM3
2
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
From EC
JWLAN
To EC (Need pull-up +3VL)
To PCH
To PCH
WLAN/ WiFi
2 2
To PCH
WLAN_WAKE#<41>
1 2
RM24
RM24
+3V_WLAN
0_0402_5%@
0_0402_5%@
E51_TXD E51_RXD
BT_CTRL_R
BT_ON
CLKREQ_WLAN#< 26>
CLK_WLAN#<26> CLK_WLAN<26>
PCIE_PRX_WLANTX_N2<26> PCIE_PRX_WLANTX_P2<26>
PCIE_PTX_C_WLANRX_N2<26> PCIE_PTX_C_WLANRX_P2<26>
E51_TXD<41>
E51_RXD<41 >
Debug card using
JWLAN
1
1
3
3
5
5
7
7 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152
GND153GND2
LOTES_AAA-PCI-049-P06-A
LOTES_AAA-PCI-049-P06-A
2
2
4
4
6
6
8
8
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
@
@
+3V_WLAN
LED_WIMAX#
RM6 100K_0402 _5%RM6 10 0K_0402_5%
To EC
WL_OFF# <41> PLT_RST# <29,36,41,5>
To PCH
PM_SMBCLK <11,12,26,42> PM_SMBDATA <11,12,26,42>
USB20_N9 <29> USB20_P9 <29>
LED_WIMAX# <42>
1 2
WiMax/ BT
+3VS
WLAN&BT Combo mo dule circuits
BT on module
Enable Disable
BT_ON
BT_ON<41>
To EC
H L
For isolate BT_ON and Compal Debug Card.
WOWL@
WOWL@
WOWL_EN#<41>
RM2
RM2
100K_0402_5%
100K_0402_5%
+3VALW
BT on module
1 2
RM27
RM27
1K_0402_5%
1K_0402_5%
12
RM31
RM31 10K_0402_5%
10K_0402_5%
1 2
47K_0402_5%
47K_0402_5%
RM30
RM30
12
WOWL@
WOWL@
E51_RXDBT_ON
+3VALW TO +3V_WLAN for WOWL
+3VALW
WOWL@
WOWL@
2
CM9
CM9
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
WOWL@
WOWL@
CM10
CM10
0.01U_0402_25V7K
0.01U_0402_25V7K
1
Vgs=-4.5V,Id=3A,Rds<97mohm
S
S
G
G
2
AO3413_SOT23
AO3413_SOT23 QM2
QM2
D
D
1 3
WOWL@
WOWL@
If system don't support WOWL
+3V_WLAN
1 2
0_0603_5%
0_0603_5%
RM1
RM1
NOWOWL@
NOWOWL@
+3VS
+3VL +1.05VS_VCCP+3V_LAN +3VS_DGPU +3VALW
1
CCL1
CCL1
GCLK@
GCLK@
3 3
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CCL2
CCL2
@
@
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CCL3
CCL3
GCLK@
GCLK@
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CCL6
CCL6
GCLK@
GCLK@
2
0.1U_0402_10V7K
0.1U_0402_10V7K
for safety reque st
+3VALW
+3VS_DGPU
+3V_LAN
+1.05VS_VCCP
GCLK@
GCLK@
YCL1 25MHZ 12PF X3G025000DK1H -X
YCL1 25MHZ 12PF X3G025000DK1H -X
1
1
4 4
1
CCL9
CCL9 18P_0402_50V8J
18P_0402_50V8J
GCLK@
GCLK@
2
GND
2
3
CLK_X2CLK_X1
3
GND
4
A
1
CCL12
CCL12 18P_0402_50V8J
18P_0402_50V8J
GCLK@
GCLK@
2
+RTC
+3VL
1
CCL8
CCL8
GCLK@
GCLK@
2
0.1U_0402_10V7K
0.1U_0402_10V7K
22U_0805_6.3V6M
22U_0805_6.3V6M
RCL4
RCL4
120_0603_5%
120_0603_5%
12
+RTCGCLK
GCLK@
GCLK@
1 2
@
@
RCL5 0_0402_5%
RCL5 0_0402_5%
CLK_X1 CLK_X2
PN: SA000063300
1
CCL7
CCL7
GCLK@
GCLK@
+3V_LAN_R
UCL1
2
10
15
2
8
3
1
16
SLG3NB304VTR_TQFN16_2X3
SLG3NB304VTR_TQFN16_2X3
B
GCLK@UCL1
GCLK@
VBAT
VDD_RTC_OUT
+V3.3A
VDD
VDDIO_27M1127MHz
VDDIO_25M_A
VDDIO_25M_B
XTAL_IN XTAL_OUT
4
GND1
GND2
7
32kHz
25MHz_A
25MHz_B
GND3
13
1
CCL11
CCL11
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
GCLK@
GCLK@
2
14
9
12
6
5
GND4
17
GCLK@
GCLK@
1 2
VGA_X1_R
RCL3 22_0402_5%
RCL3 22_0402_5%
LAN_X1_R_R
22 ohm for NV chip
PCH_X1_R_R
PCH_RTCX1_R <25>
VGA_X1 <13 >
Security Classif ication
Security Classif ication
Security Classif ication
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
LAN_X1_R_R
PCH_X1_R_R
2012/09/24 2013/0 9/24
2012/09/24 2013/0 9/24
2012/09/24 2013/0 9/24
1 2
@
@
RCL2 0_0402_5%
RCL2 0_0402_5%
1 2
@
@
RCL1 0_0402_5%
RCL1 0_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered D ate
Deciphered D ate
Deciphered D ate
LAN_X1_R <36>
PCH_X1_R <26>
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
WLAN/GCLK
WLAN/GCLK
WLAN/GCLK
VFKTA
VFKTA
VFKTA
Thursday, January 17, 20 13
Thursday, January 17, 20 13
Thursday, January 17, 20 13
E
of
35 56
of
35 56
of
35 56
0.3
0.3
0.3
Page 36
CyberForum.ru
A
Left USB 2.0 x 1
B
C
D
E
OUT OUT OUT OCB
@
@
W=80mils
+USB_VCCC
6 7
CR38 1000P_0402_50V7K
CR38 1000P_0402_50V7K
8 5
WOL_EN#
Sx Enable Wake up
LOW
For EMI
@EMI@
@EMI@
12
USB_OC#2 <29,41>
WOL_EN# <41>
Sx Disable Wake up
HIGH
HIGH
JLAN
JLAN
+3V_LAN
PLT_RST#<29,35,41,5>
EC_SWI#<26,27>
LAN_X1_R<35>
CLK_LAN#<26> CLK_LAN<26>
PCIE_PTX_C_LANRX_N1<26>
PCIE_PTX_C_LANRX_P1<26> PCIE_PRX_C_LANTX_N1<26> PCIE_PRX_C_LANTX_P1<26>
+USB_VCCC
LANCLK_REQ# ISOLATE#
USB20_P2_L USB20_N2_L
W=80mils
1
1
2
2 2
3
3
4
4 4
5
5
6
6 6
7
7
8
8 8
9
9
10
10 10
11
11
12
12 12
13
13
14
14 14
15
15
16
16 16
17
17
18
18 18
19
19
20
20 20
21
G1
22
G2
23
G3
24
G4
ACES_50559-02001-001
ACES_50559-02001-001
@
@
S0
+5VALW
LR1
EMI@ LR1
EMI@
USB20_P2<29>
1 1
USB20_N2<29>
USB20_P2
USB20_N2
2
2
3
3
WCM-2012-900T_0805
WCM-2012-900T_0805
For LAN function
+3VS
RL24 10K_0402_5%RL24 10K_0402_5%
2 2
LAN_EN<26>
CLKREQ_LAN#<26>
12
LAN_EN
CLKREQ_LAN#
LANCLK_REQ#
2
1 3
D
D
QL53
QL53
2N7002KW_SOT323-3
2N7002KW_SOT323-3
G
G
S
S
1
1
4
4
LANCLK_REQ#
USB20_P2_L
USB20_N2_L
USB_EN#2< 41>
USB_EN#2
+3VS
12
1K_0402_5%
1K_0402_5% RL6
RL6
@
@
ISOLATE#
RL7
RL7
15K_0402_5%
15K_0402_5%
2.0A
UR1
UR1
2
IN
3
IN
4
EN/ENB
1
GND
SY6288DCAC_MSOP8
SY6288DCAC_MSOP8
SA00004KB00 SA00003TV00
1 2
RL433 0_0 402_5%
RL433 0_0 402_5%
WOL_EN#
PJ29
@ PJ29
@
+3VALW_PCH +3V_LAN
2
JUMP_43X39
JUMP_43X39
112
3 3
LAN WOL LAN_EN ISOLATEB S0 Sx S0 Sx
---------------------------------------------­ 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*
* S3: after SUSP# assert low over 100ms S4/S5: after SYSON assert low over 100ms
4 4
Security Classification
Security Classification
+3V_LAN rising time (10%~90%) need > 1ms and <100ms.
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2011/12/14 2012/12/31
2011/12/14 2012/12/31
2011/12/14 2012/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
LUSB20/LAN conn.
LUSB20/LAN conn.
LUSB20/LAN conn.
VFKTA
VFKTA
VFKTA
E
0.3
0.3
36 56Thursday, January 17, 2013
36 56Thursday, January 17, 2013
36 56Thursday, January 17, 2013
0.3
of
of
of
Page 37
CyberForum.ru
5
D D
4
3
2
1
CW8
CW8
0.1U_0402_16V4Z
0.1U_0402_16V4Z
For power consumption measurement and remove it after Pre-MP phase
30mils
+3VS
1 2
RW1
RW1
0_0402_5%
0_0402_5%
1
CW1
CW1
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2
USB20_N3<29> USB20_P3<29>
+VCC_3IN1
30mils
please close the pin19 of UW1
+3VS_CR
C C
30mils
please close the pin4 of UW1
+3VS_CR
30mils
CW3
CW3
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
B B
+3VS_CR
1
CW2
CW2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
CW4
CW4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+3VS_CR
1
2
CW5
CW5
0.1U_0402_16V4Z
0.1U_0402_16V4Z
De-coupling and Bulk capacitor should place near to Cardreader chip and Combo Socket
@ JC ARD
@
12
GND_SW
13
GND_SW
"Normal Close" type connector
1
UW1
UW1
2
22
RSTZ
2
DM
3
DP
1
+3VS_CR
+3VS_CR
+3VS_CR +VDD18
12mils
1
2
DVDD
24
PMOS
19
DVDD
23
DVDD
20
GPIO0
4
AVDD
18
VDD18
25
Thermal pad
GL834L-OGY01_QFN24_4X4
GL834L-OGY01_QFN24_4X4
< 2 in 1 Card Reader >
JCARD
VDD CMD
CLK VSS VSS
DAT0 DAT1 DAT2
CD/DAT3
WP_SW
CD_SW
T-SOL_156-2000302604
T-SOL_156-2000302604
5 3 6 7 4
8 9 1 2
10 11
MS_INS SD_D2/MS_D5/SB13 SD_D3/MS_D4/SB12
SD CMD/SD_CMD
SD CLK/SD_CLK
SD_CDZ SD_D0/MS_D6/SB9 SD_D1/MS_D7/SB8
MS BS/MS_BS
SD_WP/MS_D1/SB5
SD_D4/MS_D0/SB4 SD_D5/MS_D2/SB3 SD_D6/MS_D3/SB1
SD_D7/MS_CLK/SB0
SDCMD SDCLK_R
SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3
SDWP# SDCD
5 17
SD_DATA2
16
SD_DATA3
15
SDCMD
14
SDCLK
21
SDCD#
13
SD_DATA0
12
SD_DATA1
11 10
SDWP+3VS_CR
9 8 7 6
Close to connector
For EMI request
1 2
RW2
RW2
0_0402_5%
0_0402_5%
EMI@
EMI@
NC (default)
Power saving mode
1
CW6
CW6
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
For normal close type connector invert circuit
2
1
Close to IC
1
CW7
CW7
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2
SDCLK_R
CW9
@EMI@CW9
@EMI@
10P_0402_50V8J
10P_0402_50V8J
10K pull down
Normal modeGPIO0
+VCC_3IN1
30mil
WP_SWCD_SW
Card Uninsertion
Card Insertion
A A
5
4
Close
Open CloseOpen
Protect disable Protect Enable
Close
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
Close
Compal Secret Data
Compal Secret Data
2012/10/26 2013/10/26
2012/10/26 2013/10/26
2012/10/26 2013/10/26
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+3VS_CR +3VS_CR
RW3
RW3 100K_0402_5%
100K_0402_5%
SDCD
12
2
G
G
2
QW1A
QW1A
61
S
S
SDCD#
D
D
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
RW4
RW4 100K_0402_5%
100K_0402_5%
5
SDWP#
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
USB-CardReader GL834L
USB-CardReader GL834L
USB-CardReader GL834L
VFKAA
VFKAA
VFKAA
G
G
QW1B
QW1B
S
S
1
SDWP
34
D
D
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
0.3
0.3
37 56Thursday, January 17, 2013
37 56Thursday, January 17, 2013
37 56Thursday, January 17, 2013
0.3
of
of
of
Page 38
CyberForum.ru
RR2
RR2
4
14641@
14641@
0_0402_ 5%
0_0402_ 5%
EC_SMB_C K1<41, 45,46>
EC_SMB_D A1<41, 45,46>
USB20_N1 _S USB20_P 1_S
CHG_CB1
UR2
1
CEN
2
DM
3
DP
4
CB1
9
PGND
MAX1464 1ETA-TGH7_TDFN8
MAX1464 1ETA-TGH7_TDFN8
QR1A
QR1A
6 1
2N7002K DWH_SOT363 -6
2N7002K DWH_SOT363 -6
14640@
14640@
2N7002K DWH_SOT363 -6
2N7002K DWH_SOT363 -6
14641@UR2
14641@
CB0 TDM TDP VCC
+3VALW
QR1B
QR1B
3 4
14640@
14640@
8
CHG_CB0
7 6 5
1
CR9
CR9
0.1U_040 2_10V7K
0.1U_040 2_10V7K
2
+3VALW
RR3
RR3
4.7K_04 02_5%
4.7K_04 02_5%
2
14640@
14640@
5
1 2
Right front USB3.0 Conn.
Right front USB3.0 Conn.
Right front USB3.0 Conn.Right front USB3.0 Conn.
(Support S&C function)
(Support S&C function)
(Support S&C function)(Support S&C function)
5
UR2
UR2
Address 0x35
MAX1464 0ETA+TGH7
MAX1464 0ETA+TGH7
14640@
14640@
D D
Right rear USB3.0 Conn.
Right rear USB3.0 Conn.
Right rear USB3.0 Conn.Right rear USB3.0 Conn.
LR6
USB20_N0<29 >
USB20_P 0<29>
C C
U3RXDP1<29>
U3RXDN1<29>
1 2
U3TXDP1<29>
U3TXDN1<29>
U3TXDP1_C
CR15 0.1U_0 402_10V7 KCR1 5 0.1U_0402 _10V7K
1 2
U3TXDN1_C
CR14 0.1U_0 402_10V7 KCR1 4 0.1U_0402 _10V7K
2
2
3
3
WCM-201 2-900T_0805
WCM-201 2-900T_0805
LR2
1
1
4
4
KINGCORE WCM-2012HS -670T
KINGCORE WCM-2012HS -670T
LR5
1
1
4
4
KINGCORE WCM-2012HS -670T
KINGCORE WCM-2012HS -670T
CHG_PW R_GATE#<41>
SLP_CHG_ CB1<29>
EMI@LR6
EMI@
1
USB20_N0 _R
1
4
USB20_P 0_R
4
EMI@LR2
EMI@
2
U3RXDP1_ L
2
3
U3RXDN1_L
3
EMI@LR5
EMI@
2
U3TXDP1_C_ L
2
3
U3TXDN1_C_L
3
0_0402_ 5%
0_0402_ 5%
14641@
14641@
USB20_N1 <29> USB20_P 1 <29 >
+5VALW
RR4
RR4
4.7K_04 02_5%
4.7K_04 02_5%
14640@
14640@
1 2
CHG_CB1
CHG_CB0
3
RR1
RR1
SLP_CHG_ CB0 <27, 29>
U3TXDP2<29>
U3TXDN2<29>
2
USB Sleep & Charge
State table for MAX14641
CB0 STATUS
0
0
1
1 1
U3RXDP2<29>
U3RXDN2<29>
1 2
U3TXDP2_C
CR17 0.1U_ 0402_10V 7KCR1 7 0.1U_040 2_10V7K
1 2
U3TXDN2_C
CR16 0.1U_ 0402_10V 7KCR1 6 0.1U_040 2_10V7K
CB1
1
0
USB20_P 1_S USB20_P 1_R
0
LR7
2
2
3
3
WCM-201 2-900T_0805
WCM-201 2-900T_0805
LR3
1
1
4
4
KINGCORE WCM-2012HS -670T
KINGCORE WCM-2012HS -670T
LR4
1
1
4
4
KINGCORE WCM-2012HS -670T
KINGCORE WCM-2012HS -670T
Mode
2A auto-detection charger mode for Apple device.
AM2
Resistor dividers are connected to DP/DM. Including DCP
Forced 1A charger mode for Apple devices.
AP1
Resistor dividers are connected to DP/DM.
USB pass-through mode.DP/DM are connected to TDP/TDM
PM
USB pass-through mode with CDP emulation.
CM
Auto connects DP/DM to TDP/TDM depending on CDP detection status.
EMI@LR7
EMI@
1
USB20_N1 _RUSB20_N1_S
1
4
4
EMI@LR3
EMI@
2
U3RXDP2_ L
2
3
U3RXDN2_L
3
EMI@LR4
EMI@
2
U3TXDP2_C_ L
2
3
U3TXDN2_C_L
3
1
W=80mils
2.0A
UR4
B B
USB_EN#0<41>
U3TXDP1_C_ L
U3TXDN1_C_L
U3RXDP1_ L
U3RXDN1_L
A A
UR4
2
IN
3
IN
4
EN/ENB
1
GND
SY6288DCA C_MSOP8
SY6288DCA C_MSOP8
SA00004KB00 SA00003TV00
D3
D3
1
2
4
5
3
TVWDF100 4AD0_DFN9
TVWDF100 4AD0_DFN9
5
+USB_VCCB+5VALW +USB_VCCA+5VALW
6
OUT
7
OUT
8
OUT
5
OCB
@ESD@
@ESD@
9
U3TXDP1_C_ L
8
U3TXDN1_C_L
7
U3RXDP1_ L
6
U3RXDN1_L
U3TXDP1_C_ L U3TXDN1_C_L
U3RXDP1_ L U3RXDN1_L
USB20_P 0_R USB20_N0 _R
+USB_VCCB
0.1U_040 2_10V7K
0.1U_040 2_10V7K
CR12
CR12
1 2
47U_080 5_6.3V6M
47U_080 5_6.3V6M
1
1
CR13
CR13
CR7
CR7
@
@
2
2
4.7U_060 3_6.3V6K
4.7U_060 3_6.3V6K
JUSBR
9
StdA-SSTX+
8
StdA-SSTX-
7
GND-DRAIN
6
StdA-SSRX+
5
StdA-SSRX-
4
GND
3
D+
2
D-
1
VBUS
LOTES_AUS B0015-P00 1A
LOTES_AUS B0015-P00 1A
4
1000P_0 402_50V7 K
1000P_0 402_50V7 K
@JUSBR
@
13
GND
12
GND
11
GND
10
GND
1
2
CR39
CR39
@EMI@
@EMI@
3
2.5A
UR3
UR3
2
IN
3
IN
U3RXDP2_ L
U3RXDN2_L
4
EN/ENB
1
GND
SY6288DCA C_MSOP8
SY6288DCA C_MSOP8
SA00006DN00
DR4
DR4
1
2
4
5
3
TVWDF100 4AD0_DFN9
TVWDF100 4AD0_DFN9
USB_CHG_ EN#<41>
U3TXDP2_C_ L
U3TXDN2_C_L
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
W=100mils
6
OUT
7
OUT
8
OUT
5
OCB
@ESD@
@ESD@
9
8
7
6
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
USB_CHG_ OC# <2 6,29,41>USB_OC#0 <29,41>
U3TXDP2_C_ L
U3TXDN2_C_L
U3RXDP2_ L
U3RXDN2_L
+USB_VCCA
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+USB_VCCA+USB_VCCB
47U_080 5_6.3V6M
47U_080 5_6.3V6M
U3TXDP2_C_ L U3TXDN2_C_L
U3RXDP2_ L U3RXDN2_L
USB20_P 1_R USB20_N1 _R
W=100milsW=80mils
0.1U_040 2_10V7K
0.1U_040 2_10V7K
CR10
CR10
1 2
1
CR11
CR11
2
JUSBF
9
StdA-SSTX+
8
StdA-SSTX-
7
GND-DRAIN
6
StdA-SSRX+
5
StdA-SSRX-
4
GND
3
D+
2
D-
1
VBUS
LOTES_AUS B0015-P00 1A
LOTES_AUS B0015-P00 1A
1
CR8
CR8
CR40
CR40
@
@
@EMI@
@EMI@
2
2
4.7U_060 3_6.3V6K
4.7U_060 3_6.3V6K
@JUSBF
@
13
GND
12
GND
11
GND
10
GND
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
RUSB30/S&C
RUSB30/S&C
RUSB30/S&C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
VFKTA
VFKTA
VFKTA
1
1000P_0 402_50V7 K
1000P_0 402_50V7 K
1
0.3
0.3
38 56Thursday, January 17 , 2013
38 56Thursday, January 17 , 2013
38 56Thursday, January 17 , 2013
0.3
of
of
of
Page 39
CyberForum.ru
A
UA1
UA1
MIC1_LINE1_R_R MIC1_LINE1_R_L
1 1
@ESD@
@ESD@
0.01U_0402_25V7K
0.01U_0402_25V7K
1 2
CA65
CA65
AZ_RST_HD#<25>
close to pin 28
1 2
CA60 10U_0603 _6.3V6MCA60 10 U_0603_6.3V6M
1
12
CA25
CA25
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2 2
CA55
CA55
0.1U_0402_10V7K
0.1U_0402_10V7K
2
RA34 20K_0402_1%
RA34 20K_0402_1%
@
@
For EMI reserve
RA42
INT_MIC_CLK<22>
RA42
FBMA-10-100505-301T
FBMA-10-100505-301T
CAM@EMI@
CAM@EMI@
CA584.7U_0603_6.3V6K CA584.7U_0603_6.3V6K CA574.7U_0603_6.3V6K CA574.7U_0603_6.3V6K
+MIC1_VREFO_L +MIC1_VREFO_R EC_MUTE_INT<41>
AZ_SYNC_HD<25>
close to pin19
12
RA30 20K_0402_1%RA 30 20K_0402_1%
1 2
CA54 2.2U_0402_6.3V6MCA54 2.2U_0402_6.3V6M
1 2
CA53 2.2U_0402_6.3V6MCA53 2.2U_0402_6.3V6M
INT_MIC_DATA<22>
12
EC_MUTE#<41>
INT_MIC_CLK_R
MIC1_LINE1_R_C_L
MONO_IN
INT_MIC_CLK_R
SENSE_A SENSE_B
269@ RA50
269@
1 2
22 21
17 16
31 30 29
15 14
20
12
10
11
10 mil
19
AC_JDREF
28
LDO_CAP
27
AC_VREF
34
CPVEE
35
CBN
36
CBP
2 3
13 18
47
4
RA50
4.7K_0402_5%
4.7K_0402_5%
To solve S&M noise issue
Internal AMP
EC_MUTE#
Hight
Enable
LOW
Disable
B
MIC1_R MIC1_L
MIC2_R MIC2_L
MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO
LINE2_R LINE2_L
MONO_OUT
PCBEEP
SYNC
RESET#
JDREF LDO_CAP VREF CPVEE CBN CBP
GPIO0/DMIC_DATA GPIO1/DMIC_CLK
SENSE_A SENSE_B
EAPD PD#
ALC259-VC2-CG_MQFN48_6X6
ALC259-VC2-CG_MQFN48_6X6
259@
259@
DVDD_IO
AVDD1 AVDD2
PVDD1 PVDD2
SPK_OUT_R+
SPK_OUT_R-
SPK_OUT_L+
SPK_OUT_L-
HPOUT_R HPOUT_L
SDATA_OUT
SDATA_IN
LINE1_L LINE1_R
Thermal Pad
DVDD
BCLK
AVSS1 AVSS2 PVSS1 PVSS2
DVSS
NC
1 9
25 38
39 46
45 44
40 41
33 32
5 8
AZ_SDIN0_HD_R
6
AZ_BITCLK_HD
23
LINE1_R_C_L
24
LINE1_R_C_R
48
26 37 42 43 7
49
DGND
+DVDDMIC1_LINE1_R_C_R +DVDD
+AVDD +AVDD
+PVDD +PVDD
SPKR+ SPKR-
SPKL+ SPKL-
HPOUT_R HPOUT_L
AGND
75_0402_1%
75_0402_1%
RA19
RA19 RA20
RA20
75_0402_1%
75_0402_1%
RA23 33_0402_5%RA23 33_0402_5%
269@
269@
1 2
CA9 0.1U_0402_10V6K
CA9 0.1U_0402_10V6K
269@
269@
1 2
CA10 0.1U_0402_10V6K
CA10 0.1U_0402_10V6K
For EMI reserve close to codec
AZ_BITCLK_HD
C
0.1U_0402_16V4Z
0.1U_0402_16V4Z
close to pin1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
close to pin9
HP_R <40>
HP_L <40>
12
MIC1_LINE1_R_L
MIC1_LINE1_R_R
For S&M
@EMI@
@EMI@
12
RA4110_0402_5%
RA4110_0402_5%
35mA for 3.3V level
CA4
CA4
CA45
CA45
AZ_SDOUT_HD <25>
AZ_SDIN0_HD <25>
AZ_BITCLK_HD <25>
CA51
CA51
1 2
@EMI@
@EMI@
10P_0402_50V8J
10P_0402_50V8J
+DVDD
1
2
1
2
RA22
RA22
0_0402_5%
0_0402_5%
1
CA3
CA3
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2
For P/N and footprint Please place them to ISPD page
UA1
UA1
ALC269Q-VB6-CG
ALC269Q-VB6-CG
269@
269@
RA44 0_0603_5%
RA44 0_0603_5%
RA43 0_0603_5%
RA43 0_0603_5%
RA39 0_0603_5%
RA39 0_0603_5%
RA38 0_0603_5%
RA38 0_0603_5%
RA31 0_0603_5%
RA31 0_0603_5%
+3VS +5VALW
1 2
@
@
1 2
@
@
1 2
@
@
1 2
@EMI@
@EMI@
1 2
@EMI@
@EMI@
D
40 mil20 mil
close to pin 25 clos e to pin 38
+AVDD
CA42
CA42
10U_0603_6.3V6M
10U_0603_6.3V6M
close to pin39
close to pin46
650mA for 5V level
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
CA37
CA33
CA33
CA32
CA32
2
CA37
10U_0603_6.3V6M
10U_0603_6.3V6M
60 mil
+PVDD
1
2
1
2
CA47
CA47
1
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
Sleep and Music
259@
269@
No
Yes
0.1U_0402_10V7K
0.1U_0402_10V7K
2
CA50
CA50
1
1
2
2
CA35
CA35
1
10U_0603_6.3V6M
10U_0603_6.3V6M
E
1 2
0_0603_5%
0_0603_5%
1 2
0_0603_5%
0_0603_5%
RA18
RA18
RA24
RA24
+5VALW
Beep sound
PCI Beep
PCH_SPKR<25>
3 3
Sense Pin Impedance
39.2K
SENSE A
4 4
20K
10K
5.1K
39.2K
20K
10K
A
RA52
RA52
1 2
47K_0402_5%
47K_0402_5%
RA49
RA49
4.7K_0402_5%
4.7K_0402_5%
Codec Signals
PORT-I (PIN 32, 33)
PORT-B (PIN 21, 22)
PORT-C (PIN 23, 24)
(PIN 48)
PORT-E (PIN 14, 15)
PORT-F (PIN 16, 17)SENSE B
PORT-H (PIN 20)
1 2
Headphone out
Ext. MIC
CA70
CA70
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
CA27
CA27
100P_0402_50V8J
100P_0402_50V8J
2
For better sound by customer request
Function
MONO_IN
B
SPK
2W 4ohm =40mil For EMI reserve 1W 8ohm =20mil
SPKL+
SPKL-
SPKR+
SPKR-
close to codec
1 2
@
@
RA7 0_0603_5%
RA7 0_0603_5%
1 2
@
@
RA8 0_0603_5%
RA8 0_0603_5%
1000P_0402_50V7K
1000P_0402_50V7K
@EMI@
@EMI@
1 2
@
@
RA9 0_0603_5%
RA9 0_0603_5%
1 2
@
@
RA10 0_0603_5%
RA10 0_0603_5%
1000P_0402_50V7K
1000P_0402_50V7K
@EMI@
@EMI@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
SPK_L1 <40>
1
CA31
CA31
2
1
CA34
CA34
2
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
SPK_L2 <40>
1
CA30
CA30 1000P_0402_50V7K
1000P_0402_50V7K
2
@EMI@
@EMI@
SPK_R1 <40>
SPK_R2 <40>
1
CA36
CA36 1000P_0402_50V7K
1000P_0402_50V7K
2
@EMI@
@EMI@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
MIC/LINE IN
MIC1_LINE1_R_R
MIC1_LINE1_R_L
+3VL
SM_SENSE#<41>
EC
D
RA48 2.2K_0402_5%RA48 2.2K_0402_5%
RA46 2.2K_0402_5%RA46 2.2K_0402_5%
61
RA29 100K_0402_5%
100K_0402_5%
2
34
5
12
12
269@RA29
269@
+MIC1_VREFO_R
+MIC1_VREFO_L
RA37
RA37 0_0402_5%
0_0402_5%
259@
259@
RA47
RA47
1K_0402_5%
1K_0402_5%
1K_0402_5%
1K_0402_5%
RA45
RA45
MIC_SENSE
QA1A
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
QA1A
269@
269@
RA35 100K_0402_5%RA35 100K_0402_ 5%
QA1B
QA1B
269@
269@
12
12
place close to chip
MIC_SENSE SENSE_A
RA32 20K_0402_1%RA32 20K_0402_1%
NBA_PLUG<40>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
RA33 39.2K_0402_1%RA33 39.2K_0402_1%
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
HDA-ALC259-VC/269-VB
HDA-ALC259-VC/269-VB
HDA-ALC259-VC/269-VB
E
MIC1_R <40>
MIC1_L <40>
JACK_SENSE < 40>
39 56Thursday, January 17, 2013
39 56Thursday, January 17, 2013
39 56Thursday, January 17, 2013
of
of
of
Page 40
CyberForum.ru
SPK Conn.
+3VS
RA95
RA95
10K_040 2_5%
10K_040 2_5%
SPK_R1<39> SPK_R2<39> SPK_L1<39> SPK_L2<39>
SPK_DET<30>
1 2
HeadPhone/LINE Out JACK
1 2
@
HP_L<3 9>
HP_R<39>
@
RA54 0_0402_ 5%
RA54 0_0402_ 5%
1 2
@
@
RA53 0_0402_ 5%
RA53 0_0402_ 5%
YSDA0502C _SOT23-3
YSDA0502C _SOT23-3
@ESD@
@ESD@
For common design, pull-high resistor should be placed at connector side.
JSPK
JSPK
DA6
DA6
2
3
8 7
6 5 4 3 2 1
ACES_50 228-0067N-001
ACES_50 228-0067N-001
HP_R_L
HP_R_R
CA11100P_0402_50V8J
CA11100P_0402_50V8J
1
2
GND GND
6 5 4 3 2 1
@
@
CA12100P_0402_50V8J
CA12100P_0402_50V8J
1
2
<SM_DET> Intel : GPIO48 AMD Richland : GPIO173 AMD Kabini :GPIO70
<SPK_DET> Intel : GPIO70 AMD Richland : GPIO74 AMD Kabini :GPIO62
NBA_PLU G<39 >
JLINE
@JLINE
@
6 1 2
3
4
5
TYCO_2041 280-1_3.6D
TYCO_2041 280-1_3.6D
SM_DET BIOS setup
1
0
Non-Harman detection
SPK_DET
Speaker Type
Harman/KardonS&M option
0
Non Harman
ONKYO
Non-Brand1
BOM
269@
259@
1
@EMI@
@EMI@
@EMI@
@EMI@
MIC/LINE IN JACK
JEXMIC
@JEXMIC
@
6 1
1 2
@
MIC1_L<39>
MIC1_R<39>
@
RA56 0_0402_ 5%
RA56 0_0402_ 5%
1 2
@
@
RA55 0_0402_ 5%
RA55 0_0402_ 5%
YSDA0502C _SOT23-3
YSDA0502C _SOT23-3
@ESD@
@ESD@
DA7
DA7
MIC1_R_L
MIC1_R_R
JACK_SE NSE<39>
1
1
2
3
1
CA13100P_0402_50V8J
CA13100P_0402_50V8J
CA14100P_0402_50V8J
CA14100P_0402_50V8J
2
@EMI@
@EMI@
+3VL
2
@EMI@
@EMI@
RA40
RA40
4.7K_040 2_5%
4.7K_040 2_5%
269@
269@
2
3
4
5
TYCO_2041 280-1_3.6D
TYCO_2041 280-1_3.6D
RA36
RA36 0_0402_ 5%
0_0402_ 5%
259@
259@
Security Class ification
Security Class ification
Security Class ification
2012/09/ 24 2013/09/24
2012/09/ 24 2013/09/24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/09/ 24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
AUDIO CONN
AUDIO CONN
AUDIO CONN
Thursday, January 17, 2013
Thursday, January 17, 2013
Thursday, January 17, 2013
of
40 56
of
40 56
of
40 56
0.3
0.3
0.3
Page 41
CyberForum.ru
0.1U_0402_10V7K
0.1U_0402_10V7K
1
@
@
CB4
CB4
2
EC_RST#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
E51_TXD
EC_MUTE_INT_R
12
RB22
RB22
B
1
CB5
@CB5
@
2
10
12 13 37 20 38
55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82
77 78 79 80
14 15 16 17 18 19 25 28 29 30 31 32 34 36
122 123
1
CB16
CB16 20P_0402_50V8
20P_0402_50V8
2
+3VL
UB1
UB1
1
GATEA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ
4
LPC_FRAME#
5
LPC_AD3
7
LPC_AD2
8
LPC_AD1
LPC & MISC
LPC & MISC
LPC_AD0
CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47
6
PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A
XCLKI/GPIO5D XCLKO/GPIO5E
Int. K/B
Int. K/B Matrix
Matrix
SM Bus
SM Bus
9
22
33
96
125
111
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
PWM Output
PWM Output
AD Input
AD Input
DA Output
DA Output
PS2 Interface
PS2 Interface
SPI Device Interface
SPI Device Interface
SPI Flash ROM
SPI Flash ROM
GPIO
GPIO
GPIO
GPIO
GND/GND
GND/GND
GND/GND
GND/GND
11
24
35
94
113
+3VL
CB3
CB3
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
67
EC_VDD/VCC
BEEP#/GPIO10
EC_VDD/AVCC
ACOFF/GPIO13
BATT_TEMP/GPIO38
ADP_I/GPIO3A
IMON/GPIO43
DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F
EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F
CPU1.5V_S3_GATE/GPXIOA00
WOL_EN/GPXIOA01
ME_EN/GPXIOA02
VCIN0_PH/GPXIOD00
SPIDI/GPIO5B
SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A
ENBKL/GPIO40
PECI_KB930/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
SYSON/GPIO56 VR_ON/GPIO57
PM_SLP_S4#/GPIO59
EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
GPO
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11
AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
GPI
GPI
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
PECI_KB9012/GPXIOD07
AGND/AGND
GND0
KB9012QF-A3_LQFP128_14X14
KB9012QF-A3_LQFP128_14X14
69
9012@
9012@
UB1
UB1 NPCE885NB0DX LQFP 128P
NPCE885NB0DX LQFP 128P
885@
885@
A
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
EC_SMI#<27,30>
KB_LED<42>
E51_TXD<35>
BT_ON<35>
RB37 0_0402_5%
RB37 0_0402_5%
1 2
CLK_EC<27>
1
CB2
CB2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
CHG_PWR_GATE#
@
@
100K_0402_5%
100K_0402_5%
CB1
CB1
0.1U_0402_10V7K
EC_MUTE_INT<39>
0.1U_0402_10V7K
LPC_FRAME#<25>
CLK_PCI_EC<29>
KSI[0..7]
KSO[0..15]
CHG_PWR_GATE#<38>
EC_SMB_CK1<38,45,46> EC_SMB_DA1<38,45,46> EC_SMB_CK2<13,26,34> EC_SMB_DA2<13,26,34>
PM_SLP_S3#<27> PM_SLP_S5#<27>
USB_CHG_OC#<26,29,38>
USB_CHG_EN#<38> USB_EN#2<36>
GATEA20<30>
KB_RST#<30>
SERIRQ<25>
LPC_AD3<25> LPC_AD2<25> LPC_AD1<25> LPC_AD0<25>
PLT_RST#<29,35,36,5>
EC_SCI#<30>
WOWL_EN#<35>
USB_OC#2<29,36>
FAN_SPEED1<5>
WL_OFF#<35>
E51_RXD<35>
PM_PWROK<27>
SM_SENSE#<39>
For RF
CLK_PCI_EC
12
RB3
RB3
22_0402_5% @RF@
22_0402_5% @RF@
1 1
10P_0402_50V8J
10P_0402_50V8J
+3VL
2 2
+3VL
+3VS
3 3
1
CB11
@RF@CB11
@RF@
2
RB2
RB2
47K_0402_5%
47K_0402_5%
1 2
1 2
CB12 0.1U_0402_10V 7KCB12 0.1U_0402_10V7K
ESD@
ESD@
1 2
CB13 100P_0402_ 50V8J
CB13 100P_0402_ 50V8J
RPB1
RPB1
1 8
EC_SMB_CK1
2 7
EC_SMB_DA1
3 6
EC_SMB_CK2
4 5
EC_SMB_DA2
2.2K_8P4R_5%
2.2K_8P4R_5%
RB27
RB27
100K_0402_5%
100K_0402_5%
1 2
@ESD@
@ESD@
1 2
CB18 100P_0402_ 50V8J
CB18 100P_0402_ 50V8J
1 2
RB12 4.7K_0402_5%RB12 4.7K_0402_5%
EC_RST#
PLT_RST#
KSI[0..7]<42>
KSO[0..15]<42>
E51_TXD
FAN_SPEED1
EC_MUTE_INT_R
GPIO0F
GPIO12
GPIO39
GPIO3B GPIO42
GPXIOD06
V18R
C
21 23 26 27
63 64 65 66 75 76
68 70 71 72
83 84 85 86 87 88
97 98 99 109
119 120 126 128
73 74 89 90 91 92 93 95 121 127
100 101 102 103 104 105 106 107 108
110 112 114 115 116 117 118
124
BATT_PRES
885_EC_ON
TP_CLK TP_DATA
WLAN_WAK E#
SYSON VR_ON FB_CLAMP_R
RB5 0_0402_5%
RB5 0_0402_5%
H_PROCHOT#_EC VCOUT0_PH_L
ACIN_D EC_ON_R
LID_SW# SUSP# +VTT_EC EC_PECI
+EC_V18R
1
CB15
CB15
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
WL_BT_LED# <42>
USB_EN#0 <38> FANPWM <5> CLK_REQ_GC6# <13>
BATT_PRES < 45> USB_OC#0 <29,38> ADP_I <45,46> ADP_V <46> HDPLOCK <34> EC_ENBKL <22,28>
EC_MUTE# <39>
PM_SLP_S4# <2 7>
TP_DATA <42>
SYSON < 48> VR_ON <51>
1 2
@
@
ON/OFFBTN# <42> LID_SW# <42>
SUSP# <43,48,49>
HDPINT <34>
PCH_SUSPWRD N# <27>
SUSACK# <27>
Reserve this signal to EC by SW demand 2011/10/18a
TP_CLK <42>
VGATE <27,51>
GPS_DOWN# <13 > PWRME_CTRL <25>
VCIN0_PH <45>
EC_SDIO <25 >
EC_SDI <25> EC_SCK <25> EC_CS0# <25>
WLAN_WAK E# <35>
WOL_EN# <36>
HDPACT <34> BATT_FULL_LED# <42> CAPS_LED# <42> PWR_SUSP_LED# <42> BATT_CHG_LOW_LED# <42>
PCH_RSMRST# <27> EC_LID_OUT# <30> PROCHOT_IN <45>
BKOFF# <22>
PBTN_OUT# <27> PCH_PWR_EN <43>
SA_PGOOD <50>
RB4 0_0402_5%
RB4 0_0402_5% RB19 43_0402_5%RB 19 43_0402_5%
VCIN0_PH connect to power portion (9 012 only)
FB_CLAMP <13,14,17>
PROCHOT_IN connect to power portion (9012 only)
1 2
885@
885@
1 2
D
VR_HOT#<51>
+1.05VS_VCCP
H_PECI <5>
1 2
@
@
RB1 0_0402_5%
RB1 0_0402_5%
H_PROCHOT#_EC
BATT_PRES
ACIN_D
FANPWM
H_PROCHOT#_EC
LID_SW#
WLAN_WAK E#
CHG_PWR_GATE#
TP_CLK
TP_DATA
SYSON
SUSP#
VR_ON
VCOUT0_PH_L
VCOUT0_PH connect to power portion (9012 only)
ACIN_D
13
D
D
QB1
QB1
2
G
G
2N7002K_SOT23-3
2N7002K_SOT23-3
S
S
@
@
1 2
CB9 100P_0402_50V8J
CB9 100P_0402_50V8J
1 2
CB10 100P_0402_ 50V8JCB 10 100P_0402_50V8J
1 2
CB17 100P_0402_ 50V8J
CB17 100P_0402_ 50V8J
@ESD@
@ESD@
1 2
@
@
RB6 10K_0402_5%
RB6 10K_0402_5%
1 2
RB35 47K_0402_5%RB 35 47K_0402_5%
1 2
RB7 10K_0402_5%RB7 10K_0402_5%
1 2
RB11 10K_0402_5%RB 11 10K_0402_5%
1 2
RB8 4.7K_0402_5%RB8 4.7K_0402_5%
1 2
RB9 4.7K_0402_5%RB9 4.7K_0402_5%
1 2
RB10 4.7K_0402_5%RB10 4.7K_0402_5%
1 2
RB21 10K_0402_5%RB 21 10K_0402_5%
1 2
RB23 10K_0402_5%RB 23 10K_0402_5%
1 2
@
@
RB34 0_0402_5%
RB34 0_0402_5%
RB18
RB18
330K_0402_5%
330K_0402_5%
12
1
CB8
CB8 47P_0402_50V8J
47P_0402_50V8J
2
+3VS
+3VL
+3VS
+3VL
12
DB1RB751V40_SC76-2 DB1RB751 V40_SC76-2
Close to EC
@ESD@
@ESD@
1 2
CB14 180P_0402_50V8J
CB14 180P_0402_50V8J
SUSP#
E
H_PROCHOT# <5>
VS_ON <47>
ACIN <27,46>
885@
885@
12
RB20 330K_0402_5%
9012@
9012@
EC_ON_R
4 4
A
Voltage Comparator Pins FOR 9012 A3
VCIN0 pin109 VCIN1 pin102
VCOUT0 pin104
VCOUT1 pin103
>1.2V <1.2V
HIGH (default)
HIGH
LOW
LOW (default)
B
885_EC_ON
1 2
RB36 0_0402_5%
RB36 0_0402_5%
1 3
D
S
D
S
QB2
885@
QB2
885@
2N7002K_SOT23-3
2N7002K_SOT23-3
G
G
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
RB20 330K_0402_5%
1
@
@
1U_0402_6.3V6K
1U_0402_6.3V6K CB50
CB50
2
RB24
885@RB24
885@
12
10K_0402_5%
10K_0402_5%
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
+3VL
EC_ON <47>
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
LPC-EC-KB9012&NPCE885N
LPC-EC-KB9012&NPCE885N
LPC-EC-KB9012&NPCE885N
Thursday, January 17, 2013
Thursday, January 17, 2013
Thursday, January 17, 2013
E
of
41 56
of
41 56
of
41 56
0.3
0.3
0.3
Page 42
CyberForum.ru
5
Power Button
TJG-533-V-T/R_6 P
TJG-533-V-T/R_6 P
3
1
2
Place on BOT Debug used @ after PVT
D D
Place on TOP
4
SW2
SW2
5
6
TJG-533-V-T/R_6 P
TJG-533-V-T/R_6 P
3
4
SW3
SW3
5
6
+3VL
R395
R395
100K_04 02_5%
100K_04 02_5%
1
2
1 2
ON/OFFBTN#
ON/OFFBTN# <41>
4
Conn.
JPWR
JPWR
ACES_50 611-0040N-0 01
ACES_50 611-0040N-0 01
@
@
112 334 556 778
ESD diode on SB
2
ON/OFFBTN#
4 6 8
+5VS
3
Touchpad Connector
JTP
@JTP
@
16 14 12 10
8 6 4 2
HB_A060 877-SAVR01
HB_A060 877-SAVR01
15
15
16
13
13
14
11
11
12
9
9
10
7
7
8
5
5
6
3
3
4
1
1
2
+3VS
TP_DATA <41> TP_CLK <41>
PM_SMBDA TA <11,12 ,26,35> PM_SMBCL K <11,1 2,26,35>
2
NFC
Battery Reset
TJG-533-V-T/R_6 P
TJG-533-V-T/R_6 P
3
ENLDO<47>
4
1
1
2
SW4
SW4
5
6
BATT CHARGE /FULL LED
R60
D24
D24
2 1
HT-F196BP5 _WHITE
+5VALW
C C
White LED bright when both AC-a daptor is plugg ed in and Batte ry is full charg ed Amber LED bright while charging battery from A C-adaptor. Amber LED blink during Critical Low Battery
HT-F196BP5 _WHITE
D23
D23
2 1
HT-191UD5_A MBER_0603
HT-191UD5_A MBER_0603
R60 390_040 2_5%
390_040 2_5%
1 2
1 2
R3
R3 510_040 2_5%
510_040 2_5%
BATT_FULL_L ED# <41>
BATT_CHG_LO W_LED# <41>
POWER LED
R61
D25
D25
+5VALW
White LED bright when system is power on. White LED blink when system is sleep mode.
2 1
HT-F196BP5 _WHITE
HT-F196BP5 _WHITE
R61 390_040 2_5%
390_040 2_5%
1 2
PWR_SU SP_LED# <41>
WLAN/WiMAX LED
LED_WI MAX# <3 5>
R819
B B
D26
D26
2 1
+5VS
HT-191UD5_A MBER_0603
HT-191UD5_A MBER_0603
1 2
R66
R66 510_040 2_5%
510_040 2_5%
+5VS
R819
10K_040 2_5%
10K_040 2_5%
@
@
3
2
12
6 1
5
Q157A
Q157A 2N7002DW -T/R7_SOT363 -6
2N7002DW -T/R7_SOT363 -6
4
@
@
Q157B 2N70 02DW-T/R7_S OT363-6
Q157B 2N70 02DW-T/R7_S OT363-6
@
@
WL_BT_L ED# <41>
Amber LED bright while Wireless and/or WiMAX t urns on.
Lid SW
+3VL
U21
U21 APX9132 ATI-TRL_SOT23-3
APX9132 ATI-TRL_SOT23-3
A A
1
C453
C453
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
2
VDD2VOUT
GND
1
10P_040 2_50V8J
10P_040 2_50V8J
3
C452
C452
LID_SW # <41>
1
@
@
2
Keyboard LED
+5VS
12
R587
R587
10K_040 2_5%
10K_040 2_5%
KBL@
KBL@
13
D
D
Q52
Q52
KB_LED<41>
2
G
G
2N7002K W_SOT323-3
2N7002K W_SOT323-3
KBL@
KBL@
S
S
KEYBOARD CONN.
CAPS_LE D#<41>
+3VS
R376 300_0 402_5%R376 300_ 0402_5%
KSI[0..7]
KSO[0..1 5]
KSI[0..7] <41>
KSO[0..1 5] <41>
Q38
Q38 AO3413_ SOT23
AO3413_ SOT23
S
S
G
G
2
12
KBL@
KBL@
D
D
13
+5VS_LE D
JBLG @
JBLG @
1
1
2
2
3
3
ACES_50 578-0040N-0 01
ACES_50 578-0040N-0 01
JKB
JKB
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34 GND1 GND2
@
@
4
4
5
GND
6
GND
ISPD
35 36
PCH
(Default) HM76R1@ BD82HM76 SLJ8E C1 SA00005FHA0
Panther Point 82HM70 C-1 HM7 0
Panther Point 82HM70 C-1 HM7 0
KSI1 KSI6 KSI5 KSI0 KSI4 KSI3 KSI2 KSI7 KSO15 KSO12 KSO11 KSO10 KSO9 KSO8 KSO13 KSO7 KSO6 KSO14 KSO5 KSO3 KSO4 KSO0 KSO1 KSO2
+5VS_LE D
CVILU_CF1 7341U0R0-NH
CVILU_CF1 7341U0R0-NH
Screw Hole
ZZZ
ZZZ
DA8000XE000
DA8000XE000
PCB LA-98 61P
PCB LA-98 61P
UH1
HM70R1@
UH1
HM70R1@
SA00005MQ50
SA00005MQ50
H1
H1
1
H6
H6
1
H_4P6
H_4P6
@
@
H7
H7
H_3P0
H_3P0
@
@
H12
H12
H_3P0
H_3P0
@
@
1
CPU
(Default) CPU@ SA00004SX00
UC1
UC1
SA00005K690
SA00005K690
Ivy Bridge i5-331 7U R1
Ivy Bridge i5-331 7U R1
UC1
UC1
SA00005K6G0
SA00005K6G0
Ivy Bridge i5-331 7U R3
Ivy Bridge i5-331 7U R3
H2
H2
1
H_4P6x4P2
H_4P6x4P2
@
@
1
H_4P0
H_4P0
@
@
CPUI5R3@
CPUI5R3@
H13
H13
1
CPUI5@
CPUI5@
H8
H8
H_3P0
H_3P0
@
@
1
H_3P2
H_3P2
@
@
H3
H3
H_4P2
H_4P2
@
@
1
PTH
H14
H14
1
H9
H9
H10
H10
H_3P0
H_3P0
@
@
1
1
H15
H15
H_7P0
H_7P0
H_3P0
H_3P0
@
@
@
@
1
UC1
CPUI3@
UC1
CPUI3@
SA00005L590
SA00005L590
Ivy Bridge i3-321 7U R1
Ivy Bridge i3-321 7U R1
UC1
CPUI3R3@
UC1
CPUI3R3@
SA00005L5G0
SA00005L5G0
Ivy Bridge i3-321 7U R3
Ivy Bridge i3-321 7U R3
VGACPU
H5
H_3P3
H_3P3
@
@
H_3P2
H_3P2
@
@
H18
H18
1
H5
1
H_3P2x3P7
H_3P2x3P7
@
@
H_3P3
H_3P3
@
@
H_3P0
H_3P0
@
@
H4
H4
1
H17
H17
H11
H11
H_3P0
H_3P0
@
@
1
1
PCB Fedical Mark PAD
1
FD2@FD2
@
1
FD3@FD3
FD4@FD4
@
@
1
1
UC1
CPUI5333 7U@
UC1
CPUI5333 7U@
SA00006D850
SA00006D850
Ivy Bridge i5 33 37U R1
Ivy Bridge i5 33 37U R1
UC1
CPUI3237 5M@
UC1
CPUI3237 5M@
SA00006ED40
SA00006ED40
Ivy Bridge i3 23 75M R1
Ivy Bridge i3 23 75M R1
UC1
CPUC847@
UC1
CPUC847@
SA00005VK00
SA00005VK00
Ivy Bridge Celeron 84 7 R1
Ivy Bridge Celeron 84 7 R1
FD1@FD1
@
UC1
CPUI7353 7U@
UC1
CPUI7353 7U@
SA00006DB40
SA00006DB40
Ivy Bridge i7 35 37U R1
Ivy Bridge i7 35 37U R1
UC1
CPUI3322 7U@
UC1
CPUI3322 7U@
SA00006D970
SA00006D970
Ivy Bridge i3 32 27U R1
Ivy Bridge i3 32 27U R1
UC1
CPUP2117 U@
UC1
CPUP2117 U@
SA000061230
SA000061230
Ivy Bridge Pentiu m 2117U R1
Ivy Bridge Pentiu m 2117U R1
WLAN standoff
H29
H29
H_3P3
H_3P3
@
@
1
H19
H19
GPU
(Default) N14PGV2@ N14P-GV2-S-A1 SA00006DO00
UV1
N14MGL@
UV1
N14MGL@
SA000069000
SA000069000
N14M-GL-A2 FCBGA
N14M-GL-A2 FCBGA
NPTH
H_3P2N
H_3P2N
@
@
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
TP/ISPD/KB/LED/Screw
TP/ISPD/KB/LED/Screw
TP/ISPD/KB/LED/Screw
VFKTA
VFKTA
VFKTA
Thursday, January 17, 2013
Thursday, January 17, 2013
Thursday, January 17, 2013
1
of
42 56
of
42 56
of
42 56
0.3
0.3
0.3
Page 43
CyberForum.ru
+5VALW
@
@
B
VIN 5V and 3.3V (VBIAS=5V),IMA X(per channel)=6A,Rds=18mohm
U1
U1
1
VIN1
2
C1
C1
1
1U_0402_6.3V6K
1U_0402_6.3V6K
+5VALW
2
+3VALW
1
C10
@ C10
@
1U_0402_6.3V6K
1U_0402_6.3V6K
2
SUSP#
SUSP#
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2
7
VIN2
TPS22966DPUR_SON14_2X3
TPS22966DPUR_SON14_2X3
VOUT1 VOUT1
GND
VOUT2 VOUT2
GPAD
14 13
12
CT1
11
10
CT2
9 8
15
A
+5VALW TO +5VS +3VALW TO +3VS Load switch
1 1
C
+5VS_LS
C2 180P_0402_50V8JC2 180P_0402_50V8J
1 2
C9 330P_0402_50V7KC9 330P_0402_50V7K
1 2
+3VS_LS
PJ6
PJ6
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJ7
PJ7
@
@
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
@
@
+3VS
@ C8
@
D
+5VS
2
C3
@ C3
@
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
C8
0.1U_0402_10V7K
0.1U_0402_10V7K
1
E
2
G
G
Q5527
Q5527
+5VALW
R5545
R5545 10K_0402_5%
10K_0402_5%
1 2
PCH_PWR_EN#
13
D
D
2N7002KW_SOT323-3
2N7002KW_SOT323-3
S
S
PCH_PWR_EN# <31,32>
2N7002KW_SOT323-3
2N7002KW_SOT323-3
+1.8VS
1 2
13
D
D
Q190
Q190
S
S
R470
R470 470_0805_5%
470_0805_5%
2
G
G
SUSP
SUSP<9>
SUSP#<41,48,49>
+3VL
R5546
885@ R5546
885@
10K_0402_5%
10K_0402_5%
PCH_PWR_EN<41>
2 2
1 2
SUSP#
SUSP
+5VALW
1 2
61
2
R422
R422 100K_0402_5%
100K_0402_5%
Q6A
Q6A
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
+0.75VS
R421
R421
22_0805_5%
22_0805_5%
1 2
13
D
D
Q189
Q189
2N7002KW_SOT323-3
2N7002KW_SOT323-3
S
S
2
G
G
+1.05VS_VCCP
2
SUSP
G
G
2N7002KW_SOT323-3
2N7002KW_SOT323-3
R468
R468 470_0805_5%
470_0805_5%
1 2
13
D
D
Q60
Q60
S
S
For S3 CPU Power Saving
VCCP_PWRGOOD<49,50>
3 3
1 2
R158 220K_0402_5%R158 220K_0402_5%
SUSP
34
5
0.75VR_EN
Q6B
Q6B 2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
0.75VR_EN <48>
ZPODD@
ZPODD@
+5VS_ODD
+5VS TO +5VS_ODD
R457
R457
470_0805_5%ZPODD@
470_0805_5%ZPODD@
1 2 61
Q53A
Q53A
2
ODD_EN#
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
ODD_EN#<30>
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
4
ZPODD@
ZPODD@
+3VS
5
Q53B
Q53B
3
+5VS
ZPODD@
ZPODD@
R441
R441 100K_0402_5%
100K_0402_5%
1 2
R440
R440
1 2
47K_0402_5%
47K_0402_5%
ZPODD@
ZPODD@
2
C471
ZPODD@ C471
ZPODD@
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
C217
C217
ZPODD@
ZPODD@
0.01U_0402_25V7K
0.01U_0402_25V7K
1
ZPODD@
ZPODD@
AO3413_SOT23
AO3413_SOT23
+5VS
Vgs=-4.5V,Id=3A,Rds<97mohm
S
S
Q45
Q45
2
12
G
G
NONZP@
NONZP@
R120
R120
D
D
0_0805_5%
0_0805_5%
1 3
+5VS_ODD
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
DC-DC INTERFACE
DC-DC INTERFACE
DC-DC INTERFACE
VFKAA
VFKAA
VFKAA
Thursday, January 17, 20 13
Thursday, January 17, 20 13
Thursday, January 17, 20 13
E
of
43 56
of
43 56
of
43 56
0.3
0.3
0.3
Page 44
CyberForum.ru
A
B
C
D
EMI Part (47.1)
EMI@
EMI@
PL102
A51 need add fuse
1 1
@
@
PJP1
PJP1
1
1
2
2
3
3
4
4
ACES_50299-00401-001
ACES_50299-00401-001
2 2
PF1
PF1
21
7A_32V_S1206-H-7.0A
7A_32V_S1206-H-7.0A
DC_IN_S1
12
EMI@
EMI@
PC102
PC102 1000P_0603_50V7K
1000P_0603_50V7K
PL102
FBMA-L11-201209-121LMA50T_0805
FBMA-L11-201209-121LMA50T_0805
1 2
PL101
EMI@PL101
EMI@
FBMA-L11-201209-121LMA50T_0805
FBMA-L11-201209-121LMA50T_0805
1 2
12
EMI@
EMI@
PC103
PC103
100P_0603_50V8
100P_0603_50V8
12
EMI@
EMI@
PC101
PC101
100P_0603_50V8
100P_0603_50V8
VIN
12
EMI@
EMI@
PC104
PC104 1000P_0603_50V7K
1000P_0603_50V7K
For ML1220 RTC (38.2)
PBJ101 @
PBJ101 @
- +
12
PR101
PR101
560_0603_5%
560_0603_5%
1 2
+RTC_R
PR102
PR102
560_0603_5%
560_0603_5%
1 2
+RTCBATT
ML1220T13RE
ML1220T13RE
+RTC
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DCIN/PRECHARGE
DCIN/PRECHARGE
DCIN/PRECHARGE
VFKTA
VFKTA
VFKTA
D
44 56
44 56
44 56
of
of
of
0.3
0.3
0.3
Page 45
CyberForum.ru
A
@
@
ACES_50299-01001-W01
ACES_50299-01001-W01
1
1
2
2
3
3
4
4
5
5
6
6
7
7
PJP2
PJP2
8
8
9
9
10
10
1 1
Other component (37.1)
PF2
PF2
21
10A_125V_TR2/6125FF10-R
10A_125V_TR2/6125FF10-R
EC_SMCA
BATT_S1
BATT_P5 EC_SMDA
12
PR14
PR14 1K_0402_1%
1K_0402_1%
VMB
B
PL3
FBMA-L11-201209-121LMA50T_0805
FBMA-L11-201209-121LMA50T_0805
1 2
PL2
FBMA-L11-201209-121LMA50T_0805
FBMA-L11-201209-121LMA50T_0805
1 2
EMI@
EMI@
12
PC7
PC7
1000P_0402_50V7K
1000P_0402_50V7K
EMI@PL3
EMI@
EMI@PL2
EMI@
EMI@
EMI@
12
PC8
PC8
0.01U_0402_25V7K
0.01U_0402_25V7K
BATT+
EMI Part (47.1)
PR16
PR16
6.49K_0402_1%
6.49K_0402_1%
12
12
PR19
PR19
1K_0402_1%
1K_0402_1%
PR20
PR20
100_0402_1%
100_0402_1%
2 2
1 2
PR21
PR21 100_0402_1%
100_0402_1%
1 2
BATT_PRES <41>
EC_SMB_DA1 <38,41,46>
EC_SMB_CK1 <38,41,46>
+3VL
C
OTP (39.7)
ADP_I<41,46>
@PR2
@
0_0402_5%
0_0402_5%
PROCHOT_IN<41> VCIN0_PH<41>
1 2
PR2
D
+3VL
12
PR4
PR1
PR1
1 2
1K_0402_1%
1K_0402_1%
PR3
PR3
1 2
20K_0402_1%
20K_0402_1%
PR5
@PR5
@
0_0402_5%
0_0402_5%
1 2
12
PC11
@PC11
@
0.1U_0402_10V7K
0.1U_0402_10V7K
PR4
12.1K_0402_1%
12.1K_0402_1%
12
PH1
PH1
100K_0402_1%_TSM0B104F4251RZ
100K_0402_1%_TSM0B104F4251RZ
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
BATTERY CONN / OTP
BATTERY CONN / OTP
BATTERY CONN / OTP
VFKTA
VFKTA
VFKTA
D
45 56
45 56
45 56
of
of
of
0.3
0.3
0.3
Page 46
CyberForum.ru
A
B
C
D
for reverse input protection
Charger controller (40.1), Support component (40.2)
13
D
D
2
PQ209
PQ209 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
G
G
S
S
PR226
PR225
PR225
1 1
2 2
3 3
1 2
1M_0402_5%
1M_0402_5%
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
PQ203
PQ203
5
12
PC230
PC230
2200P_0402_50V7K
2200P_0402_50V7K
4
BQ24735_ACDRV_1
Min. Typ Max. H-->L 17.23V L--> H 17.63V
ILIM and external DPM
4 4
A
PR226
1 2
3M_0402_5%
3M_0402_5%
1 2 3
Vin Dectector
3.61A
EMI Part (47.1)
P2P1 B+VIN
1
PQ205
PQ205
2 3
12
12
SI7716ADN-T1-GE3_POWERPAK8-5
SI7716ADN-T1-GE3_POWERPAK8-5
PC231
PC231
0.1U_0402_25V6
0.1U_0402_25V6
12
PR235
PR235
PR234
PR234
4.12K_0603_1%
4.12K_0603_1%
4.12K_0603_1%
4.12K_0603_1%
5
4
PC238
PC238
0.1U_0603_25V7K
0.1U_0603_25V7K
+3VL
PR239 10K_0402_1%PR239 10 K_0402_1%
1
2
0.1U_0402_25V6
0.1U_0402_25V6
12
BQ24735_ACP
BQ24735_CMSRC
BQ24735_ACDRV
1 2
PR211
PR211
0.01_1206_1%
0.01_1206_1%
1 2
PC236
PC236
BQ24735_ACN
BQ24735_ACOK
4
3
12
PC235
PC235
0.1U_0402_25V6
0.1U_0402_25V6
PC239
PC239
1 2
1U_0603_25V6K
1U_0603_25V6K
21
1
2
3
4
5
1UH_NRS4018T1R0NDGJ_3.2A_30%
1UH_NRS4018T1R0NDGJ_3.2A_30%
VIN
2
3
PD230
PD230 BAS40CW_SOT323-3
BAS40CW_SOT323-3
1 12
1 2
PR228
PR228
10_1206_1%
10_1206_1%
BQ24735_VCC
BQ24735_LX
20
PU200
PU200
19
VCC
PAD
ACN
ACP
CMSRC
ACDRV
ACOK
PHASE
BQ24725RGRR_QFN20_3P5X3P5
BQ24725RGRR_QFN20_3P5X3P5
ACDET6IOUT7SDA8SCL9ILIM
ACIN< 27,41>
VIN
12
PR244
PR244
BQ24735_ACDET
422K_0402_1%
422K_0402_1%
12
12
PR245
PR245
PC244
PC244
B
66.5K_0402_1%
66.5K_0402_1%
0.1U_0402_25V6
0.1U_0402_25V6 PC245
PC245
12
100P_0402_50V8J
100P_0402_50V8J
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
EMI@
EMI@
PL201
PL201
1 2
0.047U_0402_25V7K
0.047U_0402_25V7K
PC237
PC237
12
PR229
PR229
2.2_0603_5%
2.2_0603_5%
DH_CHG
BQ24735_BST
17
18
BTST
HIDRV
PR246
@PR246
@
0_0402_5%
0_0402_5%
1 2
Issued Date
Issued Date
Issued Date
12
BQ24735_REGN
16
REGN
LODRV
BATDRV
10
12
12
PC211
PC211
10U_0805_25V6K
10U_0805_25V6K
12
12
PC213
PC213
PC214
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7K
2200P_0402_25V7K
@EMI@ PC214
@EMI@
5
PD231
PD231 RB751V-40_SOD323-2
RB751V-40_SOD323-2
DH_CHG
PC205
PC205
1 2
1U_0603_25V6K
1U_0603_25V6K
15
14
GND
13
SRP
12
SRN
11
BQ24735_ILIM
12
PR242
PR242
100K_0402_1%
100K_0402_1%
12
PC246
@PC246
@
0.1U_0402_10V7K
0.1U_0402_10V7K
PR210
PR210
0_0603_5%
0_0603_5%
1 2
DL_CHG
PR236
PR236
10_0603_1%
10_0603_1%
1 2
SRP
PR237
PR237
6.8_0603_5%
6.8_0603_5%
1 2
SRN
BQ24735_BATDRV
1 2
PR241
PR241
357K_0402_1%
357K_0402_1%
PC243
PC243
0.01U_0402_25V7K
0.01U_0402_25V7K
EC_SMB_CK1 <38,41,45>
EC_SMB_DA1 <38,41,45>
ADP_I <41,45>
Please locate th e RC Near EC chip 2011-02-22
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
4
CSOP1
CSON1
0.1U_0603_16V7K
0.1U_0603_16V7K
+3VALW
Compal Secret Data
Compal Secret Data
Compal Secret Data
C
123
5
4
12
PC242
PC242
Deciphered Date
Deciphered Date
Deciphered Date
PQ201
PQ201 AON7408L
AON7408L
BQ24735_LX
AON7406L
AON7406L
123
5
SI7716ADN-T1-GE3_POWERPAK8-5
SI7716ADN-T1-GE3_POWERPAK8-5
PL202
PL202
1 2
PR206
PR206
@EMI@
@EMI@
4.7_1206_5%
4.7_1206_5%
PC206
PC206
@EMI@
@EMI@
680P_0603_50V8J
680P_0603_50V8J
1 2
PR233
PR233
4.12K_0603_1%
4.12K_0603_1%
CHG
CSOP1
12
BQ24735_BATDRV_1
1
2
PC240
PC240
BQ24735_BATDRV
4.7UH_ETQP3W4R7W FN_5.5A_20%
4.7UH_ETQP3W4R7W FN_5.5A_20%
12
PQ202
PQ202
12
EMI Part (47.1)
VIN
12
PR247
PR247
309K_0402_1%
309K_0402_1%
12
PR249
PR249
47K_0402_1%
47K_0402_1%
For A51 ADP_V function
1
PQ207
PQ207
2 3
PR227
PR227
0.01_1206_1%
0.01_1206_1%
0.1U_0402_25V6
0.1U_0402_25V6
12
4
0.1U_0402_10V7K
0.1U_0402_10V7K
12
PC234
PC234
0.01U_0402_50V7K
0.01U_0402_50V7K
4
3
CSON1
12
PC241
PC241
PR248
PR248
10K_0402_1%
10K_0402_1%
1 2
PC247
@PC247
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
12
PC222
PC222
PC223
PC223
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
CHARGER
CHARGER
CHARGER
10U_0805_25V6K
ADP_V <41>
VFKTA
D
BATT+
46 56
46 56
46 56
of
of
of
0.3
0.3
0.3
Page 47
CyberForum.ru
A
B
C
D
3/5VALW controller (35.1), Support component (35.2)
5V Peak Current 10A OCP current 12.03A FSW=390kHz Delta I=4.29A,ripple=4.29*17m=72.93mV DCR 15.5mohm+/-15%
1 1
ESR 17mohm TYP MAX H/S Rds(on) :27mohm , 34mohm
PC345@
PC345@
100P_0402_50V8J
100P_0402_50V8J
PR333
PR333
0_0402_5%
0_0402_5%
1 2
1 2
PR330
PR330
14K_0402_1%
14K_0402_1%
1 2
PR331
PR331
20K_0402_1%
20K_0402_1%
1 2
BST_3V
UG_3V
LX_3V
LG_3V
499K_0402_1%
499K_0402_1%
1 2
12
PC360
PC360
@PR341
@
0_0402_5%
0_0402_5%
1 2
PR334
PR334
0.1U_0603_25V7K
0.1U_0603_25V7K
PR340
PR340
2.2K_0402_1%
2.2K_0402_1%
1 2
PR341
FB_3V
6
7
8
9
10
PGOOD
BOOT2
UGATE2
PHASE2
LGATE2
PR338
PR338
100K_0402_1%
100K_0402_1%
5
12
PR342
PR342
PR337
PR337
PR357
PR357
56K_0402_1%
56K_0402_1%
1 2
1 2
1 2
137K_0402_1%
137K_0402_1%
2
4
3
FB2
TON
ENTRIP1
ENTRIP2
VIN11ENLDO12SECFB13LDO514LDO3
12
4.7U_0603_10V6K
4.7U_0603_10V6K
12
PC342
PC342
1U_0603_10V6K
1U_0603_10V6K
12
PR332
PC343
PC343
@ PR332
@
1 2
100K_0402_5%
100K_0402_5%
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
FB_5V
143K_0402_1%
143K_0402_1%
1
FB1
BOOT1
UGATE1
PHASE1
LGATE1
PU330
PU330
15
RT8243AZQW_WQFN2 0_3X3
RT8243AZQW_WQFN2 0_3X3
PC344
PC344
EMI Part (47.1)
B+
2 2
EMI@
EMI@
PL331
PL331
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
1 2
+3VALWP
3/5V_B+
PC339
2200P_0402_50V7K
2200P_0402_50V7K
@EMI@ PC339
@EMI@
12
12
PC340
PC340
10U_0805_25V6K
10U_0805_25V6K
PL332
PL332
4.7UH_ETQP3W4R7W FN_5.5A_20%
4.7UH_ETQP3W4R7W FN_5.5A_20%
1
+
+
PC331
PC331
2
150U_D2_6.3VY_R15M
150U_D2_6.3VY_R15M
12
PR336
4.7_1206_5%
4.7_1206_5%
@EMI@ PR336
@EMI@
PC336
680P_0603_50V8J
680P_0603_50V8J
@EMI@ PC336
@EMI@
12
SNUB_3V
12
5
PQ331
PQ331
4
AON7408L
AON7408L
0.1U_0402_10V7K
4
AON7406L
AON7406L PQ332
PQ332
0.1U_0402_10V7K
123
5
123
+3VL
POK<27>
PC335
PC335
1 2
1 2
PR335
PR335
100K_0402_1%
100K_0402_1%
BST1_3V
3/5V_B+
EMI Part (47.1)
3 3
EC_ON<41>
VS_ON<41>
3.3V Peak Current 8A OCP current 9.68A Delta I=1.28A ,ripple=1.28x15m=19.2mV FSW=455kHz DCR 35mohm +/-15% ESR 15mohm TYP MAX
PR350
PR350
30K_0402_1%
30K_0402_1%
1 2
PR351
PR351
19.1K_0402_1%
19.1K_0402_1%
1 2
21
PAD
20
BYP1
19
BST_5V
18
UG_5V
17
LX_5V
16
LG_5V
PR355
PR355
0_0402_5%
0_0402_5%
1 2
BST1_5V
+3VLP
12
PC341
PC341
4.7U_0603_10V6K
4.7U_0603_10V6K
ENLDO <42>
PJ333
@ PJ333
@
+3VLP +3VL
(100mA,40m ils ,Via N O.= 2)
2
JUMP_43X39
JUMP_43X39
112
0.1U_0402_10V7K
0.1U_0402_10V7K
H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :19mohm , 23.5mohm
L/S Rds(on) :10.8mohm , 13.6mohm
3/5V_B+
12
PC361
PC361
10U_0805_25V6K
10U_0805_25V6K
PC355
PC355
1 2
PQ352
PQ352
FDMC7692S_MLP8-5
FDMC7692S_MLP8-5
5
4
4
AON7408L
AON7408L PQ351
PQ351
123
2.2UH_ETQP3W2R2W FN_8.5A_20%
2.2UH_ETQP3W2R2W FN_8.5A_20%
5
12
SNUB_5V
123
12
PL352
PL352
1 2
PR356
PR356
@EMI@
@EMI@
4.7_1206_5%
4.7_1206_5%
PC356
PC356
@EMI@
@EMI@
680P_0603_50V8J
680P_0603_50V8J
EMI Part (47.1)
PJ331
@ PJ331
+3VALWP +3VALW
+5VALWP +5VALW
@
112
JUMP_43X118
JUMP_43X118
@ PJ332
@
112
JUMP_43X118
JUMP_43X118
PJ332
+5VALWP
1
+
+
PC351
PC351
2
150U_D2_6.3VY_R15M
150U_D2_6.3VY_R15M
2
2
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
3VALW/5VALW
3VALW/5VALW
3VALW/5VALW
VFKTA
D
47 56
47 56
47 56
of
of
of
0.3
0.3
0.3
Page 48
CyberForum.ru
DDR controller (35.3), Support component (35.4)
EMI@
B+
EMI@
PL151
PL151
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
1.5V_B+
EMI Part (47.1)
BST_1.5V-1
PR155
PR155
0_0603_5%
0_0603_5%
1 2
A
BST_1.5V
+1.5V
PR158
PR158
27.4K_0402_1%
27.4K_0402_1%
1 2
PC162
PC162
1U_0603_10V6K
1U_0603_10V6K
1 2
VDD_1.5V
+5VALW
0.75VR_EN<43>
DH_1.5V
CS_1.5V
1.5V_B+
15
LGATE
14
PGND
13
CS
12
VDDP
11
VDD
PR161
PR161
510K_0402_1%
510K_0402_1%
1 2
17
16
PHASE
RT8207MZQW_W QFN20_3X3
RT8207MZQW_W QFN20_3X3
PGOOD
10
PR164
PR164
0_0402_5%
0_0402_5%
19
18
BOOT
UGATE
S5
TON
8
7
9
TON_1.5V
12
EN_0.75VSP
12
20
PU150
PU150
VTT
PAD
VLDOIN
VTTGND
VTTSNS
GND
VTTREF
VDDQ
FB
S3
6
FB_1.5V
PC167
@PC167
@
0.1U_0402_10V7K
0.1U_0402_10V7K
21
1
2
3
4
5
VTTREF_1.5V
PR162
PR162 10K_0402_1%
10K_0402_1%
1 2
PR160
PR160
10.2K_0402_1%
10.2K_0402_1%
+1.5VP
12
12
12
PC160
PC160
PC159
PC159
10U_0805_6.3V6K
10U_0805_6.3V6K
10U_0805_6.3V6K
10U_0805_6.3V6K
+1.5VP
12
PC152
2200P_0402_50V7K
2200P_0402_50V7K
@EMI@ PC152
@EMI@
PL152
0.68UH_PCMB053T-1R0MS_8.5A_20%
0.68UH_PCMB053T-1R0MS_8.5A_20%
+1.5VP
1
+
PC157
2
1 1
PJ153
@ PJ15 3
@
2
112
JUMP_43X39
JUMP_43X39
PL152
12
12
390U_2.5V_M+PC157
390U_2.5V_M
SNUB_+1.5VP
12
(0.5A,40mi ls ,Via NO .= 1)
12
PC154
PC154
10U_0805_25V6K
10U_0805_25V6K
PQ151
PQ151
AON7408L
AON7408L
123
PR156
@EMI@PR156
@EMI@
4.7_1206_5%
4.7_1206_5%
PC156
@EMI@PC156
@EMI@
680P_0402_50V7K
680P_0402_50V7K
+1.5VP
(15A, 600m ils ,Via N O.= 30) OCP=18A
PQ152
PQ152
FDMC7692S_MLP8-5
FDMC7692S_MLP8-5
123
SYSON<41>
@
@
2
JUMP_43X118
JUMP_43X118
@
@
2
JUMP_43X118
JUMP_43X118
PJ151
PJ151
112
PJ152
PJ152
112
PC164
PC164
PC166
@PC166
@
SW_1.5V
DL_1.5V
12
EN_1.5V
PC155
PC155
5
5
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
4
PR159
PR159
5.1_0603_5%
5.1_0603_5%
4
1 2
+5VALW
1U_0603_10V6K
1U_0603_10V6K
PR163
@ PR 163
@
0_0402_5%
0_0402_5%
1 2
12
0.1U_0402_10V7K
0.1U_0402_10V7K
+1.5V+0.75VSP +0.75VS
+0.75VSP
12
PC163
PC163
0.033U_0402_16V7K
0.033U_0402_16V7K
PJ180
@ PJ180
@
+1.8VSP +1.8VS
JUMP_43X79
JUMP_43X79
112
2
1.5V Peak Current 16.8A
1.8VS controller (35.15), Support component (35.16)
OCP current 20 A FSW=495kHz DCR 13mohm ESR 9mohm TYP MAX
+5VALW
H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm
STATE S3 S5 1.5VP VTT_REFP 0.75VSP
S0
S3
S4/S5
Hi Hi
HiLo
Lo Lo
On
On
Off (Discharge)
On
On
Off (Discharge)
On
Off (Hi-Z)
Off (Discharge)
SUSP#<41,43,49>
Note: S3 - sleep ; S5 - power off
PL181
PL181
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
PR181
@PR181
@
1 2
0_0402_5%
0_0402_5%
499K_0402_1%
499K_0402_1%
12
PC184
PC184 22U_0805_6.3VAM
22U_0805_6.3VAM
EN_1.8V
12
@
@
PR182
PR182
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
12
PC185
PC185
0.1U_0402_10V7K
0.1U_0402_10V7K
@
@
SY8032ABC_SOT23-6
SY8032ABC_SOT23-6
4
5
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
PU180
PU180
IN
PG
GND
FB6EN
3
2
1
LX_1.8V
Deciphered Date
Deciphered Date
Deciphered Date
LX
Compal Secret Data
Compal Secret Data
Compal Secret Data
PL182
1 2
12
1 2
680P_0402_50V7K
680P_0402_50V7K
PL182
PR183
PR183
20K_0402_1%
20K_0402_1%
FB_1.8V
1UH_NRS4018T1R0NDGJ_3.2A_30%
1UH_NRS4018T1R0NDGJ_3.2A_30%
PR186
PR186
4.7_0402_1%
4.7_0402_1%
PC186
PC186
12
+1.8VSP
12
PC187
PC187
68P_0402_50V8J
68P_0402_50V8J
12
PR184
PR184
10K_0402_1%
10K_0402_1%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
12
PC183
PC183
PC182
PC182
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1.5VP/0.75VSP/1.8VSP
1.5VP/0.75VSP/1.8VSP
1.5VP/0.75VSP/1.8VSP
VFKTA
48 56
48 56
48 56
of
of
of
0.3
0.3
0.3
Page 49
CyberForum.ru
5
D D
4
3
2
1
1.05VCCP controller (35.5), Support component (35.6)
PR402
PR402
0_0402_5%
0_0402_5%
12
12
PC402
@PC402
@
0.1U_0402_16V7K
0.1U_0402_16V7K
SUSP# <41,43,48>
@EMI@
EMI Part (47.1)
PL401
PL401
HCB2012KF-121T50_0805 EMI@
C C
B B
HCB2012KF-121T50_0805 EMI@
B+
The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high respectively.
12
12
PC404
2200P_0402_50V7K
2200P_0402_50V7K
@EMI@ PC404
@EMI@
+3VS
VCCP_PWRGOOD<43,50>
12
PC401
PC401
10U_0805_25V6K
10U_0805_25V6K
1 2
PR401
PR401
100K_0402_5%
100K_0402_5%
+1.05VSP_B+
+3VS
PGD_1.05V
PU400
PU400
8
IN
EN
9
3
2
BS
LX
GND
FB
BYP
ILMT
PG
LDO
SY8208DQNC_QFN10_3X3
SY8208DQNC_QFN10_3X3
1
PC406
PC406
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
6
10
4
7
5
12
PC412
PC412
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
12
@EMI@
PR403
PR403
4.7_1206_5%
4.7_1206_5%
1 2
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1UH_VMPI0703AR-1R0M-Z01_11A_20%
SW_+1.05VSP
+3VALW
PC413
PC413
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
EMI Part (47.1)
SNUB_+1.05VSP
PL402
PL402
1 2
680P_0603_50V7K
680P_0603_50V7K
12
PR404
PR404
75K_0402_1%
75K_0402_1%
12
PR405
PR405 100K_0402_1%
100K_0402_1%
@EMI@
@EMI@
PC403
PC403
1 2
12
12
+1.05VS_VCCPP
12
12
12
PC410
PC410
22U_0603_6.3V6M
22U_0603_6.3V6M
PJ401
@ PJ401
@
2
JUMP_43X118
JUMP_43X118
12
112
PC411
PC411
22U_0603_6.3V6M
22U_0603_6.3V6M
VCCIO_SENSE <8>
PC414
PC414
0.1U_0402_16V7K
0.1U_0402_16V7K
PC407
PC407
4700P_0402_16V7K
4700P_0402_16V7K
PC408
PC408
PC409
PC409
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR413
PR413
100_0402_1%
100_0402_1%
12
+1.05VS_VCCPP +1.05VS_VCCP
(17A,680mi ls ,Via NO .=34) OCP=23.91A
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2013/09/242012/09/24
2013/09/242012/09/24
2013/09/242012/09/24
2
Title
+1.05VS_VCCP
+1.05VS_VCCP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
+1.05VS_VCCP
VFKTA
Thursday, January 17, 2013
Thursday, January 17, 2013
Thursday, January 17, 2013
5649
5649
5649
of
1
0.3
0.3
0.3
Page 50
CyberForum.ru
5
4
3
2
1
VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.85V 1 0 0.775V 1 1 0.75V
D D
VCCSA controller (35.17), Support component (35.18)
PJ602
@ PJ602
@
112
JUMP_43X118
JUMP_43X118
PR611
PEN@ PR611
PEN@
+1.05VS_VCCP +VCCSA
1 2
0.005_1206_1%
0.005_1206_1%
+VCCSA+VCCSAP
2
C C
SA_PGOOD<41>
B B
+1.05VS_VCCP
A A
2
JUMP_43X79
JUMP_43X79
(6A, 240mils ,Via NO.= 6)
PJ601
@ PJ601
@
+3VS
12
+VCCSA_B+
PR610
PR610
100K_0402_5%
100K_0402_5%
VCCP_PWRGOOD<43,49>
112
+VCCSA_B+
12
PC628
PC628
22U_0603_6.3V6M
22U_0603_6.3V6M
+5VALW
PR601
@PR60 1
@
0_0402_5%
0_0402_5%
1 2
12
PU601
PC626
PC626
22U_0603_6.3V6M
22U_0603_6.3V6M
12
PC624
PC624
PC629
PC629
1U_0603_6.3V6M
1U_0603_6.3V6M
PU601
9
GND
5
VIN
6
VPP
7
POK
8
VEN/MODE
G978F11U_SO8
G978F11U_SO8
12
1U_0603_6.3V6M
1U_0603_6.3V6M
4
Vo
3
PR621
@PR62 1
@
Vo
0_0402_5%
0_0402_5%
1 2
2
PR622
@PR62 2
@
D1
0_0402_5%
0_0402_5%
1 2
1
D0
H_VCCSA_VID1 <9>
H_VCCSA_VID0 <9>
12
12
12
PC616
PC616
PC615
PC615
PC613
PC613
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
12
PC618
PC618
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+VCCSAP
0.9V
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
VCC_SAP
VCC_SAP
VCC_SAP
VFKTA
VFKTA
VFKTA
1
50 56
50 56
50 56
of
of
of
0.3
0.3
0.3
Page 51
CyberForum.ru
5
4
3
2
1
CPU_Core controller (36.1), Support component (36.3)
local sense reve se HW
PH5
PH5 10K_0402_1%_ERTJ0EG103FA
D D
.1U_0402_16V7K
.1U_0402_16V7K
PR549
PR549
3.83K_0402_1%
3.83K_0402_1%
12
PC550
PC550
1 2
1 2
PC549
PC549
1 2
PR548
PR548
1 2
0_0402_5%
0_0402_5%
PR560
PR560
2K_0402_1%
2K_0402_1%
1 2
1 2
PR566
PR566
499_0402_1%
499_0402_1%
PR567
PR567
1.91K_0402_1%
1.91K_0402_1%
1 2
12
PR553
PR553
@
@
499_0402_1%
499_0402_1%
12
0.1U_0402_16V7K
0.1U_0402_16V7K
C C
VR_ON<41>
VR_SVID_CLK<8>
VR_SVID_ALRT#<8>
VR_SVID_DAT<8>
VR_HOT#<41>
PC547
@ PC547
@
47P_0402_50V8J
47P_0402_50V8J
+1.05VS_VCCP +3VS
B B
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
10K_0402_1%_ERTJ0EG103FA
VSUMG-
12
12
PC541
PC541
VSUMG+
PR547 27.4K_0402_1%PR547 27.4K_0402_1%
1 2
1 2
PH2 470K_0402_5%_ TSM0B474J4702REPH2 470K_0402_5%_ TSM0B474J4702RE
12
PR554
130_0402_1%
PR554
130_0402_1%
PC548
@PC548
@
1 2
PR568
PR568
137K_0402_1%
137K_0402_1%
12
PR545
PR545
2.61K_0402_1%
2.61K_0402_1%
12
12
@
@
PR555
PR555
PR556
PR556
75_0402_5%
75_0402_5%
54.9_0402_1%
54.9_0402_1%
PR561
PR561
42.2K_0402_1%
42.2K_0402_1%
1 2
PC551
PC551
68P_0402_50V8J
68P_0402_50V8J
1 2
150P_0402_50V8J
150P_0402_50V8J
1 2
12
PR543
PR543 11K_0402_1%
11K_0402_1%
12
PC554
PC554
+5VS
12
PH3
PH3
12
470K_0402_5%_ TSM0B474J470 2RE
470K_0402_5%_ TSM0B474J470 2RE
0.1U_0603_25V7K
0.1U_0603_25V7K
12
PC542
PC542
NTCG
SCLK
ALERT#
SDA
PR552
PR552
1 2
0_0402_5%
0_0402_5%
PR557
PR557
27.4K_0402_1%
27.4K_0402_1%
PR559
PR559
3.83K_0402_1%
3.83K_0402_1%
PC537
PC537
6800P_0402_25V7K
6800P_0402_25V7K
1 2
12
PR537
PR537 649_0402_1%
649_0402_1%
1 2
PR539
PR539 422_0402_1%
422_0402_1%
PC543
PC543
12
0.022U_0402_25V7K
0.022U_0402_25V7K
PU500
PU500
1
NTCG
2
VR_ON
3
SCLK
4
ALERT#
5
SDA
6
VR_HOT#
7
NTC
8
ISEN2
VCC_AXG_SENSE<9> VSS_AXG_SENSE<9>
32
33
PAD
ISUMPG
ISEN19ISUMP10ISUMN11RTN12FB13COMP14PGOOD15BOOT1
28
29
30
31
FBG
RTNG
ISUMNG
ISL95833HRTZ-T_TQFN32_4X4
ISL95833HRTZ-T_TQFN32_4X4
PC555
PC555
6800P_0402_25V7K
6800P_0402_25V7K
+3VS
12
27
COMPG
12
PR563
PR563
12
137K_0402_1%
137K_0402_1%
1 2
12
PR544
PR544
PR546 1.91K_0402_1%PR546 1.91K_0402 _1%
25
26
BOOTG
PGOODG
16
12
PR564
PR564
649_0402_1%
649_0402_1%
68P_0402_50V8J
68P_0402_50V8J
PR540
PR540
150P_0402_50V8J
150P_0402_50V8J
13.3K_0402_1%
13.3K_0402_1%
UGATEG
PHASEG
LGATEG
VCCP
VDD
PWM2
LGATE1
PHASE1
UGATE1
PR558
PR558
1 2
1.91K_0402_1%
1.91K_0402_1%
422_0402_1%
422_0402_1%
1 2
PC538
PC538
PC540
PC540
1 2
PR542
PR542
2K_0402_1%
2K_0402_1%
24
23
22
21
20
19
18
17
12
PC553
PC553
0.022U_0402_16V7K
0.022U_0402_16V7K
1000P_0402_50V7K
1000P_0402_50V7K
1 2
12
12
BOOTG
UGATEG
PHASEG
LGATEG
PC545
PC545 1U_0603_10V6K
1U_0603_10V6K
LGATE1
PHASE1
UGATE1
BOOT1
12
local sense reve se HW
A A
VCCSENSE<8>
VSSSENSE<8>
local sense reve se HW
5
PC557
330P_0402_50V7K
330P_0402_50V7K
1 2
1 2
PC558
PC558
0.01U_0402_25V7K
0.01U_0402_25V7K
@PC557
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC535
@ PC535
@
PR538
PR538
PC539
PC539
499_0402_1%
499_0402_1%
1 2
470P_0402_50V7K
470P_0402_50V7K
1 2
PR541
PR541
2.61K_0402_1%
2.61K_0402_1%
PC544
PC544 470P_0402_50V7K
470P_0402_50V7K
12
12
VGATE <27,41>
12
PC552
PC552
PR565 11K_0402 _1%PR565 11K_0 402_1%
0.1U_0603_25V7K
0.1U_0603_25V7K
3
12
12
PC536
PC536
0.01U_0402_25V7K
0.01U_0402_25V7K
PR528
PR528 0_0603_5%
0_0603_5%
PR530
PR530
2.2_0603_5%
2.2_0603_5%
1 2
12
12
PC546
PC546
1U_0603_10V6K
1U_0603_10V6K
UGATEG
PHASEG
BOOTG
1 2
0.22U_0603_16V7K
0.22U_0603_16V7K
UGATE1-1
1 2
PC527
PC527
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
Rds(on)=2.2m-3.3m ohm
Rds(on)=2.2m-3.3m ohm
Rds(on)=2.2m-3.3m ohm Rds(on)=2.2m-3.3m ohm
For ULT 17W 1+1
For ULT 17W 1+1
For ULT 17W 1+1For ULT 17W 1+1 CPU_CORE LL= -2.9mΩ, Fsw = 450 kHz
CPU_CORE LL= -2.9mΩ, Fsw = 450 kHz
CPU_CORE LL= -2.9mΩ, Fsw = 450 kHzCPU_CORE LL= -2.9mΩ, Fsw = 450 kHz Icc_TDC=16A, Iocp_cpu=39.6A
Icc_TDC=16A, Iocp_cpu=39.6A
Icc_TDC=16A, Iocp_cpu=39.6A Icc_TDC=16A, Iocp_cpu=39.6A GFX_CORE LL= -3.9mΩ, Fsw = 450 kHz
GFX_CORE LL= -3.9mΩ, Fsw = 450 kHz
GFX_CORE LL= -3.9mΩ, Fsw = 450 kHzGFX_CORE LL= -3.9mΩ, Fsw = 450 kHz Icc_TDC=21.5A, Iocp_gfx=39.6A
Icc_TDC=21.5A, Iocp_gfx=39.6A
Icc_TDC=21.5A, Iocp_gfx=39.6A Icc_TDC=21.5A, Iocp_gfx=39.6A
PR504
PR504 0_0603_5%
0_0603_5%
1 2
UGATEG-1
12
PC516
PC516
0.22U_0603_16V7K
0.22U_0603_16V7K
12
LGATEG
PR516
PR516
2.2_0603_5%
2.2_0603_5%
Rds(on)=2.2m-3.3m ohm
Rds(on)=2.2m-3.3m ohm
Rds(on)=2.2m-3.3m ohm Rds(on)=2.2m-3.3m ohm
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
PQ502
PQ502
4
4
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
UGATE1
PHASE1
BOOT1
LGATE1
+5VS
PR551
PR551
@
@
1_0603_5%
1_0603_5%
PR550
PR550 0_0603_5%
0_0603_5%
VSUM+
12
PR562
PR562
12
2.61K_0402_1%
2.61K_0402_1%
PH4
PH4
10K_0402_1%_ERTJ0EG103FA
10K_0402_1%_ERTJ0EG103FA
VSUM-
Close Phase 1 choke
12
PC556
PC556
.1U_0402_16V7K
.1U_0402_16V7K
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
4
4
5
5
+CPU_B+
5
PQ501
PQ501
AON7518_DFN8-5
AON7518_DFN8-5
123
5
123
+CPU_B+
PQ503
PQ503
AON7518_DFN8-5
AON7518_DFN8-5
123
123
PQ504
PQ504
2
PL501
PL501
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
12
PC531
PC531
10U_0805_25V6K
10U_0805_25V6K
PC506
@EMI@ PC506
@EMI@
12
PC533
PC533
10U_0805_25V6K
10U_0805_25V6K
12
12
PC532
PC532
10U_0805_25V6K
10U_0805_25V6K
12
PR506
4.7_1206_5%
4.7_1206_5%
VSUM+
12
@EMI@ PR506
@EMI@
680P_0402_50V7K
680P_0402_50V7K
VSUM-
12
PC534
PC534
10U_0805_25V6K
10U_0805_25V6K
12
PR526
4.7_1206_5%
4.7_1206_5%
12
@EMI@ PR526
@EMI@
PC526
@EMI@ PC526
@EMI@
680P_0402_50V7K
680P_0402_50V7K
1
+
+
PC510
PC500
PC500
2
100U_25V_M
100U_25V_M
@EMI@ PC510
@EMI@
2200P_0402_50V7K
2200P_0402_50V7K
0.22UH_MMD-06DZNR22MEO1L_25A_20%
0.22UH_MMD-06DZNR22MEO1L_25A_20%
1 2
PR532
PR532
3.65K_0603_1%
3.65K_0603_1%
1 2
PR536
PR536
1_0402_5%
1_0402_5%
0.22UH_MMD-06DZNR22MEO1L_25A_20%
0.22UH_MMD-06DZNR22MEO1L_25A_20%
12
PR513
PR513
3.65K_0603_1%
3.65K_0603_1%
VSUMG+
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1 2
PL502
PL502
12
PL503
PL503
12
12
PR514
PR514
VSUMG-
CPU_CORE
CPU_CORE
CPU_CORE
VFKTA
1_0402_5%
1_0402_5%
1
+CPU_CORE
B+
+GFX_CORE
51 56Thursday, January 17, 2013
51 56Thursday, January 17, 2013
51 56Thursday, January 17, 2013
of
of
of
0.3
0.3
0.3
Page 52
CyberForum.ru
5
4
CPU_Core output CAP (Including MLCC) 36.4
+GFX_CORE
3
2
1
GFX output CAP (Including MLCC) 36.5
+CPU_CORE
1
12
PC806
PC806
2.2U_040 2_6.3V6M
D D
2.2U_040 2_6.3V6M
12
PC807
PC807
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC808
PC808
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC809
PC809
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC810
PC810
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
PC854
PC854
PC853
PC853
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
1
PC855
PC855
PC856
PC856
PC857
PC857
PC858
2
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PC858
2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VCCP output Cap (Including MLCC) 36.6
1
1
+1.05VS_VCCP
12
PC811
PC811
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC812
PC812
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC813
PC813
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC814
PC814
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC815
PC815
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
12
PC816
PC816
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
C C
12
PC817
PC817
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC818
PC818
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC819
PC819
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC820
PC820
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
PC821
PC821
2.2U_040 2_6.3V6M
2.2U_040 2_6.3V6M
12
12
12
PC860
PC860
PC859
PC859
10U_0603_6.3V6M
10U_0603_6.3V6M
12
PC865
PC865
PC866
PC866
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC861
PC861
PC862
PC862
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
PC867
PC867
PC868
PC868
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC864
PC864
PC863
PC863
10U_0603_6.3V6M
10U_0603_6.3V6M
12
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
PC870
PC870
PC869
PC869
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
12
12
12
PC454
PC454
PC417
PC417
PC418
PC418
PC419
PC419
PC420
PC420
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
12
PC428
PC428
PC427
PC427
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
12
PC429
PC429
PC430
PC430
PC431
PC431
PC432
PC432
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC422
PC422
PC421
PC421
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
PC433
PC433
PC434
PC434
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
10U_0603_6.3V6M
10U_0603_6.3V6M
12
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC424
PC424
PC423
PC423
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
PC435
PC435
PC436
PC436
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC425
PC425
10U_0603_6.3V6M
10U_0603_6.3V6M
12
PC437
PC437
1U_0402_6.3V6K
1U_0402_6.3V6K
PC453
PC453
PC426
PC426
@
@
@
@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12
PC438
PC438
PC439
PC439
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+CPU_CORE
1
PC834
PC834 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC822
PC822 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
B B
1
PC828
PC828 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC835
PC835 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC823
PC823 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC829
PC829 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC824
PC824 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC830
PC830 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC825
PC825 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC831
PC831 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC826
PC826 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC832
PC832 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC827
PC827 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
1
PC833
PC833 22U_060 3_6.3V6M
22U_060 3_6.3V6M
2
12
12
12
12
PC872
PC872
PC873
PC873
PC874
PC874
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
+
+
PC852
PC852
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
12
PC876
PC876
PC875
PC875
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
12
12
PC441
PC441
PC440
PC440
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC442
PC442
PC443
PC443
PC444
PC444
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC446
PC446
PC445
PC445
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC447
PC447
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC448
PC448
PC449
PC449
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC451
PC451
PC450
PC450
1U_0402_6.3V6K
1U_0402_6.3V6K
PC452
PC452
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
+
+
2
PC416
PC416
560U_D2_2VM_R4.5M
560U_D2_2VM_R4.5M
+CPU_CORE
1
+
+
PC802
PC802 470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2
A A
5
1
+
+
PC803
PC803 470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2
4
Chief River ULV 330uF*9m 22uF 10uF
CPU
GFX_CORE
1.05V_VCCP
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2 14
6 6
10
Compal Secret Data
Compal Secret Data
2012/09/ 24 2013/09/ 24
2012/09/ 24 2013/09/ 24
2012/09/ 24 2013/09/ 24
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2.2uF 1uF
16
2
470uF 560uF
11
26
Title
Title
Title
PWR - PROCESSOR DECOUPLING
PWR - PROCESSOR DECOUPLING
PWR - PROCESSOR DECOUPLING
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
VFKTA
VFKTA
VFKTA
1
of
52 56Thursday, January 17, 20 13
of
52 56Thursday, January 17, 20 13
of
52 56Thursday, January 17, 20 13
0.3
0.3
0.3
Page 53
CyberForum.ru
A
B
C
D
+VGA_CORE
1 1
+VGA_CORE
1
2
2 2
PRV11 = 71.5K ==>Fsw = 450KHz
VGA_VSS_SENSE<15>
VGA_VCC_SENSE<15>
Under VGA Core
12
12
12
PC903
PC903
PC904
PC904
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
12
12
PC919
PC919
PC918
PC918
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
Near VGA Core
12
PC923
PC923
PC924
PC924
22U_0603_6.3V6M
22U_0603_6.3V6M
47U_0805_6.3V6M
47U_0805_6.3V6M
12
PC905
PC905
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
PC920
PC920
0.1U_0402_10V7K
0.1U_0402_10V7K
12
PC925
PC925
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
PR917
@PR917
@
0_0402_5%
0_0402_5%
1 2
PR920
@PR920
@
0_0402_5%
0_0402_5%
1 2
PC909
PC909
PC921
PC921
12
12
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
PC926
PC926
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
+VGA_B+
12
PC907
PC907
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
PC927
PC927
412K_0402_1%
412K_0402_1%
12
PC936
PC936
1000P_0402_50V7K
1000P_0402_50V7K
PC908
PC908
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
PR928
@PR928
@
47P_0402_50V8J
47P_0402_50V8J
N14P-GV2 N14M-GL
3 3
R1 PR913
R2 PR915
R3 PR930
R4 PR914
R5 PR904
C PC940
20 Kohm
20 Kohm
2 Kohm
18 Kohm
0 Kohm
2.7 nF
GB4-128 package
12
12
PC911
PC911
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
PC952
@ PC952
@
12
1 2
PR919
PR919
51_0402_1%
51_0402_1%
1 2
PC912
PC912
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
PC913
PC913
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
PC953
@ PC953
@
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
GV@ PR915
GV@
20K_0402_1%
20K_0402_1%
VREF
1500P_0402_50V7K
1500P_0402_50V7K
PR914
GV@ PR914
GV@
18K_0402_1%
18K_0402_1%
GV@ PC940
GV@
PC939
PC939
100P_0402_50V8J
100P_0402_50V8J
12
PC958
PC958
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
PC929
PC929
PC928
PC928
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
PR904
GV@ PR904
GV@
0_0402_5%
0_0402_5%
12
PC934 .01U_0603_16V7KPC934 .01U_0603_16V7K
PC937
PC937
1 2
PR921
PR921
10K_0402_1%
10K_0402_1%
1 2
39 Kohm
30 Kohm
3 Kohm
24 Kohm
3 Kohm
1.8 nF
12
PC950
@ PC950
@
12
PC933
12
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
PC954
@ PC954
@
12
1 2
FB2_VGA
PR913
PR915
PR930
PR914
PR904
PC940
12
PC951
@ PC951
@
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
12
12
1 2
82K_0402_1%
82K_0402_1%
PC956
@ PC956
@
12
PC955
@ PC955
@
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
PR915
@PC933
@
12
PC940
2700P_0402_50V7K
2700P_0402_50V7K
PR931 34K_0402_1%P R931 34K_0402_1%
PC938 10P_0402_50V8JPC938 10P_0402_50V8J
1 2
GL@ PR913
GL@
39K_0402_1%
39K_0402_1%
GL@ PR915
GL@
30K_0402_1%
30K_0402_1%
GL@ PR930
GL@
3K_0402_1%
3K_0402_1%
GL@ PR914
GL@
24K_0402_1%
24K_0402_1%
GL@ PR904
GL@
3K_0402_1%
3K_0402_1%
GL@ PC940
GL@
1800P_0402_50V7K
1800P_0402_50V7K
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
PR922
PR922
12
PC949
@ PC949
@
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
GV@ PR913
GV@
20K_0402_1%
20K_0402_1%
12
GV@ PR930
GV@
2K_0402_1%
2K_0402_1%
REFIN
VREF
FB_VGA
COMP_VGAFB1_VGA
VGA_CORE controller (43.1), Support component (43.2)
PC902
@ PC902
@
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
5
PQ901
PQ901
AON7518
AON7518
PQ902
PQ902
TPCA8059
TPCA8059
PQ903
PQ903
AON7518
AON7518
PQ904
PQ904
TPCA8059
TPCA8059
4
4
123
5
123
680P_0402_50V7K
680P_0402_50V7K
EMI Part (47.1)
5
4
123
5
4
123
EMI@
EMI@
4.7_1206_5%
4.7_1206_5%
EMI@
EMI@
PC906
PC906
EMI@ PC916
EMI@
680P_0402_50V7K
680P_0402_50V7K
<13>
PSI
DGPU_VID
PR909
0_0402_5%
0_0402_5%
@ PR909
@
1 2
GPU_VID
PR913
12
VIDBUF
PR930
FS
12
PC945
PC945
@
@
6
PU900
PU900
7
REFIN
8
VREF
9
FS
10
FBRTN
11
FB
12
COMP
GND
25
47P_0402_50V8J
47P_0402_50V8J
12
12
PR918
PR918
@
@
24K_0402_1%
24K_0402_1%
PR926 5.9K_0402_1%PR926 5.9K_0402_1%
+5VS
VREF
<13>
+3VS_DGPU
+3VS_DGPU
12
12
PR912
PR912
10K_0402_5%
10K_0402_5%
1 2
PR932 0_0402_5%@ PR932 0_0 402_5%@
PR929 10K_0402_5%P R929 10K_0402_ 5%
UGATE1_VGA
EN_VGA
PSI_VGA
3
4
2
5
EN
PSI
VID
VIDBUF
TSNS13TALERT#14VCC15PGOOD16HG217BST2
HG1
VCC_VGA
PR925 10K_0402_5%P R925 10K_0402_5%
PR927 2.2_0402_5%PR92 7 2.2_0402_5%
1 2
PC946
PC946
1U_0402_10V6K
1U_0402_10V6K
1 2
PC930 .1U_0402 _16V7KPC930 .1U_0402_16V7K
1
BST1
PH1
LG1
PGND
PVCC
LG2
PH2
18
NCP81172MNTWG_QFN24_4X 4
NCP81172MNTWG_QFN24_4X 4
BOOT2_VGA
UGATE2_VGA
12
12
PR907
PR907
2.2_0603_5%
2.2_0603_5%
BOOT1_VGA
PHASE1_VGA
24
23
22
21
PVCC_VGA
20
19
VGA_PWROK <17,30>
+3VS
+5VS
12
BOOT1_2_VGA
LGATE1_VGA
PR901
@PR901
@
0_0402_5%
0_0402_5%
0.22U_0603_10V7K
0.22U_0603_10V7K
12
LGATE2_VGA
PC922
PC922
1 2
PC935 4.7U_0603_10V6KPC935 4.7U_0603_10V6K
PR924
PR924
2.2_0603_5%
2.2_0603_5%
PHASE2_VGA
1 2
12
PR908
PR908
0_0603_5%
0_0603_5%
12
PR923
PR923
0_0603_5%
0_0603_5%
BOOT2_2_VGA
12
UGATE1_2_VGA
PR911
PR911
@
@
10K_0402_5%
10K_0402_5%
+5VS
12
UGATE2_2_VGA
0.22U_0603_10V7K
0.22U_0603_10V7K
PC944
PC944
1 2
MDU1512, Rdson(max)=5mohm
+VGA_B+
12
PC915
2200P_0402_50V7K
2200P_0402_50V7K
EMI@ PC915
EMI@
0.22UH_MMD-06DZNR22MEO1L_25 A_20%
0.22UH_MMD-06DZNR22MEO1L_25 A_20%
1 2
12
PR906
PR906
SNUB1_VGA
12
0.22UH_MMD-06DZNR22MEO1L_25 A_20%
0.22UH_MMD-06DZNR22MEO1L_25 A_20%
12
PR916
EMI@ PR916
EMI@
4.7_1206_5%
4.7_1206_5%
SNUB2_VGA
12
PC916
12
PL903
PL903
EMI Part (47.1)
12
PC917
PC917
PC910
PC910
10U_0805_25V6K
10U_0805_25V6K
7x7
+VGA_B+
12
12
PC942
PC942
10U_0805_25V6K
10U_0805_25V6K
7x7
PL904
PL904
1 2
EMI@
EMI@
PL901
PL901
SUPPRE_ FBMA-L11-453215-800LMA90T_1 812
SUPPRE_ FBMA-L11-453215-800LMA90T_1 812
10U_0805_25V6K
10U_0805_25V6K
12
+VGA_CORE
1
+
+
PC931
PC931
2
560U_D2_2VM_R4.5M
560U_D2_2VM_R4.5M
PC943
PC943
10U_0805_25V6K
10U_0805_25V6K
1
+
+
PC947
PC947
2
330U_D2_2V_Y
330U_D2_2V_Y
B+
+VGA_CORE
EMI Part (47.1)
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
+VGA_COREP
+VGA_COREP
+VGA_COREP
VFKTA
D
53 56
53 56
53 56
of
of
of
0.3
0.3
0.3
Page 54
CyberForum.ru
5
4
3
2
Version change list (P.I.R. List) Page 1 of 1
for PWR
Reason for change PG# Modify List Date PhaseItem
1
1
D D
2
45
45
3
4
5
6
7
8
9
C C
10
11
12
13
14
15
16
17
B B
18
19
20
21
22
23
24
25
A A
26
27
5
4
46
47
49
49
49
49
48
47
47
44
44
46
47
49
49
45
45
47
47
45
46
47
48
43
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
2012/09/24 2013/09/24
2012/09/24 2013/09/24
2012/09/24 2013/09/24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PIR (PWR)
PIR (PWR)
PIR (PWR)
VFKTA
54 56Thursday, January 17, 2013
54 56Thursday, January 17, 2013
54 56Thursday, January 17, 2013
1
0.3
0.3
0.3
of
of
of
Page 55
CyberForum.ru
A
B
C
D
E
HW PIR (Product Improve Record)
VFKTA LA-9861P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2
NO DATE PAGE MODIFICATION LIST PURPOSE
---------------------------------------------------------------------------------------------------------------------------------------------------
1 1
1. 11/13 39 Add CA39 (SE102104K00) BOM structure change
2. 11/13 39 Reserve RA31,RA38 EMI request
3. 11/13 41 Change RB36 from 2.2k to 0 ohm and CB50 to @ Design change
4. 11/13 15 Update VGA strap pin all page Design change
5. 11/21 42 Remove NFC function Design change
6. 11/21 42 Update CPU config&PN Design change
7. 11/26 23 change BOM structure C238,C239,C240,C241,C242,C243 to CRT@EMI@ EMI request
8. 11/26 22 Add D92 for LID_SW#_D to isolate the +3VL power rail from LID_SW# Design change
10. 11/26 37 Change JCARD.10 to SDWP# and JCARD.11 to SDCD. Design change
37 Add QW1, RW3, RW4 for normal close type connector.
11. 11/26 40 Update HDMI power circuit Design change
12. 11/26 40 Change JSPK from 8 pin to 6 pin (SP02000WS00) Design change
13. 11/26 40 Remove SPK_DET1 and change SPK_DET0 net name to SPK_DET Design change
14. 11/26 39 Change RA50 to 269@ Design change
2 2
15. 11/26 40 Reverse JSPK to keep same layout routing on MB Design change
16. 11/27 30 Remove GPIO71 and change SPK_DET1 to SPK_DET Design change
17. 11/29 30 Add GPIO22 as VRAM_DR_SR# and add RH203, RH205 for BOM control <DIS> For dual&single rank common bios
18. 11/30 30 Change RH202, RH203 BOM structure to GVDR@ and GVSR@ For dual&single rank common bios
19. 11/30 42 Change H7 to 4P0, Add H19 (3P2N), Change H17, H18 to PTH ME request
20. 11/30 25 Change UH3 from socket to IC Design change
21. 11/30 09 Change CC53 to 47U 0805 (SE00000PL00)& add CC50 (SE00000PL00) For 1206 MLCC Crack issue
12 Change CD31 to 47U 0805 (SE00000PL00)
38 Change CR10&CR12 to 47U 0805 (SE00000PL00)
22. 11/30 07 Change RC73 to 0 ohm (do not use short pad on this location) For debug
23. 11/30 17 Change RV53 pull high to +3VS Design change
24. 11/30 15 Change RV24 to 4.99K Strap pin change
25. 11/30 22 Delete D92 and change the netname to BKOFF# Avoid LCD_INV leak to Touch/B
26. 11/30 23 Add R62 & R63 for CRT undershoot issue For CRT undershoot issue
3 3
27. 11/30 25 Chane UH4, RH269, RH271 to @, change RH267 from shortpad to 0-ohm @. Design change
28. 11/30 08 Add CC17~CC19 for ESD request ESD request
29. 11/30 29,41 Move PLT_RST# ESD capacitor (CH104) to EC side (CB13) and mount 0.1uF ESD request
30. 11/30 05 Change CC63 from @ESD@ to ESD@ ESD request
31. 11/30 41 Change PM_SLP_S4# from pin127 to pin84. For ENE common code
32. 11/30 41 Change USB_EN#0 from pin84 to pin23. For ENE common code
33. 11/30 41 Change FB_CLAMP from pin23 to pin127. For ENE common code
34. 11/30 17 CV57 and CV60 change to 0.01U. For sequence
35. 11/30 17 RV47 change to 180K. For sequence
36. 12/03 38 Update USB circuit For S&C MAX4640 and MAX4641 co-lay circuit
37. 12/04 42 Change H19 to NPTH Design change
38. 12/04 17 Change QV2 footprint to NC7ST32P5X_SC70-5 For non-A51 part change
39. 12/04 04 Add S&C SMBus address in the table Design change
9. 11/26 24 Add @ to JHDMI Design change
09 Change CC44 to 47U 0805 (SE00000PL00)& add CC40 (SE00000PL00)
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
HW-PIR
HW-PIR
HW-PIR
55 56Thursday, January 17, 2013
55 56Thursday, January 17, 2013
55 56Thursday, January 17, 2013
E
0.3
0.3
0.3
of
of
of
Page 56
CyberForum.ru
A
B
C
D
E
HW PIR (Product Improve Record)
QCLA4 LA-8861P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2
NO DATE PAGE MODIFICATION LIST PURPOSE
---------------------------------------------------------------------------------------------------------------------------------------------------
40. 12/04 41 Add short-pad (RB5) on pin127. Design change
1 1
41. 12/04 13 Reverse DV1, Change DV1, QV8 to OPT@, 13 Change FB_CLAMP_MON from pull down to pull high +3VS_DGPU
42. 12/04 17 Change UV2 PN to SA007320300 Design change 17 Change UV2, CV58 to OPT@ and change RV50 to @
43. 12/04 43 Add R5546 put high PCH_PWR_EN to +3VL Design change
45. 12/05 41 Add CHG_PWR_GATE# pull high 3VL and add RB11 10K. Design change
46. 12/05 38 S&C IC Pin1 was connected to the EC(GPIO49) Pin82. Design change
VFKTA LA-9861P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.2 TO 0.3
NO DATE PAGE MODIFICATION LIST PURPOSE
---------------------------------------------------------------------------------------------------------------------------------------------------
1. 12/24 17 Change RV43 to 270K For GC6 timing requirements
2. 12/24 17 Change RV53 to 10K For GC6 timing requirements
3. 12/24 17 Change RV54 to 33K For GC6 timing requirements
4. 12/24 17 Change RV50to N14MGL@ N14M-GL doesn't support GC6
5. 12/24 17 Change UV2to N14PGV2@ N14M-GL doesn't support GC6
2 2
6. 12/24 17 Change CV58 to @ Cost reduction
7. 12/24 13 Change QV8to N14PGV2@ N14M-GL doesn't support GC6
8. 12/24 13 Change DV1 P/N to SCS00002G00 BOM reduction
9. 01/09 41 Change CB31 to 100P P/NSE071101J80 Design Change
10. 01/09 7,9,25 Change QC3,QC7,QC8,QH1 to SB00000PF00 SB501380020 X1 code
11. 01/15 22 Reserve R267&R266 0 ohm For EMI cost down
12. 01/15 41 Reserve CB50 1U Common design
13. 01/15 13 GPIO12 be connected to EC_GPXIOA01(remove EC_DRAMRST_CNTRL_PCH&RC3) For GPS
14. 01/16 42 Modify JTP pin define For DFB highlight
15. 01/16 22 Add C17 100P on LED_PWM For EMI request
16. 01/17 39/42 Add RB12, RB37, connect EC_MUTE_INT from codec to EC For boot bobo issue
17. 01/17 5/30/42 Reserve CC1,CH1,CB17,CB18,CC35 100P For ESD
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
C
2012/04/19 2015/04/19
2012/04/19 2015/04/19
2012/04/19 2015/04/19
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
HW-PIR
HW-PIR
HW-PIR
56 56Thursday, January 17, 2013
56 56Thursday, January 17, 2013
56 56Thursday, January 17, 2013
E
0.3
0.3
0.3
of
of
of
Loading...