COMPAL LA-7203P Schematics

A

1 1

B

C

D

E

PWWHA

2 2

TaiDi1 Plus

LA-7203P SchematicREV 0.1

3 3

4 4

Intel Processor(Sandy Bridge) / PCH(Cougar Point)

2010-12-27 Rev 0.1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

143Monday, January 10, 2011

E

A

of

A

B

C

D

E

Intel CPU Sandy Bridge

1 1

CRT

page 14

rPGA-989

37.5mm*37.5mm

page 5,6,7,8,9,10

FDI X8

2.7GT/s

DMI X4

5GT/s

LVDS Conn.

page 13

2 2

Intel PCH

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333/1600 MT/s

USB/B Left

USB port 0,1

USB

5V 480MHz

page 24

PCIeMini Card

USB

5V 480MHz

PCIe 1x

1.5V 5GT/s

WiMax

USB port 9

PCIeMini Card WLAN

PCIe port 2

200pin DDRIII-SO-DIMM X2

page 11,12

Int. Camera

USB port 11

page 25

BANK 0, 1, 2, 3

2IN1 RTS5137

USB port 10

page 27

page 13

Cougar Point - M

RJ45

page 26

3 3

RTL8105E 10/100M RTL8111E 1G

PCIe port 1

page 26

PCIe 1x

1.5V 5GT/s

FCBGA-989

25mm*25mm

page 15,16,17,18,19,20,21,22,23

SATA port 0

5V 6GHz(600MB/s)

SATA port 2

5V 3GHz(300MB/s)

SATA HDD

SATA port 1

page 24

SATA ODD

SATA port 4

page 24

LPC BUS

3.3V 33 MHz

HD Audio

3.3V 24MHz

HDA Codec

SPI ROM (4MB)

page 15

Debug Port

page 31

ENE KB9012

page 30

ALC259

page 28

RTC CKT.

page 16

DC/DC Interface CKT.

page 33

4 4

Touch Pad

page 32

Int.KBD

page 32

EC ROM (128KB)

page 31

Int.

MIC Conn

SPK Conn

page 29page 29

HP & MIC

page 29

Power Circuit DC/DC

page 34,35,36,37,38,39 ,40,41

Power/B DA40000XR10

page 32

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

243Monday, January 10, 2011

E

of

A

5

B+

SY8033BDBC

4

Ipeak=5A, Imax=3.5A, Iocp min=7.9A

SUSP#

3

DESIGN CURRENT 0.1A

DESIGN CURRENT 5A

DESIGN CURRENT 2A

+3VL

+5VALW

+1.8VS

2

1

SUSP

D D

N-CHANNEL

SI4800

ODD_EN#

P-CHANNEL

AO-3413

DESIGN CURRENT 4A

DESIGN CURRENT 1.8A

+5VS

+5VS_ODD

TPS51125ARGER

Ipeak=5A, Imax=3.5A, Iocp min=7.7A

C C

SUSP

N-CHANNEL

SI4800

WOL_EN#

P-CHANNEL

AO-3413

P-CHANNEL

AO-3413

LCD_ENVDD

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

DESIGN CURRENT 1.5A

+3VALW

+3V_LAN

+3VS

+LCD_VDD

VR_ON

ISL95831HRTZ-T

Ipeak=94A, Imax=52A, Iocp min=122A

Ipeak=33A, Imax=21.5A, Iocp min=40A

DESIGN CURRENT 94A

DESIGN CURRENT 33A

+CPU_CORE +GFX_CORE

SUSP#

B B

TPS51117RGYR

Ipeak=17A, Imax=11.9A, Iocp min=19.23A

DESIGN CURRENT 15A

+1.05VS_VCCP

VCCPPWRGD

TPS51117RGYR

SYSON

TPS51117RGYR

Ipeak=6A, Imax=4.2A, Iocp min=7A

Ipeak=9A, Imax=6.3A, Iocp min=9.92A

SUSP

N-CHANNEL FDS6676AS

SUSP

N-CHANNEL

SI4800

+3V

APL5930KAI-TRG

A A

0.75VR_EN#

UP7711U8

DESIGN CURRENT 6A

DESIGN CURRENT 10A

DESIGN CURRENT 2A

DESIGN CURRENT 1A

DESIGN CURRENT 1.5A

+VCCSA

+1.5V

+1.5V_CPU

+1.5VS

+1.05V

+0.75VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

SCHEMATICS, MB A7203

4019CT

343Monday, January 10, 2011

1

A

of

A

B

C

D

E

Voltage Rails

State

power plane

1 1

( O MEANS ON X MEANS OFF )

+RTCVCC

B+

+3VL

+5VALW +3VALW +VSB

+1.5V

+5VS +3VS +1.8VS +1.5VS +1.05VS +0.75VS +CPU_CORE +GFX_CORE

BTO Option Table

Function

S0

S1

2 2

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O O O O O O

O O O O O

X

O O O O O

X

O O O O

X X

O

XX X XX

OO OO

X

description

explain

BTO

MINI PCI-E SLOT

SLOT1 LAN

WIMAX

WIMAX@

LAN

10/100M Giga

8105E@ 8111E@

Camera & Mic

CAM@

PCH SM Bus Address

HEX

A0 H

D2 H

0001 0110 bSmart Battery

Address

1010 0000 b 1010 0100 bA4 H 1101 0010 b

PowerPower

+3VS

EC SM Bus2 Address

Device

96 H

1001 0110 bPCH

B

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

SIGNAL

SLP_S3#

Compal Secret Data

Deciphered Date

SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

HIGH

LOW LOW

LOW LOWLOW

HIGH

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

443Monday, January 10, 2011

E

of

A

Power

+3VS

3 3

+3VS +3VS +3VS

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 Clock Generator WLAN/WIMAX

EC SM Bus1 Address

Device Address Address

+3VL

4 4

A

HEX HEX

16 H

5

@

PM_DRAM_PWRGD_R

C4871000P_0402_50V7K

12

@

12

D D

+1.05VS_VCCP

R47 62_0402_5%R47 62_0402_5%

R51 10K_0402_5%R51 10K_0402_5%

12

H_PWRGOOD

C4881000P_0402_50V7K

H_PROCHOT#

H_PWRGOOD

H_PROCHOT#<30,35>

H_THERMTRIP#<20>

Remove R14(o ohm) for HW Review demand

H_PM_SYNC<17>

H_PWRGOOD<20>

C C

+3VALW

1

C93

0.1U_0402_16V4Z

0.1U_0402_16V4Z PS3@

PS3@

2

U10

R312

0_0402_5%

PM_PWROK<17,30> DRAMPWROK<17>

B B

1 2

PS3@

R384 0_0402_5%

U10 74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

5

PS3@

1

P

B

2

A

G

3

1 2

WPS3@

SUSP<9,25,33>

PM_SYS_PWRGD_BUF

4

O

SUSP

+1.5V_CPU

12

R340

R340 39_0402_5%

39_0402_5% @

@

13

D

Q5

Q5 2N7002_SOT23

2N7002_SOT23

2

@

G

S

Buffered Reset to CPU

+3VS

0.1U_0402_16V4Z

1

C84

PLT_RST# <19,25,26,30,31>

U3

PLT_RST#

A A

U3

1

OE#

2

IN

3

GND

74AHC1G125GW_SOT353-5

5

2

5

VCC

BUFO_CPU_RST# BUF_CPU_RST#

4

OUT

+1.05VS_VCCP

12

R69

R69 75_0402_5%

75_0402_5%

43_0402_1%

1 2

R155

12

R209

R209 0_0402_5%

0_0402_5% @

@

H_SNB_IVB#<19>

12

R339

R339 200_0402_5%

200_0402_5%

4

H_PECI<30>

4

H_SNB_IVB#

R450

1 2

BUF_CPU_RST#

PBTN_OUT#<17,30>

CLK_CPU_ITP<16> CLK_CPU_ITP#<16> +1.05VS_VCCP

TP_SKTOCC#

H_CATERR#

H_PECI

H_PROCHOT#_R

56_0402_5%

H_THERMTRIP#

H_PM_SYNC

H_PWRGOOD

PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF

CFG0<10>

VGATE<17,30,41>

T1 PADT1 PAD

T2 PADT2 PAD

1 2

R454 130_0402_5%R454 130_0402_5%

JCPUB

PROC_SELECT#

C26

SNB_IVB#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

Sandy Bridge_rPGA_Rev0p61 @

XDP Connector

H_PWRGOOD XDP_CPU_HOOK0 PBTN_OUT# CFG0 VGATE

C8

0.1U_0402_10V6K

0.1U_0402_10V6K @

@

PLT_RST#

1

2

R35 1K_0402_5%@R35 1K_0402_5%@

1 2

R152 0_0402_5%@R152 0_0402_5%@

1 2

R37 1K_0402_5%@R37 1K_0402_5%@

1 2

R451 0_0402_5%@R451 0_0402_5%@

1 2

@

1 2

R40 1K_0402_5%

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MISCTHERMALPWR MANAGEMENT

XDP_PREQ# XDP_PRDY#

XDP_BPM#0 XDP_BPM#1

XDP_BPM#2 XDP_BPM#3

XDP_CPU_HOOK6 XDP_DBRESET#

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

XDP_TCK

Issued Date

3

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

1 2 3 4 5 6 7 8 9

XDP_CPU_HOOK1 XDP_CPU_HOOK2 XDP_CPU_HOOK3 CLK_CPU_ITP CLK_CPU_ITP#

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

MOLEX 52435-2671

2010/09/03 2012/12/31

BCLK

BCLK#

PRDY#

PREQ#

TCK

TMS

TRST#

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

JXDP

A28 A27

A16 A15

R8

AK1 A5 A4

AP29 AP27

AR26 AR27 AP30

AR28

TDI

AP26

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

@JXDP

@

27 28

2

100 MHz

CLK_CPU_DMI CLK_CPU_DMI#

120 MHz

CLK_CPU_DPLL CLK_CPU_DPLL#

H_DRAMRST#

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

XDP_PRDY#_R XDP_PREQ#_R

XDP_TCK_R XDP_TMS_R XDP_TRST#_R

XDP_TDI_R XDP_TDO_R

XDP_DBRESET#_R

XDP_BPM#0_R XDP_BPM#1_R XDP_BPM#2_R XDP_BPM#3_R

R1437 140_0402_1%R1437 140_0402_1% R1438 25.5_0402_1%R1438 25.5_0402_1% R1439 200_0402_1%R1439 200_0402_1%

H_DRAMRST# <7>

R1 0_0402_5%@R1 0_0402_5%@

1 2

R2 0_0402_5%@R2 0_0402_5%@

1 2

R4 0_0402_5%@R4 0_0402_5%@

1 2

R6 0_0402_5%@R6 0_0402_5%@

1 2

R7 0_0402_5%@R7 0_0402_5%@

1 2

R8 0_0402_5%@R8 0_0402_5%@

1 2

R10 0_0402_5%@R10 0_0402_5%@

1 2

R11 0_0402_5%@R11 0_0402_5%@

1 2

R12 0_0402_5%@R12 0_0402_5%@

1 2

R13 0_0402_5%@R13 0_0402_5%@

1 2

R15 0_0402_5%@R15 0_0402_5%@

1 2

R18 0_0402_5%@R18 0_0402_5%@

1 2

CLK_CPU_DMI <16> CLK_CPU_DMI# <16>

12 12 12

DDR3 Compensation Signals Layout Note:Place these resistors near Processor

XDP_PRDY# XDP_PREQ#

XDP_TCK XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO

XDP_DBRESET#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3

Routed as a single daisy chain

Close to CPU side

FAN Control Circuit (RPM and PWM)

EN_DFAN1<30>

10U_0805_10V6K

Compal Secret Data

Deciphered Date

C3

+FAN2

10mil

+5VS

2

+5VS

1A

2

1

1A

1 2 3 4

1

C15

C15 10U_0805_10V6K

10U_0805_10V6K

2

FAN_SPEED1<30>

R154

1 2

0_0603_5%

10U_0805_10V6K

U1

EN

GND

VIN

GND

VOUT

GND

VSET

GND

APL5607KI-TRG_SO8

40 mil

+FAN1

C12

8 7 6 5

1

Stuff R41 and R42 if do not support eDP

+1.05VS_VCCP

R36

1 2

1K_0402_5%

2

1

+3VS

12

R3

R3 10K_0402_5%

10K_0402_5%

1

C6

0.01U_0402_25V7K

0.01U_0402_25V7K @

@

2

+5VS

CLK_CPU_DPLL# CLK_CPU_DPLL

PU/PD for JTAG signals

XDP_TMS_R XDP_TDI_R XDP_TDO XDP_TCK_R XDP_TRST#_R

+FAN2

C14

C14 1000P_0402_50V7K

1000P_0402_50V7K @

@

FANPWM<30>

+FAN1

D57 1SS355_SOD323-2D57 1SS355_SOD323-2

1 2

BAS16_SOT23-3

R42 1K_0402_5%R42 1K_0402_5%

1 2

R41 1K_0402_5%R41 1K_0402_5%

1 2

+3VS

XDP_DBRESET# <17>

R28 51_0402_5%R28 51_0402_5% R29 51_0402_5%R29 51_0402_5% R30 51_0402_5%R30 51_0402_5% R31 51_0402_5%R31 51_0402_5% R32 51_0402_5%R32 51_0402_5%

1

C13

0.01U_0402_25V7K

0.01U_0402_25V7K @

@

2

FANPWM

12

D86

10U_0805_10V6K

+1.05VS_VCCP

12 12 12 12 12

JFAN2

1

2

3

4

GND

5

GND

ACES_85204-0300N

R14 10K_0402_5% @R14 10K_0402_5% @

12

FAN_SPEED1

1 2 3 4

ACES_85204-0400N

1000P_0402_50V7K

1

2

C4

2

1

+3VS

JFAN

1 2 3 4

C379

@JFAN2

@

Close to Connector

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

1

543Monday, January 10, 2011

of

A

5

4

3

2

1

+1.05VS_VCCP

R34

24.9_0402_1%

JCPUA

D D

DMI_PTX_CRX_N0<17> DMI_PTX_CRX_N1<17> DMI_PTX_CRX_N2<17> DMI_PTX_CRX_N3<17>

DMI_PTX_CRX_P0<17> DMI_PTX_CRX_P1<17> DMI_PTX_CRX_P2<17> DMI_PTX_CRX_P3<17>

DMI_CTX_PRX_N0<17> DMI_CTX_PRX_N1<17> DMI_CTX_PRX_N2<17> DMI_CTX_PRX_N3<17>

DMI_CTX_PRX_P0<17> DMI_CTX_PRX_P1<17> DMI_CTX_PRX_P2<17> DMI_CTX_PRX_P3<17>

FDI_CTX_PRX_N0<17> FDI_CTX_PRX_N1<17> FDI_CTX_PRX_N2<17>

C C

+1.05VS_VCCP

B B

+1.05VS_VCCP

FDI_CTX_PRX_N3<17> FDI_CTX_PRX_N4<17> FDI_CTX_PRX_N5<17> FDI_CTX_PRX_N6<17> FDI_CTX_PRX_N7<17>

FDI_CTX_PRX_P0<17> FDI_CTX_PRX_P1<17> FDI_CTX_PRX_P2<17> FDI_CTX_PRX_P3<17> FDI_CTX_PRX_P4<17> FDI_CTX_PRX_P5<17> FDI_CTX_PRX_P6<17> FDI_CTX_PRX_P7<17>

FDI_FSYNC0<17> FDI_FSYNC1<17>

FDI_INT<17> FDI_LSYNC0<17>

FDI_LSYNC1<17>

R9 24.9_0402_1%R9 24.9_0402_1%

1 2

R33 10K_0402_5%R33 10K_0402_5%

12

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT FDI_LSYNC0

FDI_LSYNC1

EDP_COMP

Reserve R33 for HW Review demand eDP_COMP signals should be

shorted near balls and routed with typical impedance <25m ohm

JCPUA

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev0p61 @

DMI

Intel(R) FDI

eDP

PEG_ICOMPO

PEG_RCOMPO

PCI EXPRESS* - GRAPHICS

PEG_ICOMPI

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_COMP

24.9_0402_1%

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical

12

impedance = 43 m ohm (4 mils) PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 m ohm (12 mils)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

643Monday, January 10, 2011

1

A

of

5

JCPUC

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AK8 AK9

AH8 AH9

AP11

AN11

AL12 AM12 AM11

AL11

AP12 AN12

AJ14 AH14

AL15

AK15

AL14

AK14

AJ15 AH15

AE10

AF10

AE8 AD9 AF9

F10

AJ5 AJ6 AJ8

AJ9

AL9 AL8

G9

G8 G7

M8

M9 M7

C5 D5 D3 D2 D6 C6 C2 C3

F8

F9 F7

K4 K5 K1 J1 J5 J4 J2 K2

N8 N7

N9

V6

JCPUC

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR_A_D[0..63]<11>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3

D D

C C

B B

DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>

DDR_A_CAS#<11> DDR_A_RAS#<11>

DDR_A_WE#<11>

DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CAS# DDR_A_RAS# DDR_A_WE#

4

DDRA_CLK0

AB6

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CLK[2]

SA_CLK#[2]

SA_CKE[2]

SA_CLK[3]

SA_CLK#[3]

SA_CKE[3]

SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]

SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

DDRA_CLK0#

AA6

DDRA_CKE0

V9

DDRA_CLK1 DDRB_CLK1

AA5

DDRA_CLK1# DDRB_CLK1#

AB5

DDRA_CKE1 DDRB_CKE1

V10

AB4 AA4 W9

AB3 AA3 W10

DDRA_SCS0# DDRB_SCS0#

AK3

DDRA_SCS1#

AL3 AG1 AH1

DDRA_ODT0 DDRB_ODT0

AH3

DDRA_ODT1

AG3 AG2 AH2

DDR_A_DQS#0

C4

DDR_A_DQS#1

G6

DDR_A_DQS#2

J3

DDR_A_DQS#3

M6

DDR_A_DQS#4

AL6

DDR_A_DQS#5

AM8

DDR_A_DQS#6

AR12

DDR_A_DQS#7

AM15

DDR_A_DQS0

D4

DDR_A_DQS1

F6

DDR_A_DQS2

K3

DDR_A_DQS3

N6

DDR_A_DQS4

AL5

DDR_A_DQS5

AM9

DDR_A_DQS6

AR11

DDR_A_DQS7

AM14

DDR_A_MA0

AD10

DDR_A_MA1

W1

DDR_A_MA2

W2

DDR_A_MA3

W7

DDR_A_MA4

V3

DDR_A_MA5

V2

DDR_A_MA6

W3

DDR_A_MA7

W6

DDR_A_MA8

V1

DDR_A_MA9

W5

DDR_A_MA10

AD8

DDR_A_MA11

V4

DDR_A_MA12

W4

DDR_A_MA13

AF8

DDR_A_MA14

V5

DDR_A_MA15

V7

3

JCPUD

AM5 AM6 AR3

AN3 AN2 AN1

AN9

AN8 AR6 AR5 AR9

AJ11

AH11

AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

JCPUD

C9

A7

D10

C8

A9

A8 D9 D8 G4

F4

F1 G1 G5

F5

F2 G2

J7

J8

K10

K9

J9

J10

K8

K7 M5 N4 N2 N1 M4 N5 M2 M1

AP3

AP2 AP5

AT5 AT6 AP6

AT8 AT9

AA9 AA7

R6

AB8 AB9

DDR_B_D[0..63]<12>

DDRA_CLK0 <11> DDRB_CLK0 <12> DDRA_CLK0# <11> DDRA_CKE0 <11> DDRB_CKE0 <12>

DDRA_CLK1 <11> DDRA_CLK1# <11> DDRB_CLK1# <12> DDRA_CKE1 <11>

DDRA_SCS0# <11> DDRA_SCS1# <11> DDRB_SCS1# <12>

DDRA_ODT0 <11> DDRB_ODT0 <12> DDRA_ODT1 <11> DDRB_ODT1 <12>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>

DDR_B_CAS#<12> DDR_B_RAS#<12>

DDR_B_WE#<12>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_RAS# DDR_B_WE#

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

2

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

AB2

SB_CLK[2]

AA2

SB_CLK#[2]

T9

SB_CKE[2]

AA1

SB_CLK[3]

AB1

SB_CLK#[3]

T10

SB_CKE[3]

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6

SB_CS#[2]

AE6

SB_CS#[3]

AE4

SB_ODT[0]

AD4

SB_ODT[1]

AD5

SB_ODT[2]

AE5

SB_ODT[3]

DDR_B_DQS#0

D7

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6]

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDRB_CLK0 DDRB_CLK0# DDRB_CKE0

DDRB_SCS1#

DDRB_ODT1

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

1

DDRB_CLK0# <12>

DDRB_CLK1 <12> DDRB_CKE1 <12>

DDRB_SCS0# <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

Sandy Bridge_rPGA_Rev0p61 @

R466

0_0402_5%

1 2

WPS3@

D

S

D

S

DDR3_DRAMRST#_RH_DRAMRST#

1 2

13

Q14

Q14 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

PS3@

2

1

C140

0.047U_0402_25V6K

0.047U_0402_25V6K PS3@

PS3@

2

H_DRAMRST#<5>

R464

4.99K_0402_1%

A A

DRAMRST_CNTRL_PCH<16>

5

4.99K_0402_1%

DRAMRST_CNTRL

1 2

R463 0_0402_5%

PS3@

R465

1K_0402_5%

PS3@

4

+1.5V

12

R467

R467 1K_0402_5%

1K_0402_5%

1 2

SM_DRAMRST# <11,12>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Sandy Bridge_rPGA_Rev0p61 @

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

743Monday, January 10, 2011

1

A

of

5

4

3

2

1

+CPU_CORE

D D

C C

B B

A A

JCPUF

94A (Quad Core 45W) 53A (SV 35W)

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Sandy Bridge_rPGA_Rev0p61 @

POWER

PEG AND DDR

CORE SUPPLY

VSS_SENSE_VCCIO

SENSE LINES SVID

5

8.5A

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSSIO_SENSE

22U_0805_6.3V6M

AH13 AH10

C146

AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11

C147

H14 H12 H11 G14 G13

22U_0805_6.3V6M

G12 F14 F13 F12 F11 E14 E12

Bottom Socket Cavity x 5

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

H_CPU_SVIDALRT#

AJ29

H_CPU_SVIDCLK

AJ30

H_CPU_SVIDDAT

AJ28

VCCSENSE_R

AJ35

VSSSENSE_R

AJ34

VCCIO_SENSE

B10 A10

R102

R102 0_0402_5%

0_0402_5%

1 2

22U_0805_6.3V6M

1

C143

C144

2

22U_0805_6.3V6M

1

C145

2

12

R70

R70 130_0402_5%

130_0402_5%

R65 0_0402_5%R65 0_0402_5%

1 2

R52 0_0402_5%R52 0_0402_5%

1 2

R105

R105 100_0402_1%

100_0402_1% @

@

1 2

+1.05VS_VCCP

Close to CPU

4

TOP Socket Cavity x 7

22U_0805_6.3V6M

1

C141

2

22U_0805_6.3V6M

1 2

R67 43_0402_1%R67 43_0402_1%

1 2

R63 0_0402_5%R63 0_0402_5%

1 2

R66 0_0402_5%R66 0_0402_5%

VCCIO_SENSE <40>

2

C137

+1.05VS_VCCP+1.05VS_VCCP

1

C136

2

22U_0805_6.3V6M

12

R68

R68 75_0402_5%

75_0402_5%

Pull high resistor on VR side

+CPU_CORE

R64

R64 100_0402_1%

100_0402_1%

1 2

12

R62

R62 100_0402_1%

100_0402_1%

+1.05VS_VCCP Decoupling: 2X 330U (6m ohm), 12X 22U

22U_0805_6.3V6M

C135

ESR 9mohm

330U_D2_2V_Y

VR_SVID_ALRT# <41> VR_SVID_CLK <41> VR_SVID_DAT <41>

22U_0805_6.3V6M

1

C133

C134

2

22U_0805_6.3V6M

330U_D2_2V_Y

1

+

C11

C10

2

Close to CPU

VCCSENSE <41> VSSSENSE <41>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C142

2

22U_0805_6.3V6M

1

+

2

3

+1.05VS_VCCP

1

2

+CPU_CORE

C101

10U_0805_10V6K

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

+CPU_CORE Decoupling: 4X 470U (4m ohm), 16X 22U, 10X 10U

10U_0805_10V6K

1

C103

C102

2

10U_0805_10V6K

+CPU_CORE

22U_0805_6.3V6M

1

C151

C159

2

22U_0805_6.3V6M

+CPU_CORE

22U_0805_6.3V6M

1

C150

2

Deciphered Date

1

2

C158

22U_0805_6.3V6M

Bottom Socket Cavity

10U_0805_10V6K

1

C104

2

1

2

1

C105

2

10U_0805_10V6K

C106

Top Socket Edge

22U_0805_6.3V6M

1

C124

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

C130

C129

2

22U_0805_6.3V6M

Top Socket Cavity

22U_0805_6.3V6M

1

C127

C128

2

22U_0805_6.3V6M

2

1

C120

2

22U_0805_6.3V6M

1

2

10U_0805_10V6K

C123

C118

1

2

10U_0805_10V6K

1

C108

C107

2

10U_0805_10V6K

1

C122

2

22U_0805_6.3V6M

1

C119

2

22U_0805_6.3V6M

C121

22U_0805_6.3V6M

C117

1

C109

2

10U_0805_10V6K

1

C125

2

22U_0805_6.3V6M

1

2

10U_0805_10V6K

1

C110

2

1

@

2

1

C111

@

2

10U_0805_10V6K

1

2

Bottom Socket Edge

+CPU_CORE

330U_D2_2V_Y

1

+

330U_D2_2V_Y

2

330U_D2_2V_Y

Title

Size Document Number Rev

Custom

Date: Sheet

+

C2

330U_D2_2V_Y

C7

C5

2

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

+

2

1

C9

2

330U_D2_2V_Y

1

+

330U_D2_2V_Y

1

+

C1

2

of

843Monday, January 10, 2011

A

5

4

3

2

1

+GFX_CORE Decoupling: 1X 560U (10m ohm), 12X 22U

+GFX_CORE

Change C873 from 330uF to 560uF for power issue

Bottom Socket Edge

560U_2.5V_M_R17

1

C267

2

22U_0805_6.3V6M

1

C344

2

22U_0805_6.3V6M

1

C350

C350 @

@

2

22U_0805_6.3V6M

ESR 10mohm

22U_0805_6.3V6M

C271

1

+

C873

2

1

C338

2

22U_0805_6.3V6M

1

C341

2

Bottom Socket Edge

22U_0805_6.3V6M

1

C346

2

22U_0805_6.3V6M

1

C347

2

22U_0805_6.3V6M

C345

Top Socket Edge

22U_0805_6.3V6M

1

C391

C351

@

2

22U_0805_6.3V6M

1

C342

2

22U_0805_6.3V6M

1

C348

2

22U_0805_6.3V6M

D D

22U_0805_6.3V6M

C266

Bottom Socket Cavity

22U_0805_6.3V6M

C343

Top Socket

C C

Cavity

22U_0805_6.3V6M

C349

C349 @

@

AT24 AT23 AT21 AT20 AT18

AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17 AK24 AK23 AK21 AK20 AK18 AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

JCPUG

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

VCCPLL Decoupling: 1X 330U (6m ohm), 1X 10U, 2x1U

+1.8VS

R76

10U_0805_10V6K

B B

A A

12

0_0805_5%

C185

+

@

330U_B2_2.5VM_R15M

1

C186

2

+1.8VS_VCCPLL

1

C206

2

1U_0402_6.3V6K

1

C230

C230 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1.2A

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

Sandy Bridge_rPGA_Rev0p61 @

POWER

33A

GRAPHICS

1.8V RAIL

VCC_AXG_SENSE

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

VCCSA_VID0

VCCSA_VID1

AK35 AK34

+V_SM_VREF should have 20 mil trace width

+V_SM_VREF_CNT +V_SM_VREF

AL1

SM_VREF

R486

100K_0402_5%

5A

AF7

VDDQ1

AF4

VDDQ2

AF1

VDDQ3

AC7

VDDQ4

AC4

VDDQ5

AC1

VDDQ6

Y7

VDDQ7

Y4

VDDQ8

Y1

VDDQ9

U7

VDDQ10

U4

VDDQ11

U1

VDDQ12

P7

VDDQ13

P4

VDDQ14

P1

VDDQ15

Bottom Socket Cavity

6A

M27

VCCSA1

M26

VCCSA2

L26

VCCSA3

J26

VCCSA4

J25

VCCSA5

J24

VCCSA6

H26

VCCSA7

H25

VCCSA8

VCCSA_SENSE

H23

VCCSA_VID0

C22

FC_C22

C24

10K_0402_5%

VSS_AXG_SENSE

12

C148

@

0.1U_0402_16V4Z

10U_0805_10V6K

1

C100

C447

2

10U_0805_10V6K

R114

1 2

R111

0_0402_5%

12

2

Q2

@

@ AP2302GN-HF_SOT23-3

AP2302GN-HF_SOT23-3

1

RUN_ON_CPU1.5VS3

10U_0805_10V6K

1

C115

2

10U_0805_10V6K

1

C477

C476

2

10U_0805_10V6K

Q2

C116

@

1

2

C114

Bottom Socket Edge

R95

1 2

0_0402_5% @

R119

@

10K_0402_5%

@

1 2

3

10U_0805_10V6K

1

C154

C149

2

10U_0805_10V6K

12

+VCCSA Decoupling: 1X 330U (17m ohm), 4X 10U

+VCCSA

1 2

R253 0_0402_5%R253 0_0402_5%

1

+

C877

C877 330U_2.5V_M_R17

330U_2.5V_M_R17 @

@

2

VCCSA_SENSE <39>

VCCSAP_VID1 <39>

+1.5V_CPU +1.5V

+GFX_CORE

R74

R74 100_0402_1%

100_0402_1%

1 2

12

R75

R75 100_0402_1%

100_0402_1%

1 2

R252

R252 1K_0402_5%

1K_0402_5%

1

2

+1.5V_CPU Decoupling: 1X 330U (17m ohm), 6X 10U

+1.5V_CPU

10U_0805_10V6K

C155

1

2

VCCSA_SENSE

1

+

C875

C875 330U_2.5V_M_R17

330U_2.5V_M_R17

ESR 17mohm

2

ESR 17mohm

PS3@

C213 0.1U_0402_16V4Z

1 2

PS3@

C212 0.1U_0402_16V4Z

1 2

PS3@

C211 0.1U_0402_16V4Z

1 2

PS3@

C210 0.1U_0402_16V4Z

1 2

Close to CPU

VCC_AXG_SENSE <41> VSS_AXG_SENSE <41>

1K_0402_5%

1K_0402_5% R122

R122

Vgs=10V,Id=14.5A,Rds=6mohm

470_0805_5%

SUSP

2N7002DW-T/R7_SOT363-6

Q46B

5

PJ32

112

JUMP_43X118

R449

@

1 2 3

4

@

2

+1.5VS

@

+1.5V_CPU

0

1

0

1

0

11

1

C179

C179 10U_0805_10V4K

10U_0805_10V4K @

@

2

0.1U_0402_25V6

C472

@

FDS6676AS_SO8

1

2

PJ30

2

JUMP_43X118

JUMP_43X118 Q33

1

S

2

S

3

S

4

G

+VCCSAVCCSA_VID0 VCCSA_VID1

0.90 V

0.80 V

0.75 V

0.65 V

@PJ30

@

112

@Q33

@

8

D

7

D

6

D

5

D

RUN_ON_CPU1.5VS3

12

R420

R420 820K_0402_5%

820K_0402_5% @

@

+1.5V+1.5V_CPU

1 2

220K_0402_5%

61

2

Q46A

Q46A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 @

@

For Sandy Bridge

R455

@R455

@

+VSB

SUSP

SUSP <5,25,33>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

1

943Monday, January 10, 2011

A

of

5

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AR25 AR22 AR19 AR16 AR13 AR10

AR7 AR4

AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AP7

AP4

AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AN7

AN4

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7

AM4

AM3

AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AK7

AK4 AJ25

AT7

VSS11

AT4

VSS12

AT3

VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

VSS

D D

C C

B B

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

T35 T34 T33 T32 T31 T30 T29 T28 T27 T26

P9 P8 P6 P5 P3

P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34

L33 L30 L27

L9

L8

L6

L5

L4

L3

L2

L1 K35 K32 K29 K26

J34

J31 H33 H30 H27 H24 H21 H18 H15 H13 H10

H9 H8 H7 H6 H5 H4 H3 H2

H1 G35 G32 G29 G26 G23 G20 G17 G11

F34 F31 F29

JCPUI

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

4

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

3

JCPUE

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

CFG0<5> T5 PADT5 PAD

T6 PADT6 PAD T7 PADT7 PAD T11 PADT11 PAD T12 PADT12 PAD T15 PADT15 PAD T18 PADT18 PAD T16 PADT16 PAD T19 PADT19 PAD T21 PADT21 PAD T20 PADT20 PAD T44 PADT44 PAD T45 PADT45 PAD T46 PADT46 PAD T47 PADT47 PAD T26 PADT26 PAD T27 PADT27 PAD

T22 PADT22 PAD T24 PADT24 PAD T25 PADT25 PAD T23 PADT23 PAD

R115

1K_0402_1%

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

CPU_RSVD6 CPU_RSVD7

12

R116

R116 1K_0402_1%

1K_0402_1%

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

RSVD1

AH31

RSVD2

AJ33

RSVD3

AH33

RSVD4

AJ26

RSVD5

SA_DIMM_VREFDQ

B4

RSVD6

D1

RSVD7

SB_DIMM_VREFDQ

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

RSVD26

VCCIO_SEL

J15

RSVD27

Sandy Bridge_rPGA_Rev0p61 @

RESERVED

RSVD28 RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

RSVD53

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

L7 AG7 AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

2

CFG Straps for Processor

(CFG[17:0] internal pull high to VCCIO)

CFG2

12

R254

R254 1K_0402_1%

1K_0402_1% @

@

PEG Static Lane Reversal - CFG2 is for the 16x

1: Normal Operation; Lane # definition matches

*

CFG2

socket pin map definition

1

0:Lane Reversed

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35 AM35

AT2 AT1 AR1

B1

KEY

T28 PADT28 PAD

CLK_RES_ITP <16> CLK_RES_ITP# <16>

PCIE Port Bifurcation Straps

CFG[6:5]

CFG4

12

R255

R255 1K_0402_1%

1K_0402_1% @

@

Embedded Display Port Presence Strap

1 : Disabled; No Physical Display Port

*

CFG4

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

attached to Embedded Display Port 0 : Enabled; An external Display Port device is

connected to the Embedded Display Port

CFG6 CFG5

1K_0402_1%

R257

12

R256

R256 1K_0402_1%

1K_0402_1% @

@

Sandy Bridge_rPGA_Rev0p61 @

CFG7

12

R258

R258 1K_0402_1%

1K_0402_1% @

@

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB de assertion

CFG7

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

0: PEG Wait for BIOS for training

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

1

10 43Monday, January 10, 2011

A

of

10 43Monday, January 10, 2011

5

+VREF_DQA

1

C157

C156

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

D D

Close to JDDRL.1

C C

B B

A A

+3VS

DDR_A_BS2<7>

DDRA_CLK0<7> DDRA_CLK0#<7>

DDR_A_BS0<7>

DDR_A_WE#<7>

DDR_A_CAS#<7>

DDRA_SCS1#<7>

1

C181

C182

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

DDR_A_D0 DDR_A_D1

1

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDRA_CKE0

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 DDRA_CLK0

DDRA_CLK0# DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDRA_SCS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

R90

1 2

10K_0402_5%

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

5

+0.75VS

12

R91

R91 10K_0402_5%

10K_0402_5%

+1.5V

JDDRL

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1 GND2

VREF_CA

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

FOX_AS0A626-U2SN-7F_204P

FOX_AS0A626-U2SN-7F_204P @

@

VSS DQ4 DQ5

VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS

DQ12 DQ13

VSS DM1

RESET#

VSS

DQ14 DQ15

VSS

DQ20 DQ21

VSS DM2

VSS

DQ22 DQ23

VSS

DQ28 DQ29

VSS

DQS3#

DQS3

VSS

DQ30 DQ31

VSS

CKE1

VDD

A15

A14 VDD

A11 VDD

VDD

CK1

CK1#

VDD

BA1

RAS#

VDD

S0#

ODT0

VDD

ODT1

VDD

VSS

DQ36 DQ37

VSS DM4

VSS

DQ38 DQ39

VSS

DQ44 DQ45

VSS

DQS5#

DQS5

VSS

DQ46 DQ47

VSS

DQ52 DQ53

VSS DM6

VSS

DQ54 DQ55

VSS

DQ60 DQ61

VSS

DQS7#

DQS7

VSS

DQ62 DQ63

VSS

EVENT#

SDA

SCL

VTT

BOSS1 BOSS2

A7 A6

A4 A2

A0

NC

4

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26 28

SM_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44 46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDRA_CKE1

74 76

DDR_A_MA15

78

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86 88

DDR_A_MA6

90

DDR_A_MA4

92 94

DDR_A_MA2

96

DDR_A_MA0

98 100

DDRA_CLK1

102

DDRA_CLK1#

104 106

DDR_A_BS1

108

DDR_A_RAS#

110 112

DDRA_SCS0#

114

DDRA_ODT0

116 118

DDRA_ODT1

120 122 124

+VREF_CAA

126 128

DDR_A_D36

130

DDR_A_D37

132 134 136 138

DDR_A_D38

140

DDR_A_D39

142 144

DDR_A_D44

146

DDR_A_D45

148 150

DDR_A_DQS#5

152

DDR_A_DQS5

154 156

DDR_A_D46

158

DDR_A_D47

160 162

DDR_A_D52

164

DDR_A_D53

166 168 170 172

DDR_A_D54

174

DDR_A_D55

176 178

DDR_A_D60

180

DDR_A_D61

182 184

DDR_A_DQS#7

186

DDR_A_DQS7

188 190

DDR_A_D62

192

DDR_A_D63

194 196 198

PM_SMBDATA

200

PM_SMBCLK

202 204

+0.75VS

206 208

4

DDR3 SO-DIMM A Reverse Type

SM_DRAMRST# <7,12>

DDRA_CKE1 <7>DDRA_CKE0<7>

DDRA_CLK1 <7> DDRA_CLK1# <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDRA_SCS0# <7> DDRA_ODT0 <7>

DDRA_ODT1 <7>

1

C162

C161

close to JDDRL.126

PM_SMBDATA <12,16,25> PM_SMBCLK <12,16,25>

0.1U_0402_16V4Z

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR_A_DQS[0..7] <7> DDR_A_DQS#[0..7] <7>

DDR_A_D[0..63] <7>

DDR_A_MA[0..15] <7>

+1.5V

+VREF_DQA

+1.5V

12

R80

1K_0402_1%

12

R82

1K_0402_1%

Layout Note: Place near JDDRL

+1.5V

2010/09/03 2012/12/31

3

@

+

C218 390U_2.5V_M_R10

1 2

C166 10U_0603_6.3V6MC166 10U_0603_6.3V6M

1 2

C168 10U_0603_6.3V6MC168 10U_0603_6.3V6M

1 2

C171 10U_0603_6.3V6MC171 10U_0603_6.3V6M

1 2

C174 10U_0603_6.3V6MC174 10U_0603_6.3V6M

1 2

C176 10U_0603_6.3V6MC176 10U_0603_6.3V6M

1 2

C178 10U_0603_6.3V6MC178 10U_0603_6.3V6M

1 2

Compal Secret Data

Deciphered Date

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

+1.5V +0.75VS

2

12

R79

1K_0402_1%

12

R81

1K_0402_1%

C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z

1 2

C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z

1 2

C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z

1 2

C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z

1 2

2

1

Layout Note: Place near JDDRL1.203 and 204

C165 10U_0603_6.3V6MC165 10U_0603_6.3V6M

1 2

C169 1U_0402_6.3V6KC169 1U_0402_6.3V6K

12

C172 1U_0402_6.3V6KC172 1U_0402_6.3V6K

12

C175 1U_0402_6.3V6KC175 1U_0402_6.3V6K

12

C177 1U_0402_6.3V6KC177 1U_0402_6.3V6K

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

11 43Monday, January 10, 2011

1

of

A

+VREF_DQB

1

C184

C183

2.2U_0603_6.3V6K

1 1

2

Close to JDDRH.1

DDRB_CKE0<7>

2 2

3 3

4 4

+3VS

DDRB_CLK0<7> DDRB_CLK0#<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDRB_SCS1#<7>

1

C208

C207

@

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

DDR_B_BS2<7>

1

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

DDR_B_D0 DDR_B_D1

1

DDR_B_D2 DDR_B_D3

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDRB_CKE0

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 DDRB_CLK0

DDRB_CLK0# DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDRB_SCS1#

DDR_B_D37 DDR_B_D36

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D54 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

R98

1 2

10K_0402_5%

R99

1 2

10K_0402_5%

A

+0.75VS

+1.5V

JDDRH

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1 GND2

VREF_CA

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

FOX_AS0A626-UASN-7F_204P

FOX_AS0A626-UASN-7F_204P @

@

VSS DQ4 DQ5

VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS

DQ12 DQ13

VSS DM1

RESET#

VSS

DQ14 DQ15

VSS

DQ20 DQ21

VSS DM2

VSS

DQ22 DQ23

VSS

DQ28 DQ29

VSS

DQS3#

DQS3

VSS

DQ30 DQ31

VSS

CKE1

VDD

A15

A14 VDD

A11 VDD

VDD

CK1

CK1#

VDD

BA1

RAS#

VDD

S0#

ODT0

VDD

ODT1

VDD

VSS

DQ36 DQ37

VSS DM4

VSS

DQ38 DQ39

VSS

DQ44 DQ45

VSS

DQS5#

DQS5

VSS

DQ46 DQ47

VSS

DQ52 DQ53

VSS DM6

VSS

DQ54 DQ55

VSS

DQ60 DQ61

VSS

DQS7#

DQS7

VSS

DQ62 DQ63

VSS

EVENT#

SDA

SCL

VTT

BOSS1 BOSS2

A7 A6

A4 A2

A0

NC

B

+1.5V

2

DDR_B_D4

4

DDR_B_D5

6 8

DDR_B_DQS#0

10

DDR_B_DQS0

12 14

DDR_B_D6

16

DDR_B_D7

18 20

DDR_B_D12

22

DDR_B_D13

24 26 28

SM_DRAMRST#

30 32

DDR_B_D14

34

DDR_B_D15

36 38

DDR_B_D20

40

DDR_B_D21

42 44 46 48

DDR_B_D22

50

DDR_B_D23

52 54

DDR_B_D28

56

DDR_B_D29

58 60

DDR_B_DQS#3

62

DDR_B_DQS3

64 66

DDR_B_D30

68

DDR_B_D31

70 72

DDRB_CKE1

74 76

DDR_B_MA15

78

DDR_B_MA14

80 82

DDR_B_MA11

84

DDR_B_MA7

86 88

DDR_B_MA6

90

DDR_B_MA4

92 94

DDR_B_MA2

96

DDR_B_MA0

98 100

DDRB_CLK1

102

DDRB_CLK1#

104 106

DDR_B_BS1

108

DDR_B_RAS#

110 112

DDRB_SCS0#

114

DDRB_ODT0

116 118

DDRB_ODT1

120 122 124

+VREF_CAB

126 128

DDR_B_D32

130

DDR_B_D33

132 134 136 138

DDR_B_D38

140

DDR_B_D39

142 144

DDR_B_D44

146

DDR_B_D45

148 150

DDR_B_DQS#5

152

DDR_B_DQS5

154 156

DDR_B_D46

158

DDR_B_D47

160 162

DDR_B_D52

164

DDR_B_D53

166 168 170 172

DDR_B_D50

174

DDR_B_D51

176 178

DDR_B_D60

180

DDR_B_D61

182 184

DDR_B_DQS#7

186

DDR_B_DQS7

188 190

DDR_B_D62

192

DDR_B_D63

194 196 198

PM_SMBDATA

200

PM_SMBCLK

202 204

206 208

+0.75VS

B

SM_DRAMRST# <7,11>

DDRB_CKE1 <7>

DDRB_CLK1 <7> DDRB_CLK1# <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>DDR_B_BS0<7>

DDRB_SCS0# <7> DDRB_ODT0 <7>

DDRB_ODT1 <7>

C187

Close to JDDRH.126

PM_SMBDATA <11,16,25> PM_SMBCLK <11,16,25>

Reverse Type DDR3 SO-DIMM B

1

C188

0.1U_0402_16V4Z

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDR_B_DQS#[0..7] <7> DDR_B_DQS[0..7] <7> DDR_B_D[0..63] <7> DDR_B_MA[0..15] <7>

+1.5V

12

R83

1K_0402_1%

+VREF_DQB

+1.5V

12

R86

1K_0402_1%

12

R94

1K_0402_1%

Layout Note: Place near JDDRH

+1.5V

C192 10U_0603_6.3V6MC192 10U_0603_6.3V6M

1 2

C194 10U_0603_6.3V6MC194 10U_0603_6.3V6M

1 2

C197 10U_0603_6.3V6MC197 10U_0603_6.3V6M

1 2

C200 10U_0603_6.3V6MC200 10U_0603_6.3V6M

1 2

C202 10U_0603_6.3V6MC202 10U_0603_6.3V6M

1 2

C204 10U_0603_6.3V6MC204 10U_0603_6.3V6M

1 2

Compal Secret Data

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

12

R84

1K_0402_1%

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

D

C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z

1 2

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

1 2

C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z

1 2

C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z

1 2

D

E

Layout Note: Place near JDDRH.203 and 204

+0.75VS+1.5V

C191 10U_0603_6.3V6MC191 10U_0603_6.3V6M

1 2

C195 1U_0402_6.3V6KC195 1U_0402_6.3V6K

12

C198 1U_0402_6.3V6KC198 1U_0402_6.3V6K

12

C201 1U_0402_6.3V6KC201 1U_0402_6.3V6K

12

C203 1U_0402_6.3V6KC203 1U_0402_6.3V6K

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

12 43Monday, January 10, 2011

E

of

A

B

C

D

E

F

G

H

R108

100K_0402_5%

2

5

R112

R112 100K_0402_5%

100K_0402_5%

1 2

+3VS

12

0.1U_0402_16V7K

R109

1 2

47K_0402_5%

3

0.01U_0402_25V7K

Q1B

Q1B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

C228

LCDPWR_GATE

C229

+3VS

2

W=60mils

S

Q17

G

1 1

2

AO3413_SOT23

2

D

1 3

+LCD_VDD

W=60mils

1

C233

0.1U_0402_16V4Z

2

+LCD_VDD

Reserve for EMI request

150_0603_5%

@

1 2

R78 0_0402_5%

R78 0_0402_5% L55

CAM@L55

CAM@

USB20_P11<19>

1 1

12

LCD_EDID_CLK LCD_EDID_DATA LED_PWM

12

R120

R120 47K_0402_5%

47K_0402_5%

LCD_EDID_CLK<18> LCD_EDID_DATA<18>

PCH_PWM<18>

D2

RB751V40_SC76-2

Close to LVDS Connector

USB20_N11<19>

1

4

WCM-2012-900T_0805

@

1 2

R96 0_0402_5%

2

3

USB20_P11_R

2

USB20_N11_R

3

UMA_ENVDD<18>

150_0603_5%

2N7002DW-T/R7_SOT363-6

12

R107

61

Q1A

UMA_ENVDD

LCD/PANEL BD. Conn.

CAM@

+3VS

2 2

Pin13 is GND pin but LVDS cable is NC.

3 3

1 2

R388 0_0603_5%

JLVDS

31

G1

32

G2

33

G3

34

G4

ACES_88341-3001

@JLVDS

@

1

2

3

4

5

6

7

8

9

10

11

11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

LCD_EDID_DATA

W=20mils

CAM@

+3VS_LVDS_CAM

0.1U_0402_16V4Z

0.1U_0402_16V4Z C225

C225

USB20_N11_R USB20_P11_R

INT_MIC_CLK INT_MIC_DATA

LCD_EDID_CLK

LED_PWM BKOFF#_R

68P_0402_50V8J

CAM@

1 2

2 3

PACDN042Y3R_SOT23-3

D1

1 2

R113 10K_0402_5%R113 10K_0402_5%

C234

D1

RB751V40_SC76-2

1 2

+LCD_INV

Rated Current MAX:600mA

FBMA-L11-201209-221LMA30T_0805

1

C235

0.1U_0402_25V6

2

D84

@D84

@

1

LCD_TXOUT0+ <18>

LCD_TXOUT1+ <18>

LCD_TXOUT2+ <18>

LCD_TXCLK- <18>

LCD_TXCLK+ <18>

12

INT_MIC_CLK <28>

INT_MIC_DATA <28>

LCD_TXOUT0- <18>

LCD_TXOUT1- <18>

LCD_TXOUT2- <18>

BKOFF# <30>

B+

L2

For EMI

@

C231

680P_0402_50V7K

1

2

+LCD_VDD_R

+3VS

1

C232

0.1U_0402_16V4Z

2

1.5A

L15

0_0805_5%

1

C226

0.1U_0402_16V4Z

2

12

1

2

+LCD_VDD

C227

4.7U_0805_10V4Z

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2010/09/03 2012/12/31

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

F

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

G

A

of

13 43Monday, January 10, 2011

H

A

B

C

D

E

1

D3

@D3

@

D4

DAN217_SC59

1 1

L3 NBQ100505T-800Y_0402L3 NBQ100505T-800Y_0402

UMA_CRT_R<18> UMA_CRT_G<18> UMA_CRT_B<18>

R138

R139

R140

12

150_0402_1%

2 2

C244 0.1U_0402_16V4ZC244 0.1U_0402_16V4Z

UMA_CRT_HSYNC<18>

SN74AHCT1G125GW_SOT353-5

UMA_CRT_VSYNC<18>

C238

150_0402_1%

+CRT_VCC

1 2

1

C239

2

2.2P_0402_50V8C

1

5

P

OE#

A2Y

G

U6

3

4

1 2

L4 NBQ100505T-800Y_0402L4 NBQ100505T-800Y_0402

1 2

L5 NBQ100505T-800Y_0402L5 NBQ100505T-800Y_0402

1 2

1

C240

2

2.2P_0402_50V8C

+CRT_VCC

SN74AHCT1G125GW_SOT353-5

DAN217_SC59

2

3

1

C241

2

R141 10K_0402_5%R141 10K_0402_5%

1

5

P

4

OE#

A2Y

G

U7

3

2

2.2P_0402_50V8C

1

D5

@D4

@

DAN217_SC59

2

3

1

C242

2

2.2P_0402_50V8C

12

D_CRT_HSYNC

D_CRT_VSYNC

1

C243

@D5

@

3

+3VS

1

2

2.2P_0402_50V8C

1 2

L6 10_0402_5%L6 10_0402_5%

1 2

L7 10_0402_5%L7 10_0402_5%

CRT_R_L CRT_G_L

CRT_B_L

C246

C246 @

@

If=1A

D6

2 3

+CRT_VCC

HSYNC

VSYNC

1

2

10P_0402_50V8J

1

RB491D_SOT23-3

CRT_R_L CRT_DDC_DAT

CRT_G_L HSYNC

CRT_B_L VSYNC

CRT_DDC_CLK

F1

21

1.1A_6V_MINISMDC110F-2

T76 PADT76 PAD

T77 PADT77 PAD

+5VS +CRT_VCC_R +CRT_VCC

1

C245

C245 @

@

2

10P_0402_50V8J

40 mils

C237

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

ALLTO_C10532-11505-L_15P-T

JCRT

6 11 1 7 12 2 8 13 3 9 14 4 10 15 5

1

2

@JCRT

@

16

G

17

G

CRT CONNECTOR

3 3

+CRT_VCC

+3VS

R159

@

1 2

1

2

R159

4.7K_0402_5%

CRT_DDC_CLK

CRT_DDC_DAT

C283

C283 470P_0402_50V8J

470P_0402_50V8J @

@

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

E

of

14 43Monday, January 10, 2011

of

14 43Monday, January 10, 2011

of

14 43Monday, January 10, 2011

A

R153

4.7K_0402_5%

2

Q205A

UMA_CRT_CLK<18>

UMA_CRT_DATA<18>

1

C282

33P_0402_50V8K

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

@

2010/09/03 2012/12/31

C

Q205A

5

2N7002DW-T/R7_SOT363-6

Q205B

4

2N7002DW-T/R7_SOT363-6

1

C285

C285 33P_0402_50V8K

33P_0402_50V8K

2

@

61

3

470P_0402_50V8J

Compal Secret Data

Deciphered Date

C284

5

CMOS Setting, near DDR Door

R292

+RTCVCC

D D

R292 20K_0402_5%

20K_0402_5%

iME Setting.

R293

R293 20K_0402_5%

20K_0402_5%

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

R117

1 2

R118

1 2

+3VS

+3VALW

HDA_SDO

ME debug mode, this signal has a weak internal pull down Low = Disable (default)

*

High = Enable (flash descriptor security overide)

C C

HDA_SYNC

This signal has a weak internal pull down

*

H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V Need to pull high for Huron River platform

B B

@

1 2

R276 1K_0402_5%

1 2

R560 10K_0402_5%R560 10K_0402_5%

AZ_SYNC_HD<28>

PCH_RTCRST#

1 2

PCH_SRTCRST#

1 2

High - Enable Internal VRs (must be always pulled high)

1M_0402_5%

1M_0402_5% 330K_0402_5%

330K_0402_5%

SM_INTRUDER# PCH_INTVRMEN

+3VALW

1 2

R156 33_0402_5%R156 33_0402_5%

1 2

R1444 1M_0402_5%R1444 1M_0402_5%

C247

1U_0402_6.3V6K

C248

1U_0402_6.3V6K

PCH_SPKR

CR_CPPE#

R284 1K_0402_5%R284 1K_0402_5%

AZ_SYNC_R

JCOMS @JCOMS @

1 2

JME @JME @

1 2

12

PCH_SPK High = Enabled (No Reboot) Low = Disabled (Default)

AZ_SYNC

12

+5VS

G

2

Q21

13

D

S

D

S

BSS138_NL_SOT23-3

@

1 2

R285 0_0402_5%

remove socket for DVT phase, due to ME height limitation

Please close to U2 PCH

PCH_SPICS# PCH_SPIDO

4

C216 15P_0402_50V8JC216 15P_0402_50V8J Y3

Y3

2

OSC

NC

3

OSC

NC

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002 C205 15P_0402_50V8JC205 15P_0402_50V8J

AZ_BITCLK_HD<28>

PCH_SPKR<28>

AZ_RST_HD#<28>

AZ_SDIN0_HD<28>

+3VALW

AZ_SDOUT_HD<28>

PWRME_CTRL#<30>

SA000041P00

4M Byte

U13

1

CS#

VCC

2

DO

HOLD#

3

WP#

CLK

4

GND

DI

W25Q32BVSSIG_SO8

12

1 4

12

R286 33_0402_5%R286 33_0402_5%

1 2

R142 33_0402_5%R142 33_0402_5%

1 2

R273 1K_0402_5%

R273 1K_0402_5% R289 33_0402_5%R289 33_0402_5%

1 2

R580 0_0402_5%R580 0_0402_5%

1 2

8 7 6 5

@

12

PCH_SPICLK PCH_SPIDI

R291

10M_0402_5%

T37 PADT37 PAD T38 PADT38 PAD T39 PADT39 PAD

+3VS

12

1

2

C494

0.1U_0402_16V4Z

PCH_RTCX1 PCH_RTCX2 PCH_RTCRST# PCH_SRTCRST# SM_INTRUDER# PCH_INTVRMEN

AZ_BITCLKAZ_BITCLK AZ_SYNC PCH_SPKR AZ_RST#AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

CR_CPPE#

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

PCH_SPICLK PCH_SPICS#

PCH_SPIDI PCH_SPIDO

for EMI

R397

10_0402_5%

10P_0402_50V8J

3

U2A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

COUGARPOINT_FCBGA989~D Q65R3@

PCH_SPICLK

12

1

C86

2

JTAG

RTCIHDA

SPI

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED# SATA0GP / GPIO21 SATA1GP / GPIO19

C38 A38 B37 C37

D36 E36

K36 V5

SATA_PRX_C_DTX_N0

AM3

SATA_PRX_C_DTX_P0

AM1

SATA_PTX_DRX_N0

AP7

SATA_PTX_DRX_P0

AP5 AM10

AM8 AP11 AP10

SATA_PRX_C_DTX_N2

AD7

SATA_PRX_C_DTX_P2

AD5 AH5

SATA_PTX_DRX_P2

AH4 AB8

AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11 Y10

AB12 AB13

RBIAS_SATA3

AH1

SATA_LED#

P3

CR_WAKE#

V14

PCH_GPIO19

P1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATAICOMP

SATA3_COMP

2

LPC_AD0 <30,31> LPC_AD1 <30,31> LPC_AD2 <30,31> LPC_AD3 <30,31>

LPC_FRAME# <30,31>

SERIRQ <30,31>

SATA_PRX_C_DTX_N0 <24> SATA_PRX_C_DTX_P0 <24> SATA_PTX_DRX_N0 <24> SATA_PTX_DRX_P0 <24>

SATA_PRX_C_DTX_N2 <24> SATA_PRX_C_DTX_P2 <24> SATA_PTX_DRX_N2 <24> SATA_PTX_DRX_P2 <24>

1 2

R279 37.4_0402_1%R279 37.4_0402_1%

1 2

R280 49.9_0402_1%R280 49.9_0402_1%

1 2

R281 750_0402_1%R281 750_0402_1%

PCH_GPIO19 <19>

BOOT BIOS Strap Bit 0

1

SERIRQ

R136 10K_0402_5%R136 10K_0402_5%

HDD

+1.05VS_VCC_SATA

+1.05VS_SATA3

ODD

SATA_LED#

CR_WAKE#

PCH_GPIO19SATA_PTX_DRX_N2

R336 10K_0402_5%R336 10K_0402_5%

R334 10K_0402_5%R334 10K_0402_5%

R335 10K_0402_5%R335 10K_0402_5%

RTC schematic for non-chargeable

C486

0.1U_0402_16V4Z

+RTCVCC

1

BAV70W_SOT323-3

2

D13

1

LOTES_AAA-BAT-054-K01

3 2

R277 1K_0402_5%R277 1K_0402_5%

@ JRTC

@

1 2

+3VL

12

JRTC

12

+RTCBATT

+3VS

1

+

-

2

0812 -> Add R277 for RTC reserve charge

+3VALW +3VALW+3VALW

12

R363

R363 200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI

12

R306

R306 100_0402_1%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

100_0402_1%

1 2

R355 51_0402_1%R355 51_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet

12

R330

R330 200_0402_5%

200_0402_5%

12

R295

R295 100_0402_1%

100_0402_1%

PCH_JTAG_TCK

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

R278

R278 200_0402_5%

200_0402_5%

1 2

R301

R301 100_0402_1%

100_0402_1%

1 2

15 43Monday, January 10, 2011

1

15 43Monday, January 10, 2011

A

of

5

JPW@JPW

12

@

PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1

PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2

CLK_LAN# CLK_LAN

CLKREQ_LAN#

CLK_WLAN# CLK_WLAN

CLKREQ_WLAN#

CLKREQ_JET#

CLKREQ_CR#

PCH_GPIO26

CLKREQ_USB30#

PASSWORD_CLEAR#

LVDS_SEL

PANEL_SEL CLK_BCLK_ITP#

CLK_BCLK_ITP

LVDS_SEL

PCIE_PRX_C_LANTX_N1<26>

LAN

WLAN

D D

+3VS

C C

+3VALW

R343 10K_0402_5%R343 10K_0402_5%

B B

R344 10K_0402_5%R344 10K_0402_5% R345 10K_0402_5%R345 10K_0402_5% R346 10K_0402_5%R346 10K_0402_5% R348 10K_0402_5%R348 10K_0402_5% R351 10K_0402_5%R351 10K_0402_5%

A A

PCIE_PRX_C_LANTX_P1<26> PCIE_PTX_C_LANRX_N1<26> PCIE_PTX_C_LANRX_P1<26>

PCIE_PRX_WLANTX_N2<25>

PCIE_PRX_WLANTX_P2<25> PCIE_PTX_C_WLANRX_N2<25> PCIE_PTX_C_WLANRX_P2<25>

R287 10K_0402_5%R287 10K_0402_5%

1 2

R338 10K_0402_5%R338 10K_0402_5%

1 2

1 2 1 2 1 2 1 2 1 2 1 2

CLK_RES_ITP#<10>

CLK_RES_ITP<10>

CLK_CPU_ITP#<5>

CLK_CPU_ITP<5>

@

1 2

R584 10K_0402_5%

CLKREQ_USB30#

PASSWORD_CLEAR#

PANEL_SEL

CLKREQ_JET# CLKREQ_WLAN#

CLKREQ_LAN#

PCH_GPIO26

CLKREQ_CR#

PANEL_SEL

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K

12

C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

12

C501 0.1U_0402_16V7KC501 0.1U_0402_16V7K

12

C502 0.1U_0402_16V7KC502 0.1U_0402_16V7K

12

CLK_LAN#<26>

LAN

CLK_LAN<26>

CLKREQ_LAN#<26>

WLAN

+3VALW

CLK_WLAN#<25> CLK_WLAN<25>

CLKREQ_WLAN#<25>

Please place under DDR SODIMM. 10/25

R233 0_0402_5%@R233 0_0402_5%@ R282 0_0402_5%@R282 0_0402_5%@

R352 0_0402_5%R352 0_0402_5% R353 0_0402_5%R353 0_0402_5%

R347 10K_0402_5%R347 10K_0402_5%

1 2

12 12

4

U2B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989~D Q65R3@

PCI-E*

CLOCKS

SML0ALERT# / GPIO60

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

PANEL_SEL

HL

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_DMI2_N CLKIN_DMI2_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

3

EC_LID_OUT#

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

PCH_SMLCLK0

C8

PCH_SMLDATA0

G12

PCH_GPIO74

C13

PCH_SMLCLK1

E14

PCH_SMLDATA1

M16

M7

Control Link only for support Intel IAMT.

T11

P10

PCH_GPIO47

M10

AB37 AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

CLK_DPLL#

AM12

CLK_DPLL

AM13

PCH_CLK_DMI#

BF18

PCH_CLK_DMI

BE18

CLKIN_GND1#

BJ30

CLKIN_GND1

BG30

CLK_DOT#

G24

CLK_DOT

E24

CLK_SATA#

AK7

CLK_SATA

AK5

CLK_14M_PCH

K45

CLK_PCILOOP

H45

PCH_X1

V47

PCH_X2

V49

XCLK_RCOMP

Y47

K43 F47 H47 K49

R354 90.9_0402_1%R354 90.9_0402_1%

CLK_FLEX0 PCH_48MCLK CLK_FLEX2 CLK_FLEX3

1 2

R576

1 2

22_0402_5%

EC_LID_OUT# <30>

T13 PADT13 PAD T14 PADT14 PAD

T29 PADT29 PAD

T31 PADT31 PAD T33 PADT33 PAD

DRAMRST_CNTRL_PCH <7>

CLK_CPU_DMI# <5> CLK_CPU_DMI <5>

From Clock Gen.

CLK_PCILOOP <19>

+1.05VS_VCCDIFFCLKN

48MCLK_CR <27>

2

120 MHz for eDP

1

R232 2.2K_0402_5%R232 2.2K_0402_5%

+3VALW +3VS

12

R260 2.2K_0402_5%R260 2.2K_0402_5%

12

PCH_SMBDATA

PCH_SMBCLK

R364 2.2K_0402_5%R364 2.2K_0402_5%

12

R385 2.2K_0402_5%R385 2.2K_0402_5%

12

PCH_SMLDATA1

PCH_SMLCLK1

EC_LID_OUT# DRAMRST_CNTRL_PCH PCH_GPIO74 PCH_SMLCLK0 PCH_SMLDATA0 PCH_GPIO47

PCH_CLK_DMI# PCH_CLK_DMI

CLKIN_GND1# CLKIN_GND1

CLK_DOT# CLK_DOT

CLK_SATA# CLK_SATA

CLK_14M_PCH

Q3B

3

2

2N7002DW-T/R7_SOT363-6

Q3A

6 1

2N7002DW-T/R7_SOT363-6

Q4B

3

2

2N7002DW-T/R7_SOT363-6

Q4A

6 1

2N7002DW-T/R7_SOT363-6

R400 4.7K_0402_5%R400 4.7K_0402_5%

5

R386 4.7K_0402_5%R386 4.7K_0402_5%

4

5

4

R123 10K_0402_5%R123 10K_0402_5%

1 2

R228 1K_0402_5%R228 1K_0402_5%

1 2

R234 10K_0402_5%R234 10K_0402_5%

1 2

R238 10K_0402_5%R238 10K_0402_5%

1 2

R239 10K_0402_5%R239 10K_0402_5%

1 2

R251 10K_0402_5%R251 10K_0402_5%

1 2

R242 10K_0402_5%R242 10K_0402_5%

1 2

R243 10K_0402_5%R243 10K_0402_5%

1 2

R244 10K_0402_5%R244 10K_0402_5%

1 2

R245 10K_0402_5%R245 10K_0402_5%

1 2

R246 10K_0402_5%R246 10K_0402_5%

1 2

R247 10K_0402_5%R247 10K_0402_5%

1 2

R248 10K_0402_5%R248 10K_0402_5%

1 2

R249 10K_0402_5%R249 10K_0402_5%

1 2

R250 10K_0402_5%R250 10K_0402_5%

1 2

PM_SMBDATA <11,12,25>

PM_SMBCLK <11,12,25>

+3VS+3VALW

EC_SMB_DA2 <30>

EC_SMB_CK2 <30>

+3VALW

For EMI

@

CLK_PCILOOP

27P_0402_50V8J

@

12

R417 10_0402_5%

R365 1M_0402_5%R365 1M_0402_5%

PCH_X1 PCH_X2

1 2

25MHZ_20PF_7A25000012

1

C506

2

@

C474 22P_0402_50V8J

12

Y2

12

1

C507

C507 27P_0402_50V8J

27P_0402_50V8J

2

Channel LVDS

5

4

EDP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

1

16 43Monday, January 10, 2011

of

A

5

+3VALW

D D

C C

VGATE<5,30,41>

PM_PWROK<5,30>

Stuff R137 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit

B B

PS3@

R316 200_0402_5%

R316 200_0402_5% R218 10K_0402_5%R218 10K_0402_5% R220 10K_0402_5%R220 10K_0402_5% R221 10K_0402_5%R221 10K_0402_5%

R127 10K_0402_5%R127 10K_0402_5% R128 10K_0402_5%R128 10K_0402_5% R129 10K_0402_5%R129 10K_0402_5%

12 12 12 12

12 12 12

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1 2

C250

PM_PWROK

PCH_SUSPWRDN_RSUSACK#

@

12

R137 0_0402_5%

DRAMPWROK PCH_SUSPWRDN_R RI# PCH_LOW_BAT#

PCH_RSMRST# PM_PWROK SYS_PWROK

0_0402_5%

R259

@R259

@

1 2

+3VS

1

IN1

2

IN2

+1.05VS_PCH

8/30 Reserve R259 For cost down plan

+3VALW

ACIN<30,36>

XDP_DBRESET#<5>

DRAMPWROK<5>

PCH_RSMRST#<30>

PCH_SUSPWRDN<30>

PBTN_OUT#<5,30>

1 2

R469 330K_0402_5%R469 330K_0402_5%

5

U12

P

4

O

G

SN74AHC1G08DCKR_SC70-5

3

DMI_CTX_PRX_N0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>

DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>

DMI_PTX_CRX_N0<6> DMI_PTX_CRX_N1<6> DMI_PTX_CRX_N2<6> DMI_PTX_CRX_N3<6>

DMI_PTX_CRX_P0<6> DMI_PTX_CRX_P1<6> DMI_PTX_CRX_P2<6> DMI_PTX_CRX_P3<6>

PM_PWROK

D12

1 2

RB751V40_SC76-2

4

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

1 2

R130 49.9_0402_1%R130 49.9_0402_1%

1 2

R160 750_0402_1%R160 750_0402_1%

R216 0_0402_5%R216 0_0402_5%

R320 0_0402_5%R320 0_0402_5%

DMI_COMP

RBIAS_CPY

T34PAD T34PAD

1 2

SUSACK#

XDP_DBRESET#

SYS_PWROK

PM_PWROK_R

DRAMPWROK

PCH_RSMRST#

PCH_SUSPWRDN_R

PBTN_OUT#

PCH_ACIN

PCH_LOW_BAT#

RI#

3

U2C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PWR_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989~D Q65R3@

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1

FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SUSCLK / GPIO62

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

2

FDI_CTX_PRX_N0

BJ14

FDI_CTX_PRX_N1

AY14

FDI_CTX_PRX_N2

BE14

FDI_CTX_PRX_N3

BH13

FDI_CTX_PRX_N4

BC12

FDI_CTX_PRX_N5

BJ12

FDI_CTX_PRX_N6

BG10

FDI_CTX_PRX_N7

BG9

FDI_CTX_PRX_P0

BG14

FDI_CTX_PRX_P1

BB14

FDI_CTX_PRX_P2

BF14

FDI_CTX_PRX_P3

BG13

FDI_CTX_PRX_P4

BE12

FDI_CTX_PRX_P5

BG12

FDI_CTX_PRX_P6

BJ10

FDI_CTX_PRX_P7

BH9

FDI_INT

AW16

FDI_FSYNC0

AV12

FDI_FSYNC1

BC10

FDI_LSYNC0

AV14

FDI_LSYNC1

BB10

DSWVREN

A18

PCH_DPWROK DSWVREN

E22

EC_SWI#

B9

PM_GPIO32

N3

SUS_STAT#

G8

N14

PM_SLP_S5#

D10

PM_SLP_S4#

H4

PM_SLP_S3#

F4

PM_SLP_A#

G10

PM_SLP_SUS#

G16

H_PM_SYNC

AP14

PCH_GPIO29 PCH_GPIO29

K14

FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>

FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>

FDI_INT <6> FDI_FSYNC0 <6> FDI_FSYNC1 <6> FDI_LSYNC0 <6> FDI_LSYNC1 <6>

EC_SWI# <26>

T17 PADT17 PAD

32.768 KHz

CLK_EC <30>

PM_SLP_S5# <30>

PM_SLP_S4# <30>

PM_SLP_S3# <30>

T35 PADT35 PAD

T58 PADT58 PAD

H_PM_SYNC <5>

1

1 2

R222 0_0402_5%R222 0_0402_5%

PCH_RSMRST#PCH_DPWROK

Stuff R222 if do not support DeepSX state

+RTCVCC

R224 330K_0402_5%R224 330K_0402_5% R225 330K_0402_5%@R225 330K_0402_5%@

12 12

DSWVREN must be always pulled high to +RTCVCC DSWVREN - Internal Deep Sleep 1.05V regulator

H：Enable

*

L：Disable

+3VS

PM_GPIO32

8/18 Change Net name from PM_CLKRUN# to PCH_GPIO32 by HW Review demand

EC_SWI#

R313 8.2K_0402_5%R313 8.2K_0402_5%

1 2

R319 10K_0402_5%R319 10K_0402_5%

1 2

R563 10K_0402_5%@R563 10K_0402_5%@

1 2

+3VALW

H_PM_SYNC

C898 220P_0402_50V7K

1 2

@

9/1 Reserve C894 for ESD requset

D16

RB751V40_SC76-2

D14

POK<35,37>

A A

5

1 2

RB751V40_SC76-2

12

PCH_RSMRST#PM_PWROK PCH_RSMRST#

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

17 43Monday, January 10, 2011

1

of

A

5

UMA_ENBKL<30> UMA_ENVDD<13>

LCD_EDID_CLK<13>

D D

12

UMA_ENBKL

LCTL_CLK

LCTL_DATA

LCD_EDID_CLK

LCD_EDID_DATA

UMA_CRT_CLK

UMA_CRT_DATA

UMA_CRT_B

UMA_CRT_G

UMA_CRT_R

1 2

R230 100K_0402_5%R230 100K_0402_5%

+3VS

R471 2.2K_0402_5%R471 2.2K_0402_5%

R472 2.2K_0402_5%R472 2.2K_0402_5%

R223 2.2K_0402_5%R223 2.2K_0402_5%

R229 2.2K_0402_5%R229 2.2K_0402_5%

C C

B B

R237 2.2K_0402_5%R237 2.2K_0402_5%

R231 2.2K_0402_5%R231 2.2K_0402_5%

1 2

R240 150_0402_1%R240 150_0402_1%

1 2

R241 150_0402_1%R241 150_0402_1%

1 2

R318 150_0402_1%R318 150_0402_1%

LCD_EDID_DATA<13>

R219 2.37K_0402_1%R219 2.37K_0402_1%

LCD_TXCLK-<13> LCD_TXCLK+<13>

LCD_TXOUT0-<13> LCD_TXOUT1-<13> LCD_TXOUT2-<13>

LCD_TXOUT0+<13> LCD_TXOUT1+<13> LCD_TXOUT2+<13>

UMA_CRT_B<14> UMA_CRT_G<14> UMA_CRT_R<14>

UMA_CRT_CLK<14> UMA_CRT_DATA<14>

UMA_CRT_HSYNC<14> UMA_CRT_VSYNC<14>

PCH_PWM<13>

1 2

4

UMA_ENBKL UMA_ENVDD

PCH_PWM LCD_EDID_CLK

LCD_EDID_DATA LCTL_CLK

LCTL_DATA LVDS_IBG

T40 PADT40 PAD

LCD_TXCLKLCD_TXCLK+

LCD_TXOUT0LCD_TXOUT1LCD_TXOUT2-

LCD_TXOUT0+ LCD_TXOUT1+ LCD_TXOUT2+

UMA_CRT_B UMA_CRT_G UMA_CRT_R

UMA_CRT_CLK UMA_CRT_DATA

UMA_CRT_HSYNC UMA_CRT_VSYNC

CRT_IREF

12

R311 1K_0402_0.5%R311 1K_0402_0.5%

3

U2D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGARPOINT_FCBGA989~D Q65R3@

LVDS

CRT

SDVO_CTRLDATA

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLDATA

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47

HDMI_HPD

AT40 AV42

AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49

R473 100K_0402_5%R473 100K_0402_5%

AT38 AY47

AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43

R524 100K_0402_5%R524 100K_0402_5%

BH41 BB43

BB45 BF44 BE44 BF42 BE42 BJ42 BG42

12

R1433

R1433 100K_0402_5%

100K_0402_5%

12

2

HDMI_HPD <20>

1

A A

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

18 43Monday, January 10, 2011

1

A

of

5

D D

+3VS

RP1

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP2

RP2

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP3

RP3

C C

8.2K_0804_8P4R_5%

1 2

R321 8.2K_0402_5%R321 8.2K_0402_5%

1 2

R322 8.2K_0402_5%R322 8.2K_0402_5%

B B

PLT_RST#

R534

100K_0402_5%

1 2

A A

PCI_PIRQC#

18

PCH_GPIO4

27

PCH_GPIO2

36

PCI_PIRQA#

45

8/23 PIN swap for layout request

PCH_GPIO52

18

PCH_GPIO53

27

PCH_GPIO54

36

RF_OFF#

45

PCH_GPIO50

18

PCI_PIRQB#

27

ODD_DA#

36

WL_OFF#

45

PCH_GPIO5 PCI_PIRQD#

WL_OFF#<25>

ODD_DA#<24>

PLT_RST#<5,25,26,30,31>

CLK_PCI_EC<30> CLK_PCILOOP<16> CLK_PCI_DDR<31>

RF_OFF#

R5371K_0402_5% @ R5371K_0402_5% @

12

PCH_GPIO19

R5381K_0402_5% @ R5381K_0402_5% @

12

PCH_GPIO19 <15>

T32 PADT32 PAD

1 2 1 2 1 2

4

U2E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO50 PCH_GPIO52 PCH_GPIO54

RF_OFF# PCH_GPIO53 WL_OFF#

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PCI_PME# PLT_RST#

R52522_0402_5% R52522_0402_5% R52622_0402_5% R52622_0402_5% R52722_0402_5% R52722_0402_5%

CLK_EC_R CLK_PCH CLK_SIO

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989~D Q65R3@

Boot BIOS Strap

RF_OFF#

PCH_GPIO19 Boot BIOS Loaction

0 0 1

0 1 0

11

RSVD

LPC

Reserved

PCI SPI

PCI

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

EHCI 1

EHCI 2

USB

*

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

DF_TVS

NV_RCOMP

NV_RB#

NV_RE#_WRB0 NV_RE#_WRB1

NV_WE#_CK0 NV_WE#_CK1

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

3

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AY1

AV10 AT8 AY5

BA2 AT12

BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

NV_CLE

USB20_N0 USB20_P0 USB20_N1 USB20_P1

USB20_N0 <24> USB20_P0 <24> USB20_N1 <24> USB20_P1 <24>

USB-LEFT1 USB-LEFT2

USB port6 and port7 are disabled on HM65

USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11

USBBIAS

USB_OC#0 USB_OC#1 USB_OC#2 SLP_CHG_M3 SLP_CHG_M4 USB_OC#5 USB_OC#6 USB_OC#7

USB20_N9 <25> USB20_P9 <25> USB20_N10 <27> USB20_P10 <27> USB20_N11 <13> USB20_P11 <13>

1 2

R535 22.6_0402_1%R535 22.6_0402_1%

Within 500 mils

USB_OC#0 <24,30>

WiMax&BT combo card Card Reader Int. Camera

USB-Left

2

1

DMI & FDI Termination Voltage

Set to VCC when HIGH

NV_CLE

Set to VSS when LOW

+1.8VS

12

R324

2.2K_0402_5%

NV_CLE

R323 1K_0402_5%R323 1K_0402_5%

8/18 Change R324 From 1K to 2.2K by Intel check list demand

H_SNB_IVB#

12

C895 220P_0402_50V7K

1 2

@

H_SNB_IVB# <5>

9/1 Reserve C895 for ESD requset

+3VALW

RP4 USB_OC#6 USB_OC#0 USB_OC#5 SLP_CHG_M4

8/23 PIN swap for layout request

USB_OC#1 USB_OC#2 SLP_CHG_M3 USB_OC#7

RP4

4 5 3 6 2 7 1 8

10K_0804_8P4R_5%

RP5

4 5 3 6 2 7 1 8

10K_0804_8P4R_5%

WL_OFF#

R5361K_0402_5% @ R5361K_0402_5% @

12

5

A16 Swap Override Strap

WL_OFF#

*

4

Low= A16 swap override Enable High= A16 swap override Disable

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

19 43Monday, January 10, 2011

1

of

A

5

4

3

2

1

+3VALW

USB30_SMI# EC_SMI# PCH_GPIO12 PCH_GPIO28 3D_DET#

BT_ON# HDMI_HPD PCH_GPIO1 BT_DET# OPTIMUS_EN# ODD_DETECT# PCH_GPIO6 PCH_GPIO16 EC_SCI# CIR_EN# ISDBT_DET PCH_GPIO49 PCH_GPIO17

USB30_SMI# PCH_GPIO37 PCH_GPIO27

ISDBT_DET

PCH_GPIO28

1 2 1 2 1 2 1 2

1 2

@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

@

1 2 1 2 1 2

@

1 2

R325 1K_0402_5%@R325 1K_0402_5%@

1 2

12

R390 1K_0402_5%R390 1K_0402_5% R558 10K_0402_5%R558 10K_0402_5%

D D

C C

B B

R556 10K_0402_5%R556 10K_0402_5% R557 10K_0402_5%R557 10K_0402_5% R549 10K_0402_5%R549 10K_0402_5%

+3VS

R567 10K_0402_5%R567 10K_0402_5% R539 10K_0402_5%

R539 10K_0402_5% R540 10K_0402_5%R540 10K_0402_5% R542 10K_0402_5%R542 10K_0402_5% R554 10K_0402_5%R554 10K_0402_5%

R545 200K_0402_5%R545 200K_0402_5% R546 10K_0402_5%R546 10K_0402_5% R577 10K_0402_5%R577 10K_0402_5% R550 10K_0402_5%R550 10K_0402_5% R551 100K_0402_5%R551 100K_0402_5% R552 10K_0402_5%

R552 10K_0402_5% R553 10K_0402_5%R553 10K_0402_5% R555 10K_0402_5%R555 10K_0402_5%

R437 10K_0402_5%

R437 10K_0402_5% R547 100K_0402_5%R547 100K_0402_5% R402 10K_0402_5%R402 10K_0402_5%

R328 47K_0402_5%R328 47K_0402_5%

GPIO28 On-Die PLL Voltage Regulator

H: Enable

*

L: Disable

HDMI_HPD<18>

EC_SCI#<30> EC_SMI#<30>

BT_ON#<25>

T74 PADT74 PAD

ODD_DETECT#<24>

HDMI_HPD PCH_GPIO1 PCH_GPIO6 EC_SCI# EC_SMI# PCH_GPIO12 USB30_SMI#

PCH_GPIO16

PCH_GPIO17 BT_DET#

PCH_GPIO27 PCH_GPIO28 BT_ON# PCH_GPIO35 ODD_DETECT# PCH_GPIO37 OPTIMUS_EN# CIR_EN# ISDBT_DET PCH_GPIO49 3D_DET#

U2F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989~D Q65R3@

GPIO

NCTF

CPU/MISC

TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

NC_1 NC_2 NC_3 NC_4 NC_5

VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32

C40 B41 C41 A40

P4 AU16 P5 AY11 AY10 T14

AH8 AK11 AH10 AK10 P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

ODD_EN#

PCH_WL_BT_LED LOGO_LED MAXIC_SELECT

GATEA20

KB_RST# H_PWRGOOD PCH_THRMTRIP#

ODD_EN# <33>

T75 PADT75 PAD

GATEA20 <30>

KB_RST# <30>

1 2

R416 390_0402_5%R416 390_0402_5%

This signal has weak internal pull-up, can't be pulled low

H_PWRGOOD <5> H_THERMTRIP# <5>

ODD_EN# GATEA20 KB_RST# LOGO_LED PCH_WL_BT_LED

8/18 Remove PCH PECI by HW Review demand

H_THERMTRIP#

H_PWRGOOD

C896 220P_0402_50V7K

1 2

@

C897 220P_0402_50V7K

1 2

@

9/1 Reserve C896, C897 for ESD requset

1 2

R106 10K_0402_5%R106 10K_0402_5%

1 2

R548 10K_0402_5%R548 10K_0402_5%

1 2

R559 10K_0402_5%R559 10K_0402_5%

1 2

R436 10K_0402_5%R436 10K_0402_5%

1 2

R110 10K_0402_5%R110 10K_0402_5%

+3VS

GPIO8 Integrated Clock Chip Enable (Removed)

H: Disable L: Enable

*

R326 1K_0402_5%@R326 1K_0402_5%@

1 2

A A

Integrated clock enable functionality is achieved by soft-strap The current default is clock enable

5

EC_SMI#

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

20 43Monday, January 10, 2011

1

A

of

5

4

3

2

1

C286

2

10U_0603_6.3V6M

1

C256

C256 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+VCCAFDI_VRM

+1.05VS_PCH

To solve CRT issue

+VCCA_DAC_R

R104

1 2

2.2_0603_1%

+3VS

L1

BLM18PG181SN1D_0603

R474

0_0603_5%

1 2

1

C276

C276 1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

R480

0_0805_5%

L12

BLM18PG181SN1D_0603

+1.8VS

+1.5VS

+1.05VS_VCCP

+3VS

12

PCH Power Rail Table

Voltage Rail

V_PROC_IO

Voltage

1.05

V5REF

V5REF_SUS

VCC3_3

VCCADAC

VCCADPLLA

VCCADPLLB

VCCCORE

VCCDMI

3.3

1.05

1.05VCCIO 2.925

1.05VCCASW 1.01

3.3VCCSPI 0.02

3.3VCCDSW 0.002

1.8 0.19VCCDFTERM

3.3VCCRTC 6 uA

3.3VCCSUS3_3

3.3 / 1.5VCCSusHDA

VCCVRM 1.5 0.16

1.05VCCCLKDMI

VCCSSC 1.05

VCCDIFFCLKN 1.05

VCCALVDS 3.3

1.8VCCTX_LVDS 0.06

S0 Iccmax Current (A)

0.001

5

0.001

0.266

0.001

0.08

1.3

0.042

0.97

0.01

0.02

0.095

0.055

0.001

POWER

2925mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1] VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3] VCCTX_LVDS[4]

DMI

20mA

VCCDFTERM

190mA

NAND / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

U48

U47

AK36 AK37

AM37 AM38 AP36

0.01U_0402_25V7K

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

0.01U_0402_25V7K

+VCCA_LVDS

+VCCTX_LVDS

C514

1

C272

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+VCCP_VCCDMI

+1.05VS_VCC_DMI

1

C278

0.1U_0402_10V7K

2

1

C281

C281 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C512

0.01U_0402_25V7K

+VCCP_VCCDMI

1

C270

C270 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

0.1U_0402_10V7K

0.1U_0402_10V7K C288

C288

1 2

R541 0_0603_5%R541 0_0603_5%

C513

+3VS

R477

0_0805_5%

1 2

+1.8VS

+1.05VS_VCCP

D D

C C

B B

PJ31

2

JUMP_43X118

10U_0603_6.3V6M

+1.05VS_PCH

C277

10U_0603_6.3V6M

@PJ31

@

112

C274

1

C273

2

1U_0402_6.3V6K

1

C269

2

1U_0402_6.3V6K

1

C279

2

+3VS

1U_0402_6.3V6K

1

C275

2

1

C510

2

1U_0402_6.3V6K

1

C289

2

1U_0402_6.3V6K

+1.05VS_PCH

1

C511

C511 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C290

0.1U_0402_10V7K

2

+1.05VS_PCH

+VCCP_VCCDMI

+1.05VS_PCH +VCCA_DAC

1

2

T30 PADT30 PAD

1

2

+VCCAFDI_VRM

T36 PADT36 PAD

U2G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989~D Q65R3@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

21 43Monday, January 10, 2011

1

A

of

5

+3VS

L18

1 2

10UH_LB2012T100MR_20%

D D

+3VS_VCC_CLKF33

1

C301

C301 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C310

C310 1U_0402_6.3V6K

1U_0402_6.3V6K

2

"@" Avoid leakage

+1.05VS_PCH

C C

1U_0402_6.3V6K

+1.05VS_PCH

B B

+1.05VS_PCH

A A

R522

0_0603_5%

R485

0_0603_5%

R521

0_0603_5%

12

@R521

@

12

1

2

L13

1 2

BLM18PG181SN1D_0603

L14

1 2

BLM18PG181SN1D_0603

+VCCDIFFCLK

1

C337

C337 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCDIFFCLKN

1

C320

C320 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VM_VCCSUS

C316

C316 1U_0402_6.3V6K

1U_0402_6.3V6K

1

C287

C295

C295 1U_0402_6.3V6K

1U_0402_6.3V6K

2

10U_0603_6.3V6M

+1.05VS_VCCDIFFCLKN

+1.05VS_VCCP

1

2

1U_0402_6.3V6K

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

1

C291

2

10U_0603_6.3V6M

0.1U_0402_10V7K

+1.05VS_PCH

1U_0402_6.3V6K

R511

1 2

0_0603_5%

C325

4.7U_0603_6.3V6K

C318

0.1U_0402_10V7K

1

2

+3VALW

C305

0.1U_0402_10V7K

+1.05VS_PCH

1

C323

2

1

C298

C298 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C334

1

2

1

C322

C303

0.1U_0402_10V7K

2

4

1

2

@

12

1

2

1

C311

2

22U_0805_6.3V6M

1U_0402_6.3V6K

1

C294

1U_0402_6.3V6K

2

+VCCRTCEXT

1

+VCCAFDI_VRM

2

+1.05VS_VCCADPLLA +1.05VS_VCCADPLLB

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+VCCSST

1

0.1U_0402_10V7K

0.1U_0402_10V7K +1.05VM_VCCSUS

C299

2

1

+RTCVCC

2

C327

1U_0402_6.3V6K

T42 PADT42 PAD

C324

0.1U_0402_10V7K

+PCH_VCCDSW

+3VS_VCC_CLKF33

T41 PADT41 PAD

+VCCSUS

C300

C300 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

1

C312

C312 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C308

2

+V_CPU_IO

0.1U_0402_10V7K

1

C330

2

1

2

POWER

U2J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCIO[8]

AF34

VCCIO[9]

AG34

VCCIO[11]

AG33

VCCIO[10]

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

1

C336

COUGARPOINT_FCBGA989~D Q65R3@

0.1U_0402_10V7K

2

POWER

3mA

1010mA

Clock and Miscellaneous

80mA 80mA

55mA

95mA

1mA

CPURTC

3

119mA

1mA

PCI/GPIO/LPCMISC

SATA USB

10mA

HDA

VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]

VCC3_3[1] VCC3_3[8] VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12] VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2] VCCIO[3] VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26 P26 P28 T27 T29

T23 T24 V23 V24 P24

T26

M26

AN23 AN24

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14 AK1

AF11

AC16 AC17 AD17

T21

V21

T19

P32

+1.05VS_PCH

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

1 2

C306

0.1U_0402_10V7K

+1.05VS_SATA3

T43 PADT43 PAD

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

1

C307

0.1U_0402_16V4Z

2

+1.05VS_PCH

1

C328

C328 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW

1

C321

0.1U_0402_10V7K

2

1

C293

C293 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C297

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+1.05VS_VCC_SATA

1

2

+3VALW

1

C332

0.1U_0402_10V7K

2

@

C335 1U_0402_6.3V6K

1 2

+3VALW

+3VS

1

+3VS

C313

0.1U_0402_10V7K

2

+3VS

+1.05VS_SATA3

1

C329

C329 1U_0402_6.3V6K

1U_0402_6.3V6K

2

R491

0_0805_5%

C331

C331 1U_0402_6.3V6K

1U_0402_6.3V6K

R509 0_0402_5%R509 0_0402_5%

R517 0_0402_5%R517 0_0402_5%

R520 0_0402_5%R520 0_0402_5%

0_0805_5%

1 2

2

R516

0_0805_5%

+1.05VS_PCH

12

+1.05VS_PCH

12

R512

100_0402_5%

+5VALW +3VALW

12

+5VS +3VS

12

R490

1

D8

D8 RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_SUS

1

C326

0.1U_0603_25V7K

2

D7

D7 RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_RUN

1

C304

C304 1U_0603_10V6K

1U_0603_10V6K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

1

22 43Monday, January 10, 2011

A

of

5

U2H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

D D

C C

B B

A A

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989~D Q65R3@

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

4

3

U2I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBGA989~D Q65R3@

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

23 43Monday, January 10, 2011

1

A

of

5

SATA HDD Conn.

D D

C C

+5VS

1

2

JHDD

24

GND

23

GND

SANTA_191201-1

SANTA_191201-1 @

@

Place closely JHDD SATA CONN.

1.2A

1

C357

C356

C356 10U_0603_6.3V6M

10U_0603_6.3V6M

GND

A+

GND

B+

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

Reserved

GND

V12

C357

0.1U_0402_16V4Z

2

1

SATA_PTX_C_DRX_P0

2

SATA_PTX_C_DRX_N0

3

A-

4

SATA_PRX_DTX_N0

5

B-

6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SATA_PRX_DTX_P0

1

C358

0.1U_0402_16V4Z

2

Close to JHDD

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

1 2

+3VS

+5VS

1

C359

0.1U_0402_16V4Z

2

4

SATA_PTX_DRX_P0 <15> SATA_PTX_DRX_N0 <15>

SATA_PRX_C_DTX_N0 <15>

SATA_PRX_C_DTX_P0 <15>

3

SATA ODD Conn

JODD

15

GND

14

GND

SANTA_206401-1_RV

GND

GND GND

@JODD

@

1

SATA_PTX_C_DRX_P2

2

A+

AB-

B+

DP +5V +5V

MD

3 4 5 6 7

8 9 10 11 12 13

SATA_PTX_C_DRX_N2 SATA_PRX_DTX_N2

SATA_PRX_DTX_P2

ODD_DETECT#_R

+5VS_ODD

ODD_DA#_R

USB Conn. Left Side

+5VALW

2.5A

U14

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

R568

R568 100K_0402_5%

100K_0402_5%

1 2

4

EN

RT9715BGS_SO8

FLG

USB_EN#<30>

+5VALW

USB_EN#

Close to JODD

C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K

C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K

1 2

R561 0_0402_5%R561 0_0402_5%

1 2

R562 0_0402_5%R562 0_0402_5%

ODD_DA#_R

W=60mils

+USB_VCCA

8

C361 1000P_0402_50V7KC361 1000P_0402_50V7K

7 6 5

1

C362

4.7U_0805_10V4Z

2

@

1 2 1 2

SW2

1 2

SMT1-05-A_4P

5

6

For EMI

12

USB_OC#0 <19,30>

ODD_DETECT# <20>

ODD_DA# <19>

3 4

2

SATA_PTX_DRX_P2 <15>

SATA_PTX_DRX_N2 <15>

SATA_PRX_C_DTX_N2 <15> SATA_PRX_C_DTX_P2 <15>

+5VS_ODD

1.1A

1

C352

C352 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

Place components closely ODD CONN.

1

C353

C353 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C354

@ C354

@

1U_0402_6.3V6K

2

1

C355

0.1U_0402_16V4Z

2

1

C360

0.1U_0402_16V4Z

2

B B

@

R843 0_0402_5%

L87

USB20_N0<19>

USB20_P0<19>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

WCM-2012-900T_0805

@

R839 0_0402_5%

USB20_N0_R USB20_P0_R

2010/09/03 2012/12/31

W=60mils

12

4

1

12

D65

2 3

PJDLC05C_SOT23-3

+USB_VCCA

C85 220U_6.3V_M_R15

1 2

C63 1000P_0402_50V7KC63 1000P_0402_50V7K

1 2

C64 0.1U_0402_16V4ZC64 0.1U_0402_16V4Z

1 2

JUSB1

1 USB20_N0_R USB20_P0_R

@D65

@

Compal Secret Data

VCC

2

D-

3

D+

4

GND

ALLTOP C107L8-10405-L

1

Deciphered Date

+USB_VCCA

+

R842 0_0402_5%

L86

GND GND GND GND

@JUSB1

@

5 6 7 8

2

USB20_N1<19>

USB20_P1<19>

L86

3

2 WCM-2012-900T_0805

WCM-2012-900T_0805

R838 0_0402_5%

USB20_N1_R USB20_P1_R

Title

Size Document Number Rev

Date: Sheet

W=60mils

@

12

3

2

4

USB20_N1_R USB20_P1_R

1

@

12

D62

@D62

@

2 3

PJDLC05C_SOT23-3

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

C61 1000P_0402_50V7KC61 1000P_0402_50V7K

1 2

C60 0.1U_0402_16V4ZC60 0.1U_0402_16V4Z

1 2

JUSB2

@JUSB2

@

VCC DD+ GND

GND GND GND GND

5 6 7 8

of

24 43Monday, January 10, 2011

of

24 43Monday, January 10, 2011

of

24 43Monday, January 10, 2011

1 2 3 4

ALLTOP C107L8-10405-L

1

A

Slot 1 Half PCIe Mini Card-WLAN/ WiMax

+3VALW

+3V_WLAN

0.1U_0402_16V4Z

1

CM1

2

0.01U_0402_25V7K

CLKREQ_WLAN#<16>

PCIE_PRX_WLANTX_N2<16> PCIE_PRX_WLANTX_P2<16>

PCIE_PTX_C_WLANRX_N2<16> PCIE_PTX_C_WLANRX_P2<16>

E51_TXD<30> E51_RXD<30>

Debug card using

2

112

PJ27 JUMP_43X79@PJ27 JUMP_43X79@

2

+3VS

PJ26 JUMP_43X79@PJ26 JUMP_43X79@

112

Short PJ27 for Wimax Short PJ26 for WLAN

CM2

CLK_WLAN#<16> CLK_WLAN<16>

40 mils

1

CM3

2

4.7U_0805_10V4Z

R1443

0_0402_5%

1 2

+3V_WLAN

R16

R16 0_0402_5%

0_0402_5%

1 2 1 2

0_0402_5%

0_0402_5% R17

R17

For SED

12

C253

47P_0402_50V8J

@

BT_CTRL_RBT_CTRL

E51_RXD_R

0.01U_0402_25V7K

+3V_WLAN

+1.5VS

0.1U_0402_16V4Z

1

CM8

CM7

2

JWLAN

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0B226-S40N-7F

1

CM9

2

4.7U_0805_10V4Z

@JWLAN

@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

GND2

WLAN&BT Combo module circuits

BT on module

Enable Disable

HL

LH

BT_CTRL

3

2N7002DW-T/R7_SOT363-6

Q50B

5

4

SUSP<5,9,33>

+3VS

2

G

1 3

D

S

D

S

Q362N7002_SOT23-3

@

1 2

R565 10K_0402_5%

PLT_RST# <5,19,26,30,31>

WiMax&BT combo cardWLAN/ WiFi

R327

1

47P_0402_50V8J

2

For SED

+1.5VS

BT_CRTL

BT_ON#

**If +3V_WLAN is +3VS, please remove D24

BT_ON#<20>

12

C254

C254 @

@

+3V_WLAN

WLAN_OFF#

WLAN_OFF# PLT_RST#

PM_SMBCLK <11,12,16> PM_SMBDATA <11,12,16>

USB20_N9 <19> USB20_P9 <19>

BT_CTRL E51_RXD_R

1 2

1K_0402_5%

For isolate Intel Rainbow Peak and Compal Debug Card.

1K_0402_5%

8/30 Reserve R1443 for WLAN Mini PCIE Card Pin5

BT on module

61

Q50A

Q50A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

WL_OFF# <19>

+3V_WLAN

Add level shift circuit for WL_OFF# to avoide leakage from WLAN to PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

of

25 43

of

25 43

of

25 43

A

CL1 0.1U_0402_16V7KCL1 0.1U_0402_16V7K

PCIE_PRX_C_LANTX_P1<16> PCIE_PRX_C_LANTX_N1<16>

+3V_LAN

1 1

RL24 10K_0402_5%@RL24 10K_0402_5%@ RL25 10K_0402_5%@RL25 10K_0402_5%@

12 12

RTL8105E

Pin14

+3VS

Pin15 Pin38

12

1K_0402_5%

1K_0402_5% RL6

RL6 @

@

RL7

15K_0402_5%

2 2

1 2

RL433 0_0402_5%RL433 0_0402_5%

WOL_EN

CLKREQ_LAN# EC_SWI#

RTL8111E

NC

NC NC 10K ohm PD 1K ohm Pull-high

WOL_ENISOLATE#

Sx Enable Wake up

LOW

1 2

CL2 0.1U_0402_16V7KCL2 0.1U_0402_16V7K

1 2

PCIE_PTX_C_LANRX_P1<16> PCIE_PTX_C_LANRX_N1<16>

CLKREQ_LAN#<16>

Sx Disable Wake up

HIGH

+3V_LAN

PLT_RST#<5,19,25,30,31>

S0

HIGH

CLK_LAN<16> CLK_LAN#<16>

EC_SWI#<17>

CLKREQ_LAN#

PCIE_PRX_LANTX_P1 PCIE_PRX_LANTX_N1 PCIE_PTX_C_LANRX_P1

PCIE_PTX_C_LANRX_N1

RL19 0_0402_5%RL19 0_0402_5%

PLT_RST# CLK_LAN

CLK_LAN#

LAN_X1 LAN_X2

EC_SWI# ISOLATE#

RL21 10K_0402_5%8111E@RL21 10K_0402_5%8111E@ RL22 1K_0402_5%

RL22 1K_0402_5%

+LAN_VDDREG

12

1 2

8111E@

ENSWREG

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

+3VALW TO +3V_LAN

@

2

AO3413_SOT23

CL681

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

QL51

G

@

2

1

D

1 3

1

2

Place CL34, CL35 colse to LAN chip

+3VALW

12

RL147

RL147 100K_0402_5%

100K_0402_5% @

@

RL432

@RL432

@

WOL_EN<30>

3 3

1 2

47K_0402_5%

2

CL483

CL483 @

@

0.1U_0402_16V7K

1

2

@

@ CL482

CL482

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

For P/N and footprint Please place them to ISPD page

SA00003PO30

UL1

8105E-VL 10/100M

8105E-VL 10/100M 8105E@

8105E@

4 4

12

PJ29

PJ29 JUMP_43X79

JUMP_43X79

@

2

CL682

CL682 1U_0402_6.3V6K

1U_0402_6.3V6K

1

LAN_MDI3LAN_MDI3+

LAN_MDI2LAN_MDI2+

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

0.1U_0402_25V4K

B

+3V_LAN

@

@ CL35

CL35

22 23 17

18

16 25 19

20

43 44

28 26

14 15 38

33 34

35

46 24

49

1

2

UL1

HSOP HSON HSIP

HSIN

CLKREQB PERSTB REFCLK_P

REFCLK_N

CKXTAL1 CKXTAL2

LANWAKEB ISOLATEB

NC/SMBCLK NC/SMBDATA GPO/SMBALERT

ENSWREG VDDREG

VDDREG

RSET GND

PGND

RTL8111E-GR_QFN48_6X6

RTL8111E-GR_QFN48_6X6 8111E@

8111E@

LED3/EEDO LED1/EESK

FOR EMI ISN TEST DEMAND.

8/30 Add UL3 at DVT

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

1

CL34

0.1U_0402_25V4K

2

31 37 40

LED0

30

EECS/SCL

32

EEDI/SDA

1

MDIP0

2

MDIN0

4

MDIP1

5

MDIN1

7

NC/MDIP2

8

NC/MDIN2

10

NC/MDIP3

11

NC/MDIN3

13

DVDD10

29

DVDD10

41

DVDD10

27

DVDD33

39

DVDD33

12

AVDD33

42

AVDD33

47

AVDD33

48

AVDD33

21

EVDD10

3

AVDD10

6

AVDD10

9

AVDD10

45

AVDD10

36

REGOUT

+3V_LAN

CL683

220U_6.3V_M_R16

UL3

1 2 3 4 5 6 7

X'FORM_ LFE8456E

8105E@

8105E@ UL4

UL4

1 2 3

4 5

7 8 9

10 11 12

SUPERWORLD_SWG150401

SUPERWORLD_SWG150401 8111E@

8111E@

RL2 10K_0402_5%RL2 10K_0402_5% RL1 10K_0402_5%RL1 10K_0402_5%

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1LAN_MDI2+ LAN_MDI2LAN_MDI3+ LAN_MDI3-

+LAN_REGOUT

@

TD+ TDCT NC NC CT RD+ RD-8RX-

TCT1 TD1+ TD1-

TCT2 TD2+ TD2-6MX2-

TCT3 TD3+ TD3-

TCT4 TD4+ TD4-

+LAN_VDD10

+3V_LAN

+LAN_EVDD10 +LAN_VDD10

60 mils

1

+

2

TX+

TX-

CT NC NC CT

RX+

MCT1 MX1+

MX1-

MCT2 MX2+

MCT3 MX3+

MX3-

MCT4 MX4+

MX4-

12 12

1

CL684

CL684 10U_0805_10V6K

10U_0805_10V6K

2

RJ45_MIDI0+

16

RJ45_MIDI0-

15 14 13 12 11

RJ45_MIDI1+

10

RJ45_MIDI1-

9

24 23 22

21 20 19

18 17 16

15 14 13

C

+LAN_REGOUT

2.2UH +-5% NLC252018T-2R2J-N

Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1

+3V_LAN

CL39 1000P_0402_50V7K

12

RL11 75_0402_1%

8111E@

CL40 1000P_0402_50V7K

8111E@

CL41 1000P_0402_50V7KCL41 1000P_0402_50V7K

CL42 1000P_0402_50V7KCL42 1000P_0402_50V7K

RL11 75_0402_1%

12

RL12 75_0402_1%

12

RL13 75_0402_1%RL13 75_0402_1%

12

RL15 75_0402_1%RL15 75_0402_1%

LL1

1 2

LL2 0_0603_5%LL2 0_0603_5%

1U_0402_6.3V6K

8111E@

1 2

LL3 0_0603_5%

4.7U_0603_6.3V6K

YL1

1 2

25MHZ_20PF_7A25000012

1

CL26

CL26 27P_0402_50V8J

27P_0402_50V8J

2

8111E@

1 2

8111E@

1 2

D

8111E@LL1

8111E@

CL13

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 8111E@

8111E@

1

CL18

2

Close to Pin 21

1

CL28

2

8111E@

LAN_X2LAN_X1

1

2

1

2

+LAN_EVDD10+LAN_VDD10

1

CL17

0.1U_0402_16V4Z

2

+LAN_VDDREG

1

CL29

2

CL27

CL27 27P_0402_50V8J

27P_0402_50V8J

+LAN_VDD10

1

CL9

0.1U_0402_16V4Z

2

8111E@

0.1U_0402_16V4Z

0.1U_0402_16V4Z 8111E@

8111E@

+3V_LAN

+LAN_VDD10

ENSWREG

CL3 to CL6 close to Pin 27,39,47,48 CL7 to CL8 close to Pin 12,42

1 2

CL3 0.1U_0402_16V4ZCL3 0.1U_0402_16V4Z

1 2

CL4 0.1U_0402_16V4ZCL4 0.1U_0402_16V4Z

1 2

CL5 0.1U_0402_16V4ZCL5 0.1U_0402_16V4Z

1 2

CL6 0.1U_0402_16V4ZCL6 0.1U_0402_16V4Z

1 2

CL7 0.1U_0402_16V4Z8111E@ CL7 0.1U_0402_16V4Z8111E@

1 2

CL8 0.1U_0402_16V4Z8111E@ CL8 0.1U_0402_16V4Z8111E@

CL19, CL20,CL21 close to pin 13,29,45, respectively CL22 close to pin 3, respectively CL23,CL24,CL25 close to pin 6,9,41, respectively

1 2

CL19 0.1U_0402_16V4ZCL19 0.1U_0402_16V4Z

1 2

CL20 0.1U_0402_16V4ZCL20 0.1U_0402_16V4Z

1 2

CL21 0.1U_0402_16V4ZCL21 0.1U_0402_16V4Z

1 2

CL22 0.1U_0402_16V4Z8111E@ CL22 0.1U_0402_16V4Z8111E@

1 2

CL23 0.1U_0402_16V4Z8111E@ CL23 0.1U_0402_16V4Z8111E@

1 2

CL24 0.1U_0402_16V4Z8111E@ CL24 0.1U_0402_16V4Z8111E@

1 2

CL25 0.1U_0402_16V4Z8111E@ CL25 0.1U_0402_16V4Z8111E@

RL4

RL23

RTL8111E-VB

PWM Mode 0 ohm

(Pull High)

+3V_LAN

12

RL4

RL4 0_0402_5%

0_0402_5% 8111E@

8111E@

RL23

RL23 0_0402_5%

0_0402_5% 8105E@

8105E@

LAN Conn.

JLAN RJ45_MIDI3RJ45_MIDI3+ RJ45_MIDI1RJ45_MIDI2RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

RJ45_GND LANGND

RJ45_MIDI0-

RJ45_MIDI0+

1 2

CL36 1000P_1808_3KV7KCL36 1000P_1808_3KV7K

JLAN

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130452-C

@

AZC199-02SPR7G_SOT23-3

8/30 Reserve DL1 and DL2 for ESD request

1

CL37

CL37 220P_0402_50V6K

220P_0402_50V6K

2

E

RTL8105E-VL

LDO Mode

NC

NC 0 ohm

SHLD1 SHLD2

1

CL38

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K @

@

2

(Pull Down)

DL1

DL1 @

@

9 10

@

DL2

1

223

1

3

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

E

A

of

26 43Monday, January 10, 2011

5

4

3

2

1

D D

Close to IC

USB20_N10<19>

C C

RC1 0_0402_5%RC1 0_0402_5% RC3 0_0402_5%RC3 0_0402_5%

CC3, CC4, CC5, CC6, CC7, RC2, RC3, UC1 form CARD@ to mount

12 12

1 2

CC2 100P_0402_50V8J@CC2 100P_0402_50V8J@

RC2

6.19K_0402_1%

+3VS

+VCC_3IN1

1

CC7

CC7 1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

USB20_N10_R USB20_P10_R

SDWP_MSCLK

SD_DATA0

+V1_8

UC1

1

REFE

2

DM

3

DP

4

3V3_IN

5

CARD_3V3

6

V18

7

XD_CD#

8

SP1

9

SP2

10

SP3

11

SP4

12

SP5

EPAD

25

0715 --> change P/N to RTS5137 (SA000043500)

For EMI request

48MCLK_CR

0620 --> remove CR_LED#

17

GPIO0

24

CLK_IN

23

XD_D7

22

SP14

21

SP13

20

SP12

19

SP11

18

SP10

16

SP9

15

SP8

14

SP7

13

SP6

RTS5137-GR_QFN24_4X4

RC6 10_0402_5%@RC6 10_0402_5%@

48MCLK_CR

SD_DATA2_MS_DATA5 MS_DATA1_SD_DATA3

SDCMD MS_DATA2_SDCLKSD_DATA1 SDCD#

1 2

CC10 10P_0402_50V8J@CC10 10P_0402_50V8J@

1 2

48MCLK_CR <16>USB20_P10<19>

< 48MHz >

0620 --> remove CARD-RADER LED

< 2 in 1 Card Reader >

0624 --> change CARDREADER conn.

JREAD

@JREAD

@

MS_DATA1_SD_DATA3

1

D3

SDCMD

2

CMD

3

VSS1

4

VDD

CLK

VSS2

GND1 GND2 GND3

B B

TAITW_PSDAT3-09GLAS1N14N

GND4

D0 D1 D2

WP

CD

MS_DATA2_SDCLK

5 6

SD_DATA0

7

SD_DATA1

8

SD_DATA2_MS_DATA5

9

SDWP_MSCLK

10

SDCD#

11

12 13 14 15

1

CC6

0.1U_0402_16V4Z

2

+VCC_3IN1

1

CC5

CC5 1U_0402_6.3V6K

1U_0402_6.3V6K

2

For EMI request

MS_DATA2_SDCLK

SDWP_MSCLK

A A

5

4

RC4 10_0402_5%@RC4 10_0402_5%@

RC5 10_0402_5%@RC5 10_0402_5%@

1 2

CC8 10P_0402_50V8J@ CC8 10P_0402_50V8J@

1 2

CC9 10P_0402_50V8J@ CC9 10P_0402_50V8J@

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

27 43Monday, January 10, 2011

1

of

A

5

Codec

1

CA1

2

1

CA7

2

EC_MUTE#

+DVDD_IO

+3VS_DVDD

35 mA

23 24

14 15

21 22

16 17

2 3

4

11

12

13 18 36 35 31 43

42 49

7

1

9

DVDD

DVDD_IO

LINE1_L LINE1_R

LINE2_L LINE2_R

MIC1_L MIC1_R

MIC2_L MIC2_R

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

PD#

RESET#

PCBEEP

SENSE A SENSE B CBP CBN MIC1_VREFO_L PVSS2

PVSS1 DVSS2 DVSS1

ALC259-GR_QFN48_7X7

0.1U_0402_16V4Z

1

CA2

CA2 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

CA8

CA8 10U_0603_6.3V6M

10U_0603_6.3V6M

2

EC_MUTE#<30>

AZ_RST_HD#<15>

SENSE_A

CA15

0.1U_0402_16V4Z

CA234.7U_0805_10V4Z CA234.7U_0805_10V4Z

12 12

CA294.7U_0805_10V4Z CA294.7U_0805_10V4Z

MONO_IN

1 2

2.2U_0603_6.3V6K

DGND

1 2

+3VS

RA19 0_0603_5%RA19 0_0603_5%

@

1 2

+1.5VS

RA20 0_0603_5%

D D

Ext. Mic

C C

INT_MIC_DATA<13> INT_MIC_CLK<13>

EC_MUTE#

4.7K_0402_5%

EC control EC_MUTE# behavior: High-state / low-state

B B

RA20 0_0603_5%

place close to chip

RA1

0_0603_1%

12

+3VS

MIC1_R_L<29> MIC1_R_R<29>

Int. Mic

INT_MIC_DATA INT_MIC_CLK

1

CA83

27P_0402_50V8J @

12

RA45

CA47 0.1U_0603_50V7KCA47 0.1U_0603_50V7K

1 2

CA48 0.1U_0603_50V7KCA48 0.1U_0603_50V7K

1 2

CA49 0.1U_0603_50V7KCA49 0.1U_0603_50V7K

1 2

CA50 0.1U_0603_50V7KCA50 0.1U_0603_50V7K

1 2

RA18 0_0603_5%RA18 0_0603_5%

RA18 CLOSE TO ALC259

2

1 2

CA12 100P_0402_50V8JCA12 100P_0402_50V8J

RA46

RA46 FBMA-10-100505-301T

FBMA-10-100505-301T

+MIC1_VREFO_L

4

+PVDD1

+AVDD

46

PVDD139PVDD2

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

VREF JDREF CPVEE AVSS1

AVSS2

38

AVDD125AVDD2

600 mA

68 mA

UA1

40 41

45 44

32 33

10 6

5 8

47 48 20

29 30

28 27 19 34 26

37

0.1U_0402_16V4Z

1

CA57

2

10U_0603_6.3V6M

1

CA3

CA4

2

10U_0603_6.3V6M

RA4 75_0402_1%RA4 75_0402_1% RA5 75_0402_1%RA5 75_0402_1%

AZ_SDIN0_HD_R

AC_VREF AC_JDREF

RA9 20K_0402_1%RA9 20K_0402_1%

1 2

CA14 2.2U_0603_6.3V6KCA14 2.2U_0603_6.3V6K

AGND

1 2

0_0603_5%

1

CA56

2

0.1U_0402_16V4Z

1

CA5

2

0.1U_0402_16V4Z

SPKL+ <29> SPKL- <29>

SPKR+ <29> SPKR- <29>

RA6 33_0402_5%RA6 33_0402_5%

+MIC1_VREFO_R

12

RA2

0.1U_0402_16V4Z

0.1U_0402_16V4Z CA44

CA44

RA3

1 2

0_0603_5%

1

CA6

place close to chip

2

HP_L <29> HP_R <29>

AZ_BITCLK_HD <15>

1 2

CA28

10U_0603_6.3V6M

1

CA17

2

AZ_SDOUT_HD <15>

AZ_SDIN0_HD <15>

12

0.1U_0402_16V4Z

1

2

AZ_SYNC_HD <15>

place close to chip

3

+5VS

1

CA43

2

10U_0603_6.3V6M

+5VS

1

CA16

CA16 10U_0603_6.3V6M

10U_0603_6.3V6M @

@

2

Beep sound

AZ_BITCLK_HD

+3VS

close to Audio Codec(UA1) for EMI

R235

4.7K_0402_5% @

4.7K_0402_5% @ AZ_RST_HD#

2

EC Beep

EC_BEEP#<30>

PCI Beep

PCH_SPKR<15>

place close to chip

@

1 2

R746 10_0402_5%

AZ_SYNC_HD

1 2

+MIC1_VREFO_R +MIC1_VREFO_L

1

@

@ CA37

CA37 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1 2

CA80 22P_0402_50V8J

1 2

CA81 22P_0402_50V8J

1 2

CA82 22P_0402_50V8J

place close to chip

1 2

47K_0402_5%

1 2

47K_0402_5%

@

1

@

@ CA36

CA36 1U_0402_6.3V6K

1U_0402_6.3V6K

2

RA7

RA8

RA12

4.7K_0402_5%

0.1U_0402_16V4Z

12

1

CA13

1 2

1

CA18

CA18 100P_0402_50V8J

100P_0402_50V8J

2

MONO_IN

Sense Pin Impedance

39.2K

SENSE A

A A

20K 10K

5.1K

39.2K 20K 10K

5

Codec Signals

PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17)SENSE B Int. MIC PORT-H (PIN 20)

Function

Headphone out Ext. MIC

place close to chip

MIC_SENSE<29>

NBA_PLUG<29>

4

RA10 20K_0402_1%RA10 20K_0402_1%

RA21 39.2K_0402_1%RA21 39.2K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

SENSE_A

Compal Secret Data

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

1

of

28 43

of

28 43

of

28 43

A

Speaker Connector

placement near Audio Codec UA1

SPKR+<28>

SPKR-<28>

SPKL+<28>

SPKL-<28>

SPKR+

SPKR-

SPKL+

SPKL-

0_0603_5%

RA30

RA34

0_0603_5%

RA35

RA36

12

CA25

CA26

12

CA19

CA20

12

Ext. Mic

MIC1_R_L<28>

MIC1_R_R<28>

1

470P_0402_50V8J@

2 1

470P_0402_50V8J@

2

12

1

470P_0402_50V8J@

2 1

470P_0402_50V8J@

2

SPK_R1

2

CA27

CA27 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

1

SPK_R2

SPK_L1

2

CA24

CA24 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

1

SPK_L2

RA31

1K_0402_5%

RA22

12 12

RA32 2.2K_0402_5%RA32 2.2K_0402_5%

RA33 2.2K_0402_5%RA33 2.2K_0402_5%

12

+MIC1_VREFO_L

MIC1_L

MIC1_R

+MIC1_VREFO_R

SPK_L1 SPK_L2 SPK_R1 SPK_R2

HeadPhone/LINE Out JACK

JLINE

5

DA4 PJDLC05_SOT23-3@ DA4 PJDLC05_SOT23-3@

1

3 2

JSPK

1

2

3

4

ACES_85204-0400N

ACES_85204-0400N @

@

NBA_PLUG<28>

HP_R<28> HP_L<28>

LA6

1 2

KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA7

LA7

1 2

KC FBM-L11-160808-121LMT 0603

1

DA6 PJDLC05_SOT23-3

PJDLC05_SOT23-3

HP_R_L HP_L_L

3 2

@DA6

@

CA45

100P_0402_50V8J

CA46

100P_0402_50V8J

100P_0402_50V8JDA5 PJDLC05_SOT23-3@ DA5 PJDLC05_SOT23-3@

1

CA11

@CA11

@

2

0.1U_0402_16V4Z

For EMI

5

4

3

6 7

6

2

1

FOX_JA63331-B39S4-7F

FOX_JA63331-B39S4-7F @

@

GND

GND GND

GND 8

8 7

7

10 9 8

Ext.MIC/LINE IN JACK

JEXMIC

5

MIC1_L

MIC_SENSE<28>

LA8

1 2

KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA9

LA9

1 2

KC FBM-L11-160808-121LMT 0603

1

DA7 PJDLC05_SOT23-3

PJDLC05_SOT23-3

@DA7

@

MIC1_L_RMIC1_R MIC1_L_L

4

3

6 7

6

2

1

FOX_JA63331-B39S4-7F

FOX_JA63331-B39S4-7F @

3 2

CA41

100P_0402_50V8J

CA42

1

CA21

2

0.1U_0402_16V4Z

@

For EMI

GND

GND GND

GND 8

8 7

7

10 9 8

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

of

29 43

of

29 43

of

29 43

A

5

0.1U_0402_16V4Z

1

C436

0.1U_0402_16V4Z

For EMI

CLK_PCI_EC

12

R377

10_0402_5%

@

D D

+3VL

C C

+3VL +3VS

B B

@

C443

22P_0402_50V8J

@

R378

R378 47K_0402_5%

47K_0402_5%

12

C444 0.1U_0402_16V4ZC444 0.1U_0402_16V4Z

RP7

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

@

1 2

C819 1U_0402_6.3V6K

@

1 2

C820 180P_0402_50V8J

1

2

ECRST#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

0.1U_0402_16V4Z

KSI[0..7]<31>

KSO[0..17]<31>

PLT_RST#

SUSP#

Close to EC

+3VALW

C818

@C818

@

12

5

0.1U_0402_16V4Z

U44

1

PM_SLP_S5#<17> PM_SLP_S4#<17>

A A

P

IN1

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

@

12

R739 0_0402_5%R739 0_0402_5%

1 2

R342 100K_0402_5%R342 100K_0402_5%

5

E51_TXD

SLP_S5#

4

2

KSI[0..7] KSO[0..17]

PCH_SUSPWRDN<17>

PWR_LED#<32>

CLK_EC<17>

C437

2

GATEA20<20>

KB_RST#<20>

SERIRQ<15,31>

LPC_FRAME#<15,31>

LPC_AD3<15,31> LPC_AD2<15,31> LPC_AD1<15,31> LPC_AD0<15,31>

CLK_PCI_EC<19>

PLT_RST#<5,19,25,26,31>

EC_SCI#<20>

EC_SMB_CK1<35> EC_SMB_DA1<35> EC_SMB_CK2<16> EC_SMB_DA2<16>

PM_SLP_S3#<17>

EC_SMI#<20>

FAN_SPEED1<5>

E51_TXD<25>

E51_RXD<25>

ON/OFFBTN#<32> NUM_LED#<31>

0.1U_0402_16V4Z

1

C438

2

0.1U_0402_16V4Z

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# ECRST# EC_SCI#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# SLP_S5# EC_SMI#

USB_OC#0_RR PCH_SUSPWRDN

FAN_SPEED1 E51_TXD

E51_RXD ON/OFFBTN# PWR_LED# NUM_LED#

930@

R743 0_0402_5%

R1446

100K_0402_5%

930@

4

1

C439

2

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8

KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

12

4

2

C440

1

1000P_0402_50V7K

1 2 3 4 5 7 8

10 12

13 37 20 38

KSI0

55

KSI1

56

KSI2

57

KSI3

58

KSI4

59

KSI5

60

KSI6

61

KSI7

62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

12

1

C899

C899 20P_0402_50V8J

20P_0402_50V8J

2

930@

+3VL

2

C441

C441 1000P_0402_50V7K

1000P_0402_50V7K

1

U19

GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ# LPC_FRAME#/LFRAME# LPC_AD3/LAD3 LPC_AD2/LAD2 LPC_AD1/LAD1 LPC_AD0/LAD0

CLK_PCI_EC/PCICLK PCIRST#/GPIO05 EC_RST#/ECRST# EC_SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

EC_SMB_CK1/SCL0/GPIO44 EC_SMB_DA1/SDA0/GPIO45 EC_SMB_CK2/SCL1/GPIO46 EC_SMB_DA2/SDA1/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C SUS_PWR_DN_ACK/GPIO0D INVT_PWM/PWM2/GPIO11 FAN_SPEED1/FANFB0/GPIO14 FANFB1/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A

XCLK1 XCLK0

LPC & MISC

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

9

22

33

96

111

125

VCC

PWM Output

DA Output

PS2 Interface

SPI Device I/F

SPI Flash ROM

GPIO

GPI

GND

11

24

35

94

113

3

+3VL

C442

1 2

0.1U_0402_16V4Z

67

AVCC

PWM0/GPIO0F

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

ACOFF/FANPWM1/GPIO13

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD3/GPI3B

AD Input

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B CAP_INT#/PSCLK2/GPIO4C

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

GPO

AD4/GPI42 AD5/GPI43

DAC_BRIG/DA0/GPO3C EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

DA3/GPO3F

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXIOA00

LID_SW#/GPXIOD00

SPIDI/MISO

SPIDO/MOSI

SPICLK/GPIO58

SPICS#

GPIO40

H_PECI/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

PWR_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

RF_OFF#/GPXIOA09

GPXIOA10 GPXIOA11

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

EAPD/GPXIOD03

EC_THERM#/GPXIOD04

SUSP#/GPXIOD05

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

AGND

KB930QF-A1_LQFP128_14X14

69

2010/09/03 2012/12/31

3

V18R

930@

21

EC_BEEP#

23

FANPWM

26

ACOFF

27

BATT_TEMPA

63 64

ADP_I

65

ADP_V

66 75 76

68 70

IREF

71

CHGVADJ

72

EC_MUTE#

83

USB_EN#

84 85

H_PROCHOT#_EC

86

TP_CLK

87

TP_DATA

88

VGATE

97

WOL_EN

98

PWRME_CTRL#

99

LID_SW#

109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120

SPI_CLK_R

126

SPI_CS#

128

73

EC_PECI

74

FSTCHG

89

BATT_FULL_LED#

90

CAPS_LED#

91

BATT_CHG_LOW_LED#

92 93

SYSON

95

VR_ON

121

ACIN_D

127

PCH_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102 103

PM_PWROK

104

BKOFF#

105 106 107

SA_PGOOD

108

110

UMA_ENBKL

112 114 115

SUSP#

116

PBTN_OUT#

117

USB_OC#0_R

118

+EC_V18R

124

U19

EC KB9012 A1

Compal Secret Data

C448

4.7U_0805_10V4Z

9012@U19

9012@

Deciphered Date

EC_BEEP# <28> FANPWM <5> ACOFF <36>

BATT_TEMPA <35> ADP_I <35,36>

ADP_V <36>

EN_DFAN1 <5> IREF <36>

CHGVADJ <36>

EC_MUTE# <28> USB_EN# <24>

TP_CLK <32>

TP_DATA <32>

VGATE <5,17,41>

WOL_EN <26>

PWRME_CTRL# <15>

LID_SW# <31>

EC_SI_SPI_SO <31>

EC_SO_SPI_SI <31> SPI_CS# <31>

FSTCHG <36> BATT_FULL_LED# <32> CAPS_LED# <31>

BATT_CHG_LOW_LED# <32>

SYSON <38> VR_ON <41>

PCH_RSMRST# <17> EC_LID_OUT# <16> EC_ON <32>

PM_PWROK <5,17>

BKOFF# <13>

SA_PGOOD <39>

UMA_ENBKL <18>

SUSP# <33,38,40> PBTN_OUT# <5,17>

USB_OC#0_RR

USB_OC#0_R

2

VR_HOT#<41>

H_PROCHOT#_EC

930@

1 2

R461 43_0402_1%

Co-lay KB9012 with KB930

9012@

12

R742 0_0402_5%

930@

12

R741 0_0402_5%

H_PECI

9012@

1 2

R475 43_0402_1%

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

R737

0_0402_5%

12

13

D

2

G

2N7002_SOT23

S

BATT_TEMPA

C445 100P_0402_50V8JC445 100P_0402_50V8J

ACIN_D

C446 100P_0402_50V8JC446 100P_0402_50V8J

R758 10K_0402_5%

H_PROCHOT#_EC

R758 10K_0402_5%

1 2

TP_CLK

1 2

R379 4.7K_0402_5%R379 4.7K_0402_5%

TP_DATA

1 2

R381 4.7K_0402_5%R381 4.7K_0402_5%

For EMI

SPI_CLK_R

R738 0_0402_5%R738 0_0402_5%

33P_0402_50V8J

H_PECI <5>

SYSON

1 2

R5 4.7K_0402_5%R5 4.7K_0402_5%

R341 330K_0402_5%R341 330K_0402_5%

1 2

+3VL

ACIN_D

R740 0_0402_5%

To avoid current leakage

SUSP# VR_ON

USB_OC#0 <19,24>

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

1

Q41

1 2 1 2

12

C518

C518 47P_0402_50V8J

47P_0402_50V8J

+3VS

@

C449

@

D21

RB751V40_SC76-2

@

R423 10K_0402_5%R423 10K_0402_5% R462 10K_0402_5%R462 10K_0402_5%

+5VS

1

2

12

12 12

1

H_PROCHOT# <5,35>

SPI_CLK <31>

ACIN <17,36>

of

30 43

of

30 43

of

30 43

A

SPI Flash (256KB)

+3VL

20mils

1

C451

0.1U_0402_16V4Z

0.1U_0402_16V4Z 930@

930@

2

SPI_CS#<30>

SPI_CLK<30>

EC_SO_SPI_SI<30>

SPI_CS# SPI_CLK EC_SO_SPI_SI EC_SI_SPI_SO

SPI_CLK

R394 10_0402_5%

KEYBOARD CONN.

KSI[0..7]

KSO[0..17]

JKB

34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

ACES_88170-3400

@

KSI[0..7] <30>

KSO[0..17] <30>

JKB34 KSO16

KSO17

KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 JKB4

CAPS_LED# NUM_LED#

1 2

R372 300_0402_5%R372 300_0402_5%

12

R376 300_0402_5%R376 300_0402_5%

U22

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

W25X10BVSNIG_SO8

930@

1 2

For EMI

+3VS

CAPS_LED# <30> NUM_LED# <30>

930@U22

930@

4

VSS

2

Q

930@

1 2

C454 10P_0402_50V8J

KSO16 KSO17 KSO2 KSO1 KSO0 KSO4 KSO3 KSO5

KSO14

KSO6 KSO7

KSO13

KSO8

KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 CAPS_LED# NUM_LED#

EC_SI_SPI_SO <30>

For EMI

Close to JKB

1 2

C401 100P_0402_50V8JC401 100P_0402_50V8J

1 2

C402 100P_0402_50V8JC402 100P_0402_50V8J

1 2

C404 100P_0402_50V8JC404 100P_0402_50V8J

1 2

C405 100P_0402_50V8JC405 100P_0402_50V8J

1 2

C406 100P_0402_50V8JC406 100P_0402_50V8J

1 2

C407 100P_0402_50V8JC407 100P_0402_50V8J

1 2

C408 100P_0402_50V8JC408 100P_0402_50V8J

1 2

C409 100P_0402_50V8JC409 100P_0402_50V8J

1 2

C410 100P_0402_50V8JC410 100P_0402_50V8J

1 2

C411 100P_0402_50V8JC411 100P_0402_50V8J

1 2

C412 100P_0402_50V8JC412 100P_0402_50V8J

1 2

C413 100P_0402_50V8JC413 100P_0402_50V8J

1 2

C415 100P_0402_50V8JC415 100P_0402_50V8J

1 2

C416 100P_0402_50V8JC416 100P_0402_50V8J

1 2

C417 100P_0402_50V8JC417 100P_0402_50V8J

1 2

C418 100P_0402_50V8JC418 100P_0402_50V8J

1 2

C419 100P_0402_50V8JC419 100P_0402_50V8J

1 2

C420 100P_0402_50V8JC420 100P_0402_50V8J

1 2

C421 100P_0402_50V8JC421 100P_0402_50V8J

1 2

C422 100P_0402_50V8JC422 100P_0402_50V8J

1 2

C423 100P_0402_50V8JC423 100P_0402_50V8J

1 2

C424 100P_0402_50V8JC424 100P_0402_50V8J

1 2

C425 100P_0402_50V8JC425 100P_0402_50V8J

1 2

C427 100P_0402_50V8JC427 100P_0402_50V8J

1 2

C429 100P_0402_50V8JC429 100P_0402_50V8J

1 2

C431 100P_0402_50V8JC431 100P_0402_50V8J

1 2

C433 100P_0402_50V8JC433 100P_0402_50V8J

1 2

C435 100P_0402_50V8JC435 100P_0402_50V8J

Lid SW

R403

1 2

0_0402_5%

0_0402_5% R401

@ R401

+3V_LID

U21

U21 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

GND

1

10P_0402_50V8J

3

C452

VDD2VOUT

1

C453

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@

1 2

0_0402_5%

12

1

2

0_0402_5%

R383

R383 47K_0402_5%

47K_0402_5%

LID_SW# <30>

2010/09/03 2012/12/31

LPC Debug Port

+3VL

+3VALW

Compal Secret Data

Deciphered Date

SERIRQ<15,30>

LPC_AD3<15,30>

LPC_AD1<15,30>

LPC_FRAME#<15,30>

Place the PAD under DDR DIMM.

+3VS

1 2

R392 0_0402_5%R392 0_0402_5%

H7

7

8

9

10

DEBUG_PAD

@H7

@

56

4

3

2

1

R393

R393 22_0402_5%

22_0402_5% @

@

1 2 2

C457

C457 22P_0402_50V8J

22P_0402_50V8J

1

@

PLT_RST# <5,19,25,26,30>

LPC_AD2 <15,30>

LPC_AD0 <15,30>

CLK_PCI_DDR <19>

For EMI

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

31 43

A

of

5

3

For EMI request

4

+3VL

R395

R395 100K_0402_5%

100K_0402_5%

1 2

ON/OFFBTN#

1

C458

0.1U_0402_25V6

0.1U_0402_25V6 @

@

2

ON/OFFBTN# <30>

Power Button

For debug

TOP side

SW3

D D

BTM side

1 2

SMT1-05-A_4P

5

6

4

13

D

Q7

R396

2

2N7002_SOT23-3

G

S

1 2

EC_ON<30>

10K_0402_5%

PWR/B to MB Conn.

JPOWER

@JPOWER

@

1

2

3

4

5

G1

6

G2

ACES_85201-0405N

2

3

1

51_ON# <34>

ON/OFFBTN#

D83

@D83

@

AZ5125-02S.R7G_SOT23-3

3

2

1

TP Button/Conn.

SW_L

SW_R

2

3

1

For EMI request

LEFT

RIGHT

D20 AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3

SW1

3

1 2

4

SMT1-05_4P

5

6

SW4

3

1 2

4

SMT1-05_4P

5

6

@D20

@

+5VS TP_CLK<30> TP_DATA<30>

SW_L SW_R

2

1

3

D19

@D19

@

AZ5125-02S.R7G_SOT23-3

0816->change JTOUCH connector

JTOUCH

@JTOUCH

@

1

2

3

4

5

7

5

G7

8

66G8

P-TWO_161021-06021_6P-T

For ESD

POWER/SUSPEND LED

Vf=1.9V~2.4V If=5mA

D22

1 2

+5VALW

C C

R398 510_0402_5%R398 510_0402_5%

2 1

YG

HT-110UYG5_YELLOW GREEN

3

PWR_LED# <30>

BATT CHARGE/FULL LED

Vf=1.8V~2.0V If=5mA(max)

D25

2

A

+5VALW

B B

1

3

YG

HT-210UD5-UYG5_AMBER-YEL GRN

1 2

R399 510_0402_5%R399 510_0402_5%

1 2

R404 510_0402_5%R404 510_0402_5%

BATT_CHG_LOW_LED# <30>

BATT_FULL_LED# <30>

Screw Hole

H9

H10

1

H_4P2x4P7

H_4P2x4P7 @

@

H_3P0

@

H10

H20

H_4P2

H_4P2 @

@

1

CPU

H1

1

H_2P7x3P2N

H_2P7x3P2N @

@

H23

H_4P7

H_4P7 @

@

1

H8

H6

H_3P0

@

1

H26

H_2P7N

H_2P7N @

@

1

H21

H22

H_4P2x4P7

H_4P2x4P7 @

@

1

PCB Fedical Mark PAD

FD3@FD3

FD1@FD1

FD2@FD2

@

1

FD4@FD4

@

1

H14

H11

H12

H_3P0

H_3P0 @

@

1

H12

H_3P0

@

1

H14

H13

H_3P0

@

1

SB

H16

H15

1

MINI CARD -- WLAN

H18

1

H_5P0N

H_5P0N @

@

H_3P3

H_3P3 @

@

H_5P0N

H_5P0N @

@

1

H19

H_3P3

H_3P3 @

@

1

ISPD

U2

Q65R1@U2

Q65R1@

PCH

ZZZ

PCB LA-7203P

PJP1

45@PJP1

45@

PJP1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

1

of

32 43

of

32 43

of

32 43

A

+3VALW TO +3VS

+3VALW +3VS

Q29

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

1 1

D

SI4800BDY_SO8

OLS@

1

C465

2

4.7U_0805_10V4Z

OLS@

0.022U_0402_25V7K

Vgs=10V,Id=9A,Rds=18.5mohm

1

C459

C459 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

12

C466

R412

R412 330K_0402_5%

330K_0402_5%

2

OLS@

1

C460 4.7U_0805_10V4ZC460 4.7U_0805_10V4Z

2

OLS@

R409

1 2

61

+VSB

47K_0402_5%

Q10A

OLS@

SUSP SUSP SUSP

2

2N7002DW-T/R7_SOT363-6

5

R406

470_0805_5%

1 2 3

Q10B

Q10B OLS@

OLS@

4

OLS@

B

+5VALW

8 7 6 5

SI4800BDY_SO8

1

C467

2

4.7U_0805_10V4Z

Q30

OLS@

C

+5VALW TO +5VS

Vgs=10V,Id=9A,Rds=18.5mohm

+5VS

1

S

D

2

S

D

3

S

D

4

G

D

1

12

C468

R413

R413 200K_0402_5%

OLS@

0.01U_0402_25V7K

200K_0402_5%

2

@

1

C461

C461 1U_0402_6.3V6K

1U_0402_6.3V6K

2

61

4.7U_0805_10V4Z

1

C462

2

OLS@

OLS@ R410

R410

1 2

+VSB

47K_0402_5%

Q11A

Q11A OLS@

OLS@

2

2N7002DW-T/R7_SOT363-6

R407

5

470_0805_5%

1 2 3

Q11B

Q11B OLS@

OLS@

4

OLS@

2

C822

C822 @

@

1

0.1U_0402_16V4Z

+5VS

For EMI

2

C821

C821 @

@

1

0.1U_0402_16V4Z

+1.5V

Vgs=10V,Id=14.5A,Rds=6mohm

Q31

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C469

2

4.7U_0805_10V4Z

D

+1.5V to +1.5VS

WPS3@Q31

WPS3@

S S S

G

+1.5VS

1

1 2

2

3 4

1

C470

2

0.1U_0402_25V6

C463

C463 1U_0402_6.3V6K

1U_0402_6.3V6K

12

R414

R414 820K_0402_5%

820K_0402_5%

4.7U_0805_10V4Z

C464

1 2

220K_0402_5%

61

2N7002DW-T/R7_SOT363-6

1

2

R411

+VSB

Q12A

2

2N7002DW-T/R7_SOT363-6

E

+1.8VS

R470

R470 470_0805_5%

Q31

1 2 3

Q12B

4

470_0805_5%

Q31

FDS6676AS_SO8

FDS6676AS_SO8 PS3@

PS3@

R408

5

470_0805_5%

1 2

13

D

Q190

G

2N7002_SOT23-3

S

SUSP

2

+5VS TO +5VS_ODD

+5VS_ODD

R457

470_0805_5%

1 2 61

Q53A

2 2

3 3

4 4

ODD_EN#

2

2N7002DW-T/R7_SOT363-6

SUSP#

+5VALW

SUSP#

47K_0402_5%

NLS@

R419

47K_0402_5%

R415

ODD_EN#<20>

12

4

2N7002DW-T/R7_SOT363-6

1

@

2

C496

0.01U_0402_25V7K

1

C499

2

0.01U_0402_25V7K

+3VS

5

Q53B

1

2

C500

0.01U_0402_25V7K

@

+5VS

2

C471

R441

R441 10K_0402_5%

10K_0402_5%

R440

1 2

3

1 2

47K_0402_5%

+5VALW+3VALW

NLS@

C471

0.1U_0402_16V7K

1

2

AO3413_SOT23

C217

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

Each 250pF on CAP_MOS1 (2) will make Slew Rate(uS/V) increase of 100uS/V

U46

1

MOS1_D

2

ON_MOS1

3

5_VDD

4

ON_MOS2

MOS2_D5MOS2_S

SLG59M232VTR_TDFN14-10_3X2

+5VS

Vgs=-4.5V,Id=3A,Rds<97mohm

S

Q45

G

2

D

1 3

1

C679

2

@

NLS@

10

MOS1_S

9

CAP_MOS1

8

GND

7

CAP_MOS2

6

11

GND

2

PJ28

2

JUMP_43X79

JUMP_43X79 @

@

1

+5VS +3VS

+5VS_ODD

1

C680

C680 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C236

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

1

C252

C252 120P_0402_50V4Z

120P_0402_50V4Z NLS@

NLS@

2

For S3 CPU Power Saving

PS3@

VCCPPWRGD<39,40>

C249

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

C255

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

1 2

R158 100K_0402_5%

2N7002DW-T/R7_SOT363-6

SUSP

Q44A

PS3@

2

0.75VR_EN

61

+3VALW

R425

R425 100K_0402_5%

100K_0402_5% PS3@

PS3@

1 2 3

Q44B

Q44B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

PS3@

4

0.75VR_EN# <38>

+5VALW

R422

R422 100K_0402_5%

100K_0402_5%

1 2

SUSP

SUSP<5,9,25>

13

D

Q61

Q61 2N7002_SOT23-3

2N7002_SOT23-3

SUSP#<30,38,40>

2

G

S

+0.75VS

D

S

1 2

13

R421

22_0805_5%

Q189

SUSP

2

G

2N7002_SOT23-3

+1.05VS_VCCP

R468

R468 470_0805_5%

470_0805_5%

1 2

13

D

2

G

S

Q60

Q60 2N7002_SOT23-3

2N7002_SOT23-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

E

of

33 43

of

33 43

of

33 43

A

PL1

SMB3025500YA_2P

12

PC2

100P_0402_50V8J

TP0610K-T1-E3_SOT23-3

N1

@

SMB3025500YA_2P

1 2

@

PQ4

2

68_1206_5%

PF1

@

PJP1

1

+

2

+

1 1

SINGA_2DW-0005-B03

2 2

3

-

4

-

DC_IN_S1

BATT+

51_ON#<32>

21

10A_125V_451010MRL

@

PD4

12

RLS4148_LL34-2

100K_0402_1%

@

PR11

1 2 22K_0402_1%

22K_0402_1%

PR10

12

DC_IN_S2

PC1

1000P_0402_50V7K

12

@

PC6

0.22U_0603_25V7K

13

@

PR8

B

12

PC3

1000P_0402_50V7K

VIN

PD3

RLS4148_LL34-2

1 2

12

PC5

0.1U_0603_25V7K

@PD3

@

12

PR9 68_1206_5%

68_1206_5%

@

VIN

@PR9

@

12

PC4

VS

100P_0402_50V8J

C

1 2 @

@

PR1

1K_1206_5%

@

PD1

VIN

100K_0402_1%

VL

EN0<37> ACON<36>

100K_0402_1%

@

PD2

PD2 RB715F_SOT323-3

RB715F_SOT323-3

2 3

1000P_0402_50V7K

RLS4148_LL34-2

@

PR4

1 2

1

@

PC16

12

LM393DG_SO8

12

LM393DG_SO8

1K_1206_5%

N3

1 2 @

@

1K_1206_5%

1 2

1K_1206_5%

@ PR5

@

2.2M_0402_5%

N1

8

@

PU2B

P

+

7

O

-

G

4

@

PC13

1000P_0402_50V7K

N1

8

PU2A

P

+

1

O

-

G

4

@

PR2

PR5

@

PR3

5 6

12

3 2

12

PR6

12

34K_0402_1%

34K_0402_1% PR7

@PR7

@

<36>

66.5K_0402_1%

SSM3K7002FU_SC70-3

12

@

6251VREF

@

PQ1

12

PR36

PR36 150K_0402_1%

150K_0402_1%

13

D

S

@

2

G

D

12

PR38

PR38 511K_0402_1%

511K_0402_1%

12

PR35

PR35 255K_0402_1%

255K_0402_1%

@

47K_0402_1%

13

PQ2

PQ2 DTC115EUA_SC70-3

DTC115EUA_SC70-3

@

PR39

2

@

B+

12

PC14

PC14 1000P_0402_50V7K

1000P_0402_50V7K

12

+5VALWP

@

PACIN <36>

@

PJ332

2

JUMP_43X118

PJ352

@ PJ352

@

2

JUMP_43X118

PJ182

@ PJ182

@

2

JUMP_43X118

PJ452

@ PJ452

@

2

112

JUMP_43X118

112

+3VALW

+5VALW

+1.8VS+1.8VSP

+VCCSA+VCCSAP

@

PJ152

2

112

JUMP_43X118

@

PJ153

+1.5VP

(16A,640mils ,Via NO.= 32)

+1.05VS_VCCPP +1.05VS_VCCP

2

JUMP_43X118

PJ402

@ PJ402

@

2

JUMP_43X118

PJ403

@ PJ403

@

2

JUMP_43X118

112

+1.5V

(17A,680mils ,Via NO.=34)

PJ502

@

2

112

JUMP_43X118

+GFX_COREP

(33A,1320mils ,Via NO.=66) OCP=40A

JUMP_43X118

PJ503

@ PJ503

@

2

JUMP_43X118

112

+GFX_CORE

ACIN

Precharge detector Min. typ. Max.

H-->L 14.42V 14.74V 15.23V

+0.75VS

+3VALWP

(5A,200mils ,Via NO.= 10) OCP=8.6A

+5VALWP

(5A,200mils ,Via NO.= 10) OCP=7.9A

(1.65A,70mils ,Via NO.= 4) OCP=4.2A

PJ333

@ PJ333

@

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

3 3

+VSBP +VSB

2

JUMP_43X39

PJ72

@

2

JUMP_43X39

112

(120mA,40mils ,Via NO.= 1)

PJ76

@ PJ76

@

+0.75VSP

(1A,40mils ,Via NO.= 2)

2

JUMP_43X79

112

(6A,240mils ,Via NO.= 12)

4 4

L-->H 15.39V 15.88V 16.39V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Monday, January 10, 2011

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

D

34 43

of

A

B

C

D

1 1

@

PJP2

1

2

3

4

5

5 GND GND GND GND

6

7

8

9

10 11 12 13

SUYIN_200045MR009G171ZR

2 2

3 3

EC_SMCA

PR20

100_0402_1%

BATT_S1

BATT_P4 BATT_P5 EC_SMDA

1 2

1

2

VL

PR25

100K_0402_1%

POK<17,37>

1 2

.1U_0402_16V7K

PD5

PJSOT24C_SOT23-3

3

PR21

PR21 100_0402_1%

100_0402_1%

1 2

PR26

1 2

0_0402_5%

PC12

@ PC12

@

PF2

21

15A_65V_451015MRL

12

PR14

PR14 1K_0402_1%

1K_0402_1%

PD6

PJSOT24C_SOT23-3

2 3

12

PR19

1K_0402_1%

B+

13

D

2

G

S

12

1

PR16

6.49K_0402_1%

12

PR24

1 2

22K_0402_1%

PQ6

PQ6 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

12

PR23

100K_0402_1%

VMB

12

PC15

@ PC15

@

.1U_0402_16V7K

TP0610K-T1-E3_SOT23-3

12

PC10

@

0.22U_0603_25V7K

+3VL

BATT_TEMPA <30>

EC_SMB_DA1 <30>

EC_SMB_CK1 <30>

PJ334

@ PJ334

@

2

112

JUMP_43X39

PQ5

2

SMB3025500YA_2P

1 2

12

PC7

PC7 1000P_0402_50V7K

1000P_0402_50V7K

13

PL2

12

PC11

0.1U_0603_25V7K

@PC11

@

12

PC8

0.01U_0402_25V7K

+VSBP

BATT+

VL

0.1U_0603_25V7K

VS_ON<37>

H_PROCHOT#<5,30>

SSM3K7002FU_SC70-3

PH1 under CPU botten side :

CPU thermal protection at 95 degree C Recovery at 56 degree C

12

PR15

12

@

PC9

PU1

1

VCC

2

GND

3

OT1

4

OT2

@

G718TM1U_SOT23-8

12

13

D

@

PQ7

S

PR29

@

10K_0402_1%

2

G

TMSNS1

RHYST1

TMSNS2

RHYST2

8 7 6 5

+3VS

Adapter Throttle Watt

65W_UMA

75W_DIS

71.25W

85.5W

75W_QCore 85.5W

PR15

19.6K_0402_1%

PR18

8.66K_0402_1%

1 2

@

PR28

33K_0402_1%

Recovery Watt

62.4W

72W

@

12

PR22

4.64K_0402_1%

12

PR27

PR27 100K_0402_1%

100K_0402_1%

Throttle Point Recovery Point

1.48V

1.78V

ADP_I <30,36>

12

PH1

PH1 100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

1.308V

1.5V

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Monday, January 10, 2011

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

D

of

35 43

of

35 43

of

35 43

A

PQ204

PQ203

AO4435L_SO8

VIN

1 1

12

PR210

PR210 47K_0402_1%

47K_0402_1%

DTA144EUA_SC70-3

2

61

D

2

G

PQ212A

S

2 2

S

DMN66D0LDW-7_SOT363-6

PACIN<34>

ACON<34>

ACOFF<30>

8 7

5

PQ210

2

13

1 3

PQ211

PQ211 DTC115EUA_SC70-3

DTC115EUA_SC70-3

DMN66D0LDW-7_SOT363-6

PR211

22K_0402_5%

PACIN

1 2

PQ213

DTC115EUA_SC70-3

ACOFF

4

2

P2 P3

1 2 36

12

PC210

0.1U_0603_25V7K

12

PQ212B

34

D

5

G

S

13

PQ204

AO4407A_SO8

1 2 3 6

4

PR212

PR212 200K_0402_1%

200K_0402_1%

PR213

PR213 150K_0402_1%

150K_0402_1%

ADP_I<30,35>

IREF<30>

FSTCHG<30>

154K_0402_1%

120K_0402_1%

8 7

5

PC211

PC211 5600P_0402_25V7K

5600P_0402_25V7K

1 2

PC214

1 2

0.01U_0402_25V7K

PR220

.1U_0402_16V7K

12

PR221

PC215

1 2

PC216

PR216

10K_0402_1%

100K_0402_1%

PR218

1 2 10K_0402_1%

10K_0402_1%

6251VREF

12

0.01U_0402_25V7K

PR215

0.02_1206_1%

0.02_1206_1% 1 2

ACSETIN

12

PR217

PC213

1 2

6800P_0402_25V7K

6251VREF<34>

PR222

1 2

75K_0402_1%

20K_0402_1%

B

12

PC207

B+

10U_1206_25V6M

4 3

10U_1206_25V6M

PC208

PC209

10U_1206_25V6M

12

10U_1206_25V6M

PL210

1 2

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

VIN

LDO 5.075V

6251VDD

RB751V-40_SOD323-2

12

PC212

2.2U_0603_6.3V6K

PU200

12

PR219

1 2

100_0402_1%

PR223

12

1

VDD

2

ACSET

6251_EN CSON

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

6251VREF

8

VREF

9

CHLIM

6251aclim

10

ACLIM

11

VADJ

12

GND

PD201

1 2 12

PR227

10_1206_5%

DCIN

24

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

ISL6251AHAZ-T_QSOP24

23

22

21

20

19

18

17

16

15

14

13

LX_CHG

DH_CHG

BST_CHG

6251VDDP

DL_CHG

0.1U_0603_25V7K

ACPRN

1 2

12

PR226

PR226 191K_0402_1%

191K_0402_1%

ACSETIN

12

1.26V

PR228

14.3K_0402_1%

PC217

1000P_0402_25V8J

PC218

12

PR229 20_0402_5%PR229 20_0402_5%

1 2

PC219

0.047U_0402_16V7K

0.047U_0402_16V7K 1 2

1 2

PR230

20_0402_5% PR231 20_0402_5%PR231 20_0402_5% PC220

PC220

0.1U_0603_25V7K

20_0402_5%

12

1 2

PR232 2_0402_5%PR232 2_0402_5%

PR205

1 2

2.2_0603_1%

BST_CHGA

12

PR233 4.7_0603_5%PR233 4.7_0603_5%

PC221

4.7U_0603_6.3V6M

1 2

CSIN CSIP

PC205

12

0.1U_0603_25V7K

PD202

PD202 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

6251VDD

C

12

PC231

4.7U_0805_25V6-K

CSOP

12

PC233

PC232

4.7U_0805_25V6-K

PQ202

AO4466L_SO8

CHG_B+

12

4.7U_0805_25V6-K

6

578

4

6

578

4

PQ215

DTC115EUA_SC70-3

123

PQ215

PQ201

PQ201 AO4466L_SO8

AO4466L_SO8

PL202

10UH_MSCDRI-104A-100M-E_4.6A_20%

1 2

12

PR206

4.7_1206_5%

12

PC206

680P_0603_50V7K

PR237

10K_0402_1%

1 2 13

PQ208

AO4435L_SO8

1 2 3 6

4

PD9

1 2

1SS355_SOD323-2

PD10

1 2

2

1SS355_SOD323-2

PR235

CHG

1 2

0.02_1206_1%

D

8 7

5

PR236

1 2

47K_0402_1%

ACOFF

PR290

1 2

200K_0402_1%

12

PC222

0.1U_0402_25V6

PACIN

PQ216

SSM3K7002FU_SC70-3

4 3

12

PC202

10U_1206_25V6M

VIN

13

D

2

G

S

12

PC203

10U_1206_25V6M

VIN

@

PC204

10U_1206_25V6M

BATT+

12

PR224

3 3

CHGVADJ<30>

CC=0.25A~3A IREF=1.016*Icharge IREF=0.254V~3.048V VCHLIM need over 95mV

CHGVADJ=(Vcell-4)*9.445

Vcell 4V

4.2V

4 4

4.35V

CHGVADJ

0V

1.882V

3.2935V

CP mode

Iada=0~3.42A(65W) CP= 92%*Iada; CP=3.147A Vaclim=1.08V(65W) PR222=75k PR223=20k PR215=0.02 Iada=0~3.947A(75W) CP= 92%*Iada; CP=3.63A Vaclim=0.736V(75W) PR222=24k PR223=20k PR215=0.02

A

1 2

15.4K_0402_1%

B

PR225

31.6K_0402_1%

1 2

ACPRN

PR240

100K_0402_1%

6251VDD

PR241

12

PR242

PR242 10K_0402_1%

10K_0402_1%

13

2

PR241

10K_0402_1%

1 2

PQ214

PQ214 DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR243

20K_0402_1%

1.26 / 14.3 * 205.3 = 18.089V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

C

ACIN <17,30>

PACIN

Vin Detector

18.089V

High

17.44V

Low

VIN

12

PR246

309K_0402_1%

12

PR248

47K_0402_1%

Title

Size Document Number Rev

Monday, January 10, 2011

Date: Sheet

PR247

10K_0402_1%

1 2

12

PC223

.1U_0402_16V7K

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

D

36 43

ADP_V <30>

of

A

5

o

4

3

2

1

2VREF_8205

D D

PL331

330U_6.3V_M

VS

RT8205_B+

12

PC360

10U_1206_25V6M

PC332

12

PC368

@

10U_1206_25V6M

4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%

1 2

1

+

2

DMN66D0LDW-7_SOT363-6

VL

PR373

1 2

0_0402_1%

@

PR371

1 2

100K_0402_1%

PL332

PR336

4.7_1206_5%

PC336

680P_0603_50V7K

100K_0402_1%

PR372

@

12

PQ360A

PR370

12

42.2K_0402_1%

12

@

6

578

PQ331

AO4466L_SO8

4

PC370

123

786

123

61

D

S

12

2.2U_0603_16V6K

0.1U_0603_25V7K

5

PQ332

4

AO4712L_SO8

ENTRIP1 ENTRIP2

2

G

13

2

12

PC361

PC335

1 2

499K_0402_1%

B+

34

D

5

G

S

PQ361

PQ361 DTC115EUA_SC70-3

DTC115EUA_SC70-3

+3VLP

4.7U_0805_10V6K

PR335

1 2

0_0603_5%

EN0<34>

PR360

1 2

12

PC362

1U_0402_6.3V6K

PQ360B

PQ360B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

HCB2012KF-121T50_0805

PC367

@

1 2

12

B+

1U_0805_25V7

C C

+3VALWP

Ipeak=5A Imax=3.5A F=305KHz

B B

Total Capacitor 150uF

VS_ON<35>

A A

BST_3V UG_3V LX_3V

LG_3V

1U_0603_10V6K

PR362

13K_0402_1%

1 2

PR363

20K_0402_1%

1 2

PR337

150K_0402_1%

1 2

PU330

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

PR361

100K_0402_5%

2VREF_8205

12

PC363

ENTRIP2

6

5

VFB2

ENTRIP2

SKIPSEL

EN0

14

13

RT8205_B+

3

4

VREF

TONSEL

VIN16GND

15

12

PR364

30K_0402_1%

1 2

PR365

19.1K_0402_1%

1 2

ENTRIP1

PR357

150K_0402_1%

1 2

1

2

VFB1

ENTRIP1

VO1

PGOOD

VBST1

DRVH1

LL1

DRVL1

VCLK18VREG5

TPS51125ARGER_QFN24_4X4

17

12

PC364

4.7U_0805_10V6K

PC365

0.1U_0603_25V7K

RT8205_B+

12

PC366

10U_1206_25V6M

6

578

PQ351

PQ352

AO4712L_SO8

4

AO4466L_SO8

123

PL352

4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%

786

5

4

123

12

PR356

4.7_1206_5%

12

PC356

PC356 680P_0603_50V7K

680P_0603_50V7K

PL352

1 2

+5VALWP

1

+

PC352

330U_6.3V_M

PC352

330U_6.3V_M

2

24 23 22 21 20 19

BST_5V UG_5V LX_5V LG_5V

PR355

1 2

0_0603_5%

POK <17,35>

PC355

0.1U_0603_25V7K

1 2

VL

Ipeak=5A Imax=3.5A F=245KHz Total Capacitor 150uF

C

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Monday, January 10, 2011

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

37 43

1

of

A

PL151

HCB2012KF-121T50_0805

12

@

PC167

0.1U_0402_25V6

1 2

12

PC165

+1.5VP

B+

12

PC168

PC169

@

1 1

2 2

@

0.1U_0402_25V6

1.5V_B+

12

PC163

4.7U_0805_25V6-K

680P_0402_50V7K

12

PC166

PC164

10U_1206_25V6M

4.7U_0805_25V6-K

@

PL152

PC152

PC152 330U_6.3V_M

330U_6.3V_M

SYSON<30>

1 2

1.8UH_SIL104R-1R8PF_9.5A_30%

1

+

2

12

PR160

0_0402_5%

0_0402_5% 1 2

4

PQ151

AO4466L_SO8

4

PR156

4.7_1206_5%@

PC156

680P_0603_50V7K

@

12

@

6

578

123

786

5

PQ152

123

PC160

0.1U_0402_16V7K

0.75VR_EN#<33>

AO4712L_SO8

+5VALWP

DL_1.5V

B

LX_1.5V

PR152

5.1_0603_5%

5.1_0603_5% 1 2

1U_0603_10V6K

SUSP#

PC155

PR153

0_0402_5%

1 2

@

PR155

0_0402_5%

1 2

0_0603_5%

1 2

DH_1.5V

PR154

5.1K_0402_1%

5.1K_0402_1% 1 2

1U_0603_10V6K

PR151

PC153

0.1U_0603_25V7K

PC157

C

12

PR157

PR157 1M_0402_1%

1M_0402_1%

12

BOOT

UGATE

PHASE

LGATE

PGND

CS

VDD

PGOOD

S5

S3

TON

VDDP

15

+5VALWP

22

21

20

19

18

16

14

13

11

10

7

NC

VLDOIN

VTT

VTTGND

VTTSNS

GND

MODE

VTTREF

DEM

VDDQ

FB

NC

Thermal pad

17

25

RT8207GQW_WQFN24_4X4

23

24

1

2

3

4

5

6

8

9

PU150

+1.5VP

+5VALWP

+1.5VP

PC159

22U_0603_6.3V6M

PC158

0.033U_0402_16V7

12

+0.75VSP

12

PC161

PC161 10U_0603_6.3V6M

10U_0603_6.3V6M

0.75Vref

D

+3VALW +5VALW

1

PJ1811

JUMP_43X39@

3 3

SUSP#<30,33,40>

4 4

A

JUMP_43X39@

4.7U_0805_25V6-K

PR1811

0_0402_5%

1 2

PC1821

1

2

12

@ PC1851

@

0.47U_0402_6.3V6K

PC1851

12

PC1811

1U_0603_10V6K

PU1801

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

3

VOUT

4

VOUT

2

FB

GND

APL5930KAI-TRG_SO8

1

B

Ipeak=1.65A ILIM = 4A F=1MHz

12

PR1821

3K_0402_1%

PR1831

2.4K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC1831

0.01U_0402_25V7K

2010/09/03 2012/12/31

+1.8VSP

PC1841

22U_0805_6.3V6M

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Monday, January 10, 2011

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

D

38 43

of

A

5

D D

C C

PL451

HCB2012KF-121T50_0805

+5VALW

VCCPPWRGD<33,40>

B B

12

1 2

PC475

1U_0805_25V7K

12

PC462

PC462 22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

PR460 100K_0402_5%PR460 100K_0402_5%

PR461

1M_0402_5%

4

+3VS

PR471

10K_0402_5%

1 2

PR472

0_0402_5%

PU450

4

10

LX

PVIN

PG

9

LX

PVIN

8

SVIN

5

EN

TP

11

FB

NC

7

1

SY8035BDBC_DFN10_3X3

EN_VCCSAP

12

PC474

1 2

0.1U_0402_10V7K

12

2 3

6

FB=0.6Volt

SA_PGOOD <30>

LX_VCCSAP

FB_VCCSAP

1.8U_D104C-919AS-1R8N_9.5A_30%

1.8U_D104C-919AS-1R8N_9.5A_30% 1 2

12

PR480

12

PC468

PL452

PC467

4.7_1206_5%

4.7_1206_5% 68P_0402_50V8J

68P_0402_50V8J

680P_0603_50V7K

10K_0402_1%

12

PR479

3

3.4K_0402_1%

12

PR465

12

D

S

PR463

PR463 0_0402_5%

0_0402_5%

1 2

PR464

1 2

10_0402_5%

12

PR481

20K_0402_1%

13

2

G

PQ453

PQ453 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

12

PC469

22U_0805_6.3VAM

VCCSA_SENSE <9>

PR469

PR469 10K_0402_5%

10K_0402_5%

12

PC470

.1U_0402_16V7K

12

PC471

22U_0805_6.3VAM

+3VS

12

2

12

PC472

@

22U_0805_6.3VAM

PR468

PR468 10K_0402_5%

10K_0402_5%

PR470

@ PR470

@ 100K_0402_5%

100K_0402_5%

PC473

22U_0805_6.3VAM

+VCCSAP

PQ454

PQ454 PMBT2222A_SOT23-3

PMBT2222A_SOT23-3

1

2

3

PR473

100K_0402_5%

12

@ PR482

@ 10K_0402_5%

10K_0402_5%

PR482

1

VCCSAP_VID1 <9>

VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required 0 0 0.9 V Yes/Yes 0 1 0.8 V Yes/Yes 1 1 0.75V No/Yes

A A

5

1 1 0.65V No/Yes

Note:Use VCCSA_SEL to switch High & Low Level for VID[1] (ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

SCHEMATICS, MB A7203

Size Document Number Rev

C

4019CT

Date: Sheet

1

39 43Monday, January 10, 2011

of

A

5

D D

C C

PR410

0_0402_5%

SUSP#<30,33,38>

PR411

100_0603_1%

+5VALW

B B

A A

1 2

4.7U_0603_6.3V6K

PC411

1 2

12

4.02K_0402_1%

1 2

12

PR413

10K_0402_1%

PR412

12

PC410

@

.1U_0402_16V7K

VCCPPWRGD<33,39>

4

2 3 4 5 6

1 2

@PR416

@

10K_0402_1%

1 2

PU400

TON OUT VCC FB PGOOD

PR415

10K_0402_1%

PR416

255K_0402_1%

1 2

15

1

TP

EN_SKIP

VFB=0.75V

AGND7PGND

+3VS

PR414

14

BST

TPS5117_TQFN14_3P5X3P5

8

DH

ILIM

VDD

DL

LX

BST_1.05VS_VCCP DH_1.05VS_VCCP

13

LX_1.05VS_VCCP

12 11 10 9

DL_1.05VS_VCCP

1 2

PR407

1 2

11K_0402_1%

PR405

3.3_0603_1%

3

PC405

0.1U_0603_25V7K

1 2

+5VALW

1 2

PC412

4.7U_0805_10V6K

PR510

2.2_0603_1%

2

PL401

HCB4532KF-800T90_1812

1.05VS_B+

12

5

PQ401

CSD17308Q3_SON8-5

12

4

PQ402

AON6788_DFN8-5

PC416

123

5

123

12

PC414

PC413

4.7U_0805_25V6-K

PL402

PR406

PC406

680P_0603_50V7K

4.7U_0805_25V6-K

10U_1206_25V6M

1UH_FDUE1040D-1R0M-P3_21.3A_20%

12

4.7_1206_5%

12

HCB4532KF-800T90_1812

1 2

12

PC415

4.7U_0805_25V6-K

12

PR420

0_0402_5%

1 2

10_0402_5%

Ipeak=12A Imax=8.75A F=305KHz Total Capacitor 990uF

1

2

PR421

+

PC402

PC402 330U_6.3V_M

330U_6.3V_M <BOM Structure>

12

1

B+

+1.05VS_VCCPP

VCCIO_SENSE <8>

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Monday, January 10, 2011

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

1

of

40 43

of

40 43

of

40 43

A

5

12

PR503

1K_0402_1%

1K_0402_1% @

@

12

GFX@ PC533

GFX@

150P_0402_50V8J

1 2

PC501

499_0402_1%@

1 2

330P_0402_50V7K@

PR599

VGATE<5,17,30>

12

PR564

GFX@PR564

GFX@

PR563

3.83K_0402_1%

GFX@PR563

3.83K_0402_1%

GFX@

PC501

1 2

27.4K_0402_1%

PR531

294K_0402_1%

+3VS

1.91K_0402_1%

PR504

1 2

PC537

47P_0402_50V8J

NTCG

1 2

VR_SVID_CLK<8>

12

D D

VR_HOT#<30>

C C

PH501 GFX@PH501

GFX@

470KB_0402_5%_ERTJ0EV474J

2-ph: PR172=20.5K Vboot=0V, Iccmax=54 2-ph: PR172=169K Vboot=1.1V, Iccmax=54

B B

A A

+CPU_CORE Iocp=72A, IccMAX=53A Load line=1.9mohm DCR=1.1mohm

5

PC531

47P_0402_50V8J

12

GFX@ PR533

GFX@ 475K_0402_1%

475K_0402_1%

12

PC530

12

8.06K_0402_1%GFX@

8.06K_0402_1%GFX@ PR530

PR530

PC560

PR537

54.9_0402_1%

12

PH502

12

470KB_0402_5%_ERTJ0EV474J

12

PR533

+1.05VS_VCCPP

1 2

PR545

1 2

27.4K_0402_1%

PR544

3.83K_0402_1%

GFX@

12

PC533

GFX@ PC530

GFX@

1000P_0402_50V7K

@PC560

@

.1U_0402_16V7K

VR_SVID_DAT<8>

A

+GFX_CORE Iocp=40A, IccMAX=24A Load line=3.9mohm DCR=1.1mohm

2.55K_0402_1%GFX@

422_0402_1%GFX@

12

330P_0402_50V7K

PC532

PR538

PR538 130_0402_1%

130_0402_1%

1 2

VR_SVID_ALRT#<8>

VR_ON<30>

12

PR512

8.06K_0402_1%

PR513

1 2

20.5K_0402_1%

20.5K_0402_1% PR524

PR524

267K_0402_1%

1 2

PC510

PC510 470P_0402_50V8J

470P_0402_50V8J

PR534

PR532

SVID_SCLK

12

1 2

0_0402_5%

comp

PC509

680P_0402_50V7K

PR518

2K_0402_1%

1 2

4

SVID_ALERT#

PR540

NTC

4

12

PC504

1000P_0402_50V7K

12

PC507

47P_0402_50V8J

PC508

1000P_0402_50V7K

1 2

FB

1 2

2.21K_0402_1%

+CPU_CORE

PU500

1

VWG

2

PGOODG

3

SDA

4

ALERT#

5

SCLK

6

VR_ON

7

PGOOD

8

VR_HOT#

9

NTC

10

VW

PR514

1 2

PR517

PR519

@ PC556

@ 330P_0402_50V7K

330P_0402_50V7K

GFX@

0.01U_0402_50V7K

ISPG

38

40

37

39

41

FBG

PAD

RTNG

COMPG

ISUMPG

ISL95835HRTZ-T_TQFN40_5X5

COMP11FB12ISEN3/ FB213ISEN214ISEN115RTN16ISUMN17ISUMP18VDD19VIN

FB

ISEN2

comp

12

ISEN3

12

PC540 10P_0402_50V8JPC540 10P_0402_50V8J

0.22U_0402_6.3V6K

887_0402_1%

12

@

1 2

10_0402_1%

PC545 330P_0402_50V7K

VCCSENSE

3

12

1 2

ISNG

36

ISUMNG

ISEN1

12

PC562

0.22U_0402_6.3V6K

VSUM-

PC546

<8>

PC556

12

PC558

NTCG

35

NTCG

PC544

0.01U_0402_50V7K

GFX@ PR501

GFX@ 10_0402_1%

10_0402_1%

GFX@ PR502

GFX@ 10_0402_1%

10_0402_1%

UGATEG

BOOTG

LGATEG

PHASEG

31

32

33

34

BOOTG

LGATEG

PHASEG

UGATEG

BOOT2

UGATE2

PHASE2 LGATE2

PWM3 LGATE1 PHASE1

UGATE1

BOOT1

20

12

PC552

@

330P_0402_50V7K

1K_0402_1%

PR554

12

PR555

@

100_0402_1%

2-ph: PR517=1K for ~71A OCP

PR520

PR520 10_0402_1%

10_0402_1%

1 2

<8>

VSSSENSE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR501

PR502

VCCP

12

3

12

30 29 28 27 26 25 24 23 22 21

+5VS

12

PC550

0.22U_0402_10V6K

+GFX_COREP

UGATEG

GFX@ PC505

GFX@

0.22U_0603_10V7K

PR505

3.3_0603_1%

1 2

PR507

2.2_0603_1%

PC505

12

VCC_AXG_SENSE <9>

VSS_AXG_SENSE <9>

PHASEG

BOOTG

LGATEG

+5VS

12

PR562

0_0603_5%

BOOT2 UGATE2 PHASE2 LGATE2

LGATE1 PHASE1 UGATE1 BOOT1

PR558

PR558 1_0603_5%

1_0603_5%

1 2 12

PC548

PC551

0.033U_0402_16V7K

1U_0603_10V6K

12

0_0603_5%

12

PC554

1U_0603_10V6K

12

PR511

0_0402_5%

CPU_B+

12

PR559

2.2_0603_5%

12

PC549

0.22U_0603_25V7K

UGATE2

1 2

PR508

2.2_0603_1%

PHASE2

PR515

3.3_0603_1%

BOOT2

VSUM+

12

LGATE2

PR557

2.61K_0402_1%

PR556

12

11K_0402_1%

PH503

PH503 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

VSUM-

12

PC553

PC553 .1U_0402_16V7K

.1U_0402_16V7K

UGATE1

PHASE1

BOOT1

LGATE1

2010/09/03 2012/12/31

12

PC515

0.22U_0603_10V7K

1 2

PR509

2.2_0603_1%

PR525

3.3_0603_1%

12

PC525

0.22U_0603_10V7K

Compal Secret Data

Deciphered Date

12

4

2

CPU_B+

5

4

123

5

12

4

123

PQ501

CSD17308Q3_SON8-5

PQ502

PC563

1 2

GFX@PC563

GFX@

12

PR506

12

AON6428L_DFN8-5

PC506

+5VS

5

12

PC581

PC580

PQ505

123

CSD17308Q3_SON8-5

5

PQ508

AON6788_DFN8-5

123

CPU_B+

5

PQ503

123

CSD17308Q3_SON8-5

5

PQ504

123

AON6788_DFN8-5

2

4.7U_0805_25V6-K

12

PR516

4.7_1206_5%

12

PC516

680P_0603_50V7K

12

PC583

4.7U_0805_25V6-K

12

PR526

4.7_1206_5%

12

PC526

680P_0603_50V7K

4.7U_0805_25V6-K

12

PC565

PC564

GFX@PC564

GFX@

4.7U_0805_25V6-K

GFX@ PL502

GFX@

0.36UH_PCMC104T-R36MN1R17_30A_20%

4 3

12

PR570

GFX@

PR570

GFX@

3.65K_0402_1%

4.7_1206_5%

PR572

GFX@ PR572

GFX@

7.5K_0402_1%

1 2

680P_0603_50V7K

GFX@ PC571

GFX@

.1U_0402_16V7K

GFX@

0.047U_0402_16V4Z

ISPG

@ PR576

@ 0_0402_5%

0_0402_5%

CPU_B+

12

PC582

4.7U_0805_25V6-K

3.65K_0402_1%

VSUM+

1 2

10K_0402_1%

ISEN2

1 2

VSUM- ISEN1

12

PC585

PC584

4.7U_0805_25V6-K

PR591

3.65K_0402_1%

VSUM+

1 2

10K_0402_1%

ISEN1

PR592

1 2

1_0402_5%

VSUM-

PR593

1 2

Title

Size Document Number Rev

Date: Sheet

12

GFX@PC565

GFX@

PC567

@

0.1U_0402_25V6

4.7U_0805_25V6-K

PL502

1 2

PH504

GFX@ PH504

GFX@ 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

1 2

PR573

GFX@ PR573

GFX@ 11K_0402_1%

11K_0402_1%

1 2

PC571

1 2

PC573

ISNG

12

PR576

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR580

PR582

PR583

1_0402_5%

1 2

1

+

PC568

PC566

2

@

100U_25V_M

0.36UH_PCMC104T-R36MN1R17_30A_20%

4019CT

Monday, January 10, 2011

1

12

PC574

@

0.1U_0402_25V6

+GFX_COREP

1

+

PC502

+PC502

PR571

2

PC570

PR575

1 2

PL501

HCB4532KF-800T90_1812

1 2

10K_0402_1%

1 2

10K_0402_1%

330U_6.3V_M

+CPU_CORE

PR581

12

+CPU_CORE

PR590

12

B+

ISEN2

12

GFX@ PR571

GFX@

1_0402_5%

GFX@ PC570

GFX@ .1U_0402_16V7K

.1U_0402_16V7K

1 2

12

GFX@ PR575

GFX@

1.02K_0402_1%

Connect to +5V can disable GFX portion

PL503

4 3

1

+

PC569

2

100U_25V_M

PL504

4 3

Compal Electronics, Inc.

SCHEMATICS, MB A7203

of

41 43

of

41 43

of

41 43

1

A

NO DATE PAGE MODIFICATION LIST PURPOSE

----------------------------------------------------------------------------------------------------------------------------------------

P36-P45 Release2010/04/201

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Monday, January 10, 2011

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

42 43

of

A

5

4

3

2

1

HW PIR (Product Improve Record)

PWWHA LA-7203P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 GERBER-OUT DATE: 2011/01/04 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

1) 12/29 33 Co-lay KB9012 with KB930, only change pin 118 For new EC design

D D

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2010/09/03 2012/12/31

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A7203

4019CT

Monday, January 10, 2011

1

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43 43

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43 43

of

43 43

A

COMPAL LA-7203P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual