Compal LA-7161P PLM00, Inspiron M102z, LA-7161P Andros MLK Schematic

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COMPAL CONFIDENTIAL

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1 1

PCB NO :

BOM P/N :

LA-7161P (DAZ0I800100)

4319AS31L01

MODEL NAME :

PLM00

4319AS31L02 4319AS31L03 4319AS31L04 4319AS31L05 4319AS31L06

Andros MLK

4319AS31L07 4319AS31L08

2 2

AMD APU (Ontario/Zacate) -FT1 + FCH Hudson-M1

2011-01-05

REV : 1.0(A00)

3 3

@ : Nopop Component WWAN@: WWAN function

CONN@: Connector only Z@ : Zacate O@ : Ontario

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-7161P

143Wednesday, January 05, 2011

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C

D

E

GPP PCIE1

WWAN

LVDS

TMDS

VGA

Page 25

GPP

LPC BUS

AMD Brazos APU

FT1 BGA 413-Ball 19mm x 19mm

Page 7,8,9

UMI

Hudson M1

BGA 605-Ball 23mm x 23mm

Page 12,13,14,15,16

DDR3 BUS

1.5V DDRIII 1066

USB2.0

USB port2

USB port0,1

USB port4

USB port5

USB port6

USB port8

USB port9

DDR3-SO-DIMM X2

Page 10, 11

Single Channel DDRIII 800~1066MHz

USB conn.

USB conn. x 2

Sub/B & Page 26

Mini Card WLAN

Mini Card WWAN

Bluetooth conn.

CardBus Realtek RTS5138

Camera

Page 23

Page 25

Page 22

Page 20

SIM conn.

Page 25

7 in 1 conn.

Page 22

LVDS conn.

HDMI conn.

1 1

CRT conn.

Page 20

Page 18

Page 19

PCI Express

GPP PCIE2

LAN Atheros AR8152

Page 21

Mini Card

WLAN

GPP PCIE3

Mini Card

Page 25

RJ45 conn.

Page 21

2 2

Clock Generator

FCH Internal CKG

DC/DC

3 3

(Power Control)

Page 13

Page 28

Power Button

Sub/B

EC

ENE KB926QFE0

BATT IN &OTP

Page 32

DC IN & DECTOR

Page 33

T/P conn.

Page 29

CHARGER

Page 34

4 4

Page 17

Int. KBD

Page 17

SPI ROM

Page 12

AZ-Audio I/F

CODEC Realtek ALC259

Page 24

Audio Jack x 2

Digital MIC

Sub/B

Camera side

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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B

C

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Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

LA-7161P

243Wednesday, January 05, 2011

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3

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1

POWER SEQUENCE

D D

VIN

B+

+3VALW,+5VALW

+1.1VALW

ON/OFFBTN#

EC->FCH

FCH->EC

EC->PWR

EC_RSMRST#

PBTN_OUT#

SIO_SLP_S5#

SYSON

+1.5V

FCH->EC

EC->PWR

C C

SIO_SLP_S3#

SUSP#

+3VS,+5VS,+0.75VS

NOTE1

T1

T2

T3

T4

T1>10ms, +3VALW to RSMRST#

T2>100ms, RSMRST# to PBTN_OUT#

T3>100ns, PBTN_OUT# to SLP_S5#

T4>10ms, SLP_S5# to SYSON

The same with SLP_S5#

T5

T5>10ms, SYSON to SUSP#

+1.8VS

+1.1VS

EC->PWR

PWR->EC

EC->FCH

FCH->APU

FCH->DEVICE

B B

FCH->APU

VR_ON

+APU_CORE +APU_COREP_NB

VGATE

EC_FCH_PWROK

KB_RST#

APU_PWRGD

A_RST#

LDT_RST#

T6

NOTE2

T7

T8

T9

T6>100ms, SUSP# to VR_ON

T7>50ms, VGATE to EC_FCH_PWROK

98ms>T8>150ms, EC_FCH_PWROK to APU_PWRGD

101ms>T9>113ms, EC_FCH_PWROK to A_RST#

NOTE1: RSMRST# rise time(10% to 90%)<50ms

fail time<1ms

NOTE2: EC_FCH_PWROK rise time(10% to 90%)<50ms

fail time<1ms

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

POWER SEQUENCE

LA-7161P

343Wednesday, January 05, 2011

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D D

C C

B B

Voltage Rails

Power Plane Description

VIN

B+

+APU_CORE

+APU_CORE_NB 1.0V switched power rail ON OFF

+1.5V

+0.75VS 0.75VS swit ched power rail for DDR termina tor

+1.05VS

+1.1VS 1.1VS switched power rail ON OFF OFF

+1.8VS 1.8V switched power rail

+3VALW

+3V_LAN 3.3V power ra il for LAN ON ON(WOL) OFF

+3VS

+5VALW

+5VS

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OF F.

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Adapter power supply ( 19V)

AC or battery power rail for power circuit.

Core voltage for CPU (0.7-1.2V)

1.5V power rail for CPU VDDIO and DDRIII

1.05V swit ched power rai l for NB VDDC & VGA

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH

LOW

LOWLOWLOW

HIGHHIGHHIGH

HIGH

S1 S3 S5

N/A N/A N/A

ON OFF

OFF

ON

OFF

ON OFF OFF

OFF

ON

ON ON*

ON

OFF

ON

OFF

ON ON*ON+1.1VALW 1.1V always on power rail

ON

OFF

ON

OFF

ON

N/AN/AN/A

OFF

ON*

OFFON

ONONON

ON ON

ON

OFF

LOW

OFF

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1

A A

2 3 4 5 6 7 NC

5

100K +/- 5%Ra

Rb V min

AD_BID

00 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

V typ

AD_BID

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

4

V

max

AD_BID

0 V 0.155 V

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

EC AD3

0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

3

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

0.4

0.5

Title

Power Rails

Size Document Number Rev

Date: Sheet

2

Date: Sheet

LA-7161P

of

443Wednesday, January 05, 2011

of

443Wednesday, January 05, 2011

of

443Wednesday, January 05, 2011

1

5

4

3

2

1

1K

D D

Ontario

Zacate

P3

APU_ SIC

P4

APU_ SID

1K

2.2K

+3VS

MMBT3904

SMBUS Address [TBD]

2.2K

AD22

SMB_FCH_CK0

AE22

C C

SMB_FCH_DA0

10K

GND

10K

F5

SMB_FCH_CK1

F4

Hudson

SMB_FCH_DA1

10K

GND

10K

D25

SCL2

F23

SDA2

10K

+3VALW

202

200

202

200

8

7

JDIMMA

JDIMMB

UT7 (NB_Thermal)

SMBUS Address [TBD]

10K

B26

FCH_SIC

E26

B B

FCH_SID

0R @

4.7K

77

78

EC_SMB_CK1

EC_SMB_DA1

100R

KB 926

79

EC_SMB_CK2

80

EC_SMB_DA2

A A

+5VALW

PJBATT

7

(BattERy conn)

6

2.2K

SMBUS Address [TBD]

+3VS

0R @

WWAN_SMB_CK_R

WWAN_SMB_DA_R

WWAN_SMB_CK_R

WWAN_SMB_DA_R

LAN_SMB_CK_R

LAN_SMB_DA_R

30

32

30

32

30

32

JWLAN1

JWWAN1

UL10 (LAN)

SMBUS Address [TBD]

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

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2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SMBus Topology

LA-7161P

543Wednesday, January 05, 2011

1

1.0

of

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra

Rb V min

00 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

AD_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

V typ

AD_BID

0 V 0.155 V

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

V

AD_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

max

EC AD3

0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

A

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

0.4

0.5

USB PORT#

0

1

2

3

4

DESTINATION

USB Port 0 (Sub-board)

USB Port 1 (Sub-board)

USB Port 2

None

MiniCard- WLAN

SMBUS Control Table

SOURCE

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_SMBCLK PCH_SMBDATA PCH

MEM_SMBCLK MEM_SMBDATA

KB926

PCH

MIINI1 BATT SODIMM

X X

VV

MINI2

V

XX

X

XX

EXPRESS CARD

X

XX X

V

XX

X

V

CLKOUT

PCI0

PCI1

PCI2

PCI3

PCI4

USB

DESTINATION

None

PCICLK1

PCICLK2

PCICLK3

PCICLK4

5

6

7

8

9

10

11

12

13

1 1

MiniCard- WWAN

None

Card Reader

Camera

None

APU

CLK

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

DESTINATIONDIFFERENTIAL

10/100 LAN

MINI CARD- WLAN

MINI CARD- WWAN

None

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

DESTINATION

HDD1

None

PCI EXPRESS

Port0

Port1

Port2

Port3

FCH

DESTINATION

None

WWAN

10/100

WLAN

CLKOUT_PCIE5

CLKOUT_PCIE6

CLKOUT_PCIE7

CLKOUT_PCIE8

None

Symbol Note :

: means Digital Ground

: means Analog Ground

SATA5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2010/07/31 2011/07/31

None

Compal Secret Data

Deciphered Date

PCI EXPRESS

Port0

Port1

Port2

Port3

DESTINATION

None

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-7161P

of

643Wednesday, January 05, 2011

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+1.8VS

RU1 1K_0402_5%RU1 1K_0402_5%

1 2

RU4 300_0402_5%RU4 300_0402_5%

1 2

RU5 1K_0402_5%RU5 1K_0402_5%

1 2

RU2 1K_0402_5%RU2 1K_0402_5%

1 2

RU6 300_0402_5%

1 2

RU7 300_0402_5%RU7 300_0402_5%

1 2

RU8 510_0402_1%RU8 510_0402_1%

D D

1 2

RU10 1K_0402_5%RU10 1K_0402_5%

1 2

RU35 1K_0402_5%RU35 1K_0402_5%

APU_LDT_STP#

DBREQ#

APU_SVC

APU_SVD

LDT_RST#

APU_PWRGD

TEST_25_L

TEST_36

TEST_35

12

HDMI_TXD2P<18> HDMI_TXD2N<18>

HDMI_TXD1P<18> HDMI_TXD1N<18>

HDMI_TXD0P<18> HDMI_TXD0N<18>

HDMI_CLKP<18> HDMI_CLKN<18>

Enable HDMI output

+3VS

RU16 1K_0402_5%RU16 1K_0402_5%

1 2

RU18 1K_0402_5%RU18 1K_0402_5%

1 2

RU19 1K_0402_5%RU19 1K_0402_5%

1 2

RU20 1K_0402_5%RU20 1K_0402_5%

1 2

RU21 1K_0402_5%RU21 1K_0402_5%

1 2

RU30 1K_0402_5%RU30 1K_0402_5%

RU32 1K_0402_5%RU32 1K_0402_5%

RU34 510_0402_5%RU34 510_0402_5%

1 2

@

RU36 1K_0402_5%

AMD check list Ver 1.02 Delete 1K pulldown requirement for TEST15

C C

B B

A A

AMD check list Ver 1.03

+5VS

use 2k pull up to +5V.

RU14 2K_0402_1%RU14 2K_0402_1%

1 2

RU15 2K_0402_1%RU15 2K_0402_1%

1 2

RU23 2K_0402_1%RU23 2K_0402_1%

1 2

RU26 2K_0402_1%RU26 2K_0402_1%

1 2

RU22 100K_0402_5%RU22 100K_0402_5%

1 2

+3VS

@QU1A

@

2N7002KDWH_SOT363-6

@QU1B

@

2N7002KDWH_SOT363-6

UU1

O@

S IC ONTARIO CMC50AFPB22GT 1G BGA A31!

SA00004KD1L

APU_PROCHOT#

APU_ALERT#_R

APU_SIC

APU_SID

APU_THERMTRIP#_R

12

RU41

RU41 10K_0402_5%

10K_0402_5%

@

2

QU1A

5

QU1B

1 2

RU49 0_0402_5%@RU49 0_0402_5%@

RU45 0_0402_5%@RU45 0_0402_5%@

TEST_18

TEST_19

TEST_25_H

TEST_15

HDMIDAT_UMA

HDMICLK_UMA

LDDC_DATA_MCH

LDDC_CLK_MCH

LTDP0_HPD

EC_SMB_DAAPU_SID FCH_SID

61

1 2

34

EC_SMB_CKAPU_SIC

RU43 0_0402_5%RU43 0_0402_5%

RU44 0_0402_5%RU44 0_0402_5%

RU46 0_0402_5%RU46 0_0402_5%

RU47 0_0402_5%RU47 0_0402_5%

footprint short

Connection to EC, FCH input need to pull-down

2N7002KDW

Vgs(th): min 1.0V

1 2

footprint short

1 2

Typ 1.6V Max 2.5V ESD 2KV

EC_SMB_DA2

FCH_SIC

EC_SMB_CK2

Link to Power IC

LDT_RST#<13> APU_PWRGD<13>

RU24 footprint short

APU_ALERT#<17>

APU_ALERT#_FCH<12>

APU_VDDNB_RUN_FB_H<40> APU_VDD0_RUN_FB_H<40>

APU_VDD0_RUN_FB_L<40>

Link to Power IC

FCH_PROCHOT#<13>

FCH_SID <14>

EC_SMB_DA2 <17,21,25>

FCH_SIC <14>

EC_SMB_CK2 <17,21,25>

4

CU1 0.1U_0402_16V7KCU1 0.1U_0402_16V7K

1 2

CU3 0.1U_0402_16V7KCU3 0.1U_0402_16V7K

1 2

CU4 0.1U_0402_16V7KCU4 0.1U_0402_16V7K

1 2

CU5 0.1U_0402_16V7KCU5 0.1U_0402_16V7K

1 2

CU6 0. 1U_0402_16V7KCU6 0. 1U_0402_16V7K

1 2

CU7 0. 1U_0402_16V7KCU7 0. 1U_0402_16V7K

1 2

CU2 0.1U_0402_16V7KCU2 0.1U_0402_16V7K

1 2

CU8 0.1U_0402_16V7KCU8 0.1U_0402_16V7K

1 2

LVDS_A2+<20> LVDS_A2-<20>

LVDS_A1+<20> LVDS_A1-<20>

LVDS_A0+<20> LVDS_A0-<20>

LVDS_ACLK+<20> LVDS_ACLK-<20>

CLK_APU<13> CLK_APU#<13>

CLK_APU_DP<13> CLK_APU_DP#<13>

APU_SVC<40>

APU_SVD<40>

RU24 0_0402_5%@RU24 0_0402_5%@

1 2

RU25 0_0402_5%@RU25 0_0402_5%@

1 2

Close to APU

TU13PADTU13PAD TU14PADTU14PAD

TU12PADTU12PAD

1 2

RU38 0_0402_5%@RU38 0_0402_5%@

footprint short

T0 FCH

TO EC

T0 FCH

TO EC

HDMI_TXD2P_C HDMI_TXD2N_C

HDMI_TXD1P_C HDMI_TXD1N_C

HDMI_TXD0P_C HDMI_TXD0N_C

HDMI_CLKP_C HDMI_CLKN_C

APU_SIC APU_SID

APU_PROCHOT#

APU_THERMTRIP#_R

APU_ALERT#_R

APU_TDI APU_TDO APU_TCLK APU_TMS APU_TRST# DBRDY DBREQ#

APU_PROCHOT#

UU1B

A8

TDP1_TXP0

B8

TDP1_TXN0

B9

TDP1_TXP1

A9

TDP1_TXN1

D10

TDP1_TXP2

C10

TDP1_TXN2

A10

TDP1_TXP3

B10

TDP1_TXN3

B5

LTDP0_TXP0

A5

LTDP0_TXN0

D6

LTDP0_TXP1

C6

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

D8

LTDP0_TXP3

C8

LTDP0_TXN3

V2

CLKIN_H

V1

CLKIN_L

D2

DISP_CLKIN_H

D1

DISP_CLKIN_L

J1

SVC

J2

SVD

P3

SIC

P4

SID

T3

RESET_L

T4

PWROK

U1

PROCHOT_L

U2

THERMTRIP_L

T2

ALERT_ L

N2

TDI

N1

TDO

P1

TCK

P2

TMS

M4

TRST_L

M3

DBRDY

M1

DBREQ_L

F4

VDDCR_NB_SENSE

G1

VDDCR_CPU_SENSE

F3

VDDIO_MEM_S_SENSE

F1

VSS_SENSE

B4

RSVD_1

W11

RSVD_2

V5

RSVD_3

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

DISPLAYPORT 1

DISPLAYPORT 0

CLK

SER

JTAG CTRL

SA00004KG1L

3

RU3 150_0402_1%RU3 150_0402_1%

1 2

ENBKL <20> ENVDD <20> NB_LCD_PWM <20>

HDMIDAT_UMA <18>

HDMI_HPD <18>

LDDC_CLK_MCH <20>

RU9 100K_0402_5%@RU9 100K_0402_5%@

1 2

VGA_CRT_HSYNC <19> VGA_CRT_VSYNC <19>

VGA_DDC_CLK <19>

RU17 499_0402_1%RU17 499_0402_1%

1 2

TEST_4 TEST_5

TEST_14 TEST_15 TEST_16

TEST_17 TEST_18 TEST_19 TEST_25_H TEST_25_L TEST_28_H TEST_28_L TEST_31 TEST_33_H TEST_33_L TEST_34_H TEST_34_L TEST_35 TEST_36 TEST_37

APU_LDT_STP#

If FCH internal pull-up disabled, level-shifter could be deleted. Need BIOS to disable internal pull-up!!

+1.8VS+1.8VS

footprint short

0_0402_5%

RU53

@RU53

@

1 2

RU54 10K_0402_5%RU54 10K_0402_5%

RU55 10K_0402_5%RU55 10K_0402_5%

RU56 10K_0402_5%RU56 10K_0402_5%

HDMICLK_UMA <18>

LDDC_DATA_MCH <20>

12

VGA_DDC_DATA <19>

PAD

TU1

PAD

TU2

PAD

TU3

PAD

TU4

PAD

TU5

PAD

TU6

PAD

TU7

PAD

TU8

PAD

TU9

PAD

TU10

PAD

TU11

APU_LDT_STP# <13>

APU_THERMTRIP#_R

APU_TRST#_RAPU_TRST#

12

DP MISC

TEST

DAC_GREENB

VGA DAC

DMAACT IVE_L

1K_0402_5%

DP_ZVSS

DP_BLON

DP_DIGON

DP_VARY_ BL

TDP1_AUXP

TDP1_AUXN

TDP1_HPD

LTDP0_AUXP LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_REDB

DAC_GREEN

DAC_BLUE

DAC_BLUEB

DAC_HSYNC DAC_VSYNC

DAC_SCL DAC_SDA

DAC_ZVSS

TEST4 TEST5

TEST6 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19

TEST25_H TEST25_L TEST28_H TEST28_L

TEST31

TEST33_H TEST33_L TEST34_H TEST34_L

TEST35 TEST36 TEST37

TEST38

RU48

H3

G2 H2 H1

B2 C2

C1

A3 B3

LTDP0_HPD

D3

C12

RU11 150_0402_1%RU11 150_0402_1%

D13 A12

RU12 150_0402_1%RU12 150_0402_1%

B12 A13

RU13 150_0402_1%RU13 150_0402_1%

B13

E1 E2

F2 D4

D12

R1 R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5

K3 T1

1 2

2

VGA_CRT_R <19>

VGA_CRT_G <19>

VGA_CRT_B <19>

CU9 0.1U_0402_16V4ZCU9 0.1U_0402_16V4Z

1 2

CU10 0.1U_0402_16V4ZCU10 0.1U_0402_16V4Z

1 2

RU40

RU40 1K_0402_5%

1K_0402_5%

1 2

+'7&211(&725 $0'$38'(%8*3257

JU1

CONN@JU1

CONN@

1

3

5

7

9

11

13

15

17

19

SAMTE_ASP-136446-07-B

RU27 51_0402_1%RU27 51_0402_1%

1 2

RU28 51_0402_1%RU28 51_0402_1%

1 2

+3VS

12

RU39

RU39 10K_0402_5%

10K_0402_5%

B

2

E

3 1

C

QU2

QU2 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

RU42 0_0402_5%

1 2

@

APU_TCLK

2

APU_TMS

4

APU_TDI

6

APU_TDO

8

APU_PWRGD

10

LDT_RST#

12

DBRDY

14

DBREQ#

16

J108_PLLTST0

18

J108_PLLTST1

20

RU50 1K_0402_5%RU50 1K_0402_5%

RU51 1K_0402_5%RU51 1K_0402_5%

RU52 1K_0402_5%RU52 1K_0402_5%

12

1 2

RU57 300_0402_5%RU57 300_0402_5%

1 2

RU58 0_0402_5%@RU58 0_0402_5%@

1 2

RU59 0_0402_5%@RU59 0_0402_5%@

footprint short

APU_THERMTRIP# <14>

+1.8VS

TEST_19

TEST_18

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Dat a

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DISPLAY,CLK,JTAG

LA-7161P

1

1.0

of

743Wednesday, January 05, 2011

5

DDR_D[0..63]<10,11> DDR_DQS#[0..7]<10,11> DDR_DQS[0..7]<10,11>

DDR_DM[0..7]<10,11> DDR_MA[0..15]<10,11>

UU1E

DDR_MA0 DDR_MA1 DDR_MA2

D D

DDR_BS0<10,11> DDR_BS1<10,11> DDR_BS2<10,11>

C C

DDR_A_CLK0<10> DDR_A_CLK0#<10> DDR_A_CLK1<10> DDR_A_CLK1#<10> DDR_B_CLK0<11> DDR_B_CLK0#<11> DDR_B_CLK1<11> DDR_B_CLK1#<11>

DDR_RST#<10,11> DDR_EVENT#<10,11>

DDR_CKE0<10,11> DDR_CKE1<10,11>

DDR_A_ODT0<10> DDR_A_ODT1<10>

B B

DDR_B_ODT0<11> DDR_B_ODT1<11>

DDR_A_CS0#<10> DDR_A_CS1#<10> DDR_B_CS0#<11> DDR_B_CS1#<11>

DDR_RAS#<10,11> DDR_CAS#<10,11> DDR_WE#<10,11>

DDR_MA3 DDR_MA4 DDR_MA5 DDR_MA6 DDR_MA7 DDR_MA8 DDR_MA9 DDR_MA10 DDR_MA11 DDR_MA12 DDR_MA13 DDR_MA14 DDR_MA15

DDR_BS0 DDR_BS1 DDR_BS2

DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7

DDR_DQS0 DDR_DQS#0 DDR_DQS1 DDR_DQS#1 DDR_DQS2 DDR_DQS#2 DDR_DQS3 DDR_DQS#3 DDR_DQS4 DDR_DQS#4 DDR_DQS5 DDR_DQS#5 DDR_DQS6 DDR_DQS#6 DDR_DQS7 DDR_DQS#7

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1# DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1#

DDR_RST# DDR_EVENT#

DDR_CKE0 DDR_CKE1

DDR_A_ODT0 DDR_A_ODT1 DDR_B_ODT0 DDR_B_ODT1

DDR_A_CS0# DDR_A_CS1# DDR_B_CS0# DDR_B_CS1#

DDR_RAS# DDR_CAS# DDR_WE#

UU1E

R17

M_ADD0

H19

M_ADD1

J17

M_ADD2

H18

M_ADD3

H17

M_ADD4

G17

M_ADD5

H15

M_ADD6

G18

M_ADD7

F19

M_ADD8

E19

M_ADD9

T19

M_ADD10

F17

M_ADD11

E18

M_ADD12

W17

M_ADD13

E16

M_ADD14

G15

M_ADD15

R18

M_BANK0

T18

M_BANK1

F16

M_BANK2

D15

M_DM0

B19

M_DM1

D21

M_DM2

H22

M_DM3

P23

M_DM4

V23

M_DM5

AB20

M_DM6

AA16

M_DM7

A16

M_DQS_H0

B16

M_DQS_L0

B20

M_DQS_H1

A20

M_DQS_L1

E23

M_DQS_H2

E22

M_DQS_L2

J22

M_DQS_H3

J23

M_DQS_L3

R22

M_DQS_H4

P22

M_DQS_L4

W22

M_DQS_H5

V22

M_DQS_L5

AC20

M_DQS_H6

AC21

M_DQS_L6

AB16

M_DQS_H7

AC16

M_DQS_L7

M17

M_CLK_H0

M16

M_CLK_L0

M19

M_CLK_H1

M18

M_CLK_L1

N18

M_CLK_H2

N19

M_CLK_L2

L18

M_CLK_H3

L17

M_CLK_L3

L23

M_RESET_L

N17

M_EVENT_L

F15

M_CKE0

E15

M_CKE1

W19

M0_ODT0

V15

M0_ODT1

U19

M1_ODT0

W15

M1_ODT1

T17

M0_CS_L0

W16

M0_CS_L1

U17

M1_CS_L0

V16

M1_CS_L1

U18

M_RAS_L

V19

M_CAS_L

V17

M_WE_L

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

DDR SYSTEM MEMORY

M_ZVDDIO_MEM_S

M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7

M_DATA8

M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15

M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23

M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31

M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39

M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47

M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55

M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63

M_VREF

4

DDR_D0

B14

DDR_D1

A15

DDR_D2

A17

DDR_D3

D18

DDR_D4

A14

DDR_D5

C14

DDR_D6

C16

DDR_D7

D16

DDR_D8

C18

DDR_D9

A19

DDR_D10

B21

DDR_D11

D20

DDR_D12

A18

DDR_D13

B18

DDR_D14

A21

DDR_D15

C20

DDR_D16

C23

DDR_D17

D23

DDR_D18

F23

DDR_D19

F22

DDR_D20

C22

DDR_D21

D22

DDR_D22

F20

DDR_D23

F21

DDR_D24

H21

DDR_D25

H23

DDR_D26

K22

DDR_D27

K21

DDR_D28

G23

DDR_D29

H20

DDR_D30

K20

DDR_D31

K23

DDR_D32

N23

DDR_D33

P21

DDR_D34

T20

DDR_D35

T23

DDR_D36

M20

DDR_D37

P20

DDR_D38

R23

DDR_D39

T22

DDR_D40

V20

DDR_D41

V21

DDR_D42

Y23

DDR_D43

Y22

DDR_D44

T21

DDR_D45

U23

DDR_D46

W23

DDR_D47

Y21

DDR_D48

Y20

DDR_D49

AB22

DDR_D50

AC19

DDR_D51

AA18

DDR_D52

AA23

DDR_D53

AA20

DDR_D54

AB19

DDR_D55

Y18

DDR_D56

AC17

DDR_D57

Y16

DDR_D58

AB14

DDR_D59

AC14

DDR_D60

AC18

DDR_D61

AB18

DDR_D62

AB15

DDR_D63

AC15

+M_VREF

M23

RU64 39.2_0402_1%RU64 39.2_0402_1%

M22

1 2

3

UMI_C_TXP [0..3]<13> UMI_C_TXN[0..3]<13>

UMI_C_RXP[0..3]<13> UMI_C_RXN[0..3]<13>

UU1A

AA6

P_GPP_RXP0

Y6

P_GPP_RXN0

PCIE_NRX_WWANTX_P2<25> PCIE_NTX_WW ANRX_P2 <25>

::$1 ::$1

:/$1

PCIE_NRX_WWANTX_N2<25>

PCIE_NRX_LANTX_P0<21> PCIE_NRX_LANTX_N0<21>

/$1

PCIE_NRX_WLANTX_P1<25> PCIE_NTX_WLANRX_P1 <25> PCIE_NRX_WLANTX_N1<25>

RU60 2K_0402_1%RU60 2K_0402_1%

+1.05VS

1 2

+M_VREF

1

CU25

2

0.1U_0402_16V4Z

+1.5V

UMI_C_RXP0 UMI_C_RXN0

UMI_C_RXP1 UMI_C_RXN1

UMI_C_RXP2 UMI_C_RXN2

UMI_C_RXP3 UMI_C_RXN3

1000P_0402_50V7K

AB4

P_GPP_RXP1

AC4

P_GPP_RXN1

AA1

P_GPP_RXP2

AA2

P_GPP_RXN2

Y4

P_GPP_RXP3

Y3

P_GPP_RXN3

Y14

P_ZVDD_10

AA12

P_UMI_RXP0

Y12

P_UMI_RXN0

AA10

P_UMI_RXP1

Y10

P_UMI_RXN1

AB10

P_UMI_RXP2

AC10

P_UMI_RXN2

AC7

P_UMI_RXP3

AB7

P_UMI_RXN3

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

+1.5V

12

RU62

1K_0402_1%

1

CU26

12

RU63

2

RU63

1K_0402_1%

PCIE I/F

UMI I/F

P_GPP_TXP0 P_GPP_TXN0

P_GPP_TXP1 P_GPP_TXN1

P_GPP_TXP2 P_GPP_TXN2

P_GPP_TXP3 P_GPP_TXN3

P_UMI_TXP0 P_UMI_TXN0

P_UMI_TXP1 P_UMI_TXN1

P_UMI_TXP2 P_UMI_TXN2

P_UMI_TXP3 P_UMI_TXN3

P_ZVSS

2

AB6 AC6

PCIE_NTX_WWANRX_P 2_C

AB3

PCIE_NTX_WWANRX_N 2_C

AC3

PCIE_NTX_LANRX_P0_C

Y1

PCIE_NTX_LANRX_N0_C

Y2

PCIE_NTX_WLANRX_P1_C

V3

PCIE_NTX_WLANRX_N1_C

V4

RU61 1.27K_0402_1%RU61 1.27K_0402_1%

AA14

1 2

UMI_TXP0

AB12 AC12

AC11 AB11

AA8 Y8

AB8 AC8

CU17 0.1U_0402_16V7KCU17 0.1U_0402_16V7K

UMI_TXN0

UMI_TXP1 UMI_TXN1

UMI_TXP2 UMI_TXN2

UMI_TXP3 UMI_TXN3

1 2

CU18 0.1U_0402_16V7KCU18 0.1U_0402_16V7K

1 2

CU19 0.1U_0402_16V7KCU19 0.1U_0402_16V7K

1 2

CU20 0.1U_0402_16V7KCU20 0.1U_0402_16V7K

1 2

CU21 0.1U_0402_16V7KCU21 0.1U_0402_16V7K

1 2

CU22 0.1U_0402_16V7KCU22 0.1U_0402_16V7K

1 2

CU23 0.1U_0402_16V7KCU23 0.1U_0402_16V7K

1 2

CU24 0.1U_0402_16V7KCU24 0.1U_0402_16V7K

1 2

CF78 0.1U_0402_16V7KCF78 0.1U_0402_16V7K

1 2

CF79 0.1U_0402_16V7KCF79 0.1U_0402_16V7K

1 2

CU11 0.1U_0402_16V7KCU11 0.1U_0402_16V7K

1 2

CU12 0.1U_0402_16V7KCU12 0.1U_0402_16V7K

1 2

CU13 0.1U_0402_16V7KCU13 0.1U_0402_16V7K

1 2

CU14 0.1U_0402_16V7KCU14 0.1U_0402_16V7K

1 2

UMI_C_TXP0 UMI_C_TXN0

UMI_C_TXP1 UMI_C_TXN1

UMI_C_TXP2 UMI_C_TXN2

UMI_C_TXP3 UMI_C_TXN3

1

PCIE_NTX_WWANRX_N 2 <25>

PCIE_NTX_LANRX_P0 <21> PCIE_NTX_LANRX_N0 <21>

PCIE_NTX_WLANRX_N1 <25>

/$1

:/$1

+1.5V

DDR_EVENT#

DDR_RST#

A A

5

RU67 1K_0402_1%RU67 1K_0402_1%

RU68 1K_0402_1%

@

12

4

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRIII,UMI

LA-7161P

1

843Wednesday, January 05, 2011

of

1.0

5

4

3

2

1

+APU_CORE

UU1C

E5

VDDCR_CPU_1

E6

VDDCR_CPU_2

F5

VDDCR_CPU_3

F7

VDDCR_CPU_4

G6

VDDCR_CPU_5

G8

VDDCR_CPU_6

H5

VDDCR_CPU_7

H7

VDDCR_CPU_8

J6

VDDCR_CPU_9

J8

VDDCR_CPU_10

L7

VDDCR_CPU_11

M6

VDDCR_CPU_12

M8

VDDCR_CPU_13

N7

VDDCR_CPU_14

R8

VDDCR_CPU_15

E8

VDDCR_NB_1

E11

VDDCR_NB_2

E13

VDDCR_NB_3

F9

VDDCR_NB_4

F12

VDDCR_NB_5

G11

VDDCR_NB_6

G13

VDDCR_NB_7

H9

VDDCR_NB_8

H12

VDDCR_NB_9

K11

VDDCR_NB_10

K13

VDDCR_NB_11

L10

VDDCR_NB_12

L12

VDDCR_NB_13

L14

VDDCR_NB_14

M11

VDDCR_NB_15

M12

VDDCR_NB_16

M13

VDDCR_NB_17

N10

VDDCR_NB_18

N12

VDDCR_NB_19

N14

VDDCR_NB_20

P11

VDDCR_NB_21

P13

VDDCR_NB_22

G16

VDDIO_ MEM_S_1

G19

VDDIO_ MEM_S_2

E17

VDDIO_ MEM_S_3

J16

VDDIO_ MEM_S_4

L16

VDDIO_ MEM_S_5

L19

VDDIO_ MEM_S_6

N16

VDDIO_ MEM_S_7

R16

VDDIO_ MEM_S_8

R19

VDDIO_ MEM_S_9

W18

VDDIO_ MEM_S_10

U16

VDDIO_ MEM_S_11

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

1

CU81

2

10U_0603_6.3V6M

1

CU87

2

1U_0402_6.3V6K

1

CU88

2

1U_0402_6.3V6K

TSense/PLL/DP/PCIE/IO

VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4 VDD_18_5 VDD_18_6

CPU CORE

VDD_18_7

DAC

VDD_18_DAC

GPU AND NB CORE

POWER

DIS PLL

VDDPL_10

PCIE/IO/DDR3 Phy

VDD_10_1 VDD_10_2 VDD_10_3 VDD_10_4

DDR3

DP Phy/IO

VDD_33

1

CU89

2

1U_0402_6.3V6K

U8 W8 U6 U9 W6 T7 V7

W9

U11

U13 W13 V12 T12

A4

+VDD_18

CU30

+VDD_18_DAC

CU47

TU15

TU15 PAD

PAD

TU15 near UU1

+VDDL_10

CU55

+VDD_10

CU59

CU71

1

CU37

2

180P_0402_50V8J

1

CU48

2

180P_0402_50V8J

1

CU56

2

180P_0402_50V8J

1

CU60

2

180P_0402_50V8J

1

CU72

2

0.1U_0402_16V7K

1

2

0.1U_0402_16V7K

1

2

1U_0402_6.3V6K

1

2

0.1U_0402_16V7K

1

2

0.1U_0402_16V7K

1

2

1U_0402_6.3V6K

CU38

CU49

CU57

CU61

1

2

1

2

1

2

1

2

+3VS

1

CU39

2

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CU58

2

1U_0402_6.3V6K

1

CU62

2

0.1U_0402_16V7K

1

CU31

2

1U_0402_6.3V6K

LU2

@LU2

@

0_0805_5%

10U_0603_6.3V6M

1

CU63

2

1U_0402_6.3V6K

1

CU40

CU32

2

1U_0402_6.3V6K

12

+1.8VS

10U_0603_6.3V6M

footprint short

LU3

FBMA-L11-201209-221LMA30T_0805

@ LU4

@

0_0805_5%

1

CU65

CU64

2

1U_0402_6.3V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

0.1U_0402_16V7K

10U_0603_6.3V6M

1U_0402_6.3V6K

0.1U_0402_16V7K

+1.05VS

1

CU27

2

1

CU43

2

1

CU52

2

1

CU68

2

1

CU75

2

1

CU84

2

1

D D

CU34

2

1

CU41

2

1

CU50

2

+APU_CORE_NB

C C

CU66

CU73

CU82

B B

10U_0603_6.3V6M

1U_0402_6.3V6K

0.1U_0402_16V7K

1

2

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

1

2

0.1U_0402_16V7K

1

CU35

2

1

CU42

2

1

CU51

2

1

CU67

2

1

CU74

2

1

CU83

2

POWER

10U_0603_6.3V6M

1U_0402_6.3V6K

0.1U_0402_16V7K

10U_0603_6.3V6M

1U_0402_6.3V6K

0.1U_0402_16V7K

CU36

CU44

CU53

CU69

CU76

CU85

1

2

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

1

2

0.1U_0402_16V7K

1

2

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

1

2

0.1U_0402_16V7K

CU54

CU70

CU77

1

CU28

2

1

2

1

2

1

2

10U_0603_6.3V6M

0.1U_0402_16V7K

10U_0603_6.3V6M

1U_0402_6.3V6K

1

CU29

2

1

CU45

2

CU78

CU33

10U_0603_6.3V6M

CU46

180P_0402_50V8J

1

CU79

2

180P_0402_50V8J

1

2

1

2

1

2

10U_0603_6.3V6M

+APU_CORE_NB

180P_0402_50V8J

+APU_CORE

+1.5V

1

CU80

2

10U_0603_6.3V6M

1

CU86

2

1U_0402_6.3V6K

+1.8VS

LU1

@ LU1

@

12

0_0805_5%

footprint short

+1.05VS

12

LU4

12

footprint short

UU1D

A7

VSS_1

B7

VSS_2

B11

VSS_3

B17

VSS_4

B22

VSS_5

C4

VSS_6

D5

VSS_7

D7

VSS_8

D9

VSS_9

D11

VSS_10

D14

VSS_11

B15

VSS_12

D17

VSS_13

D19

VSS_14

E7

VSS_15

E9

VSS_16

E12

VSS_17

E20

VSS_18

F8

VSS_19

F11

VSS_20

F13

VSS_21

G4

VSS_22

G5

VSS_23

G7

VSS_24

G9

VSS_25

G12

VSS_26

G20

VSS_27

G22

VSS_28

H6

VSS_29

H11

VSS_30

H13

VSS_31

J4

VSS_32

J5

VSS_33

J7

VSS_34

J20

VSS_35

K10

VSS_36

K14

VSS_37

L4

VSS_38

L6

VSS_39

L8

VSS_40

L11

VSS_41

L13

VSS_42

L20

VSS_43

L22

VSS_44

M7

VSS_45

N4

VSS_46

N6

VSS_47

N8

VSS_48

N11

VSS_49

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

GND

VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97

VSSBG_DAC

N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11

1

+

CU91

CU90

@

+APU_CORE

1

+

CU97

2

330U_D2E_2.5VM_R9M

+APU_CORE_NB

A A

1

+

@

CU111

2

330U_2.5V_M

2

10U_0603_6.3V6M

220U_B2_2.5VM_R35

POWER

1

+

CU98

2

1

+

CU112

2

1

+

CU99

2

330U_D2E_2.5VM_R9M

Near CPU Socket

1

CU114

2

330U_D2_2.5VY_R9M

Near CPU Socket Near CPU Socket

330U_D2E_2.5VM_R9M

10U_0603_6.3V6M

1

@

CU106

2

10U_0603_6.3V6M

+1.5V +1.8VS

1

+

CU109

2

1

CU92

2

POWER POWER

1

CU115

2

330U_2.5V_M

(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)

5

4

0.1U_0402_16V7K

22U_0805_6.3V6M

1

CU93

2

0.1U_0402_16V7K

CU94

1

2

1

+

CU110

2

0.1U_0402_16V7K

Near CPU Socket

330U_2.5V_M

CU95

@

CU113

1

2

180P_0402_50V8J

1

2

10U_0603_6.3V6M

1

CU96

2

180P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Dat a

Deciphered Dat e

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

P07-FT1 PWR/VSS

LA-7161P

1

943Wednesday, January 05, 2011

of

1.0

5

M1 Circuit

+1.5V

12

RD2

1K_0402_1%

2

CD4

1

+VREF_DQ

+VREF_CA

2

CD5

1

0.1U_0402_16V4Z

2

CD6

1

2

1

0.1U_0402_16V4Z

12

RD3

+1.5V

RD12

2

1

RD3

1K_0402_1%

+1.5V

12

RD11

1K_0402_1%

0.1U_0402_16V4Z

CD3

D D

1K_0402_1%

C C

0.1U_0402_16V4Z

CRB 0.1u X1 4.7u X1

+0.75VS

2

CD18

CD17

B B

CD17

1

0.1U_0402_16V4Z

CD7

1

CD19

2

4.7U_0603_6.3V6K

DDR_DQS#[0..7]<8,11>

DDR_D[0..63]<8,11>

DDR_DM[0..7]<8,11>

DDR_DQS[0..7]<8,11>

DDR_MA[0..15]<8,11>

2

CD8

CD9

1

CD9

1

0.1U_0402_16V4Z

CRB 100U X2

0.1U_0402_16V4Z

+1.5V

CD20

Place near JDIMM1

A A

1

+

2

CD10

1

220U_B2_2.5VM_R35

4

2

CD11

1

0.1U_0402_16V4Z

2

CD12

1

2

CD13

1

0.1U_0402_16V4Z

2

CD14

1

+VREF_DQ

1000P_0402_50V7K

2.2U_0603_6.3V6K

CD1

+3VS

3

1

2

CD2

CD21

0.1U_0402_16V4Z

1

2

DDR_CKE0<8,11>

DDR_BS2<8,11>

DDR_A_CLK0<8> DDR_A_CLK0#<8>

DDR_BS0<8,11>

DDR_WE#<8,11> DDR_CAS#<8,11>

DDR_A_CS1#<8>

1

2

+1.5V +1.5V

DDR_D0 DDR_D1

DDR_DM0

DDR_D2 DDR_D3

DDR_D8 DDR_D9

DDR_DQS#1 DDR_DQS1

DDR_D10 DDR_D11

DDR_D16 DDR_D17

DDR_DQS#2 DDR_DQS2

DDR_D18 DDR_D19

DDR_D24 DDR_D25

DDR_DM3

DDR_D26 DDR_D27

DDR_MA12 DDR_MA9

DDR_MA8 DDR_MA5

DDR_MA3 DDR_MA1

DDR_MA10

DDR_MA13

DDR_D32 DDR_D33

DDR_DQS#4 DDR_DQS4

DDR_D34 DDR_D35

DDR_D40 DDR_D41

DDR_DM5

DDR_D42 DDR_D43

DDR_D48 DDR_D49

DDR_DQS#6 DDR_DQS6

DDR_D50 DDR_D51

DDR_D56 DDR_D57

DDR_DM7

DDR_D58 DDR_D59

RD5 10K_0402_5%RD5 10K_0402_5%

1 2

1

CD22

0.1U_0402_16V4Z

2

12

RD6

RD6 10K_0402_5%

10K_0402_5%

JDIMMA

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

4mm

205

G1

FOX_AS0A626-U4RN-7F

CONN@

2

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

VTT2

A15 A14

A11

CK1

BA1

S0#

SCL

1

2

DDR_D4

4

DDR_D5

6 8

DDR_DQS#0

10

DDR_DQS0

12 14

DDR_D6

16

DDR_D7

18 20

DDR_D12

22

DDR_D13

24 26

DDR_DM1

28 30 32

DDR_D14

34

DDR_D15

36 38

DDR_D20

40

DDR_D21

42 44

DDR_DM2

46 48

DDR_D22

50

DDR_D23

52 54

DDR_D28

56

DDR_D29

58 60

DDR_DQS#3

62

DDR_DQS3

64 66

DDR_D30

68

DDR_D31

70 72

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

DDR_MA15 DDR_MA14

DDR_MA11 DDR_MA7

DDR_MA6 DDR_MA4

DDR_MA2 DDR_MA0

DDR_D36 DDR_D37

DDR_DM4

DDR_D38 DDR_D39

DDR_D44 DDR_D45

DDR_DQS#5 DDR_DQS5

DDR_D46 DDR_D47

DDR_D52 DDR_D53

DDR_DM6

DDR_D54 DDR_D55

DDR_D60 DDR_D61

DDR_DQS#7 DDR_DQS7

DDR_D62 DDR_D63

+0.75VS

DDR_RST# <8,11>

DDR_CKE1 <8,11>

DDR_A_CLK1 <8> DDR_A_CLK1# <8>

DDR_BS1 <8,11> DDR_RAS# <8,11>

DDR_A_CS0# <8> DDR_A_ODT0 <8>

DDR_A_ODT1 <8>

CD15

1000P_0402_50V7K

DDR_EVENT# <8,11>

SMB_FCH_DA0 <11,14>

SMB_FCH_CK0 <11,14>

SP07000J500

+VREF_CA

1

CD16

0.1U_0402_16V4Z

2

REVERSE TYPE

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM A

LA-7161P

1

1.0

10 43Wednesday, January 05, 2011

1.0

of

5

DDR_DQS#[0..7]<8,10>

DDR_D[0..63]<8,10>

2

CD27

1

DDR_DM[0..7]<8,10>

DDR_DQS[0..7]<8,10>

DDR_MA[0..15]<8,10>

0.1U_0402_16V4Z

2

CD28

1

0.1U_0402_16V4Z

2

CD29

1

0.1U_0402_16V4Z

2

CD30

1

2

CD31

1

0.1U_0402_16V4Z

D D

C C

+1.5V

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

CD25

CD26

1

0.1U_0402_16V4Z

CRB 0.1u X1 4,7uX1

+0.75VS

2

CD39

CD40

B B

1

0.1U_0402_16V4Z

Place near JDIMM2

A A

1

2

CD41

2

1

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

2

CD32

1

4

2

CD33

1

0.1U_0402_16V4Z

2

CD34

1

0.1U_0402_16V4Z

3

+1.5V +1.5V

JDIMMB

+VREF_DQ

1

CD42

2

CD23

1

2

1

0.1U_0402_16V4Z

2

DDR_CKE0<8,10>

DDR_BS2<8,10>

DDR_B_CLK0<8> DDR_B_CLK0#<8>

DDR_BS0<8,10>

DDR_WE#<8,10> DDR_CAS#<8,10>

DDR_B_CS1#<8>

1

CD43

2

0.1U_0402_16V4Z

CD24

1000P_0402_50V7K

2

1

CD35

CD36

0.1U_0402_16V4Z

1

+3VS

2.2U_0603_6.3V6K

DDR_D0 DDR_D1

DDR_DM0

DDR_D2 DDR_D3

DDR_D8 DDR_D9

DDR_DQS#1 DDR_DQS1

DDR_D10 DDR_D11

DDR_D16 DDR_D17

DDR_DQS#2 DDR_DQS2

DDR_D19

DDR_D24 DDR_D25

DDR_DM3

DDR_D26 DDR_D27

DDR_MA12 DDR_MA9

DDR_MA8 DDR_MA5

DDR_MA3 DDR_MA1

DDR_MA10

DDR_MA13

DDR_D32 DDR_D33

DDR_DQS#4 DDR_DQS4

DDR_D34 DDR_D35

DDR_D40 DDR_D41

DDR_DM5

DDR_D42 DDR_D43

DDR_D48 DDR_D49

DDR_DQS#6 DDR_DQS6

DDR_D50 DDR_D51

DDR_D56 DDR_D57

DDR_DM7

DDR_D58 DDR_D59

RD9 10K_0402_5%RD9 10K_0402_5%

1 2

RD10 10K_0402_5%RD10 10K_0402_5%

JDIMMB

3 5 7

9 11 13 15 17 19 21 23 25 27

33 35

39 41

45 47 49 51 53 55 57 59

63

67 69

73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

FOX_AS0A626-U8RN-7F

CONN@

2

VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26

CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

4mm

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

1

2

DDR_D4

4

DDR_D5

6 8

DDR_DQS#0

10

DDR_DQS0

12 14

DDR_D6

16

DDR_D7

18 20

DDR_D12

22

DDR_D13

24 26

DDR_DM1

28 30 32

DDR_D14

34

DDR_D15

36 38

DDR_D20

40

DDR_D21

42 44

DDR_DM2

46 48

DDR_D22

50

DDR_D23DDR_D18

52 54

DDR_D28

56

DDR_D29

58 60

DDR_DQS#3

62

DDR_DQS3

64 66

DDR_D30

68

DDR_D31

70 72

74 76

DDR_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_MA14

80 82

DDR_MA11

84

DDR_MA7

86 88

DDR_MA6

90

DDR_MA4

92 94

DDR_MA2

96

DDR_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128

DDR_D36

130

DDR_D37

132 134

DDR_DM4

136 138

DDR_D38

140

DDR_D39

142 144

DDR_D44

146

DDR_D45

148 150

DDR_DQS#5

152

DDR_DQS5

154 156

DDR_D46

158

DDR_D47

160 162

DDR_D52

164

DDR_D53

166 168

DDR_DM6

170 172

DDR_D54

174

DDR_D55

176 178

DDR_D60

180

DDR_D61

182 184

DDR_DQS#7

186

DDR_DQS7

188 190

DDR_D62

192

DDR_D63

194 196 198 200 202 204

206

DDR_RST# <8,10>

DDR_CKE1 <8,10>

1000P_0402_50V7K

+0.75VS

DC020811210

DDR_B_CLK1 <8> DDR_B_CLK1# <8>

DDR_BS1 <8,10> DDR_RAS# <8,10>

DDR_B_CS0# <8> DDR_B_ODT0 <8>

DDR_B_ODT1 <8>

1

CD37

2

DDR_EVENT# <8,10>

SMB_FCH_DA0 <10,14>

SMB_FCH_CK0 <10,14>

+VREF_CA

1

CD38

0.1U_0402_16V4Z

2

REVERSE TYPE

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM B

LA-7161P

1

1.0

of

11 43Wednesday, January 05, 2011

of

11 43Wednesday, January 05, 2011

of

11 43Wednesday, January 05, 2011

5

0.01U_0402_16V7K

+1.1VS

SATA_ACT#_R<26>

1

2

SATA_STX_DRX_P0 SATA_STX_DRX_N0

+3VS

RF15

@ RF15

@

1M_0402_5%

1 2

CF8

@CF8

@

22P_0402_50V8J

0.01U_0402_16V7K

RF5 1K_0402_1%RF5 1K_0402_1%

1 2

RF6 931_0402_1%RF6 931_0402_1%

1 2

SATA_ACT#_R

SATA_STX_DRX_P0<27>

HDD

D D

C C

22P_0402_50V8J

SATA_STX_DRX_N0<27>

25MHZ_20PF_7A25000012

1

CF7

@CF7

@

2

SATA_SRX_DTX_N0<27> SATA_SRX_DTX_P0<27>

@

YF2

1 2

CF5

12

CF6

12

SATA_X1

SATA_X2

PAD

4

SATA_STX_DRX_P0_C SATA_STX_DRX_N0_C

SATA_SRX_DTX_N0 SATA_SRX_DTX_P0

SATA_CALRP SATA_CALRN

RF810K_0402_5% RF810K_0402_5%

12

FCH_SPI_DI FCH_SPI_DO FCH_SPI_CLK FCH_SPI_CS1#

TF1

UF1B

AH9

SATA_TX0P

AJ9

SATA_TX0N

AJ8

SATA_RX0N

AH8

SATA_RX0P

AH10

SATA_TX1P

AJ10

SATA_TX1N

AG10

SATA_RX1N

AF10

SATA_RX1P

AG12

SATA_TX2P

AF12

SATA_TX2N

AJ12

SATA_RX2N

AH12

SATA_RX2P

AH14

SATA_TX3P

AJ14

SATA_TX3N

AG14

SATA_RX3N

AF14

SATA_RX3P

AG17

SATA_TX4P

AF17

SATA_TX4N

AJ17

SATA_RX4N

AH17

SATA_RX4P

AJ18

SATA_TX5P

AH18

SATA_TX5N

AH19

SATA_RX5N

AJ19

SATA_RX5P

AB14

SATA_CALRP

AA14

SATA_CALRN

AD11

SATA_ACT_L/GPIO67

AD16

SATA_X1

AC16

SATA_X2

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO163

K4

SPI_CLK/GPIO162

K9

SPI_CS1_L/GPIO165

G2

ROM_RST_L/GPIO161

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

SERIAL ATA

SPI ROM

3

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE_L/GPIOD145

FC_AVD_L/GPIOD146

FC_WE_L/GPIOD148 FC_CE1_L/GPIOD149 FC_CE2_L/GPIOD150

FC_INT1/GPIOD144

GPIOD

FC_INT2/GPIOD147

FC_ADQ0/GPIOD128

FC_ADQ1/GPIOD129

FC_ADQ2/GPIOD130

FC_ADQ3/GPIOD131

FC_ADQ4/GPIOD132

FC_ADQ5/GPIOD133

FC_ADQ6/GPIOD134

FC_ADQ7/GPIOD135

FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137

FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140 FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

HW MONITOR

FANOUT0/GPIO5 2 FANOUT1/GPIO5 3 FANOUT2/GPIO5 4

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO1 71 TEMPIN1/GPIO1 72 TEMPIN2/GPIO1 73

TEMPIN3/TALERT_L/GPIO174

TEMP_COMM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

NC1 NC2

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

RF7 10K_0402_5%RF7 10K_0402_5%

B6

RF9 10K_0402_5%RF9 10K_0402_5%

A6

RF10 10K_0402_5%RF10 10K_0402_5%

A5 B5 C7

RF12 10K_0402_5%RF12 10K_0402_5%

A3

RF14 10K_0402_5%RF14 10K_0402_5%

B4

RF16 10K_0402_5%RF16 10K_0402_5%

A4

RF17 10K_0402_5%RF17 10K_0402_5%

C5

RF18 10K_0402_5%RF18 10K_0402_5%

A7 B7

RF20 10K_0402_5%@RF20 10K_0402_5%@

B8

RF21 10K_0402_5%RF21 10K_0402_5%

A8

G27 Y2

1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2

1 2 1 2

2

APU_ALERT#_FCH <7>

RF13 10K_0402_5%RF13 10K_0402_5%

1 2

1

B B

UF24

1

CS#

2 3 4

VCC

SO

HOLD#

WP#

SCLK

GND

MX25L1606EM2I-12G_SO8

SI

RF22 10K_0402_5%RF22 10K_0402_5%

8 7

FCH_SPI_CLK_R

6

FCH_SPI_DO

5

1 2

+3VS

FCH_SPI_CS1# FCH_SPI_DI

1 2

RF23

10K_0402_5%

SA000041N00

A A

5

+3VS

1

CF9

2

0.1U_0402_16V7K

4

For RF

FCH_SPI_CLK FCH_SPI_CLK_R

RF27 0_0402_5%RF27 0_0402_5%

12

1

CF80

CF80 33P_0402_50V8J

33P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SATA,SPI,GPIO

LA-7161P

1.0

12 43Wednesday, January 05, 2011

1

1.0

of

5

4

3

2

1

Need confirm with BIOS

150P_0402_50V8J

CF77

PCIE_RST# PCIE_RST#_R

A_RST#

UMI_C_RXP0 UMI_C_RXN0

D D

C C

UMI_C_RXP[0..3]<8> UMI_C_RXN[0..3]<8>

UMI_C_TXP[0..3]<8> UMI_C_TXN[0..3]<8>

CLK_PCIE_WLAN_P<25> CLK_PCIE_WLAN_N<25>

CLK_PCIE_WWAN_P<25> CLK_PCIE_WWAN_N<25>

UMI_C_RXP1 UMI_C_RXN1 UMI_C_RXP2 UMI_C_RXN2 UMI_C_RXP3 UMI_C_RXN3

+1.1VS

CLK_APU_DP<7> CLK_APU_DP#<7>

CLK_APU<7> CLK_APU#<7>

CLK_PCIE_LAN_P<21> CLK_PCIE_LAN_N<21>

Place close to UF1

B B

CF20 33P_0402_50V8JCF20 33P_0402_50V8J

CLK_48M<22>

1 2

RF48 33_0402_5%RF48 33_0402_5%

12

150P_0402_50V8J

CF10

1 2

RF25 33_0402_5%RF25 33_0402_5%

12

CF16 0.1U_0402_16V7KC F16 0. 1U_0402_16V7K

1 2

CF11 0.1U_0402_16V7KC F11 0. 1U_0402_16V7K

1 2

CF12 0.1U_0402_16V7KC F12 0. 1U_0402_16V7K

1 2

CF17 0.1U_0402_16V7KC F17 0. 1U_0402_16V7K

1 2

CF18 0.1U_0402_16V7KC F18 0. 1U_0402_16V7K

1 2

CF13 0.1U_0402_16V7KC F13 0. 1U_0402_16V7K

1 2

CF14 0.1U_0402_16V7KC F14 0. 1U_0402_16V7K

1 2

CF15 0.1U_0402_16V7KC F15 0. 1U_0402_16V7K

1 2

RF26 590_0402_1%RF26 590_0402_1%

1 2

RF28 2K_0402_1%RF28 2K_0402_1%

1 2

RF33 0_0402_5%RF33 0_0402_5%

12

RF34 0_0402_5%RF34 0_0402_5%

12

RF35 0_0402_5%RF35 0_0402_5%

12

RF36 0_0402_5%RF36 0_0402_5%

12

RF37 0_0402_5%RF37 0_0402_5%

1 2

RF38 0_0402_5%RF38 0_0402_5%

1 2

RF39 0_0402_5%RF39 0_0402_5%

1 2

RF40 0_0402_5%RF40 0_0402_5%

1 2

RF41 0_0402_5%RF41 0_0402_5%

1 2

RF42 0_0402_5%RF42 0_0402_5%

1 2

RF Change to 33PF

12

RF47

12

CF21

CF22

12

25MHZ_20PF_7A25000012

12

22P_0402_50V8J

33_0402_5%

12

YF1

UMI_R XP0 UMI_RXN0 UMI_R XP1 UMI_RXN1 UMI_R XP2 UMI_RXN2 UMI_R XP3 UMI_RXN3

UMI_C _TXP0 UMI_C_TXN0 UMI_C _TXP1 UMI_C_TXN1 UMI_C _TXP2 UMI_C_TXN2 UMI_C _TXP3 UMI_C_TXN3

PCIE_CALRP PCIE_CALRN

CLK_APU_DP_R CLK_APU_DP#_R

CLK_APU_R CLK_APU#_R

CLK_PCIE_LAN_P_R CLK_PCIE_L AN_N_R

CLK_PCIE_WLAN_P_R CLK_PCIE_WLAN_N_R

CLK_PCIE_WWAN_P_R CLK_PCIE_W WAN_N_ R

CLK_48M_RCLK_48M

XTAL25_IN

1M_0402_5%

XTAL25_OUT

RF49

UF1E

P1

PCIE_RST_L

L1

A_RST_L

AD26

UMI_TX0P

AD27

UMI_TX0N

AC28

UMI_TX1P

AC29

UMI_TX1N

AB29

UMI_TX2P

AB28

UMI_TX2N

AB26

UMI_TX3P

AB27

UMI_TX3N

AE24

UMI_RX0P

AE23

UMI_RX0N

AD25

UMI_RX1P

AD24

UMI_RX1N

AC24

UMI_RX2P

AC25

UMI_RX2N

AB25

UMI_RX3P

AB24

UMI_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

PCI EXPRESS I/F

CLOCK GENERATOR

PCI CLKS

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

PCI I/F

REQ1_L/GPIO40 REQ2_L/CLK_REQ8_L/GPIO41 REQ3_L/CLK_REQ5_L/GPIO42

GNT3_L/CLK_REQ7_L/GPIO46

LPC

LDRQ1_L/CLK_REQ6_L/GPIO49

SERIRQ/GPIO48

CPU

ALLOW_LDTSTP/DMA_ACTIVE_L

RTC

INTRUDER_ALERT_L

PCICLK0

PCIRST_L

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

CBE0_L CBE1_L CBE2_L CBE3_L

FRAME_L

DEVSEL_L

IRDY_L

TRDY_L

STOP_L PERR_L SERR_L REQ0_L

GNT0_L GNT1_L/GPO44 GNT2_L/GPO45

CLKRUN_L

LOCK_L

INTE_L/GPIO32 INTF_L/GPIO33

INTG_L/GPIO34

INTH_L/GPIO35

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME_L

LDRQ0_L

PROCHOT_L

LDT_PG

LDT_STP_L LDT_RS T_L

32K_X1

32K_X2

RTCCLK

VDDBT_RTC_G

W2

PAD

TF3

W1 W3 W4 Y1

V2

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5

PAR

AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

C1

C2

D2 B2 B1

PAD

FCH_RTCX1

FCH_RTCX2

+RTCVCC_R

PCICLK1 <16> PCICLK2 <16> PCICLK3 <16> PCICLK4 <16>

TF4

PCI_AD23

PCI_AD23 <16>

PCI_AD24

PCI_AD24 <16>

PCI_AD25

PCI_AD25 <16>

PCI_AD26

PCI_AD26 <16>

PCI_AD27

PCI_AD27 <16>

TF12

TF13

RF11 10K_0402_5%RF11 10K_0402_5%

APU_LDT_STP# < 7> FCH_PROCHOT# <7>

APU_PWRGD <7>

LDT_RST# <7>

SUSCLK <17>

RF50 510_0402_5%RF50 510_0402_5%

W=20mils

1

2

1 2

RF43 0_0402_5%RF43 0_0402_5%

1 2

RF44 22_0402_5%RF44 22_0402_5%

1 2

RF45 0_0402_5%@RF45 0_0402_5%@

1 2

LPC_LAD0 <17,25> LPC_LAD1 <17,25> LPC_LAD2 <17,25> LPC_LAD3 <17,25>

LPC_LFRAME# <17,25>

IRQ_SERIRQ <17>

1 2

CF23

CF23 1U_0402_6.3V4Z

1U_0402_6.3V4Z

CLK_DEBUG_PORTCLK_DEBUG_PORT_R

RF45 footprint short

+RTCVCC

12

CMOS1

@CMOS1

@

SHORT PADS

for Clear CMOS

APU_PWRGD

LPCCLK0 <16>

CLK_PCI_EC <17>

32.768KHZ_12.5PF_9H03200413

RF46 0_0402_5%@RF46 0_0402_5%@

FDV301N_NL_SOT23-3~D

1 2

+1.8VS +3VS

10K_0402_5%

G

2

13

D

S

D

S

QF2

CLK_DEBUG_PORT <16>

CLK_DEBUG_PORT_1CLK_DEBUG_PORT

Close to SB

CF24

22P_0402_50V8J

12

XF1

3

OSC

NC

2

OSC

NC

CF25

12

22P_0402_50V8J

12

RF24

CLK_DEBUG_PORT_1 <25>

FCH_RTCX1

4

1

FCH_RTCX2

APU_PWRGD_CORE <40>

Link to Power IC

RF51

RF51 20M_0603_5%

20M_0603_5%

1 2

CF19

0.1U_0402_16V7K

PCIE_RST#

A_RST#

100K_0402_5%

0.1U_0402_16V7K

12

RF31

@

it can be swap if need

A A

5

+3VALW

12

5

UF25

2

P

B

PLT_RST#

4

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

RF32 0_0402_5%

12

@

PLT_RST# <17,21,25>

4

RF reserved

@CF83

@

10P_0402_50V8J

SUSCLK

CF83

1

2

Compal Secret Dat a

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31

Compal Secret Dat a

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

UMI,PCIE,CLK,PCI,LPC,RTC,CPU

LA-7161P

1

of

13 43Wednesday, January 05, 2011

of

13 43Wednesday, January 05, 2011

of

13 43Wednesday, January 05, 2011

1.0

5

+3VALW

1 2

RF57 10K_0402_5%RF57 10K_0402_5%

1 2

RF52 10K_0402_5%RF52 10K_0402_5%

1 2

RF59 10K_0402_5%RF59 10K_0402_5%

1 2

RF53 10K_0402_5%RF53 10K_0402_5%

1 2

RF60 10K_0402_5%RF60 10K_0402_5%

D D

C C

B B

RF reserved

1 2

RF61 10K_0402_5%RF61 10K_0402_5%

1 2

RF55 10K_0402_5%RF55 10K_0402_5%

1 2

RF62 10K_0402_5%RF62 10K_0402_5%

1 2

RF63 10K_0402_5%RF63 10K_0402_5%

+3VS

1 2

RF64 10K_0402_5%RF64 10K_0402_5%

1 2

RF65 10K_0402_5%RF65 10K_0402_5%

1 2

RF66 4.7K_0402_5%RF66 4.7K_0402_5%

1 2

RF67 2.2K_0402_5%RF67 2.2K_0402_5%

1 2

RF68 2.2K_0402_5%RF68 2.2K_0402_5%

1 2

RF71 10K_0402_5%RF71 10K_0402_5%

1 2

RF73 10K_0402_5%RF73 10K_0402_5%

1 2

RF74 10K_0402_5%RF74 10K_0402_5%

1 2

RF76 10K_0402_5%RF76 10K_0402_5%

1 2

RF78 10K_0402_5%RF78 10K_0402_5%

@

1 2

RF79 10K_0402_5%

1 2

RF80 10K_0402_5%RF80 10K_0402_5%

1 2

RF81 10K_0402_5%RF81 10K_0402_5%

1 2

RF82 2.2K_0402_5%RF82 2.2K_0402_5%

@

1 2

RF83 10K_0402_5%

@

1 2

RF84 10K_0402_5%

HDA_SYNC HDA_BITCLK

1

CF81

CF81 10P_0402_50V8J

10P_0402_50V8J

2

@

USB_OC2#

USB_OC1#

USB_OC0#

FCH_SIC

FCH_SID

PCIE_WAKE#

EC_LID_OUT#

GBE_PHY_INTR

GBE_MDIO

CLKREQ_LAN#

CLKREQ_WLAN#

NB_PWRGD

SMB_FCH_CK0

SMB_FCH_DA0

SCL2

SDA2

GBE_COL

GBE_CRS

GBE_RXERR

PEG_CLKREQ#_R

SMB_FCH_CK1

SMB_FCH_DA1

EC_RSMRST#

FCH_HDA_BITCLK

FCH_HDA_SDIN0

1

CF82

CF82 33P_0402_50V8J

33P_0402_50V8J

2

RF Change to 33PF

HDA_BITCLK<24> HDA_SDOUT<24>

FCH_HDA_SDIN0<24>

FCH_HDA_SDOUT<16>

HDA_SYNC<24>

4

J2 K1

AC_OK#

QF3

AD21 AE21

AC19

AD19 AA16 AB21 AC18 AF20 AE19 AF19 AD22 AE22

AH21 AB18

AA20

AJ21

D3

F1

H1

F2 H5 G6

B3 C4

F6

K2

J29

H2

J1 H6

F3

J6

G1

F5

F4

E1

H4 D5 D7 G5

K3

H3 D1

E4 D4

E8

F7

E7

F8

M3 N1

L2 M2 M1 M4 N2

P2

T1

T4

L6

L5

T9 U1 U3

T2 U2

T5

V5

P5 M5

P9

T7

P7 M7

P4 M9

V7

E23 E24 F21

G29

D27

F28 F29 E27

SIO_SLP_S3#<17>

SIO_SLP_S5#<17> PBTN_OUT#<17> EC_FCH_PWROK<17>

GATEA20<17> KB_RST#<17> SIO_EXT_SCI#<17> SIO_EXT_SMI#<17>

PCIE_WAKE#<17,21,25>

APU_THERMTRIP#<7>

EC_RSMRST#<17>

CLKREQ_LAN#<21>

FCH_SPKR<24>

SMB_FCH_CK0<10,11>

SMB_FCH_DA0<10,11>

CLKREQ_WW AN#<25> CLKREQ_WLAN#<25>

EC_LID_OUT#<17>

RF70 33_0402_5%RF70 33_0402_5%

1 2

RF72 33_0402_5%RF72 33_0402_5%

1 2

FCH_HDA_SDIN0

RF75 33_0402_5%RF75 33_0402_5%

1 2

RF77 33_0402_5%RF77 33_0402_5%

HDA_RST#<24>

1 2

ACIN< 17,34>

SIO_SLP_S3# SIO_SLP_S5# PBTN_OUT# EC_FCH_PWROK

TF8 PADTF8 PAD TF5 PADTF5 PAD TF6 PADTF6 PAD

TF9

PAD

EC_RSMRST#

CLKREQ_LAN#

FCH_SPKR SMB_FCH_CK0 SMB_FCH_DA0

CLKREQ_WW AN# CLKREQ_WLAN#

PEG_CLKREQ#_R

TF16

PAD

USB_OC2#<23> USB_OC1#<23> USB_OC0#<23>

TF14

PAD

TF15

PAD

TF11

PAD

ACIN

SSM3K7002FU_SC70-3

GATEA20 KB_RST# SIO_EXT_SCI# SIO_EXT_SMI#

PCIE_WAKE#

NB_PWRGD

SMB_FCH_CK1 SMB_FCH_DA1

EC_LID_OUT#

FCH_HDA_BITCLK FCH_HDA_SDOUT

FCH_HDA_SYNC FCH_HDA_RST#

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR

13

D

2

G

S

3

UF1A

PCI_PME_L/GEVENT4_L RI_L/GEVENT22_L SPI_CS3_L/GBE_STAT1/GEVENT21_L SLP_S3_L SLP_S5_L PWR_BTN_L PWR_GOOD SUS_STAT_L TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0_L KBRST_L/GEVENT1_L LPC_PME_L/GEVENT3_L LPC_SMI_L/GEVENT23_L GEVENT5_L SYS_RESET_L/GEVENT19_L WAKE_L/GEVENT8_L IR_RX1/GEVENT20_L THRMTRIP_L/SMBALERT_L/GEVENT2_L NB_PWRGD

RSMRST_L

CLK_REQ4_L/SATA_IS0_L/GPIO64 CLK_REQ3_L/SATA_IS1_L/GPIO63 SMARTVOLT1/SATA_IS2_L/GPIO50 CLK_REQ0_L/SATA_IS3_L/GPIO60 SATA_IS4_L/FANOUT3/GPIO55 SATA_IS5_L/FANIN3/GPIO59 SPKR_GPIO66 SCL0_GPIO43 SDA0_GPIO47 SCL1_GPIO227 SDA1_GPIO228 CLK_REQ2_L/FANIN4_GPIO62 CLK_REQ1_L/FANOUT4_GPIO61 IR_LED_L/LLB_L/GPIO184 SMARTVOLT2/SHUTDOWN_L/GPIO51 DDR3_RST_L/GEVENT7_L GBE_LED0/GPIO183 GBE_LED1/GEVENT9_L GBE_LED2/GEVENT10_L GBE_STAT0/GEVENT11_L CLK_REQG_L/GPIO65_OSCIN

BLINK/USB_OC7_L/GEVENT18_L USB_OC6_L/IR_TX1/GEVENT6_L USB_OC5_L/IR_TX0/GEVENT17_L USB_OC4_L/IR_RX0/GEVENT16_L USB_OC3_L/AC_PRES/TDO/GEVENT15_L USB_OC2_L/TCK/GEVENT14_L USB_OC1_L/TDI/GEVENT13_L USB_OC0_L/TRST_L/GEVENT12_L

HD AUDIO

AZ_BITCL K AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST_L

GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST_L GBE_PHY_INTR

PS2_DAT/SDA4/GPIO187 PS2_CLK/SCL4/GPIO188 SPI_CS2_L/GBE_STAT2/GPIO166 FC_RST_L/GPO160

PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

HD AUDIO

GBE LAN

ACPI/WAKE UP EVENTS

GPIO

USB OC

USB MISC

USBCLK/14M_25M_48M_OSC

USB_RCOMP

USB 1.1

USB_FSD1P/GPIO186

USB_FSD1N

USB_FSD0P/GPIO185

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB 2.0

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199 EC_PWM3/EC_TIMER3/GPIO200

KSI_0/GPIO201

KSI_1/GPIO202

EMBEDDED CTRL

KSI_2/GPIO203

KSI_3/GPIO204

KSI_4/GPIO205

KSI_5/GPIO206

KSI_6/GPIO207

KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

2

A10

USB_PCOMP

G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

PAD

RF58 11.8K_0402_1%RF58 11.8K_0402_1%

1 2

SCL2 SDA2

TF7

USB20_P9 <20> USB20_N9 <20>

USB20_P8 <22> USB20_N8 <22>

USB20_P5 <25> USB20_N5 <25>

USB20_P4 <25> USB20_N4 <25>

USB20_P2 <23> USB20_N2 <23>

USB20_P1 <23> USB20_N1 <23>

USB20_P0 <26> USB20_N0 <26>

FCH_SIC <7>

FCH_SID <7>

EC_PWM2 <16> EC_PWM3 <16>

Camera

Card Reader

MiniCard- WWAN

MiniCard- WLAN

USB Port 2

USB Port 1 (Sub-board)

USB Port 0 (Sub-board)

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Dat a

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

USB,GPIO,GLAN,HDA

LA-7161P

1

14 43Wednesday, January 05, 2011

1.0

of

14 43Wednesday, January 05, 2011