Compal LA-7161P Schematics Rev1.0

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COMPAL CONFIDENTIAL

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1 1

PCB NO :

BOM P/N :

LA-7161P (DAZ0I800100)

4319AS31L01

MODEL NAME :

PLM00

4319AS31L02 4319AS31L03 4319AS31L04 4319AS31L05 4319AS31L06

Andros MLK

4319AS31L07 4319AS31L08

2 2

AMD APU (Ontario/Zacate) -FT1 + FCH Hudson-M1

2011-01-05

REV : 1.0(A00)

3 3

@ : Nopop Component WWAN@: WWAN function

CONN@: Connector only Z@ : Zacate O@ : Ontario

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

A

B

C

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Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-7161P

143Wednesday, January 05, 2011

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GPP PCIE1

WWAN

LVDS

TMDS

VGA

Page 25

GPP

LPC BUS

AMD Brazos APU

FT1 BGA 413-Ball 19mm x 19mm

Page 7,8,9

UMI

Hudson M1

BGA 605-Ball 23mm x 23mm

Page 12,13,14,15,16

DDR3 BUS

1.5V DDRIII 1066

USB2.0

USB port2

USB port0,1

USB port4

USB port5

USB port6

USB port8

USB port9

DDR3-SO-DIMM X2

Page 10, 11

Single Channel DDRIII 800~1066MHz

USB conn.

USB conn. x 2

Sub/B & Page 26

Mini Card WLAN

Mini Card WWAN

Bluetooth conn.

CardBus Realtek RTS5138

Camera

Page 23

Page 25

Page 22

Page 20

SIM conn.

Page 25

7 in 1 conn.

Page 22

LVDS conn.

HDMI conn.

1 1

CRT conn.

Page 20

Page 18

Page 19

PCI Express

GPP PCIE2

LAN Atheros AR8152

Page 21

Mini Card

WLAN

GPP PCIE3

Mini Card

Page 25

RJ45 conn.

Page 21

2 2

Clock Generator

FCH Internal CKG

DC/DC

3 3

(Power Control)

Page 13

Page 28

Power Button

Sub/B

EC

ENE KB926QFE0

BATT IN &OTP

Page 32

DC IN & DECTOR

Page 33

T/P conn.

Page 29

CHARGER

Page 34

4 4

Page 17

Int. KBD

Page 17

SPI ROM

Page 12

AZ-Audio I/F

CODEC Realtek ALC259

Page 24

Audio Jack x 2

Digital MIC

Sub/B

Camera side

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

LA-7161P

243Wednesday, January 05, 2011

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1

POWER SEQUENCE

D D

VIN

B+

+3VALW,+5VALW

+1.1VALW

ON/OFFBTN#

EC->FCH

FCH->EC

EC->PWR

EC_RSMRST#

PBTN_OUT#

SIO_SLP_S5#

SYSON

+1.5V

FCH->EC

EC->PWR

C C

SIO_SLP_S3#

SUSP#

+3VS,+5VS,+0.75VS

NOTE1

T1

T2

T3

T4

T1>10ms, +3VALW to RSMRST#

T2>100ms, RSMRST# to PBTN_OUT#

T3>100ns, PBTN_OUT# to SLP_S5#

T4>10ms, SLP_S5# to SYSON

The same with SLP_S5#

T5

T5>10ms, SYSON to SUSP#

+1.8VS

+1.1VS

EC->PWR

PWR->EC

EC->FCH

FCH->APU

FCH->DEVICE

B B

FCH->APU

VR_ON

+APU_CORE +APU_COREP_NB

VGATE

EC_FCH_PWROK

KB_RST#

APU_PWRGD

A_RST#

LDT_RST#

T6

NOTE2

T7

T8

T9

T6>100ms, SUSP# to VR_ON

T7>50ms, VGATE to EC_FCH_PWROK

98ms>T8>150ms, EC_FCH_PWROK to APU_PWRGD

101ms>T9>113ms, EC_FCH_PWROK to A_RST#

NOTE1: RSMRST# rise time(10% to 90%)<50ms

fail time<1ms

NOTE2: EC_FCH_PWROK rise time(10% to 90%)<50ms

fail time<1ms

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

POWER SEQUENCE

LA-7161P

343Wednesday, January 05, 2011

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C C

B B

Voltage Rails

Power Plane Description

VIN

B+

+APU_CORE

+APU_CORE_NB 1.0V switched power rail ON OFF

+1.5V

+0.75VS 0.75VS swit ched power rail for DDR termina tor

+1.05VS

+1.1VS 1.1VS switched power rail ON OFF OFF

+1.8VS 1.8V switched power rail

+3VALW

+3V_LAN 3.3V power ra il for LAN ON ON(WOL) OFF

+3VS

+5VALW

+5VS

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OF F.

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Adapter power supply ( 19V)

AC or battery power rail for power circuit.

Core voltage for CPU (0.7-1.2V)

1.5V power rail for CPU VDDIO and DDRIII

1.05V swit ched power rai l for NB VDDC & VGA

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH

LOW

LOWLOWLOW

HIGHHIGHHIGH

HIGH

S1 S3 S5

N/A N/A N/A

ON OFF

OFF

ON

OFF

ON OFF OFF

OFF

ON

ON ON*

ON

OFF

ON

OFF

ON ON*ON+1.1VALW 1.1V always on power rail

ON

OFF

ON

OFF

ON

N/AN/AN/A

OFF

ON*

OFFON

ONONON

ON ON

ON

OFF

LOW

OFF

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1

A A

2 3 4 5 6 7 NC

5

100K +/- 5%Ra

Rb V min

AD_BID

00 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

V typ

AD_BID

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

4

V

max

AD_BID

0 V 0.155 V

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

EC AD3

0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

3

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

0.4

0.5

Title

Power Rails

Size Document Number Rev

Date: Sheet

2

Date: Sheet

LA-7161P

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443Wednesday, January 05, 2011

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443Wednesday, January 05, 2011

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443Wednesday, January 05, 2011

1

5

4

3

2

1

1K

D D

Ontario

Zacate

P3

APU_ SIC

P4

APU_ SID

1K

2.2K

+3VS

MMBT3904

SMBUS Address [TBD]

2.2K

AD22

SMB_FCH_CK0

AE22

C C

SMB_FCH_DA0

10K

GND

10K

F5

SMB_FCH_CK1

F4

Hudson

SMB_FCH_DA1

10K

GND

10K

D25

SCL2

F23

SDA2

10K

+3VALW

202

200

202

200

8

7

JDIMMA

JDIMMB

UT7 (NB_Thermal)

SMBUS Address [TBD]

10K

B26

FCH_SIC

E26

B B

FCH_SID

0R @

4.7K

77

78

EC_SMB_CK1

EC_SMB_DA1

100R

KB 926

79

EC_SMB_CK2

80

EC_SMB_DA2

A A

+5VALW

PJBATT

7

(BattERy conn)

6

2.2K

SMBUS Address [TBD]

+3VS

0R @

WWAN_SMB_CK_R

WWAN_SMB_DA_R

WWAN_SMB_CK_R

WWAN_SMB_DA_R

LAN_SMB_CK_R

LAN_SMB_DA_R

30

32

30

32

30

32

JWLAN1

JWWAN1

UL10 (LAN)

SMBUS Address [TBD]

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SMBus Topology

LA-7161P

543Wednesday, January 05, 2011

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Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra

Rb V min

00 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

AD_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

V typ

AD_BID

0 V 0.155 V

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

V

AD_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

max

EC AD3

0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

A

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

0.4

0.5

USB PORT#

0

1

2

3

4

DESTINATION

USB Port 0 (Sub-board)

USB Port 1 (Sub-board)

USB Port 2

None

MiniCard- WLAN

SMBUS Control Table

SOURCE

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_SMBCLK PCH_SMBDATA PCH

MEM_SMBCLK MEM_SMBDATA

KB926

PCH

MIINI1 BATT SODIMM

X X

VV

MINI2

V

XX

X

XX

EXPRESS CARD

X

XX X

V

XX

X

V

CLKOUT

PCI0

PCI1

PCI2

PCI3

PCI4

USB

DESTINATION

None

PCICLK1

PCICLK2

PCICLK3

PCICLK4

5

6

7

8

9

10

11

12

13

1 1

MiniCard- WWAN

None

Card Reader

Camera

None

APU

CLK

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

DESTINATIONDIFFERENTIAL

10/100 LAN

MINI CARD- WLAN

MINI CARD- WWAN

None

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

DESTINATION

HDD1

None

PCI EXPRESS

Port0

Port1

Port2

Port3

FCH

DESTINATION

None

WWAN

10/100

WLAN

CLKOUT_PCIE5

CLKOUT_PCIE6

CLKOUT_PCIE7

CLKOUT_PCIE8

None

Symbol Note :

: means Digital Ground

: means Analog Ground

SATA5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2010/07/31 2011/07/31

None

Compal Secret Data

Deciphered Date

PCI EXPRESS

Port0

Port1

Port2

Port3

DESTINATION

None

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-7161P

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643Wednesday, January 05, 2011

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+1.8VS

RU1 1K_0402_5%RU1 1K_0402_5%

1 2

RU4 300_0402_5%RU4 300_0402_5%

1 2

RU5 1K_0402_5%RU5 1K_0402_5%

1 2

RU2 1K_0402_5%RU2 1K_0402_5%

1 2

RU6 300_0402_5%

1 2

RU7 300_0402_5%RU7 300_0402_5%

1 2

RU8 510_0402_1%RU8 510_0402_1%

D D

1 2

RU10 1K_0402_5%RU10 1K_0402_5%

1 2

RU35 1K_0402_5%RU35 1K_0402_5%

APU_LDT_STP#

DBREQ#

APU_SVC

APU_SVD

LDT_RST#

APU_PWRGD

TEST_25_L

TEST_36

TEST_35

12

HDMI_TXD2P<18> HDMI_TXD2N<18>

HDMI_TXD1P<18> HDMI_TXD1N<18>

HDMI_TXD0P<18> HDMI_TXD0N<18>

HDMI_CLKP<18> HDMI_CLKN<18>

Enable HDMI output

+3VS

RU16 1K_0402_5%RU16 1K_0402_5%

1 2

RU18 1K_0402_5%RU18 1K_0402_5%

1 2

RU19 1K_0402_5%RU19 1K_0402_5%

1 2

RU20 1K_0402_5%RU20 1K_0402_5%

1 2

RU21 1K_0402_5%RU21 1K_0402_5%

1 2

RU30 1K_0402_5%RU30 1K_0402_5%

RU32 1K_0402_5%RU32 1K_0402_5%

RU34 510_0402_5%RU34 510_0402_5%

1 2

@

RU36 1K_0402_5%

AMD check list Ver 1.02 Delete 1K pulldown requirement for TEST15

C C

B B

A A

AMD check list Ver 1.03

+5VS

use 2k pull up to +5V.

RU14 2K_0402_1%RU14 2K_0402_1%

1 2

RU15 2K_0402_1%RU15 2K_0402_1%

1 2

RU23 2K_0402_1%RU23 2K_0402_1%

1 2

RU26 2K_0402_1%RU26 2K_0402_1%

1 2

RU22 100K_0402_5%RU22 100K_0402_5%

1 2

+3VS

@QU1A

@

2N7002KDWH_SOT363-6

@QU1B

@

2N7002KDWH_SOT363-6

UU1

O@

S IC ONTARIO CMC50AFPB22GT 1G BGA A31!

SA00004KD1L

APU_PROCHOT#

APU_ALERT#_R

APU_SIC

APU_SID

APU_THERMTRIP#_R

12

RU41

RU41 10K_0402_5%

10K_0402_5%

@

2

QU1A

5

QU1B

1 2

RU49 0_0402_5%@RU49 0_0402_5%@

RU45 0_0402_5%@RU45 0_0402_5%@

TEST_18

TEST_19

TEST_25_H

TEST_15

HDMIDAT_UMA

HDMICLK_UMA

LDDC_DATA_MCH

LDDC_CLK_MCH

LTDP0_HPD

EC_SMB_DAAPU_SID FCH_SID

61

1 2

34

EC_SMB_CKAPU_SIC

RU43 0_0402_5%RU43 0_0402_5%

RU44 0_0402_5%RU44 0_0402_5%

RU46 0_0402_5%RU46 0_0402_5%

RU47 0_0402_5%RU47 0_0402_5%

footprint short

Connection to EC, FCH input need to pull-down

2N7002KDW

Vgs(th): min 1.0V

1 2

footprint short

1 2

Typ 1.6V Max 2.5V ESD 2KV

EC_SMB_DA2

FCH_SIC

EC_SMB_CK2

Link to Power IC

LDT_RST#<13> APU_PWRGD<13>

RU24 footprint short

APU_ALERT#<17>

APU_ALERT#_FCH<12>

APU_VDDNB_RUN_FB_H<40> APU_VDD0_RUN_FB_H<40>

APU_VDD0_RUN_FB_L<40>

Link to Power IC

FCH_PROCHOT#<13>

FCH_SID <14>

EC_SMB_DA2 <17,21,25>

FCH_SIC <14>

EC_SMB_CK2 <17,21,25>

4

CU1 0.1U_0402_16V7KCU1 0.1U_0402_16V7K

1 2

CU3 0.1U_0402_16V7KCU3 0.1U_0402_16V7K

1 2

CU4 0.1U_0402_16V7KCU4 0.1U_0402_16V7K

1 2

CU5 0.1U_0402_16V7KCU5 0.1U_0402_16V7K

1 2

CU6 0. 1U_0402_16V7KCU6 0. 1U_0402_16V7K

1 2

CU7 0. 1U_0402_16V7KCU7 0. 1U_0402_16V7K

1 2

CU2 0.1U_0402_16V7KCU2 0.1U_0402_16V7K

1 2

CU8 0.1U_0402_16V7KCU8 0.1U_0402_16V7K

1 2

LVDS_A2+<20> LVDS_A2-<20>

LVDS_A1+<20> LVDS_A1-<20>

LVDS_A0+<20> LVDS_A0-<20>

LVDS_ACLK+<20> LVDS_ACLK-<20>

CLK_APU<13> CLK_APU#<13>

CLK_APU_DP<13> CLK_APU_DP#<13>

APU_SVC<40>

APU_SVD<40>

RU24 0_0402_5%@RU24 0_0402_5%@

1 2

RU25 0_0402_5%@RU25 0_0402_5%@

1 2

Close to APU

TU13PADTU13PAD TU14PADTU14PAD

TU12PADTU12PAD

1 2

RU38 0_0402_5%@RU38 0_0402_5%@

footprint short

T0 FCH

TO EC

T0 FCH

TO EC

HDMI_TXD2P_C HDMI_TXD2N_C

HDMI_TXD1P_C HDMI_TXD1N_C

HDMI_TXD0P_C HDMI_TXD0N_C

HDMI_CLKP_C HDMI_CLKN_C

APU_SIC APU_SID

APU_PROCHOT#

APU_THERMTRIP#_R

APU_ALERT#_R

APU_TDI APU_TDO APU_TCLK APU_TMS APU_TRST# DBRDY DBREQ#

APU_PROCHOT#

UU1B

A8

TDP1_TXP0

B8

TDP1_TXN0

B9

TDP1_TXP1

A9

TDP1_TXN1

D10

TDP1_TXP2

C10

TDP1_TXN2

A10

TDP1_TXP3

B10

TDP1_TXN3

B5

LTDP0_TXP0

A5

LTDP0_TXN0

D6

LTDP0_TXP1

C6

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

D8

LTDP0_TXP3

C8

LTDP0_TXN3

V2

CLKIN_H

V1

CLKIN_L

D2

DISP_CLKIN_H

D1

DISP_CLKIN_L

J1

SVC

J2

SVD

P3

SIC

P4

SID

T3

RESET_L

T4

PWROK

U1

PROCHOT_L

U2

THERMTRIP_L

T2

ALERT_ L

N2

TDI

N1

TDO

P1

TCK

P2

TMS

M4

TRST_L

M3

DBRDY

M1

DBREQ_L

F4

VDDCR_NB_SENSE

G1

VDDCR_CPU_SENSE

F3

VDDIO_MEM_S_SENSE

F1

VSS_SENSE

B4

RSVD_1

W11

RSVD_2

V5

RSVD_3

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

DISPLAYPORT 1

DISPLAYPORT 0

CLK

SER

JTAG CTRL

SA00004KG1L

3

RU3 150_0402_1%RU3 150_0402_1%

1 2

ENBKL <20> ENVDD <20> NB_LCD_PWM <20>

HDMIDAT_UMA <18>

HDMI_HPD <18>

LDDC_CLK_MCH <20>

RU9 100K_0402_5%@RU9 100K_0402_5%@

1 2

VGA_CRT_HSYNC <19> VGA_CRT_VSYNC <19>

VGA_DDC_CLK <19>

RU17 499_0402_1%RU17 499_0402_1%

1 2

TEST_4 TEST_5

TEST_14 TEST_15 TEST_16

TEST_17 TEST_18 TEST_19 TEST_25_H TEST_25_L TEST_28_H TEST_28_L TEST_31 TEST_33_H TEST_33_L TEST_34_H TEST_34_L TEST_35 TEST_36 TEST_37

APU_LDT_STP#

If FCH internal pull-up disabled, level-shifter could be deleted. Need BIOS to disable internal pull-up!!

+1.8VS+1.8VS

footprint short

0_0402_5%

RU53

@RU53

@

1 2

RU54 10K_0402_5%RU54 10K_0402_5%

RU55 10K_0402_5%RU55 10K_0402_5%

RU56 10K_0402_5%RU56 10K_0402_5%

HDMICLK_UMA <18>

LDDC_DATA_MCH <20>

12

VGA_DDC_DATA <19>

PAD

TU1

PAD

TU2

PAD

TU3

PAD

TU4

PAD

TU5

PAD

TU6

PAD

TU7

PAD

TU8

PAD

TU9

PAD

TU10

PAD

TU11

APU_LDT_STP# <13>

APU_THERMTRIP#_R

APU_TRST#_RAPU_TRST#

12

DP MISC

TEST

DAC_GREENB

VGA DAC

DMAACT IVE_L

1K_0402_5%

DP_ZVSS

DP_BLON

DP_DIGON

DP_VARY_ BL

TDP1_AUXP

TDP1_AUXN

TDP1_HPD

LTDP0_AUXP LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_REDB

DAC_GREEN

DAC_BLUE

DAC_BLUEB

DAC_HSYNC DAC_VSYNC

DAC_SCL DAC_SDA

DAC_ZVSS

TEST4 TEST5

TEST6 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19

TEST25_H TEST25_L TEST28_H TEST28_L

TEST31

TEST33_H TEST33_L TEST34_H TEST34_L

TEST35 TEST36 TEST37

TEST38

RU48

H3

G2 H2 H1

B2 C2

C1

A3 B3

LTDP0_HPD

D3

C12

RU11 150_0402_1%RU11 150_0402_1%

D13 A12

RU12 150_0402_1%RU12 150_0402_1%

B12 A13

RU13 150_0402_1%RU13 150_0402_1%

B13

E1 E2

F2 D4

D12

R1 R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5

K3 T1

1 2

2

VGA_CRT_R <19>

VGA_CRT_G <19>

VGA_CRT_B <19>

CU9 0.1U_0402_16V4ZCU9 0.1U_0402_16V4Z

1 2

CU10 0.1U_0402_16V4ZCU10 0.1U_0402_16V4Z

1 2

RU40

RU40 1K_0402_5%

1K_0402_5%

1 2

+'7&211(&725 $0'$38'(%8*3257

JU1

CONN@JU1

CONN@

1

3

5

7

9

11

13

15

17

19

SAMTE_ASP-136446-07-B

RU27 51_0402_1%RU27 51_0402_1%

1 2

RU28 51_0402_1%RU28 51_0402_1%

1 2

+3VS

12

RU39

RU39 10K_0402_5%

10K_0402_5%

B

2

E

3 1

C

QU2

QU2 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

RU42 0_0402_5%

1 2

@

APU_TCLK

2

APU_TMS

4

APU_TDI

6

APU_TDO

8

APU_PWRGD

10

LDT_RST#

12

DBRDY

14

DBREQ#

16

J108_PLLTST0

18

J108_PLLTST1

20

RU50 1K_0402_5%RU50 1K_0402_5%

RU51 1K_0402_5%RU51 1K_0402_5%

RU52 1K_0402_5%RU52 1K_0402_5%

12

1 2

RU57 300_0402_5%RU57 300_0402_5%

1 2

RU58 0_0402_5%@RU58 0_0402_5%@

1 2

RU59 0_0402_5%@RU59 0_0402_5%@

footprint short

APU_THERMTRIP# <14>

+1.8VS

TEST_19

TEST_18

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Dat a

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

DISPLAY,CLK,JTAG

LA-7161P

1

1.0

743Wednesday, January 05, 2011

1.0

5

DDR_D[0..63]<10,11> DDR_DQS#[0..7]<10,11> DDR_DQS[0..7]<10,11>

DDR_DM[0..7]<10,11> DDR_MA[0..15]<10,11>

UU1E

DDR_MA0 DDR_MA1 DDR_MA2

D D

DDR_BS0<10,11> DDR_BS1<10,11> DDR_BS2<10,11>

C C

DDR_A_CLK0<10> DDR_A_CLK0#<10> DDR_A_CLK1<10> DDR_A_CLK1#<10> DDR_B_CLK0<11> DDR_B_CLK0#<11> DDR_B_CLK1<11> DDR_B_CLK1#<11>

DDR_RST#<10,11> DDR_EVENT#<10,11>

DDR_CKE0<10,11> DDR_CKE1<10,11>

DDR_A_ODT0<10> DDR_A_ODT1<10>

B B

DDR_B_ODT0<11> DDR_B_ODT1<11>

DDR_A_CS0#<10> DDR_A_CS1#<10> DDR_B_CS0#<11> DDR_B_CS1#<11>

DDR_RAS#<10,11> DDR_CAS#<10,11> DDR_WE#<10,11>

DDR_MA3 DDR_MA4 DDR_MA5 DDR_MA6 DDR_MA7 DDR_MA8 DDR_MA9 DDR_MA10 DDR_MA11 DDR_MA12 DDR_MA13 DDR_MA14 DDR_MA15

DDR_BS0 DDR_BS1 DDR_BS2

DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7

DDR_DQS0 DDR_DQS#0 DDR_DQS1 DDR_DQS#1 DDR_DQS2 DDR_DQS#2 DDR_DQS3 DDR_DQS#3 DDR_DQS4 DDR_DQS#4 DDR_DQS5 DDR_DQS#5 DDR_DQS6 DDR_DQS#6 DDR_DQS7 DDR_DQS#7

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1# DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1#

DDR_RST# DDR_EVENT#

DDR_CKE0 DDR_CKE1

DDR_A_ODT0 DDR_A_ODT1 DDR_B_ODT0 DDR_B_ODT1

DDR_A_CS0# DDR_A_CS1# DDR_B_CS0# DDR_B_CS1#

DDR_RAS# DDR_CAS# DDR_WE#

UU1E

R17

M_ADD0

H19

M_ADD1

J17

M_ADD2

H18

M_ADD3

H17

M_ADD4

G17

M_ADD5

H15

M_ADD6

G18

M_ADD7

F19

M_ADD8

E19

M_ADD9

T19

M_ADD10

F17

M_ADD11

E18

M_ADD12

W17

M_ADD13

E16

M_ADD14

G15

M_ADD15

R18

M_BANK0

T18

M_BANK1

F16

M_BANK2

D15

M_DM0

B19

M_DM1

D21

M_DM2

H22

M_DM3

P23

M_DM4

V23

M_DM5

AB20

M_DM6

AA16

M_DM7

A16

M_DQS_H0

B16

M_DQS_L0

B20

M_DQS_H1

A20

M_DQS_L1

E23

M_DQS_H2

E22

M_DQS_L2

J22

M_DQS_H3

J23

M_DQS_L3

R22

M_DQS_H4

P22

M_DQS_L4

W22

M_DQS_H5

V22

M_DQS_L5

AC20

M_DQS_H6

AC21

M_DQS_L6

AB16

M_DQS_H7

AC16

M_DQS_L7

M17

M_CLK_H0

M16

M_CLK_L0

M19

M_CLK_H1

M18

M_CLK_L1

N18

M_CLK_H2

N19

M_CLK_L2

L18

M_CLK_H3

L17

M_CLK_L3

L23

M_RESET_L

N17

M_EVENT_L

F15

M_CKE0

E15

M_CKE1

W19

M0_ODT0

V15

M0_ODT1

U19

M1_ODT0

W15

M1_ODT1

T17

M0_CS_L0

W16

M0_CS_L1

U17

M1_CS_L0

V16

M1_CS_L1

U18

M_RAS_L

V19

M_CAS_L

V17

M_WE_L

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

DDR SYSTEM MEMORY

M_ZVDDIO_MEM_S

M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7

M_DATA8

M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15

M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23

M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31

M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39

M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47

M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55

M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63

M_VREF

4

DDR_D0

B14

DDR_D1

A15

DDR_D2

A17

DDR_D3

D18

DDR_D4

A14

DDR_D5

C14

DDR_D6

C16

DDR_D7

D16

DDR_D8

C18

DDR_D9

A19

DDR_D10

B21

DDR_D11

D20

DDR_D12

A18

DDR_D13

B18

DDR_D14

A21

DDR_D15

C20

DDR_D16

C23

DDR_D17

D23

DDR_D18

F23

DDR_D19

F22

DDR_D20

C22

DDR_D21

D22

DDR_D22

F20

DDR_D23

F21

DDR_D24

H21

DDR_D25

H23

DDR_D26

K22

DDR_D27

K21

DDR_D28

G23

DDR_D29

H20

DDR_D30

K20

DDR_D31

K23

DDR_D32

N23

DDR_D33

P21

DDR_D34

T20

DDR_D35

T23

DDR_D36

M20

DDR_D37

P20

DDR_D38

R23

DDR_D39

T22

DDR_D40

V20

DDR_D41

V21

DDR_D42

Y23

DDR_D43

Y22

DDR_D44

T21

DDR_D45

U23

DDR_D46

W23

DDR_D47

Y21

DDR_D48

Y20

DDR_D49

AB22

DDR_D50

AC19

DDR_D51

AA18

DDR_D52

AA23

DDR_D53

AA20

DDR_D54

AB19

DDR_D55

Y18

DDR_D56

AC17

DDR_D57

Y16

DDR_D58

AB14

DDR_D59

AC14

DDR_D60

AC18

DDR_D61

AB18

DDR_D62

AB15

DDR_D63

AC15

+M_VREF

M23

RU64 39.2_0402_1%RU64 39.2_0402_1%

M22

1 2

3

UMI_C_TXP [0..3]<13> UMI_C_TXN[0..3]<13>

UMI_C_RXP[0..3]<13> UMI_C_RXN[0..3]<13>

UU1A

AA6

P_GPP_RXP0

Y6

P_GPP_RXN0

PCIE_NRX_WWANTX_P2<25> PCIE_NTX_WW ANRX_P2 <25>

::$1 ::$1

:/$1

PCIE_NRX_WWANTX_N2<25>

PCIE_NRX_LANTX_P0<21> PCIE_NRX_LANTX_N0<21>

/$1

PCIE_NRX_WLANTX_P1<25> PCIE_NTX_WLANRX_P1 <25> PCIE_NRX_WLANTX_N1<25>

RU60 2K_0402_1%RU60 2K_0402_1%

+1.05VS

1 2

+M_VREF

1

CU25

2

0.1U_0402_16V4Z

+1.5V

UMI_C_RXP0 UMI_C_RXN0

UMI_C_RXP1 UMI_C_RXN1

UMI_C_RXP2 UMI_C_RXN2

UMI_C_RXP3 UMI_C_RXN3

1000P_0402_50V7K

AB4

P_GPP_RXP1

AC4

P_GPP_RXN1

AA1

P_GPP_RXP2

AA2

P_GPP_RXN2

Y4

P_GPP_RXP3

Y3

P_GPP_RXN3

Y14

P_ZVDD_10

AA12

P_UMI_RXP0

Y12

P_UMI_RXN0

AA10

P_UMI_RXP1

Y10

P_UMI_RXN1

AB10

P_UMI_RXP2

AC10

P_UMI_RXN2

AC7

P_UMI_RXP3

AB7

P_UMI_RXN3

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

+1.5V

12

RU62

1K_0402_1%

1

CU26

12

RU63

2

RU63

1K_0402_1%

PCIE I/F

UMI I/F

P_GPP_TXP0 P_GPP_TXN0

P_GPP_TXP1 P_GPP_TXN1

P_GPP_TXP2 P_GPP_TXN2

P_GPP_TXP3 P_GPP_TXN3

P_UMI_TXP0 P_UMI_TXN0

P_UMI_TXP1 P_UMI_TXN1

P_UMI_TXP2 P_UMI_TXN2

P_UMI_TXP3 P_UMI_TXN3

P_ZVSS

2

AB6 AC6

PCIE_NTX_WWANRX_P 2_C

AB3

PCIE_NTX_WWANRX_N 2_C

AC3

PCIE_NTX_LANRX_P0_C

Y1

PCIE_NTX_LANRX_N0_C

Y2

PCIE_NTX_WLANRX_P1_C

V3

PCIE_NTX_WLANRX_N1_C

V4

RU61 1.27K_0402_1%RU61 1.27K_0402_1%

AA14

1 2

UMI_TXP0

AB12 AC12

AC11 AB11

AA8 Y8

AB8 AC8

CU17 0.1U_0402_16V7KCU17 0.1U_0402_16V7K

UMI_TXN0

UMI_TXP1 UMI_TXN1

UMI_TXP2 UMI_TXN2

UMI_TXP3 UMI_TXN3

1 2

CU18 0.1U_0402_16V7KCU18 0.1U_0402_16V7K

1 2

CU19 0.1U_0402_16V7KCU19 0.1U_0402_16V7K

1 2

CU20 0.1U_0402_16V7KCU20 0.1U_0402_16V7K

1 2

CU21 0.1U_0402_16V7KCU21 0.1U_0402_16V7K

1 2

CU22 0.1U_0402_16V7KCU22 0.1U_0402_16V7K

1 2

CU23 0.1U_0402_16V7KCU23 0.1U_0402_16V7K

1 2

CU24 0.1U_0402_16V7KCU24 0.1U_0402_16V7K

1 2

CF78 0.1U_0402_16V7KCF78 0.1U_0402_16V7K

1 2

CF79 0.1U_0402_16V7KCF79 0.1U_0402_16V7K

1 2

CU11 0.1U_0402_16V7KCU11 0.1U_0402_16V7K

1 2

CU12 0.1U_0402_16V7KCU12 0.1U_0402_16V7K

1 2

CU13 0.1U_0402_16V7KCU13 0.1U_0402_16V7K

1 2

CU14 0.1U_0402_16V7KCU14 0.1U_0402_16V7K

1 2

UMI_C_TXP0 UMI_C_TXN0

UMI_C_TXP1 UMI_C_TXN1

UMI_C_TXP2 UMI_C_TXN2

UMI_C_TXP3 UMI_C_TXN3

1

PCIE_NTX_WWANRX_N 2 <25>

PCIE_NTX_LANRX_P0 <21> PCIE_NTX_LANRX_N0 <21>

PCIE_NTX_WLANRX_N1 <25>

/$1

:/$1

+1.5V

DDR_EVENT#

DDR_RST#

A A

5

RU67 1K_0402_1%RU67 1K_0402_1%

RU68 1K_0402_1%

@

12

4

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRIII,UMI

LA-7161P

1

843Wednesday, January 05, 2011

of

1.0

5

4

3

2

1

+APU_CORE

UU1C

E5

VDDCR_CPU_1

E6

VDDCR_CPU_2

F5

VDDCR_CPU_3

F7

VDDCR_CPU_4

G6

VDDCR_CPU_5

G8

VDDCR_CPU_6

H5

VDDCR_CPU_7

H7

VDDCR_CPU_8

J6

VDDCR_CPU_9

J8

VDDCR_CPU_10

L7

VDDCR_CPU_11

M6

VDDCR_CPU_12

M8

VDDCR_CPU_13

N7

VDDCR_CPU_14

R8

VDDCR_CPU_15

E8

VDDCR_NB_1

E11

VDDCR_NB_2

E13

VDDCR_NB_3

F9

VDDCR_NB_4

F12

VDDCR_NB_5

G11

VDDCR_NB_6

G13

VDDCR_NB_7

H9

VDDCR_NB_8

H12

VDDCR_NB_9

K11

VDDCR_NB_10

K13

VDDCR_NB_11

L10

VDDCR_NB_12

L12

VDDCR_NB_13

L14

VDDCR_NB_14

M11

VDDCR_NB_15

M12

VDDCR_NB_16

M13

VDDCR_NB_17

N10

VDDCR_NB_18

N12

VDDCR_NB_19

N14

VDDCR_NB_20

P11

VDDCR_NB_21

P13

VDDCR_NB_22

G16

VDDIO_ MEM_S_1

G19

VDDIO_ MEM_S_2

E17

VDDIO_ MEM_S_3

J16

VDDIO_ MEM_S_4

L16

VDDIO_ MEM_S_5

L19

VDDIO_ MEM_S_6

N16

VDDIO_ MEM_S_7

R16

VDDIO_ MEM_S_8

R19

VDDIO_ MEM_S_9

W18

VDDIO_ MEM_S_10

U16

VDDIO_ MEM_S_11

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

Z@

1

CU81

2

10U_0603_6.3V6M

1

CU87

2

1

CU88

2

1U_0402_6.3V6K

CPU CORE

GPU AND NB CORE

POWER

DDR3

CU89

TSense/PLL/DP/PCIE/IO

DAC

VDD_18_DAC

DIS PLL

PCIE/IO/DDR3 Phy

DP Phy/IO

1

2

VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4 VDD_18_5 VDD_18_6 VDD_18_7

VDDPL_10

VDD_10_1 VDD_10_2 VDD_10_3 VDD_10_4

VDD_33

1U_0402_6.3V6K

U8 W8 U6 U9 W6 T7 V7

W9

U11

U13 W13 V12 T12

A4

+VDD_18

CU30

+VDD_18_DAC

CU47

TU15

TU15 PAD

PAD

TU15 near UU1

+VDDL_10

CU55

+VDD_10

CU59

CU71

1

CU37

2

180P_0402_50V8J

1

CU48

2

180P_0402_50V8J

1

CU56

2

180P_0402_50V8J

1

CU60

2

180P_0402_50V8J

1

CU72

2

0.1U_0402_16V7K

1

CU39

CU38

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

CU49

2

10U_0603_6.3V6M

1U_0402_6.3V6K

1

CU57

CU58

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

CU61

CU62

2

0.1U_0402_16V7K

+3VS

1U_0402_6.3V6K

1

CU31

2

1U_0402_6.3V6K

LU2

@LU2

@

0_0805_5%

10U_0603_6.3V6M

1

CU63

2

1U_0402_6.3V6K

1

CU40

CU32

2

1U_0402_6.3V6K

+1.8VS

12

footprint short

FBMA-L11-201209-221LMA30T_0805

1

CU65

CU64

2

1U_0402_6.3V6K

10U_0603_6.3V6M

LU3

@ LU4

@

0_0805_5%

10U_0603_6.3V6M

180P_0402_50V8J

+APU_CORE

+APU_CORE_NB

+1.5V

1

CU80

2

10U_0603_6.3V6M

1

CU86

2

1U_0402_6.3V6K

1

CU36

2

10U_0603_6.3V6M

1

CU44

2

1U_0402_6.3V6K

1

CU53

2

0.1U_0402_16V7K

1

CU69

2

10U_0603_6.3V6M

1

CU76

2

1U_0402_6.3V6K

1

CU85

2

0.1U_0402_16V7K

1

CU28

2

10U_0603_6.3V6M

1U_0402_6.3V6K

1

CU54

2

0.1U_0402_16V7K

1

CU70

2

10U_0603_6.3V6M

1

CU77

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

CU29

2

10U_0603_6.3V6M

1

CU45

2

0.1U_0402_16V7K

10U_0603_6.3V6M

1U_0402_6.3V6K

1

CU33

2

10U_0603_6.3V6M

1

CU46

2

180P_0402_50V8J

1

CU78

CU79

2

180P_0402_50V8J

10U_0603_6.3V6M

1U_0402_6.3V6K

0.1U_0402_16V7K

10U_0603_6.3V6M

1U_0402_6.3V6K

0.1U_0402_16V7K

+1.05VS

1

CU27

2

1

CU43

2

1

CU52

2

1

CU68

2

1

CU75

2

1

CU84

2

1

D D

CU34

2

1

CU41

2

1

CU50

2

+APU_CORE_NB

C C

CU66

CU73

CU82

B B

1

CU35

2

10U_0603_6.3V6M

1

CU42

2

1U_0402_6.3V6K

1

CU51

2

0.1U_0402_16V7K

1

CU67

2

10U_0603_6.3V6M

1

CU74

2

1U_0402_6.3V6K

1

CU83

2

0.1U_0402_16V7K

POWER

+1.8VS

LU1

@ LU1

@

12

0_0805_5%

footprint short

+1.05VS

12

LU4

12

footprint short

UU1D

A7

VSS_1

B7

VSS_2

B11

VSS_3

B17

VSS_4

B22

VSS_5

C4

VSS_6

D5

VSS_7

D7

VSS_8

D9

VSS_9

D11

VSS_10

D14

VSS_11

B15

VSS_12

D17

VSS_13

D19

VSS_14

E7

VSS_15

E9

VSS_16

E12

VSS_17

E20

VSS_18

F8

VSS_19

F11

VSS_20

F13

VSS_21

G4

VSS_22

G5

VSS_23

G7

VSS_24

G9

VSS_25

G12

VSS_26

G20

VSS_27

G22

VSS_28

H6

VSS_29

H11

VSS_30

H13

VSS_31

J4

VSS_32

J5

VSS_33

J7

VSS_34

J20

VSS_35

K10

VSS_36

K14

VSS_37

L4

VSS_38

L6

VSS_39

L8

VSS_40

L11

VSS_41

L13

VSS_42

L20

VSS_43

L22

VSS_44

M7

VSS_45

N4

VSS_46

N6

VSS_47

N8

VSS_48

N11

VSS_49

ZACATE-EME350GBB22GT-1.6G_BGA_A31!

GND

VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97

VSSBG_DAC

N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11

1

+

CU91

CU90

@

+APU_CORE

1

+

CU97

2

330U_D2E_2.5VM_R9M

+APU_CORE_NB

A A

1

+

@

CU111

2

330U_2.5V_M

2

10U_0603_6.3V6M

220U_B2_2.5VM_R35

POWER

1

+

CU98

2

1

+

CU112

2

1

+

CU99

2

330U_D2E_2.5VM_R9M

Near CPU Socket

1

CU114

2

330U_D2_2.5VY_R9M

Near CPU Socket Near CPU Socket

1

@

CU106

2

10U_0603_6.3V6M 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

10U_0603_6.3V6M

+1.5V +1.8VS

1

+

CU109

2

1

CU92

2

POWER POWER

1

CU115

2

330U_2.5V_M

(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)

5

4

1

CU93

2

0.1U_0402_16V7K

22U_0805_6.3V6M

1

CU94

0.1U_0402_16V7K

CU110

1

CU95

2

0.1U_0402_16V7K

1

+

@

CU113

2

330U_2.5V_M

Near CPU Socket

1

CU96

2

180P_0402_50V8J

10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Dat a

Deciphered Dat e

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

P07-FT1 PWR/VSS

LA-7161P

1

943Wednesday, January 05, 2011

of

1.0

5

M1 Circuit

+1.5V

12

RD2

1K_0402_1%

2

CD4

1

+VREF_DQ

+VREF_CA

2

CD5

1

0.1U_0402_16V4Z

2

CD6

1

2

1

0.1U_0402_16V4Z

12

RD3

+1.5V

RD12

2

1

RD3

1K_0402_1%

+1.5V

12

RD11

1K_0402_1%

0.1U_0402_16V4Z

CD3

D D

1K_0402_1%

C C

0.1U_0402_16V4Z

CRB 0.1u X1 4.7u X1

+0.75VS

2

CD18

CD17

B B

CD17

1

0.1U_0402_16V4Z

CD7

1

CD19

2

4.7U_0603_6.3V6K

DDR_DQS#[0..7]<8,11>

DDR_D[0..63]<8,11>

DDR_DM[0..7]<8,11>

DDR_DQS[0..7]<8,11>

DDR_MA[0..15]<8,11>

2

CD8

CD9

1

CD9

1

0.1U_0402_16V4Z

CRB 100U X2

CD20

0.1U_0402_16V4Z

+1.5V

Place near JDIMM1

A A

1

+

2

CD10

1

220U_B2_2.5VM_R35

4

2

CD11

1

0.1U_0402_16V4Z

2

CD12

1

2

CD13

1

0.1U_0402_16V4Z

2

CD14

1

+VREF_DQ

1000P_0402_50V7K

2.2U_0603_6.3V6K

CD1

+3VS

3

1

2

CD2

CD21

0.1U_0402_16V4Z

1

2

DDR_CKE0<8,11>

DDR_BS2<8,11>

DDR_A_CLK0<8> DDR_A_CLK0#<8>

DDR_BS0<8,11>

DDR_WE#<8,11> DDR_CAS#<8,11>

DDR_A_CS1#<8>

1

2

+1.5V +1.5V

DDR_D0 DDR_D1

DDR_DM0

DDR_D2 DDR_D3

DDR_D8 DDR_D9

DDR_DQS#1 DDR_DQS1

DDR_D10 DDR_D11

DDR_D16 DDR_D17

DDR_DQS#2 DDR_DQS2

DDR_D18 DDR_D19

DDR_D24 DDR_D25

DDR_DM3

DDR_D26 DDR_D27

DDR_MA12 DDR_MA9

DDR_MA8 DDR_MA5

DDR_MA3 DDR_MA1

DDR_MA10

DDR_MA13

DDR_D32 DDR_D33

DDR_DQS#4 DDR_DQS4

DDR_D34 DDR_D35

DDR_D40 DDR_D41

DDR_DM5

DDR_D42 DDR_D43

DDR_D48 DDR_D49

DDR_DQS#6 DDR_DQS6

DDR_D50 DDR_D51

DDR_D56 DDR_D57

DDR_DM7

DDR_D58 DDR_D59

RD5 10K_0402_5%RD5 10K_0402_5%

1 2

1

CD22

0.1U_0402_16V4Z

2

12

RD6

RD6 10K_0402_5%

10K_0402_5%

JDIMMA

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

4mm

205

G1

FOX_AS0A626-U4RN-7F

CONN@

2

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

VTT2

A15 A14

A11

CK1

BA1

S0#

SCL

1

2

DDR_D4

4

DDR_D5

6 8

DDR_DQS#0

10

DDR_DQS0

12 14

DDR_D6

16

DDR_D7

18 20

DDR_D12

22

DDR_D13

24 26

DDR_DM1

28 30 32

DDR_D14

34

DDR_D15

36 38

DDR_D20

40

DDR_D21

42 44

DDR_DM2

46 48

DDR_D22

50

DDR_D23

52 54

DDR_D28

56

DDR_D29

58 60

DDR_DQS#3

62

DDR_DQS3

64 66

DDR_D30

68

DDR_D31

70 72

74 76

DDR_MA15

78

DDR_MA14

80 82

DDR_MA11

84

DDR_MA7

86

A7

88

DDR_MA6

90

A6 A4

A2 A0

G2

DDR_MA4

92 94

DDR_MA2

96

DDR_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128

DDR_D36

130

DDR_D37

132 134

DDR_DM4

136 138

DDR_D38

140

DDR_D39

142 144

DDR_D44

146

DDR_D45

148 150

DDR_DQS#5

152

DDR_DQS5

154 156

DDR_D46

158

DDR_D47

160 162

DDR_D52

164

DDR_D53

166 168

DDR_DM6

170 172

DDR_D54

174

DDR_D55

176 178

DDR_D60

180

DDR_D61

182 184

DDR_DQS#7

186

DDR_DQS7

188 190

DDR_D62

192

DDR_D63

194 196 198 200 202 204

206

+0.75VS

DDR_RST# <8,11>

DDR_CKE1 <8,11>

DDR_A_CLK1 <8> DDR_A_CLK1# <8>

DDR_BS1 <8,11> DDR_RAS# <8,11>

DDR_A_CS0# <8> DDR_A_ODT0 <8>

DDR_A_ODT1 <8>

CD15

1000P_0402_50V7K

DDR_EVENT# <8,11>

SMB_FCH_DA0 <11,14>

SMB_FCH_CK0 <11,14>

SP07000J500

+VREF_CA

1

CD16

0.1U_0402_16V4Z

2

REVERSE TYPE

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM A

LA-7161P

1

1.0

10 43Wednesday, January 05, 2011

1.0

of

5

DDR_DQS#[0..7]<8,10>

DDR_D[0..63]<8,10>

2

CD27

1

DDR_DM[0..7]<8,10>

DDR_DQS[0..7]<8,10>

DDR_MA[0..15]<8,10>

0.1U_0402_16V4Z

2

CD28

1

0.1U_0402_16V4Z

2

CD29

1

0.1U_0402_16V4Z

2

CD30

1

2

CD31

1

0.1U_0402_16V4Z

D D

C C

+1.5V

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

CD25

CD26

1

0.1U_0402_16V4Z

CRB 0.1u X1 4,7uX1

+0.75VS

2

CD39

CD40

B B

1

0.1U_0402_16V4Z

Place near JDIMM2

A A

1

2

CD41

2

1

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

2

CD32

1

4

2

CD33

1

0.1U_0402_16V4Z

2

CD34

1

0.1U_0402_16V4Z

3

+1.5V +1.5V

JDIMMB

+VREF_DQ

1

CD42

2

CD23

1

2

1

0.1U_0402_16V4Z

2

DDR_CKE0<8,10>

DDR_BS2<8,10>

DDR_B_CLK0<8> DDR_B_CLK0#<8>

DDR_BS0<8,10>

DDR_WE#<8,10> DDR_CAS#<8,10>

DDR_B_CS1#<8>

1

CD43

2

0.1U_0402_16V4Z

CD24

1000P_0402_50V7K

2

1

CD35

CD36

0.1U_0402_16V4Z

1

+3VS

2.2U_0603_6.3V6K

DDR_D0 DDR_D1

DDR_DM0

DDR_D2 DDR_D3

DDR_D8 DDR_D9

DDR_DQS#1 DDR_DQS1

DDR_D10 DDR_D11

DDR_D16 DDR_D17

DDR_DQS#2 DDR_DQS2

DDR_D19

DDR_D24 DDR_D25

DDR_DM3

DDR_D26 DDR_D27

DDR_MA12 DDR_MA9

DDR_MA8 DDR_MA5

DDR_MA3 DDR_MA1

DDR_MA10

DDR_MA13

DDR_D32 DDR_D33

DDR_DQS#4 DDR_DQS4

DDR_D34 DDR_D35

DDR_D40 DDR_D41

DDR_DM5

DDR_D42 DDR_D43

DDR_D48 DDR_D49

DDR_DQS#6 DDR_DQS6

DDR_D50 DDR_D51

DDR_D56 DDR_D57

DDR_DM7

DDR_D58 DDR_D59

RD9 10K_0402_5%RD9 10K_0402_5%

1 2

RD10 10K_0402_5%RD10 10K_0402_5%

JDIMMB

3 5 7

9 11 13 15 17 19 21 23 25 27

33 35

39 41

45 47 49 51 53 55 57 59

63

67 69

73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

FOX_AS0A626-U8RN-7F

CONN@

2

VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26

CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

4mm

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

1

2

DDR_D4

4

DDR_D5

6 8

DDR_DQS#0

10

DDR_DQS0

12 14

DDR_D6

16

DDR_D7

18 20

DDR_D12

22

DDR_D13

24 26

DDR_DM1

28 30 32

DDR_D14

34

DDR_D15

36 38

DDR_D20

40

DDR_D21

42 44

DDR_DM2

46 48

DDR_D22

50

DDR_D23DDR_D18

52 54

DDR_D28

56

DDR_D29

58 60

DDR_DQS#3

62

DDR_DQS3

64 66

DDR_D30

68

DDR_D31

70 72

74 76

DDR_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_MA14

80 82

DDR_MA11

84

DDR_MA7

86 88

DDR_MA6

90

DDR_MA4

92 94

DDR_MA2

96

DDR_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128

DDR_D36

130

DDR_D37

132 134

DDR_DM4

136 138

DDR_D38

140

DDR_D39

142 144

DDR_D44

146

DDR_D45

148 150

DDR_DQS#5

152

DDR_DQS5

154 156

DDR_D46

158

DDR_D47

160 162

DDR_D52

164

DDR_D53

166 168

DDR_DM6

170 172

DDR_D54

174

DDR_D55

176 178

DDR_D60

180

DDR_D61

182 184

DDR_DQS#7

186

DDR_DQS7

188 190

DDR_D62

192

DDR_D63

194 196 198 200 202 204

206

DDR_RST# <8,10>

DDR_CKE1 <8,10>

1000P_0402_50V7K

+0.75VS

DC020811210

DDR_B_CLK1 <8> DDR_B_CLK1# <8>

DDR_BS1 <8,10> DDR_RAS# <8,10>

DDR_B_CS0# <8> DDR_B_ODT0 <8>

DDR_B_ODT1 <8>

1

CD37

2

DDR_EVENT# <8,10>

SMB_FCH_DA0 <10,14>

SMB_FCH_CK0 <10,14>

+VREF_CA

1

CD38

0.1U_0402_16V4Z

2

REVERSE TYPE

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM B

LA-7161P

1

1.0

of

11 43Wednesday, January 05, 2011

of

11 43Wednesday, January 05, 2011

of

11 43Wednesday, January 05, 2011

5

0.01U_0402_16V7K

+1.1VS

SATA_ACT#_R<26>

1

2

SATA_STX_DRX_P0 SATA_STX_DRX_N0

+3VS

RF15

@ RF15

@

1M_0402_5%

1 2

CF8

@CF8

@

22P_0402_50V8J

0.01U_0402_16V7K

RF5 1K_0402_1%RF5 1K_0402_1%

1 2

RF6 931_0402_1%RF6 931_0402_1%

1 2

SATA_ACT#_R

SATA_STX_DRX_P0<27>

HDD

D D

C C

22P_0402_50V8J

SATA_STX_DRX_N0<27>

25MHZ_20PF_7A25000012

1

CF7

@CF7

@

2

SATA_SRX_DTX_N0<27> SATA_SRX_DTX_P0<27>

@

YF2

1 2

CF5

12

CF6

12

SATA_X1

SATA_X2

PAD

4

SATA_STX_DRX_P0_C SATA_STX_DRX_N0_C

SATA_SRX_DTX_N0 SATA_SRX_DTX_P0

SATA_CALRP SATA_CALRN

RF810K_0402_5% RF810K_0402_5%

12

FCH_SPI_DI FCH_SPI_DO FCH_SPI_CLK FCH_SPI_CS1#

TF1

UF1B

AH9

SATA_TX0P

AJ9

SATA_TX0N

AJ8

SATA_RX0N

AH8

SATA_RX0P

AH10

SATA_TX1P

AJ10

SATA_TX1N

AG10

SATA_RX1N

AF10

SATA_RX1P

AG12

SATA_TX2P

AF12

SATA_TX2N

AJ12

SATA_RX2N

AH12

SATA_RX2P

AH14

SATA_TX3P

AJ14

SATA_TX3N

AG14

SATA_RX3N

AF14

SATA_RX3P

AG17

SATA_TX4P

AF17

SATA_TX4N

AJ17

SATA_RX4N

AH17

SATA_RX4P

AJ18

SATA_TX5P

AH18

SATA_TX5N

AH19

SATA_RX5N

AJ19

SATA_RX5P

AB14

SATA_CALRP

AA14

SATA_CALRN

AD11

SATA_ACT_L/GPIO67

AD16

SATA_X1

AC16

SATA_X2

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO163

K4

SPI_CLK/GPIO162

K9

SPI_CS1_L/GPIO165

G2

ROM_RST_L/GPIO161

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

SERIAL ATA

SPI ROM

3

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE_L/GPIOD145

FC_AVD_L/GPIOD146

FC_WE_L/GPIOD148 FC_CE1_L/GPIOD149 FC_CE2_L/GPIOD150

FC_INT1/GPIOD144

GPIOD

FC_INT2/GPIOD147

FC_ADQ0/GPIOD128

FC_ADQ1/GPIOD129

FC_ADQ2/GPIOD130

FC_ADQ3/GPIOD131

FC_ADQ4/GPIOD132

FC_ADQ5/GPIOD133

FC_ADQ6/GPIOD134

FC_ADQ7/GPIOD135

FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137

FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140 FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

HW MONITOR

FANOUT0/GPIO5 2 FANOUT1/GPIO5 3 FANOUT2/GPIO5 4

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO1 71 TEMPIN1/GPIO1 72 TEMPIN2/GPIO1 73

TEMPIN3/TALERT_L/GPIO174

TEMP_COMM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

NC1 NC2

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

RF7 10K_0402_5%RF7 10K_0402_5%

B6

RF9 10K_0402_5%RF9 10K_0402_5%

A6

RF10 10K_0402_5%RF10 10K_0402_5%

A5 B5 C7

RF12 10K_0402_5%RF12 10K_0402_5%

A3

RF14 10K_0402_5%RF14 10K_0402_5%

B4

RF16 10K_0402_5%RF16 10K_0402_5%

A4

RF17 10K_0402_5%RF17 10K_0402_5%

C5

RF18 10K_0402_5%RF18 10K_0402_5%

A7 B7

RF20 10K_0402_5%@RF20 10K_0402_5%@

B8

RF21 10K_0402_5%RF21 10K_0402_5%

A8

G27 Y2

1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2

1 2 1 2

2

APU_ALERT#_FCH <7>

RF13 10K_0402_5%RF13 10K_0402_5%

1 2

1

B B

UF24

1

CS#

2 3 4

VCC

SO

HOLD#

WP#

SCLK

GND

MX25L1606EM2I-12G_SO8

SI

RF22 10K_0402_5%RF22 10K_0402_5%

8 7

FCH_SPI_CLK_R

6

FCH_SPI_DO

5

1 2

+3VS

FCH_SPI_CS1# FCH_SPI_DI

1 2

RF23

10K_0402_5%

SA000041N00

A A

5

+3VS

1

CF9

2

0.1U_0402_16V7K

4

For RF

FCH_SPI_CLK FCH_SPI_CLK_R

RF27 0_0402_5%RF27 0_0402_5%

12

1

CF80

CF80 33P_0402_50V8J

33P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SATA,SPI,GPIO

LA-7161P

1.0

12 43Wednesday, January 05, 2011

1

1.0

of

5

4

3

2

1

Need confirm with BIOS

150P_0402_50V8J

CF77

PCIE_RST# PCIE_RST#_R

A_RST#

UMI_C_RXP0 UMI_C_RXN0

D D

C C

UMI_C_RXP[0..3]<8> UMI_C_RXN[0..3]<8>

UMI_C_TXP[0..3]<8> UMI_C_TXN[0..3]<8>

CLK_PCIE_WLAN_P<25> CLK_PCIE_WLAN_N<25>

CLK_PCIE_WWAN_P<25> CLK_PCIE_WWAN_N<25>

UMI_C_RXP1 UMI_C_RXN1 UMI_C_RXP2 UMI_C_RXN2 UMI_C_RXP3 UMI_C_RXN3

+1.1VS

CLK_APU_DP<7> CLK_APU_DP#<7>

CLK_APU<7> CLK_APU#<7>

CLK_PCIE_LAN_P<21> CLK_PCIE_LAN_N<21>

Place close to UF1

B B

CF20 33P_0402_50V8JCF20 33P_0402_50V8J

CLK_48M<22>

1 2

RF48 33_0402_5%RF48 33_0402_5%

12

150P_0402_50V8J

CF10

1 2

RF25 33_0402_5%RF25 33_0402_5%

12

CF16 0.1U_0402_16V7KC F16 0. 1U_0402_16V7K

1 2

CF11 0.1U_0402_16V7KC F11 0. 1U_0402_16V7K

1 2

CF12 0.1U_0402_16V7KC F12 0. 1U_0402_16V7K

1 2

CF17 0.1U_0402_16V7KC F17 0. 1U_0402_16V7K

1 2

CF18 0.1U_0402_16V7KC F18 0. 1U_0402_16V7K

1 2

CF13 0.1U_0402_16V7KC F13 0. 1U_0402_16V7K

1 2

CF14 0.1U_0402_16V7KC F14 0. 1U_0402_16V7K

1 2

CF15 0.1U_0402_16V7KC F15 0. 1U_0402_16V7K

1 2

RF26 590_0402_1%RF26 590_0402_1%

1 2

RF28 2K_0402_1%RF28 2K_0402_1%

1 2

RF33 0_0402_5%RF33 0_0402_5%

12

RF34 0_0402_5%RF34 0_0402_5%

12

RF35 0_0402_5%RF35 0_0402_5%

12

RF36 0_0402_5%RF36 0_0402_5%

12

RF37 0_0402_5%RF37 0_0402_5%

1 2

RF38 0_0402_5%RF38 0_0402_5%

1 2

RF39 0_0402_5%RF39 0_0402_5%

1 2

RF40 0_0402_5%RF40 0_0402_5%

1 2

RF41 0_0402_5%RF41 0_0402_5%

1 2

RF42 0_0402_5%RF42 0_0402_5%

1 2

RF Change to 33PF

12

RF47

12

CF21

CF22

12

25MHZ_20PF_7A25000012

12

22P_0402_50V8J

33_0402_5%

12

YF1

UMI_R XP0 UMI_RXN0 UMI_R XP1 UMI_RXN1 UMI_R XP2 UMI_RXN2 UMI_R XP3 UMI_RXN3

UMI_C _TXP0 UMI_C_TXN0 UMI_C _TXP1 UMI_C_TXN1 UMI_C _TXP2 UMI_C_TXN2 UMI_C _TXP3 UMI_C_TXN3

PCIE_CALRP PCIE_CALRN

CLK_APU_DP_R CLK_APU_DP#_R

CLK_APU_R CLK_APU#_R

CLK_PCIE_LAN_P_R CLK_PCIE_L AN_N_R

CLK_PCIE_WLAN_P_R CLK_PCIE_WLAN_N_R

CLK_PCIE_WWAN_P_R CLK_PCIE_W WAN_N_ R

CLK_48M_RCLK_48M

XTAL25_IN

1M_0402_5%

XTAL25_OUT

RF49

UF1E

P1

PCIE_RST_L

L1

A_RST_L

AD26

UMI_TX0P

AD27

UMI_TX0N

AC28

UMI_TX1P

AC29

UMI_TX1N

AB29

UMI_TX2P

AB28

UMI_TX2N

AB26

UMI_TX3P

AB27

UMI_TX3N

AE24

UMI_RX0P

AE23

UMI_RX0N

AD25

UMI_RX1P

AD24

UMI_RX1N

AC24

UMI_RX2P

AC25

UMI_RX2N

AB25

UMI_RX3P

AB24

UMI_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

PCI EXPRESS I/F

CLOCK GENERATOR

PCI CLKS

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

PCI I/F

REQ1_L/GPIO40 REQ2_L/CLK_REQ8_L/GPIO41 REQ3_L/CLK_REQ5_L/GPIO42

GNT3_L/CLK_REQ7_L/GPIO46

LPC

LDRQ1_L/CLK_REQ6_L/GPIO49

SERIRQ/GPIO48

CPU

ALLOW_LDTSTP/DMA_ACTIVE_L

RTC

INTRUDER_ALERT_L

PCICLK0

PCIRST_L

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

CBE0_L CBE1_L CBE2_L CBE3_L

FRAME_L

DEVSEL_L

IRDY_L

TRDY_L

STOP_L PERR_L SERR_L REQ0_L

GNT0_L GNT1_L/GPO44 GNT2_L/GPO45

CLKRUN_L

LOCK_L

INTE_L/GPIO32 INTF_L/GPIO33

INTG_L/GPIO34

INTH_L/GPIO35

LPCCLK0 LPCCLK1

LFRAME_L

LDRQ0_L

PROCHOT_L

LDT_PG

LDT_STP_L LDT_RS T_L

32K_X1

32K_X2

RTCCLK

VDDBT_RTC_G

LAD0 LAD1 LAD2 LAD3

W2

PAD

TF3

W1 W3 W4 Y1

V2

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5

PAR

AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

C1

C2

D2 B2 B1

PAD

FCH_RTCX1

FCH_RTCX2

+RTCVCC_R

PCICLK1 <16> PCICLK2 <16> PCICLK3 <16> PCICLK4 <16>

TF4

PCI_AD23

PCI_AD23 <16>

PCI_AD24

PCI_AD24 <16>

PCI_AD25

PCI_AD25 <16>

PCI_AD26

PCI_AD26 <16>

PCI_AD27

PCI_AD27 <16>

TF12

TF13

RF11 10K_0402_5%RF11 10K_0402_5%

APU_LDT_STP# < 7> FCH_PROCHOT# <7>

APU_PWRGD <7>

LDT_RST# <7>

SUSCLK <17>

RF50 510_0402_5%RF50 510_0402_5%

W=20mils

1

2

1 2

RF43 0_0402_5%RF43 0_0402_5%

1 2

RF44 22_0402_5%RF44 22_0402_5%

1 2

RF45 0_0402_5%@RF45 0_0402_5%@

1 2

LPC_LAD0 <17,25> LPC_LAD1 <17,25> LPC_LAD2 <17,25> LPC_LAD3 <17,25>

LPC_LFRAME# <17,25>

IRQ_SERIRQ <17>

1 2

CF23

CF23 1U_0402_6.3V4Z

1U_0402_6.3V4Z

CLK_DEBUG_PORTCLK_DEBUG_PORT_R

RF45 footprint short

+RTCVCC

12

CMOS1

@CMOS1

@

SHORT PADS

for Clear CMOS

APU_PWRGD

LPCCLK0 <16>

CLK_PCI_EC <17>

32.768KHZ_12.5PF_9H03200413

RF46 0_0402_5%@RF46 0_0402_5%@

FDV301N_NL_SOT23-3~D

1 2

+1.8VS +3VS

10K_0402_5%

G

2

13

D

S

QF2

CLK_DEBUG_PORT < 16>

CLK_DEBUG_PORT_1CLK_DEBUG_PORT

Close to SB

CF24

22P_0402_50V8J

12

XF1

3

OSC

NC

2

OSC

NC

CF25

12

22P_0402_50V8J

12

RF24

CLK_DEBUG_PORT_1 < 25>

FCH_RTCX1

4

1

FCH_RTCX2

APU_PWRGD_CORE <40>

Link to Power IC

RF51

RF51 20M_0603_5%

20M_0603_5%

1 2

CF19

0.1U_0402_16V7K

PCIE_RST#

A_RST#

100K_0402_5%

0.1U_0402_16V7K

12

RF31

@

it can be swap if need

A A

5

+3VALW

12

5

UF25

2

P

B

PLT_RST#

4

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

RF32 0_0402_5%

12

@

PLT_RST# <17,21,25>

4

RF reserved

@CF83

@

10P_0402_50V8J

SUSCLK

CF83

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31

Compal Secret Dat a

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

UMI,PCIE,CLK,PCI,LPC,RTC,CPU

LA-7161P

1

13 43Wednesday, January 05, 2011

of

1.0

5

+3VALW

1 2

RF57 10K_0402_5%RF57 10K_0402_5%

1 2

RF52 10K_0402_5%RF52 10K_0402_5%

1 2

RF59 10K_0402_5%RF59 10K_0402_5%

1 2

RF53 10K_0402_5%RF53 10K_0402_5%

1 2

RF60 10K_0402_5%RF60 10K_0402_5%

D D

C C

B B

RF reserved

1 2

RF61 10K_0402_5%RF61 10K_0402_5%

1 2

RF55 10K_0402_5%RF55 10K_0402_5%

1 2

RF62 10K_0402_5%RF62 10K_0402_5%

1 2

RF63 10K_0402_5%RF63 10K_0402_5%

+3VS

1 2

RF64 10K_0402_5%RF64 10K_0402_5%

1 2

RF65 10K_0402_5%RF65 10K_0402_5%

1 2

RF66 4.7K_0402_5%RF66 4.7K_0402_5%

1 2

RF67 2.2K_0402_5%RF67 2.2K_0402_5%

1 2

RF68 2.2K_0402_5%RF68 2.2K_0402_5%

1 2

RF71 10K_0402_5%RF71 10K_0402_5%

1 2

RF73 10K_0402_5%RF73 10K_0402_5%

1 2

RF74 10K_0402_5%RF74 10K_0402_5%

1 2

RF76 10K_0402_5%RF76 10K_0402_5%

1 2

RF78 10K_0402_5%RF78 10K_0402_5%

@

1 2

RF79 10K_0402_5%

1 2

RF80 10K_0402_5%RF80 10K_0402_5%

1 2

RF81 10K_0402_5%RF81 10K_0402_5%

1 2

RF82 2.2K_0402_5%RF82 2.2K_0402_5%

@

1 2

RF83 10K_0402_5%

@

1 2

RF84 10K_0402_5%

HDA_SYNC HDA_BITCLK

1

CF81

CF81 10P_0402_50V8J

10P_0402_50V8J

2

@

USB_OC2#

USB_OC1#

USB_OC0#

FCH_SIC

FCH_SID

PCIE_WAKE#

EC_LID_OUT#

GBE_PHY_INTR

GBE_MDIO

CLKREQ_LAN#

CLKREQ_WLAN#

NB_PWRGD

SMB_FCH_CK0

SMB_FCH_DA0

SCL2

SDA2

GBE_COL

GBE_CRS

GBE_RXERR

PEG_CLKREQ#_R

SMB_FCH_CK1

SMB_FCH_DA1

EC_RSMRST#

FCH_HDA_BITCLK

FCH_HDA_SDIN0

1

CF82

CF82 33P_0402_50V8J

33P_0402_50V8J

2

RF Change to 33PF

HDA_BITCLK<24> HDA_SDOUT<24>

FCH_HDA_SDIN0<24>

FCH_HDA_SDOUT<16>

HDA_SYNC<24>

4

J2 K1

AC_OK#

QF3

AD21 AE21

AC19

AD19 AA16 AB21 AC18 AF20 AE19 AF19 AD22 AE22

AH21 AB18

AA20

AJ21

D3

F1

H1

F2 H5 G6

B3 C4

F6

K2

J29

H2

J1 H6

F3

J6

G1

F5

F4

E1

H4 D5 D7 G5

K3

H3 D1

E4 D4

E8

F7

E7

F8

M3 N1

L2 M2 M1 M4 N2

P2

T1

T4

L6

L5

T9 U1 U3

T2 U2

T5

V5

P5 M5

P9

T7

P7 M7

P4 M9

V7

E23 E24 F21

G29

D27

F28 F29 E27

SIO_SLP_S3#<17>

SIO_SLP_S5#<17> PBTN_OUT#<17> EC_FCH_PWROK<17>

GATEA20<17> KB_RST#<17> SIO_EXT_SCI#<17> SIO_EXT_SMI#<17>

PCIE_WAKE#<17,21,25>

APU_THERMTRIP#<7>

EC_RSMRST#<17>

CLKREQ_LAN#<21>

FCH_SPKR<24>

SMB_FCH_CK0<10,11>

SMB_FCH_DA0<10,11>

CLKREQ_WW AN#<25> CLKREQ_WLAN#<25>

EC_LID_OUT#<17>

RF70 33_0402_5%RF70 33_0402_5%

1 2

RF72 33_0402_5%RF72 33_0402_5%

1 2

FCH_HDA_SDIN0

RF75 33_0402_5%RF75 33_0402_5%

1 2

RF77 33_0402_5%RF77 33_0402_5%

HDA_RST#<24>

1 2

ACIN< 17,34>

SIO_SLP_S3# SIO_SLP_S5# PBTN_OUT# EC_FCH_PWROK

TF8 PADTF8 PAD TF5 PADTF5 PAD TF6 PADTF6 PAD

TF9

PAD

EC_RSMRST#

CLKREQ_LAN#

FCH_SPKR SMB_FCH_CK0 SMB_FCH_DA0

CLKREQ_WW AN# CLKREQ_WLAN#

PEG_CLKREQ#_R

TF16

PAD

USB_OC2#<23> USB_OC1#<23> USB_OC0#<23>

TF14

PAD

TF15

PAD

TF11

PAD

ACIN

SSM3K7002FU_SC70-3

GATEA20 KB_RST# SIO_EXT_SCI# SIO_EXT_SMI#

PCIE_WAKE#

NB_PWRGD

SMB_FCH_CK1 SMB_FCH_DA1

EC_LID_OUT#

FCH_HDA_BITCLK FCH_HDA_SDOUT

FCH_HDA_SYNC FCH_HDA_RST#

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR

13

D

2

G

S

3

UF1A

PCI_PME_L/GEVENT4_L RI_L/GEVENT22_L SPI_CS3_L/GBE_STAT1/GEVENT21_L SLP_S3_L SLP_S5_L PWR_BTN_L PWR_GOOD SUS_STAT_L TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0_L KBRST_L/GEVENT1_L LPC_PME_L/GEVENT3_L LPC_SMI_L/GEVENT23_L GEVENT5_L SYS_RESET_L/GEVENT19_L WAKE_L/GEVENT8_L IR_RX1/GEVENT20_L THRMTRIP_L/SMBALERT_L/GEVENT2_L NB_PWRGD

RSMRST_L

CLK_REQ4_L/SATA_IS0_L/GPIO64 CLK_REQ3_L/SATA_IS1_L/GPIO63 SMARTVOLT1/SATA_IS2_L/GPIO50 CLK_REQ0_L/SATA_IS3_L/GPIO60 SATA_IS4_L/FANOUT3/GPIO55 SATA_IS5_L/FANIN3/GPIO59 SPKR_GPIO66 SCL0_GPIO43 SDA0_GPIO47 SCL1_GPIO227 SDA1_GPIO228 CLK_REQ2_L/FANIN4_GPIO62 CLK_REQ1_L/FANOUT4_GPIO61 IR_LED_L/LLB_L/GPIO184 SMARTVOLT2/SHUTDOWN_L/GPIO51 DDR3_RST_L/GEVENT7_L GBE_LED0/GPIO183 GBE_LED1/GEVENT9_L GBE_LED2/GEVENT10_L GBE_STAT0/GEVENT11_L CLK_REQG_L/GPIO65_OSCIN

BLINK/USB_OC7_L/GEVENT18_L USB_OC6_L/IR_TX1/GEVENT6_L USB_OC5_L/IR_TX0/GEVENT17_L USB_OC4_L/IR_RX0/GEVENT16_L USB_OC3_L/AC_PRES/TDO/GEVENT15_L USB_OC2_L/TCK/GEVENT14_L USB_OC1_L/TDI/GEVENT13_L USB_OC0_L/TRST_L/GEVENT12_L

HD AUDIO

AZ_BITCL K AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST_L

GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST_L GBE_PHY_INTR

PS2_DAT/SDA4/GPIO187 PS2_CLK/SCL4/GPIO188 SPI_CS2_L/GBE_STAT2/GPIO166 FC_RST_L/GPO160

PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

HD AUDIO

GBE LAN

ACPI/WAKE UP EVENTS

GPIO

USB OC

USB MISC

USBCLK/14M_25M_48M_OSC

USB_RCOMP

USB 1.1

USB_FSD1P/GPIO186

USB_FSD1N

USB_FSD0P/GPIO185

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB 2.0

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199 EC_PWM3/EC_TIMER3/GPIO200

KSI_0/GPIO201

KSI_1/GPIO202

EMBEDDED CTRL

KSI_2/GPIO203

KSI_3/GPIO204

KSI_4/GPIO205

KSI_5/GPIO206

KSI_6/GPIO207

KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

2

A10

USB_PCOMP

G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

PAD

RF58 11.8K_0402_1%RF58 11.8K_0402_1%

1 2

SCL2 SDA2

TF7

USB20_P9 <20> USB20_N9 <20>

USB20_P8 <22> USB20_N8 <22>

USB20_P5 <25> USB20_N5 <25>

USB20_P4 <25> USB20_N4 <25>

USB20_P2 <23> USB20_N2 <23>

USB20_P1 <23> USB20_N1 <23>

USB20_P0 <26> USB20_N0 <26>

FCH_SIC <7>

FCH_SID <7>

EC_PWM2 <16> EC_PWM3 <16>

Camera

Card Reader

MiniCard- WWAN

MiniCard- WLAN

USB Port 2

USB Port 1 (Sub-board)

USB Port 0 (Sub-board)

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Dat a

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

USB,GPIO,GLAN,HDA

LA-7161P

1

14 43Wednesday, January 05, 2011

1.0

of

14 43Wednesday, January 05, 2011

A

+3VS

2

1

CF34

CF27

2

22U_0805_6.3V6M

1 1

+1.8VS

RF87

@RF87

@

1 2

0_0603_5%

footprint short

+1.1VS

LF3

FBMA-L11-201209-221LMA30T_0805

2 2

LF4

+3VALW

FBMA-L11-201209-221LMA30T_0805

+1.1VALW

3 3

LF4

LF6

FBMA-L11-160808-221LMT_2P

GPIO I/F implemented: tied to +1.8V_S0 GPIO I/F not implemented: tied to

+1.8V_S0 or 0 ohm to ground

12

RF88

0_0402_5%

@

LF2

+3VS

12

LF2

FBMA-L11-160808-221LMT_2P

1

CF47

2

22U_0805_6.3V6M

1

CF56

CF55

2

10U_0603_6.3V6M

2

1

0.1U_0402_16V7K

2

CF44

1

4.7U_0603_6.3V6K

12

1

CF48

2

1U_0402_6.3V6K

CF36

CF35

CF33

1

0.1U_0402_16V7K

+VDDIO_18_FC

2

CF45

1

0.1U_0402_16V7K

+VDDPL33_PCIE

1

CF46

2

+PCIE_VDDAN

2.2U_0603_6.3V6K

2

CF50

CF49

1

0.1U_0402_16V7K

+VDDPL_33_SATA

+AVDD_SATA

1354.2mA

+AVDD_USB

1

CF58

CF57

2

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CF63

2

534.5mA

1

CF59

2

1U_0402_6.3V6K

0.1U_0402_16V7K

+VDDAN_11_USB

2

88.6mA

CF64

1

0.1U_0402_16V7K

2.2U_0603_6.3V6K

42mA

0.16mA

22.5mA

1115.6mA

15.5mA

B

POWER

UF1C

AH1

VDDIO_33_PCIGP_1

V6

VDDIO_33_PCIGP_2

Y19

VDDIO_33_PCIGP_3

AE5

VDDIO_33_PCIGP_4

AC21

VDDIO_33_PCIGP_5

AA2

VDDIO_33_PCIGP_6

AB4

VDDIO_33_PCIGP_7

AC8

VDDIO_33_PCIGP_8

AA7

VDDIO_33_PCIGP_9

AA9

VDDIO_33_PCIGP_10

AF7

VDDIO_33_PCIGP_11

AA19

VDDIO_33_PCIGP_12

AF22

VDDIO_18_FC_1

AE25

VDDIO_18_FC_2

AF24

VDDIO_18_FC_3

AC22

VDDIO_18_FC_4

AE28

VDDPL_33_PCIE

U26

VDDAN_11_PCIE_1

V22

VDDAN_11_PCIE_2

V26

VDDAN_11_PCIE_3

V27

VDDAN_11_PCIE_4

V28

VDDAN_11_PCIE_5

V29

VDDAN_11_PCIE_6

W22

VDDAN_11_PCIE_7

W26

VDDAN_11_PCIE_8

AD14

VDDPL_33_SATA

AJ20

VDDAN_11_SATA_1

AF18

VDDAN_11_SATA_4

AH20

VDDAN_11_SATA_2

AG19

VDDAN_11_SATA_3

AE18

VDDAN_11_SATA_5

AD18

VDDAN_11_SATA_6

AE16

VDDAN_11_SATA_7

A18

VDDAN_33_USB_S_1

A19

VDDAN_33_USB_S_2

A20

VDDAN_33_USB_S_3

B18

VDDAN_33_USB_S_4

B19

VDDAN_33_USB_S_5

B20

VDDAN_33_USB_S_6

C18

VDDAN_33_USB_S_7

C20

VDDAN_33_USB_S_8

D18

VDDAN_33_USB_S_9

D19

VDDAN_33_USB_S_10

D20

VDDAN_33_USB_S_11

E19

VDDAN_33_USB_S_12

C11

VDDAN_11_USB_S_1

D11

VDDAN_11_USB_S_2

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

POWER

PCI/GPIO I/O

FLASH I/O

PCI EXPRESS

SERIAL ATA

USB I/O

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDRF_GBE_S

VDDIO_33_GBE_S

GBE LAN

VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2

VDDIO_GBE_S_1 VDDIO_GBE_S_2

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

CORE S5CORE S0 CLKGEN I/O 3.3V_S5 I/O

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

VDDPL_33_SYS

PLL

VDDPL_11_SYS_S

VDDPL_33_USB_S

VDDAN_33_HWM_S

VDDXL_33_S

C

979.4mA

N13 R15 N17 U13 U17 V12 V18 W12 W18

+VDDAN_11_CLK

K28 K29 J28 K26 J21 J20 K21 J22

V1

M10

L7 L9

M6 P8

49.5mA

A21 D21 B21 K10 L10 J9 T6 T8

F26 G26

15.3mA

M8

58mA

A11 B11

46.5mA

M21

65.3mA

L22

16.1mA

F19

11.4mA

D6

+VDDXL_33_S

L20

5mA

1

CF28

2

1

CF40

2

165.2mA

+VDDIO_AZ

+VDDCR_11_USB

+VDDPL33

+VDDPL11

+AVDD_USB

+VDDAN33_HWM

CF65

1

CF37

2

0.1U_0402_16V7K

382.9mA

1

CF32

2

0.1U_0402_16V7K

1

CF51

2

1

CF53

2

1

FBMA-L11-160808-221LMT_2P

2

2.2U_0603_6.3V6K

D

+1.1VS

1

CF38

CF29

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

CF42

CF41

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

CF52

2

2.2U_0603_6.3V6K

1

CF54

2

1U_0402_6.3V6K

LF7

12

1

CF39

2

1U_0402_6.3V6K

10U_0603_6.3V6M

LF1

1

CF43

2

1U_0402_6.3V6K

+3VALW

+1.1VALW

1

CF60

2

0.1U_0402_16V7K

+3VS

LF1

FBMA-L11-201209-221LMA30T_0805

22U_0805_6.3V6M

1

CF61

CF62

2

0.1U_0402_16V7K

12

LF5

FBMA-L11-201209-221LMA30T_0805

1

2

10U_0603_6.3V6M

+1.1VS

12

+1.1VALW

+1.1VS

CF30

E

1

+

2

330U_D2_2.5VY_R9M

1

CF31

2

10U_0603_6.3V6M

+AVDD_SATA

1

CF70

2

0.1U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

A

12

+VDDPL_33_SATA

+VDDPL11

+VDDPL33

+1.1VS

+3VALW

AMD: HWM not Implemented or HWM balls used as GPIOs: Bead not used.

LF9

+3VS

+1.1VALW

FBMA-L11-160808-221LMT_2P

4 4

+3VS

FBMA-L11-160808-221LMT_2P

LF9

FBMA-L11-160808-221LMT_2P

CF71 2.2U_0603_6.3V6KCF71 2.2U_0603_6.3V6K

1 2

LF10

CF73 2.2U_0603_6.3V6KCF73 2.2U_0603_6.3V6K

1 2

LF13

CF76 2.2U_0603_6.3V6KCF76 2.2U_0603_6.3V6K

1 2

LF8

LF11

@

1 2

0_0603_5%

12

FBMA-L11-201209-221LMA30T_0805

footprint short

1

CF67

CF66

1

CF74

2

@

B

2

22U_0805_6.3V6M

1U_0402_6.3V6K

+VDDAN33_HWM

2

CF75

1

AMD: balls used as GPIOs: Decoupled with at least one (1) 0.1-ȝF ceramic capacitor

0.1U_0402_16V7K

2.2U_0603_6.3V6K

1

CF69

CF68

2

1U_0402_6.3V6K

+VDDIO_AZ +3VALW

footprint short

1 2

RF89 0_0603_5%@RF89 0_0603_5%@

1

CF72

2.2U_0603_6.3V6K

2

2010/07/31 2011/07/31

C

1 2

RF90 0_0603_5%@RF90 0_0603_5%@

For 3V AZ device

Compal Secret Data

Deciphered Date

+1.5V

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

FCH PWR

LA-7161P

15 43Wednesday, January 05, 2011

E

1.0

of

5

UF1D

Y14

VSSIO_SATA_1

Y16

VSSIO_SATA_2

AB16

VSSIO_SATA_3

AC14

VSSIO_SATA_4

AE12

VSSIO_SATA_5

AE14

VSSIO_SATA_6

AF9

VSSIO_SATA_7

AF11

VSSIO_SATA_8

AF13

VSSIO_SATA_9

AF16

VSSIO_SATA_10

AG8

VSSIO_SATA_11

AH7

VSSIO_SATA_12

AH11

D D

C C

B B

VSSIO_SATA_13

AH13

VSSIO_SATA_14

AH16

VSSIO_SATA_15

AJ7

VSSIO_SATA_16

AJ11

VSSIO_SATA_17

AJ13

VSSIO_SATA_18

AJ16

VSSIO_SATA_19

A9

VSSIO_USB_1

B10

VSSIO_USB_2

K11

VSSIO_USB_3

B9

VSSIO_USB_4

D10

VSSIO_USB_5

D12

VSSIO_USB_6

D14

VSSIO_USB_7

D17

VSSIO_USB_8

E9

VSSIO_USB_9

F9

VSSIO_USB_10

F12

VSSIO_USB_11

F14

VSSIO_USB_12

F16

VSSIO_USB_13

C9

VSSIO_USB_14

G11

VSSIO_USB_15

F18

VSSIO_USB_16

D9

VSSIO_USB_17

H12

VSSIO_USB_18

H14

VSSIO_USB_19

H16

VSSIO_USB_20

H18

VSSIO_USB_21

J11

VSSIO_USB_22

J19

VSSIO_USB_23

K12

VSSIO_USB_24

K14

VSSIO_USB_25

K16

VSSIO_USB_26

K18

VSSIO_USB_27

H19

VSSIO_USB_28

Y4

EFUSE

D8

VSSAN_HWM

M19

VSSXL

P21

VSSIO_PCIECLK_1

P20

VSSIO_PCIECLK_2

M22

VSSIO_PCIECLK_3

M24

VSSIO_PCIECLK_4

M26

VSSIO_PCIECLK_5

P22

VSSIO_PCIECLK_6

P24

VSSIO_PCIECLK_7

P26

VSSIO_PCIECLK_8

T20

VSSIO_PCIECLK_9

T22

VSSIO_PCIECLK_10

T24

VSSIO_PCIECLK_11

V20

VSSIO_PCIECLK_12

J23

VSSIO_PCIECLK_13

218-0792006 A13-HUDSON-M1_FCBGA605 A31!

GND

VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27

Net Name

PCI_AD27

PCI_AD26

PCI_AD25

A A

PCI_AD24

PCI_AD23

0 : Bypass internal PLL clock

1 : Use internal PLL-generated PLL CLK

0 : ILA auto run enable

1 : ILA auto run disable

0 : Bypass internal FC Clk

1 : Use internal PLL FC Clk

0 : Getting the value from I2C EPROM

1 : Disable I2C ROM

0 : Reserved

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52

VSSPL_SYS

Description



AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20



1 : Required setting (use ROMTYPE straps to determine the ROM type)

5

4



1(('&+(&.

4

3

+3VS +3VS +3VS +3VS +3VS +3VS +3VS

12

RF91

10K_0402_5%

@

EC_PWM3<14>

EC_PWM2<14>

PCICLK1<13>

PCICLK2<13>

PCICLK3<13>

PCICLK4<13>

FCH_HDA_SDOUT<14>

LPCCLK0<13>

CLK_DEBUG_PORT<13>

@

RF100

@ RF100

@

2.2K_0402_5%

12

RF92

10K_0402_5%

@

RF101

2.2K_0402_5%

12

RF93

10K_0402_5%

12

RF102

10K_0402_5%

@

Watchdog timer on NB_PWRGD enable for pull-up disable for pull-down 20100527

CLK_PCI_EC_R

RF94

10K_0402_5%

@

RF103

10K_0402_5%

Net Name

2

12

10K_0402_5%

12

10K_0402_5%

+3VALW

RF95

RF104

@

12

10K_0402_5%

12

10K_0402_5%

RF96

RF105

@

12

@ RF97

@

10K_0402_5%

12

10K_0402_5%

RF97

RF106

12

RF98

10K_0402_5%

@

RF107

RF107 10K_0402_5%

10K_0402_5%

12

RF99

RF99 10K_0402_5%

10K_0402_5%

12

10K_0402_5%

Description

0 : Integrated Microcontroller (IMC) Disabled

RF108

@

1

+3VALW

12

1 : Integrated Microcontroller (IMC) Enabled

EC_PWM3 EC_PWM2ROM TYPE

EC_PWM3

PCI_AD23<13>

PCI_AD24<13>

PCI_AD25<13>

PCI_AD26<13>

PCI_AD27<13>

RF109 2.2K_0402_5%@ RF109 2.2K_0402_5%@

RF110 2.2K_0402_5%@ RF110 2.2K_0402_5%@

RF111 2.2K_0402_5%@ RF111 2.2K_0402_5%@

RF112 2.2K_0402_5%@ RF112 2.2K_0402_5%@

RF113 2.2K_0402_5%@ RF113 2.2K_0402_5%@

12

EC_PWM2

CLK_DEBUG_PORT

PCICLK1

PCICLK2

PCICLK3

PCICLK4

HDA_SDOUT_R

x

xx

0

0 : External clock mode.

1 : Integrated clock mode.

0 : Force PCIe interface at Gen I mode.

1 : PCIe interface is at Gen II mode.

0 : Disable the boot fail timer function.

1 : Enable the boot fail timer function.

0 : Disable Debug Straps.

1 : Select external Debug Straps.

0 : Required setting for integrated clock mode.

1 : Reserved.

0 : Required setting for integrated clock mode.

1 : Reserved (Hudson-1 does not support

SPI ROM

0



Reserved

0

LPC ROM

x



the lower power mode).

Security Classification

Issued Date



Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

GND

LA-7161P

1

1.0

16 43Wednesday, January 05, 2011

1.0

of

A

+3VALW

12

47K_0402_5%

RE8

EC_RST#

1 1

0.1U_0402_16V7K

+3VALW

RE14 10K_0402_5%@ RE14 10K_0402_5%@

RE15 10K_0402_5%RE15 10K_0402_5%

RE16 47K_0402_5%RE16 47K_0402_5%

RE17 47K_0402_5%RE17 47K_0402_5%

RE31 10K_0402_5%RE31 10K_0402_5%

RE32 150K_0402_5%RE32 150K_0402_5%

CE8

1 2

2

1

EC_MUTE#

LID_SW#

KSO1

KSO2

MSEN#

ACIN_EC

Change RE32 to 150K

2 2

+5VALW

1 2

RE18 4.7K_0402_5%RE18 4.7K_0402_5%

1 2

RE19 4.7K_0402_5%RE19 4.7K_0402_5%

+3VS

1 2

RE23 2.2K_0402_5%RE23 2.2K_0402_5%

1 2

RE24 2.2K_0402_5%RE24 2.2K_0402_5%

+3VS

1 2

RE26 4.7K_0402_5%RE26 4.7K_0402_5%

3 3

CE12

27P_0402_50V8J

FOR EC 128KB SPI ROM (150mil PACKAGE) SA00002C100

4 4

CE27 0.1U_0402_16V4ZCE27 0.1U_0402_16V4Z

footprint short

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

BT_RADIO_OFF#

1 2

RE20 20M_0603_5%@ RE20 20M_0603_5%@

32.768KHZ_12.5P_1TJE125DP1A000M

1 2

1

2

12

1 2 1 2

XE1

RE370_0402_5% @RE370_0402_5% @

SPI_CS#FSEL#SPICS#

RE380_0402_5% @ RE380_0402_5% @

1

2

+3VALW

A

XCLKI

XCLKO

CE13

CE13 27P_0402_50V8J

27P_0402_50V8J

UE1

1

CS#

2

DO

3

WP#

4

GND

MX25L2005CMI-12G SOP

CLK_PCI_EC

For RF

ON/OFF_EC#

CE29

0.1U_0402_16V7K

Place close to EC (For ESD request)

20mils

8

VCC

7

HOLD#

6

CLK

5

DIO

12

1

2

0.1U_0402_16V7K

Place close to EC (For ESD request)

2

1

12

@RE41

@

100K_0402_5%

HOLD#FRD#SPI_SO SPI_SO

SPI_CLK_R

RE2

@ RE2

@

10_0402_5%

CE7

@ CE7

@

22P_0402_50V8J

PLT_RST#

SUSCLK

RE41

12

RE36

RE36 10K_0402_5%

10K_0402_5%

1 2

LPC_LFRAME#<13,25>

SIO_EXT_SCI#<14>

CE25

CAM_ON/OFF #<20>

ON/OFF_EC#<29> PWR_LED#<26>

GATEA20<14> KB_RST#<14>

IRQ_SERIRQ<13>

LPC_LAD3<13,25> LPC_LAD2<13,25> LPC_LAD1<13,25> LPC_LAD0<13,25>

CLK_PCI_EC<13> PLT_RST#<13,21,25>

2

1

EC_SMB_CK1<32> EC_SMB_DA1<32> EC_SMB_CK2<7,21,25> EC_SMB_DA2<7,21,25>

SIO_SLP_S3#<14> SIO_SLP_S5#<14> SIO_EXT_SMI#<14> APU_ALERT#<7> BT_RADIO_OFF#<25>

FAN_SPEED1<27>

EC_TX<25> EC_RX<25>

SUSCLK<13>

RE400_0402_5% @RE400_0402_5% @

B

+3VALW

1

2

4.7U_0603_6.3V6K

GATEA20 KB_RST# IRQ_SERIRQ LPC_LFRAME# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

CLK_PCI_EC PLT_RST# EC_RST# SIO_EXT_SCI#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SIO_SLP_S3# SIO_SLP_S5# SIO_EXT_SMI# APU_ALERT# BT_RADIO_OFF#

INVT_PW M<20>

INVT_PW M FAN_SPEED1 CAM_ON/OFF # EC_TX EC_RX ON/OFF_EC# PWR_LED#

@

1 2

R858 0_0402_5%

For RF

1

2

FWR#SPI_SISPI_SI

footprint short

B

CE2

0.1U_0402_16V7K

CE2

0.1U_0402_16V7K

CE1

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

XCLKI XCLKO

1 2

CE28

@CE28

@

10P_0402_50V8J

0.1U_0402_16V7K

CE3

0.1U_0402_16V7K

CE3

0.1U_0402_16V7K

1

2

UE20

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO0 8

16

LID_SW# /GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GP IO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

SPI_CLKSPI_CLK_R

RE390_0402_5% RE390_0402_5%

CE4

1

2

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

C

1

CE5

0.1U_0402_16V7K

2

ECAGND

67

AVCC

INVT_PW M/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GP IO43

DAC_BRIG/D A0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3 E

DA3/GPIO3F

PSCLK1/GPIO4 A PSDAT1/GPIO4B PSCLK2/GPIO4 C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SEL IO#/GPIO50

BATT_CHGI_ LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03

EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

AGND

KB926QFE0_LQFP128

69

ECAGND

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

V18R

0.1U_0402_16V7K

EC_PWROK_FCH

LE1

FBMA-L11-160808-601LMT_2P

1

CE6

4.7U_0603_6.3V6K

2

RE3 0_0402_5%RE3 0_0402_5%

BEEP# USB_PWR_EN# ACOFF

BATT_TEMP

ADP_I AD_BID MSEN# VGATE

EN_DFAN1 IREF CHGVADJ

EC_MUTE# USB_EN#

USB_DET#_DELAY TP_CLK TP_DATA

EN_WOL#

LID_SW#

FRD#SPI_SO FWR#SPI_SI SPI_CLK FSEL#SPICS#

WLAN_RADIO_OFF# PS_ID FSTCHG EN_INVPWR PWRSHARE_OE# BATT_LOW_LED# LCD_TEST SYSON VR_ON

DE2

12

RB751V-40_SOD323-2

EC_RSMRST# EC_LID_OUT# EC_ON

EC_PWROK_FCH BKOFF# WWAN_RADIO_OFF# LCD_VCC_TEST_EN PSID_DISABLE#

EC_ENBKL EC_EAPD

SUSP# PBTN_OUT# PCIE_WAKE#

V18R

1

CE11

2

RE25

@RE25

@

0_0402_5%

1 2

CE11

4.7U_0603_6.3V6K

2

CE10

footprint short

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

D

+3VALW

12

BEEP# <24> USB_PWR_EN# <23> ACOFF <33,34>

BATT_TEMP <32>

ADP_I <34>

MSEN# <19>

VGATE <40>

EN_DFAN1 <27> IREF <34> CHGVADJ <34>

EC_MUTE# <24> USB_EN# <23>

USB_DET#_DELAY <23>

EN_WOL# <28>

LID_SW# < 29>

WLAN_RADIO_OFF# <25> PS_ID <33>

FSTCHG <34> EN_INVPWR <20> PWRSHARE_OE# <23> BATT_LOW_LED# <26> LCD_TEST <20> SYSON <38> VR_ON <40>

ACINACIN_EC

EC_RSMRST# <14> EC_LID_OUT# <14> EC_ON <29,35>

BKOFF# <20> WWAN_RADIO_OFF# <25> LCD_VCC_TEST_EN <20> PSID_DISABLE# <33>

EC_ENBKL <20> EC_EAPD <24>

SUSP# <28,39,41> PBTN_OUT# <14>

PCIE_WAKE# <14,21,25>

1

CE14

0.47U_0603_16V7K@

2

D

ACIN <14,34>

EC_FCH_PWROK <14>

E

Ra

Rb

100K 100K 100K

4.7K_0402_5%

TP_CLK TP_DATA

+3VALW

1 2

12

NC

RE9

RE34

RE34 100K_0402_5%

100K_0402_5%

AD_BID

RE35

@RE35

@

18K_0402_5%

RbRa

8.2K 18K NC

+5VS

12

RE10

4.7K_0402_5%

1

2

0

CE26

0.1U_0402_16V4Z

Vab

0V

0.25V

0.50V

3.3V

TP_CLK <29> TP_DATA <29>

BOARD ID Table

BOARD ID

ID

0

0.1(X00)

1

0.2(X01)

0.3(X02)

2 3

1.0(A00)

ACIN

1

CE9

2

0.1U_0402_16V7K

KEYBOARD CONN.

ACES_88514-2401

26

GND2

25

KSO15 KSO10 KSO11 KSO14 KSO13 KSO12 KSO3 KSO6 KSO8 KSO7 KSO4 KSO2 KSI0 KSO1 KSO5 KSI3 KSI2 KSO0 KSI5 KSI4 KSO9 KSI6 KSI7 KSI1

KSI1 KSI0

1

CE20

@ CE20

@

22P_0402_50V8J

2

KSO7

KSO15

1

CE22

@ CE22

@

22P_0402_50V8J

2

1

CE24

@ CE24

@

22P_0402_50V8J

2

KSO8

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

ENE-KB926/KB Conn

LA-7161P

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

JKB1

DC020906103

1

CE21

@ CE21

@

22P_0402_50V8J

2

1

CE23

@ CE23

@

22P_0402_50V8J

2

17 43Wednesday, January 05, 2011

E

GND1

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

CONN@JKB1

CONN@

For EMI

of

*

1.0

5

4

3

2

1

D D

HDMI_TXD2P<7>

HDMI_TXD2N<7>

HDMI_TXD1P<7>

HDMI_TXD1N<7>

HDMI_TXD0P<7>

HDMI_TXD0N<7>

HDMI_CLKP<7>

HDMI_CLKN<7>

C C

HDMI_TXD2P

HDMI_TXD2N

HDMI_TXD1P

HDMI_TXD1N

HDMI_TXD0P

HDMI_TXD0N

HDMI_CLKP

HDMI_CLKN

+5VS

RV9

@RV9

@

100K_0402_5%

RV2 499_0402_1%RV2 499_0402_1%

RV4 499_0402_1%RV4 499_0402_1%

13

D

QV2

2

G

2N7002KW_SOT323-3

S

12

S

RV6 499_0402_1%RV6 499_0402_1%

RV7 499_0402_1%RV7 499_0402_1%

RV8 499_0402_1%RV8 499_0402_1%

RV10 499_0402_1%RV10 499_0402_1%

RV11 499_0402_1%RV11 499_0402_1%

RV12 499_0402_1%RV12 499_0402_1%

PLACE PULL DOWN RESISTORS CLOSE TO DIFFERENTIAL PAIRS CONNECTED TO SOLID GROUND F LOOD W HICH IS CO NTROLL ED BY THE FET AVOID STUBS TO ALL DIFFERENTIAL TRACES

12

HDMI_OUT_CLK-_CONN

HDMI_OUT_CLK+_CONN

HDMI_OUT_D0-_CONN

HDMI_OUT_D0+_CONN

HDMI_OUT_D1-_CONN

HDMI_OUT_D1+_CONN

HDMI_OUT_D2-_CONN

HDMI_OUT_D2+_CONN

Place close JHDMI1

RV14 0_0402_5%RV14 0_0402_5%

+3VS

2

HDMICLK_UMA<7>

HDMIDAT_UMA<7>

B B

5

QV3B

@QV3B

@

2N7002KDWH_SOT363-6

1 2

RV16 0_0402_5%@RV16 0_0402_5%@

1 2

RV21 0_0402_5%@RV21 0_0402_5%@

61

QV3A

@QV3A

@

2N7002KDWH_SOT363-6

34

HDMI_SCL_SINK

HDMI_SDA_SINK

HDMI_CLKP

HDMI_CLKN

HDMI_TXD2P

HDMI_TXD2N

HDMI_TXD1P

HDMI_TXD1N

footprint short

HDMI_TXD0P

HDMI_TXD0N

1 2

LV1

@LV1

@

1

4

1 2

RV15

RV17 0_0402_5%RV17 0_0402_5%

1 2

@LV2

@

1

4

1 2

RV19 0_0402_5%RV19 0_0402_5%

RV20 0_0402_5%RV20 0_0402_5%

1 2

@LV3

@

1

4

1 2

RV22 0_0402_5%RV22 0_0402_5%

RV23

1 2

@LV4

@

1

4

1 2

RV24 0_0402_5%RV24 0_0402_5%

LV2

LV3

LV4

2

WCM-2012-900T_4P

3

0_0402_5%

2

WCM-2012-900T_4P

3

2

WCM-2012-900T_4P

3

0_0402_5%

2

WCM-2012-900T_4P

3

HDMI_OUT_CLK+_CONN

HDMI_OUT_CLK-_CONN

HDMI_OUT_D2+_CONN

HDMI_OUT_D2-_CONN

HDMI_OUT_D1+_CONN

HDMI_OUT_D1-_CONN

HDMI_OUT_D0+_CONN

HDMI_OUT_D0-_CONN

+5VS

@

12

PJP22

PAD-OPEN 43x79

CV9

1U_0402_6.3V6K

1 2

HDMI_HPD<7>

HDMI_HPD

12

RV66

RV66 100K_0402_5%

100K_0402_5%

12

FV1

1.5A_6V_1206L150PR~D

HDMI_SDA_SINK HDMI_SCL_SINK

HDMI_OUT_CLK-_CONN HDMI_OUT_CLK+_CONN HDMI_OUT_D0-_CONN HDMI_OUT_D0+_CONN HDMI_OUT_D1-_CONN HDMI_OUT_D1+_CONN HDMI_OUT_D2-_CONN HDMI_OUT_D2+_CONN

1 2

CV10 1U_0603_10V6K@CV10 1U_0603_10V6K@

+5VS_HDMI

HDMI_HPD

JHDMI1

CONN@JHDMI1

CONN@

18

+5V

16

SDA

15

SCL

19

HP_DET

12

CK-

10

CK+

9

D0-

7

D0+

6

D1-

4

D1+

3

D2-

1

D2+

DDC/CEC_GND

SUYIN_100042MR019S153ZL

DC232000900

CEC

Reserved

GND GND GND GND GND GND GND GND

TV1

13

PAD

14

2 5 8 11 20 21 22 23 17

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

HDMI Conn.

LA-7161P

18 43Wednesday, January 05, 2011

1

1.0

of

5

4

3

2

1

Place close to JCRT1 for AMD

AMD@

CV40

0.47U_0402_16V4Z~D

C R T

D D

Change to BLM15BB470SS1D (47 OHM BEAD)

1

2

CRT_R_RL

CRT_G_RL

6P_0402_50V

CV12

@

1 2

LV5 BLM15BB470SS1D_2PLV5 BLM15BB470SS1D_2P

1 2

LV6 BLM15BB470SS1D_2PLV6 BLM15BB470SS1D_2P

1 2

LV7 BLM15BB470SS1D_2PLV7 BLM15BB470SS1D_2P

6P_0402_50V

CV14

CV13

1

2

@

VGA_CRT_R<7>

VGA_CRT_G<7>

VGA_CRT_B<7>

VGA_CRT_R

VGA_CRT_G

4.7P_0402_50V8C

RV29

150_0402_1%

RV29

150_0402_1%

RV30

150_0402_1%

RV30

150_0402_1%

12

4.7P_0402_50V8C

RV40

CV33

1

2

@

RV25 0_0402_5%RV25 0_0402_5%

RV26 0_0402_5%RV26 0_0402_5%

RV27 0_0402_5%RV27 0_0402_5%

4.7P_0402_50V8C

CV34

1

2

@

CV35

1 2

CRT_R_L

CRT_G_L

CRT_B_LCRT_B_RLVGA_CRT_B

For EMI

+3VS

0.47U_0402_16V4Z~D

1 2

2

3

DV1

DV1 DAN217_SC59-3

DAN217_SC59-3

AMD@

1

CV15

4.7P_0402_50V8C

CV15

4.7P_0402_50V8C

1

2

AMD@

CV41

0.47U_0402_16V4Z~D

1 2

2

3

DV2

DV2 DAN217_SC59-3

DAN217_SC59-3

AMD@

1

CV16

4.7P_0402_50V8C

CV16

4.7P_0402_50V8C

1

2

AMD@

CV42

0.47U_0402_16V4Z~D

1 2

2

3

DV3

DV3 DAN217_SC59-3

DAN217_SC59-3

AMD@

1

CV17

4.7P_0402_50V8C

CV17

4.7P_0402_50V8C

1

2

SE00000AY80

C C

AMD check list Ver 1.03 use 2k pull up to +5V.

+CRT_VCC +CRT_VCC

RV31

B B

12

2K_0402_1%

12

RV32

VGA_DDC_DATA

VGA_DDC_CLK

change to 6P_0402 Need apply CIS symbol

VGA_DDC_DATA<7>

VGA_DDC_CLK<7>

VGA_DDC_DATA

VGA_DDC_CLK

+3VS

AMD@

CV38

0.47U_0402_16V4Z~D

1 2

2

3

DV8

DV8 DAN217_SC59-3

DAN217_SC59-3

AMD@

1

0.47U_0402_16V4Z~D

Place close to JCRT1 for AMD

AMD@

CV39

1 2

3

1

2

DV9

DV9 DAN217_SC59-3

DAN217_SC59-3

AMD@

Place close to JCRT1 for AMD

+CRT_VCC

CV19

0.1U_0402_16V7K

1 2

VGA_CRT_HSYNC<7>

74AHCT1G125GW_SOT353-5

CV20

0.1U_0402_16V7K

1 2

VGA_CRT_VSYNC<7>

A A

VGA_CRT_VSYNC

5

UV18

+CRT_VCC

5

A2Y

3

5

A2Y

3

1

P

4

OE#

G

RV35

1 2

10K_0402_5%

1

P

4

OE#

G

UV19

UV19 74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

D_CRT_HSYNC

D_CRT_VSYNC

1 2

4

RV33

0_0603_5%

RV34

0_0603_5%

HSYNC_LVGA_CRT_HSYNC

CV21

15P_0402_50V8J

CV21

15P_0402_50V8J

1

2

CV22

15P_0402_50V8J

CV22

15P_0402_50V8J

1

2

VSYNC_L

HSYNC_L

VSYNC_L

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

+3VS

2

+5VS +5VS_CRT

DV11

2 1

PMEG2010ET_SOT-23

Change to SCS00003H00

MSEN#

MSEN#<17>

CRT_R_L

VGA_DDC_DATA CRT_G_L

HSYNC_L CRT_B_L

VSYNC_L

VGA_DDC_CLK

AMD@

CV43

0.47U_0402_16V4Z~D

1 2

2

3

DV12

DV12 DAN217_SC59-3

DAN217_SC59-3

AMD@

1

AMD@

CV44

0.47U_0402_16V4Z~D

1 2

3

DELL CONFIDENTIAL/PROPRIETARY

+CRT_VCC

FV2

1 2

1.1A_8V_1206L110THYR

CV18

100P_0402_50V8J

CV18

100P_0402_50V8J

1

2

DV13

DV13 DAN217_SC59-3

DAN217_SC59-3

AMD@

1

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

VGA Conn.

LA-7161P

W=40milsW=40mils

1

CV11

CV11 1U_0603_10V6K

1U_0603_10V6K

2

JCRT1

CONN@

JCRT1

CONN@

6

11

1 7

12

2 8

16

G

13

17

G

3 9

14

4 10 15

5

SUYIN_070546FR015M21TZR

DC060004300

1

19 43Wednesday, January 05, 2011

of

1.0

W=40mils

A

LCD POWER CIRCUIT

1 1

SSM3K7002FU_SC70-3

DV5

ENVDD<7>

LCD_VCC_TEST_EN<17>

2 2

+3VS

BKOFF#<17>

EC_ENBKL<17>

3 3

4 4

ENBKL<7>

INVT_PW M<17>

NB_LCD_PWM<7>

LCD_VCC_TEST_EN

RV43

1 2

4.7K_0402_5%

BKOFF# BL_OFF#

EC_ENBKL

1 2

RV45 0_0402_5%RV45 0_0402_5%

RV47 0_0402_5%

RV50 0_0402_5%

A

DV5

RB751V-40_SOD323-2

DV10

RB751V-40_SOD323-2

1 2

RV61 0_0402_5%

@

BKOFF#

@

1 2

+3VS

5

UO21

1

P

INA

2

INB

G

74AHC1G32GW _SOT353-5~D

3

1 2

@

+LCDVDD +5VALW +3VS

12

RV36

100_0805_5%

13

D

QV7

12

CV29 0.1U_0402_16V7K

4

O

2

G

S

2

G

12

RV41

RV41 10K_0402_5%

10K_0402_5%

@

12

DV14

12

RB751V-40_SOD323-2

DV6

@

1 2

RB751V-40_SOD323-2

DV7

@

1 2

RB751V-40_SOD323-2

Pop DV14 & RV51 Unpop DV6 & RV44

+3VS

RV48

RV48 10K_0402_5%

10K_0402_5%

@

1 2

1

CV32

100P_0402_50V8J

2

EMI:Add 220 ohm Bead at LCD_PWM (BLM18BB221SN)SA00000L310 AND GATE

B

12

RV37

47K_0402_5%

RV38 56K_0402_5%RV38 56K_0402_5%

13

D

QV9

SSM3K7002FU_SC70-3

S

+3VS

12

RV44

@RV44

@

4.7K_0402_5%

12

RV51

10K_0402_5%

LV9

1 2

BLM18BB221SN1D_2P~D

B

1

CV24

0.1U_0402_16V7K

2

LCD_PWMLCD_PW M_L

W=60mils

G

2

USB20_N9<14>

USB20_P9<14>

+5VS

CO5

0.1U_0402_16V7K

AO3419L_SOT23-3

S

D

1 3

4.7U_0805_10V4Z

1

CV27

2

+5VS

1

2

QV8

W=60mils

+LCDVDD

0.1U_0402_16V7K

1

CV28

2

RO12

@RO12

@

+5VS_CAM

1 2

0_0603_5%

SI2301CDS-T1-GE3_SOT23-3

S

12

G

RO13

100K_0402_5%

1 2

RV49 1K_0402_5%RV 49 1K_0402_5%

CAM_ON/OFF#<17>

C

40mil

1000P_0402_50V7K

1

2

EN_INVPWR<17>

RO10 0_0402_5%RO10 0_0402_5%

1 2

LO1

@ LO1

@

1

4

WCM2012F2S- 900T04_0805

1 2

RO11 0_0402_5%RO11 0_0402_5%

2

3

W=20mils

+5VS_CAM

2

3

@ LV8

@

FBMA-L11-201209-221LMA30T_0805

B+

12

RV39

CV25

RV39 100K_0402_5%

100K_0402_5%

PWR_SRC_ON

1 2

RV42 100K_0402_5%RV42 100K_0402_5%

USB20_N9_RUSB20_N9

USB20_P9_RUSB20_P9

FBMA-L11-201209-221LMA30T_0805

B+

QV6

SI3457BDV-T1-E3_TSOP6

D

S

4 5

G

3

D

1 3

USB20_P9_R

USB20_N9_R

6

2 1

QV10

QV10 2N7002W-7-F _SOT323-3

2N7002W-7-F _SOT323-3

S

G

2

CO6

AMD@

LV8

1

2

1

2

0.1U_0402_16V7K

D

12

40mil

CV23

0.1U_0603_50V4Z

DO4

AMD@

Place close to JLVDS1 for AMD

QO4

2

+5VS_CAM

2

G

C

W=20mils

1

CO4

0.1U_0402_16V7K

2

@

13

D

QO5

QO5 2N7002_SOT23-3

2N7002_SOT23-3

S

Remove CE_ENABLE Pin.34 DBC_ENABLE Pin.37

D

13

CAM_ON/OFF

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DMIC_CLK<24>

DMIC_DATA<24>

INVPWR_B+

68P_0402_50V8J

D

INVPWR_B+

PJDLC05_SOT23-3

+5VS_CAM

CV30

3

2

1

E

+5VALW

INVPWR_B+

12

RV59

100K_0402_5%

@

QV11

2N7002W-7-F _SOT323-3

EN_INVPWR

2

G

13

2

G

13

D

S

Discharg Circuit

+3VS

1

CV26

0.1U_0402_16V7K

2

Closed to JLVDS1

W=60mils

+LCDVDD

+3VS

LCD_TEST<17>

LO2

CO2

LDDC_CLK_MCH<7> LDDC_DATA_MCH<7> LVDS_A0-<7> LVDS_A0+<7>

LVDS_A1-<7> LVDS_A1+<7>

LVDS_A2-<7> LVDS_A2+<7>

LVDS_ACLK-<7> LVDS_ACLK+<7>

1 2

1

100P_0402_50V8J

2

1 2

RV46 0_0402_5%@ RV46 0_0402_5%@

CO3

DMIC_CLK_R

1

2

LCD_PWM BL_OFF#_RBL_OFF#

STARC_107K40-000001-G2

1

CO7

2

AMD@

USB20_P9_R USB20_N9_R

FBMA-L10-160808-301LMT_2P

100P_0402_50V8J

1

2

0.1U_0402_16V7K

footprint short

CV31

0.1U_0603_50V4Z

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LVDS/Cam Conn

LA-7161P

E

RV60

RV60 820_0805_1%

820_0805_1%

@

D

QV12

QV12 2N7002W-7-F_S OT323-3

2N7002W-7-F_S OT323-3

@

S

JLVDS1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

SP01000XE00

20 43Wednesday, January 05, 2011

G1 G2 G3 G4 G5 G6

of

CONN@JLVDS1

CONN@

41 42 43 44 45 46

1.0

5

4

3

2

1

+1.7_VDDCT

1 2

LL1 4.7UH_SIA4012-4R7M_20%LL1 4.7UH_SIA4012-4R7M_20%

1

CL55

CL54

D D

2

10U_0805_10V4Z

Close to Pin40

PCIE_NRX_LANTX_N0<8>

PCIE_NRX_LANTX_P0<8>

PCIE_NTX_LANRX_N0<8>

PCIE_NTX_LANRX_P0<8>

C C

9B/$1

B B

A A

CLK_PCIE_LAN_N<13> CLK_PCIE_LAN_P<13>

PCIE_WAKE#<14,17,25>

EC_SMB_CK2<7,17,25> EC_SMB_DA2<7,17,25>

CLKREQ_LAN#<14>

1 2

RL38 4.7K_0402_5%@RL38 4.7K_0402_5%@

1

Note: Place Close to LAN chip

CL56

@

2

0.1U_0402_16V4Z

PLT_RST#<13,17,25>

1

2

CL72

Near Pin31

LL1 DCR< 0.15 ohm

2

Rate current of LL1 > 1A

1000P_0402_50V7K

Place Close to Chip

CL57 0.1U_0402_16V7KCL57 0.1U_0402_16V7K

1 2

CL58 0.1U_0402_16V7KCL58 0.1U_0402_16V7K

1 2

RL32 0_0402_5%@ RL32 0_0402_5%@

1 2 1 2

RL33 0_0402_5%@ RL33 0_0402_5%@

CL63 0.1U_0402_16V4ZCL63 0.1U_0402_16V4Z

1 2

RL34 0_0402_5%@ RL34 0_0402_5%@

footprint short

+1.1_AVDDL

1

2

CL73

CL74

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near Pin34

Near Pin6

+1.7_LX+1.7_VDDCT

PCIE_FRX_DTX_N0_C

PCIE_FRX_DTX_P0_C

1

2

CL75

0.1U_0402_16V4Z

+1.7_LX

PLT_RST#

PCIE_WAKE#

LAN_SMB_CK_R LAN_SMB_DA_R

LAN_XTALO LAN_XTALI

CLKREQ_LAN#_R

UL1

29

TX_N

30

TX_P

36

RX_N

35

RX_P

32

REFCLK_N

33

REFCLK_P

2

PERST#

3

WAKE#

25

SMCLK

26

SMDATA

28

TEST_RST

27

TESTMODE

7

XTLO

8

XTLI

4

VDDCT_REG

23

CLKREQn

13

NC

19

NC

31

AVDDL

34

AVDDL

6

AVDDL_REG

41

GND

AR8152-BL1A-R_QFN40_5X5

25MHZ_20PF_7A25000012

1

CL79

2

27P_0402_50V8J

Atheros

8152-BL1A

YL1

1 2

LED0,1,2 intel Pull UP

DVDDL_REG

AVDDH_REG

LAN_XTALI

LAN_XTALO

1

CL80

2

27P_0402_50V8J

LED_0 LED_1 LED_2

TRXN0

TRXP0

TRXN1

TRXP1

TRXN2

TRXP2

TRXN3

TRXP3

RBIAS

VDD33

VDDCT

DVDDL

AVDDH

RL26

+3V_LAN

1

CL59

2

CL65

0.1U_0402_16V4Z

+1.7_VDDCT

EC_SMB_DA2

1

CL60

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1U_0402_6.3V4Z

1U_0402_6.3V4Z

footprint short

CL81 1U_0402_6.3V4Z

CL82 1000P_0402_50V7KCL82 1000P_0402_50V7K

1 2

CL42 0.1U_0402_16V7KCL42 0.1U_0402_16V7K CL83 1000P_0402_50V7KCL83 1000P_0402_50V7K

1 2

CL44 0.1U_0402_16V7KCL44 0.1U_0402_16V7K

0.1U_0402_16V7K

1

CL61

2

RL42

@RL42

@

0_0603_5%

12

@

+3V_LAN

CL84

ESD request

+3V_LAN

1

@

CL62

2

10U_0805_10V4Z

12

1 2

RL44 4.7K_0402_5%@RL44 4.7K_0402_5%@

no overclocking

RL35

5.1K_0402_5%

38 39 16

LAN_MDI0-

12

LAN_MDI0+

11

LAN_MDI1-

15

LAN_MDI1+

14 18 17 21 20

LAN_RBIAS

10

+3V_LAN

1

+1.7_LX

40

LX

+1.7_VDDCT

5

+1.1_DVDDL

24 37

22 9

+2.7_AVDDH

1

2

CL76

1U_0402_6.3V4Z

Near Pin9

PD 5.1K

1 2

LAN_ACTIVITY LAN_SK_LAN_LINK100# LAN_SK_LAN_LINK10#

RL36 2.37K_0402_1%

1 2

CL59 & CL60 Close pin1 < 200mil CL61 & CL62 Close pin < 400mil

CL64 0.1U_0402_16V4Z

1 2

CL66 1U_0402_6.3V4Z

1 2

CL68 0.1U_0402_16V4Z

1 2

Near Pin37

1

2

CL77

CL78

0.1U_0402_16V4Z

Near Pin22

+1.7_VDDCT

1

2

10U_0805_10V4Z

2

100P_0402_50V8J

1

LAN_MDI1+ LAN_MDI1-

+1.7_VDDCT_R

LAN_MDI0+ LAN_MDI0-

LAN_ACTIV ITY

LAN_SK_LAN_LINK100#

LAN_SK_LAN_LINK10#

CL52

@CL52

@

1 2 3 4 5 6 7

SP050006N00

RL26

1 2

510_0402_1%

1 2

RL27 510_0402_1%RL27 510_0402_1%

2

100P_0402_50V8J @

1

LAN_MDI0+

LAN_MDI0-

LAN_MDI1+

LAN_MDI1-

TRL1

RD+ RDCT NC NC CT TD+ TD-8TX-

350uH_NS681695

RX+

16 15

RX-

14

CT

13

NC

12

NC

11

CT

10

TX+

9

LAN_ACTIVITY_R

2

CL37

@

1

CL53

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

2

1

100P_0402_50V8J

+3V_LAN_LED

Place Close to LAN chip

49.9_0402_1%

RL37

1 2

49.9_0402_1%

RL39

1 2

49.9_0402_1%

RL40

1 2

49.9_0402_1%

RL41

1 2

RJ45_MIDI1+ RJ45_MIDI1-

RJ45_CT1 RJ45_MIDI0+ RJ45_MIDI0-

RL20 75_0402_5%RL20 75_0402_5%

1 2

RL21 75_0402_5%RL21 75_0402_5%

EMI: Change TRL1 to SP050006N00

13

12

14

11

10

CL67 1000P_0402_50V7K@ CL67 1000P_0402_50V7K@

CL69 0.1U_0402_16V4ZCL69 0.1U_0402_16V4Z

1 2

CL70 1000P_0402_50V7K@ CL70 1000P_0402_50V7K@

CL71 0.1U_0402_16V4ZCL71 0.1U_0402_16V4Z

1 2

JLAN1

Unused

Yellow LED+

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

Orange LED-

Green LE D+

9

Green LE D-

FOX_JM3611A-R5A53-7F

DC234004G00

+TRCTRJ45_CT0

CONN@JLAN1

CONN@

GND

1

CL51

CL51 1000P_1206_2KV7K

1000P_1206_2KV7K

2

15

16

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN-8152

LA-7161P

Wednesday, January 05, 2011

LA-7161P

1

of

21 43

1.0

5

D D

4

3

2

1

+3VS +3VSIN

footprint short

C C

USB20_N8<14> USB20_P8<14>

RB1

@RB1

@

1 2

0_0805_5%

For EMI

RB6 0_0402_5%RB6 0_0402_5%

1 2

RB7 0_0402_5%RB7 0_0402_5%

1 2

1

CB1

0.1U_0402_16V7K

2

+3VSIN

+CARD_3V

1

CB2

4.7U_0603_6.3V6K

2

@

+CRREFE

1 2

CB6 100P_0402_50V8J

1 2

RB2 6.2K_0402_1%~DRB2 6.2K_0402_1%~D

USB20_N8_R USB20_P8_R

+3VSIN +CARD_3V

+V18CR MSBS_XD6

12

CB7 1U_0402_6.3V6KCB7 1U_0402_6.3V6K

XDCD

SDWP_MSCLK_XDRDY MSINS_XDRE SD1_XDCE SD0_MSD7_XDCLE SD7_MSD3_XDALE

1

2 3

4 5 6

7

8

9 10 11 12

UB11

REFE

DM DP

3V3_IN CARD_3V3 V18

XD_CD#

SP1 SP2 SP3 SP4 SP5

GPIO0

CLK_IN

XD_D7

SP14 SP13 SP12 SP11 SP10

SP9 SP8 SP7 SP6

EPAD

RTS5138-GR_QFN24_4X4

25

17

24

23

22 21 20 19 18 16 15 14 13

CLK_48M

XD7

SD2_MSD5_XD5 SD3_MSD1_XD4 SD4_MSD4_XD3 SDCMD_XD2 SD5_MSD0_XD1 SDCLK_MSD2_XD0 SD6_MSD6_XDWP SDCD_XDWE

CLK_48M <13>

CB3 0.1U_0402_16V7KCB3 0.1U_0402_16V7K

SDCLK_MSD2_XD0 SD5_MSD0_XD1 SDCMD_XD2 SD4_MSD4_XD3 SD3_MSD1_XD4 SD2_MSD5_XD5 MSBS_XD6 XD7

SDCD_XDWE SD6_MSD6_XDWP SD7_MSD3_XDALE XDCD SDWP_MSCLK_XDRDY MSINS_XDRE SD1_XDCE SD0_MSD7_XDCLE

+CARD_3V

12

+CARD_3V +CARD_3V

JCARD1

3

32 10

9 8 7 6 5 4

34 33 35 40 39 38 37 36

11 31

41 42

TAITW_R015-B10-LM_NR

XD-VCC

XD-D0 XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7

XD-WE XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE

7IN1 GND 7IN1 GND

CONN@

7 IN 1 CONN

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

21 28

SDCLK_MSD2_XD0

20

SD0_MSD7_XDCLE

14

SD1_XDCE

12

SD2_MSD5_XD5

30

SD3_MSD1_XD4

29

SD4_MSD4_XD3

27

SD5_MSD0_XD1

23

SD6_MSD6_XDWP

18

SD7_MSD3_XDALE

16

SDCMD_XD2

25

SDCD_XDWE

1

SDWP_MSCLK_XDRDY

2

SDWP_MSCLK_XDRDY

26

SD5_MSD0_XD1

17

SD3_MSD1_XD4

15

SDCLK_MSD2_XD0

19

SD7_MSD3_XDALE

24

MSINS_XDRE

22

MSBS_XD6

13

+CARD_3V

CB4 0.1U_0402_16V7KCB4 0.1U_0402_16V7K

+CARD_3V

CB5

12 12

0.1U_0402_16V7K

SP07000GW00

USB20_N8_R

USB20_P8_R

1

AMD@

2

AMD@

CB11

0.1U_0402_16V7K

2

Place close to UB11 for AMD

CLK_48M

RB8

10_0402_5%

CB12

22P_0402_50V8J

Place close to JCARD1 for EMI

12

1

2

12

RB4

@ RB4

@

10_0402_5%

1

CB8

@ CB8

@

22P_0402_50V8J

2

SDWP_MSCLK_XDRDYSDCLK_MSD2_XD0

12

RB5

@ RB5

@

10_0402_5%

1

CB9

@ CB9

@

22P_0402_50V8J

2

AMD@

CB10

0.1U_0402_16V7K

B B

0.1U_0402_16V7K

Place closed to UB11

(For RF request)

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Card Reader RTS5138

LA-7161P

22 43Wednesday, January 05, 2011

1

1.0

of

5

4

3

2

1

USB20_N2_RUSB20_N2 USB20_P2_R

DL1

0.1U_0402_16V7K

+USB_VCCA

1

2

3

PJDLC05_SOT23-3

1

W=80mils

0.1U_0402_16V4Z

150U_B2_6.3VM_R35M

+

0.1U_0402_16V4Z

1

CI3

CI2

CI3

2

JUSB1

CONN@JUSB1

CONN@

4

VCC

3

D-

2

D+

1

GND

5

GND

6

GND

7

AMD@

1

CI13

2

0.1U_0402_16V7K

GND

8

GND

SUYIN_020173MR004S50TZL

DC233003W00

+USB_SIDE_PWR

CI1

0.1U_0402_16V7K

VCC

D+

D-

OE#

D=1D

D=2D

10

9

S

8

7

6

0.1U_0402_16V7K

1 2

PWRSHARE_OE#

+3VALW

1 2

RI3 100K_0402_5%RI3 100K_0402_5%

PWRSHARE_OE# <17>

PWSUSB_P1 <26>

PWSUSB_N1 <26>

RI2

75K_0402_1%

RI2

75K_0402_1%

D D

49.9K_0402_1%

1 2

RI4

1 2

RI5

49.9K_0402_1%

1 2

RI1

43.2K_0402_1%

USB20_P1<14>

USB20_N1<14>

USB_CHARGE_D+

USB_CHARGE_D-

UI12

1

1D+

2

1D-

3

2D+

4

2D-

5

GND

TS3USB221RSER_QFN10_2x1P5~D

S Function

OE#

H

X

Disconnect

L

H

USB CONN

USB20_N2<14> USB20_P2<14>

USB20_P2

USB20_N2 USB20_P2

WCM2012F2S-900T04_0805

1 2

RI7 0_0402_5%RI7 0_0402_5%

LI1

@ LI1

@

1

4

1 2

RI6 0_0402_5%RI6 0_0402_5%

2

3

1

CI12

AMD@

2

(For ESD request)

OC1# OUT1 OUT2 OC2#

8 7 6 5

80 mils

+USB_VCCA

8 7 6 5

+5V_USB

USB_OC2#

USB_OC0#

USB_OC2# <14>

USB_OC0# <14>

RTCVREF RTCVREF RTCVREF RTCVREF

C C

SDMK0340L-7-F

RI8

10K_0402_5%

USB_DETECT#

USB_DETECT# <26>

12

2.2U_0603_10V7K~D

CI11

220K_0402_5%

12

RI9

12

SDMK0340L-7-F

DI1

2 1

UI16

TC7SZ14FU_SSOP5~D

1 2

5

P

NC A

G

3

1

CI10

0.1U_0402_16V7K

2

CLOSE TO UI16

4

Y

RI11

100K_0402_5%

+5VALW

51ON#

13

D

QI1

2

G

2N7002LT1G_SOT23-3

S

12

S

51ON# <29,33>

10U_1206_16V4Z

1

CI4

CI5

2

From connector detect

2 1

DI2

SDMK0340L-7-F

B B

Power share

1 2

RI10 0_0402_5%@ RI10 0_0402_5%@

footprint short

USB_DET#_DELAY

USB_DET#_DELAY <17>

+5VALW

10U_1206_16V4Z

1

CI7

1

2

FUSEI1

@ FUSEI1

@

5A_32V_0467005.NR~D

1 2

PJP23 PAD-OPEN 43x79

PAD-OPEN 43x79

1 2

0.1U_0402_16V7K

1

2

FUSEI2

@FUSEI2

@

5A_32V_0467005.NR~D

1 2

PJP24 JUMP_43X79

JUMP_43X79

1 2

CI6

0.1U_0402_16V7K

2.0A

UI13

@PJP23

@

@PJP24

@

+5VALW_F2

USB_EN#<17>

80 mils

+5VALW_F1

USB_EN#<17>

UI13

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

SA00002AS0L

CIS LINK OK

UI14

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

OC1# OUT1 OUT2 OC2#

FUSEI3

@FUSEI3

@

5A_32V_0467005.NR~D

1 2

+5VALW

10U_1206_16V4Z

1

CI8

2

A A

PJP25 PAD-OPEN 43x79

PAD-OPEN 43x79

1 2

0.1U_0402_16V7K

1

CI9

2

@PJP25

@

+5VALW_F3

USB_PWR_EN#<17>

UI15

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

OC1# OUT1 OUT2

OC2#

+USB_SIDE_PWR

USB_OC1#

8 7 6 5

USB_OC1# <14>

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

USB/POWER Share

LA-7161P

23 43Wednesday, January 05, 2011

1

1.0

of

5

4

3

2

1

80mil

D D

CC6

+MIC1_VREFO_R +MIC1_VREFO_L

12

RC20

RC21

MIC1

MIC2

MIC_JD

RC21

2.2K_0402_5%

RC1 1K_0402_1%RC1 1K_0402_1%

1 2

RC2

RC5

0_0402_5%

1 2

@CC15

@

100P_0402_50V8J

RC9 39.2K_0402_1%RC9 39.2K_0402_1%

1 2

RC10 20K_0402_1%RC10 20K_0402_1%

MIC1_R

MIC2_R C_MIC2

1K_0402_1%

1

CC15

2

2.2K_0402_5%

MIC1<26>

MIC2<26>

DMIC_CLK<20>

C C

HP_JD<26>

MIC_JD<26>

10U_0805_10V6K

10mil

DMIC_CLK_L

SENSEAHP_JD

+MIC1_VREFO_L

ALC259-VB5-GR:SA00003QR10

B B

+3VS

20mil

1

CC7

2

.1U_0402_16V7K

4.7U_0603_6.3V6K

CC12

1 2

CC13

4.7U_0603_6.3V6K

DMIC_DATA<20>

HDA_RST#<14>

2.2U_0603_10V6K

CC7 near Pin9 CC8 near Pin1

1

CC8

2

.1U_0402_16V7K

C_MIC1

DMIC_DATA

PD# HDA_SDIN0_R

HDA_RST#

MONO_IN

SENSEA

1 2

CC17

10mil

DGND

23 24

14 15

21 22

16 17

2

3

4

11

12

13

18

36

35

31

43 42 49

7

+5VS_PVDD

9

1

DVDD

PVDD139PVDD2

DVDD_IO

LINE1_L LINE1_R

LINE2_L LINE2_R

MIC1_L MIC1_R

MIC2_L MIC2_R

GPIO0/DMIC_D ATA

GPIO1/DMIC_C LK

PD#

RESET#

PCBEEP

SENSE A

SENSE B

CBP

CBN

MIC1_VREFO_L

PVSS2 PVSS1 DVSS2 DVSS1

ALC259-GR_QFN48_7X7

MIC1_VREFO_R

46

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+ SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SDATA_OUT

SDATA_IN

MONO_OUT

MIC2_VREFO

LDO_CAP

CC9 near Pin25 CC10 near Pin38

+VDDA

CC9

38

UC1

AVDD125AVDD2

40 41

45 44

32 33

10

SYNC

6

BCLK

5

8

47

EAPD

48

SPDIFO

20

29

30 28

27

VREF

19

JDREF

34

CPVEE

26

AVSS1

37

AVSS2

1

CC10

2

.1U_0402_16V7K

SPKOUT_L+ SPKOUT_L-

SPKOUT_R+ SPKOUT_R-

HDA_SYNC

HDA_BITCLK_R

HDA_SDOUT

10mil

+AC97_VREF

+AC_JDREF

RC11 20K_0402_1%RC11 20K_0402_1%

+CPVEE

2.2U_0603_10V6K

AGND

40mil

1

2

.1U_0402_16V7K

30mil

HP_OUTL HP_OUTR

HDA_SYNC <14>

1 2

RC4 0_0402_5%RC4 0_0402_5%

RC7

1 2

33_0402_5%

+MIC1_VREFO_R

1 2

CC18

LC2

12

10mil

1

2

CC20

.1U_0402_16V7K

+5VS

1

CC21

2

10U_0805_10V6K

1 2

RC12 0_0603_5%R C12 0_0603_5%

1 2

RC14 0_0603_5%R C14 0_0603_5%

1 2

RC15 0_0402_5%R C15 0_0402_5%

1 2

RC16 0_0402_5%R C16 0_0402_5%

FBMA-L11-160808-800LMT_0603

CC11

CC11 10U_0805_10V6K

10U_0805_10V6K

HP_OUTL <26> HP_OUTR <26>

HDA_BITCLK <14>

HDA_SDOUT <14>

FCH_HDA_SDIN0 <14>

EC_EAPD <17>

+LDO_CAP

10mil

2

@

CC19

1

2.2U_0603_10V6K

Change CC19 to 2.2uF for pop noise or class D noise

GND AGND

+5VS

1

CC1

2

10U_0805_10V6K

.1U_0402_16V7K

Beep sound

EC Beep

BEEP#<17>

PCI Beep

FCH_SPKR<14>

LC1

RC3

1 2

47K_0402_5%

RC6

1 2

47K_0402_5%

HDA_BITCLK_R

12

RC13

1

2

12

CC4

RC8

BLM21PG600SN1D_0805~D

1

CC2

2

1

CC3

2

10U_0805_10V6K

12

CC16

10K_0402_5%

22_0402_5%

CC23

CC23 10P_0402_50V8J

10P_0402_50V8J

+5VS_PVDD

1

CC5

2

.1U_0402_16V7K

CC3 near Pin39 CC5 near Pin46

MONO_IN

1 2

CC14 1U_0603_10V4ZCC14 1U_0603_10V4Z

1

2

.1U_0402_16V7K

EMI

HDA_BITCLK

1

@

2

CC22

CC22 10P_0402_50V8J

10P_0402_50V8J

Speaker Connector

For Power on/off de-pop circuit and system booting warning signal:

Please system BIOS Engineer Note:

1.If you want the system make warning signal after power on

+5VS

Please let EC_MUTE# high first

0_0402_5%

2.When you want to exit your BIOS programming code

Please let EC_MUTE# Low.

(The programming is difference from before)

A A

5

EC_MUTE#<17>

HDA_RST#<14>

0_0402_5%

RC17

1 2

+3VS

CC24

@

1 2

5

UC2

@UC2

@

1

P

.1U_0402_16V7K

INA

2

INB

1 2

@

RC19

4

.1U_0402_16V7K

4

O

G

74AHC1G32GW_SOT353-5~D

3

0_0402_5%

RC18 1K_0402_5%

1K_0402_5%

1 2

PD#

@RC18

@

PJDLC05_SOT23-3

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

@ D3

@

D3

SPKOUT_LSPKOUT_L+ SPKOUT_RSPKOUT_R+

2

3

1

2

3

PJDLC05_SOT23-3

1

JSPEK1

1

2

3

5

3

GND

4

6

4

GND

ACES_87213-0400G

CONN@

SP02000GC00 LINK OK

D4

@ D4

@

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Codec ALC259

LA-7161P

24 43Wednesday, January 05, 2011

1

of

1.0

A

WWAN PCIE MiniCard

JWWAN1

CONN@JWWAN1

1 1

PCIE_WAKE#<14,17,21>

CLKREQ_WWAN#<14>

CLK_PCIE_WWAN_N<13> CLK_PCIE_WWAN_P<13>

PCIE_NRX_WWANTX_N2<8> PCIE_NRX_WWANTX_P2<8>

PCIE_NTX_WWANRX_N2<8> PCIE_NTX_WWANRX_P2<8>

PCIE_WAKE#

+3VS

check layout symbol

2 2

CONN@

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

53

GND1

GND2

55

NC

BELLW_80052-1021

DC040006S00

2

4

6

8

10

12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54 56

NC

WLAN/WIMAX PCIE Mini Card

+3V_WLAN

+3VS

3 3

BT_RADIO_OFF# BT_ACTIVE_OFF

PCIE_NRX_WLANTX_N1<8> PCIE_NRX_WLANTX_P1<8>

PCIE_NTX_WLANRX_N1<8> PCIE_NTX_WLANRX_P1<8>

BT_RADIO_OFF# BT_DISABLE

4 4

BT_RADIO_OFF#

12

RM5 0_1206_5%RM5 0_1206_5%

BT_RADIO_OFF#<17>

RM17 0_0402_5%

CLK_PCIE_WLAN_N<13> CLK_PCIE_WLAN_P<13>

RM18 0_0402_5%

EC_TX<17>

EC_RX<17>

1 2

40 mils 20 mils

1

2

CM18

CM15

CM16

0.01U_0402_25V7K

0.047U_0402_16V4Z

CLK_DEBUG_PORT_1<13>

BT_RADIO_OFF#

@

1 2

CLKREQ_WLAN#<14>

PLT_RST# BT_DISABLEB#

@

1 2

RM9 100K_0402_5%RM9 100K_0402_5%

RM21 1K_0402_5%RM21 1K_0402_5%

1 2

CM18

CM17

4.7U_0805_10V4Z

0.1U_0402_16V7K

RM19 0_0402_5%

RM20 0_0402_5%

CLKREQ_WLAN#

footprint short

1 2

RM6 0_0402_5%@RM6 0_0402_5%@

PCIE_NRX_WLANTX_N1 PCIE_NRX_WLANTX_P1

PCIE_NTX_WLANRX_N1 PCIE_NTX_WLANRX_P1

+3V_WLAN

RM10 0_0402_5%RM10 0_0402_5%

1 2

RM11 0_0402_5%RM11 0_0402_5%

1 2

RF:Andros MLK will use DW1702 combo card

A

1

2

@

1 2

@

1 2

PCIE_WAKE#

+1.5VS

CM19

1

2

0.01U_0402_25V7K

JWLAN1

1 3 5 7 9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

ACES_88910-5204

SP01000I100

CM20

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

0.1U_0402_16V7K

B

+1.5VS

UIM_DATA UIM_CLK UIM_RESET UIM_VPP

WWAN_RADIO_OFF# PLT_RST#

WWAN_SMB_CK_R WWAN_SMB_DA_R

1

2

CM21

BT_DISABLEB#

CONN@JWLAN1

CONN@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

GND2

B

CM5

1

2

WWAN@ CM5

WWAN@

0.047U_0402_16V4Z

WWAN_RADIO_OFF# <17> PLT_RST# <13,17,21>

@

1

2

0.1U_0402_16V7K

CM23

AMD@

+UIM_PWR

1 2 1 2

1

2

0.1U_0402_16V7K

CM24

AMD@

Place close to JWWAN1 for AMD

1

2

CM22

4.7U_0805_10V4Z

0.047U_0402_16V4Z

+3V_WLAN

+1.5VS

For Compal LPC debug card

WLAN_RADIO_OFF#

PLT_RST#

WLAN_SMB_CLK_R WLAN_SMB_DAT_R

AMD@

CM25

SP01000MO0L CIS LINK OK

Place close to JWLAN1 for AMD

0.1U_0402_16V7K

RM7

RM7 RM8

RM8

CM2

WWAN@ CM2

WWAN@

CM7

WWAN@ CM7

WWAN@

4.7U_0805_10V4Z

0.1U_0402_16V7K

1

2

USB20_N4_R USB20_P4_R

C

1

CM3

2

WWAN@ CM3

WWAN@

CM8

WWAN@ CM8

WWAN@

0.1U_0402_16V7K

USB20_P5<14>

USB20_N5<14>

Voltage Tolerance

+-9%

+-5%

EC_SMB_CK2 <7,17,21> EC_SMB_DA2 <7,17,21>

C

1

CM4

2

WWAN@ CM4

WWAN@

4.7U_0805_10V4Z

0.047U_0402_16V4Z

+3VS

1

CM9

110 mils

+

2

WWAN@

330U_D2E_6.3VM_R25M

WWAN@

RM3 0_0402_5%

1 2

LM1

@ LM1

USB20_P5 USB20_P5_R

@

1

4

WCM2012F2S-900T04_0805

1 2

RM4 0_0402_5%

WWAN@

2

3

Primary Power Aux Power

Peak Normal Normal

1000 750

250 (Wake enable)

330

500

LPC_LFRAME# <13,17> LPC_LAD3 <13,17> LPC_LAD2 <13,17> LPC_LAD1 <13,17> LPC_LAD0 <13,17>

5 (Not wake enable)

250

NA

375

+1.5VS

1

CM1

2

WWAN@ CM1

WWAN@

0.01U_0402_25V7K

CM6

1

2

WWAN@ CM6

WWAN@

0.01U_0402_25V7K

RM10_0402_5%@RM10_0402_5%

EC_SMB_CK2 <7,17,21>

RM20_0402_5%@RM20_0402_5%

EC_SMB_DA2 <7,17,21>

USB20_N5_R USB20_P5_R

PWR Rail

+3.3V

+3.3Vaux

+1.5V

LPC_LFRAME# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

WLAN_RADIO_OFF# <17>

0_0402_5% @

1 2 1 2

0_0402_5% @

1

AMD@

CM26

2

0.1U_0402_16V7K

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

D

E

SIM Card

UM22

@UM22

@

CM12

@

USB20_N4_RUSB20_N4

33P_0402_50V8J

CM13

1

@

2

+UIM_PWR

1

UIM_RESET

2

UIM_CLK

3

8 9

25 43Wednesday, January 05, 2011

UIM_VPP

+UIM_PWR

UIM_DATA

33P_0402_50V8J

1

2

CM14

1

2

of

1U_0603_10V6K

WWAN@

1.0

UIM_RESET

UIM_CLK

33P_0402_50V8J

CM10

1

@

2

UIM_VPP UIM_DATA

USB20_N5_RUSB20_N5

1

2

3

33P_0402_50V8J

CM11

1

SRV05-4.TCT_SOT23-6~D

2

JSIM1

CONN@JSIM1

CONN@

4

GND

5

VPP

6

I/O

7

DET

TAITW_PMPAT6-06GLBS7N14N0

GND GND

6

5

4

VCC RST CLK

SP07000FV00

RM12 0_0402_5%RM 12 0_0402_5%

1 2

LM2

@ LM2

USB20_P4<14>

USB20_N4<14>

USB20_P4 USB20_P4_R

@

1

4

WCM2012F2S-900T04_0805

1 2

RM13 0_0402_5%RM 13 0_0402_5%

2

3

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

WLAN/WWAN/BT

LA-7161P

E

A

B

C

D

E

BATT CHARGE

+5VALW

QO2B

5

G

RO3

820_0402_5%

BATT_LOW_LED#_D

12

RO6

RO6 300_0402_5%

300_0402_5%

34

D

DMN66D0LDW-7_SOT363-6

S

PWR_LED#_D

BATT_LOW_LED#_D

DO3

21

HT-121BP_WHITE

+5VS

DO1

HT-210UD5-BP5_AMBE R-WHITE

White

2

1

3

Amber

+5VALW

1 1

12

100K_0402_5%

6 pin

JWTB1

1

2

3

4

7

5

G1

5

8

6

G2

6

ACES_88460-00601-P01

CONN@

SP010013W00

2 2

20 pin

JWTB2

GND

10 11 12 13 14 15 16 17 18 19 20

CONN@

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19 20

21

3 3

22

ACES_87213-2000G

PWSUSB_N1 <23> PWSUSB_P1 <23>

USB20_N0 <14> USB20_P0 <14>

MIC2 <24> MIC1 <24> MIC_JD <24>

HP_OUTR <24> HP_OUTL <24> HP_JD <24>

+5V_USB

+USB_SIDE_PWR

USB_DETECT# <23>

BATT_LOW_LED#<17>

Power LED

RO1 100K_0402_5%RO1 100K_0402_5%

PWR_LED#<17>

HD LED

+5VS

SP02000BJ00

QO3A

SATA_ACT#_R<12>

2

G

100K_0402_5%

+5VALW

12

QO1A

2

G

12

QO3B

RO8 100K_0402_5%RO8 100K_0402_5%

5

G

61

D

DMN66D0LDW-7_SOT363-6

S

12

61

D

S

34

D

S

12

RO4

61

D

QO2A

2

G

S

RO2 100K_0402_5%RO2 100K_0402_5%

34

D

QO1B

5

G

S

DMN66D0LDW-7_SOT363-6

RO9

1 2

820_0402_5%

DMN66D0LDW-7_SOT363-6

RO5

100K_0402_5%

DMN66D0LDW-7_SOT363-6

1 2

DMN66D0LDW-7_SOT363-6

SATA_LED#_D

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Size Document Number Rev

Date: Sh eet

Date: Sh eet of

Compal Electronics, Inc.

WTB Conn/LED

LA-7161P

26 43Wednesday, January 05, 2011

E

1.0

of

5

HDD Connector

JHDD1

CONN@ JHDD1

CONN@

D D

23 24

SUYIN_127043FR022G196ZR

C C

GND

A+

A-

GND

B-

B+

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

DAS/DSS

GND

V12

GND

V12

GND

V12

DC010005A00

4

Near CONN side.

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SATA_SRX_DTX_N0_R SATA_SRX_DTX_P0_R

+3VSHDD

+5VS

40 mils

CH5 0.01U_0402_16V7KCH5 0.01U_0402_16V7K

1 2

CH6 0.01U_0402_16V7KCH6 0.01U_0402_16V7K

1 2

3

SATA_STX_DRX_P0 <12> SATA_STX_DRX_N0 <12>

SATA_SRX_DTX_N0 <12> SATA_SRX_DTX_P0 <12>

2

Pleace near HDD CONN (JHDD1)

+5VS

CH2

1

CH3

2

0.1U_0402_16V7K

PJP21

JUMP_43X118

112

Open

1

CH4

2

0.1U_0402_16V7K

2

10U_0805_10V4Z

1

CH1

2

10U_0805_10V4Z

+3VS +3VSHDD

1

2

1000P_0402_50V7K

0.1U_0402_16V7K

@CH9

@CH7

@

1

CH7

2

@

@CH8

@

1

CH8

CH9

2

FAN Control circuit

+FAN_POWER

40mil

1

B B

A A

5

CF1

10U_1206_16V4Z

EN_DFAN1<17>

1

CF2

2

EN_DFAN1

4

+5VS

1000P_0402_50V7K

CF3 10U_1206_16V4ZCF3 10U_1206_16V4Z

1 2

UF23

1

VEN

2

VIN

3

VO

4

VSET

RT9027BPS SO 8P

8

GND

7

GND

6

GND

5

GND

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

FAN_SPEED1<17>

3

+3VS

12

RF1

RF1 10K_0402_5%

10K_0402_5%

1

CF4

0.01U_0402_16V7K

2

+FAN_POWER

2

CONN@

JFAN1

40mil

JFAN1

1

2

3

4

GND

5

GND

ACES_85204-0300N

SP02000JR00

CIS SYMBOL OK

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

FAN/HDD

LA-7161P

27 43Wednesday, January 05, 2011

1

1.0

of

5

4

3

2

1

+5VALW to +5VS Transfer

B+_BIAS +5VALW

12

RZ3

RZ3 100K_0402_5%

100K_0402_5%

D D

SUSP

2

G

5V_RUN_ENABLE

13

D

QZ5

SSM3K7002FU_SC70-3

S

QZ3

NTMS4107NR2G_SO8~D

8 7

5

12

RZ29

@

390K_0402_5%

1 2 36

CZ2

4

1

CZ4

0.1U_0402_25V6

2

+5VS

12

10U_0805_10V4Z

1

RZ6

RZ6 20K_0402_5%

20K_0402_5%

2

+1.5V to +1.5VS Transfer

2M_0402_5%~D

12

rDS=5.2mOHM

1 2 3

4

1

CZ19

0.1U_0402_25V6

2

CZ18

SUSP

B+_BIAS

2

G

12

RZ15

RZ15 100K_0402_5%

100K_0402_5%

1.5V_RUN_ENABLE

13

D

QZ14

QZ14 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

QZ12

SI4634DY-T1-E3_SO8~D

8 7 6 5

RZ31

+1.5VS+1.5V

12

10U_0805_10V4Z

1

RZ16

2

20K_0402_5%

+3VALW to +3V_LAN Transfer

W=40mils

+3VALW

1U_0603_10V6K

B+_BIAS

470K_0402_5%

EN_WOL#<17>

2

G

1

2

12

RZ13

13

D

QZ13

QZ13 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

EN_WOL

CZ11

QZ11

QZ11 SI3456DDV-T1-GE3_TSOP6

SI3456DDV-T1-GE3_TSOP6

D

6

S

45 2 1

G

3

1 2

2200P_0402_50V7K

12

RZ14

1.5M_0402_5%

CZ15

W=40mils

+3V_LAN

22U_0805_6.3V6M

0.1U_0402_16V7K

1

CZ9

CZ10

CZ12

2

@

+3VALW to +3VS Transfer

QZ8

B+_BIAS

12

RZ10

RZ10 100K_0402_5%

100K_0402_5%

C C

SUSP

2

G

3.3V_RUN_ENABLE

13

D

QZ10

SSM3K7002FU_SC70-3

S

QZ8

NTMS4107NR2G_SO8~D

8 7

5

4

12

RZ30

1

2

2M_0402_5%~D

CZ8

0.01U_0402_25V7K

+1.1VALW to +1.1VS Transfer

2M_0402_5%~D

12

rDS=5.2mOHM

4

1

CZ21

0.1U_0402_25V6

2

QZ15

B+_BIAS

12

RZ21

RZ21 470K_0402_5%

470K_0402_5%

13

D

B B

SUSP

D

2

G

S

+1.1VALW

1.1V_RUN_ENABLE

QZ16

QZ16 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

SI4634DY-T1-E3_SO8~D

8 7 6 5

RZ32

+3VS+3VALW

1 2 36

CZ5

1 2 3

10U_0805_10V4Z

CZ20

12

@

1

2

+1.1VS

12

@

RZ12

RZ12 20K_0402_5%

20K_0402_5%

RZ25

RZ25 20K_0402_5%

20K_0402_5%

DZ3

BAT54CW_SOT323-3~D

DZ3

RTCVREF +COINCELL

12

RZ28

RZ28 1K_0402_5%

1K_0402_5%

2

3

1

CZ24

CZ24 1U_0603_10V6K

1U_0603_10V6K

2

+RTCVCC

SUSP#<17,39,41>

1 2

RZ8 10K_0402_5%RZ8 10K_0402_5%

2

G

+5VALW

12

13

RZ7

RZ7 100K_0402_5%

100K_0402_5%

SUSP

SSM3K7002FU_SC70-3

QZ6

D

S

SUSP <37>

10U_0805_10V4Z

1

2

Discharg Circuit

12

+5V_RUN_CHG

+1.5VS +3VS+5VS +0.75VS+1.1VS +1.05VS

@

RZ19

RZ19 1K_0402_5%

1K_0402_5%

12

+1.5V_RUN_CHG

@

RZ23

RZ23 1K_0402_5%

1K_0402_5%

12

+3.3V_RUN_CHG

RZ24

RZ24 39_0402_5%

39_0402_5%

12

+1.1V_RUN_CHG

@

RZ20

RZ20 39_0402_5%

39_0402_5%

12

+DDRVTT_CHG

RZ18

RZ18 22_0603_5%

22_0603_5%

12

RZ35

RZ35 470_0603_5%

470_0603_5%

+1.05V_RUN_CHG

+1.05V to +1.05VS Transfer

SSM3K7002FU_SC70-3

@

QZ18

13

D

2

G

S

2M_0402_5%~D

12

rDS=5.2mOHM

1 2 3

CZ26

4

1

CZ27

0.1U_0402_25V6

2

+1.05VS

12

10U_0805_10V4Z

1

RZ33

RZ33 20K_0402_5%

20K_0402_5%

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

SUSP

QZ22

B+_BIAS

12

RZ22

RZ22 470K_0402_5%

470K_0402_5%

13

D

SUSP

A A

D

2

G

S

+1.05V

1.05V_RUN_ENABLE

QZ17

QZ17 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

5

SI4634DY-T1-E3_SO8~D

8 7 6 5

RZ34

SSM3K7002FU_SC70-3

@

QZ19

13

D

2

G

S

2

SSM3K7002FU_SC70-3

QZ20

13

D

2

G

SUSPSUSPSUSP SUSP

S

SSM3K7002FU_SC70-3

@

QZ21

13

D

2

G

SUSP

S

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

SSM3K7002FU_SC70-3

QZ23

13

D

2

G

S

Compal Electronics, Inc.

DC/DC (Power control)

LA-7161P

13

D

2

G

S

1

SSM3K7002FU_SC70-3

QZ25

1.0

28 43Wednesday, January 05, 2011

1.0

of

A

B

C

D

E

RZ26

100K_0402_5%

+3VALW

1000P_0402_50V7K

12

1

CZ23

2

ON/OFF_EC# <17>

51ON# <23,33>

12

DZ2

GLZ20A_LL34

MB_Power On/Off SW

JPWR1

H19

H3

H2

H_2P8H3H_2P8

H_2P8H2H_2P8

H10

H10 H_3P2

H_3P2

H15

H15 H_4P0

H_4P0

1

H11

H11 H_3P2

H_3P2

1

H16

H16 H_4P0

H_4P0

1

1 1

H5

H6

H_2P8H5H_2P8

H_2P8H6H_2P8

1

H12

H12 H_3P2

H_3P2

1

@

H7 H_2P8H7H_2P8

1

FD2@FD2

FD1@FD1

@

1

ZZZ

PCB

DAZ0I800100

H8 H_2P8H8H_2P8

1

FD3@FD3

@

1

H9 H_2P8H9H_2P8

H19 H_2P8

H_2P8

1

FD4@FD4

@

1

CONN@

ACES_88514-0401

SP01000R400

CIS SYMBOL OK

+3VALW

1

CZ25

0.1U_0402_25V6

2

Place closed to JPWR1

JPWR1

1 2 3 4

GND GND

ON/OFFBTN# LID_SW#

+3VALW

DZ1

1 2 3 4

5 6

LID_SW# ON/OFFBTN#

2

3

DZ4

1

PESD24V_SOT23-3

LID_SW# <17>

CZ22

0.1U_0402_25V6

1

2

DZ1

1

DAN202UT106_SC70-3

QZ24

QZ24 2N7002LT1G_SOT23-3

2N7002LT1G_SOT23-3

EC_ON<17,35>

RZ27

10K_0402_5%

2

3

13

D

2

G

S

1 2

(For ESD request)

H17

H18

H_3P4x3P9

H_3P4

2 2

H_3P4

1

10/08 ESD: Change DZ4 to SCA00000R00

+5VS

CE15

1U_0402_6.3V6K

Touch/B Connector

TP_CLK<17>

2

TP_DATA<17>

1

CONN@

JTP1

1

VCC

2

NC

3

Num_Lock

4

1

CE16

CE17

2

100P_0402_50V8J

GND

5

GND

6

GND

ACES_88514-0401

SP01000R400

Vendor pin defined

1. VDD

2. PS2CLK

3. PS2DATA

4. GND

3 3

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Size Document Number Rev

Date: Sh eet of

Date: Sh eet

Compal Electronics, Inc.

SW/TP/PWR/SCREW

LA-7161P

29 43Wednesday, January 05, 2011

E

1.0

of

5

9HUVLRQ&KDQJH/LVW3,5/LVW

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,WHP

,WHP,WHP

3DJH 7LWOH

3DJH3DJH

7LWOH 5HY

7LWOH7LWOH

'DWH

'DWH'DWH

4

5HTXHVW

5HTXHVW5HTXHVW 2ZQHU

2ZQHU

2ZQHU2ZQHU

,VVXH'HVFULSWLRQ

,VVXH'HVFULSWLRQ'DWH

,VVXH'HVFULSWLRQ,VVXH'HVFULSWLRQ

3

6ROXWLRQ'HVFULSWLRQ

6ROXWLRQ'HVFULSWLRQ3DJH

6ROXWLRQ'HVFULSWLRQ6ROXWLRQ'HVFULSWLRQ

ıĲ ıĸ ōŗŅŔ ıĺİĳĹ ņņ ōńŅġőŢůŦŭġťŪŴűŭŢźġŢţůŰųŮŢŭ ŔŸŢűġōŗŅŔġőŰųŵ

2

1

5HY,WHP

5HY5HY

ıįĳ

ıĳ ĳı ıĺİĳĹ ōńŅŠőŘŎ łťťġĳĳıġŰũŮġŃŦŢťġŢŵġōńŅŠőŘŎġĩŃōŎĲĹŃŃĳĳĲŔŏĪ

D D

ōŗŅŔ ņŎŊ

ıĴ Ĳĸ ŃŰŢųťġŊŅ ıĺİĳĹ ņņ ńũŢůŨŦġŃŰŢųťġŊŅġŵŰġřıĲ ńũŢůŨŦġœņĴĶġŵŰġĹįĳŌ

ıĵ Ĳĸ łńŊŏ ıĺİĳĹ ņņ ńũŢųŨŦġŭŦťġŢŭŸŢźŴġŭŪŨũŵġŸũŦůġŶůűŭŶŨġłń ńũŢůŨŦġœņĴĳġŵŰĲĶıŌ

ıįĳ

ıįĳıĶ ĳĺ őŰŸŦųġŃŶŵŵŰůġņŔŅ ĲıİıĹ ņŔŅ őŰŸŦųġŃŶŵŵŰůġņŔŅġőųŰŵŦŤŵŪŰů ńũŢůŨŦġŅśĵġŵŰġŔńłıııııœıı

ıķ Ĳĺ ŗňł ĲıİıĹ ņŎŊ ńœŕġņŎŊġŏŰŪŴŦ ńũŢůŨŦġōŗĶļōŗķļōŗĸġŵŰġŔŎıĲıııŇőıı

ıįĳ

ıįĳıĸ ĳĲ ōłŏ ĲıİıĹ ņŎŊ ōłŏġņŎŊġŏŰŪŴŦ ńũŢůŨŦġŕœōĲġŵŰġŔőıĶıııķŏıı

ıįĳıĹ ĲĴļĲĵ Ňńŉ ĲıİĲĲ œŇ œŇġŏŰŪŴŦ łťťġńŇĳıġħġńŇĹĳġĴĴőŇ

ıĺ ıĺ łőŖġőŘœ ĲıİĲĵ ņņ łŎŅġńœŃġœŦŷġńġŶűťŢŵŦ ōŖĲĭġōŖĳĭġōŖĵġŤũŢůŨŦġŵŰġıŠıĹıĶ

ıįĳ

ıįĴĲı ıĸ ōŕŅőŠłŖř ĲĲİıĳ ņņ łŎŅġńũŦŤŬġŭŪŴŵġŶűťŢŵŦ œŖĲĵĭœŖĲĶĭœŖĳĴĭœŖĳķġŤũŢůŨŦġŵŰġĳŌġŰũŮġűŶŭŭġŶűġŵŰġĬĶŗŔ

C C

ĲĲ ıĸ ōŕŅőıŠŉőŅ ĲĲİıĳ ņņ łŎŅġńũŦŤŬġŭŪŴŵġŶűťŢŵŦ łťťġœŖĳĳġĲııŬġŰũŮġġűŶŭŭġŶűġŵŰġĬĶŗŔ

ıįĴ

Ĳĳ ıįĴĲĸ ŃŰŢųťġŊŅ ĲĲİĲĸ ņņ ńũŢůŨŦġŃŰŢųťġŊŅġŵŰġřıĳ ńũŢůŨŦġœņĴĶġŵŰġĲĹŌ

ĲĴ ıįĴĲıļĲĲ ŅŅœŊŊŊĮŔŐŅŊŎŎ ĲĲİĳĳ ņŎŊ ŅŅœġņŎŊġŏŐŊŔņ őŐőġńŅĺĭńŅĲıĭńŅĲĲĭńŅĲĳĭńŅĲĴĭńŅĲĵĭńŅĴĲĭńŅĴĳĭńŅĴĴĭńŅĴĵĭńŅĴĶĭńŅĴķ

Ĳĵ ıįĴĲĸ ņŏņĮŌŃĺĳķ ĲĲİĳĳ ņŔŅ łťťġıįĲŶŇġŤŢűŴġŰůġńņĳĶġħġńņĳĺ

ĲĶ ıįĴĲĹ ŉŅŎŊ ĲĲİĳĳ ņŔŅ łťťġıįĲŶŇġŤŢűŴġńŗĴķġŰůġĬĴŗŔġŵųŢŤŦġŰŧġŵŰűġŴŪťŦġŭŢźŰŶŵį

Ĳķ ıįĴ

ĳĲ ōłŏ ĲĲİĳĳ ņŔŅ ņŔŅ łťťġıįĲŶŇġŤŢűŴġńōĹĵġŰůġĬĴŗŠōłŏġŵųŢŤŦġŰŧġŵŰűġŴŪťŦġŭŢźŰŶŵį

ĳĳ ńŢųťġœŦŢťŦų ĲĲİĳĴ œŇ ŎŰŶůŵġœŃĹľĲıĭńŃĲĳľĳĳőĲĸ ıįĴ

Ĳĳ Ňńŉ ĲĲİĳĴ œŇ ŎŰŶůŵġńŇĹıľĴĴőĲĹ ıįĴ

ņŔŅ

œŇġŏŰŪŴŦ

B B

Ĳĺ ŗňł ĲĲİĴı ņņ ńũŢůŨŦġœŗĴĲġħġœŗĴĳġŧųŰŮġĵįĸŌġŵŰġĳŌĲĺ ıįĴ

Ĳĸ ĲĳİĲı ņņ ŖůűŰűġœņĴĶĳı Ĳįı

ŃŰŢųťġŊŅ ńũŢůŨŦġŃŰŢųťġŊŅġŵŰġłıı

łŎŅġńũŦŤŬġŭŪŴŵġŶűťŢŵŦ

Ĳĺ ŗňł ĲĳİĲı ŔŢŧŦŵź ŅŦŭŦŵŦġœŗķĸġįġőŰűġŇŗĳĳĲ ĲįıōőŔġŵŦŴŵġŧŢŪŭ

ĳĹ ŅńİŅń ĲĳİĲķ ŔŢŧŦŵź łťťġœśĳĹġţŦŵŸŸůġĬńŐŊŏńņōōġŢůťġŅśĴġűŪůĳĳĳ Ĳįı

ĳı ōŗŅŔ ĲĳİĳĴ ņņ ŅŦűŰűġŅŗķġħġœŗĵĵġįġőŰűġŅŗĲĵġħġœŗĶĲġĳĴ Ĳįı

A A

ŔŢŧŦŵźġœŕńġţŢŵŵŦųźġŵŦŴŵġŧŢŪŭ

ņńġťŢŮŢŨŦ

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sh eet of

Compal Electronics, Inc.

HW PIR

LA-7161P

30 43Wednesday, January 05, 2011

1

1.0

5

4

3

2

1

Power block

D D

CPU OTP

Page 33

Turn Off

DC IN

Input Switch

Page 34

CHARGER CC:0A~3.3A CV:13.05V(6/9cell)

C C

ISL6251AHAZ-T

Page 35

B+

+3VALWP TDC= 4.6A Ipeak= 6.56A +5VALWP TDC= 6.22A Ipeak= 8.88A

RT8205E

+3VALW for Vin +5VALW for VCNTL

+1.8VP TDC= 1.51A Ipeak= 2.15A

APL5912

MAINPWON

Page 36

SUSP#

Page 40

Battery

+1.1VALWP TDC= 3.5A Ipeak= 5A

TPS51218DSCR

Page 37

+1.5VP TDC= 4.36A Ipeak= 6.23A

B B

TPS51218DSCR

Page 39

SPOK

SYSON

+1.5VP for Vin +3VALW for VCNTL

+APU_CORE(1.375V~1.5V)

+0.75VSP TDC= 0.35A Ipeak= 0.5A

APL5336

SUSP

Page 38

TDC=7.7A

VR_ON

Ipeak=11A

+APU_CORE_NB TDC=7A Ipeak=10A

A A

5

ISL6265AHRTZ-T

Page 42

4

3

+1.05VP TDC= 4A Ipeak= 5.7A

TPS51218DSCR

2

Page 43

Title

POWER BLOCK DIAGRAM

Size Document Number Rev

Date: Sheet

SUSP#

of

31 43Wednesday, January 05, 2011

of

31 43Wednesday, January 05, 2011

of

31 43Wednesday, January 05, 2011

1

A

B

C

D

CPU OTP

1

@

PD1

PJSOT24C_SOT23-3

BATT+

1 1

BATT+

12

PC3

100P_0402_50V8J

PJPB1 battery connector

60$57

60$5760$57 %DWWHU\

%DWWHU\

%DWWHU\%DWWHU\

%$7

%$7%$7 %$7

%$7

%$7%$7 ,'

,'

,',' %,

%,

%,%, 76

76

7676 60'

60'

60'60'

2 2

60&

60&60& *1'

*1'

*1'*1' *1'

*1'

*1'*1'

PL1

1 2

SMB3025500YA_2P

PC4

0.01U_0402_25V7K

BATT++

12

PC1

1000P_0402_50V7K

PJBAT1

ME@ PJBAT1

ME@

1

2

3

4

5

6

7

7 GND GND

8

9

10 11

SUYIN_200275MR009G186ZL

BATT++

12

PC2

100P_0402_50V8J

+3VALWP

PR2

47K_0402_5%

1 2

PR8

1 2

100_0402_1%

PR10

1 2

100_0402_1%

3S <34>

PJSOT24C_SOT23-3

2

3

1K_0402_1%~D

EC_SMB_DA1 <17>

EC_SMB_CK1 <17>

PR5

1

PD2

@ PD2

@

PJSOT24C_SOT23-3

2

3

Place clsoe to EC pin

PR3

BATT_TEMP

1 2

1K_0402_1%~D

12

PR6

1 2

6.49K_0402_1%~D

PC5

@ PC5

@

0.1U_0402_16V7K

1 2

BATT_TEMP <17>

+3VALWP

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C Recovery at 50 +-3 degree C

1

O

PU1A

LM393DG_SO8

12

VL

PR1

PR1 47K_0402_1%

47K_0402_1%

1 2

VL

PR4

12

PH1

PR4

47K_0402_1%

1 2

VS

100K_0402_1%_TSM0B104F4251RZ

PR7

13.7K_0402_1%

1 2

TM_REF1

12

PC6

0.22U_0603_25V7K

12

PR11

16.9K_0402_1%

PC7

1000P_0402_50V7K

3

2

PR9

12

100K_0402_1%

PR12

PR12 100K_0402_1%

100K_0402_1%

8

P

+

-

G

4

2

G

MAINPWON <33,35>

PQ1

13

D

SSM3K7002FU_SC70-3

S

PQ2

TP0610K-T1-E3_SOT23-3

B+

12

@

PR13

100K_0402_1%

2

G

100K_0402_1%

PR14

1 2

22K_0402_1%

13

D

PQ3

SSM3K7002FU_SC70-3

S

3 3

SPOK<35,36>

4 4

PR15

100K_0402_1%

+5VALW

1 2

PR16

1 2

0_0402_5%

0.1U_0402_16V7K~D

PC10

12

@

A

12

PC8

0.22U_0603_25V7K

13

2

12

PC9

@ PC9

@

0.1U_0603_25V7K

B

B+_BIAS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31 2011/07/31

Compal Secret Data

COIN RTC Battery

ME@

PJRTC1

+COINCELL

Deciphered Date

C

1

+

LOTES_AAA-BAT-054-K01_2P_BATT

2

-

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP / B+_BIAS / RTC

1.0

LA7161

D

32 43Wednesday, January 05, 2011

1.0

of

A

ADPIN

PL2

DC_IN_S1

ME@

PJDC1

1

2

3

1 1

2 2

4

5

6

7

GND

8

GND

ACES_88299-0600

VIN

VIN1

@

PR25

1 2

1K_1206_5%

@

PR26

1 2

1K_1206_5%

@

PR27

1 2

1K_1206_5%

@

PR30

1 2

1K_1206_5%

12

PC12

1000P_0402_50V7K

PL3

FBM-L11-160808-601LMT 0603~D

@

RLS4148_LL34-2

PD7

DOCK_PSID

12

PR28

@

12

100K_0402_5%

PR29

@

1 2

SMB3025500YA_2P

12

PC13

100P_0402_50V8J

@

PQ6

PQ6 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

12

100K_0402_5%

PL2

2

12

PC14

PC14 100P_0402_50V8J

100P_0402_50V8J

13

B

VIN

12

PC15

PC15 1000P_0402_50V7K

1000P_0402_50V7K

DOCK_PSID

2

3

@

1

PD5

PD5 SM24_SOT23

B+

SM24_SOT23

C

+5VALW

2

PQ4

FDV301N_NL_SOT23-3~D

PQ4

@

PR18

1 2

0_0402_5%

D

1 3

2

S

1 2

33_0402_5%~D

G

PR20

3

PD4

1

DA204U_SOT323~D

+5VALW

PR21

1 2

100K_0402_1%

PR23

1 2

15K_0402_1%~D

C

PQ5

2

B

MMST3904-7-F_SOT323~D

E

3 1

12

PR22

10K_0402_1%

@

1 2

10K_0402_1%

PR24

D

+3VALW

PD6

@ PD6

@

1 2

+5VALW

PR19

2.2K_0402_5%~D

2

3

1

PS_ID <17>

DA204U_SOT323~D

PSID_DISABLE# <17>

ACIN

Precharge detector

Min. typ. Max. H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V

12

@

PR31

PR31 100K_0402_5%

100K_0402_5%

13

@

PQ8

PQ8 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

ACOFF<17,34>

+5VALW

@

PD8

2

3

RB715F_SOT323-3

@

PQ7

DTC115EUA_SC70-3

PQ7

1

13

2

VIN

3 3

PD10

BATT+

PR163

CHGRTCP

1 2

200_0603_5%

51ON#<23,29>

4 4

A

RLS4148_LL34-2

100K_0402_1%

PR35

1 2

22K_0402_1%

RTCVREF

3.3V

12

PC135

10U_0805_6.3V6M

12

PR34

3

Pre_V

12

PC16

0.22U_0603_25V7K

PU10

PU10 G920AT24U_SOT89

G920AT24U_SOT89

OUT

GND

1

PQ9

PQ9 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

N2

2

IN

2

12

PR164

PR164 200_0603_5%

200_0603_5%

12

PC134

PC134 1U_0805_25V6K

1U_0805_25V6K

68_1206_5%

13

PR32

PD9

RLS4148_LL34-2

1 2

12

PR33

PR33 68_1206_5%

68_1206_5%

12

PC17

0.1U_0603_25V7K

B

BATT ONLY

Precharge detector

Min. typ. Max. H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V

VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VL

12

@

PR171

100K_0402_1%

@

PD16

MAINPWON<32,35>

ACON<34>

2

3

RB715F_SOT323-3

1

12

0.1U_0603_25V7K

PC137

PU1B

LM393DG_SO8

@

7

RTCVREF

Compal Secret Data

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

C

@

PR167

2.2M_0402_5%

VS

8

P

O

G

4

@

PR169

34K_0402_1%

B+

12

@

PR168

PR168 499K_0402_1%

499K_0402_1%

5

+

6

-

12

PC136

@

1000P_0402_50V7K

12

@

PR165

PR165 191K_0402_1%

191K_0402_1%

PRG++

PQ42

13

D

RHU002N06_SOT323-3

S

Title

Size Document Number Rev

Custom

Date: Sheet

499K_0402_1%

@

2

G

Compal Electronics, Inc.

12

@

PR166

@

47K_0402_5%

13

@

DCIN & DETECTOR

LA7161

D

12

PR170

12

PQ45

PQ45 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

PC93

@PC93

@

0.01U_0402_25V7K

33 43Wednesday, January 05, 2011

PACIN <34>

+5VALW

of

1.0

A

B

C

D

CP = 90%*Iadapter (rating); CP = 3.003A

Iada=0~3.34A(65W)

PQ11

AO4407A_SO8

PQ13

2

PQ15

PQ15 DTC115EUA_SC70-3

DTC115EUA_SC70-3

1 2

22K_0402_5%

ACOFF

AO4407A_SO8

8 7

5

1 3

PR59

2

VIN

1 1

12

PR38

PR38 47K_0402_1%

47K_0402_1%

DTA144EUA_SC70-3

13

V1

2

13

D

2 2

3 3

D

2

G

S

PQ18

PQ18 RHU002N06_SOT323-3

RHU002N06_SOT323-3

PACIN<33>

ACON<33>

ACOFF<17,33>

CP mode

ADP_I = 19.9*Iadapter*Rsense

PQ12

P2

SI4459ADY-T1-GE3_SO8

1 2 3 6

12

PR39

PR39 200K_0402_1%

200K_0402_1%

6251VDD

12

13

D

PQ21

PQ21 RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

IREF<17>

4

12

PC23

150K_0402_1%

13

1 2 36

0.1U_0603_25V7K

PR51

2

G

PQ23

PQ23 DTC115EUA_SC70-3

DTC115EUA_SC70-3

4

PR48

1 2

47K_0402_5%

3S<32>

PR60

150K_0402_1%

100K_0402_1%

8 7

5

PC24

1 2

5600P_0402_25V7K

1SS355TE-17_SOD323-2

FSTCHG<17>

13

2

PC34

1 2

0.01U_0402_25V7K

12

PR63

6251VREF

P3

PQ16

PQ16 DTC115EUA_SC70-3

DTC115EUA_SC70-3

1 2

ADP_I<17>

12

PC41

0.01U_0402_25V7K

PR65

1 2

11.5K_0402_1%

0.02_2512_1%

1

2

6251VDD

ACSETIN

1 2

PD13

PR47

10K_0402_5%

PC27

1 2

0.1U_0402_16V7K

PC32

1 2

6800P_0402_25V7K

PR55

10K_0402_1%

PC35

1 2

0.1U_0402_16V7K

12

PR66

2.74K_0402_1%~D

PR36

12

PR49

100K_0402_1%

PR57

1 2

100_0402_1%

6251VREF

4

3

12

PC25

6251_EN

6251ACLIM

2.2U_0603_6.3V6K

RB751V-40_SOD323-2

PU2

1

VDD

DCIN

2

ACSET

ACPRN

3

EN

CSON

4

CELLS

CSOP

5

ICOMP

CSIN

6

VCOMP

CSIP

7

PHASE

ICM

8

UGATE

VREF

9

CHLIM

BOOT

10

ACLIM

VDDP

11

VADJ

LGATE

12

PGND

GND

ISL6251AHAZ-T_QSOP24

PL13 453215-121LMA90T 1812PL13 453215-121LMA90T 1812

1 2

PJP1

@

2

112

CSIN

JUMP_43X118

PR40

1 2

0_0402_5%

1 2

12

PC26

1000P_0402_50V7K

PC29

DCIN

ACPRN

PC30

0.047U_0603_16V7K

1 2

PR53 20_0603_5%PR53 20_0603_5%

PC33

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

PR62

1 2

2.2_0603_5%

CSIP

12

ACPRN <35>

PR54 20_0603_5%PR54 20_0603_5%

1 2

PR56

PC42

4.7U_0805_6.3V6K

1 2

VIN

PD11

PR44

10_1206_5%~D

24

0.1U_0603_25V7K

23

22

21

20

19

18

17

BST_CHG BST_CHGA

16

6251VDDP

15

DL_CHG

14

13

VIN1

@

PR41

1 2

0_0402_5%

PR42

191K_0402_1%~D

ACSETIN

PR46

15K_0402_1%~D

PR50

1 2

20_0603_5%

12

2.2_0603_5%

12

0.1U_0603_25V7K

PD15

PD15 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

PR64

1 2

4.7_0603_5%

PC36

6251VDD

PC18

CSOP

12

CSON

PC19

10U_0805_25V6K

12

PC20

10U_0805_25V6K

PQ22

SI4128DY-T1-GE3

0.1U_0603_25V7K

PC22

12

578

CHG_B+

12

PC21

10U_0805_25V6K

2200P_0402_25V7K

DTC115EUA_SC70-3

PQ19

SI4128DY-T1-GE3

3 6

241

10UH_PCMB063T-100MS_4A_20%

3 6

241

B+

PQ10

AO4407A_SO8

1 2 3 6

4

PR43

10K_0402_1%

1 2

PQ14

13

PL4

1 2

12

PR61

4.7_1206_5%

12

PC40

PC40 680P_0603_50V_NPO

680P_0603_50V_NPO

8 7

5

PR37

1 2

47K_0402_1%

1 2

2

12

PC31

PR52

@

100K_0402_5%

V1

CHG

1

2

VIN

@

PD12

1SS355TE-17_SOD323-2

1 2

200K_0402_1%

PR58

PD14

@

PQ20

@

12

PC28

4

3

200K_0402_1%

D

S

@

1SS355TE-17_SOD323-2

1 2

2200P_0402_50V7K~D

0.02_2512_1%

ACOFF

@

PR45

PQ17

@

PQ17

@

RHU002N06_SOT323-3

13

D

2

G

S

0.1U_0603_25V7K

13

ACPRN

2

G

SSM3K7002FU_SC70-3

PC37

12

10U_0805_25V6K

ACOFF <17,33>

VIN

PACIN <33>

ACPRN <35>

BATT+

PC38

PC39

12

10U_0805_25V6K

Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05)

Vaclim=2.39*((2.74K//152K)/((2.74K//152K)+(11.5K//152K)))

CHGVADJ<17>

CC=0.6~3.3A

IREF=1*Icharge

IREF=0.6V~3.3V

4 4

CHGVADJ CV mode

0V

1.91V

3.3V

3.99V per cell

4.2V per cell

4.35V per cell

PR67

1 2

18.2K_0402_1%

PR68

31.6K_0402_1%

6251VDD

12

PR69

47K_0402_1%

ACPRN

ACPRN<35>

SSM3K7002FU_SC70-3

12

PQ24

2

G

12

PR70

10K_0402_1%

13

D

S

PR71

10K_0402_1%

1 2

12

PR72

14.3K_0402_1%

ACIN <14,17>

PACIN <33>

Security Classification

Issued Date

-

A

B

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2011/07/312010/07/31

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CHARGER

LA7161

34 43Wednesday, January 05, 2011

D

34 43Wednesday, January 05, 2011

1.0

of

5

Note: Use RT8205E to replace TPS51125 IC can remove RTC refernece LDO Use RT8205E to replace TPS51427 IC must keep RTC refernece LDO

3.3VALWP Thermal Design Current=4.6A Peak Current=6.56A OCP min=8.53A

D D

H/S RDS(on) 27m ohm(typ),35m ohm(max) L/S RDS(on) 11.7m ohm(typ),14.2m ohm(max) FSW 375KHz Delta_Iin=0.8306A Delta_Io=2.2154A

RT8205E_B+

PJP2

B+

C C

B B

PJP2

2

JUMP_43X118

+3VALWP

112

12

PC47

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D 2200P_0402_50V7K~D

2200P_0402_50V7K~D

PL5

680P_0402_50V7K~D

PQ29B

12

PR81

4.7_1206_5%

12

PC59

ENTRIP1 ENTRIP2

3

5

4

2

12

PC44

PC45

PC46

0.1U_0603_25V7K

1

+

PC56

2

330U_D_6.3VM_R18M~D

DMN66D0LDW-7 2N SOT363-6

PC46

4.7U_0805_25V6K~D

3.3UH_PCMB064T-3R3MS_7A_20%

4

+3VALWP

578

PQ25

PQ25 AO4466_SO8

AO4466_SO8

3 6

241

786

5

PQ27

PQ27 AO4710_SO8

AO4710_SO8

4

123

B+

VS

Pre_V

61

PQ29A

DMN66D0LDW-7 2N SOT363-6

Typ: 175mA

12

PC49

4.7U_0805_10V6K~D

0.1U_0603_25V7K

PR83

@ PR83

@

499K_0402_1%~D

1 2

PR86

499K_0402_1%~D

1 2

PR87

@ PR87

@

499K_0402_1%~D

1 2

+3VLP

PC54

MAINPWON<32,33>

1 2

12

0_0603_5%

PR79

PR84

100K_0402_1%

@

1 2

0_0402_5%

12

3

2VREF_RT8205E

PR73

13K_0402_1%~D

1 2

PR75

20K_0402_1%~D

1 2

ENTRIP2

PR77

105K_0402_1%

1 2

PU3

25

P PAD

7

VO2

8

BST_3V

UG_3V

LX_3V

LG_3V

PR129

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

12

PC61

1U_0603_10V6K~D

2VREF_RT8205E

PC43

1U_0603_10V6K~D

6

5

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

1 2

PR85

@ PR85

@

0_0402_5%

RT8205E_B+

2

1

5VALWP Thermal Design Current=6.22A Peak Current =8.88A

12

OCP min=11.55A H/S RDS(on) 27m ohm(typ),35m ohm(max) L/S RDS(on) 11.7m ohm(typ),14.2m ohm(max) FSW 300KHz Delta_Iin=2.4598A

PR74

30K_0402_1%~D

1 2

PR76

20K_0402_1%~D

1 2

ENTRIP1

PR78

124K_0402_1%

1 2

3

1

2

4

FB1

REF

TONSEL

ENTRIP1

24

VO1

23

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

15

12

PC62

12

22U_0805_6.3V6M

PC63

0.1U_0603_25V7K

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205EGQW_W QFN24_4X4

VL

Typ: 175mA

Delta_Io=5.6333A

RT8205E_B+

12

PC50

PC48

4.7U_0805_25V6K~D

SPOK <32,36>

PC55

0.1U_0603_25V7K

PR80

1 2

0_0603_5%

12

+5VALWP

12

PC52

PC51

2200P_0402_50V7K~D

12

0.1U_0603_25V7K

12

PC53

4.7U_0805_25V6K~D

PQ28

AO4710_SO8

578

PQ26

AO4466_SO8

3 6

241

PL6

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

786

5

12

PR82

4.7_1206_5%

4

12

680P_0402_50V7K~D

123

PC60

1

+

2

+5VALWP

1

+

PC58

PC57

2

@

330U_D_6.3VM_R18M~D

12

VL

MAINPWON<32,33>

PR90

1 2

VS

100K_0402_1%

PR92

1 2

ACPRN<34>

100K_0402_1%

A A

100K_0402_1%

EC_ON<17,29>

DTC115EUA_SC70-3

PQ32

2

13

5

1 2

0_0402_5%

PQ31

13

D

G

S

RHU002N06_SOT323-3

PR89

PR91

12

PR88

100K_0402_1%

12

40.2K_0402_1%~D

PC64

13

2

PQ30

PQ30 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2.2U_0603_16V5K~D

PJP5

2

112

JUMP_43X118

PJP6

+3VALWP +3VALW

2

JUMP_43X118

112

4

Security Classification

2010/07/31 2011/07/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31 2011/07/31

3

Compal Secret Data

Deciphered Date

2

PJP3

2

112

JUMP_43X118

JUMP_43X118 PJP4

PJP4

+5VALWP +5VALW

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

+5VALWP/+3VALWP

2

LA7161

112

JUMP_43X118

1

35 43Wednesday, January 05, 2011

of

1.0

A

1 1

B

C

D

B+

12

PC66

PC65

0.1U_0603_25V7K

2200P_0402_50V7K~D

12

PC67

4.7U_0805_25V6K~D

PC69

PC68

4.7U_0805_25V6K~D

B+

+1.5VP

12

@

PR93

0_0402_5%

2 2

PR96

1 2

36.5K_0402_1%

PC71

36.5K_0402_1%

12

PR97

SPOK<32,35>

3 3

1 2

0_0402_5%

@

0.1U_0402_16V7K

PR100

1 2

20K_0402_1%~D

PC77

@ PC77

@

1 2

0.1U_0603_25V7K

PR94

@ PR94

@

100K_0402_1%

PG_1.1VALWP

TRIP_1.1VALWP

EN_1.1VALWP

FB_1.1VALWP

RF_1.1VALWP

12

PR99

PR99 470K_0402_5%~D

470K_0402_5%~D

PR101

11.5K_0402_1%

PU4

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR_SON10_3X3~D

12

VBST

DRVH

V5IN

DRVL

PC70

PR95

1 2

2.2_0603_5%

BST_1.1VALWP

10

UG_1.1VALW P

9

SW_1.1VALW P

8

SW

TP

7

6

11

V5IN_1.1VALWP

LG_1.1VALWP

PC70

1 2

0.22U_0603_25V7K

+5VALW

1

PC72

PC72 1U_0603_6.3V6M~D

1U_0603_6.3V6M~D

2

4

D6D5D7D

G

S

3

2

786

5

8

PQ33

FDS6298_SO8~D

S

1

PQ34

SI4634DY-T1-E3_SO8

123

PL7

1 2

2.2UH_PCMC063T-2R2MN_8A_20%

12

PR98

4.7_1206_5%

12

PC76

PC76 680P_0603_50V_NPO

680P_0603_50V_NPO

12

PC73

0.1U_0402_10V7K~D

+1.1VALWP

1

+

PC75

10U_0805_6.3V6M~D

PC75

330U_D2_2.5VY_R9M

2

PJP8

PJP8 JUMP_43X118

JUMP_43X118

2

112

+1.1VALW

PC74

2

+1.1VALWP Thermal Design Current=3.5A Peak Current=5A OCP min=6.5A Fsw=290KHZ

Delta I=1.6269A L/S MOS Rds(on)=5.5m ohm (Typ) ; 6.7m ohm(Max)

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

+1.1VALWP

Wednesday, January 05, 2011

LA7161

D

of

36 43

1.0Custom

A

B

C

D

+1.5V

1

PJP10

1

JUMP_43X79

2

1 1

4.7U_0805_6.3V6K

SSM3K7002F_SC59-3

PR103

SUSP<28>

2 2

1 2

10K_0402_1%

SSM3K7002F_SC59-3

PC82

2

PC78

1 2

PQ35

13

D

2

G

12

S

0.1U_0402_16V7K

+0.75VSP

PR102

0.75V

PR104

12

1K_0402_1%~D

PJP11

2

JUMP_43X118

12

PC80

112

2

3

4

12

PC81

10U_0603_6.3V6M~D

0.1U_0402_16V7K

PU5

VIN1VCNTL

NC

GND

VREF

NC

VOUT

NC

TP

APL5336KAI-TRL_SO8

+0.75VSP

+0.75VS

6

5

7

8

9

+3VALW

12

PC79

1U_0603_10V6K~D

+0.75VSP Thermal Design Current=0.35A Peak Currnet=0.5A OCP min=0.65A

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

+0.75VSP

Wednesday, January 05, 2011

LA7161

D

of

37 43

1.0Custom

5

D D

4

3

+1.5VP_B+

2

PJP12

2

112

JUMP_43X118

1

B+

12

PC84

PC83

0.1U_0603_25V7K

2200P_0402_50V7K~D

12

PC86

PC85

4.7U_0805_25V6K~D

+1.5VP

12

@

PR105

0_0402_5%

C C

PR108

PR109

1 2

SYSON<17>

0_0402_5%

@

PC88

0.1U_0402_16V7K

PR112

14.3K_0402_1%

1 2

PC95

@ PC95

B B

@

1 2

0.1U_0603_25V7K

1 2

45.3K_0402_1%

12

@

100K_0402_1%

PG_1.5VP

EN_1.5VP

FB_1.5VP

RF_1.5VP

12

PR111

470K_0402_5%~D

PR113

16.5K_0402_1%

PR106

TRIP_1.5VP

TPS51218DSCR_SON10_3X3~D

12

PC87

PR107

1 2

2.2_0603_5%

PU6

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

VBST

DRVH

V5IN

DRVL

10

9

8

SW

7

6

11

TP

2.2_0603_5%

BST_1.5VP

UG_1.5VP

SW_1.5VP

V5IN_1.5VP

LG_1.5VP

PC87

1 2

0.22U_0603_25V7K

+5VALW

1

PC89

1U_0603_6.3V6M~D

2

8

PQ36

D6D5D7D

FDS6298_SO8~D

4

G

S

3

2

1

PL8

1 2

2.2UH_PCMC063T-2R2MN_8A_20%

786

5

PQ37

SI4634DY-T1-E3_SO8

4

123

2.2UH_PCMC063T-2R2MN_8A_20%

12

PR110

4.7_1206_5%

12

PC94

PC94 680P_0402_50V7K~D

680P_0402_50V7K~D

12

PC91

PC90

0.1U_0402_10V7K~D

10U_0805_6.3V6M~D

2

+1.5VP

+

PC92

2

330U 2.5V Y D2 LESR15M CX H1.9

PJP13

PJP13 JUMP_43X118

JUMP_43X118

2

112

PJP14

PJP14 JUMP_43X118

JUMP_43X118

2

112

1

+1.5VP

+1.5V

+1.5VP Thermal Design Current=4.36A Peak Current=6.23A OCP min=8.1A Fsw=290KHZ

A A

Delta I=2.1702A L/S MOS Rds(on)=5.5m (Typ) ; 6.7m (Max)

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

+1.5VP

Size Document Number Rev

Custom

Wednesday, January 05, 2011

Date: Sheet

2

Date: Sheet

LA7161

38 43

of

1

of

A

1 1

B

C

D

+3VALW

+5VALW

12

PC96

PC96 1U_0402_6.3V6K

1U_0402_6.3V6K

6

PU7

7

POK

PR114

SUSP#<17,28,41>

2 2

1 2

10K_0402_1%

PC100

2.2U_0402_6.3V6M

12

@ PR116

@

47K_0402_5%

PR116

8

EN

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

APL5912KAC-TRL_SO8

1

PJP15

1

JUMP_43X79

2

12

PC97

4.7U_0805_6.3V6K

PR115

1.58K_0402_1%

12

0.8V

PR117

1.27K_0402_1%

12

PC98

0.01U_0402_25V7K

12

PC99

PC99 22U_0805_6.3V6M

22U_0805_6.3V6M

+1.8VP

PJP16

112

JUMP_43X79

2

+1.8VS

+1.8VP Thermal Design Current=1.51A Peak Currnet=2.15A OCP min=2.8A

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

+1.8VP

Size Document Number Rev

Wednesday, January 05, 2011

Date: Sheet

LA7161

D

of

39 43

1.0Custom

5

PR119

D D

CPU_B+

+5VS

1 2

10_0603_5%

0.1U_0603_16V7K~N

1 2

10_0603_5%

+5VS +3VS

0.1U_0603_25V7K

12

PR127

PR127 0_0402_5%

0_0402_5%

12

PR131

@PR131

1 2

PR138

61.9K_0402_1%

PC118

12

220P_0402_50V8J

PR152

12

@

10K_0402_1%

12

APU_VDD0_RUN_FB_H<7>

APU_VDD0_RUN_FB_L<7>

APU_VDD0_RUN_FB_H<7>

COMP0

1000P_0402_50V7K

PC120

12

1000P_0402_50V7K

PR130

105K_0402_1%

C C

VGATE

VGATE<17>

APU_PWRG D_CORE<13>

APU_SVD<7>

APU_SVC<7>

VR_ON<17>

PR139

12

54.9K_0402_1%

B B

DIFF_0

PC117

PR150

12

255_0402_1%

2200P_0402_50V7K~D

A A

2200P_0402_50V7K~D

PR151

1K_0402_1%~D

FB_0

12

54.9K_0402_1%

5

PR135

0_0402_5%

+APU_CORE

VW0

PC119

PR153

PR128

@ PR128

@

105K_0402_1%

12

PR133

@ PR133

@

105K_0402_1%

PR134

0_0402_5%

12

0_0402_5%

12

6.81K_0402_1%

PR136

PR145

10_0402_5%

PR147

12

1 2

10_0402_1%

12

PR124

10

11

12

PC110

PU8

1

OFS/VFIXEN

2

PGOOD

3

PWROK

4

SVD

5

SVC

6

ENABLE

7

RBIAS

8

OCSET

9

VDIFF0

FB0

COMP0

VW0

ISP0 ISN0

0_0402_5%

PC106

PR144

PR146

4

12

48

VIN

ISP0

13

12

0_0402_5%

4

PR118

44.2K_0402_1%

45

47

46

VCC

FB_NB

COMP_NB

ISL6265AHRTZ-T_TQFN48_6X6

VSEN0

RTN0

ISN0

15

16

14

VSEN0

RTN0

PR148

0_0402_5%

+1.8VS

PR149

VSEN1

12

0_0402_5%

PC101

33P_0402_50V8J~N

12

1000P_0402_50V7K

PC105

1000P_0402_50V7K

PR122

22K_0402_1%

PR125

0_0402_5%

42

43

44

RTN_NB

FSET_NB

VSEN_NB

VDIFF1

RTN1

VSEN1

19

17

18

RTN1

12

41

OCSET_NB

FB1

20

PC103

12

1 2

10_0402_5%

12

PR126

7.15K_0402_1%

40

39

PGND_NB

LGATE_NB

VW1

COMP121ISP1

22

3

UGATE_NB

PHASE_NB

PC107

PR120

BOOT_NB

1 2

0_0603_5%

PR123

+APU_COREP_NB LGATE_NB

APU_VDDNB_RUN_FB_H <7>

PHASE_NB

12

38

PHASE_NB

23

ISP0

LGATE_NB

PHASE_NB

UGATE_NB

PR132

0_0402_5%

37

36

BOOT_NB

UGATE_NB

35

BOOT0

34

UGATE0

33

PHASE0

32

PGND0

31

LGATE0

30

PVCC

29

LGATE1

28

PGND1

27

PHASE1

26

UGATE1

25

BOOT1

ISN1

TP

24

49

ISN0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

BOOT_NB

BOOT0

UGATE0

PHASE0

LGATE0

PC114

1U_0603_10V6K~D

3

0_0603_5%

APU_VDDNB_RUN_FB_L

UGATE0

PHASE0

+5VS

BOOT0

12

LGATE0

2010/07/31 2011/07/31

PC107

1 2

0.22U_0603_10V7K

PC113

PR137

1 2

0_0603_5%

0.22U_0603_10V7K

Compal Secret Data

Deciphered Date

4

2

PQ38

SI7686DP-T1-E3_SO8

3 5

241

PQ39

5

213

SI7170DP-T1-GE3_POWERPAK8-5

PQ40

PQ40 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

3 5

241

5

PQ41

SI7170DP-T1-GE3_POWERPAK8-5

213

2

1

CPU_B+

12

PC104

4.7U_0805_25V6K~D

PL10

1UH_PCMC063T-1R0MN_11A_20%

1 2

12

PR121

4.7_1206_5%

12

PC109

PC109 680P_0603_50V_NPO

680P_0603_50V_NPO

1

@

+

PC102

68U_25V_M_R0.36

2

1

+

2

PL9

HCB4532KF-800T90_1812

1 2

PC108

PC108 330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

+APU_COREP_NB

+APU_COREP_NB TDC=7A Peak Current=10A OCP min=13A Iripple= 3.4598A Fsw=300KHZ

L/S MOS Rds(on)=3.6m (Typ) ; 4.5m (Max)

CPU_B+

PJP20

12

PC111

12

PC112

4.7U_0805_25V6K~D

12

PR140

4.7_1206_5%

12

PC115

680P_0603_50V_NPO

+APU_COREP_NB

0.36UH_PCMC104T-R36MN1R17_30A_20%

1

2

ISP0_1

PR141

3.65K_0805_1%

1 2

0.1U_0603_16V7K~N

@

PR143

10_0402_5%

ISP0

PJP20 JUMP_43X118

JUMP_43X118

112

PL11

4

3

PR142

47K_0402_1%

PC116

12

@

PH2

12

10K_0603_5%_TSM1A103J4302RE

+APU_CORE Thermal Design Current=7.7A Peak Current=11A OCP min=14.3A Fsw=300KHZ

Choke DCR=1.1 ± 7% mȍ

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

+APU_CORE/+1.0VALWP

LA7161

Wednesday, January 05, 2011

1

12

2

ISN0

40 43

B+

+APU_CORE_NB

+APU_CORE

of

1.0

A

1 1

+3VALW

12

@

PR155

@

PR154

0_0402_5%

2 2

PR157

PR158

SUSP#<17,28,39>

1 2

0_0402_5%

@ PC127

@

0.1U_0402_16V7K

PC127

36.5K_0402_1%

12

1 2

PR155

100K_0402_1%

PU9

PG_1.05VP BST_1.05VP

TRIP_1.05VP

EN_1.05VP

RF_1.05VP

12

PR160

PR160 470K_0402_5%~D

470K_0402_5%~D

PU9

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR_SON10_3X3~D

VBST

DRVH

V5IN

DRVL

B

578

PC126

PR156

1 2

2.2_0603_5%

10

UG_1.05VP

9

SW_1.05VP

8

SW

TP

V5IN_1.05VPFB_1.05VP

7

LG_1.05VP

6

11

PC126

1 2

0.22U_0603_25V7K

+5VALW

1

PC131

1U_0603_6.3V6M~D

2

3 6

578

3 6

241

PQ43

AO4466_SO8

PQ44

AO4456_SO8

C

+1.05VP_B+

3.3UH_PCMC063T-3R3MN_6A_20%

12

PR159

4.7_1206_5%

12

PC132

680P_0402_50V7K~D

12

PC121

2200P_0402_50V7K~D

PL12

1 2

D

PJP18

2

112

JUMP_43X118

12

PC122

0.1U_0603_25V7K

PC124

PC123

4.7U_0805_25V6K~D

12

PC125

4.7U_0805_25V6K~D

B+

+1.05VP

12

PC128

0.1U_0402_10V7K~D

1

PC129

2

1

+

PC130

220U_D2_4V15M

2

10U_0805_6.3V6M~D

PR162

PR161

3 3

1 2

20K_0402_1%~D

PC133

@ PC133

@

1 2

0.1U_0603_25V7K

PR162

10K_0402_1%

12

PJP17

+1.05VP

2

JUMP_43X118

112

+1.05V

+1.05VP Thermal Design Current=4A Peak Current=5.7A OCP min=7.41A Fsw=290KHZ

Delta I=1.0381A

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/31 2011/07/31

Compal Secret Data

Deciphered Date

C

L/S MOS Rds(on)=4.5m (Typ) ; 5.6m (Max)

Compal Electronics, Inc.

Title

+1.05VP

Size Document Number Rev

Wednesday, January 05, 2011

Date: Sheet

LA7161

D

41 43

1.0Custom

of

5

9HUVLRQ&KDQJH/LVW3,5/LVW

9HUVLRQ&KDQJH/LVW3,5/LVW9HUVLRQ&KDQJH/LVW3,5/LVW

5HTXHVW

3DJH 7LWOH

,WHP

3DJH3DJH

,WHP,WHP

1

D D

2 DCIN

40

33

32

7LWOH 5HY

7LWOH7LWOH

+APU_CORE/ +APU_COREP_NB

BATTERY CONN /OTP/B+_BIAS

'DWH

'DWH'DWH

2010/10/04

2010/10/12 Compal

5HTXHVW5HTXHVW

2ZQHU

2ZQHU2ZQHU

Compal

4

,VVXH'HVFULSWLRQ

,VVXH'HVFULSWLRQ'DWH

,VVXH'HVFULSWLRQ,VVXH'HVFULSWLRQ

PC102(H=5.8mm) will impact ME logic lower

HW power share no function when system at S5 ony with battery without AC.

3

6ROXWLRQ'HVFULSWLRQ

6ROXWLRQ'HVFULSWLRQ3DJH

6ROXWLRQ'HVFULSWLRQ6ROXWLRQ'HVFULSWLRQ

Depop PC102 (P/N : SF000000W00)

1. Add PR163, PR164 (P/N : SD013200080) (S RES 1/10W 200 +-5% 0603); PU10 (P/N : SA009200010) (S IC G920AT24U SOT89 REG 3.3V ); PC134 (P/N : SE000001380) (S CER CAP 1U 25V K X5R 0805 H1.25); PC135 (P/N : SE093106M80) (S CER CAP 10U 6.3V M X5R 0805 H1.25)

2. Modify PD3.pin3 net name, change from +3VLP to RTCVREF

3. Delete PD3, PR17, PC11 =>Cause HW side has alike RTC circuitry (DZ3 and CZ24)

2

1

5HY,WHP

5HY5HY

X01

3

C C

4

534

634

B B

8

A A

BATTERY CONN

32

/OTP/B+_BIAS

BATTERY CONN

32

/OTP/B+_BIAS

CHARGER /DETECTOR

+3VALWP

357

/+5VALWP

33

34

5

DCIN

CHARGER /DETECTOR

2010/10/18

2010/10/22

2010/11/24

Compal

For reduce S5,S4 power leakage when system only with battery

for ME team change RTC battery connector.

follow compal power team new AC-IN, Pre-charge circuits with

忋≽

design to original pre-charge design and ADP/BAT switch circuits.

follow compal power team new AC-IN, Pre-charge circuits with design to original pre-charge design and ADP/BAT switch circuits.

QAD team highlight BITS issue DF434417: [Rel, PT] OTP (PH1) recovery temperature can't meet spec.

The recovery temperature spec is 50 +/- 3degree C.

follow compal power team new AC-IN, Pre-charge circuits with design to original pre-charge design and ADP/BAT switch circuits.

4

circuits, need change

忋≽

circuits, need change

忋≽

circuits, need change

Change PU1A.pin8 net-name from Pre_V to VS

Change PJRTC1 P/N from SP02000IA00(with Cable) to SP07000H700(w/o cable)

1. Depop PR52 (P/N : SD02810030L), PQ20 (P/N : SB000009610)

2. Pop item: PD12 (P/N: SC1SS355010)S DIO 1SS355TE-17 SOD323 PD14 (P/N: SC1SS355010)S DIO 1SS355TE-17 SOD323 PR45 (P/N: SD034200380)S RES 1/16W 200K +-1% 0402 PC28 (P/N: SE042104K80)S CER CAP .1U 25V K X7R 0603 PQ17 (P/N: SB502060000)S TR RHU002N06 1N SOT323

1. Pop PQ20 (P/N: SB000009610) (S TR SSM3K7002FU 1N SC70-3))

Add @PR129 (P/N: SD028000080) (S RES 1/16W 0 +-5% 0402)

1. Depop : PD7, PD8, PQ6, PQ7, PQ8, PR25, PR26, PR27, PR28, PR29, PR30, PR31

2. Add @PC93, @PC136, @PC137, @PD16, @PQ42, @PQ45, @PR165, @PR166, @PR167 , @PR168, @PR169, @PR170, @PR171

3. Depop PR41, pop PR40 (P/N: SD028000080) (S RES 1/16W 0 +-5% 0402)

4. Pop PR52 (P/N: SD028100380) (S RES 1/16W 100K +-5% 0402) , depop PC28, PC31, PD12, PD14, PQ17, PQ20, PR45

5. Change PQ21.2 net name to "ACON"

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sh eet of

Compal Electronics, Inc.

PWR PIR

LA-7161P

1

X01

X02

X03

1.0

42 43Wednesday, January 05, 2011

1.0

5

9HUVLRQ&KDQJH/LVW3,5/LVW

9HUVLRQ&KDQJH/LVW3,5/LVW9HUVLRQ&KDQJH/LVW3,5/LVW

5HTXHVW

3DJH 7LWOH

,WHP

3DJH3DJH

,WHP,WHP

P35

9

D D

P36

P38

P40

P41

7LWOH 5HY

7LWOH7LWOH

3VALWP/5VALWP

+1.1VALWP

+1.5VP

+APU_CORE /+APU_COREP_NB

+1.05VP

'DWH

'DWH'DWH

2010/11/24

5HTXHVW5HTXHVW

2ZQHU

2ZQHU2ZQHU

Compal

4

,VVXH'HVFULSWLRQ

,VVXH'HVFULSWLRQ'DWH

,VVXH'HVFULSWLRQ,VVXH'HVFULSWLRQ

for support DFX team and SMT AOI detect:

䨢䂲䎦尉

庫⭡㖻㩊㷔↢㗗⏎

3

6ROXWLRQ'HVFULSWLRQ

6ROXWLRQ'HVFULSWLRQ3DJH

6ROXWLRQ'HVFULSWLRQ6ROXWLRQ'HVFULSWLRQ

follow DFX team-Chen. Daniel suggestion: to use the pad length 3.6*2.5mm PCB footprint for the PL6, PL7, PL8, PL10, PL12 material as PL5 .

Change PL6 footprint from (CYNTE_PCMC063T-2R2MN_2P) to (CYNTE_PCMB064T-3R3MS_2P) PL7 footprint from (CYNTE_PCMC063T-2R2MN_2P) to (CYNTE_PCMB064T-3R3MS_2P) PL8 footprint from (CYNTE_PCMC063T-2R2MN_2P) to (CYNTE_PCMB064T-3R3MS_2P) PL10 footprint from (CYNTE_PCMC063T-1R0MN_2P) to (CYNTE_PCMB064T-3R3MS_2P) PL12 footprint from (CYNTE_PCMC063T-3R3MN_2P) to (CYNTE_PCMB064T-3R3MS_2P)

2

1

5HY,WHP

5HY5HY

X03

CHARGER

34

/DETECTOR

CHARGER

C C

B B

34

/DETECTOR

2010/11/26

2010/12/14 Compal

Compal

Support EMC team to reduce nosie

Add @PL13 and lyaout footprint co-layout with PJP1 X03

1. Pop PL13 (P/N: SM01000DJ00) ( S SUPPRE_ FBMA-L11-453215-121LMA90T 1812) this bead value= 120 ohm(Current rating=9A)

2. Depop PJP1

A00

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sh eet of

Compal Electronics, Inc.

PWR PIR

LA-7161P

43 43Wednesday, January 05, 2011

1

1.0

Compal LA-7161P Schematics Rev1.0

Specifications and Main Features

Frequently Asked Questions

User Manual