Compal LA-7121P P3MJ0, Aspire 3830TG Schematic

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Compal Confidential

Model Name : P3MJ0

1 1

File Name : LA-7121P
BOM P/N:43XXXXXXL01(UMA)

43XXXXXXL02(DIS)

Compal Confidential

2 2

M/B Schematics Document

Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH

Nvidia N12P-GS/GV

2010-11-16

3 3

REV:0.2

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2010/12/312009/08/01

2010/12/312009/08/01

2010/12/312009/08/01

D

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

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57

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P3MJ0 block diagram

1 1

VRAM * 8
DDR3
64*16
128*16

Nvidia N12P-GS(128bit)
Nvidia N12P-GV(64bit)
BGA

25W/15W

page22~33

HDMI Conn.

page 36

PEG(DIS)

CRT Conn.

page 35

LVDS Conn.

page 34

HDMI(UMA/Optimus)

2 2

PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)

port 4

USB 3.0 controller
UPD720200AF1
+ Charger

page 44

Card Reader
RTS5209

port 3 port 1

MINI Card

WLAN (+BT)

page 40

Wireless HDMI

port 2

page 39

PCI-E 2.0x16 5GT/s PER LANE100MHz

EDP
(reserved)

page 34

LVDS(UMA/Optimus)

CRT(UMA/Optimus)

TMDS(UMA/Optimus)

LAN(GbE)

Atheros AR8151
Atheros AR8152

sub board

133MHz

FDI x8

100MHz

2.7GT/s

100MHz
100MHz

SATA x 6
(GEN1 1.5GT/S ,GEN2 3GT/S)

port 0

Fan Control

page 46

Intel

Sandy Bridge

Processor
DC/QC 35W

SV2 lane

rPGA989

Intel

Cougar Point-M

PCH

989pin BGA

page 13~21

page 4~10

DMI x4

100MHz
1GB/s x4

SPI

SPI ROM x1
4MB

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1333

USB 2.0 conn

page 37

port 1

USBx14

HD Audio

3.3V 48MHz

3.3V 24MHz

HDA Codec

Conexnt 20584

sub board

page 14

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

WLAN Conn

CMOS Camera

page 11,12

for Bluetooth

page 39

port 8 port 10

page 34

port 0

USB 2.0 conn

sub board

BT
standalone

page 40

port 13

MINI Card

WWAN

page 39

SIM card

page 39

Power off design

port 11

port 12

SATA HDD

conn x 1

page 43

3 3

5 in 1 slot

page 40

RJ45

sub board

Conn.

page 38

LPC BUS

33MHz

Int. Speaker MIC Jack

page 46

sub board sub board

DMIC

module

SPDIF/HP Jack

RTC CKT.

page 13

Power On/Off CKT.

page 43

Touch Pad

P3MJ0 Sub-board

DC/DC Interface CKT.

page 45

4 4

Power Circuit DC/DC

page 48~56

LED

page 42

Sub board conn
& buttons

A

page 46

USB 2.0 +
Audio Codec + Jack

LAN

Power Board

B

ENE KB930

page 41

page 42

BIOS ROM

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Int.KBD

page 42

page 41

Compal Secret Data

Compal Secret Data

2009/08/01 2010/08/01

2009/08/01 2010/08/01

2009/08/01 2010/08/01

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

CPU XDP

page 5

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

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Voltage Rails

S1

Power Plane Description
VIN
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+
+CPU_CORE

1 1

2 2

+VGA_CORE
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator
+1.0VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU
+1.05VS_VCCP
+1.05VS_PCH +1.05VS_VCCP to +1.05VS_PCH power for PCH
+1.5V
+1.5VS
+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU
+3VALW +3VALW always on power rail
+3VALW_EC +3VALW always to KBC ON ON ON*
+3V_LAN
+3VALW_PCH
+3VS
+5VALW
+5VALW_PCH
+5VS +5VALW to +5VS switched power rail OFFON OFF
+VSB +VSBP to +VSB always on power rail for sequence control ON ON*
+RTCVCC RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address

Device

Smart Battery

Adapter power supply (19V)

AC or battery power rail for power circuit.
Core voltage for CPU
Core voltage for GPU

+1.05VS_VCCPP to +1.05VS_VCCP switched power rail for CPU

+1.5VP to +1.5V power rail for DDRIII ON ON OFF
+1.5V to +1.5VS switched power rail

+3VALW to +3V_LAN power rail for LAN
+3VALW to +3VALW_PCH power rail for PCH (Short Jumper)
+3VALW to +3VS power rail
+5VALWP to +5VALW power rail
+5VALW to +5VALW_PCH power rail for PCH (Short resister)

EC SM Bus2 address

Address Address

0001 011X b

Device

S3 S5

N/A N/A N/A

N/AN/AN/A

OFF

ON
ON

ON OFF OFF
ON OFF OFF
ON OFF OFF
ON OFF OFF

ON OFF OFF

ON
ON

ON ON
ON ON
ON
ON
ON ON

ON
ON

OFF
OFF

OFF

OFF

OFF

ON ON*

ON*
ON*

OFF

OFF

ON ON*

ON*

ONON

PCH SM Bus address

Device

Clock Generator (9LVS3199AKLFT,
RTM890N-631-VB-GRT)

DDR DIMM0
DDR DIMM2

3 3

4 4

3G & BT Config
3G SKU:
BT SKU:

BOM Config
UMA Only:
N12P-GS OPTIMUS:
N12P-GV OPTIMUS:

3G@
BT@

VRAM BOM Config

add later

Address

1101 0010b

1001 000Xb
1001 010Xb

UMA@ /BT@/3G@
OPT@/GS@/X76@/BT@/3G@
OPT@/GV@/X76@/BT@/3G@

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7NC

BOARD ID Table

Board ID

Project ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

JM30
JM40
JM50
SJM30
SJM40
SJM50

NC

USB Port Table

USB 2.0 USB 1.1 Port

EHCI1

EHCI2

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

0

NCNC
NC

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

PCB Revision

0.1

0.2

0.3

1.0

0
1
2
3
4
5
6
7
8

9
10
11
12
13

0
1
2
3
4
5
6
7

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%

SLP_S4# SLP_S5# +VALW +V +VS Clock

ONONON ON

ON

HIGHHIGHHIGH

ON

HIGH

LOWLOWLOW

HIGH

ON

HIGH

ON

ON

V typ

AD_BID

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

LOW

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

ON

OFF

OFF

V

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

ON

OFF

OFF

OFF

BTO Option Table

BTO Item

UMA Only

VRAM
Connector CONN@

Blue Tooth BT@
Unpop
N12P-GS
N12P-GV

AD_PID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

3 External
USB Port

USB/B (Left Side)
USB/B (Left Side)

Mini Card(WLAN)
Mini Card(WWAN)
Camera

SIM Card
Blue Tooth

V typ

AD_PID

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

V

max

AD_PID

0.538 V

0.875 V

Design Common

schematics pages
sequence

CPU/PCH/CLK

dGPU
LVDS/CRT/HDMI/DP 2100~2199

LAN 1200~1299
Card Reader
Other IO

(HDD/ODD/MINI/
USB/KBD/BIOS/
Button/LED)
KBC

POK CKT, DC/DC

max

LOW

OFF

OFF

OFF

BOM Structure

UMA@
OPT@Discrete(OPTIMUS)
X76@

3G@3G

@
GS@
GV@

Part count location define

1~1099
2000~2099DIMM
1400~1999

1100~1199Audio

1300~1399

2400~xxxx

2200~2299
2300~2399

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2010/08/012009/08/01

2010/08/012009/08/01

2010/08/012009/08/01

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

357

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357

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JCPU1A

JCPU1A

EDP_COMP

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

INETL_RPGA_989P-S

DMI_CRX_PTX_N015
DMI_CRX_PTX_N115
DMI_CRX_PTX_N215
DMI_CRX_PTX_N315

DMI_CRX_PTX_P015
DMI_CRX_PTX_P115
DMI_CRX_PTX_P215
DMI_CRX_PTX_P315

DMI_CTX_PRX_N015
DMI_CTX_PRX_N115
DMI_CTX_PRX_N215
DMI_CTX_PRX_N315

DMI_CTX_PRX_P015
DMI_CTX_PRX_P115
DMI_CTX_PRX_P215
DMI_CTX_PRX_P315

C C

FDI_CTX_PRX_N015
FDI_CTX_PRX_N115
FDI_CTX_PRX_N215
FDI_CTX_PRX_N315
FDI_CTX_PRX_N415
FDI_CTX_PRX_N515
FDI_CTX_PRX_N615
FDI_CTX_PRX_N715

FDI_CTX_PRX_P015
FDI_CTX_PRX_P115
FDI_CTX_PRX_P215
FDI_CTX_PRX_P315
FDI_CTX_PRX_P415
FDI_CTX_PRX_P515
FDI_CTX_PRX_P615

+1.05VS_VCCP

12

R2

R2

24.9_0402_1%

24.9_0402_1%

B B

eDP_COMPIO and ICOMPO signals
should be shorted near balls
and routed with typical
impedance <25 mohms

A A

FDI_CTX_PRX_P715
FDI_FSYNC015

FDI_FSYNC115
FDI_INT15
FDI_LSYNC015

FDI_LSYNC115

EDP_HPD#34

EDP_AUXP34
EDP_AUXN34

EDP_TXP034
EDP_TXP134

EDP_TXN034
EDP_TXN134

EDP_TXP1

EDP_TXN1

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

PEG_COMP

J22
J21
H22

PEG_HRX_GTX_N15

K33

PEG_HRX_GTX_N14

M35

PEG_HRX_GTX_N13

L34

PEG_HRX_GTX_N12

J35

PEG_HRX_GTX_N11

J32

PEG_HRX_GTX_N10

H34

PEG_HRX_GTX_N9

H31

PEG_HRX_GTX_N8

G33

PEG_HRX_GTX_N7

G30

PEG_HRX_GTX_N6

F35

PEG_HRX_GTX_N5

E34

PEG_HRX_GTX_N4

E32

PEG_HRX_GTX_N3

D33

PEG_HRX_GTX_N2

D31

PEG_HRX_GTX_N1

B33

PEG_HRX_GTX_N0

C32

PEG_HRX_GTX_P15

J33

PEG_HRX_GTX_P14

L35

PEG_HRX_GTX_P13

K34

PEG_HRX_GTX_P12

H35

PEG_HRX_GTX_P11

H32

PEG_HRX_GTX_P10

G34

PEG_HRX_GTX_P9

G31

PEG_HRX_GTX_P8

F33

PEG_HRX_GTX_P7

F30

PEG_HRX_GTX_P6

E35

PEG_HRX_GTX_P5

E33

PEG_HRX_GTX_P4

F32

PEG_HRX_GTX_P3

D34

PEG_HRX_GTX_P2

E31

PEG_HRX_GTX_P1

C33

PEG_HRX_GTX_P0

B32

PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15

M29

PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14

M32

PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13

M31

PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12

L32

PEG_HTX_GRX_N11 PEG_HTX_C_GRX_N11

L29

PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10

K31

PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9

K28

PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8

J30

PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7

J28

PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6

H29

PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5

G27

PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4

E29

PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3

F27

PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2

D28

PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1

F26

PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0

E25

PEG_HTX_GRX_P15 PEG_HTX_C_GRX_P15

M28

PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14

M33

PEG_HTX_GRX_P13 PEG_HTX_C_GRX_P13

M30

PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12

L31

PEG_HTX_GRX_P11 PEG_HTX_C_GRX_P11

L28

PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10

K30

PEG_HTX_GRX_P9 PEG_HTX_C_GRX_P9

K27

PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8

J29

PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7

J27

PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6

H28

PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5

G28

PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4

E28

PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3

F28

PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2

D27

PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1

E26

PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0

D25

Typ- suggest 220nF. The change in AC capacitor
value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)

+1.05VS_VCCP

R1

R1

24.9_0402_1%

24.9_0402_1%

C1 .1U_0402_16V7KOPT@C1 .1U_0402_16V7KOPT@

1 2

C2 .1U_0402_16V7KOPT@C2 .1U_0402_16V7KOPT@

1 2

C3 .1U_0402_16V7KOPT@C3 .1U_0402_16V7KOPT@

1 2

C4 .1U_0402_16V7KOPT@C4 .1U_0402_16V7KOPT@

1 2

C5 .1U_0402_16V7KOPT@C5 .1U_0402_16V7KOPT@

1 2

C6 .1U_0402_16V7KOPT@C6 .1U_0402_16V7KOPT@

1 2

C7 .1U_0402_16V7KOPT@C7 .1U_0402_16V7KOPT@

1 2

C8 .1U_0402_16V7KOPT@C8 .1U_0402_16V7KOPT@

1 2

C9 .1U_0402_16V7KOPT@C9 .1U_0402_16V7KOPT@

1 2

C10 .1U_0402_16V7KOPT@C10 .1U_0402_16V7KOPT@

1 2

C11 .1U_0402_16V7KOPT@C11 .1U_0402_16V7KOPT@

1 2

C12 .1U_0402_16V7KOPT@C12 .1U_0402_16V7KOPT@

1 2

C13 .1U_0402_16V7KOPT@C13 .1U_0402_16V7KOPT@

1 2

C14 .1U_0402_16V7KOPT@C14 .1U_0402_16V7KOPT@

1 2

C15 .1U_0402_16V7KOPT@C15 .1U_0402_16V7KOPT@

1 2

C16 .1U_0402_16V7KOPT@C16 .1U_0402_16V7KOPT@

1 2

C17 .1U_0402_16V7KOPT@C17 .1U_0402_16V7KOPT@

1 2

C18 .1U_0402_16V7KOPT@C18 .1U_0402_16V7KOPT@

1 2

C19 .1U_0402_16V7KOPT@C19 .1U_0402_16V7KOPT@

1 2

C20 .1U_0402_16V7KOPT@C20 .1U_0402_16V7KOPT@

1 2

C21 .1U_0402_16V7KOPT@C21 .1U_0402_16V7KOPT@

1 2

C22 .1U_0402_16V7KOPT@C22 .1U_0402_16V7KOPT@

1 2

C23 .1U_0402_16V7KOPT@C23 .1U_0402_16V7KOPT@

1 2

C24 .1U_0402_16V7KOPT@C24 .1U_0402_16V7KOPT@

1 2

C25 .1U_0402_16V7KOPT@C25 .1U_0402_16V7KOPT@

1 2

C26 .1U_0402_16V7KOPT@C26 .1U_0402_16V7KOPT@

1 2

C27 .1U_0402_16V7KOPT@C27 .1U_0402_16V7KOPT@

1 2

C28 .1U_0402_16V7KOPT@C28 .1U_0402_16V7KOPT@

1 2

C29 .1U_0402_16V7KOPT@C29 .1U_0402_16V7KOPT@

1 2

C30 .1U_0402_16V7KOPT@C30 .1U_0402_16V7KOPT@

1 2

C31 .1U_0402_16V7KOPT@C31 .1U_0402_16V7KOPT@

1 2

C32 .1U_0402_16V7KOPT@C32 .1U_0402_16V7KOPT@

1 2

12

PEG_HRX_GTX_N[0..15] 22
PEG_HRX_GTX_P[0..15] 22

PEG_HTX_C_GRX_N[0..15] 22
PEG_HTX_C_GRX_P[0..15] 22

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

457Tuesday, December 14, 2010

457Tuesday, December 14, 2010

457Tuesday, December 14, 2010

A

A

A

of

5

+1.05VS_VCCP

D D

C C

PM_DRAM_PWRGD15

Processor Pullups

R5 62_0402_5%R5 62_0402_5%

R8 10K_0402_5%R8 10K_0402_5%

12

12

C211 220P_0402_50V7K@C211 220P_0402_50V7K@

12

220pF close to CPU(ESD)

Buffered reset to CPU

PLT_RST#17,40,41,44,46

PLT_RST#

C34

C34

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R18

R18

10K_0402_5%

10K_0402_5%

1 2

H_PROCHOT#

H_CPUPWRGD_R

+3VS

5

1

P

NC

2

A

G

3

+3VALW+3VS

1

2

5

1

P

B

2

A

G

3

SUSP45,53

1

C33

C33

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

U1

U1

BUFO_CPU_RST#

4

Y

SN74LVC1G07DCKR_SC70-5

SN74LVC1G07DCKR_SC70-5

U2

U2
74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

PM_SYS_PWRGD_BUF

4

O

SUSP

2

G

G

+1.05VS_VCCP

12

R15

R15
75_0402_5%

75_0402_5%

R17

R17

43_0402_1%

43_0402_1%

1 2

12

@

@
R20

R20
39_0402_5%

39_0402_5%

13

D

D

Q1

Q1
2N7002H_SOT23-3

2N7002H_SOT23-3
@

@

S

S

BUF_CPU_RST#

12

@

@
R19

R19
0_0402_5%

0_0402_5%

+1.5V_CPU_VDDQ

12

R16

R16
200_0402_5%

200_0402_5%

4

H_PECI18,41

H_PROCHOT#41,50

H_THRMTRIP#18

H_PM_SYNC15

H_CPUPWRGD18

PM_SYS_PWRGD_BUF

T3 PADT3 PAD

1 2

56_0402_5%

56_0402_5%

130_0402_5%

130_0402_5%

1 2

R9

0_0402_5%R90_0402_5%

R10

R10

1 2

R11

R11

0_0402_5%

0_0402_5%

1 2

R12

R12

0_0402_5%

0_0402_5%

1 2

R13

R13

0_0402_5%

0_0402_5%

1 2

R14

R14

H_CATERR#

H_PECI_ISO

H_PROCHOT#_R

H_THEMTRIP#_R

H_PM_SYNC_R

H_CPUPWRGD_R

PM_DRAM_PWRGD_R

BUF_CPU_RST#

JCPU1B

JCPU1B

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

3

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

INETL_RPGA_989P-S

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

PRDY#

PREQ#

TCK
TMS

TRST#

TDI

TDO

DBR#

BPM#[0]

JTAG & BPM

JTAG & BPM

BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

A28
A27

A16
A15

R8

AK1
A5
A4

AP29
AP27

AR26
AR27
AP30

AR28
AP26

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

CLK_CPU_DMI_R
CLK_CPU_DMII#_R

CLK_DP_R
CLK_DP#_R

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

XDP_PRDY#_R
XDP_PREQ#_R

XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R

XDP_TDI_R
XDP_TDO_R

XDP_BPM#0_R
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#3_R
XDP_BPM#4_R
XDP_BPM#5_R
XDP_BPM#6_R
XDP_BPM#7_R

2

R3 0_0402_5%R3 0_0402_5%

1 2

R4 0_0402_5%R4 0_0402_5%

1 2

R362 1K_0402_5%R362 1K_0402_5%

1 2

R363 1K_0402_5%R363 1K_0402_5%

1 2

H_DRAMRST# 6

T86PAD T86PAD
T87PAD T87PAD

R361 0_0402_5%R361 0_0402_5%

1 2

T38PAD T38PAD
T39PAD T39PAD
T40PAD T40PAD
T41PAD T41PAD
T42PAD T42PAD
T43PAD T43PAD
T44PAD T44PAD
T45PAD T45PAD

1

CLK_CPU_DMI 14
CLK_CPU_DMI# 14H_SNB_IVB#17

+1.05VS_VCCP

CLK_DP_R
CLK_DP#_R

eDP enable:
TX:mount C2114, C2115,
AUX: mount C2118, C2119
HPD: mount R2112, Q2103, R2114
CFG4: mount R55
CLK: mount R6,R7, unmount R362, R363

XDP_DBRESET#DBRESET#_R

XDP_DBRESET# 15

R6 0_0402_5%@R6 0_0402_5%@
R7 0_0402_5%@R7 0_0402_5%@

1 2
1 2

CLK_DP 14
CLK_DP# 14

DDR3 Compensation Signals

SM_RCOMP0

R21 140_0402_1%R21 140_0402_1%

SM_RCOMP1

R22 25.5_0402_1%R22 25.5_0402_1%

SM_RCOMP2

R24 200_0402_1%R24 200_0402_1%

PU/PD for JTAG signals

XDP_TMS_R

R31 51_0402_5%@R31 51_0402_5%@

XDP_TDI_R

R34 51_0402_5%@R34 51_0402_5%@

XDP_TDO_R

R37 51_0402_5%@R37 51_0402_5%@

XDP_TCK_R

R39 51_0402_5%@R39 51_0402_5%@

XDP_TRST#_R

R42 51_0402_5%@R42 51_0402_5%@

12
12
12

12
12
12
12
12

+1.05VS_VCCP

+3VS

XDP_DBRESET#

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

4019BI

4019BI

4019BI

Date: Sheet

Date: Sheet

Date: Sheet

R48 1K_0402_5%R48 1K_0402_5%

12

557Tuesday, December 14, 2010

557Tuesday, December 14, 2010

1

557Tuesday, December 14, 2010

A

A

A

of

of

of

5

JCPU1C

JCPU1C

4

3

JCPU1D

JCPU1D

2

1

DDR_A_D[0..63]11

D D

C C

B B

DDR_A_BS011
DDR_A_BS111
DDR_A_BS211

DDR_A_CAS#11
DDR_A_RAS#11
DDR_A_WE#11

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AP11
AN11

AL12
AM12
AM11

AL11

AP12
AN12

AJ14
AH14

AL15

AK15

AL14

AK14

AJ15
AH15

AE10

AF10

F10
G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8

AE8
AD9
AF9

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9

F9

F7
G8
G7

K4

K5

K1

J1

J5

J4

J2

K2
M8

N8

N7
M9

N9
M7

V6

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

RSVD_TP[10]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]
RSVD_TP[9]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

M_CLK_DDR0 11
M_CLK_DDR#0 11
DDR_CKE0_DIMMA 11

M_CLK_DDR1 11
M_CLK_DDR#1 11
DDR_CKE1_DIMMA 11

DDR_CS0_DIMMA# 11
DDR_CS1_DIMMA# 11

M_ODT0 11
M_ODT1 11

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11 DDR_B_MA[0..15] 12

DDR_B_D[0..63]12

DDR_B_BS012
DDR_B_BS112
DDR_B_BS212

DDR_B_CAS#12
DDR_B_RAS#12
DDR_B_WE#12

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AM5
AM6
AR3

AN3
AN2
AN1

AN9

AN8
AR6
AR5
AR9

AJ11

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA10

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]

AP3

SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]
SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

RSVD_TP[17]
RSVD_TP[18]

RSVD_TP[19]
RSVD_TP[20]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

M_CLK_DDR2 12
M_CLK_DDR#2 12
DDR_CKE2_DIMMB 12

M_CLK_DDR3 12
M_CLK_DDR#3 12
DDR_CKE3_DIMMB 12

DDR_CS2_DIMMB# 12
DDR_CS3_DIMMB# 12

M_ODT2 12
M_ODT3 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

R49

@R49

@
0_0402_5%

0_0402_5%

1 2

D

S

D

S

DDR3_DRAMRST#_R

1 2

13

Q2

Q2
BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

G

2

1

C35

C35

0.047U_0402_16V4Z

0.047U_0402_16V4Z

2

H_DRAMRST#5

R52

R52

4.99K_0402_1%

4.99K_0402_1%

A A

DRAMRST_CNTRL_PCH7,14

5

R53

R53

0_0402_5%

0_0402_5%

1 2

DRAMRST_CNTRL

R50

R50

1K_0402_5%

1K_0402_5%

+1.5V

12

1 2

4

R51

R51

1K_0402_5%

1K_0402_5%

DDR3_DRAMRST# 11,12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

657Tuesday, December 14, 2010

657Tuesday, December 14, 2010

657Tuesday, December 14, 2010

A

A

A

5

4

3

2

1

JCPU1E

CFG Straps for Processor

JCPU1E

L7

RSVD28

AG7

T46 PADT46 PAD
T47 PADT47 PAD
T48 PADT48 PAD
T49 PADT49 PAD
T50 PADT50 PAD
T51 PADT51 PAD
T52 PADT52 PAD
T53 PADT53 PAD
T54 PADT54 PAD
T55 PADT55 PAD
T56 PADT56 PAD
T57 PADT57 PAD
T58 PADT58 PAD
T59 PADT59 PAD
T60 PADT60 PAD
T61 PADT61 PAD
T62 PADT62 PAD

R63

R63

1K_0402_1%

1K_0402_1%

CFG0

CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE

CPU_RSVD6
CPU_RSVD7

12

12

R64

R64
1K_0402_1%

1K_0402_1%

+3VS

12

R385

R385
10K_0402_5%@

10K_0402_5%@

VCCIO_SEL

12

R378

R378
10K_0402_5%@

10K_0402_5%@

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

INETL_RPGA_989P-S

RESERVED

RESERVED

T90 PADT90 PAD

D D

T82 PADT82 PAD
T83 PADT83 PAD
T84 PADT84 PAD
T85 PADT85 PAD

C C

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
For Future CPU M3 support,
Sandey bridge not supportM3,
Check list1.0&CRB say can NC

check +3VS or +3VALW

follow Module design

VCCIO_SEL For 2012 CPU support

1/NC : (Default) +1.05VS_VTT

A19

*

0: +1.0VS_VTT

B B

RSVD26 had changed the name to VCCIO_SEL
Need PH +3VALW 10K at +1.05VS_VTT source
for 2012 processor +1.05V and +1.0V select

RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

VCC_DIE_SENSE

RSVD54
RSVD55

RSVD56
RSVD57
RSVD58

KEY

AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

AT2
AT1
AR1

B1

T4PAD T4PAD

T5PAD T5PAD
T6PAD T6PAD

10/2, From JM50, delete,
10/19, From checklist 1.2, add the path

PEG Static Lane Reversal - CFG2 is for the 16x

Display Port Presence Strap

PCIE Port Bifurcation Straps

CFG[6:5]

CFG2

CFG2

*

CFG4

*

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

12

R54

R54
1K_0402_1%

1K_0402_1%

1: Normal Operation; Lane # definition matches
socket pin map definition

0:Lane Reversed

CFG4

1K_0402_1%

1K_0402_1%

12

@

@
R55

R55
1K_0402_1%

1K_0402_1%

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6
CFG5

@R61

@

12

12

R62

@R62

R61

@
1K_0402_1%

1K_0402_1%

R60 0_0402_5%@R60 0_0402_5%@

1 2

Q3

+V_DDR_M3_REFA

A A

+V_DDR_M3_REFB

1

R65 0_0402_5%@R65 0_0402_5%@

1 2

1

5

Q3

3

AP2302GN-HF_SOT23-3

AP2302GN-HF_SOT23-3
@

@

2

DRAMRST_CNTRL_PCH

Q13

Q13

3

AP2302GN-HF_SOT23-3

AP2302GN-HF_SOT23-3
@

@

2

9/16, SM50

CPU_RSVD6

CPU_RSVD7

DRAMRST_CNTRL_PCH 6,14

PEG DEFER TRAINING

CFG7

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

CFG7

1: (Default) PEG Train immediately following xxRESETB
de assertion

12

@R66

@

R66
1K_0402_1%

1K_0402_1%

0: PEG Wait for BIOS for training

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

A

A

757Tuesday, December 14, 2010

757Tuesday, December 14, 2010

757Tuesday, December 14, 2010

A

5

+CPU_CORE

Bottom Socket Cavity

C36

10U_0805_6.3V6M

C36

10U_0805_6.3V6M

1

D D

+CPU_CORE

2

C48

10U_0805_6.3V6M

C48

10U_0805_6.3V6M

1

2

C37

10U_0805_6.3V6M

C37

10U_0805_6.3V6M

1

2

C49

10U_0805_6.3V6M

C49

10U_0805_6.3V6M

1

2

Top Socket Cavity

C59

22U_0805_6.3V6M

C59

22U_0805_6.3V6M

1

2

C C

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

C60

22U_0805_6.3V6M

C60

22U_0805_6.3V6M

1

1

2

2

Top Socket Edge

C77

22U_0805_6.3V6M

C77

22U_0805_6.3V6M

C76

C76

1

1

2

2

C61

22U_0805_6.3V6M

C61

22U_0805_6.3V6M

C78

22U_0805_6.3V6M

C78

22U_0805_6.3V6M

Bottom Socket Edge

C85

330U_D2_2.5VY_R9M+C85

330U_D2_2.5VY_R9M

C84

330U_D2_2.5VY_R9M+C84

330U_D2_2.5VY_R9M

1

1

+

+

2

2

B B

A A

1

+

+

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

1

2

1

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

C86

C86

4

SV type CPU

QC 94A
DC 53A

C39

10U_0805_6.3V6M

C39

10U_0805_6.3V6M

C38

C38

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C50

C50

1

2

C62

22U_0805_6.3V6M

C62

22U_0805_6.3V6M

1

2

C79

22U_0805_6.3V6M

C79

22U_0805_6.3V6M

1

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

C87

C87

+

+

2

C40

10U_0805_6.3V6M

C40

10U_0805_6.3V6M

1

2

C51

C51

C52

10U_0805_6.3V6M

C52

10U_0805_6.3V6M

1

2

C64

22U_0805_6.3V6M

C64

22U_0805_6.3V6M

C63

22U_0805_6.3V6M

C63

22U_0805_6.3V6M

1

2

C80

22U_0805_6.3V6M

C80

22U_0805_6.3V6M

C81

22U_0805_6.3V6M

C81

22U_0805_6.3V6M

1

2

9/16

PDDG says 470u*4

C65

22U_0805_6.3V6M

C65

22U_0805_6.3V6M

C66

22U_0805_6.3V6M

C66

22U_0805_6.3V6M

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C82

22U_0805_6.3V6M

C82

22U_0805_6.3V6M

1

2

C83

C83

1

2

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26

AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

3

POWER

JCPU1F

JCPU1F

POWER

8.5A

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CORE SUPPLY

CORE SUPPLY

PEG AND DDR

PEG AND DDR

VCC_SENSE

VCCIO_SENSE

VSSIO_SENSE

SENSE LINES SVID

SENSE LINES SVID

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

VSS_SENSE

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

VCCSENSE_R
VSSSENSE_R

2

+1.05VS_VCCP

1

2

1

2

1

2

1

2

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

VCCIO_SENSE
VSSIO_SENSE

22U_0805_6.3V6M

C43

C43

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

C53

C53

1

1

2

1

2

C45

C45

C44

C44

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

@

@

C54

C54

C55

C55

2

MB Bottom Socket Cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

MB Top Socket Cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C67

C67

22U_0805_6.3V6M

22U_0805_6.3V6M

C71

C71

R73 0_0402_5%R73 0_0402_5%
R74 0_0402_5%R74 0_0402_5%

1

1

2

1

2

12

1 2
1 2

@

@

C69

C69

C68

C68

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C72

C72

C73

C73

2

R67

R67
130_0402_5%

130_0402_5%

R69 43_0402_1%R69 43_0402_1%

1 2

R70 0_0402_5%R70 0_0402_5%

1 2

R71 0_0402_5%R71 0_0402_5%

1 2

VCCIO_SENSE 53
VSSIO_SENSE 53

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C46

C46

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

C56

C56

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

C70

C70

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C74

C74

2

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

2

330U_D2_2V_Y

330U_D2_2V_Y

1

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

+1.05VS_VCCP+1.05VS_VCCP

12

R72

R72
100_0402_1%

100_0402_1%

12

R75

R75
100_0402_1%

100_0402_1%

C47

C47

C57

C57

C58

C58

C75

C75

+

2

12

R68

R68
75_0402_5%

75_0402_5%

@

@

C42

C42

2

Place the PU
resistors close to CPU

VCCSENSE 54
VSSSENSE 54

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

1

1

C41

C41

+

+

+

1

+1.05VS_VCCP

2012 compatible

VR_SVID_ALRT# 54
VR_SVID_CLK 54
VR_SVID_DAT 54

Place the PU
resistors close to VR

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

857Tuesday, December 14, 2010

857Tuesday, December 14, 2010

857Tuesday, December 14, 2010

A

A

A

5

D D

4

3

2

1

DELETE

+VGFX_CORE

Top Socket Cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C91

C91

C C

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

1

C92

C92

C93

C93

2

Top Socket Edge

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C95

C95

2

22U_0805_6.3V6M

1

1

C96

C96

C97

C97

2

2

Bottom Socket Cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C100

C100

2

Bottom Socket Edge

B B

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

1

C111

C111

2

22U_0805_6.3V6M

1

2

1

2

1

C101

C101

C102

C102

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

@

@

1

C113

C113

C112

C112

2

Bottom Socket Edge

330U_D2_2V_Y

330U_D2_2V_Y

1

+1.8VS_VCCPLL

C122

330U_D2_2V_Y+C122

330U_D2_2V_Y

1

+

2

+

+

C115

C115

2

C125

10U_0805_6.3V6M

C125

10U_0805_6.3V6M

1

2

Vaxg

Can connect to GND if motherboard only‧
supports external graphics and if GFX VR is not
stuffed in a common motherboard design,

VAXG can be left floating in a common‧
motherboard design (Gfx VR keeps VAXG from
floating) if the VR is stuffed

A A

+1.8VS

R88

R88

0_0805_5%

0_0805_5%

1 2

EDS1.3

QC DC 33A

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C94

C94

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C98

C98

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C103

C103

2

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

1

C114

C114

2

330U_D2_2V_Y

330U_D2_2V_Y

1

@

@

+

+

C116

C116

2

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24
AL23
AL21
AL20
AL18

AL17
AK24
AK23
AK21
AK20
AK18
AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17
AH24
AH23
AH21
AH20
AH18
AH17

JCPU1G

JCPU1G

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

1.2A

B6

VCCPLL1

C124

1U_0402_6.3V6K

C124

1U_0402_6.3V6K

C123

1U_0402_6.3V6K

C123

1U_0402_6.3V6K

1

1

2

2

A6

VCCPLL2

A2

VCCPLL3

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

POWER

POWER

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

VREFMISC

GRAPHICS

GRAPHICS

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SENSE

1.8V RAIL

1.8V RAIL

VAXG_SENSE

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

FC_C22

VCCSA_VID1

AK35
AK34

AL1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

VCC_AXG_SENSE 54
VSS_AXG_SENSE 54

+V_SM_VREF should
have 20 mil trace width

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10A

6A

H_FC_C22

1 2

C99

C99

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C105

C105

2

+VCCSA
10U_0805_6.3V6M

10U_0805_6.3V6M

1

C117

C117

2

R89

R89
10K_0402_5%

10K_0402_5%

+1.5V_CPU_VDDQ

10/2

R84 0_0402_5%R84 0_0402_5%

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C106

C106

C118

C118

12

1

2

1

2

R90

@R90

@

0_0402_5%

0_0402_5%

1

C107

C107

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C119

C119

1

2

1

2

1 2

+1.5V_CPU_VDDQ

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

1

C108

C108

C109

C109

2

2

+VCCSA

10U_0603_6.3V6M

10U_0603_6.3V6M

@

@

1

C120

C120

1

+

+

C121

2

C121
330U_D2_2V_Y

330U_D2_2V_Y

2

R87 0_0402_5%R87 0_0402_5%

VCCSA_SENSE 52

VCCSA_VID1 52

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

10U_0805_6.3V6M

10U_0805_6.3V6M

1

+

+

C110

C110

330U_D2_2V_Y

330U_D2_2V_Y

2

R86 100_0402_5%R86 100_0402_5%

1 2

1 2

C104

C104

9/16, SM50

+V_SM_VREF+V_SM_VREF_CNT

+1.5VS

JP1

@JP1

@

VCCSA_SENSE

12

R83

R83
1K_0402_1%

1K_0402_1%

12

R85

R85
1K_0402_1%

1K_0402_1%

VSSSA_SENSE 52

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

957Tuesday, December 14, 2010

957Tuesday, December 14, 2010

957Tuesday, December 14, 2010

A

A

A

of

5

D D

C C

B B

4

JCPU1H

JCPU1H

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10

AR25
AR22
AR19
AR16
AR13
AR10

AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AJ25

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AN7

VSS43

AN4

VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77

AK7

VSS78

AK4

VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

3

JCPU1I

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS

2

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

1

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Sandy Bridge_rPGA_Rev1p0
CONN@

CONN@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

10 57Tuesday, December 14, 2010

10 57Tuesday, December 14, 2010

10 57Tuesday, December 14, 2010

A

A

A

5

+V_DDR_M3_REFA

D D

C C

B B

A A

R2016

R2016

1 2

0_0402_5%

0_0402_5%
@

@

+1.5V

12

R2001

R2001
1K_0402_1%

1K_0402_1%

12

R2002

R2002
1K_0402_1%

1K_0402_1%

All VREF traces should
have 10 mil trace width

<Address: 00>

DIMM_A Reserve H:4mm

5

4

+1.5V

JDIMM1

R2014

R2014

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

FOX_AS0A621-U4RG-7H

FOX_AS0A621-U4RG-7H
CONN@

CONN@

RESET#

VREF_CA

EVENT#

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2.2U_0603_6.3V6K
C2000

C2000

12

DDR_CKE0_DIMMA6

DDR_A_BS26

M_CLK_DDR06
M_CLK_DDR#06

DDR_A_BS06
DDR_A_WE#6

DDR_A_CAS#6

DDR_CS1_DIMMA#6

+3VS

+0.75VS +0.75VS

C2020

0.1U_0402_16V4Z

C2020

0.1U_0402_16V4Z

12

4

DDR_A_D0

C2001

C2001

DDR_A_D1

12

DDR_A_DM0
DDR_A_D2

DDR_A_D3
DDR_A_D8

DDR_A_D9
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D10

DDR_A_D11
DDR_A_D16

DDR_A_D17
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D18

DDR_A_D19
DDR_A_D24 DDR_A_D29

DDR_A_D25
DDR_A_DM3
DDR_A_D26

DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9 DDR_A_MA7

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR1

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D50

DDR_A_D51
DDR_A_D56

DDR_A_D57
DDR_A_DM7
DDR_A_D58

DDR_A_D59

R2013

10K_0402_5%

R2013

10K_0402_5%

C2021

2.2U_0603_6.3V6K

C2021

2.2U_0603_6.3V6K

12

10K_0402_5%

10K_0402_5%

12

1 2

+DIMM0_VREF

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0603_6.3V6K

VSS
DQ4
DQ5
VSS

DQS0#

DQS0

VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

A15
A14

VDD

A11

A7

VDD

A6
A4

VDD

A2
A0

VDD

CK1

CK1#

VDD

BA1

RAS#

VDD

S0#

ODT0

VDD
ODT1

NC

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SDA

SCL
VTT

GND2

BOSS2

Issued Date

Issued Date

Issued Date

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

3

+1.5V

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DDR3_DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D22

DDR_A_D23
DDR_A_D28

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_CKE1_DIMMA
DDR_A_MA15

DDR_A_MA14
DDR_A_MA11

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

M_CLK_DDR#1M_CLK_DDR#0
DDR_A_BS1

DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
M_ODT1

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

D_CK_SDATA
D_CK_SCLK

3

SP07000NZ00

2009/12/01

2009/12/01

2009/12/01

DDR3_DRAMRST# 6,12

DDR_CKE1_DIMMA 6

M_CLK_DDR1 6
M_CLK_DDR#1 6

DDR_A_BS1 6
DDR_A_RAS# 6

DDR_CS0_DIMMA# 6
M_ODT0 6

M_ODT1 6

+VREF_CA

12

D_CK_SDATA 12,14
D_CK_SCLK 12,14

Compal Secret Data

Compal Secret Data

Compal Secret Data

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K
C2014

C2014

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

Deciphered Date

Deciphered Date

Deciphered Date

C2015

C2015

+1.5V

12

12

R2003

R2003
1K_0402_1%

1K_0402_1%

JM50

R2004

R2004
1K_0402_1%

1K_0402_1%

2

2010/12/31

2010/12/31

2010/12/31

2

1

DDR_A_DQS#[0..7] 6

DDR_A_DQS[0..7] 6

DDR_A_D[0..63] 6

DDR_A_MA[0..15] 6

Layout Note:

+1.5V

1U_0402_6.3V6K

1U_0402_6.3V6K

12

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

12

+0.75VS

1U_0402_6.3V6K

1U_0402_6.3V6K

12

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Place near JDIMM1

C2004

1U_0402_6.3V6K

C2004

1U_0402_6.3V6K

C2005

1U_0402_6.3V6K

C2005

12

C2009

C2009

12

1U_0402_6.3V6K

12

C2010

10U_0603_6.3V6M

C2010

10U_0603_6.3V6M

12

C2018

1U_0402_6.3V6K

C2018

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

C2011

10U_0603_6.3V6M

C2011

10U_0603_6.3V6M

12

12

C2019

1U_0402_6.3V6K

C2019

1U_0402_6.3V6K

12

C2003

1U_0402_6.3V6K

C2003

1U_0402_6.3V6K

C2002

C2002

12

10U_0603_6.3V6M

10U_0603_6.3V6M12C2008

10U_0603_6.3V6M

C2008

10U_0603_6.3V6M

C2007

C2007

12

Layout Note:
Place near JDIMM1.203,204

C2016

C2016

C2017

1U_0402_6.3V6K

C2017

1U_0402_6.3V6K

12

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

1

C2012

C2012

10U_0603_6.3V6M

10U_0603_6.3V6M

@

@

C2013

C2013

12

11

11

11

330U_D2_2V_Y

330U_D2_2V_Y

C2006

C2006

12

+

+

A

A

A

57

57

57

5

+V_DDR_M3_REFB

D D

C C

B B

A A

R2040

R2040

1 2

0_0402_5%

0_0402_5%
@

@

+1.5V

12

R2015

R2015
1K_0402_1%

1K_0402_1%

12

R2017

R2017
1K_0402_1%

1K_0402_1%

10K_0402_5%

10K_0402_5%

+0.75VS

R2028

R2028

4

C2022

2.2U_0603_6.3V6K

C2022

2.2U_0603_6.3V6K

12

All VREF traces should
have 10 mil trace width

DDR_CKE2_DIMMB6

DDR_B_BS26

M_CLK_DDR26
M_CLK_DDR#26

DDR_B_BS06
DDR_B_WE#6

DDR_B_CAS#6

DDR_CS3_DIMMB#6

+3VS

C2043

2.2U_0603_6.3V6K

C2043

2.2U_0603_6.3V6K

C2042

0.1U_0402_16V4Z

C2042

0.1U_0402_16V4Z

12

12

12

3

+1.5V

+DIMM1_VREF

C2023

0.1U_0402_16V4Z

C2023

0.1U_0402_16V4Z
DDR_B_D0

12

DDR_B_D1
DDR_B_DM0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11
DDR_B_D16

DDR_B_D17
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D18

DDR_B_D19
DDR_B_D24

DDR_B_D25
DDR_B_DM3
DDR_B_D26

DDR_B_D27

DDR_CKE2_DIMMB DDR_CKE3_DIMMB

DDR_B_BS2

DDR_B_MA9
DDR_B_MA8

M_CLK_DDR2 M_CLK_DDR3
M_CLK_DDR#2 M_CLK_DDR#3

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D50

+3VS

DDR_B_D51
DDR_B_D56

DDR_B_D57
DDR_B_DM7
DDR_B_D58

DDR_B_D59

12

R2029

R2029

10K_0402_5%

10K_0402_5%

JDIMM2

3
5
7

9
11
13
15
17
19
21
23
25
27

33
35

39
41

45
47
49
51
53
55
57
59

63
67

69

73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

205

FOX_AS0A621-U4SG-7H

FOX_AS0A621-U4SG-7H

CONN@JDIMM2

CONN@

VREF_DQ1VSS1
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS129RESET#
VSS1131VSS12
DQ10
DQ11
VSS1337VSS14
DQ16
DQ17
VSS1543VSS16
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS2261DQS#3
DM3
VSS2365VSS24
DQ26
DQ27
VSS2571VSS26

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

G1

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA
VTT2

CK1

BA1

S0#

NC2

SCL

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

G2

+1.5V

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D28

DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D30

DDR_B_D31

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11DDR_B_MA12
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4DDR_B_MA5

DDR_B_MA2DDR_B_MA3
DDR_B_MA0DDR_B_MA1

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB#
M_ODT2

M_ODT3

+VREF_CB
DDR_B_D36

DDR_B_D37
DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

D_CK_SDATA
D_CK_SCLK

+0.75VS

DDR3_DRAMRST# 6,11

DDR_CKE3_DIMMB 6

M_CLK_DDR3 6
M_CLK_DDR#3 6

DDR_B_BS1 6
DDR_B_RAS# 6

DDR_CS2_DIMMB# 6
M_ODT2 6

M_ODT3 6

12

D_CK_SDATA 11,14
D_CK_SCLK 11,14

SP07000NN00

2

+1.5V

C2025

1U_0402_6.3V6K

C2025

1U_0402_6.3V6K

C2024

1U_0402_6.3V6K

C2024

1U_0402_6.3V6K

12

12

+1.5V

C2029

10U_0603_6.3V6M

C2029

10U_0603_6.3V6M

12

+1.5V

12

R2018

R2018
1K_0402_1%

1K_0402_1%

C2040

2.2U_0603_6.3V6K

C2040

2.2U_0603_6.3V6K

C2041

0.1U_0402_16V4Z

C2041

0.1U_0402_16V4Z

12

12

R2019

R2019
1K_0402_1%

1K_0402_1%

JM50

+0.75VS

C2036

1U_0402_6.3V6K

C2036

1U_0402_6.3V6K

12

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

12

Layout Note:
Place near JDIMM2

C2031

10U_0603_6.3V6M

C2031

10U_0603_6.3V6M

C2030

10U_0603_6.3V6M

C2030

10U_0603_6.3V6M

12

12

Layout Note:
Place near JDIMM2.203,204

C2037

1U_0402_6.3V6K

C2037

1U_0402_6.3V6K

12

12

C2026

1U_0402_6.3V6K

C2026

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

12

C2038

1U_0402_6.3V6K

C2038

1U_0402_6.3V6K

1

DDR_B_DQS#[0..7] 6

DDR_B_DQS[0..7] 6

DDR_B_D[0..63] 6

DDR_B_MA[0..15] 6

C2027

1U_0402_6.3V6K

C2027

1U_0402_6.3V6K

12

C2032

C2032

C2033

10U_0603_6.3V6M

C2033

10U_0603_6.3V6M

12

12

C2039

1U_0402_6.3V6K

C2039

1U_0402_6.3V6K

12

C2034

10U_0603_6.3V6M

C2034

10U_0603_6.3V6M

330U_D2_2V_Y

330U_D2_2V_Y

10U_0603_6.3V6M

10U_0603_6.3V6M

@

@

@

@

C2028

C2028

C2035

C2035

12

12

+

+

Security Classification

Security Classification

<Address: 01>

DIMM_B Standard type H:4mm

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01

2009/12/01

2009/12/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2010/12/31

2010/12/31

2010/12/31

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

12

12

12

1

57

57

57

A

A

A

5

PCH_RTCX1

32.768KHZ_12.5PF_Q13MC14610002Y132.768KHZ_12.5PF_Q13MC14610002

R105

@R105

@

1K_0402_5%

1K_0402_5%

R108

R108

0_0402_5%

0_0402_5%

12

1 2

1 2

1 2

1

C129

C129
18P_0402_50V8J

18P_0402_50V8J

2

12

12

R119

R119

33_0402_5%

33_0402_5%

R125

R125

33_0402_5%

33_0402_5%

R128

R128

33_0402_5%

33_0402_5%

PCH_RTCX2

SM_INTRUDER#
PCH_INTVRMEN

HDA_SPKR

HDA_SDOUT

HDA_SYNC

HDA_BIT_CLK

HDA_RST#

HDA_SDOUT_R

+RTCVCC

1U_0603_10V4Z

1U_0603_10V4Z

1 2

R93 20K_0402_5%R93 20K_0402_5%

1 2

R94 20K_0402_5%R94 20K_0402_5%

1U_0603_10V4Z

1U_0603_10V4Z

HDA_SPKR46

HDA_SDIN046

PADT1PAD
PADT2PAD
PADT9PAD

1 2

R91 10M_0402_5%R91 10M_0402_5%

1

Y1

18P_0402_50V8J

18P_0402_50V8J

D D

+RTCVCC

R96 1M_0402_5%R96 1M_0402_5%
R98 330K_0402_5%R98 330K_0402_5%

*

(INTVRMEN should always be pull high.)

+3VS

*

HDA_SDO41

C C

HDA_SDO

ME debug mode,this signal has a weak internal PD
Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3VALW_PCH

R112 1K_0402_5%R112 1K_0402_5%

OSC4OSC

1

NC3NC

C128

C128

2

2

1 2
1 2

INTVRMEN

H：Integrated VRM enable
L：Integrated VRM disable

R102 1K_0402_5%@R102 1K_0402_5%@

1 2

HIGH= Enable ( No Reboot )
LOW= Disable (Default)

+3VALW_PCH

This signal has a weak internal pull-down
On Die PLL VR Select is supplied by

1.5V when sampled high

*

1.8V when sampled low
Needs to be pulled High for Huron River platfrom

HDA_BITCLK_AUDIO46

B B

HDA_RST#_AUDIO46

HDA_SDOUT_AUDIO46

C126

C126

C130

C130

ME

R113

R113

51_0402_5%

51_0402_5%

T1
T2
T9

1

2

1

2

12

CMOS

12

@

12

@

PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN

HDA_BIT_CLK
HDA_SYNC
HDA_SPKR
HDA_RST#

HDA_SDIN0

PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO

PCH_SPI_CLK
PCH_SPI_CS#

PCH_SPI_SI
PCH_SPI_SO

JCMOS1

SHORT PADS@JCMOS1

SHORT PADS

JME1

SHORT PADS@JME1

SHORT PADS

HDA_SDOUT

4

PCH_RTCRST#
PCH_SRTCRST#

A20
C20
D20
G22
K22
C17

N34
L34
T10
K34

E34
G34
C34
A34

A36

C36
N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

U3A

U3A

RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO

SPI_CLK
SPI_CS0#
SPI_CS1#

SPI_MOSI
SPI_MISO

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

JTAG

JTAG

RTCIHDA

RTCIHDA

SPI

SPI

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN

SATA 6G

SATA 6G

SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP
SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19

C38
A38
B37
C37

D36
E36

K36
V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11
Y10

AB12
AB13

AH1

P3
V14
P1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

SERIRQ

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#
PCH_GPIO21
PCH_GPIO19

3

For re-chareable RTC

RTC BAT and 1K ohm
are at Power page

LPC_AD0 41
LPC_AD1 41
LPC_AD2 41
LPC_AD3 41

LPC_FRAME# 41

SERIRQ 41

SATA_DTX_C_PRX_N0 38
SATA_DTX_C_PRX_P0 38
SATA_PTX_DRX_N0 38
SATA_PTX_DRX_P0 38

+1.05VS_VCC_SATA

R114

R114

37.4_0402_1%

37.4_0402_1%
1 2

+1.05VS_SATA3

R116

R116

49.9_0402_1%

49.9_0402_1%

1 2

1 2

R117 750_0402_1%R117 750_0402_1%

PCH_SATALED# 42

PADT7PAD

T7

+RTCBATT

HDD

2

1U_0603_10V4Z

1U_0603_10V4Z

12
12
12
12

+RTCVCC

C127

C127

W=20milstrace width 10milW=20mils

1

2

+CHGRTC

D1

D1

2

1

3

BAS40-04_SOT23-3

BAS40-04_SOT23-3

Place C127 close to PCH.

SERIRQ
PCH_SATALED#
PCH_GPIO21
PCH_GPIO19

R97 10K_0402_5%R97 10K_0402_5%
R99 10K_0402_5%R99 10K_0402_5%
R129 10K_0402_5%R129 10K_0402_5%
R394 4.7K_0402_5%R394 4.7K_0402_5%

Debug Port DG 1.2 PH 4.7K +3VS

SPI ROM FOR ME ( 4MByte )

C131

C131

PCH_SPI_WP#

PCH_SPI_HOLD#
PCH_SPI_CS#_R
PCH_SPI_CLK_R
PCH_SPI_SI_R

R115

@R115

@

PCH_SPI_CLK_R

PCH_SPI_WP#

PCH_SPI_HOLD#

+3V_DSW_SPI

If use SPI programmer,
R854 should be open
(Normal is pop)

+3VS

R106

R106

Please short PJP35

0_0402_5%

0_0402_5%
1 2

D6

D6

12

@

@

RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

9/06 SM50

PCH_SPI_CS#

1 2

R109 0_0402_5%R109 0_0402_5%

PCH_SPI_CLK

1 2

R110 0_0402_5%R110 0_0402_5%

PCH_SPI_SI

1 2

R111 0_0402_5%R111 0_0402_5%

C132

@C132

@

22P_0402_50V8J

22P_0402_50V8J

Reserve for EMI please close to UH1

12

33_0402_5%

33_0402_5%

1 2

+3VS

need to check

R103 3.3K_0402_5%R103 3.3K_0402_5%

1 2

R104 3.3K_0402_5%R104 3.3K_0402_5%

1 2

PCH_SPI_SO PCH_SPI_SO_R

U4

8
3
7
1
6
5

SP07000OJ00

SPI ROM Socket

R107 0_0402_5%R107 0_0402_5%

CONN@U4

CONN@

VCC

VSS
W
HOLD
S
C

Q

D

WIESO_G6179-100000

WIESO_G6179-100000

45@

45@

1 2

4

PCH_SPI_SO_R

2

&U1

&U1

S IC FL 32M W25Q32BVSSIG SOIC 8P SPI ROM

S IC FL 32M W25Q32BVSSIG SOIC 8P SPI ROM

SA00003K800

+3VS

1

HDA_BITCLK_AUDIO

@

@

SM50

1 2

C133 22P_0402_50V8J

C133 22P_0402_50V8J

HDA_SDOUT_AUDIO

@

@

1 2

C134 22P_0402_50V8J

C134 22P_0402_50V8J

Prevent back drive issue.

From JM50
Prevent back drive issue.

HDA_SDOUT_R HDA_SDOUT

A A

+3VS

G

G

S

S

1 2

R100@

R100@
0_0402_5%

0_0402_5%

Q4

Q4
BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

123

D

D

5

HDA_SYNC_AUDIO46

4

+3VS

G

G

2

Q7

Q7
BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

HDA_SYNC

13

D

S

D

S

1 2

R123

@R123

@

0_0402_5%

0_0402_5%

DG1.5, potential leakage concern

10/11 move 33 ohm and 1M ohm to sub board

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

4019BI

4019BI

4019BI

Date: Sheet

Date: Sheet

Date: Sheet

1

of

13 57Tuesday, December 14, 2010

of

13 57Tuesday, December 14, 2010

of

13 57Tuesday, December 14, 2010

A

A

A

5

12
12

12
12

PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

PCH_GPIO73

CLK_MINI1#
CLK_MINI1

CLK_USB30#
CLK_USB30

CLK_LAN#

CLK_CARD#
CLK_CARD

PCH_GPIO26

PCH_GPIO44

CLK_VGA#
CLK_VGA

PEG_CLKREQ#_R

PCH_GPIO45 XTAL25_OUT

PCH_GPIO46
CLK_BCLK_ITP#

CLK_BCLK_ITP

PEG_CLKREQ#_R

PCIE_PRX_DTX_N146

PCIE LAN

Wireless LAN

Card Reader

D D

USB3.0

Wireless LAN

C C

USB3.0

PCIE LAN

Card Reader

B B

+3VS

R174 10K_0402_5%R174 10K_0402_5%
R176 10K_0402_5%R176 10K_0402_5%

+3VALW_PCH

R180 10K_0402_5%R180 10K_0402_5%
R181 10K_0402_5%R181 10K_0402_5%
R182 10K_0402_5%R182 10K_0402_5%
R183 10K_0402_5%R183 10K_0402_5%
R184 10K_0402_5%R184 10K_0402_5%

A A

R185 10K_0402_5%R185 10K_0402_5%

PCIE_PRX_DTX_P146
PCIE_PTX_C_DRX_N146
PCIE_PTX_C_DRX_P146

PCIE_PRX_DTX_N239
PCIE_PRX_DTX_P239
PCIE_PTX_C_DRX_N239
PCIE_PTX_C_DRX_P239

PCIE_PRX_DTX_N340

PCIE_PRX_DTX_P340
PCIE_PTX_C_DRX_N340
PCIE_PTX_C_DRX_P340

PCIE_PRX_DTX_N444

PCIE_PRX_DTX_P444
PCIE_PTX_C_DRX_N444
PCIE_PTX_C_DRX_P444

CLK_PCIE_MINI1#39
CLK_PCIE_MINI139

MINI1_CLKREQ#39

CLK_PCIE_USB30#44
CLK_PCIE_USB3044

USB30_CLKREQ#44

CLK_PCIE_LAN#46
CLK_PCIE_LAN46

LAN_CLKREQ#46

CLK_PCIE_CARD#40
CLK_PCIE_CARD40

CARD_CLKREQ#40

CLK_PEG_VGA#22

CLK_PEG_VGA22

12
12

12
12
12
12
12
12

C135 0.1U_0402_10V7KC135 0.1U_0402_10V7K
C136 0.1U_0402_10V7KC136 0.1U_0402_10V7K

C137 0.1U_0402_10V7KC137 0.1U_0402_10V7K
C138 0.1U_0402_10V7KC138 0.1U_0402_10V7K

C212 0.1U_0402_10V7KC212 0.1U_0402_10V7K
C213 0.1U_0402_10V7KC213 0.1U_0402_10V7K

C214 0.1U_0402_10V7KC214 0.1U_0402_10V7K
C215 0.1U_0402_10V7KC215 0.1U_0402_10V7K

R149 0_0402_5%R149 0_0402_5%
R150 0_0402_5%R150 0_0402_5%

R151 0_0402_5%R151 0_0402_5%
R152 0_0402_5%R152 0_0402_5%

R153 0_0402_5%R153 0_0402_5%
R154 0_0402_5%R154 0_0402_5%

R333 0_0402_5%R333 0_0402_5%
R334 0_0402_5%R334 0_0402_5%

R338 0_0402_5%R338 0_0402_5%

MINI1_CLKREQ#
USB30_CLKREQ#

PCH_GPIO73
LAN_CLKREQ#
PCH_GPIO26
PCH_GPIO44
PCH_GPIO45
PCH_GPIO46

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

R159 0_0402_5%R159 0_0402_5%

1 2

R160 0_0402_5%R160 0_0402_5%

1 2

T88PAD T88PAD
T89PAD T89PAD

4

BG34
AV32

AU32
BE34

BF34
BB32
AY32

BG36
AV34

AU34
BF36

BE36
AY34
BB34

BG37
BH37
AY36
BB36

BG38
AU36
AV36

BG40
AY40

BB40
BE38

BC38

AW38

AY38

AB49
AB47

AA48
AA47

AB42
AB40

AK14
AK13

+3VALW_PCH

12

R179

R179
10K_0402_5%

10K_0402_5%

for safe

BJ34

BJ36

BJ38

BJ40

Y40
Y39

J2

M1

V10

Y37
Y36

A8

Y43
Y45

L12

V45
V46

L14

E6

V40
V42

T13
V38

V37
K12

U3B

U3B

PERN1
PERP1
PETN1
PETP1

PERN2
PERP2
PETN2
PETP2

PERN3
PERP3
PETN3
PETP3

PERN4
PERP4
PETN4
PETP4

PERN5
PERP5
PETN5
PETP5

PERN6
PERP6
PETN6
PETP6

PERN7
PERP7
PETN7
PETP7

PERN8
PERP8
PETN8
PETP8

CLKOUT_PCIE0N
CLKOUT_PCIE0P

PCIECLKRQ0# / GPIO73

CLKOUT_PCIE1N
CLKOUT_PCIE1P

PCIECLKRQ1# / GPIO18

CLKOUT_PCIE2N
CLKOUT_PCIE2P

PCIECLKRQ2# / GPIO20

CLKOUT_PCIE3N
CLKOUT_PCIE3P

PCIECLKRQ3# / GPIO25

CLKOUT_PCIE4N
CLKOUT_PCIE4P

PCIECLKRQ4# / GPIO26

CLKOUT_PCIE5N
CLKOUT_PCIE5P

PCIECLKRQ5# / GPIO44

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

PEG_B_CLKRQ# / GPIO56

CLKOUT_PCIE6N
CLKOUT_PCIE6P

PCIECLKRQ6# / GPIO45
CLKOUT_PCIE7N

CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46
CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

1 3

12

R381

R381
@

@

2.2K_0402_5%

2.2K_0402_5%

2

D

D

Q16

Q16

G

G

2N7002H_SOT23-3

2N7002H_SOT23-3
OPT@

OPT@

S

S

12

PCI-E*

PCI-E*

VGA_ON 17,45,55

R380

R380
@

@

2.2K_0402_5%

2.2K_0402_5%

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

Link

Link

PEG_A_CLKRQ# / GPIO47

CLOCKS

CLOCKS

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

R379

R379

1 2

0_0402_5%

0_0402_5%

OPT@

OPT@

E12
H14

SMBCLK

C9

SMBDATA

A12
C8

SML0CLK

G12

SML0DATA

C13

SML1CLK / GPIO58

SML1DATA / GPIO75

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DOT_96N

CLKIN_DOT_96P

E14
M16

M7

CL_CLK1

T11

CL_DATA1

P10

CL_RST1#

M10

AB37
AB38

AV22
AU22

AM12
AM13

BF18

CLKIN_DMI_N

BE18

CLKIN_DMI_P

BJ30

CLKIN_DMI2_N

BG30

CLKIN_DMI2_P

G24
E24

AK7
AK5

K45

REFCLK14IN

H45

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

XCLK_RCOMP

K43
F47
H47
K49

Pull high at VGA side

PEG_CLKREQ# 22

3

LID_SW_OUT#
PCH_SMBCLK
PCH_SMBDATA

DRAMRST_CNTRL_PCH

PCH_SML0CLK
PCH_SML0DATA

PCH_GPIO74
PCH_SML1CLK
PCH_SML1DATA

PCH_GPIO47

CLK_CPU_DMI#
CLK_CPU_DMI

CLK_DP#
CLK_DP

CLK_BUF_CPU_DMI#
CLK_BUF_CPU_DMI

CLKIN_DMI2#
CLKIN_DMI2CLK_LAN

CLK_BUF_DREF_96M#
CLK_BUF_DREF_96M

CLK_BUF_PCIE_SATA#
CLK_BUF_PCIE_SATA

CLK_BUF_ICH_14M

CLK_PCI_LPBACK

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

CLK_FLEX0
CLK_27M_TCLK_R
CLK_48M_USB3_PCH_R
DGPU_PRSNT#

LID_SW_OUT# 41
PCH_SMBCLK 39
PCH_SMBDATA 39

DRAMRST_CNTRL_PCH 6,7

check: no need to pull high?

CLK_CPU_DMI# 5
CLK_CPU_DMI 5

CLK_DP# 5
CLK_DP 5

CLK_PCI_LPBACK 17

+1.05VS_VCCDIFFCLKN

R168

R168

90.9_0402_1%

90.9_0402_1%
1 2

T8 PADT8 PAD
R170 22_0402_5%@R170 22_0402_5%@

R173 22_0402_5%@R173 22_0402_5%@

DGPU_PRSNT#

12

12

OPTIMUS

UMA

+3VS

12

1 2

R382

R382
10K_0402_5%

10K_0402_5%
UMA@

UMA@

R383

R383
10K_0402_5%

10K_0402_5%
OPT@

OPT@

CLK_27M_TCLK 22
CLK_48M_USB3_PCH 44

GPIO67

DGPU_PRSNT#

0
1

2

PCH_SMBCLK
PCH_SMBDATA
PCH_SML0CLK
PCH_SML0DATA
PCH_SML1CLK
PCH_SML1DATA
PCH_GPIO74
PCH_GPIO47
LID_SW_OUT#
DRAMRST_CNTRL_PCH

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

PCH_SMBDATA

6 1

R396 0_0402_5%

R396 0_0402_5%

PCH_SMBCLK

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

PCH_SML1DATA

R398 0_0402_5%

R398 0_0402_5%

PCH_SML1CLK EC_SMB_CK2

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

CLK_BUF_CPU_DMI#
CLK_BUF_CPU_DMI

CLKIN_DMI2#
CLKIN_DMI2

CLK_BUF_DREF_96M#
CLK_BUF_DREF_96M

CLK_BUF_PCIE_SATA#
CLK_BUF_PCIE_SATA

CLK_BUF_ICH_14M

XTAL25_IN

C143

C143
18P_0402_50V8J

18P_0402_50V8J

CLK_BUF_ICH_14M

CLK_PCI_LPBACK

R137 2.2K_0402_5%R137 2.2K_0402_5%
R138 2.2K_0402_5%R138 2.2K_0402_5%
R139 2.2K_0402_5%R139 2.2K_0402_5%
R140 2.2K_0402_5%R140 2.2K_0402_5%
R141 2.2K_0402_5%R141 2.2K_0402_5%
R142 2.2K_0402_5%R142 2.2K_0402_5%
R143 10K_0402_5%R143 10K_0402_5%
R144 10K_0402_5%R144 10K_0402_5%
R145 10K_0402_5%R145 10K_0402_5%
R146 1K_0402_5%R146 1K_0402_5%

+3VS

Q8A

Q8A

2

1 2

@

@

5

3 4

Q8B

Q8B

1 2

R397 0_0402_5%

R397 0_0402_5%

@

@

+3VS

Q9A

Q9A

2

6 1

1 2

@

@

3 4

Q9B

Q9B

1 2

R399 0_0402_5%

R399 0_0402_5%

@

@

R155 10K_0402_5%R155 10K_0402_5%
R156 10K_0402_5%R156 10K_0402_5%

R157 10K_0402_5%R157 10K_0402_5%
R158 10K_0402_5%R158 10K_0402_5%

R161 10K_0402_5%R161 10K_0402_5%
R162 10K_0402_5%R162 10K_0402_5%

R163 10K_0402_5%R163 10K_0402_5%
R164 10K_0402_5%R164 10K_0402_5%

R167 10K_0402_5%R167 10K_0402_5%

1 2

R169 1M_0402_5%R169 1M_0402_5%

25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012

1

2

R175

@R175

@

33_0402_5%

33_0402_5%

R178

@R178

@
33_0402_5%

33_0402_5%

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

R147

R147

4.7K_0402_5%

4.7K_0402_5%

1 2

D_CK_SDATA

R148

R148

4.7K_0402_5%

4.7K_0402_5%

1 2

D_CK_SCLK

EC_SMB_DA2

5

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

Y2

Y2

12

12

12

Reserve for EMI please close to U60

Compal Electronics, Inc.

+3VS

D_CK_SDATA 11,12

+3VS

D_CK_SCLK 11,12

Pull up at EC side.

1

C144

C144
18P_0402_50V8J

18P_0402_50V8J

2

C145

@C145

@

22P_0402_50V8J

22P_0402_50V8J

1 2

C146

@C146

@

22P_0402_50V8J

22P_0402_50V8J

1 2

1

+3VALW_PCH

EC_SMB_DA2 22,41

EC_SMB_CK2 22,41

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

4019BI

4019BI

4019BI

Date: Sheet

Date: Sheet

Date: Sheet

1

of

14 57Tuesday, December 14, 2010

of

14 57Tuesday, December 14, 2010

of

14 57Tuesday, December 14, 2010

A

A

A

5

4

3

2

1

D D

U3C

DMI_CTX_PRX_N04
DMI_CTX_PRX_N14
DMI_CTX_PRX_N24
DMI_CTX_PRX_N34

DMI_CTX_PRX_P04
DMI_CTX_PRX_P14
DMI_CTX_PRX_P24

PBTN_OUT#41

DMI_CTX_PRX_P34
DMI_CRX_PTX_N04

DMI_CRX_PTX_N14
DMI_CRX_PTX_N24
DMI_CRX_PTX_N34

DMI_CRX_PTX_P04
DMI_CRX_PTX_P14
DMI_CRX_PTX_P24
DMI_CRX_PTX_P34

+1.05VS_VCCP

PCH_PWROK

ACIN41,45,48

1 2

R189 49.9_0402_1%R189 49.9_0402_1%

1 2

R190 750_0402_1%R190 750_0402_1%

4mil width and place
within 500mil of the PCH

R194 0_0402_5%R194 0_0402_5%

R199 0_0402_5%R199 0_0402_5%

R202 0_0402_5%R202 0_0402_5%

R205 0_0402_5%R205 0_0402_5%

R186

@R186

@

0_0402_5%

0_0402_5%

12

+3VS

5

U7

10/11

PCH_PWROK41

VGATE54

C C

R191 10K_0402_5%R191 10K_0402_5%

+3VS

R203 200_0402_5%R203 200_0402_5%

B B

+3VALW_PCH

R206 10K_0402_5%R206 10K_0402_5%
R207 200K_0402_5%R207 200K_0402_5%
R208 10K_0402_5%R208 10K_0402_5%
R209 10K_0402_5%R209 10K_0402_5%

1
2

R197

R197

0_0402_5%

0_0402_5%

@

@

U7

VCC

IN1

OUT

IN2

GND

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

3

12

SUSWARN#_RSUSACK#_R

12

12

12
12
12
12

SYS_PWROK

4

SYS_PWROK

PM_DRAM_PWRGD

SUSWARN#_R
PCH_ACIN
PCH_GPIO72
RI#

XDP_DBRESET#5

PM_DRAM_PWRGD5

PCH_RSMRST#41

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

RBIAS_CPY

1 2

1 2

1 2

1 2

D3

D3

1 2

RB751V-40_SOD323-2

RB751V-40_SOD323-2

DMI_IRCOMP

SUSACK#_R

XDP_DBRESET#_R

SYS_PWROK

PCH_PWROK_R

PM_DRAM_PWRGD

PCH_RSMRST#_R

SUSWARN#_R

PBTN_OUT#_R

PCH_ACIN

PCH_GPIO72

RI#

U3C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PWR_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5

DMI

DMI

System Power Management

System Power Management

FDI_RXP6

FDI

FDI

FDI_RXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1

FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16
AV12
BC10
AV14
BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWODVREN

PCH_RSMRST#_R

WAKE#

PCH_GPIO32

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

SLP_A#

T14 PADT14 PAD

H_PM_SYNC

PCH_GPIO29

FDI_CTX_PRX_N0

BJ14

R195

R195
0_0402_5%

0_0402_5%

1 2

R201 0_0402_5%R201 0_0402_5%

T91 PADT91 PAD

FDI_CTX_PRX_N0 4
FDI_CTX_PRX_N1 4
FDI_CTX_PRX_N2 4
FDI_CTX_PRX_N3 4
FDI_CTX_PRX_N4 4
FDI_CTX_PRX_N5 4
FDI_CTX_PRX_N6 4
FDI_CTX_PRX_N7 4

FDI_CTX_PRX_P0 4
FDI_CTX_PRX_P1 4
FDI_CTX_PRX_P2 4
FDI_CTX_PRX_P3 4
FDI_CTX_PRX_P4 4
FDI_CTX_PRX_P5 4
FDI_CTX_PRX_P6 4
FDI_CTX_PRX_P7 4

FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4

not support Deep S4,S5 DPWROK mux with PWROK
check list1.0 P.42

PCH_PCIE_WAKE# 39,44,46

T10 PADT10 PAD

12

T11 PADT11 PAD

T12 PADT12 PAD

T13 PADT13 PAD

T15 PADT15 PAD

PM_SLP_S5# 41

PM_SLP_S4# 41

PM_SLP_S3# 41

H_PM_SYNC 5

SUSCLK_R 41

Can be left NC when IAMT is not
support on the platfrom

not support Deep S4,S5 can NC
PCH EDS1.2 P.74

DSWODVREN

*

WAKE#
PCH_GPIO29

PCH_GPIO32

EC team suggestion
South Bridge side must have
pull-low 10K on this pin(GPIO32)

R187 330K_0402_5%R187 330K_0402_5%
R188 330K_0402_5%@R188 330K_0402_5%@

DSWODVREN - On Die DSW VR Enable
H

：

Enable

L

：

Disable

R193 10K_0402_5%R193 10K_0402_5%
R196 10K_0402_5%R196 10K_0402_5%

R389 8.2K_0402_5%R389 8.2K_0402_5%

R198 10K_0402_5%

R198 10K_0402_5%

1 2
1 2

1 2

@

@

1 2

12
12

+RTCVCC

+3VALW_PCH

+3VS

R210 10K_0402_5%R210 10K_0402_5%

A A

12

5

PCH_RSMRST#_R

No30

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

15 57Tuesday, December 14, 2010

15 57Tuesday, December 14, 2010

15 57Tuesday, December 14, 2010

A

A

A

5

D D

4

3

2

1

Pull high at LVDS conn side.

PCH_ENVDD34
DPST_PWM34

PCH_LCD_CLK34
PCH_LCD_DATA34

IGPU_BKLT_EN

C C

B B

+3VS

+3VS

R222 2.2K_0402_5% R222 2.2K_0402_5%
R223 2.2K_0402_5% R223 2.2K_0402_5%

R215 0_0402_5% R215 0_0402_5%

R211

R211
100K_0402_5%

100K_0402_5%

1 2

R220 2.2K_0402_5% R220 2.2K_0402_5%
R221 2.2K_0402_5% R221 2.2K_0402_5%

R224 150_0402_1% R224 150_0402_1%
R227 150_0402_1% R227 150_0402_1%
R228 150_0402_1% R228 150_0402_1%

1 2

1 2
1 2

1 2
1 2

1 2
1 2
1 2

ENBKL

CTRL_CLK
CTRL_DATA

PCH_CRT_CLK
PCH_CRT_DATA

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

ENBKL 41

R212

R212

R214

R214

PCH_TXCLK-34
PCH_TXCLK+34

PCH_TXOUT0-34
PCH_TXOUT1-34
PCH_TXOUT2-34

PCH_TXOUT0+34
PCH_TXOUT1+34
PCH_TXOUT2+34

PCH_CRT_B35
PCH_CRT_G35
PCH_CRT_R35

PCH_CRT_CLK35

PCH_CRT_DATA35

PCH_CRT_HSYNC35
PCH_CRT_VSYNC35

2.37K_0402_1%

2.37K_0402_1%

0_0402_5%

0_0402_5%

1K_0402_0.5%

1K_0402_0.5%

IGPU_BKLT_EN

12

12

PCH_TXCLK­PCH_TXCLK+

PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

PCH_CRT_CLK
PCH_CRT_DATA

PCH_CRT_HSYNC
PCH_CRT_VSYNC

R225

R225

CTRL_CLK
CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_IREF

12

12

R226

R226
0_0402_5%

0_0402_5%

AF37
AF36

AE48
AE47

AK39
AK40

AN48

AM47

AK47

AJ48

AN47

AM49

AK49

AJ47

AF40
AF39

AH45
AH47
AF49
AF45

AH43
AH49
AF47
AF43

J47

M45

P45
T40

K47
T45

P39

N48

P49
T49

T39

M40

M47
M49

T43
T42

U3D

U3D

L_BKLTEN
L_VDD_EN

L_BKLTCTL
L_DDC_CLK

L_DDC_DATA
L_CTRL_CLK

L_CTRL_DATA
LVD_IBG

LVD_VBG
LVD_VREFH

LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

LVDS

LVDS

CRT

CRT

SDVO_INTN
SDVO_INTP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

SDVO_CTRLDATA strap pull high
at level shift page

SDVO_SCLK
SDVO_SDATA

PCH_DPB_HPD

PCH_DPB_N0
PCH_DPB_P0
PCH_DPB_N1
PCH_DPB_P1
PCH_DPB_N2
PCH_DPB_P2
PCH_DPB_N3
PCH_DPB_P3

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

SDVO_SCLK 36
SDVO_SDATA 36

PCH_DPB_HPD 36

PCH_DPB_N0 36
PCH_DPB_P0 36
PCH_DPB_N1 36
PCH_DPB_P1 36
PCH_DPB_N2 36
PCH_DPB_P2 36
PCH_DPB_N3 36
PCH_DPB_P3 36

HDMI D2
HDMI D1
HDMI D0
HDMI CLK

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

A

A

16 57Tuesday, December 14, 2010

16 57Tuesday, December 14, 2010

16 57Tuesday, December 14, 2010

A

5

footprint should change to RP_0804_8P4R

+3VS

because RP_8P4R doesn't exist

R229

R229

PCI_PIRQA#

18

PCI_PIRQD#

27

PCI_PIRQC#

D D

R233 8.2K_0402_5%R233 8.2K_0402_5%

8.2K_8P4R_5%

8.2K_8P4R_5%
R230

R230

8.2K_8P4R_5%

8.2K_8P4R_5%
R231

R231

8.2K_8P4R_5%

8.2K_8P4R_5%

1 2

36
45

18
27
36
45

18
27
36
45

PCI_PIRQB#

PCH_GPIO55
PCH_GPIO51
PCH_GPIO5
PCH_GPIO52

PCH_GPIO2
PCH_GPIO4

PCH_GPIO3

No28

PCH_GPIO53

10/2

R234 8.2K_0402_5%R234 8.2K_0402_5%

1 2

C C

R388 100K_0402_5%R388 100K_0402_5%

1 2

DGPU_HOLD_RST#

PLT_RST#

Boot BIOS Strap bit1 BBS1

Boot BIOS

Bit10

1

1
0

C217

C217
10P_0402_50V8J

10P_0402_50V8J
@

@

Destination

Reserved

PCI
SPI
LPC

CLK_PCI_LPBACK14

CLK_PCI_LPC41

VGA_ON14,45,55

CLK_PCI_LPC

No14

Bit11

GNT1#/
GPIO51

0
110

0

RF Boris Tsai suggests

B B

CLK_PCI_LPBACK
CLK_PCI_LPC

C216

C216

10P_0402_50V8J

10P_0402_50V8J

@

@

2

2

1

1

4

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

12

12

T17PAD T17PAD
T18PAD T18PAD
T19PAD T19PAD

DGPU_HOLD_RST#
PCH_GPIO52
VGA_ON_R

PCH_GPIO51
PCH_GPIO53
PCH_GPIO55

PCH_GPIO2
PCH_GPIO3
PCH_GPIO4
PCH_GPIO5

PLT_RST#

R241

R241

0_0402_5%

0_0402_5%

T16PAD T16PAD

PLT_RST#5,40,41,44,46

R247 22_0402_5%R247 22_0402_5%
R248 22_0402_5%R248 22_0402_5%

1 2

CLK_PCI0
CLK_PCI1
CLK_PCI2
CLK_PCI3
CLK_PCI4

U3E

U3E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

RSVD

RSVD

PCI

PCI

3

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NVRAM

NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_RE#_WRB0
NV_RE#_WRB1

NV_WE#_CK0
NV_WE#_CK1

USB

USB

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE
NV_CLE

NV_RCOMP

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5

DF_TVS

AY1
AV10
AT8
AY5

BA2
AT12

BF3

USB20_N0

C24

USB20_P0

A24

USB20_N1

C25

USB20_P1

B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28

PCH HM65 config not support USB port 6 & 7.

M28

USB20_N8

L30

USB20_P8

K30

USB20_N9

G30

USB20_P9

E30

USB20_N10

C30

USB20_P10

A30
L32
K32

USB20_N12

G32

USB20_P12

E32

USB20_N13

C32

USB20_P13

A32

USBRBIAS

C33

B33

USB_OC0#

A14

USB_OC1#

K20

USB_OC2#

B17

USB_OC3#

C16

USB_OC4#

L16

USB_OC5#

A16

USB_OC6#

D14

USB_OC7#

C14

USB20_N0 46
USB20_P0 46
USB20_N1 37
USB20_P1 37

USB20_N8 39
USB20_P8 39
USB20_N9 39
USB20_P9 39
USB20_N10 34
USB20_P10 34

USB20_N12 39
USB20_P12 39
USB20_N13 40
USB20_P13 40

Within 500 mils

1 2

R246 22.6_0402_1%R246 22.6_0402_1%

USB_OC0# 46
USB_OC1# 37

2

USB conn (left)
USB conn (left)

Mini Card(WLAN)
Mini Card(WWAN)
CMOS Camera (LVDS)

Mini Card(SIM reserved)
Bluetooth

(For USB Port0)
(For USB Port1)

DMI Termination Voltage

DF_TVS

Set to Vcc when HIGH
Set to Vss when LOW

DG1.2

DF_TVS

R236

R236

1K_0402_5%

1K_0402_5%

CLOSE TO THE BRANCHING POINT

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

R237 10K_0402_5%R237 10K_0402_5%

1 2

R238 10K_0402_5%R238 10K_0402_5%

1 2

R239 10K_0402_5%R239 10K_0402_5%

1 2

R240 10K_0402_5%R240 10K_0402_5%

1 2

R242 10K_0402_5%R242 10K_0402_5%

1 2

R243 10K_0402_5%R243 10K_0402_5%

1 2

R244 10K_0402_5%R244 10K_0402_5%

1 2

R245 10K_0402_5%R245 10K_0402_5%

1 2

OC[0..3] use for EHCI 1
OC[4..7] use for EHCI 2

1

+1.8VS

12

2.2K_0402_5%

2.2K_0402_5%
R235

R235

12

H_SNB_IVB# 5

+3VALW_PCH

R250

R250

No40

0_0402_5% @

0_0402_5% @

No40

+3VS

U10

U10

5

OPT@
PLT_RST#
DGPU_HOLD_RST#

A A

R232

R232

12

0_0402_5% OPT@

0_0402_5% OPT@

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

5

OPT@

1

VCC

IN1

2

IN2

4

OUT

GND

3

100_0402_5%

100_0402_5%
1 2

12

100K_0402_5%

100K_0402_5%
OPT@

OPT@

R253

R253

OPT@

OPT@

R252

R252

PLTRST_VGA# 22

PLT_RST#

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

4

1
2

12

+3VS

5

U11

U11

VCC

IN1
IN2

4

OUT

GND

3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R254

R254

100K_0402_5%

100K_0402_5%

3

PLT_RST_BUF# 39

Compal Secret Data

Compal Secret Data

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019BI

4019BI

4019BI

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

17 57Tuesday, December 14, 2010

17 57Tuesday, December 14, 2010

17 57Tuesday, December 14, 2010

A

A

A

5

+3VS

R264 10K_0402_5%

UMA@

R264 10K_0402_5%

UMA@

R393 10K_0402_5%OPT@R393 10K_0402_5%OPT@

1 2

GPIO28

On-Die PLL Voltage Regulator
This signal has a weak internal pull up

D D

：

On-Die voltage regulator enable

H

*

L：On-Die PLL Voltage Regulator disable

+3VALW_PCH

R395 4.7K_0402_5%@R395 4.7K_0402_5%@

1 2

R260 1K_0402_5%@R260 1K_0402_5%@

1 2

PCH_GPIO28

* OPTIMUS

Non-OPTIMUS

Debug Port DG 1.2 PH 4.7K +3VALW_PCH

Can be configured as wake input to
allow wakes from Deep Sleep.
If not used then use 8.2-kΩ to 10-kΩ
pull-down to GND.

WWAN_OFF#

PCH_GPIO36

PCH_GPIO0

PCH_GPIO1
PCH_GPIO6
PCH_GPIO16

PCH_GPIO22

PCH_GPIO39

BT_ON#
PCH_GPIO48
WL_OFF#

PCH_GPIO12
SMIB
PCH_GPIO57
PCH_GPIO24

PCH_GPIO35

PCH_GPIO27

No26
No34

+VRAM_1.5VS

R130

10K_0402_5%

10K_0402_5%
1 2

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@

OPT@

CRB1.0 PH10K to +3VALW
GPIO24 Unmultiplexed
NOTE: GPIO24 configuration
register bits are not cleared by
CF9h reset event.

C218

C218

OPT@R130

OPT@

R273

R273

10K_0402_5%

10K_0402_5%

OPT@

OPT@

2

Q5

Q5

1

OPT@

OPT@
AP2302GN-HF_SOT23-3

AP2302GN-HF_SOT23-3

2

R262 10K_0402_5%R262 10K_0402_5%

1 2

+3VS

C C

R275 100K_0402_5%R275 100K_0402_5%

1 2

R391 10K_0402_5%@R391 10K_0402_5%@

R277 200K_0402_5%@R277 200K_0402_5%@

1 2

+3VS

R255 10K_0402_5%R255 10K_0402_5%

R270 10K_0402_5%R270 10K_0402_5%

B B

+3VALW_PCH

A A

1 2

R271 10K_0402_5%R271 10K_0402_5%

1 2

R272 10K_0402_5%R272 10K_0402_5%

1 2

No20

R274 10K_0402_5%R274 10K_0402_5%

1 2

R276 10K_0402_5%R276 10K_0402_5%

1 2

R278 10K_0402_5%R278 10K_0402_5%

1 2

R279 10K_0402_5%R279 10K_0402_5%

1 2

R280 10K_0402_5%R280 10K_0402_5%

1 2

R281 10K_0402_5%R281 10K_0402_5%

1 2

R282 1K_0402_5%R282 1K_0402_5%

1 2

R283 10K_0402_5%R283 10K_0402_5%

1 2

R284 10K_0402_5%R284 10K_0402_5%

1 2

R285 10K_0402_5%R285 10K_0402_5%

1 2

1 2

R392 10K_0402_5%R392 10K_0402_5%

1 2

GPIO36: CRB1.0 PH200K to +3VS,
but CHK1.2 says pull down when not used

12

JM50 install, SM50 uninstall10/2

5

12

+3VALW

1 2
1

3

4

OPTIMUS_EN#

GPIO38

OPTIMUS_EN#

0
1

+3VS

R267

R267
10K_0402_5%

10K_0402_5%
1 2
13

D

D

Q17

Q17

2

OPT@

OPT@

G

G

S

S

2N7002H_SOT23-3

2N7002H_SOT23-3

4

3

U3F
PCH_GPIO0
PCH_GPIO1
PCH_GPIO6

EC_SCI#41
EC_SMI#41

SMIB44

BT_ON#39,40

WWAN_OFF#39

WL_OFF#39

EC_SCI#
EC_SMI#
PCH_GPIO12
SMIB

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
BT_ON#
PCH_GPIO35
PCH_GPIO36
WWAN_OFF#
OPTIMUS_EN#
PCH_GPIO39
PCH_GPIO48
WL_OFF#
PCH_GPIO57

T73PAD T73PAD
T74PAD T74PAD T24 PADT24 PAD
T75PAD T75PAD
T76PAD T76PAD
T77PAD T77PAD
T78PAD T78PAD
T79PAD T79PAD
T80PAD T80PAD
T27PAD T27PAD
T28PAD T28PAD
T29PAD T29PAD
T30PAD T30PAD
T31PAD T31PAD
T32PAD T32PAD

U3F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71

A20GATE

RCIN#

PROCPWRGD

GPIO

GPIO

THRMTRIP#

CPU/MISC

CPU/MISC

INIT3_3V#

NC_1
NC_2
NC_3
NC_4
NC_5

VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23

NCTF

NCTF

VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

PCH_GPIO68

C40

PCH_GPIO69

B41

PCH_GPIO70

C41

PCH_GPIO71

A40

P4

PCH_PECI_R

AU16

PECI

EC_KBRST#

P5
AY11

PCH_THRMTRIP#_R

AY10
T14

AH8
AK11
AH10
AK10
P37

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

T20 PADT20 PAD
T21 PADT21 PAD
T22 PADT22 PAD
T23 PADT23 PAD
T63 PADT63 PAD

T25 PADT25 PAD
T26 PADT26 PAD
T64 PADT64 PAD
T65 PADT65 PAD
T81 PADT81 PAD
T66 PADT66 PAD
T67 PADT67 PAD
T68 PADT68 PAD
T69 PADT69 PAD
T70 PADT70 PAD
T71 PADT71 PAD
T72 PADT72 PAD

2

check: pull high?

@

1 2

R2650_0402_5%@R2650_0402_5%

1 2

R268 390_0402_5%R268 390_0402_5%

INIT3_3V

This signal has weak internal
PU, can't pull low

Intel schematic reviwe recommand.

2

H_PECI 5,41
EC_KBRST# 41
H_CPUPWRGD 5

H_THRMTRIP#

1

PCH_GPIO68
PCH_GPIO69

PCH_GPIO70
PCH_GPIO71

EC_KBRST#

+3VS

R263

R263
10K_0402_5%

10K_0402_5%

1 2

GATEA20 41

H_THRMTRIP# 5

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

R256 10K_0402_5%R256 10K_0402_5%

1 2

R257 10K_0402_5%R257 10K_0402_5%

1 2

R258 10K_0402_5%R258 10K_0402_5%

1 2

R259 10K_0402_5%R259 10K_0402_5%

1 2

R261 10K_0402_5%R261 10K_0402_5%

1 2

18 57Tuesday, December 14, 2010

18 57Tuesday, December 14, 2010

1

18 57Tuesday, December 14, 2010

+3VS

+3VS

A

A

A

5

4

3

2

1

POWER

2925mA

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

1mA

CRTLVDS

CRTLVDS

1mA

VCCTX_LVDS[1]
VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3]
VCCTX_LVDS[4]

DMI

DMI

20mA

190mA

NAND / SPI HVCMOS

NAND / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS
VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

+VCCADAC

U48

U47

+VCCA_LVDS

AK36
AK37

AM37
AM38
AP36
AP37

+3VS_VCC3_3_6

V33

V34

+VCCAFDI_VRM

AT16

+VCCP_VCCDMI

AT20

+1.05VS_VCC_DMI_CCI

AB36

VccClkDMI

VccDFTERM

AG16

AG17

AJ16

AJ17

+3V_VCCPSPI

V1

1

2

+VCCTX_LVDS

1

C154

C154

0.01U_0402_16V7K

0.01U_0402_16V7K

2

1

2

1

2

1

2

+VCCADAC+1.05VS_PCH

0.1U_0402_10V7K

0.1U_0402_10V7K

C147

0.01U_0402_16V7K

C147

0.01U_0402_16V7K

1

2

R290

R290

0_0805_5%

0_0805_5%

1 2

C157

C157

0.1U_0402_10V7K

0.1U_0402_10V7K

+VCCAFDI_VRM

1

C164

C164
1U_0402_6.3V6K

1U_0402_6.3V6K

2

C166

C166

0.1U_0402_10V7K

0.1U_0402_10V7K

+3V_VCCPSPI

C168

C168
1U_0402_6.3V6K

1U_0402_6.3V6K

C148

C148

1

C149

C149
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C155

C155

0.01U_0402_16V7K

0.01U_0402_16V7K

2

+3VS

+VCCP_VCCDMI

R293

R293
0_0805_5%

0_0805_5%

1 2

R295

R295
0_0805_5%

0_0805_5%

1 2

1 2

L1

L1

MBK1608221YZF_2P

MBK1608221YZF_2P

12

R286

R286

0_0805_5%

0_0805_5%

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

+1.05VS_VCCP

+1.8VS+VCCPNAND

R298

R298

0_0805_5%

0_0805_5%

+3VS

+3VS

L2

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608

C156

C156

L2

0.1uH inductor, 200mA

R292

R292
0_0805_5%

0_0805_5%

1 2

1

C158

C158
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

leakage PAW00 found

12

+1.05VS_VCCP

+1.8VS

+1.05VS_VCCP

D D

C C

B B

+1.05VS_VCCP

JP3

@JP3

@

12

C150

10U_0805_6.3V6M

C150

10U_0805_6.3V6M

PAD-OPEN 4x4m

PAD-OPEN 4x4m

+1.05VS_VCCP

R291

R291

0_0805_5%

0_0805_5%

1 2

1

2

R289 0_0603_5%R289 0_0603_5%

This pin can be left as no connect in
On-Die VR enabled mode (default).

+1.05VS_VCC_EXP

C159

10U_0805_6.3V6M

C159

10U_0805_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

+3VS

R294

R294

0_0805_5%

0_0805_5%

1 2

Place C167 Near BG6 pin

+1.05VS_VCCP

1

C167

@C167

@

1U_0402_6.3V6K

1U_0402_6.3V6K

2

C151

1U_0402_6.3V6K

C151

1U_0402_6.3V6K

1

2

+1.05VS_VCCDPLLEXP

12

T37PAD T37PAD

+1.05VS_VCC_EXP

C160

C160

C161

1U_0402_6.3V6K

C161

1U_0402_6.3V6K

1

2

+3VS_VCCA3GBG

1

C165

C165

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1 2
0_0805_5%

0_0805_5%

+VCCP_VCCDMI

+1.05VS_PCH

C152

1U_0402_6.3V6K

C152

1U_0402_6.3V6K

1

2

+1.05VS_VCCDPLLEXP

+VCCAPLLEXP

C162

1U_0402_6.3V6K

C162

1U_0402_6.3V6K

1

2

+3VS_VCCA3GBG

+1.05VS_VCCAPLL_FDI

R297

R297

+1.05VS_VCCDPLL_FDI

C153

1U_0402_6.3V6K

C153

1U_0402_6.3V6K

1

2

C163

1U_0402_6.3V6K

C163

1U_0402_6.3V6K

1

2

+VCCAFDI_VRM

U3G

U3G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Iccmax
Current (A)

0.001

5

5

0.001

0.001

0.266

0.001

0.08

0.08

1.3

0.042

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0.16

1.05VccCLKDMI

0.02

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.06

+1.5VS

R299 0_0603_5%R299 0_0603_5%

VCCVRM==>1.5V FOR MOBILE
VCCVRM==>1.8V FOR DESKTOP
VCCVRM = 160mA detal waiting for newest spec

A A

12

+VCCAFDI_VRM

+VCCAFDI_VRM

0 ohm for current test: delete when phase B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

19 57Tuesday, December 14, 2010

19 57Tuesday, December 14, 2010

19 57Tuesday, December 14, 2010

A

A

A

5

+3VS

D D

C C

+1.05VS_VCCP

B B

A A

R301

@R301

@
0_0805_5%

0_0805_5%

1 2

L3

L3

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

R316

R316
0_0805_5%

0_0805_5%

+VCCA_DPLL_L

1 2

+1.05VS_VCCP

+1.05VS_VCCP

+1.05VS_VCCP

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

+3VS_VCC_CLKF33
10U_0805_10V4Z

10U_0805_10V4Z

1

2

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

R320

R320

12

1

2

R322

R322

12

1

2

R323

R323

12

1

2

1

2

leakage PAW00 found

C169

C169

1

2

C176

C176

10U_0603_10V6M

10U_0603_10V6M

L5

L5

1 2

1 2

L6

L6

+VCCDIFFCLK

C196

C196
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCDIFFCLKN

C198

C198
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_SSCVCC

C200

C200
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VM_VCCSUS

C203

C203
@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

C170

1U_0402_6.3V6K

C170

1U_0402_6.3V6K

+3VALW

@

@

1

+1.05VS_VCCP

2

+1.05VS_VCCP

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C189

220U_B2_2.5VM_R35+C189

220U_B2_2.5VM_R35

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

+

2

2

+1.05VS_VCCDIFFCLKN

+1.05VS_VCCP

+1.05VS_VCCP

+3VALW_PCH

R306 0_0603_5%@R306 0_0603_5%@

1 2

R309 0_0603_5%R309 0_0603_5%

R313

R313

0_0805_5%

0_0805_5%

1 2

C190

220U_B2_2.5VM_R35+C190

220U_B2_2.5VM_R35

C191

C191

1

+

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

R328

R328

0_0603_5%

0_0603_5%

1 2

1

2

4

Have internal VRM

R302

@R302

@
0_0603_5%

0_0603_5%

12

R304

R304

0_0603_5%

0_0603_5%

1 2

C173

@C173

@

0.1U_0402_10V7K

0.1U_0402_10V7K
12

1 2

C183

1U_0402_6.3V6K

C183

1U_0402_6.3V6K

1

2

C192

1U_0402_6.3V6K

C192

1U_0402_6.3V6K

1

2

1

C197

C197

2

1

C202

C202

2

0.1U_0402_10V7K

C204

4.7U_0603_6.3V6K

C204

4.7U_0603_6.3V6K

0.1U_0402_10V7K

C205

0.1U_0402_10V7K

C205

0.1U_0402_10V7K

1

1

2

2

+VCCACLK

+VCCPDSW

1

C171

C171

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCAPLL_CPY_PCH
+VCCDPLL_CPY

+VCCSUS1

1

C178

@C178

@
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VM_VCCASW

C181

22U_0603_6.3V6M

C181

22U_0603_6.3V6M

C180

22U_0603_6.3V6M

C180

22U_0603_6.3V6M

1

1

2

2

C184

1U_0402_6.3V6K

C184

1U_0402_6.3V6K

C185

1U_0402_6.3V6K

C185

1U_0402_6.3V6K

1

1

2

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

VccDIFFCLKN

+1.05VS_SSCVCC

+VCCSST

+1.05VM_VCCSUS

+V_CPU_IO

C206

C206

+RTCVCC

C207

1U_0402_6.3V6K

C207

1U_0402_6.3V6K

1

2

VccSSC

C208

0.1U_0402_10V7K

C208

0.1U_0402_10V7K

1

2

AD49

T16

V12

T38

BH23

AL29

AL24

AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31

W21
W23
W24
W26
W29
W31
W33

N16

Y49

BD47
BF47

AF17
AF33
AF34
AG34

AG33

V16

T17

V19

BJ8

A22

C209

0.1U_0402_10V7K

C209

0.1U_0402_10V7K

1

2

POWER

U3J

U3J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2
VCCIO[14]

DCPSUS[3]

VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA
VCCADPLLB

VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[11]

VCCIO[10]

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

VCCRTC

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

POWER

3mA

1010mA

Clock and Miscellaneous

Clock and Miscellaneous

80mA
80mA

55mA

95mA

1mA

CPURTC

CPURTC

119mA

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

10mA

HDA

HDA

3

VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

V5REF_SUS

VCCSUS3_3[1]

1mA

VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]

VCCAPLLSATA

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]

VCCIO[34]

DCPSUS[4]

V5REF

VCC3_3[1]
VCC3_3[8]
VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]
VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]
VCCIO[3]
VCCIO[4]

N26
P26
P28
T27
T29

T23
T24
V23
V24
P24

T26

M26

AN23
AN24

P34

N20
N22
P20
P22

AA16
W16
T34

AJ2

AF13

AH13
AH14

AF14
AK1

AF11

AC16
AC17
AD17

T21

V21

T19

P32

+1.05VS_VCCUSBCORE

1

2

1

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS
+3V_VCCPSUS

+PCH_V5REF_RUN

+3V_VCCPSUS

+3VS_VCCPCORE

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

+VCCSUSHDA

1

C210

C210

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

R305

R305

0_0603_5%

0_0603_5%

C172

C172
1U_0402_6.3V6K

1U_0402_6.3V6K

R308

R308
0_0603_5%

+3V_VCCPUSB

0.1U_0402_10V7K

0.1U_0402_10V7K

0_0603_5%

C175

C175

+3V_VCCAUBG

0_0603_5%

0_0603_5%

1

C194

C194

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.05VS_VCC_SATA

R326 0_0603_5%R326 0_0603_5%

R327 0_0603_5%R327 0_0603_5%

R329 0_0603_5%R329 0_0603_5%

R330 0_0603_5%R330 0_0603_5%

1

C177

C177

0.1U_0402_10V7K

0.1U_0402_10V7K

2

C182 1U_0402_6.3V6K@ C182 1U_0402_6.3V6K@

1 2

R319

R319

12

+1.05VS_SATA3

+VCCSATAPLL

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

+3VS

1

C201

C201
1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

12

12

12

2

+1.05VS_VCCP

12

+3VALW_PCH

12

R310

R310

12

R312

R312

12

+1.05VS_SATA3

R324

R324

0_0805_5%

0_0805_5%

+3VALW_PCH

+1.05VS_VCCP

R314

R314
0_0603_5%

0_0603_5%

R317

R317
0_0805_5%

0_0805_5%

R318

R318
0_0603_5%

0_0603_5%

R321

R321

0_0805_5%

0_0805_5%

12

12

12

1

C186

C186
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C188

C188

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

C193

C193

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

C195

C195
1U_0402_6.3V6K

1U_0402_6.3V6K

2

Place C199 Near AK1 pin

1

@C199

+1.05VS_VCCP

12

+1.05VS_VCCP

+3VALW_PCH

@
10U_0603_10V6M

10U_0603_10V6M

2

1

VCC3_3 = 266mA detal waiting for newest spec
VCCDMI = 42mA detal waiting for newest spec

+5VALW

PCH_PWR_EN#45,46

+3VALW_PCH

+3VS

+3VS

+1.05VS_VCCP

12

C199

R303

R303
0_0603_5% @

0_0603_5% @

12

Q12

Q12

AO3413L_SOT23-3

AO3413L_SOT23-3

1

3

DGS

DGS

2

R311

R311

100_0402_5%

100_0402_5%

R315

R315

100_0402_5%

100_0402_5%

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

+3VALW_PCH+5VALW_PCH

D4

D4

RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

1 2

1

2

+3VS+5VS

D5

D5

RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

1 2
1

2

+5VALW_PCH

C174

C174

+PCH_V5REF_SUS

C179

C179

0.1U_0603_25V7K

0.1U_0603_25V7K

+PCH_V5REF_RUN

C187

C187
1U_0603_10V6K

1U_0603_10V6K

12

R307

20K_0402_5%

R307

20K_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

A

A

A

of

20 57Tuesday, December 14, 2010

20 57Tuesday, December 14, 2010

20 57Tuesday, December 14, 2010

5

D D

C C

B B

A A

U3H

U3H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

U3I

U3I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

2

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

21 57Tuesday, December 14, 2010

21 57Tuesday, December 14, 2010

21 57Tuesday, December 14, 2010

A

A

A

5

DG: 0.1u*4, 10u*1, bead 30 ohm

10/11 check ok

L1400

OPT@L1400

OPT@

+1.05VS_DGPU

D D

C C

B B

A A

1 2

BLM18PG330SN1D_2P

BLM18PG330SN1D_2P

PEG_HRX_GTX_N[0..15]4
PEG_HRX_GTX_P[0..15]4

PEG_HTX_C_GRX_N[0..15]4
PEG_HTX_C_GRX_P[0..15]4

@R1419

@

22_0402_5%

XTALIN

Layout note: Reserve for EMI please close to UV1

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

SMB_CLK_GPU

SMB_DATA_GPU

22_0402_5%

1 2

R1424 10M_0402_5%

R1424 10M_0402_5%

27MHZ_16PF_X5H027000FG1H

27MHZ_16PF_X5H027000FG1H

1

C1438

C1438
18P_0402_50V8J

18P_0402_50V8J
OPT@

OPT@

2

+3VSDGPU

Q1401A

Q1401A

OPT@

OPT@

R1494

R1494

1 2

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

R1419

2

5

@

@

Y1400

18P_0402_50V8J

18P_0402_50V8J

0_0402_5%@

0_0402_5%@

Layout note: Under GPU

0.1U_0402_16V4Z

OPT@ C1402

0.1U_0402_16V4Z

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1401

OPT@

1

1

C1402

C1401

2

2

PEG_HRX_GTX_N[0..15]
PEG_HRX_GTX_P[0..15]
PEG_HTX_C_GRX_N[0..15]
PEG_HTX_C_GRX_P[0..15]

C1437

@C1437

@

10P_0402_50V8J

10P_0402_50V8J

1 2

12

OPT@Y1400

OPT@

XTAL_OUTXTALIN

21

1

C1439

C1439
OPT@

OPT@

2

61

Q1401B

Q1401B

5

OPT@

OPT@

R1495

R1495

1 2

0.1U_0402_16V4Z

OPT@ C1403

0.1U_0402_16V4Z

OPT@

1

C1403

2

PEG_HRX_GTX_P0
PEG_HRX_GTX_N0
PEG_HRX_GTX_P1
PEG_HRX_GTX_N1
PEG_HRX_GTX_P2
PEG_HRX_GTX_N2
PEG_HRX_GTX_P3
PEG_HRX_GTX_N3
PEG_HRX_GTX_P4
PEG_HRX_GTX_N4
PEG_HRX_GTX_P5
PEG_HRX_GTX_N5
PEG_HRX_GTX_P6
PEG_HRX_GTX_N6
PEG_HRX_GTX_P7
PEG_HRX_GTX_N7
PEG_HRX_GTX_P8
PEG_HRX_GTX_N8
PEG_HRX_GTX_P9
PEG_HRX_GTX_N9
PEG_HRX_GTX_P10
PEG_HRX_GTX_N10
PEG_HRX_GTX_P11
PEG_HRX_GTX_N11
PEG_HRX_GTX_P12
PEG_HRX_GTX_N12
PEG_HRX_GTX_P13
PEG_HRX_GTX_N13
PEG_HRX_GTX_P14
PEG_HRX_GTX_N14
PEG_HRX_GTX_P15
PEG_HRX_GTX_N15

34

0_0402_5%@

0_0402_5%@

150mA

+PLLVDD

0.1U_0402_16V4Z

OPT@ C1404

0.1U_0402_16V4Z

OPT@

10U_0603_6.3V6M

OPT@ C1400

10U_0603_6.3V6M

OPT@

2

1

C1404

2

Layout note: Differential signal

EC_SMB_CK2 14,41

1

PLTRST_VGA#17

CLK_27M_TCLK14

C1400

C1405 .1U_0402_16V7KOPT@C1405 .1U_0402_16V7KOPT@
C1406 .1U_0402_16V7KOPT@C1406 .1U_0402_16V7KOPT@
C1407 .1U_0402_16V7KOPT@C1407 .1U_0402_16V7KOPT@
C1408 .1U_0402_16V7KOPT@C1408 .1U_0402_16V7KOPT@
C1409 .1U_0402_16V7KOPT@C1409 .1U_0402_16V7KOPT@
C1410 .1U_0402_16V7KOPT@C1410 .1U_0402_16V7KOPT@
C1411 .1U_0402_16V7KOPT@C1411 .1U_0402_16V7KOPT@
C1412 .1U_0402_16V7KOPT@C1412 .1U_0402_16V7KOPT@
C1413 .1U_0402_16V7KOPT@C1413 .1U_0402_16V7KOPT@
C1414 .1U_0402_16V7KOPT@C1414 .1U_0402_16V7KOPT@
C1415 .1U_0402_16V7KOPT@C1415 .1U_0402_16V7KOPT@
C1416 .1U_0402_16V7KOPT@C1416 .1U_0402_16V7KOPT@
C1417 .1U_0402_16V7KOPT@C1417 .1U_0402_16V7KOPT@
C1418 .1U_0402_16V7KOPT@C1418 .1U_0402_16V7KOPT@
C1419 .1U_0402_16V7KOPT@C1419 .1U_0402_16V7KOPT@
C1420 .1U_0402_16V7KOPT@C1420 .1U_0402_16V7KOPT@
C1421 .1U_0402_16V7KOPT@C1421 .1U_0402_16V7KOPT@
C1422 .1U_0402_16V7KOPT@C1422 .1U_0402_16V7KOPT@
C1423 .1U_0402_16V7KOPT@C1423 .1U_0402_16V7KOPT@
C1424 .1U_0402_16V7KOPT@C1424 .1U_0402_16V7KOPT@
C1425 .1U_0402_16V7KOPT@C1425 .1U_0402_16V7KOPT@
C1426 .1U_0402_16V7KOPT@C1426 .1U_0402_16V7KOPT@
C1427 .1U_0402_16V7KOPT@C1427 .1U_0402_16V7KOPT@
C1428 .1U_0402_16V7KOPT@C1428 .1U_0402_16V7KOPT@
C1429 .1U_0402_16V7KOPT@C1429 .1U_0402_16V7KOPT@
C1430 .1U_0402_16V7KOPT@C1430 .1U_0402_16V7KOPT@
C1431 .1U_0402_16V7KOPT@C1431 .1U_0402_16V7KOPT@
C1432 .1U_0402_16V7KOPT@C1432 .1U_0402_16V7KOPT@
C1433 .1U_0402_16V7KOPT@C1433 .1U_0402_16V7KOPT@
C1434 .1U_0402_16V7KOPT@C1434 .1U_0402_16V7KOPT@
C1435 .1U_0402_16V7KOPT@C1435 .1U_0402_16V7KOPT@
C1436 .1U_0402_16V7KOPT@C1436 .1U_0402_16V7KOPT@

12

check leakage

EC_SMB_DA2 14,41

4

4700P_0402_25V7K

4700P_0402_25V7K

C1596

C1596

10/5 JM50

@

@

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

CLK_PEG_VGA14

CLK_PEG_VGA#14

1 2

R1421 200_0402_1%

R1421 200_0402_1%

PLTRST_VGA#

R1400 2.49K_0402_1%

R1400 2.49K_0402_1%

@

@

R1425 22_0402_5%

R1425 22_0402_5%

R1426 10K_0402_5%

R1426 10K_0402_5%
R1427 10K_0402_5%

R1427 10K_0402_5%

12

OPT@

OPT@

12

OPT@

OPT@

12

Note: Internal Thermal Sensor

4

@

@

OPT@

OPT@

1 2

PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N8
PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N9
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10
PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11
PEG_HTX_C_GRX_P12
PEG_HTX_C_GRX_N12
PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_N13
PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_N14
PEG_HTX_C_GRX_P15
PEG_HTX_C_GRX_N15

PEG_HRX_C_GTX_P0
PEG_HRX_C_GTX_N0
PEG_HRX_C_GTX_P1
PEG_HRX_C_GTX_N1
PEG_HRX_C_GTX_P2
PEG_HRX_C_GTX_N2
PEG_HRX_C_GTX_P3
PEG_HRX_C_GTX_N3
PEG_HRX_C_GTX_P4
PEG_HRX_C_GTX_N4
PEG_HRX_C_GTX_P5
PEG_HRX_C_GTX_N5
PEG_HRX_C_GTX_P6
PEG_HRX_C_GTX_N6
PEG_HRX_C_GTX_P7
PEG_HRX_C_GTX_N7
PEG_HRX_C_GTX_P8
PEG_HRX_C_GTX_N8
PEG_HRX_C_GTX_P9
PEG_HRX_C_GTX_N9
PEG_HRX_C_GTX_P10
PEG_HRX_C_GTX_N10
PEG_HRX_C_GTX_P11
PEG_HRX_C_GTX_N11
PEG_HRX_C_GTX_P12
PEG_HRX_C_GTX_N12
PEG_HRX_C_GTX_P13
PEG_HRX_C_GTX_N13
PEG_HRX_C_GTX_P14
PEG_HRX_C_GTX_N14
PEG_HRX_C_GTX_P15
PEG_HRX_C_GTX_N15

CLK_PEG_VGA
CLK_PEG_VGA#

PEG_CLKREQ#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

+PLLVDD

XTALIN
XTAL_OUT

XTALOUT
XTALSSIN

U1400A

U1400A

AP17
AN17
AN19
AP19
AR19
AR20
AP20
AN20
AN22
AP22
AR22
AR23
AP23
AN23
AN25
AP25
AR25
AR26
AP26
AN26
AN28
AP28
AR28
AR29
AP29
AN29
AN31
AP31
AR31
AR32
AR34
AP34

AL17
AM17
AM18
AM19
AL19
AK19
AL20
AM20
AM21
AM22
AL22
AK22
AL23
AM23
AM24
AM25
AL25
AK25
AL26
AM26
AM27
AM28
AL28
AK28
AK29
AL29
AM29
AM30
AM31
AM32
AN32
AP32

AR16
AR17
AR13

AJ17
AJ18

AM16
AG21

AE9

60mA

AF9

45mA

AD9

45mA

B1
B2

D1
D2

SMB_CLK_GPU
SMB_DATA_GPU

VGA_EDID_CLK
VGA_EDID_DATA

I2CB_SCL
I2CB_SDA

VGA_CRT_CLK
VGA_CRT_DATA

HDCP_SCL

HDCP_SDA

E2
E1

E3
E4

G3
G2

G1
G4

F6
G6

N12P-GS1-A1_BGA_973P GS@

N12P-GS1-A1_BGA_973P GS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N

PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

PEX_RST_N
PEX_TERMP

PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_IN

XTAL_OUT
XTAL_OUTBUFF

XTAL_SSIN

I2CS_SCL
I2CS_SDA

I2CC_SCL
I2CC_SDA

I2CB_SCL
I2CB_SDA

I2CA_SCL
I2CA_SDA

I2CH_SCL
I2CH_SDA

3

Part 1 of 7

Part 1 of 7

GPIO

GPIO

MIOA_D0_NC
MIOA_D1_NC
MIOA_D2_NC
MIOA_D3_NC
MIOA_D4_NC
MIOA_D5_NC
MIOA_D6_NC
MIOA_D7_NC
MIOA_D8_NC

MIOA_D9_NC
MIOA_D10_NC
MIOA_D11_NC
MIOA_D12_NC
MIOA_D13_NC
MIOA_D14_NC

DVO

DVO

MIOB_D0_NC

MIOB_D1_NC

MIOB_D2_NC

PCI EXPRESS

PCI EXPRESS

MIOB_D3_NC

MIOB_D4_NC

MIOB_D5_NC

MIOB_D6_NC

MIOB_D7_NC

MIOB_D8_NC

MIOB_D9_NC
MIOBD_10_NC
MIOB_D11_NC
MIOB_D12_NC
MIOB_D13_NC
MIOB_D14_NC

MIOA_HSYNC_NC
MIOA_VSYNC_NC

MIOB_HSYNC_NC
MIOB_VSYNC_NC

MIOA_DE_NC

MIOA_CTL3_NC

MIOA_VREF_NC

MIOB_DE_NC

MIOB_CTL3_NC

MIOB_VREF_NC

MIOA_CLKIN_NC

MIOA_CLKOUT_NC

MIOB_CLKIN_NC

MIOB_CLKOUT_NC

MIOA_CLKOUT_NC_N
MIOB_CLKOUT_NC_N

MIOACAL_PD_VDDQ_NC

MIOACAL_PU_GND_NC

MIOBCAL_PD_VDDQ_NC

MIOBCAL_PU_GND_NC

CLK

CLK

DACA_GREEN

DACA_HSYNC

DACA_VSYNC

DACB_GREEN

DACs

DACs

DACB_HSYNC

I2C

I2C

DACB_VSYNC

2010/08/23 2011/08/25

2010/08/23 2011/08/25

2010/08/23 2011/08/25

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24

DACA_RED

DACA_BLUE

DACA_VDD
DACA_VREF
DACA_RSET

DACB_RED
DACB_BLUE

DACB_VDD
DACB_VREF
DACB_RSET

K1

HPD_C HPD_C

K2
K3
H3
H2

GPU_VID0

H1

GPU_VID1

H4
H5

OVERT#_VGA

H6

THERM#_VGA

J7
K4

R1496

R1496

K5
H7
J4
J6
L1
L2

R1497

R1497

L4
M4
L7
L5

Replace GPIO 12 with GPIO 18.

K6

When : B stage platforms

L6
M6
M7

N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6

Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6

N3
L3

W1
W2

N2
P5
N5

Y5
W3
AF1

N4

1 2

R1420 10K_0402_5%

R1420 10K_0402_5%

R4
AE1

1 2

R1422 10K_0402_5%

R1422 10K_0402_5%

V4
T4

W4
U5

T5
AA7

AA6

AM15
AM14
AL14

AM13
AL13

AJ12
AK12
AK13

AK4
AL4
AJ4

AM1
AM2

AG7
AK6
AH7

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

12

12

0_0402_5%@

0_0402_5%@

GPIO
GPIO1
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO12
GPIO18

OPT@

OPT@

OPT@

OPT@

T1405T1405
T1406T1406

T1408T1408
T1409T1409

0_0402_5%OPT@

0_0402_5%OPT@

GPU_VID2 55

2

GPU_VID0 55
GPU_VID1 55

R1404

R1404
10K_0402_5%

10K_0402_5%

OPT@

OPT@

NV_PERFORMANCE_R

I/O FUNCTION
IN
OUT
OUT
OUT
IN
IN
IN

R1516

R1516
10K_0402_5%

10K_0402_5%
OPT@

OPT@

1 2

R1517

R1517
10K_0402_5%

10K_0402_5%
OPT@

OPT@

1 2

+3VSDGPU

12

2N7002H_SOT23-3

2N7002H_SOT23-3

HPD_C
GPU_VID0
GPU_VID1
GPU_VID2
OVERT
ALERT
AC/DC detection
Reserve for VPSIN

9/20

Diode at PCH

Q1400

Q1400

G

G

2

OPT@

OPT@

13

D

S

D

S

VGA_EDID_CLK
VGA_EDID_DATA
SMB_CLK_GPU
SMB_DATA_GPU

THERM#_VGA
OVERT#_VGA
HDCP_SCL
HDCP_SDA
VGA_CRT_DATA
VGA_CRT_CLK
I2CB_SCL
I2CB_SDA

PEG_CLKREQ#14

10/11 NV: DACx-VDD 10K to GND, others NC

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

1

OPT@

OPT@

1 2

R1401 100K_0402_5%

R1401 100K_0402_5%

No31

NV_PERFORMANCE 41

+3VSDGPU

OPT@

OPT@

1 2

R1405 2.2K_0402_5%

R1405 2.2K_0402_5%

OPT@

OPT@

1 2

R1406 2.2K_0402_5%

R1406 2.2K_0402_5%

OPT@

OPT@

1 2

R1407 2.2K_0402_5%

R1407 2.2K_0402_5%

OPT@

OPT@

1 2

R1408 2.2K_0402_5%

R1408 2.2K_0402_5%

OPT@

OPT@

1 2

R1410 100K_0402_5%

R1410 100K_0402_5%

OPT@

OPT@

1 2

R1411 10K_0402_5%

R1411 10K_0402_5%

OPT@

OPT@

1 2

R1412 2.2K_0402_5%

R1412 2.2K_0402_5%

OPT@

OPT@

1 2

R1413 2.2K_0402_5%

R1413 2.2K_0402_5%

OPT@

OPT@

1 2

R1414 2.2K_0402_5%

R1414 2.2K_0402_5%

OPT@

OPT@

1 2

R1415 2.2K_0402_5%

R1415 2.2K_0402_5%

OPT@

OPT@

1 2

R1416 2.2K_0402_5%

R1416 2.2K_0402_5%

OPT@

OPT@

1 2

R1417 2.2K_0402_5%

R1417 2.2K_0402_5%

+3VSDGPU

12

OPT@

OPT@
R1428

R1428
10K_0402_5%

10K_0402_5%

PEG_CLKREQ#

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

22 57Tuesday, December 14, 2010

of

22 57Tuesday, December 14, 2010

of

22 57Tuesday, December 14, 2010

A

A

A

5

D D

C C

all NC, can't support 3D and high resolution HDMI

B B

+3VSDGPU

STRAP033
STRAP133
STRAP233

A A

4

OPT@

OPT@

1 2

R1433 10K_0402_5%

R1433 10K_0402_5%

STRAP0
STRAP1
STRAP2

U1400D

U1400D

AM11

IFPA_TXC

AM12

IFPA_TXC_N

AM8

IFPA_TXD0

AL8

IFPA_TXD0_N

AM10

IFPA_TXD1

AM9

IFPA_TXD1_N

AK10

IFPA_TXD2

AL10

IFPA_TXD2_N

AK11

IFPA_TXD3

AL11

IFPA_TXD3_N

AP13

IFPB_TXC

AN13

IFPB_TXC_N

AN8

IFPB_TXD4

AP8

IFPB_TXD4_N

AP10

IFPB_TXD5

AN10

IFPB_TXD5_N

AR11

IFPB_TXD6

AR10

IFPB_TXD6_N

AN11

IFPB_TXD7

AP11

IFPB_TXD7_N

AM7

IFPC_L0

AM6

IFPC_L0_N

AL5

IFPC_L1

AM5

IFPC_L1_N

AM3

IFPC_L2

AM4

IFPC_L2_N

AP1

IFPC_L3

AR2

IFPC_L3_N

AR8

IFPD_L0

AR7

IFPD_L0_N

AP7

IFPD_L1

AN7

IFPD_L1_N

AN5

IFPD_L2

AP5

IFPD_L2_N

AR5

IFPD_L3

AR4

IFPD_L3_N

AH6

IFPE_L0

AH5

IFPE_L0_N

AH4

IFPE_L1

AG4

IFPE_L1_N

AF4

IFPE_L2

AF5

IFPE_L2_N

AE6

IFPE_L3

AE5

IFPE_L3_N

AL2

IFPF_L0

AL3

IFPF_L0_N

AJ3

IFPF_L1

AJ2

IFPF_L1_N

AJ1

IFPF_L2

AH1

IFPF_L2_N

AH2

IFPF_L3

AH3

IFPF_L3_N

AP2

IFPC_AUX_I2CW_SCL

AN3

IFPC_AUX_I2CW_SDA_N

AP4

IFPD_AUX_I2CX_SCL

AN4

IFPD_AUX_I2CX_SDA_N

AE4

IFPE_AUX_I2CY_SCL

AD4

IFPE_AUX_I2CY_SDA_N

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

A4

BUFRST_N

AB5

CEC

W5

STRAP0

W7

STRAP1

V7

STRAP2

N12P-GS1-A1_BGA_973P GS@

N12P-GS1-A1_BGA_973P GS@

Part 4 of 7

Part 4 of 7

LVDS/TMDS

LVDS/TMDS

GENERAL

GENERAL

MULTI_STRAP_REF0_GND
MULTI_STRAP_REF1_GND

NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26

NC

NC

NC_27
NC_28
NC_29

VDD_SENSE_0
VDD_SENSE_1
VDD_SENSE_2

GND_SENSE_0
GND_SENSE_1
GND_SENSE_2

TEST

TEST

TESTMODE

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST_N

SERIAL

SERIAL

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

NC/SPDIF_NC

THERMDP
THERMDN

3

A2
A7
B7
C5

STRAP4

C7
D5
D6

STRAP3

D7
E5

PGOOD

E7
F4
G5
H32
J25
J26

STRAP_REF2

P6
U7
V6
Y4
AA4
AB4
AB7
AC5
AD6
AF6
AG6
AG20
AJ5
AK15
AL7

D35
P7
AD20

AD19
E35
R7

AP35
AP14
AN14
AN16
AR14
AP16

C3
D3
C4
D4

A5
N9
M9
B5

B4

NV suggests directly connect to GND

TESTMODE

ROM_CS#
ROM_SI

R1431 10K_0402_5%R1431 10K_0402_5%
ROM_SO
ROM_SCLK

R1498 OPT@ 36K_0402_1%R1498 OPT@ 36K_0402_1%

OPT@

OPT@

1 2

R1432 40.2K_0402_1%

R1432 40.2K_0402_1%

OPT@

OPT@

1 2

R1434 40.2K_0402_1%

R1434 40.2K_0402_1%

+3VSDGPU

STRAP4

No6 No6

R1511

R1511

12

GV@

GV@

10K_0402_5%

10K_0402_5%

R1512

R1512

12

GV@

GV@

40.2K_0402_1%

40.2K_0402_1%

VGAVCC_SENSE 55

R1429 10K_0402_5%OPT@R1429 10K_0402_5%OPT@

1 2

R1409 10K_0402_5%@R1409 10K_0402_5%@

1 2

T1402T1402
T1403T1403
T1404T1404

OPT@

OPT@

1 2

R1430 10K_0402_5%

R1430 10K_0402_5%

+3VSDGPU

12

12

+3VSDGPU

STRAP3

ROM_SI 33
ROM_SO 33
ROM_SCLK 33

if unuse this pin , pull down 36k

R1507

R1507
10K_0402_5%

10K_0402_5%
@

@

1 2

R1508

R1508
10K_0402_5%

10K_0402_5%
GV@

GV@

1 2

R1509

R1509
10K_0402_5%

10K_0402_5%
@

@

1 2

R1510

R1510

4.99K_0402_1%

4.99K_0402_1%
GV@

GV@

1 2

JM50

No6

2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/23 2011/08/25

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

23 57Tuesday, December 14, 2010

23 57Tuesday, December 14, 2010

23 57Tuesday, December 14, 2010

A

A

A

of

of

of

5

4

3

2

1

For PHQAA EVT Phase only

Mode

VID1

P0(Cold)P01

0

D D

C C

B B

P8/P12

00

U1400G

U1400G

AB11

VDD_0

AB13

VDD_1

AB15

VDD_2

AB17

VDD_3

AB19

VDD_4

AB21

VDD_5

AB23

VDD_6

AB25

VDD_7

AC11

VDD_8

AC12

VDD_9

AC13

VDD_10

AC14

VDD_11

AC15

VDD_12

AC16

VDD_13

AC17

VDD_14

AC18

VDD_15

AC19

VDD_16

AC20

VDD_17

AC21

VDD_18

AC22

VDD_19

AC23

VDD_20

AC24

VDD_21

AC25

VDD_22

AD12

VDD_23

AD14

VDD_24

AD16

VDD_25

AD18

VDD_26

AD22

VDD_27

AD24

VDD_28

L11

VDD_29

L12

VDD_30

L13

VDD_31

L14

VDD_32

L15

VDD_33

L16

VDD_34

L17

VDD_35

L18

VDD_36

L19

VDD_37

L20

VDD_38

L21

VDD_39

L22

VDD_40

L23

VDD_41

L24

VDD_42

L25

VDD_43

M12

VDD_44

M14

VDD_45

M16

VDD_46

M18

VDD_47

M20

VDD_48

M22

VDD_49

M24

VDD_50

P11

VDD_51

P13

VDD_52

P15

VDD_53

P17

VDD_54

P19

VDD_55

VID0 +VGA_CORE

1 0.95 V

1 0.950V

Part 7 of 7

Part 7 of 7

VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73
VDD_74
VDD_75
VDD_76
VDD_77
VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
VDD_86
VDD_87
VDD_88
VDD_89

POWER

POWER

VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98

VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110

0.825 V

P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24

+VGA_CORE+VGA_CORE

N12M-GE Performance Mode

Mode

NVCLK (MHz)

P0

P8

P12 TBD P12

606

TBD

TBD

Layout note: Near GPU

+VGA_CORE

Layout note: Under GPU

+VGA_CORE

0.047U_0402_25V7K

0.047U_0402_25V7K

12

+VGA_CORE

0.01U_0402_25V7K

0.01U_0402_25V7K

1

2

MCLK (MHz) +VGA_CORE

790 1.00 V

TBD

TBD

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

OPT@ C1447

OPT@

1

2

C1447

2

1

0.047U_0402_25V7K

0.047U_0402_25V7K
OPT@ C1453

OPT@

1

12

C1453

2

0.01U_0402_25V7K

0.01U_0402_25V7K
OPT@ C1462

OPT@

1

1

C1462

2

2

2

1

OPT@ C1451

OPT@

C1451

OPT@ C1460

OPT@

C1460

10U_0603_6.3V6M

10U_0603_6.3V6M

OPT@ C1446

OPT@

C1446

0.047U_0402_25V7K

0.047U_0402_25V7K
OPT@ C1452

OPT@

12

C1452

0.01U_0402_25V7K

0.01U_0402_25V7K
OPT@ C1461

OPT@

1

C1461

2

OPT@ C1448

OPT@

C1448

0.022U_0402_25V7K

0.022U_0402_25V7K
OPT@ C1454

OPT@

C1454

0.01U_0402_25V7K

0.01U_0402_25V7K
OPT@ C1463

OPT@

C1463

TBD

+VGA_CORE

47U_0805_4V6

47U_0805_4V6

22U_0805_6.3V6M

22U_0805_6.3V6M

OPT@ C1450

OPT@

OPT@ C1449

OPT@

1

1

2

C1450

C1449

2

0.022U_0402_25V7K

0.022U_0402_25V7K

0.022U_0402_25V7K

0.022U_0402_25V7K
OPT@ C1456

OPT@

OPT@ C1455

OPT@

1

1

2

1

2

0.01U_0402_25V7K

0.01U_0402_25V7K

C1455

OPT@ C1464

OPT@

C1464

C1456

2

0.01U_0402_25V7K

0.01U_0402_25V7K
OPT@ C1465

OPT@

1

C1465

2

330U_D2_2V_Y

OPT@

330U_D2_2V_Y

OPT@

1

+

+

C1441

C1441

2

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

OPT@ C1457

OPT@

OPT@ C1458

1

2

1

2

OPT@

1

C1457

C1458

2

0.01U_0402_25V7K

0.01U_0402_25V7K

0.01U_0402_25V7K

0.01U_0402_25V7K
OPT@ C1467

OPT@

OPT@ C1466

OPT@

1

C1467

C1466

2

N12P-GS Performance Mode

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K
OPT@ C1470

OPT@

C1470

MCLK (MHz) +VGA_COREMode

TBD TBD

TBD

NVCLK (MHz)

P0

P8

TBD

TBD

TBD TBD

reserve for power team

330U_D2_2V_Y

OPT@

330U_D2_2V_Y

OPT@

1

+

+

C1597

C1597

2

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1459

OPT@

1

C1459

2

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K
OPT@ C1469

OPT@

OPT@ C1468

OPT@

12

12

C1468

12

C1469

TBD

TBD

N12P-GE Performance Mode

MCLK (MHz) +VGA_COREMode

P0

P8

P12

NVCLK (MHz)

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

N12P-GS1-A1_BGA_973P GS@

N12P-GS1-A1_BGA_973P GS@

A A

Security Classification

Security Classification

Security Classification

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

24 57Tuesday, December 14, 2010

of

24 57Tuesday, December 14, 2010

of

24 57Tuesday, December 14, 2010

A

A

A

5

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

+VRAM_1.5VS

D D

+VRAM_1.5VS

C C

Layout note: Under GPU

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1490

OPT@

1

1

C1490

2

2

4.7U_0603_6.3V6K
OPT@ C1471

OPT@

1

C1471

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1492

OPT@

OPT@ C1491

OPT@

1

1

C1492

C1491

2

2

R1435 10K_0402_5%

R1435 10K_0402_5%
R1436 1K_0402_1%

R1436 1K_0402_1%

R1437 10K_0402_5%

R1437 10K_0402_5%

R1438 10K_0402_5%

R1438 10K_0402_5%
R1439 1K_0402_1%

R1439 1K_0402_1%
R1440 10K_0402_5%

R1440 10K_0402_5%

R1441 1K_0402_1%

R1441 1K_0402_1%

R1442 10K_0402_5%

R1442 10K_0402_5%
R1443 1K_0402_1%

R1443 1K_0402_1%
R1444 10K_0402_5%

R1444 10K_0402_5%

OPT@ C1472

OPT@

1

C1472

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1493

OPT@

1

C1493

2

OPT@

OPT@

1 2

@

@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

@

@

1 2

OPT@

OPT@

1 2

@

@

1 2

OPT@

OPT@

1 2

@

@

1 2

OPT@

OPT@

1 2

OPT@ C1494

OPT@

C1494

check: power connection?

B B

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1473

OPT@

1

C1473

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

2

OPT@ C1495

OPT@

C1495

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

4

OPT@ C1474

OPT@

C1474

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1496

OPT@

1

C1496

2

+IFPAB_PLLVDD

+IFPAB_IOVDD

+IFPD_PLLVDD

+IFPD_IOVDD

+IFPD_PLLVDD

+IFPD_IOVDD
+IFPEF_PLLVDD

+IFPE_IOVDD

OPT@ C1489

OPT@

C1489

U1400E

U1400E

3.5A

J23

FBVDDQ_0

J24

FBVDDQ_1

J29

FBVDDQ_2

AA27

FBVDDQ_3

AA29

FBVDDQ_4

AA31

FBVDDQ_5

AB27

FBVDDQ_6

AB29

FBVDDQ_7

AC27

FBVDDQ_8

AD27

FBVDDQ_9

AE27

FBVDDQ_10

AJ28

FBVDDQ_11

B18

FBVDDQ_12

E21

FBVDDQ_13

G17

FBVDDQ_14

G18

FBVDDQ_15

G22

FBVDDQ_16

G8

FBVDDQ_17

G9

FBVDDQ_18

H29

FBVDDQ_19

J14

FBVDDQ_20

J15

FBVDDQ_21

J16

FBVDDQ_22

J17

FBVDDQ_23

J20

FBVDDQ_24

J21

FBVDDQ_25

J22

FBVDDQ_26

N27

FBVDDQ_27

P27

FBVDDQ_28

R27

FBVDDQ_29

T27

FBVDDQ_30

U27

FBVDDQ_31

U29

FBVDDQ_32

V27

FBVDDQ_33

V29

FBVDDQ_34

V34

FBVDDQ_35

W27

FBVDDQ_36

Y27

FBVDDQ_37

AK9

IFPAB_PLLVDD

AJ11

IFPAB_RSET

AG9

IFPA_IOVDD

AG10

IFPB_IOVDD

AJ9

IFPC_PLLVDD

AK7

IFPC_RSET

AJ8

IFPC_IOVDD

AC6

IFPD_PLLVDD

AB6

IFPD_RSET

AK8

IFPD_IOVDD

AJ6

IFPEF_PLLVDD

AL1

IFPEF_RSET

AE7

IFPE_IOVDD

AD7

IFPF_IOVDD

N12P-GS1-A1_BGA_973P GS@

N12P-GS1-A1_BGA_973P GS@

Part 5 of 7

Part 5 of 7

1600mA

PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24

600mA

PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4

POWER

POWER

120mA

PEX_PLLVDD

PEX_SVDD_3V3

PEX_SVDD_3V3_NC

VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4

MIOA_VDDQ_NC_0
MIOA_VDDQ_NC_1
MIOA_VDDQ_NC_2
MIOA_VDDQ_NC_3

MIOB_VDDQ_NC_0
MIOB_VDDQ_NC_1
MIOB_VDDQ_NC_2
MIOB_VDDQ_NC_3

3

Layout note: Under GPU

2200mA

AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16

AK16
AK17
AK21
AK24
AK27

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1475

OPT@

1

C1475

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1482

OPT@

1

C1482

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1476

OPT@

1

C1476

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1483

OPT@

1

C1483

2

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1477

OPT@

1

C1477

2

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1484

OPT@

1

C1484

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1497

OPT@

1

C1497

2

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1478

OPT@

1

C1478

2

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1485

OPT@

1

C1485

2

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1498

OPT@

1

C1498

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
OPT@ C1480

OPT@

OPT@ C1479

OPT@

1

1

2

1

2

1

2

C1480

C1479

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

OPT@ C1486

OPT@

OPT@ C1487

OPT@

1

C1486

C1487

2

L1401

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

OPT@ C1499

OPT@

C1499

1

2

1

2

OPT@L1401

OPT@

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

OPT@ C1481

OPT@

C1481

OPT@ C1488

OPT@

C1488

12

1

+1.05VS_DGPU

+1.05VS_DGPU

+1.05VS_DGPU

120mA

+PEX_PLLVDD

AG14

AG19
F7

J10
J11
J12
J13
J9

P9
R9
T9
U9

AA9
AB9
W9
Y9

120mA

120mA

12

12
OPT@

OPT@
R1514

R1514
10K_0402_5%

10K_0402_5%

OPT@

OPT@
R1513

R1513
10K_0402_5%

10K_0402_5%

under GPU near GPU

C1603

1U_0402_6.3V6K

1U_0402_6.3V6K

1

OPT@C1603

OPT@

2

under GPU near GPU

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1503

OPT@

OPT@ C1504

C1503

OPT@

1

C1504

2

1

2

C1501

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

OPT@C1501

OPT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1505

OPT@

1

1

C1505

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C1502

OPT@C1502

OPT@

OPT@ C1506

OPT@

C1506

R1505 OPT@

R1505 OPT@

1

2

R1506 OPT@

R1506 OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
OPT@ C1507

OPT@

1

C1507

2

+3VSDGPU

0_0603_5%

0_0603_5%

12

@

@

12

R1515

R1515

0_0603_5%

0_0603_5%

NVIDIA suggest reserve it

0_0603_5%

0_0603_5%

12

+3VSDGPU

+1.05VS_DGPU

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

2010/08/23 2011/08/25

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

25 57Tuesday, December 14, 2010

25 57Tuesday, December 14, 2010

25 57Tuesday, December 14, 2010

1

A

A

A

of

of

of

5

D D

C C

B B

A A

4

U1400F

U1400F

B3

GND_0

B6

GND_1

B9

GND_2

B12

GND_3

B15

GND_4

B21

GND_5

B24

GND_6

B27

GND_7

B30

GND_8

B33

GND_9

C2

GND_10

C34

GND_11

E6

GND_12

E9

GND_13

E12

GND_14

E15

GND_15

E18

GND_16

E24

GND_17

E27

GND_18

E30

GND_19

F2

GND_20

F31

GND_21

F34

GND_22

F5

GND_23

J2

GND_24

J5

GND_25

J31

GND_26

J34

GND_27

K9

GND_28

L9

GND_29

M2

GND_30

M5

GND_31

M11

GND_32

M13

GND_33

M15

GND_34

M17

GND_35

M19

GND_36

M21

GND_37

M23

GND_38

M25

GND_39

M31

GND_40

M34

GND_41

N11

GND_42

N12

GND_43

N13

GND_44

N14

GND_45

N15

GND_46

N16

GND_47

N17

GND_48

N18

GND_49

N19

GND_50

N20

GND_51

N21

GND_52

N22

GND_53

N23

GND_54

N24

GND_55

N25

GND_56

P12

GND_57

P14

GND_58

P16

GND_59

P18

GND_60

P20

GND_61

P22

GND_62

P24

GND_63

R2

GND_64

R5

GND_65

R31

GND_66

R34

GND_67

T11

GND_68

T13

GND_69

T15

GND_70

T17

GND_71

T19

GND_72

T21

GND_73

T23

GND_74

T25

GND_75

U11

GND_76

U12

GND_77

U13

GND_78

U14

GND_79

U15

GND_80

U16

GND_81

U17

GND_82

U18

GND_83

U19

GND_84

U20

GND_85

U21

GND_86

U22

GND_87

U23

GND_88

U24

GND_89

U25

GND_90

V2

GND_91

V5

GND_92

V9

GND_93

V12

GND_94

V14

GND_95

V16

GND_96

N12P-GS1-A1_BGA_973P GS@

N12P-GS1-A1_BGA_973P GS@

Part 6 of 7

Part 6 of 7

3

V18

GND_97

V20

GND_98

V22

GND_99

V24

GND_100

V31

GND_101

Y11

GND_102

Y13

GND_103

Y15

GND_104

Y17

GND_105

Y19

GND_106

Y21

GND_107

Y23

GND_108

Y25

GND_109

AA2

GND_110

AA5

GND_111

AA11

GND_112

AA12

GND_113

AA13

GND_114

AA14

GND_115

AA15

GND_116

AA16

GND_117

AA17

GND_118

AA18

GND_119

AA19

GND_120

AA20

GND_121

AA21

GND_122

AA22

GND_123

AA23

GND_124

AA24

GND_125

AA25

GND_126

AA34

GND_127

AB12

GND_128

AB14

GND_129

AB16

GND_130

AB18

GND_131

AB20

GND_132

AB22

GND_133

AB24

GND_134

AC9

GND_135

AD2

GND_136

AD5

GND_137

AD11

GND_138

AD13

GND_139

AD15

GND_140

AD17

GND_141

AD21

GND_142

AD23

GND_143

AD25

GND_144

AD31

GND_145

AD34

GND_146

AE11

GND_147

GND

GND

GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192

AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG5
AG31
AG34
AK2
AK5
AK14
AK31
AK34
AL6
AL9
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AN2
AN34
AP3
AP6
AP9
AP12
AP15
AP18
AP21
AP24
AP27
AP30
AP33

2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

2010/08/23 2011/08/25

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

26 57Tuesday, December 14, 2010

26 57Tuesday, December 14, 2010

26 57Tuesday, December 14, 2010

1

A

A

A

5

MDA[0..63]

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1512

OPT@

OPT@ C1599

OPT@

1

C1512

C1599

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1600

OPT@

OPT@ C1517

OPT@

1

C1600

C1517

2

+VRAM_1.5VS

R1445 60.4_0402_1%

R1445 60.4_0402_1%
R1446 10K_0402_5%

R1446 10K_0402_5%

OPT@ C1509

OPT@

C1509

OPT@ C1514

OPT@

C1514

1

2

1

2

MDA[0..63]29,30

+FB_AVDD0

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1511

OPT@

OPT@ C1510

OPT@

1

C1511

C1510

2

+FB_AVDD1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1516

OPT@

OPT@ C1515

OPT@

1

C1516

C1515

2

100mA

1

2

100mA

1

2

D D

C C

+1.05VS_DGPU

L1402

OPT@L1402

OPT@

1 2

BLM18PG330SN1D_2P

BLM18PG330SN1D_2P

+1.05VS_DGPU

L1403

1 2

BLM18PG330SN1D_2P

BLM18PG330SN1D_2P

B B

OPT@L1403

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

OPT@

OPT@
OPT@

OPT@

4

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8

MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

+FB_AVDD0

+FB_AVDD1

12
12

U1400B

U1400B

L32

FBA_D0

N33

FBA_D1

L33

FBA_D2

N34

FBA_D3

N35

FBA_D4

P35

FBA_D5

P33

FBA_D6

P34

FBA_D7

K35

FBA_D8

K33

FBA_D9

K34

FBA_D10

H33

FBA_D11

G34

FBA_D12

G33

FBA_D13

E34

FBA_D14

E33

FBA_D15

G31

FBA_D16

F30

FBA_D17

G30

FBA_D18

G32

FBA_D19

K30

FBA_D20

K32

FBA_D21

H30

FBA_D22

K31

FBA_D23

L31

FBA_D24

L30

FBA_D25

M32

FBA_D26

N30

FBA_D27

M30

FBA_D28

P31

FBA_D29

R32

FBA_D30

R30

FBA_D31

AG30

FBA_D32

AG32

FBA_D33

AH31

FBA_D34

AF31

FBA_D35

AF30

FBA_D36

AE30

FBA_D37

AC32

FBA_D38

AD30

FBA_D39

AN33

FBA_D40

AL31

FBA_D41

AM33

FBA_D42

AL33

FBA_D43

AK30

FBA_D44

AK32

FBA_D45

AJ30

FBA_D46

AH30

FBA_D47

AH33

FBA_D48

AH35

FBA_D49

AH34

FBA_D50

AH32

FBA_D51

AJ33

FBA_D52

AL35

FBA_D53

AM34

FBA_D54

AM35

FBA_D55

AF33

FBA_D56

AE32

FBA_D57

AF34

FBA_D58

AE35

FBA_D59

AE34

FBA_D60

AE33

FBA_D61

AB32

FBA_D62

AC35

FBA_D63

AG27

FB_DLLAVDD_0

AF27

FB_PLLAVDD_0

J19

FB_DLLAVDD_1

J18

FB_PLLAVDD_1

J27

FB_VREF_NC

T30

FBA_DEBUG0

T29

FBA_DEBUG1

N12P-GS1-A1_BGA_973P GS@

N12P-GS1-A1_BGA_973P GS@

Part 2 of 7

Part 2 of 7

MEMORY INTERFACE

MEMORY INTERFACE

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0

A

A

FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_WCK0

FBA_WCK0_N

FBA_WCK1

FBA_WCK1_N

FBA_WCK2

FBA_WCK2_N

FBA_WCK3

FBA_WCK3_N

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

3

U30
V30
U31
V32
T35
U33
W32
W33
W31
W34
U34
U35
U32
T34
T33
W30
AB30
AA30
AB31
AA32
AB33
Y32
Y33
AB34
AB35
Y35
W35
Y34
Y31
Y30
W29
Y29

P32
H34
J30
P30
AF32
AL32
AL34
AF35

L35
G35
H31
N32
AD32
AJ31
AJ35
AC34

L34
H35
J32
N31
AE31
AJ32
AJ34
AC33

P29
R29
L29
M29
AG29
AH29
AD29
AE29

T32
T31

AC31
AC30

CMDA0
CMDA2

CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16

CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7

DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7

CLKA0
CLKA0#

CLKA1
CLKA1#

CMDA0 29
CMDA2 29

CMDA3 29
CMDA4 29,30
CMDA5 29,30
CMDA6 29,30
CMDA7 29,30
CMDA8 29,30
CMDA9 29,30
CMDA10 29,30
CMDA11 29,30
CMDA12 29,30
CMDA13 29,30
CMDA14 29,30
CMDA15 29,30
CMDA16 30

CMDA18 30
CMDA19 30
CMDA20 29,30
CMDA21 29,30
CMDA22 29,30
CMDA23 29,30
CMDA24 29,30
CMDA25 29,30
CMDA26 29,30
CMDA27 29,30
CMDA28 29,30
CMDA29 29,30
CMDA30 29,30

CLKA0 29
CLKA0# 29

CLKA1 30
CLKA1# 30

2

DQMA[7..0] 29,30
DQSA#[7..0] 29,30

DQSA[7..0] 29,30

1

GB2-128

Mode E - Mirror Mode Mapping

Address

CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7

CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CMD30

DATA Bus

0..31
CKE_L

A8

CS0#_L

A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9

BA0
BA2
A3

A4
A13
WE#
A1
A10
A12

CS1#_L

RAS#

ODT_L

A6

RST
A14
A15

32..63

A8

A6
A1
A9
A4
A12
CAS#
A3
A11

CS0#_H

BA0
A15

BA1
CS1#_H
ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7
CKE_H

RST

A13

BA2

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

2010/08/23 2011/08/25

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

27 57Tuesday, December 14, 2010

27 57Tuesday, December 14, 2010

27 57Tuesday, December 14, 2010

1

A

A

A

5

MDB[0..63]31,32

D D

C C

B B

+VRAM_1.5VS

MDB[0..63]

OPT@

OPT@

1 2

R1447 40.2_0402_1%

R1447 40.2_0402_1%

OPT@

OPT@

1 2

R1448 40.2_0402_1%

R1448 40.2_0402_1%

OPT@

OPT@

1 2

R1449 60.4_0402_1%

R1449 60.4_0402_1%

+VRAM_1.5VS

R1450 60.4_0402_1%

R1450 60.4_0402_1%
R1451 10K_0402_5%

R1451 10K_0402_5%

OPT@

OPT@
OPT@

OPT@

12
12

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8

MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

4

U1400C

U1400C

Part 3 of 7

B13

FBC_D0

D13

FBC_D1

A13

FBC_D2

A14

FBC_D3

C16

FBC_D4

B16

FBC_D5

A17

FBC_D6

D16

FBC_D7

C13

FBC_D8

B11

FBC_D9

C11

FBC_D10

A11

FBC_D11

C10

FBC_D12

C8

FBC_D13

B8

FBC_D14

A8

FBC_D15

E8

FBC_D16

F8

FBC_D17

F10

FBC_D18

F9

FBC_D19

F12

FBC_D20

D8

FBC_D21

D11

FBC_D22

E11

FBC_D23

D12

FBC_D24

E13

FBC_D25

F13

FBC_D26

F14

FBC_D27

F15

FBC_D28

E16

FBC_D29

F16

FBC_D30

F17

FBC_D31

D29

FBC_D32

F27

FBC_D33

F28

FBC_D34

E28

FBC_D35

D26

FBC_D36

F25

FBC_D37

D24

FBC_D38

E25

FBC_D39

E32

FBC_D40

F32

FBC_D41

D33

FBC_D42

E31

FBC_D43

C33

FBC_D44

F29

FBC_D45

D30

FBC_D46

E29

FBC_D47

B29

FBC_D48

C31

FBC_D49

C29

FBC_D50

B31

FBC_D51

C32

FBC_D52

B32

FBC_D53

B35

FBC_D54

B34

FBC_D55

A29

FBC_D56

B28

FBC_D57

A28

FBC_D58

C28

FBC_D59

C26

FBC_D60

D25

FBC_D61

B25

FBC_D62

A25

FBC_D63

K27

FBCAL_PD_VDDQ

L27

FBCAL_PU_GND

M27

FBCAL_TERM_GND

G19

FBC_DEBUG0

G16

FBB_DEBUG1

N12P-GS1-A1_BGA_973P GS@

N12P-GS1-A1_BGA_973P GS@

Part 3 of 7

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31

FBC_DQM0

FBC_DQM1

FBC_DQM2

FBC_DQM3

FBC_DQM4

FBC_DQM5

FBC_DQM6

FBC_DQM7

FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2

MEMORY INTERFACE C

MEMORY INTERFACE C

FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7

FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7

FBC_WCK0

FBC_WCK0_N

FBC_WCK1

FBC_WCK1_N

FBC_WCK2

FBC_WCK2_N

FBC_WCK3

FBC_WCK3_N

FBC_CLK0

FBC_CLK0_N

FBC_CLK1

FBC_CLK1_N

F18
E19
D18
C17
F19
C19
B17
E20
B19
D20
A19
D19
C20
F20
B20
G21
F22
F24
F23
C25
C23
F21
E22
D21
A23
D22
B23
C22
B22
A22
A20
G20

A16
D10
F11
D15
D27
D34
A34
D28

B14
B10
D9
E14
F26
D31
A31
A26

C14
A10
E10
D14
E26
D32
A32
B26

G14
G15
G11
G12
G27
G28
G24
G25

E17
D17

D23
E23

3

CMDB0
CMDB2

CMDB3
CMDB4
CMDB5
CMDB6
CMDB7
CMDB8
CMDB9
CMDB10
CMDB11
CMDB12
CMDB13
CMDB14
CMDB15
CMDB16

CMDB18
CMDB19
CMDB20
CMDB21
CMDB22
CMDB23
CMDB24
CMDB25
CMDB26
CMDB27
CMDB28
CMDB29
CMDB30

DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7

DQSB#0
DQSB#1
DQSB#2
DQSB#3
DQSB#4
DQSB#5
DQSB#6
DQSB#7

DQSB0
DQSB1
DQSB2
DQSB3
DQSB4
DQSB5
DQSB6
DQSB7

CLKB0
CLKB0#

CLKB1
CLKB1#

CMDB0 31
CMDB2 31

CMDB3 31
CMDB4 31,32
CMDB5 31,32
CMDB6 31,32
CMDB7 31,32
CMDB8 31,32
CMDB9 31,32
CMDB10 31,32
CMDB11 31,32
CMDB12 31,32
CMDB13 31,32
CMDB14 31,32
CMDB15 31,32
CMDB16 32

CMDB18 32
CMDB19 32
CMDB20 31,32
CMDB21 31,32
CMDB22 31,32
CMDB23 31,32
CMDB24 31,32
CMDB25 31,32
CMDB26 31,32
CMDB27 31,32
CMDB28 31,32
CMDB29 31,32
CMDB30 31,32

CLKB0 31
CLKB0# 31

CLKB1 32
CLKB1# 32

DQMB[7..0] 31,32
DQSB#[7..0] 31,32

DQSB[7..0] 31,32

2

1

GB2-128

Mode E - Mirror Mode Mapping

Address

CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7

CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CMD30

DATA Bus

0..31
CKE_L

A8

CS0#_L

A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9

BA0
BA2
A3

A4
A13
WE#
A1
A10
A12

CS1#_L

RAS#

ODT_L

A6

RST
A14
A15

32..63

A8

A6
A1
A9
A4
A12
CAS#
A3
A11

CS0#_H

BA0
A15

BA1
CS1#_H
ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7
CKE_H

RST

A13

BA2

A A

Security Classification

Security Classification

Security Classification

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

28 57Tuesday, December 14, 2010

of

28 57Tuesday, December 14, 2010

of

28 57Tuesday, December 14, 2010

A

A

A

5

4

3

2

1

DATA Bus

A8

A7

A2

A11

A5

A0

CAS#CMD15

BA1

A9

BA0

BA2

A3

A4

A13

WE#

A1

A10

A12

RAS#

A6

RST

A14

A15

MDA[0..63] 27,30

CMDA[30..0] 27,30

DQMA[7..0] 27,30
DQSA[7..0] 27,30

DQSA#[7..0] 27,30

32..63

A8

A6
A1
A9
A4
A12
CAS#
A3
A11

CS0#_H

BA0
A15

BA1
CS1#_H
ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7
CKE_H

RST

A13

BA2

Memory Partition A - Lower 32 bits

U1403

M8

M7

M2
M3

G3

+VRAM_1.5VS

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1529OPT@

C1529OPT@

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

N8

J7
K7
K9

K1
L2

J3
K3
L3

F3
C7

E7
D3

B7

T2
L8

J1
L1

J9
L9

U1403

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

C1530OPT@

C1530OPT@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1

12

C1531OPT@

C1531OPT@

2

OPT@ C1532

OPT@

C1532

MDA19

E3

MDA17

F7

MDA18

F2

MDA16

F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA20
MDA22
MDA21
MDA23

MDA14
MDA9
MDA12
MDA11
MDA13
MDA8
MDA15
MDA10

Group2

Group1

CMDA0

CMDA3

R1455

R1455

10K_0402_5%

10K_0402_5%

OPT@

OPT@

GB2-128

Mode E - Mirror Mode Mapping

Address

CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7

CMD13
CMD4
CMD18

R1456

R1456
10K_0402_5%

10K_0402_5%
OPT@

1 2

OPT@

1 2

CMD29
CMD27
CMD6
CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0

0..31
CKE_L

CS0#_L

CS1#_L

ODT_L
CMD5
CMD16

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

OPT@ C1533

OPT@

C1533

OPT@ C1534

OPT@

1

1

C1534

2

2

OPT@ C1535

OPT@

C1535

0.1U_0402_16V4Z
OPT@ C1536

OPT@

1

C1536

2

CMD20
CMD14
CMD30

U1402

+VRAM_1.5VS

D D

1.1K_0402_1%

1.1K_0402_1%

1.1K_0402_1%

1.1K_0402_1%

C C

B B

A A

R1452

R1452
OPT@

OPT@

R1453

R1453
OPT@

OPT@

OPT@

OPT@
160_0402_1%

160_0402_1%
R1454

R1454

1 2

CLKA0#

12

Layout: trace width 40mil

+FBA_VREF0

12

1

C1518

C1518

0.01U_0402_25V7K

0.01U_0402_25V7K
OPT@

OPT@

2

CLKA0

10K_0402_5%

10K_0402_5%

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1000P_0402_50V7K

1000P_0402_50V7K

12

12

C1519OPT@

C1519OPT@

C1601OPT@

C1601OPT@

R1457

R1457
OPT@

OPT@

12

+FBA_VREF0 +FBA_VREF0

CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14
CMDA30

CMDA29
CMDA13
CMDA27

R1458

R1458

243_0402_1%

243_0402_1%

OPT@

OPT@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1521OPT@

C1521OPT@

CLKA0
CLKA0#
CMDA3

CMDA0
CMDA2
CMDA11
CMDA15
CMDA28

DQSA0
DQSA3

DQMA0
DQMA3

DQSA#0
DQSA#3

CMDA20

12

12

CLKA027
CLKA0#27

12

+VRAM_1.5VS

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

C1520OPT@

C1520OPT@

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2

T8

R3

L7
R7
N7

T3

T7

M7

M2

N8

M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1

C1522OPT@

C1522OPT@

2

U1402

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1523

OPT@

C1523

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1524

OPT@

1

1

C1524

2

2

MDA3

E3

MDA6

F7

MDA1

F2

MDA4

F8

MDA2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1525

OPT@

C1525

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

1

2

Group0

MDA7
MDA0
MDA5

MDA29
MDA26
MDA30
MDA24
MDA27

Group3

MDA25
MDA31
MDA28

+VRAM_1.5VS +VRAM_1.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1526

OPT@

OPT@ C1527

OPT@

1

C1526

C1527

2

R1459

R1459

243_0402_1%

243_0402_1%

OPT@

OPT@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1528OPT@

C1528OPT@

CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14
CMDA30

CMDA29
CMDA13
CMDA27

CLKA0
CLKA0#
CMDA3

CMDA0
CMDA2
CMDA11
CMDA15
CMDA28

DQSA2
DQSA1

DQMA2
DQMA1

DQSA#2
DQSA#1

CMDA20

12

12

Security Classification

Security Classification

Security Classification

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

29 57Tuesday, December 14, 2010

of

29 57Tuesday, December 14, 2010

of

29 57Tuesday, December 14, 2010

A

A

A

5

4

3

2

1

Memory Partition A - Upper 32 bits

MDA[0..63] 27,29

U1405

U1404

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1541

OPT@

C1541

M8

H1
N3

P7
P3
N2
P8
P2
R8
R2
T8
R3

L7
R7
N7
T3
T7

M7

M2

N8

M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

U1404

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

OPT@ C1542

OPT@

C1542

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@ C1543

OPT@

OPT@ C1544

OPT@

1

1

C1543

C1544

2

2

MDA38

E3

MDA33

F7

MDA39

F2

MDA35

F8

MDA36

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

+VRAM_1.5VS +VRAM_1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

MDA34
MDA37
MDA32

MDA42
MDA45
MDA40
MDA46
MDA41
MDA47
MDA43
MDA44

OPT@ C1545

OPT@

C1545

1

2

Group4

Group5

0.1U_0402_16V4Z

0.1U_0402_16V4Z
OPT@ C1546

OPT@

C1546

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

4.7U_0603_6.3V6M

12

C1547OPT@

C1547OPT@

R1466

R1466

243_0402_1%

243_0402_1%

OPT@

OPT@

12

C1548OPT@

C1548OPT@

CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12
CMDA27

CMDA29
CMDA6
CMDA30

CLKA1
CLKA1#
CMDA16

CMDA19
CMDA18
CMDA11
CMDA15
CMDA25

DQSA7
DQSA6

DQMA7
DQMA6

DQSA#7
DQSA#6

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

C1549OPT@

C1549OPT@

12

+VRAM_1.5VS

12

R1460

D D

C C

B B

R1460

1.1K_0402_1%

1.1K_0402_1%
OPT@

OPT@

R1461

R1461

1.1K_0402_1%

1.1K_0402_1%

OPT@

OPT@

1 2

Layout: trace width 40mil

+FBA_VREF1

12

1

C1537

C1537

0.01U_0402_25V7K

0.01U_0402_25V7K
OPT@

OPT@

2

CLKA1

R1462

R1462
160_0402_1%

160_0402_1%

OPT@

OPT@

CLKA1#

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1538

OPT@

1

C1538

2

CLKA127
CLKA1#27

1

2

+FBA_VREF1 +FBA_VREF1

CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12
CMDA27

CMDA29
CMDA6
CMDA30

CLKA1
CLKA1#
CMDA16

CMDA19
CMDA18
CMDA11
CMDA15
CMDA25

DQSA4
DQSA5

DQMA4
DQMA5

DQSA#4
DQSA#5

CMDA20 CMDA20

12

R1465

R1465

243_0402_1%

243_0402_1%

OPT@

OPT@

+VRAM_1.5VS +VRAM_1.5VS

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@ C1539

OPT@

OPT@ C1540

OPT@

1

1

C1539

C1540

2

2

U1405

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

12

C1550OPT@

C1550OPT@

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

C1551OPT@

C1551OPT@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

MDA59

F7

MDA57

F2

MDA61

F8

MDA60

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA62
MDA56
MDA63

MDA51
MDA52
MDA48
MDA53
MDA49
MDA54
MDA50
MDA55

Group7

Group6

CMDA19

CMDA16

R1463

R1463
10K_0402_5%

10K_0402_5%
OPT@

OPT@

1 2

Mode E - Mirror Mode Mapping

Address

CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7

CMD13
CMD4
CMD18
CMD29
CMD27
CMD6

R1464

R1464
10K_0402_5%

10K_0402_5%
OPT@

OPT@

1 2

CMD17
CMD19
CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11

MDA58

E3

CMD0
CMD5
CMD16
CMD20

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

12

C1552OPT@

C1552OPT@

12

C1553OPT@

C1553OPT@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1555OPT@

C1555OPT@

C1554OPT@

C1554OPT@

CMD14
CMD30

CMDA[30..0] 27,29

DQMA[7..0] 27,29

DQSA[7..0] 27,29

DQSA#[7..0] 27,29

GB2-128

DATA Bus

0..31
CKE_L

A8

CS0#_L

A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9

BA0
BA2
A3

A4
A13
WE#
A1
A10
A12

CS1#_L

RAS#

ODT_L

A6

RST
A14
A15

32..63

A8

A6
A1
A9
A4
A12
CAS#
A3
A11

CS0#_H

BA0
A15

BA1
CS1#_H
ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7
CKE_H

RST

A13

BA2

A A

Security Classification

Security Classification

Security Classification

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

30 57Tuesday, December 14, 2010

of

30 57Tuesday, December 14, 2010

of

30 57Tuesday, December 14, 2010

A

A

A

5

4

3

2

1

Memory Partition C - Lower 32 bits

+VRAM_1.5VS

CLKB028
CLKB0#28

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1559GS@

C1559GS@

+FBB_VREF0

R1473

R1473

243_0402_1%

243_0402_1%

GS@

GS@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1560GS@

C1560GS@

CMDB7
CMDB10
CMDB24
CMDB6
CMDB22
CMDB26
CMDB5
CMDB21
CMDB8
CMDB4
CMDB25
CMDB23
CMDB9
CMDB12
CMDB14
CMDB30

CMDB29
CMDB13
CMDB27

CLKB0
CLKB0#
CMDB3

CMDB0
CMDB2
CMDB11
CMDB15
CMDB28

DQSB0
DQSB3

DQMB0
DQMB3

DQSB#0
DQSB#3

CMDB20

12

1

2

GS@

GS@

GS@

GS@

R1467

R1467

R1468

R1468

1 2

12

Layout: trace width 40mil

+FBB_VREF0

12

1

C1556

C1556

0.01U_0402_25V7K

0.01U_0402_25V7K
GS@

GS@

2

CLKB0

R1469

R1469
160_0402_1%

160_0402_1%
GS@

GS@

CLKB0#

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1000P_0402_50V7K

1000P_0402_50V7K

12

12

C1602GS@

C1602GS@

12

C1557GS@

C1557GS@

R1472

R1472

10K_0402_5%

10K_0402_5%

GS@

GS@

+VRAM_1.5VS +VRAM_1.5VS

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1558GS@

C1558GS@

D D

C C

B B

A A

1.1K_0402_1%

1.1K_0402_1%

1.1K_0402_1%

1.1K_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z
GS@ C1561

GS@

C1561

M8
H1

N3
P7
P3
N2
P8
P2
R8
R2

T8

R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

U1406

U1406

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

GS@ C1562

GS@

C1562

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

GS@ C1563

GS@

GS@ C1564

GS@

1

1

C1563

C1564

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+FBB_VREF0

R1474

R1474

243_0402_1%

243_0402_1%

GS@

GS@

GS@ C1566

GS@

1

C1566

2

CMDB7
CMDB10
CMDB24
CMDB6
CMDB22
CMDB26
CMDB5
CMDB21
CMDB8
CMDB4
CMDB25
CMDB23
CMDB9
CMDB12
CMDB14
CMDB30

CMDB29
CMDB13
CMDB27

CLKB0
CLKB0#
CMDB3

CMDB0
CMDB2
CMDB11
CMDB15
CMDB28

DQSB2
DQSB1

DQMB2
DQMB1

DQSB#2
DQSB#1

CMDB20

1U_0402_6.3V6K

1U_0402_6.3V6K

GS@ C1567

GS@

C1567

12

MDB3

E3

MDB5

F7

MDB2

F2

MDB4

F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

+VRAM_1.5VS +VRAM_1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

MDB1
MDB6
MDB0
MDB7

MDB31
MDB25
MDB29
MDB24
MDB28
MDB26
MDB30
MDB27

GS@ C1565

GS@

C1565

Group0

Group3

U1407

U1407

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

1U_0402_6.3V6K

1U_0402_6.3V6K

GS@ C1568

GS@

1

1

C1568

2

2

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

1U_0402_6.3V6K

1U_0402_6.3V6K

GS@ C1569

GS@

1

C1569

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

GS@ C1570

GS@

C1570

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

MDB16

E3

MDB17

F7

MDB19

F2

MDB18

F8

MDB23

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

0.1U_0402_16V4Z

0.1U_0402_16V4Z
GS@ C1571

GS@

1

C1571

2

MDB21
MDB22
MDB20

MDB13
MDB9
MDB14
MDB11
MDB12
MDB8
MDB15
MDB10

1

2

Group2

GB2-128

Mode E - Mirror Mode Mapping

Address

CMD3

Group1

CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7

CMD13
CMD4
CMD18
CMD29

CMDB0

CMDB3

CMD27
CMD6
CMD17
CMD19
CMD22

R1470

R1470

10K_0402_5%

10K_0402_5%

GS@

GS@

R1471

R1471
10K_0402_5%

10K_0402_5%
GS@

GS@

1 2

1 2

CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16
CMD20
CMD14
CMD30

0.1U_0402_16V4Z

0.1U_0402_16V4Z
GS@ C1572

GS@

1

C1572

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
GS@ C1573

GS@

C1573

GS@ C1574

GS@

1

C1574

2

0..31
CKE_L

A8

CS0#_L

A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9

BA0
BA2
A3

A4
A13
WE#
A1
A10
A12

CS1#_L

RAS#

ODT_L

A6

RST
A14
A15

MDB[0..63] 28,32

CMDB[30..0] 28,32

DQMB[7..0] 28,32
DQSB[7..0] 28,32

DQSB#[7..0] 28,32

DATA Bus

32..63

A8

A6
A1
A9
A4
A12
CAS#
A3
A11

CS0#_H

BA0
A15

BA1
CS1#_H
ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7
CKE_H

RST

A13

BA2

Security Classification

Security Classification

Security Classification

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

of

of

31 57Tuesday, December 14, 2010

31 57Tuesday, December 14, 2010

31 57Tuesday, December 14, 2010

A

A

A

5

4

3

2

1

Memory Partition C - Upper 32 bits

MDB[0..63] 28,31

U1408

1U_0402_6.3V6K

1U_0402_6.3V6K

GS@ C1580

GS@

C1580

M8
H1

N3
P7
P3
N2
P8
P2
R8
R2

T8

R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

U1408

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

GS@ C1581

GS@

C1581

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

GS@ C1582

GS@

C1582

GS@ C1583

GS@

1

C1583

2

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

C1586GS@

C1586GS@

+FBB_VREF1

R1481

R1481

243_0402_1%

243_0402_1%

GS@

GS@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1587GS@

C1587GS@

CMDB9
CMDB24
CMDB10
CMDB13
CMDB26
CMDB22
CMDB21
CMDB5
CMDB8
CMDB23
CMDB28
CMDB4
CMDB7
CMDB14
CMDB12
CMDB27

CMDB29
CMDB6
CMDB30

CLKB1
CLKB1#
CMDB16

CMDB19
CMDB18
CMDB11
CMDB15
CMDB25

DQSB7
DQSB6

DQMB7
DQMB6

DQSB#7
DQSB#6

CMDB20

12

12

MDB37

E3

MDB35

F7

MDB36

F2

MDB34

F8

MDB38

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

+VRAM_1.5VS +VRAM_1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

MDB32
MDB39
MDB33

MDB41
MDB46
MDB42
MDB47
MDB44
MDB45
MDB40
MDB43

GS@ C1584

GS@

C1584

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
GS@ C1585

GS@

C1585

Group4

Group5

12

+VRAM_1.5VS

D D

1.1K_0402_1%

1.1K_0402_1%

1.1K_0402_1%

1.1K_0402_1%

C C

B B

GS@

GS@

GS@

GS@

R1475

R1475

R1476

R1476

12

Layout: trace width 40mil

+FBB_VREF1

12

1

C1575

C1575

0.01U_0402_25V7K

0.01U_0402_25V7K
GS@

GS@

2

CLKB1

R1477

R1477
160_0402_1%

160_0402_1%
GS@

GS@

1 2

CLKB1#

+VRAM_1.5VS

1

GS@

GS@

+

+

C1576

C1576
220U_D2_4VY_R15M

220U_D2_4VY_R15M

2

1U_0402_6.3V6K

1U_0402_6.3V6K

GS@ C1577

GS@

1

1

C1577

2

2

+FBB_VREF1

CMDB9
CMDB24
CMDB10
CMDB13
CMDB26
CMDB22
CMDB21
CMDB5
CMDB8
CMDB23
CMDB28
CMDB4
CMDB7
CMDB14
CMDB12
CMDB27

CMDB29
CMDB6
CMDB30

R1480

R1480

243_0402_1%

243_0402_1%

GS@

GS@

1U_0402_6.3V6K

1U_0402_6.3V6K

GS@ C1579

GS@

1

C1579

2

CLKB1
CLKB1#
CMDB16

CMDB19
CMDB18
CMDB11
CMDB15
CMDB25

DQSB4
DQSB5

DQMB4
DQMB5

DQSB#4
DQSB#5

CMDB20

12

1

2

CLKB128
CLKB1#28

+VRAM_1.5VS +VRAM_1.5VS

1U_0402_6.3V6K

1U_0402_6.3V6K

GS@ C1578

GS@

C1578

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

C1588GS@

C1588GS@

U1409

U1409

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96
X76@

X76@

C1589GS@

C1589GS@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

4.7U_0603_6.3V6M

12

C1590GS@

C1590GS@

C1591GS@

C1591GS@

MDB56

E3

MDB63

F7

MDB57

F2

MDB62

F8

MDB58

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDB60
MDB59
MDB61

MDB49
MDB55
MDB48
MDB53
MDB51
MDB52
MDB50
MDB54

CMDB19

CMDB16

Group7

Group6

R1478

R1478
10K_0402_5%

10K_0402_5%
GS@

GS@

1 2

Mode E - Mirror Mode Mapping

Address

CMD3
CMD8
CMD2
CMD21
CMD24
CMD23
CMD26
CMD7

CMD13
CMD4
CMD18
CMD29
CMD27
CMD6
CMD17
CMD19

R1479

R1479

10K_0402_5%

10K_0402_5%

GS@

GS@

1 2

CMD22
CMD12
CMD28
CMD10
CMD25
CMD9
CMD1
CMD11
CMD0
CMD5
CMD16

4.7U_0603_6.3V6M

12

C1592GS@

C1592GS@

12

12

C1594GS@

C1594GS@

C1593GS@

C1593GS@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

CMD20
CMD14
CMD30

CMDB[30..0] 28,31

DQMB[7..0] 28,31

DQSB[7..0] 28,31

DQSB#[7..0] 28,31

GB2-128

DATA Bus

0..31
CKE_L

A8

CS0#_L

A7
A2
A11
A5
A0
CAS#CMD15
BA1
A9

BA0
BA2
A3

A4
A13
WE#
A1
A10
A12

CS1#_L

RAS#

ODT_L

A6

RST
A14
A15

32..63

A8

A6
A1
A9
A4
A12
CAS#
A3
A11

CS0#_H

BA0
A15

BA1
CS1#_H
ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7
CKE_H

RST

A13

BA2

A A

Security Classification

Security Classification

Security Classification

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

of

of

32 57Tuesday, December 14, 2010

32 57Tuesday, December 14, 2010

32 57Tuesday, December 14, 2010

A

A

A

5

+3VSDGPU

No6
No47

R1483

R1482

R1482

45.3K_0402_1%

45.3K_0402_1%
OPT@

D D

STRAP023
STRAP123
STRAP223

C C

ROM_SI23

ROM_SO23

ROM_SCLK23

STRAP0
STRAP1
STRAP2

ROM_SI
ROM_SO
ROM_SCLK

X76

B B

Hynix (900MHZ)

OPT@

1 2

R1485

R1485

45.3K_0402_1%

45.3K_0402_1%
@

@

1 2

R1488

R1488
15K_0402_1%

15K_0402_1%
@

@

1 2

R1491

R1491
20K_0402_5%

20K_0402_5%
X76@

X76@

1 2

R1483

34.8K_0402_1%

34.8K_0402_1%
@

@

1 2

R1486

R1486

34.8K_0402_1%

34.8K_0402_1%
OPT@

OPT@

1 2

No6

R1489

R1489
10K_0402_1%

10K_0402_1%

GV@

GV@

1 2

R1492

R1492
10K_0402_1%

10K_0402_1%
GS@

GS@

1 2

512MB

1 2

1 2

+3VSDGPU

1 2

1 2

0010

R1484

R1484

45.3K_0402_1%

45.3K_0402_1%
@

@

R1487

R1487

24.9K_0402_1%

24.9K_0402_1%

No47

GS@

GS@
R1490

R1490
15K_0402_1%

15K_0402_1%

R1493

R1493
15K_0402_1%

15K_0402_1%
@

@

64MX16 H5TQ1G63DFR-11C
SA000041S40

Hynix 2G

No2 No44

128MX16 H5TQ2G63BFR-12C

1GB

2GB

0010

0110 PD 34.8k(SD034348280)

4

N12P-GV QS DevID: 0x1050,

1. ROM_SCLK: pull up 5K ohm.

2. STRAP2: pull down 5K ohm.

3. ROM_SO: pull up 10K ohm.

4. STRAP3: pull down 5K ohm.

5. STRAP4: pull down 10K ohm.

6. STRAP_REF2, need to stuff with 40K ohm 1%.

7. PGOOD (pin E7) stuff 10K ohm.

STRAP0: as same as N12P-GS with 45K pull up.
STRAP1: pull down 35K as N12P-GS

GS@

GS@

No47

R1487

R1490

R1490

4.99K_0402_1%

4.99K_0402_1%
GV@

GV@

R1487

4.99K_0402_1%

4.99K_0402_1%
GV@

GV@

Option Component

U1400

U1400

N12P-GV-OP-B-A1_BGA973

N12P-GV-OP-B-A1_BGA973
GV@

GV@

SA00004JO00

SA00004JO00

PD 15K

PD 15K

(SD034150280)

(SD034150280)

GS:

GV:

GB1b-64

3

Physical
Strapping pin

ROM_SO FB_0_BAR_SIZE
ROM_SCLK
ROM_SI
STRAP2
STRAP1
STRAP0

Physical
Strapping pin

ROM_SO FB[0]
ROM_SCLK
ROM_SI
STRAP2
STRAP1
STRAP0
STRAP3
STRAP4

N11P-GS

64MX16
Samsung
SA000035700

64MX16
Hynix
SA000032400

128MX16
Samsung

128MX16
Hynix
SA00003VS10

strap0

H
45K

H
45K

H
45K

H
45K

Power Rail
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU

Power Rail
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU

strap1 strap2 ROM_SI ROM_SO ROM_SCLK
L

LL
GV@

35K

GS@
L

L

GV@

35K

GS@
L

L
35K

GS@

L

L

35K

GS@

Logical
Strapping Bit3

XCLK_417
PCI_DEVID[4]

PCI_DEVID[3]
3GIO_PADCFG[3]
USER[3]

Logical
Strapping Bit3

FB[1]
PCI_DEVID[4]

PCI_DEVID[3]
3GIO_PADCFG[3]
USER[3]

SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
RESERVED RESERVED PCIE_MAX_SPEED DP_PLL_VDD33V

20K

L
15K

L
45K

L
35K

L
10K

L
10K

L
10K

L
10K

H
15K

H
15K

H
15K

H
15K

2

Logical
Strapping Bit2

SUB_VENDOR

Logical
Strapping Bit2

SUB_VENDOR

1

Logical
Strapping Bit1

Logical
Strapping Bit0

VGA_DEVICESMB_ALT_ADDR

SLOT_CLK_CFG
RAMCFG[1]RAMCFG[3] RAMCFG[2]

PEX_PLLEN_TERM
RAMCFG[0]
PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]
3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]
USER[0]USER[1]USER[2]

Logical
Strapping Bit1

Logical
Strapping Bit0

VGA_DEVICESMB_ALT_ADDR

PCI_DEVID[5]
RAMCFG[1]RAMCFG[3] RAMCFG[2]

PEX_PLLEN_TERM
RAMCFG[0]
PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]
3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]
USER[0]USER[1]USER[2]

Resistor Values

5K
10K
15K
20K
25K
30K
35K
45K

GPU

DeviceID

N12P-GS 0x0DF4

N12P-GV 0x1050 pull down 5K

0x0DF5 Pull down 30KN12P-GE

Pull-up to +3VS

1000
1001
1010
1011
1100
1101
1110
1111

Pull-down to Gnd

0000
0001
0010
0011
0100
0101
0110
0111

ROM_SCLK STRAP2

Pull up 15K Pull down 25K

Pull up 15K

Pull up 5K

SA00003YO20

Samsung (900MHZ)
64MX16 K4W1G1646G-BC11
SA00004GS10

512MB

1GB

0011

0011

PD 20K (SD034200280)

PD 20K (SD034200280)

No1
No44

Samsung 2G
128M16 K4W2G1646C-HC12

A A

SA000047Q20

XCLK_417

0

277MHz (Default)

1

Reserved

5

0111 PD 45.3K

4

(SD034453280)2GB

Security Classification

Security Classification

Security Classification

2010/08/23 2011/08/25

2010/08/23 2011/08/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/23 2011/08/25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

of

of

33 57Tuesday, December 14, 2010

33 57Tuesday, December 14, 2010

33 57Tuesday, December 14, 2010

A

A

A

5

4

3

2

1

+LCDVDD

D D

2N7002H_SOT23-3

2N7002H_SOT23-3

PCH_ENVDD16

C C

PCH_ENVDD

100K_0402_5%

100K_0402_5%

DPST_PWM16

R2100

R2100

300_0603_5%

300_0603_5%

Q2100

Q2100

R2103

R2103

R2107

R2107

1 2

100K_0402_5%

100K_0402_5%

12

13

D

D

S

S

12

eDP

B B

+1.05VS_VCCP

EDP_HPD#4

2N7002H_SOT23-3

2N7002H_SOT23-3

LCD POWER CIRCUIT

+3VALW

12

R2101

R2101
10K_0402_5%

10K_0402_5%

R2102

R2102
10K_0402_5%

2

G

G

13

D

D

2

G

G

S

S

10K_0402_5%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

Q2102

Q2102
2N7002H_SOT23-3

2N7002H_SOT23-3

No33

U2102

U2102

1

2

3

R2112

@

R2112

@

1K_0402_5%

1K_0402_5%
1 2

Q2103

Q2103

@

@

OE#

IN

GND

74AHC1G125GW_SOT353-5

74AHC1G125GW_SOT353-5

13

D

D

S

S

2

G

G

VCC

OUT

EDP_HPD

12

@

@

100K_0402_5%

100K_0402_5%

5

4

R2114

R2114

12

12

C2100

C2100

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+3VS

INVTPWM

2

C2107

C2107

+3VS

3

S

S

G

G

D

D

1

12

12

R2110

R2110
10K_0402_5%

10K_0402_5%

EDP_TXN04
EDP_TXP04

EDP_TXN14
EDP_TXP14

EDP_AUXN4

EDP_AUXP4

W=60mils

12

C2101

C2101

4.7U_0805_10V4Z

4.7U_0805_10V4Z

Q2101

Q2101
AO3413L_SOT23-3

AO3413L_SOT23-3

+LCDVDD

W=60mils

12

C2108

C2108

0.1U_0402_16V4Z

0.1U_0402_16V4Z

EDP_TXN0
EDP_TXP0

EDP_AUXP EDP_AUX_R

+3VS

+3VS

BKOFF#41

Near JLVDS1

@

@
@

@
@

@
@

@
@

@
@

@

12

+LCDVDD

12

C2103

C2102

C2102

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R2104 2.2K_0402_5%R2104 2.2K_0402_5%

1 2

R2105 2.2K_0402_5%R2105 2.2K_0402_5%

1 2

C2114.1U_0402_16V7K

C2114.1U_0402_16V7K

12

C2115.1U_0402_16V7K

C2115.1U_0402_16V7K

12

C2149.1U_0402_16V7K

C2149.1U_0402_16V7K

12

C2150.1U_0402_16V7K

C2150.1U_0402_16V7K

12

C2118.1U_0402_16V7K

C2118.1U_0402_16V7K

12

C2119.1U_0402_16V7K

C2119.1U_0402_16V7K

12

C2103
10U_0805_10V4Z

10U_0805_10V4Z

C2109@

C2109@

10P_0402_50V8J

10P_0402_50V8J

R2108 0_0402_5%R2108 0_0402_5%

1 2

R2109 10K_0402_5%R2109 10K_0402_5%

1 2

C2111 220P_0402_50V7KC2111 220P_0402_50V7K

12

C2112 220P_0402_50V7KC2112 220P_0402_50V7K

12

C2113 220P_0402_50V7KC2113 220P_0402_50V7K

12

EDP_TX0#_R
EDP_TX0_R

EDP_TX1#_REDP_TXN1
EDP_TX1_REDP_TXP1

EDP_AUX#_REDP_AUXN

Place closed to JLVDS1

12

C2104

C2104

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PCH_LCD_CLK
PCH_LCD_DATA

12

12

C2110@

C2110@

10P_0402_50V8J

10P_0402_50V8J

DISPOFF#

DAC_BRIG
INVTPWM
DISPOFF#

USB20_P1017

USB20_N1017

+LCDVDD

W=60mils

R2154 0_0402_5%R2154 0_0402_5%
R2155 0_0402_5%R2155 0_0402_5%

680P_0402_50V7K

680P_0402_50V7K

T2100PADT2100PAD

+3VS

T2101PADT2101PAD

1 2
1 2

22P_0402_50V8J

22P_0402_50V8J

+INVPWR_B+ B+

W=60mils

12

C2105

C2105

12

C2106

C2106
68P_0402_50V8J

68P_0402_50V8J

L2100

L2100

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

12

L2101

L2101

12

SM010014520 3000ma
220ohm@100mhz DCR

0.04

LCD/LED PANEL Conn.

No12

pin 4, 8,9,34 changed, should check with JM40/50

+INVPWR_B+

COLOR_ENG_EN

+3VS

12

DAC_BRIG
DISPOFF#
INVTPWM

EDP_AUX_R
EDP_AUX#_R

EDP_TX1_R
EDP_TX1#_R

EDP_TX0_R
EDP_TX0#_R

PCH_TXCLK+

PCH_TXCLK­PCH_TXOUT2+
PCH_TXOUT2-

PCH_TXOUT1+
PCH_TXOUT1-

PCH_TXOUT0+
PCH_TXOUT0­PCH_LCD_DATA

PCH_LCD_CLK

DCR

EDP_HPD

USB20_CMOS_P10
USB20_CMOS_N10

C2152

C2152
22P_0402_50V8J

22P_0402_50V8J

@

@

pin define changed, follow JM50

DAC_BRIG41

DMIC_DATA46
DMIC_CLK46

PCH_TXCLK+16

PCH_TXCLK-16

PCH_TXOUT2+16

PCH_TXOUT2-16

PCH_TXOUT1+16

PCH_TXOUT1-16

PCH_TXOUT0+16

PCH_TXOUT0-16

PCH_LCD_DATA16

PCH_LCD_CLK16

12

C2151

C2151

@

@

W=60mils

JLVDS1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

ACES_50398-04071-001

ACES_50398-04071-001

SP010013I00

CONN@JLVDS1

CONN@

G1
G2
G3
G4
G5

41
42
43
44
45

D2100

D2100

1

V I/O

USB20_CMOS_N10 USB20_CMOS_P10

Ground2V BUS

3

V I/O

IP4223CZ6_SO6-6

IP4223CZ6_SO6-6

V I/O

V I/O

6
5

+3VS

4

ESD request

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2010/12/312009/08/01

2010/12/312009/08/01

2010/12/312009/08/01

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.
SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

1

34 57

34 57

34 57

A

A

A

A

B

C

D

E

No36

JM50 ESD team Suggestion

+R_CRT_VCC

D2101

D2101

2
3

RB491D-YS_SOT23-3

RB491D-YS_SOT23-3

W=40mils

1.1A_6V_SMD1812P110TF

1.1A_6V_SMD1812P110TF

1 2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

T92 PADT92 PAD

12

C2130

C2130
100P_0402_50V8J

100P_0402_50V8J

12

C2132

C2132

68P_0402_50V8J

68P_0402_50V8J

S

S

G

G

2

13

D

S

D

S

F2100

F2100

12

C2120

C2120

T93

T93
PAD

PAD

12

C2135

C2135
68P_0402_50V8J

68P_0402_50V8J

+3VS

R2120

R2120

4.7K_0402_5%

4.7K_0402_5%

G

G

2

Q2104

Q2104
2N7002H_SOT23-3

2N7002H_SOT23-3

13

D

D

Q2105

Q2105
2N7002H_SOT23-3

2N7002H_SOT23-3

+CRT_VCC

W=40mils

CRT Connector

JCRT1

JCRT1

6

CRT_P11

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070546FR015S297ZR

SUYIN_070546FR015S297ZR
CONN@

CONN@

CRT_P5

HW3 doesn't use CRT_DET

DSUB_12

DSUB_15

+CRT_VCC

12

12

R2121

R2121

4.7K_0402_5%

4.7K_0402_5%

DSUB_12

DSUB_15

16

G

G

17

G

G

DC060003L00

change P/N: SCS00003H00

C2129

C2129

+5VS

2

3

2

3

1 1

L2102

L2102

BLM18BA470SN1D_2P

10P_0402_50V8J

10P_0402_50V8J

C2122

C2122

BLM18BA470SN1D_2P

1 2

BLM18BA470SN1D_2P

BLM18BA470SN1D_2P

1 2

BLM18BA470SN1D_2P

BLM18BA470SN1D_2P

1 2

10P_0402_50V8J

10P_0402_50V8J

12

C2123

C2123

L2104

L2104

L2106

L2106

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

12

12

C2124

C2124

PCH_CRT_R16

PCH_CRT_G16

PCH_CRT_B16

PCH_CRT_R CRT_R_1 CRT_R_2

PCH_CRT_G CRT_G_1 CRT_G_2

PCH_CRT_B CRT_B_1 CRT_B_2

12

12

R2115

R2115
150_0402_1%

150_0402_1%

R2116

R2116

150_0402_1%

150_0402_1%

12

R2117

R2117
150_0402_1%

150_0402_1%

10P_0402_50V8J

10P_0402_50V8J

12

12

C2121

C2121

C2125

C2125

12

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

BLM18BA470SN1D_2P

BLM18BA470SN1D_2P

1 2

BLM18BA470SN1D_2P

BLM18BA470SN1D_2P

1 2

BLM18BA470SN1D_2P

BLM18BA470SN1D_2P

1 2

22P_0402_50V8J

22P_0402_50V8J

C2126

C2126

L2103

L2103

L2105

L2105

L2107

L2107

D2102

D2102

1

10P_0402_50V8J

10P_0402_50V8J

C2127

C2127

12

12

10P_0402_50V8J

10P_0402_50V8J

C2128

C2128

1

D2103

D2103

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

10P_0402_50V8J

10P_0402_50V8J

12

SM010012010 300ma 120ohm@100mhz DCR 0.4

C2133

C2133

CRT_HSYNC_2

CRT_VSYNC_2

12

PCH_CRT_DATA

PCH_CRT_CLK

12

C2134

C2134
10P_0402_50V8J

10P_0402_50V8J

2 2

PCH_CRT_HSYNC16

3 3

C2131 0.1U_0402_16V4ZC2131 0.1U_0402_16V4Z

1 2

PCH_CRT_HSYNC CRT_HSYNC_1

PCH_CRT_VSYNC16

+CRT_VCC

1

5

U2101

U2101

P

2

C2136 0.1U_0402_16V4ZC2136 0.1U_0402_16V4Z

4

OE#

A

Y

G

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

1 2

PCH_CRT_VSYNC CRT_VSYNC_1

R2118 10K_0402_5%R2118 10K_0402_5%

+CRT_VCC

1

5

U2100

U2100

P

2

4

OE#

A

Y

G

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

12

1 2
L2108 MBC1608121YZF_0603L2108 MBC1608121YZF_0603

1 2
L2109 MBC1608121YZF_0603L2109 MBC1608121YZF_0603

10P_0402_50V8J

10P_0402_50V8J

PCH_CRT_DATA16

PCH_CRT_CLK16

PCH DDC PU 2.2K on Page 16

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2010/12/312009/08/01

2010/12/312009/08/01

2010/12/312009/08/01

D

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

E

35 57

35 57

35 57

A

A

A

5

No36

R2129@

R2129@

0_0603_5%

0_0603_5%

1 2

D2105

D D

+5VS

UMA

C C

D2105

2
3

RB491D-YS_SOT23-3

RB491D-YS_SOT23-3

change P/N: SCS00003H00

PCH_DPB_N016
PCH_DPB_P016

PCH_DPB_N116
PCH_DPB_P116

PCH_DPB_N216
PCH_DPB_P216

PCH_DPB_N316
PCH_DPB_P316

+HDMI_5V

1

C2138 .1U_0402_16V7KC2138 .1U_0402_16V7K
C2139 .1U_0402_16V7KC2139 .1U_0402_16V7K

C2140 .1U_0402_16V7KC2140 .1U_0402_16V7K
C2141 .1U_0402_16V7KC2141 .1U_0402_16V7K

C2142 .1U_0402_16V7KC2142 .1U_0402_16V7K
C2144 .1U_0402_16V7KC2144 .1U_0402_16V7K

C2145 .1U_0402_16V7KC2145 .1U_0402_16V7K
C2146 .1U_0402_16V7KC2146 .1U_0402_16V7K

W=40mils

+HDMI_5V_OUT

F2101

F2101

1 2

1.1A_6V_SMD1812P110TF

1.1A_6V_SMD1812P110TF

12
12

12
12

12
12

12
12

DIS

4

12

C2137

C2137

0.1U_0402_16V4Z

0.1U_0402_16V4Z

HDMI_TX2­HDMI_TX2+

HDMI_TX1­HDMI_TX1+

HDMI_TX0­HDMI_TX0+

HDMI_CLK­HDMI_CLK+

NVIDA Recommand 05/10

3

HDMI_HPD

12

C2143

C2143

220P_0402_25V8J

220P_0402_25V8J

1 3

D

D

12

R2136

R2136
100K_0402_5%

100K_0402_5%

+3VS

2

G

G

12

R2133

R2133

1M_0402_5%

1M_0402_5%

Q2106

Q2106

S

S

2N7002H_SOT23-3

2N7002H_SOT23-3

PCH_DPB_HPD 16

2

ESD request
Common mode choke 90ohm on these singals
Compal PN: SM070000K00
Vendor PN: WCM-2012-900T

HDMI_CLK+

HDMI_CLK-

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+ HDMI_R_D2+

HDMI_TX2-

R2130 0_0402_5%@R2130 0_0402_5%@

4

4

L2110

L2110

1

1

R2131 0_0402_5%@R2131 0_0402_5%@

R2132 0_0402_5%@R2132 0_0402_5%@

4

4

L2111

L2111

1

1

R2134 0_0402_5%@R2134 0_0402_5%@

R2135 0_0402_5%@R2135 0_0402_5%@

4

4

L2112

L2112

1

1

R2137 0_0402_5%@R2137 0_0402_5%@

R2138 0_0402_5%@R2138 0_0402_5%@

4

4

L2113

L2113

1

1

R2139 0_0402_5%@R2139 0_0402_5%@

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1

3

3

WCM-2012-900T_4P

WCM-2012-900T_4P

2

2

3

3

WCM-2012-900T_4P

WCM-2012-900T_4P

2

2

3

3

WCM-2012-900T_4P

WCM-2012-900T_4P

2

2

3

3

WCM-2012-900T_4P

WCM-2012-900T_4P

2

2

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D1+

HDMI_R_D1-

HDMI_R_D2-

HDMI_TX2-

R2140 680_0402_5% R2140 680_0402_5%

1 2

R2141 680_0402_5% R2141 680_0402_5%

1 2

R2142 680_0402_5% R2142 680_0402_5%

1 2

R2143 680_0402_5% R2143 680_0402_5%

1 2

R2144 680_0402_5% R2144 680_0402_5%

1 2

R2145 680_0402_5% R2145 680_0402_5%

1 2

R2146 680_0402_5% R2146 680_0402_5%

1 2

R2147 680_0402_5% R2147 680_0402_5%

1 2

UMA 680_0402_5%
DIS 499_0402_1%

Not reserved

+HDMI_5V_OUT

Not reserved

HDMI_TX2+
HDMI_TX1-

HDMI_TX1+
HDMI_TX0-

HDMI_TX0+
HDMI_CLK-

HDMI_CLK+

HDMI connector

D2107

R2148

R2148

2.2K_0402_5%

2.2K_0402_5%

D2107
RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

R2149

R2149

2.2K_0402_5%

2.2K_0402_5%

1 2

HDMI_SCLKHDMI_SCLK_R

HDMI_SDATAHDMI_SDATA_R

+HDMI_5V_OUT

1109 RF request

12

C2147

C2147
47P_0402_50V8J

47P_0402_50V8J
@

@

12

C2148

C2148
47P_0402_50V8J

47P_0402_50V8J
@

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/01 2010/12/31

2009/08/01 2010/12/31

2009/08/01 2010/12/31

HDMI_HPD

HDMI_SDATA
HDMI_SCLK

HDMI_R_CK­HDMI_R_CK+

HDMI_R_D0­HDMI_R_D0+

HDMI_R_D1­HDMI_R_D1+

HDMI_R_D2­HDMI_R_D2+

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D2106

RB751V-40_SOD323-2

B B

RB751V-40_SOD323-2

+3VS

Pull high at VGA side

R2150 0_0402_5%R2150 0_0402_5%

SDVO_SCLK16

SDVO_SDATA16

1 2

R2151 0_0402_5%R2151 0_0402_5%

1 2

G

G

2

13

D

S

D

S

D2106

G

G

2

Q2108

Q2108
2N7002H_SOT23-3

2N7002H_SOT23-3

13

D

S

D

S

Q2109

Q2109
2N7002H_SOT23-3

2N7002H_SOT23-3

1 2

1 2

Place closed to JHDMI1

+3VS

R2152 2.2K_0402_1%R2152 2.2K_0402_1%

1 2

A A

R2153 2.2K_0402_1%R2153 2.2K_0402_1%

1 2

5

SDVO_SCLK

SDVO_SDATA

4

JHDMI1

CONN@JHDMI1
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

From layout request, change footprint
SUYIN_100042GR019M23BZR_19P-S

CONN@

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CK­CK_shield
CK+
D0­D0_shield
D0+
D1­D1_shield
D1+
D2­D2_shield
D2+

SUYIN_100042GR019M23BZR

SUYIN_100042GR019M23BZR

DC232001100

23

GND3

22

GND2

21

GND1

20

GND0

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.
SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

+3VS

2N7002H_SOT23-3

2N7002H_SOT23-3

1

HDMI_GND

Q2107

Q2107

13

D

D

2

G

G

S

S

ACustom

ACustom

ACustom

5736

5736

5736

5

D D

4

3

2

1

+USB_VCCD

+5VALW

SYSON#

1

C2471

C2471

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

C C

SYSON#45,46

U2400

U2400

1

GND

2

VIN
VIN3VOUT

4

EN

VOUT
VOUT

EPAD

AP2301MPG-13_MSOP8

AP2301MPG-13_MSOP8

9

FLG

8
7
6
5

+USB_VCCD

JM50

R2435 0_0402_5%R2435 0_0402_5%

1 2

1

C2472

C2472

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

USB_OC1# 17

@

R2436 0_0402_5%

R2436 0_0402_5%

USB20_N117

USB20_P117

USB20_N1

USB20_P1

@

1 2

L2401 WCM-2012-670T_4PL2401 WCM-2012-670T_4P

4

4

1

1

R2439 0_0402_5%

R2439 0_0402_5%

1 2

@

@

3

3

2

2

USB20_N1_1
USB20_P1_1

+USB_VCCD

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

1

+

+

C2473

C2473

2

470P_0402_50V7K

470P_0402_50V7K

JUSB1

CONN@JUSB1

CONN@

1

VCC

2

D-

3

D+

4

GND

5

GND

VCC

6

GND

D-

7

GND

D+

8

GND

GND

TOP_YUB2008-1R0021

TOP_YUB2008-1R0021

1

2

No8

9
10
11
12

C2474

C2474

DC021011051
use DC021011050 symbol

D2408

D2408

6

+USB_VCCD

USB20_N1_1

B B

5

4

CM1293A-04SO_SOT23-6~D

CM1293A-04SO_SOT23-6~D

3

2

1

USB20_P1_1

SC300000O00
S DIO(BR) AZC099-04S.R7G SOT23 ESD

No15

ESD request 10/5

A A

Security Classification

Security Classification

Security Classification

2009/12/4 2010/12/31

2009/12/4 2010/12/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/12/4 2010/12/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

37 57Tuesday, December 14, 2010

37 57Tuesday, December 14, 2010

37 57Tuesday, December 14, 2010

1

A

A

A

5

D D

4

3

2

1

should check HDD pin definition

SATA HDD1 Conn.

CL 4.0 mm

JHDD1

JHDD1

CONN@

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

G1

22

G2

23

G3

24

G4

ACES_50406-02071-001

ACES_50406-02071-001

R2432

R2432

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_DTX_PRX_N0
SATA_DTX_PRX_P0

+3VS

+5VS_HDD1

SATA_PTX_DRX_P013
SATA_PTX_DRX_N013

SATA_DTX_C_PRX_N013
SATA_DTX_C_PRX_P013

C C

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

SATA_DTX_C_PRX_N0
SATA_DTX_C_PRX_P0

C2460 0.01U_0402_16V7KC2460 0.01U_0402_16V7K

1 2

C2461 0.01U_0402_16V7KC2461 0.01U_0402_16V7K

1 2

C2462 0.01U_0402_16V7KC2462 0.01U_0402_16V7K

1 2

C2463 0.01U_0402_16V7KC2463 0.01U_0402_16V7K

1 2

+5VS

0_0805_5%

0_0805_5%

1 2

SP010016L00

check: +3VS need or not?

+3VS

12

C2464

C2464

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+5VS_HDD1

100mils

0.1U_0402_16V4Z

C2465

10U_0805_10V4Z

C2465

10U_0805_10V4Z

12

0.1U_0402_16V4Z

C2466

1U_0402_6.3V6K

C2466

1U_0402_6.3V6K

12

12

C2467

C2467

C2468

1000P_0402_50V7K

C2468

1000P_0402_50V7K

12

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2010/12/312008/08/10

2010/12/312008/08/10

2010/12/312008/08/10

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

1

38 57

38 57

38 57

A

A

A

A

For Wireless LAN

12

C2475

12

@

@

D2432

D2432

1 2

RB751V-40_SOD323-2

RB751V-40_SOD323-2

C2475

4.7U_0805_10V4Z

4.7U_0805_10V4Z

R2448

R2448
0_0402_5%

0_0402_5%

1 2
1 2

R2635

R2635

0_0402_5%

0_0402_5%

1K_0402_5%

1K_0402_5%

BT_ON#

+3VS +3VS_WLAN

R2440

R2440

0_1206_5%

0_1206_5%

60mil

12

1 1

2 2

PCH_PCIE_WAKE#15,44,46

MINI1_CLKREQ#14

CLK_PCIE_MINI1#14

CLK_PCIE_MINI114

PCIE_PRX_DTX_N214
PCIE_PRX_DTX_P214

PCIE_PTX_C_DRX_N214

PCIE_PTX_C_DRX_P214

E51TXD_P80DATA41

E51RXD_P80CLK41

R2450

R2450

100K_0402_5%

100K_0402_5%

SUSP#41,45,52,53

BT_ON#18,40

R2442@

R2442@

0_0402_5%

0_0402_5%

1 2

E51TXD_P80DATA1_R
E51RXD_P80CLK_R

R2636

R2636

BT_CTRL

2

G

G

12

12

C2476

C2476

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS_WLAN

(WLAN_BT_DATA)
(WLAN_BT_CLK)

13

D

D

Q2436

Q2436
2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

12

C2477

C2477

4.7U_0805_10V4Z

4.7U_0805_10V4Z

12

C2478

C2478

0.1U_0402_16V4Z

0.1U_0402_16V4Z

No14

JWLAN1

JWLAN1

CONN@

CONN@

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

FOX_AS0B221-S40N-7H

FOX_AS0B221-S40N-7H

SP07000MG00

4 mm High

WLAN&BT Combo module circuits

BT_CTRL
BT_ON#

WWAN

R2456 0_0402_5%3G@R2456 0_0402_5%3G@

1 2

L2407

@L2407

USB20_N917

USB20_P917

3 3

4 4

USB20_P9

JWWAN1

JWWAN1

CONN@

CONN@

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

FOX_AS0B221-S40N-7H

FOX_AS0B221-S40N-7H

SP07000MG00

4 mm High

A

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

@

1 2

OCE2012120YZF_4P

OCE2012120YZF_4P
3G@

3G@

1 2

R2454 0_0402_5%

R2454 0_0402_5%

+3VS_WWAN +UIM_PWR+3VS_WWAN

+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST

R2451 0_0402_5%3G@R2451 0_0402_5%3G@

M_WXMIT_OFF#

WWAN_DET#

USB20_N9_R
USB20_P9_R

WWAN_LED#

WWAN_OFF#18

USB20_N9_RUSB20_N9

34

USB20_P9_R

1 2

R2405 0_0402_5%3G@R2405 0_0402_5%3G@

1 2

R2625 100K_0402_5%R2625 100K_0402_5%

1 2

UIM_VPP

WWAN_LED# 41

12

D2429

3G@D2429

3G@

M_WXMIT_OFF#

RB751V-40_SOD323-2

RB751V-40_SOD323-2

B

12

C2479

C2479

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS_WLAN

+1.5VS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

WL_OFF#
PLT_RST_BUF#

MINI1_SMBCLK
MINI1_SMBDATA

R2447 0_0402_5%R2447 0_0402_5%

BT
on module

Enable Disable

HL

LH

WWAN_DET#_EC 41

+3VALW

B

1 2

BT
on module

USB20_N1217

USB20_P1217

+3VS_WLAN+3VS_WLAN +1.5VS

12

C2480

C2480

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R2443 0_0603_5%R2443 0_0603_5%

1 2

R2444 @ 0_0402_5%R2444 @ 0_0402_5%

1 2

R2445 @ 0_0402_5%R2445 @ 0_0402_5%

1 2

(9~16mA)

12

R2449

R2449
100K_0402_5%

100K_0402_5%

+3VS_WLAN

USB20_N12

USB20_P12

check power well

UIM_DET_EC41

Power

+3VS
+3V
+1.5VS

WL_OFF# 18
PLT_RST_BUF# 17

+3VS

PCH_SMBCLK 14
PCH_SMBDATA 14

USB20_N8 17
USB20_P8 17

MINI1_LED# 41

R2453 0_0402_5%3G@R2453 0_0402_5%3G@

1 2

L2406

1 2

OCE2012120YZF_4P

OCE2012120YZF_4P

3G@

3G@

1 2

R2452 0_0402_5%

R2452 0_0402_5%

R2401

R2401

10K_0402_5%

10K_0402_5%

3G@

3G@

1 2

0_0402_5%

0_0402_5%
R2537

R2537
3G@

3G@

C

Mini Card Power Rating
Primary Power (mA)
Peak

Normal

1000

@L2406

@

34

+3VS

12

UIM_VPP
UIM_DATA
UIM_DET_R

USB20_P12_R
USB20_N12_R

C

D

Auxiliary Power (mA)

750
250
375500

USB20_N12_R

USB20_P12_R

3G@C2494

3G@

C2494

250 (wake enable)330
5 (Not wake enable)

1

2

22P_0402_50V8J

22P_0402_50V8J

Normal

2

3

D2433

D2433

3G@

3G@

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

JSIM1

JSIM1

4

GND

5

VPP

6

I/O

7

DET

8

D+

9

D-

TAITW_PMPAT7-08GLBS1N14H0

TAITW_PMPAT7-08GLBS1N14H0

CONN@

CONN@

+3VS

C2735

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

3G@C2735

3G@

+VSB

EC_SIM_DETECT#41

1

VCC

RST
CLK

GND
GND

UIM_RST

2

UIM_CLK

3

1

3G@C2495
10
11

3G@

2

C2495

20mil

EC_SIM_DETECT#

1

3G@C2740

3G@

2

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

C2740

R2630
47K_0402_5%

47K_0402_5%

SP07000NX00

Place as close as JSIM1

DETsignal,normalClose,connecttoGND.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/08/10 2010/12/31

2008/08/10 2010/12/31

2008/08/10 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

12

3G@R2630

3G@

1

2

C2736

0.1U_0402_16V4Z

C2736

0.1U_0402_16V4Z

3G@

3G@

12

2

G

G

3G@C2496

3G@

C2496

0.1U_0402_16V4Z

0.1U_0402_16V4Z

8
7

5

20mil

3VS_WWAN_GATE

13

D

D

Q2437

Q2437
2N7002H_SOT23-3

2N7002H_SOT23-3
3G@

3G@

S

S

40mil

1

3G@C2497

3G@

2

C2497

.1U_0402_16V7K

.1U_0402_16V7K

E

U2420

3G@U2420

3G@

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

1
2
36

4

+3VS_WWAN

C2737

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

3G@C2737

3G@

Peak: 3A
120mil

C2738

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

3G@C2738

3G@

12

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

+

+

20mil

1

C2739

C2739

0.1U_0603_25V7K

0.1U_0603_25V7K
3G@

3G@

2

D2409

3G@D2409

UIM_VPP

UIM_DATA UIM_CLK

1

3G@C2741

3G@

2

56P_0402_50V8

56P_0402_50V8

C2741

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

4019BI

4019BI

4019BI

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

3G@

1

2

3

CM1293A-04SO_SOT23-6~D

CM1293A-04SO_SOT23-6~D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

UIM_RST

4

5

6

E

@

@
C2734

C2734

+UIM_PWR

39 57

39 57

39 57

A

A

A

A

B

C

D

E

No 41, for measurement

Card Reader

1 1

+3VS +3VS_CARD

1 2

R1313 0_0805_5%R1313 0_0805_5%

40 mils40 mils

+ODR_PWR

12

@

R1301

100K_0402_5%@R1301

100K_0402_5%

0.1U_0402_10V7K
1

1

2

2

1

1

2

2

C1304

0.1U_0402_10V7K

C1304

0.1U_0402_10V7K

C1303

0.1U_0402_10V7K

C1303

0.1U_0402_10V7K

C1302

10U_0603_6.3V6M

C1302

10U_0603_6.3V6M

C1301

0.1U_0402_10V7K

C1301

Close to connector

U1300

U1300

PCIE_PTX_C_DRX_P314
PCIE_PTX_C_DRX_N314

CLK_PCIE_CARD14
CLK_PCIE_CARD#14

PCIE_PRX_DTX_P314
PCIE_PRX_DTX_N314

2 2

3 3

+3VS_CARD

1

2

C1315

5PF_0402_50V8

5PF_0402_50V8

1 2

vendor suggest
for EMI

C1309

10U_0603_6.3V6M

C1309

10U_0603_6.3V6M

PCIE_PTX_C_DRX_p3
PCIE_PTX_C_DRX_N3
CLK_PCIE_CARD
CLK_PCIE_CARD#

C1300 4.7U_0603_6.3V6KC1300 4.7U_0603_6.3V6K

1 2
1 2

C1306 0.1U_0402_10V7KC1306 0.1U_0402_10V7K

1 2

C1307 0.1U_0402_10V7KC1307 0.1U_0402_10V7K

+ODR_PWR

40 mils

40 mils

C1310

0.1U_0402_10V7K

C1310

0.1U_0402_10V7K

1

2

@C1315

@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

2

SD_D1_R SD_D1
SD_D0_R SD_D0
SD_CLK_R SD_CLK

20 mils

PCIE_PRX_C_DTX_P3PCIE_PRX_DTX_P3
PCIE_PRX_C_DTX_N3PCIE_PRX_DTX_N3

20 mils

1 2

C1308 0.1U_0402_10V7KC1308 0.1U_0402_10V7K

20 mils

0.1U_0402_10V7K

0.1U_0402_10V7K

@

@
C1312

C1312

1

2

1 2

R1303 0_0402_5%R1303 0_0402_5%

1 2

R1304 0_0402_5%R1304 0_0402_5%

1 2

R1305 33_0402_1%R1305 33_0402_1%

1 2

R1306 0_0402_5%R1306 0_0402_5%

1 2

R1307 0_0402_5%R1307 0_0402_5%

C1313

C1313

SP1_SDD7_XDRDY
SP2_SDD6_XDRE#
SP3_SDD5_XDCE#
SP4_SDD4_XDWE#

DV33_18

SD_CMDSD_CMD_R
SD_D3SD_D3_R

AV12

DV12

XD_CD#

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

AV12

6

HSOP

7

HSON

8

GND

9

DV12

10

Card1_3V3

11

3V3_IN

12

Card2_3V3

13

XD_CD#

14

DV33_18

15

GND

16

SP1

17

SP2

18

SP3

19

SP4

20

SD_D1

21

SD_D0

22

SD_CLK

23

SD_CMD

24

SD_D3

RTS5209-GR_LQFP48_7X7

RTS5209-GR_LQFP48_7X7

CLK_REQ#

PERST#

GPIO/EEDI

MS_INS#

SD_CD#

DV12_S

RREF

3V3_IN

EEDO
EECS
EESK

SP15
SP14
SP13
SP12
SP11
SP10

GND

SD_D2

10 mils

RREF

48

40 mils

47

CARD_CLKREQ#

46

PLT_RST#

45
44
43
42
41
40
39

SP15_SDWP_XDD7

38

SP14_MSCLK_XDD6

37

SP13_MSD7_XDD5

36

SP12_MSD3_XDD4

35

SP11_MSD6_XDD3

34

SP10_MSD2_XDD2

33

SP9_MSD0_XDD1

32

SP9

SP8_MSD4_XDD0

31

SP8

SP7_MSD1_XDWP#

30

SP7

SP6_MSD5_XDALE

29

SP6

SP5_MSBS_XDCLE

28

SP5

DV12_S

27
26

SD_D2 SD_D2_R

25

R1300 6.2K_0603_1%R1300 6.2K_0603_1%

12

C1305 0.1U_0402_10V7KC1305 0.1U_0402_10V7K

CARD_CLKREQ# 14

PLT_RST# 5,17,41,44,46

R1302 0_0402_5%R1302 0_0402_5%

C1314 4.7U_0603_6.3V6KC1314 4.7U_0603_6.3V6K

C1316 0.1U_0402_10V7KC1316 0.1U_0402_10V7K

1 2

5IN1_LED# 42

1 2

1 2

1 2

MS_INS#
SD_CD#

R1308 0_0402_5%R1308 0_0402_5%

+3VS_CARD

12

SP14_MSCLK_XDD6_R

2

1

20 mils

C1311

C1311
5PF_0402_50V8

5PF_0402_50V8
@

@

vendor suggest
for EMI

BT Conn.

(Port 13)

JBT1

8

6

G2

7

5

G1

4
3
2
1

ACES_87213-0600G

ACES_87213-0600G

SP02000FR00

CONN@JBT1

CONN@

6
5
4
3
2
1

+BT_VCC

BT Wire Cable Note:
Pin 3, Pin 4 NC

USB20_P13 17
USB20_N13 17

+3VALW

BT@

BT@
C1317

C1317

1 2

BT@

BT@

1 2

10K_0402_5%R1310

10K_0402_5%

C1320

C1320
BT@

BT@

1 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

JREAD1

39

SP8_MSD4_XDD0
SP9_MSD0_XDD1
SP10_MSD2_XDD2
SP11_MSD6_XDD3
SP12_MSD3_XDD4
SP13_MSD7_XDD5
SP14_MSCLK_XDD6
SP15_SDWP_XDD7

SP4_SDD4_XDWE#
SP7_MSD1_XDWP#
SP6_MSD5_XDALE
XD_CD#
SP1_SDD7_XDRDY
SP2_SDD6_XDRE#
SP3_SDD5_XDCE#
SP5_MSBS_XDCLE

4 4

A

XD-VCC

31

XD10-D0

32

XD11-D1

33

XD12-D2

34

XD13-D3

35

XD14-D4

36

XD15-D5

37

XD16-D6

38

XD17-D7

28

XD07-WE

29

XD08-WP

27

XD06-ALE

22

XD01-CD

23

XD02-R/B

24

XD03-RE

25

XD04-CE

26

XD05-CLE

30

XD GND

40

XD GND

41

SD CD/WP GND

42

SD CD/WP GND

TAITW_R013-P17-HM_NR

TAITW_R013-P17-HM_NR

CONN@JREAD1

CONN@

DC021010041

SD4-VDD
MS9-VCC

SD5-CLK
SD7-DAT0
SD8-DAT1
SD9-DAT2
SD1-DAT3

SD2-CMD

SD-CD

SD-WP

SD6-VSS

SD3-VSS

MS8-SCLK

MS4-DATA0
MS3-DATA1
MS5-DATA2
MS7-DATA3

MS6-INS

MS2-BS

MS1-VSS

MS10-VSS

10/5

B

11
18

8
4
3
21
19
16
1
2

6
13

17
10
9
12
15
14
7
5
20

+ODR_PWR+ODR_PWR

SD_CLK_R
SD_D0_R
SD_D1_R
SD_D2_R
SD_D3_R
SD_CMD_R
SD_CD#
SP15_SDWP_XDD7

SP14_MSCLK_XDD6_R
SP9_MSD0_XDD1
SP7_MSD1_XDWP#
SP10_MSD2_XDD2
SP12_MSD3_XDD4
MS_INS#
SP5_MSBS_XDCLE

Reserve for EMI please close to JREAD1

@

@

1 2

R1309

R1309

33_0402_5%

33_0402_5%

Reserve for EMI
please close to JREAD1

@

@

1 2

33_0402_5%

33_0402_5%

1 2

R1312

R1312

22P_0402_50V8J

22P_0402_50V8J

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

@

@

C1323

C1323

@

@

12

C1319

C1319

22P_0402_50V8J

22P_0402_50V8J

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

BT_ON#18,39

2010/12/312008/08/10

2010/12/312008/08/10

2010/12/312008/08/10

D

0.1U_0402_16V4Z

0.1U_0402_16V4Z

BT_ON#

R1310

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

No46

2

G

G

3

S

S

Q1300

Q1300
BT@

BT@

D

D

AO3413L_SOT23-3

AO3413L_SOT23-3

1

12

C1318

C1318
BT@

BT@
1U_0603_10V4Z

1U_0603_10V4Z

W=40mils

BT@

BT@

12

C1322

0.1U_0402_16V4Z

C1322

0.1U_0402_16V4Z

13

D

D

2

G

G

S

S

E

BT@

BT@

C1321

4.7U_0805_10V4Z

C1321

4.7U_0805_10V4Z

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

+BT_VCC

R1311

R1311
300_0603_5%

300_0603_5%
BT@

BT@

Q1301

Q1301
2N7002H_SOT23-3

2N7002H_SOT23-3
BT@

BT@

40

40

40

A

A

A

57

57

57

5

+3VLP

+3VALW

D D

+3VALW_EC

+3VALW_EC

C C

B B

15P_0402_50V8J

15P_0402_50V8J

+3VALW_EC

A A

Ra

No32

Rb

C2200@

C2200@

22P_0402_50V8J

22P_0402_50V8J

12

R2208 47K_0402_5%R2208 47K_0402_5%
C2208 0.1U_0402_16V4ZC2208 0.1U_0402_16V4Z

R2205@

R2205@

33_0402_5%

33_0402_5%

12

12

12

10/1 ENE Recommand

R2209 47K_0402_5%R2209 47K_0402_5%

1 2

R2210 47K_0402_5%R2210 47K_0402_5%

1 2

R2212 10K_0402_5%R2212 10K_0402_5%

1 2

R2213 2.2K_0402_5%R2213 2.2K_0402_5%

1 2

R2214 2.2K_0402_5%R2214 2.2K_0402_5%

1 2

C2212@

C2212@

22P_0402_50V8J

22P_0402_50V8J

12

R2216@

R2216@

33_0402_5%

33_0402_5%

1 2

Reserve for EMI please close to U44

+3VS

R2218 2.2K_0402_5%R2218 2.2K_0402_5%

1 2

R2219 2.2K_0402_5%R2219 2.2K_0402_5%

1 2

R2223 10K_0402_5%R2223 10K_0402_5%

1 2

EC_XCLK1

12

C2214

C2214

R2229

R2229
100K_0402_5%

100K_0402_5%

1 2

AD_BID0

12

R2230

R2230

1

OSC

NC2NC

X2200

X2200

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

Board ID

Analog Board ID definition,
Please see page 3.

12

C2218

C2218

0.1U_0402_16V4Z

0.1U_0402_16V4Z

8.2K_0402_5%

8.2K_0402_5%

5

EC_XCLK0

4

OSC

3

EC_SMB_CK2
EC_SMB_DA2

EC_SCI#

12

C2215

C2215
15P_0402_50V8J

15P_0402_50V8J

CLK_PCI_LPC

EC_RST#

KSO1
KSO2

EC_SMI#
EC_SMB_DA1

EC_SMB_CK1

T2211@PADT2211@PAD

T2217@PADT2217@PAD

SUSCLK_R15

+3VALW_EC

Ra

Rb

KSO[0..17]42,46

R2231

R2231
100K_0402_5%

100K_0402_5%

1 2

AD_PID0

12

R2232

R2232

4

R2233

R2233

0_0805_5%

0_0805_5%

@

@

1 2

R2200

R2200

0_0805_5%

0_0805_5%

1 2

PWR_SUSP_LED42

KSI[0..7]42,46

WWAN_DET#_EC39

USB_CHARGE_2A#43

USB_CHARGE_100mA43

E51TXD_P80DATA39
E51RXD_P80CLK39

Project ID

Analog Board ID definition

C2201

0.1U_0402_16V4Z

C2201

0.1U_0402_16V4Z

12

GATEA2018

EC_KBRST#18

SERIRQ13

LPC_FRAME#13

LPC_AD313
LPC_AD213
LPC_AD113
LPC_AD013

CLK_PCI_LPC17

PLT_RST#5,17,40,44,46

EC_SCI#18

KSI[0..7]
KSO[0..17]

EC_SMB_CK148,50
EC_SMB_DA148,50
EC_SMB_CK214,22
EC_SMB_DA214,22

PM_SLP_S3#15
PM_SLP_S5#15

EC_SMI#18

MINI1_LED#39

FAN_SPEED146
PCH_PWR_EN45

ON/OFF43
NUM_LED#46

@

@

1 2

R2228

@

@

1 2

R2234 100K_0402_5%

R2234 100K_0402_5%

wait for EC define R value

12

C2219

C2219

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0_0402_5%

0_0402_5%

4

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C2202

0.1U_0402_16V4Z

C2202

0.1U_0402_16V4Z
12

12

GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_LPC
PLT_RST#
EC_RST#
EC_SCI#
PWR_SUSP_LED

KSI0
KSI1

KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#

MINI1_LED#
USB_CHARGE_2A#

USB_CHARGE_100mA
FAN_SPEED1
PCH_PWR_EN
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF

NUM_LED#

0_0402_5%R2228

0_0402_5%

C2203

C2203

12

EC_XCLK1
EC_XCLK0

C2204

0.1U_0402_16V4Z

C2204

0.1U_0402_16V4Z

+3VALW_EC

+3VALW_EC +EC_VCCA

C2205

1000P_0402_50V7K

C2205

1000P_0402_50V7K

C2206

1000P_0402_50V7K

C2206

1000P_0402_50V7K

1 2

1 2

U2200

U2200

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LPC_FRAME#/LFRAME#

5

LPC_AD3/LAD3

7

LPC_AD2/LAD2

8

LPC_AD1/LAD1

10

LPC_AD0/LAD0

12

CLK_PCI_EC/PCICLK

13

PCIRST#/GPIO05

37

EC_RST#/ECRST#

20

EC_SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/SCL0/GPIO44

78

EC_SMB_DA1/SDA0/GPIO45

79

EC_SMB_CK2/SCL1/GPIO46

80

EC_SMB_DA2/SDA1/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

SUS_PWR_DN_ACK/GPIO0D

25

INVT_PWM/PWM2/GPIO11

28

FAN_SPEED1/FANFB0/GPIO14

29

FANFB1/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLK1

123

XCLK0

KB930QF-A1_LQFP128_14X14

KB930QF-A1_LQFP128_14X14

LPC & MISC

LPC & MISC

Int. K/B

Int. K/B
Matrix

Matrix

3

L2200

L2200
FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1 2

9

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

VCC

PWM Output

PWM Output

ACOFF/FANPWM1/GPIO13

AD Input

AD Input

DA Output

DA Output

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B

SPI Device I/F

SPI Device I/F

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

GPIO

GPIO

GPO

GPO

GPI

GPI

GND

GND

GND

GND

GND

11

24

35

94

113

3

CAP_INT#/PSCLK2/GPIO4C

TP_DATA/PSDAT3/GPIO4F

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

BATT_CHG_LED#/GPIO52
BATT_LOW_LED#/GPIO54

PS2 Interface

PS2 Interface

SM Bus

SM Bus

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

C2207

C2207

0.1U_0402_16V4Z

0.1U_0402_16V4Z

ECAGND

67

AVCC

PWM0/GPIO0F

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD3/GPI3B
AD4/GPI42
AD5/GPI43

DAC_BRIG/DA0/GPO3C

EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

DA3/GPO3F

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

SDICS#/GPXIOA00

LID_SW#/GPXIOD00

SPIDI/MISO

SPIDO/MOSI

SPICLK/GPIO58

SPICS#

GPIO40

H_PECI/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

RF_OFF#/GPXIOA09

GPXIOA10
GPXIOA11

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

EAPD/GPXIOD03

EC_THERM#/GPXIOD04

SUSP#/GPXIOD05

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

V18R

AGND

69

20mil

L2201

L2201

ECAGND

FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

2009/12/01

2009/12/01

2009/12/01

3G_LED#

21

BEEP#

23

FAN_PWM

26

ACOFF

27

BATT_TEMP

63
64

ADP_I

65

AD_BID0

66

AD_PID0

75
76

DAC_BRIG

68

EC_SIM_DETECT#

70
71
72

EC_MUTE#

83

GFX_CORE_PWRGD

84

WWAN_LED#

85

H_PROCHOT#_EC

86

TP_CLK

87

TP_DATA

88

97

65W/90W#

98

HDA_SDO

99

LID_SW#

109

FRD#_R

119

FWR#_R

120

SPI_CLK_R

126

FSEL#_R

128

73

EC_PECI

74

USB_CHARGE_CB

89

BATT_AMB_LED#

90

CAPS_LED#

91

BATT_BLUE_LED#

92

PWR_LED

93

SYSON

95

VR_ON

121

EC_ACIN

127

PCH_RSMRST#

100

LID_SW_OUT#

101

EC_ON

102

EC_PME#

103

PCH_PWROK

104

BKOFF#

105

PWR_SAVE_LED#

106

WLAN_LED#

107

BATT_RED_LED#

108

PM_SLP_S4#

110

ENBKL

112

EAPD

114

SA_PGOOD

115

SUSP#

116

PBTN_OUT#

117

NV_PERFORMANCE

118

+V18R

124

12

Compal Secret Data

Compal Secret Data

Compal Secret Data

C2210 100P_0402_50V8JC2210 100P_0402_50V8J

R2220 0_0402_5%R2220 0_0402_5%

1 2

R2221 33_0402_5%R2221 33_0402_5%

1 2

R2222 33_0402_5%R2222 33_0402_5%

1 2

R2224 33_0402_5%R2224 33_0402_5%

1 2

R2225 43_0402_1%R2225 43_0402_1%

1 2

12

C2217

C2217

4.7U_0805_10V4Z

4.7U_0805_10V4Z

Deciphered Date

Deciphered Date

Deciphered Date

2

3G_LED# 42

BEEP# 46
FAN_PWM 46
ACOFF 47

12

@ PAD

@ PAD

T2202

T2202

power said: IMVP_IMON no need

DAC_BRIG 34
EC_SIM_DETECT# 39

@ PAD

@ PAD

T2203

T2203

@ PAD

@ PAD

T2204

T2204

EC_MUTE# 46

GFX_CORE_PWRGD 54

WWAN_LED# 39

TP_CLK 42
TP_DATA 42

@ PAD

@ PAD

T2210

T2210
65W/90W# 50
HDA_SDO 13
LID_SW# 43

USB_CHARGE_CB 43

BATT_AMB_LED# 42

CAPS_LED# 46

BATT_BLUE_LED# 42

PWR_LED 42

SYSON 44,45,51
VR_ON 54

PCH_RSMRST# 15
LID_SW_OUT# 14
EC_ON 43
EC_PME# 46

PCH_PWROK 15

BKOFF# 34

PWR_SAVE_LED# 46

WLAN_LED# 42

BATT_RED_LED# 42

PM_SLP_S4# 15
ENBKL 16
EAPD 46

SA_PGOOD 52
SUSP# 39,45,52,53
PBTN_OUT# 15
NV_PERFORMANCE 22

2

ECAGND
BATT_TEMP 50

ADP_I 48,50

2010/12/31

2010/12/31

2010/12/31

FRD#
FWR#
SPI_CLK
FSEL#

UIM_DET_EC 39

H_PECI 5,18

No10

EC_PME#
LID_SW#

TP_CLK
TP_DATA

EC_MUTE#
BKOFF#

R2207 200K_0402_5%R2207 200K_0402_5%

EC_ACIN

C2209 100P_0402_50V8JC2209 100P_0402_50V8J

H_PROCHOT#_ECKSI2

12

R2215

R2215
100K_0402_5%

100K_0402_5%

VR_HOT#54

1

R2235 10K_0402_5%R2235 10K_0402_5%

1 2

R2202 100K_0402_5%R2202 100K_0402_5%

R2203 4.7K_0402_5%R2203 4.7K_0402_5%

1 2

R2204 4.7K_0402_5%R2204 4.7K_0402_5%

1 2

R2201 @ 10K_0402_5%R2201 @ 10K_0402_5%
R2206 10K_0402_5%R2206 10K_0402_5%

1 2

12

D2200

D2200

12

RB751V-40_SOD323-2

RB751V-40_SOD323-2

12

+3VS

1 2

5

C2211 0.1U_0402_16V4ZC2211 0.1U_0402_16V4Z

U2201

U2201

P

2

VR_HOT#

4

Y

A

G3NC

SN74LVC1G06DCKR_SC70-5

SN74LVC1G06DCKR_SC70-5

1

R2217

R2217

0_0402_5%

0_0402_5%

12

12

No5

12

+3VALW_EC

+5VS

+3VS

+3VALW_EC

ACIN 15,45,48

H_PROCHOT# 5,50

Latest design guide suggest change UE4 to 74LVC1G06.

Colay until C test

128KB

U2202

U2202

VCC
W
HOLD
S
C
D

MX25L2005M2C-12G SOP 8P

MX25L2005M2C-12G SOP 8P

12

4

VSS

2

Q

C2216@

C2216@

100P_0402_50V8J

100P_0402_50V8J

1 2

FRD#

12

20mils

FSEL#
SPI_CLK
FWR#

SPI ROM

8
3
7
1
6
5

R2227@

R2227@

22_0402_5%

22_0402_5%

+3VALW_EC

C2213

C2213

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SA00002C100 (S IC FL 1MB MX25L1005AMC-12G SOP 8P 3.3V)

SPI_CLK

Reserve for EMI please close to U2202

No9

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

1

41

41

41

57

57

57

A

A

A

1

2

3

4

5

6

7

8

To TP/B Conn.

No11

Follow JM50

A A

B B

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

(Right)

JKB1

CONN@JKB1

(Left)

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

ACES_85201-26051

ACES_85201-26051

27

G1

28

G2

10/04 Check footprint ok

KSI[0..7]
KSO[0..17]

KSO7

C2503 100P_0402_50V8JC2503 100P_0402_50V8J

1 2

KSO6

C2505 100P_0402_50V8JC2505 100P_0402_50V8J

1 2

KSO5

C2507 100P_0402_50V8JC2507 100P_0402_50V8J

1 2

KSO4

C2509 100P_0402_50V8JC2509 100P_0402_50V8J

1 2

KSO3

C2511 100P_0402_50V8JC2511 100P_0402_50V8J

1 2

KSI4

C2513 100P_0402_50V8JC2513 100P_0402_50V8J

1 2

KSO2

C2515 100P_0402_50V8JC2515 100P_0402_50V8J

1 2

KSO1

C2517 100P_0402_50V8JC2517 100P_0402_50V8J

1 2

KSO0

C2519 100P_0402_50V8JC2519 100P_0402_50V8J

1 2

KSI5

C2521 100P_0402_50V8JC2521 100P_0402_50V8J

1 2

KSI6

C2523 100P_0402_50V8JC2523 100P_0402_50V8J

1 2

KSI7

C2525 100P_0402_50V8JC2525 100P_0402_50V8J

1 2

KSI[0..7] 41,46
KSO[0..17] 41,46

KSO16

C2499 100P_0402_50V8JC2499 100P_0402_50V8J
KSO17
KSO15
KSO14
KSO13
KSO12

KSI0
KSO11
KSO10
KSI1

KSI2
KSO9
KSI3
KSO8

1 2

C2502 100P_0402_50V8JC2502 100P_0402_50V8J

1 2

C2504 100P_0402_50V8JC2504 100P_0402_50V8J

1 2

C2506 100P_0402_50V8JC2506 100P_0402_50V8J

1 2

C2508 100P_0402_50V8JC2508 100P_0402_50V8J

1 2

C2510 100P_0402_50V8JC2510 100P_0402_50V8J

1 2

C2512 100P_0402_50V8JC2512 100P_0402_50V8J

1 2

C2514 100P_0402_50V8JC2514 100P_0402_50V8J

1 2

C2516 100P_0402_50V8JC2516 100P_0402_50V8J

1 2

C2518 100P_0402_50V8JC2518 100P_0402_50V8J

1 2

C2520 100P_0402_50V8JC2520 100P_0402_50V8J

1 2

C2522 100P_0402_50V8JC2522 100P_0402_50V8J

1 2

C2524 100P_0402_50V8JC2524 100P_0402_50V8J

1 2

C2526 100P_0402_50V8JC2526 100P_0402_50V8J

1 2

JTP1

7
8

ACES_85201-0605N

ACES_85201-0605N

SP01000LB00

LEFT_BTN#

SP01000GE00

1
2
3
4
5

6
GND
GND

TP_CLK
TP_DATA

3
4

CONN@JTP1

CONN@

1
2
3
4
5
6

5

3

6

+5VS

LEFT_BTN#
RIGHT_BTN#

2

D2410

D2410
PJSOT05C_SOT23-3

PJSOT05C_SOT23-3

1

SW2400

SW2400

1
2

EVQPLHA15_4P

EVQPLHA15_4P

+5VS

12

LEFT_BTN#

RIGHT_BTN#

ESD request

RIGHT_BTN#

C2498

C2498

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

C2500@100P_0402_50V8J

C2500@100P_0402_50V8J

2

3

1

3
4

TP_CLK 41

C2501@100P_0402_50V8J

C2501@100P_0402_50V8J

SW2401

SW2401

1
2

6

EVQPLHA15_4P

EVQPLHA15_4P

TP_DATA 41

12

D2411

D2411
PJSOT05C_SOT23-3

PJSOT05C_SOT23-3

5

Should Check LED, not the correct P/N

LED

2.2K_0402_5%

2.2K_0402_5%

3.9K_0402_5%

3.9K_0402_5%

R2543

R2543

3.9K_0402_5%

3.9K_0402_5%
1 2

HT-191NB5_BLUE

HT-191NB5_BLUE

1

C2402

C2402

0.1U_0402_16V4Z

0.1U_0402_16V4Z
@

@

2

Battery

pin1,2 LED1 short wave length, BLU
pin3,4 LED2 long wave length, AMB

LED3

R2541

R2541

1 2

R2542

R2542

1 2

HDD

LED5

LED5

B

B

4

LED3

2 1

B

B

4 3

A

A

HT-297UD5-CB5_AMBER-BLUE

HT-297UD5-CB5_AMBER-BLUE

LED4

LED4

2 1

R

R

HT-191USD5_RED

HT-191USD5_RED

MEDIA_LED#

12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BATT_RED_LED#

+3VS +3VS

4

OUT

BATT_BLUE_LED#

BATT_AMB_LED#

BATT_RED_LED# 41 PWR_LED41

@

@
R2403

5

U2401

U2401

VCC

IN1
IN2

GND

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

3

R2403
10K_0402_5%

10K_0402_5%

1 2

1
2

5

BATT_BLUE_LED# 41

BATT_AMB_LED# 41

5IN1_LED# 40
PCH_SATALED# 13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

6

Reserved

PWR_SUSP_LED41

2010/12/312008/08/10

2010/12/312008/08/10

2010/12/312008/08/10

PWR_SUSP_LED#

61

Q2432A

Q2432A
2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

2

R2546

R2546

100K_0402_5%

100K_0402_5%

1 2

PWR_LED#

34

Q2432B

Q2432B
2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

5

R2547

R2547

100K_0402_5%

100K_0402_5%

1 2

10/2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019BI

4019BI

4019BI

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

42 57

42 57

42 57

8

A

A

A

3G/Wireless LED

+3VS

R2459

R2459

2.2K_0402_5%

2.2K_0402_5%
1 2

R2460

R2460

3.9K_0402_5%

3.9K_0402_5%

C C

1 2

LED1

LED1

2 1

B

B

4 3

A

A

HT-297UD5-CB5_AMBER-BLUE

HT-297UD5-CB5_AMBER-BLUE

3G_LED#

WLAN_LED#

3G_LED# 41

WLAN_LED# 41

Top View LED with Blue/Amber/Red Color

+3VALW

Power

PWR_LED#46

+3VALW

R2462

R2462

2.2K_0402_5%

2.2K_0402_5%
1 2

R2463

R2463

3.9K_0402_5%

3.9K_0402_5%
1 2

D D

LED Status

NEW70/80/90

1

LED2

LED2

2 1

B

B

4 3

A

A

HT-297UD5-CB5_AMBER-BLUE

HT-297UD5-CB5_AMBER-BLUE

PWR_LED#

PWR_SUSP_LED#

Power/SUS Battery 3G/WLAN
ON SUS ChargeFull WLAN3G

Blue Amber

Blue Amber Blue Amber

2

BlueTooth

ACIN

+3VS

1 2

R2540 100_0402_1%R2540 100_0402_1%

3

A

USB Host Charger

R2536

R2536
10K_0402_5%

10K_0402_5%

USB_CHARGE_CB41

U2DN1_L44

+USB3_VCCA

1 1

R2626 0_0402_5%R2626 0_0402_5%
R2627 0_0402_5%

R2627 0_0402_5%

VL

CB=0

U2DP1_L44

1 2

@

@

1 2

Auto detection charger identification active

1 2
U2DN1_L
U2DP1_L

1

C2609

C2609

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CB=1 Connect DP/DM to TDP/TDM

Stuff diodes to gate backflow from EC or PPON1.

No4

USB_CHARGE_2A#41

2 2

No43

USB_CHARGE_100MA41

D2435

D2435

1SS355_SOD323-2

1SS355_SOD323-2

No36

1U_0603_10V4Z

1U_0603_10V4Z

R2618

R2618
10K_0402_5%

10K_0402_5%

12

C2731

C2731

12

@

@

1 2

@

@

TPS22945 : SA000031000

U2414

U2414

8

CB

7

TDM

6

TDP

5

VCC

MAX14566EETA+_TDFN-EP8_2X2

MAX14566EETA+_TDFN-EP8_2X2

CEN

GND
GND

1
2

DM

3

DP

4
9

U37 EN# active at S0, S5(AC) and S5(DC)

EN#

S0

ACTIVE

S5(AC)

ACTIVE

S5(DC)

OFF

+5VALW

C2601

C2601

.1U_0402_16V7K

.1U_0402_16V7K

1 2

R2530

R2530

1 2

10K_0402_5%

10K_0402_5%

12

R2640

R2640
10K_0402_5%

10K_0402_5%

VL

TPS22945DCKR_SC70-5

TPS22945DCKR_SC70-5

+USB3_VCCA

U2419

U2419

VOUT

5

VIN

GND

4

OC

ON

@

@

1
2
3

B

SW_U2DN1_L
SW_U2DP1_L

USB_CHARGE_2A# PPON1

U2411

U2411

1

GND

2

VIN
VIN3VOUT

4

EN

Oper Drain, Low Active, need PU

LOW LOW
LOW

8

VOUT

7

VOUT

6
5

FLG

EPAD

AP2301MPG-13_MSOP8

AP2301MPG-13_MSOP8

9

LOW
LOWHIGH

+USB3_VCCA

W=60mils

R2514

R2514

10K_0402_5%

10K_0402_5%

1 2

AC Mode (Adapter In)
Signal Name S0 S3 S5
USB_CHARGE_CB 1 0 0
USB_CHARGE_2A# 0 0 0

DC Mode (Battery >30%)
Signal Name S0 S3 S5
USB_CHARGE_CB 1 0 0
USB_CHARGE_2A# 0 0 0

DC Mode (Battery <30%)
Signal Name S0 S3 S5
USB_CHARGE_CB 1 0 0
USB_CHARGE_2A# 0 1 1

OCI1B 44

C

D2402

D2402

6

I/O4

+USB3_VCCA

U3TXDN1_L44

U3TXDP1_L44

U3RXDN1_L44

U3RXDP1_L44

5

REF2

4

I/O3

PJUSB208H_SOT23-6

PJUSB208H_SOT23-6

L2404

SW_U2DN1_L

SW_U2DP1_L

U3TXDN1_L

U3TXDP1_L

U3RXDN1_L

U3RXDP1_L

U3RXDN1 U3RXDN1
U3RXDP1 U3RXDP1
U3TXDN1 U3TXDN1
U3TXDP1 U3TXDP1

L2404

3

3

2

2

WCM-2012-670T_4P

WCM-2012-670T_4P

L2402

L2402

3 4

OCE2012120YZF_4P

OCE2012120YZF_4P
L2403

L2403

3 4

OCE2012120YZF_4P

OCE2012120YZF_4P

D2416

D2416

1

1

1

2

2

2

4

4

4
5

3

3

3

8

8

YSCLAMP0524P_SLP2510P8-10-9

YSCLAMP0524P_SLP2510P8-10-9

REF1

U2DN1U2DP1

1

I/O1

2
3

I/O2

U2DN1

4

4

U2DP1

1

1

U3TXDN1

12

U3TXDP1

U3RXDN1

12

U3RXDP1

10/5

10

10

9

9

9

8

7

7

7

65

65

6

No16

D

+USB3_VCCA

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

12

+

+

C2595

C2595

10U_0805_6.3V6M

10U_0805_6.3V6M

C2597

C2597

1 2

USB3.0 Connector

+USB3_VCCA

No18

JUSB3

JUSB3

1
U2DN1
U2DP1

U3RXDN1
U3RXDP1

U3TXDN1
U3TXDP1

VBUS

2

D-

3

D+

4

GND

5

SSRX-

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

OCTEK_USB-09EAEB

OCTEK_USB-09EAEB

DC233008O00

GND
GND
GND
GND

For customer request

GND_Frame
10
11
12
13

1 2

R2522 0_0603_5%R2522 0_0603_5%

1 2

R2524 0_0603_5%R2524 0_0603_5%

1 2

C2602

C2602

.1U_0402_16V7K

.1U_0402_16V7K

E

USB_CHARGE_CB Switch Control Bit, 0:Autio Detection, 1:Pass-through
USB_CHARGE_2A# Enable 2A USB Power Switch (Low active)

3 3

Power Button

+3VALW

+3VALW_EC

No17

Lid Switch

(Hall Effect Switch)

R2466

R2466
100K_0402_5%

100K_0402_5%

@

@

1 2

D2434

D2434

ON/OFFBTN#46

4 4

ON/OFFBTN#

BAV70W_SOT323-3

BAV70W_SOT323-3

EC_ON41

A

EC_ON

R2470

R2470

10K_0402_5%

10K_0402_5%

2

1

1 2

2

G

G

3

13

D

D

S

S

51ON#

Q2404

Q2404
2N7002H_SOT23-3

2N7002H_SOT23-3

R2467

R2467
100K_0402_5%

100K_0402_5%

1 2

ON/OFF 41

51ON# 47

B

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VALW

U2402

U2402

VDD2VOUT

APX9131AAI-TRG_SOT23-3

APX9131AAI-TRG_SOT23-3

2

C2401

C2401

1

Anpec p/n:SA00003B900

Compal Secret Data

Compal Secret Data

Compal Secret Data

GND

1

Deciphered Date

Deciphered Date

Deciphered Date

12

R2402 47K_0402_5%R2402 47K_0402_5%

3

1

2

D

D2401

D2401

1 2

RB751V-40_SOD323-2

RB751V-40_SOD323-2

C2400

C2400
10P_0402_50V8J

10P_0402_50V8J

2010/12/312008/08/10

2010/12/312008/08/10

2010/12/312008/08/10

LID_SW#

LID_SW# 41

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

E

43 57

43 57

43 57

A

A

A

5

+1.5V+5VALW +1.05V_USB3

1U_0603_10V6K

1U_0603_10V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

C2570

C2570

C2571

C2571

12

12

+5VALW

Vout=0.8(1+10K/32.4K)

1.042 ~ 1.0469 ~ 1.0519V
Spec: 0.9975 ~ 1.05 ~ 1.1025

D D

+3VALW to +3V Transfer

SYSON41,45,51

No3
No21

SMIB (P4) unused pin

C C

connected to GND.

USB30_CLKREQ#14

+3V_USB3

B B

R2529

10K_0402_5%

R2529

10K_0402_5%

1 2

SPI_CLK_USB
USB_SO_SPI_SI

12P_0402_50V8J

12P_0402_50V8J

A A

No29

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

+3V_USB3

12

C2604

C2604
.1U_0402_16V7K

.1U_0402_16V7K

8
7
6
5

MX25L5121EMC-20G_SO8

MX25L5121EMC-20G_SO8

100_0402_5%

100_0402_5%

1 2

24MHZ_12PF_X5H024000DC1H

24MHZ_12PF_X5H024000DC1H

12

C2607

C2607

+1.5V to +1.05V Transfer

+5VALW

U2408

+1.5V

R2510 5.1K_0402_1%R2510 5.1K_0402_1%

+3VALW +3V_USB3

SYSON

PCIE_PRX_DTX_P414
PCIE_PRX_DTX_N414

PCIE_PTX_C_DRX_P414
PCIE_PTX_C_DRX_N414

Q2427

Q2427

S

S

10K_0402_5%

10K_0402_5%

U2412

U2412

VCC
NC
SCLK
SI

12

R2535

R2535

Y2400

Y2400

12

U2408

6

VCNTL

5

VIN

9

VIN

SYSON

8

EN

7

12

POK

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

U2409

U2409

3

2

RT9701-PB_SOT23-5

RT9701-PB_SOT23-5

+3V_USB3

+3VS

G

G

R2527

R2527

CS#

SO
WP#
GND

C2608

C2608
12P_0402_50V8J

12P_0402_50V8J

1

VOUT

VIN

5

VIN/CE4VOUT
GND

C2598 .1U_0402_16V7KC2598 .1U_0402_16V7K
C2599 .1U_0402_16V7KC2599 .1U_0402_16V7K

PLT_RST#5,17,40,41,46

PCH_PCIE_WAKE#15,39,46

+3V_USB3
+3V_USB3

SMI
SMI#

R2523 10K_0402_5%R2523 10K_0402_5%

+3V_USB3

R2525

R2525
10K_0402_5%

10K_0402_5%

1 2

CLKREQ_USB3

123

D

D

CLK_48M_USB3_PCH14

+3V_USB3

R2528@

R2528@

47K_0402_5%

47K_0402_5%

1 2

1 2

SPI_CS_USB#

1

USB_SI_SPI_SO

2
3
4

USB3_XT1
USB3_XT2

Place as close as
possibile to
U2410.N14 and U2410.M14

VOUT
VOUT

GND

1

1 2
1 2

1 2
1 2

1SS355_SOD323-2

1SS355_SOD323-2

3
4

2

1 2

FB

12

R2512

R2512

32.4K_0402_1%

32.4K_0402_1%

CLK_PCIE_USB3014
CLK_PCIE_USB30#14

R2515 0_0402_5%R2515 0_0402_5%

1 2

R2516 0_0402_5%R2516 0_0402_5%

1 2

R2519 10K_0402_1%R2519 10K_0402_1%

1 2

R2520@ 100_0402_1%R2520@ 100_0402_1%

1 2

R2521 10K_0402_5%R2521 10K_0402_5%

1 2

R26370_0402_5% R26370_0402_5%

1 2

R26380_0402_5%@R26380_0402_5%

1 2

R26390_0402_5%@R26390_0402_5%

1 2

D2417

D2417

No36

12

+3V_USB3

R2511

R2511

10K_0402_1%

10K_0402_1%

PCIE_PRX_C_DTX_P4
PCIE_PRX_C_DTX_N4

CLKREQ_USB3

@
@

SPI_CLK_USB

1U_0603_10V6K

1U_0603_10V6K

SPI_CS_USB#

C2603

C2603

USB_SO_SPI_SI
USB_SI_SPI_SO

R2538

R2538

12

0_0402_5%

0_0402_5%

@

@

R2532

R2532

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

@

@

1 2

1 2

USB3_XT1
USB3_XT2

R2533

R2533

12

10U_0603_6.3V6M

10U_0603_6.3V6M

C2593

C2593

SMI_R
SMIB_R

4

Close to U2410.D7 Close to U2410.P13

+3VA_USB3 +3VA_USB3

C2587

.1U_0402_16V7K

C2587

M14

K13
K14

J13

C14

N14

A11
A13
A14

B11
B13
B14

C10
C11

U2410

U2410

B2
B1

D2
D1

F2
F1

H2
K1
K2

J2

J1
H1
P4

P5

M2
N2
N1
M1

P6

A1
A2
A3
A4
A5
A7
A9

B3
B4
B5
B7
B9

C1
C2
C3

+3V_USB3

PECLKP
PECLKN

PETXP
PETXN

PERXP
PERXN

PERSTB
PEWAKEB
PECREQB

AUXDET
PSEL
SMI
SMIB

PONRSTB

SPISCK
SPISCB
SPISI
SPISO

GND
GND
GND

GND

XT1
XT2

CSEL

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

.1U_0402_16V7K

12

D10

F13

VDD33

VDD33

GND

GND

C12

C13

8P_0402_50V8D

8P_0402_50V8D

C2588

0.01U_0402_16V7K

C2588

0.01U_0402_16V7K

@

@

C2589

C2589

12

12

0_0805_5%

0_0805_5%

+1.05V_USB3

F14

VDD33

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

PCI Express/ExpressCard select signal
1:others
0:Express Card or Mini card

GNDD3GNDD4GND

D11

D12

1 2

L10

L13

L14

VDD33

VDD33

GND

GND

GND

GNDE1GNDE2GND

GND

GNDF4GNDF6GNDF7GNDF8GNDF9GND

E13

E14

D13

D14

.1U_0402_16V7K

.1U_0402_16V7K

12

R2513

R2513

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

F11

F12

8P_0402_50V8D

8P_0402_50V8D

C2590

C2590

C2591

0.01U_0402_16V7K

C2591

0.01U_0402_16V7K

@

@

C2592

C2592

12

12

Can be attach to EC, either.

As short as possible

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

GND

GND

G9

G13

G11

G12

GNDH6GND

C2573 0.01U_0402_16V7KC2573 0.01U_0402_16V7K

C2572 0.01U_0402_16V7KC2572 0.01U_0402_16V7K

12

7K for customer request, can use other kind
of capacitor, like Y5V.

+1.05VR +3VA_USB3

E11

E12

VDD10

GNDH7GNDH8GNDH9GND

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

H12

PCB footprint change: UPD720200F1-XXX-A_FBGA_176P-NH

From JM50: P/N change to SA000048H10
10/29 From JM40: P/N change to SA000048H00

C2574 0.01U_0402_16V7KC2574 0.01U_0402_16V7K

C2575 0.01U_0402_16V7KC2575 0.01U_0402_16V7K

12

12

VDD10H3VDD10H4VDD10L5VDD10

GND

J11

J12

3

C2577 .1U_0402_16V7KC2577 .1U_0402_16V7K

C2576 0.01U_0402_16V7KC2576 0.01U_0402_16V7K

12

12

12

H11

K11

K12

L8

D7

VDD10

VDD10

VDD10

U3AVDO33
U3TXDP2
U3TXDN2

U2DM2
U2DP2

U3RXDP2
U3RXDN2

OCI2B
OCI1B

PPON2
PPON1

U3TXDP1
U3TXDN1

U2DM1
U2DP1

U3RXDP1
U3RXDN1

GNDK3GNDK4GNDL1GNDL2GNDL3GND

L4

UPD720200AF1-DAP-A_FBGA176

UPD720200AF1-DAP-A_FBGA176

+1.05VR+3V_USB3

C2580 0.01U_0402_16V7KC2580 0.01U_0402_16V7K

C2581 0.01U_0402_16V7KC2581 0.01U_0402_16V7K

C2578 0.01U_0402_16V7KC2578 0.01U_0402_16V7K

C2579 0.01U_0402_16V7KC2579 0.01U_0402_16V7K

12

12

12

+3V_USB3

L2405

L2405

BLM18AG601SN1D_2P

BLM18AG601SN1D_2P

1 2

P13

10U_0805_6.3V6M

10U_0805_6.3V6M

U2AVDD10

B6

Exchange port2 and port1 for vendor's suggestion,
port2 may affect test issue.

A6
N8

P8
B8

A8

OCI2B

G14

OCI1B

H13

H14
J14

U3TX_C_DP1

B10

U3TX_C_DN1

A10

U2DN1_L

N10

U2DP1_L

P10

U3RXDP1_L

B12

U3RXDN1_L

A12

1.6K_0402_1%

1.6K_0402_1%

P12

RREF

N12

GND

N11

GND

D6

GND

P14

GND

P11

GND

P9

GND

P7

GND

P2

GND

P1

GND

N13

GND

N9

GND

N7

GND

N3

GND

M13

GND

M12

GND

M11

GND

M10

GND

M9

GND

M8

GND

M7

GND

M6

GND

M5

GND

M4

GND

M3

GND

L12

GND

L11

GND

L7

GND

L6

GND

C2585 .1U_0402_16V7KC2585 .1U_0402_16V7K

C2582 0.01U_0402_16V7KC2582 0.01U_0402_16V7K

C2583 0.01U_0402_16V7KC2583 0.01U_0402_16V7K12C2584 .1U_0402_16V7KC2584 .1U_0402_16V7K

C2586 .1U_0402_16V7KC2586 .1U_0402_16V7K

12

No4

1 2

12

12

12

12

+3VA_USB3

12

C2594

C2594

R2517 10K_0402_5%R2517 10K_0402_5%

1 2

R2518 10K_0402_5%R2518 10K_0402_5%

1 2

OCI1B 43

C2596 .1U_0402_16V7KC2596 .1U_0402_16V7K

U3TXDP1_L

1 2

U3TXDN1_L

1 2

C2600 .1U_0402_16V7KC2600 .1U_0402_16V7K

U3RXDP1_L 43
U3RXDN1_L 43

R2526

R2526

+3V_USB3

U3TXDP1_L 43
U3TXDN1_L 43

U2DN1_L 43
U2DP1_L 43

No23
No29

SMI

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

10K_0402_5%

10K_0402_5%

SMI#

2

+3V_USB3

R2643

R2643

@

@

Q2419B

Q2419B

5

+3V_USB3

2

1 2

Q2419A

Q2419A

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

1

34

61

SMIB 18

Pin compare table for support USB remote wakeup or not

Support USB
remote
wakeup
Not support USB
remote wakeup

AUXDET(Pin J2)

pull high
10k to
VDD33
Tied to GND

5

CSEL(Pin P6)

Tied to GND

pull high
to
VDD33

CLK

Must use 24MHz crystal: mount
Y1,R19,C40,C41

Can use either 48MHz or 24MHz When
use 48MHz clock: mount R22,R25

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1

of

44 57Tuesday, December 14, 2010

of

44 57Tuesday, December 14, 2010

of

44 57Tuesday, December 14, 2010

A

A

A

A

+5VALW TO +5VS

+5VALW

U2404

U2404
SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

8
7
6
5

C2541

10U_0805_10V4Z

C2541

10U_0805_10V4Z

C2540

10U_0805_10V4Z

C2540

10U_0805_10V4Z

12

12

1 1

20mil 10mil

+VSB

No45

R2485

R2485
100K_0402_5%

100K_0402_5%

Q2407B

Q2407B

SUSP

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

4

5VS_GATE

12

34

5

1
2
3

+5VS

10U_0805_10V4Z

10U_0805_10V4Z

12

12

C2545

C2545

0.1U_0603_25V7K

0.1U_0603_25V7K

C2538

C2538

C2539

1U_0603_10V4Z

C2539

1U_0603_10V4Z

12

R2481

R2481

470_0603_5%

470_0603_5%

1 2
61

Q2407A

Q2407A

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

+3VALW TO +3VS

+3VALW

U2406

U2406
SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

8

10U_0805_10V4Z

10U_0805_10V4Z

12

C2548

10U_0805_10V4Z

C2548

10U_0805_10V4Z

12

R2490

R2490

200K_0402_5%

200K_0402_5%

SUSP

C2556

C2556

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

No45

Q2410B

Q2410B

C2557

C2557

7
6
5

12

5

C2558

0.1U_0402_16V4Z

C2558

0.1U_0402_16V4Z

12

4

10mil

3VS_GATE

34

+1.5V to +1.5VS

+1.5V

8
7
6
5

C2547

10U_0805_10V4Z

C2547

10U_0805_10V4Z

12

20mil

2 2

+VSB

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

1211 EMI ADD 0.1U close PJ5

C2555

10U_0805_10V4Z

C2555

10U_0805_10V4Z

12

No45

20mil 10mil

3 3

+0.75VS

4 4

2009/08/14
CP_S3PowerReduction
WhitePaper_Rev0.9

0.75VS speed up discharge

12

13

D

D

S

S

+VSB

R2500

R2500
22_0603_5%

22_0603_5%

2

G

2N7002H_SOT23-3

G

2N7002H_SOT23-3

Q59

Q59

A

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

R2496

R2496
750K_0402_5%

750K_0402_5%

SUSP

ACIN15,41,48

+1.05VS_VCCP

1 2
13

D

D

S

S

12

Q2413B

Q2413B

5

ACIN

R2501

R2501
470_0603_5%

470_0603_5%

2

G

2N7002H_SOT23-3

G

2N7002H_SOT23-3

Q60

Q60

+3VS

1
2
3

AO4430L_SO8

AO4430L_SO8

34

10U_0805_10V4Z

10U_0805_10V4Z

12

12

C2551

C2551

0.1U_0603_25V7K

0.1U_0603_25V7K

U2407

U2407

1
2
3

4

1.5VS_GATE

12

R2499@510K_0402_5%

R2499@510K_0402_5%

13

D

D

Q2417

Q2417

2

G

2N7002H_SOT23-3

G

2N7002H_SOT23-3
@

@

S

S

+1.8VS +1.5V

R2502

R2502
470_0603_5%

470_0603_5%

1 2
13

D

D

S

S

C2549

C2549

C2550

1U_0603_10V4Z

C2550

1U_0603_10V4Z

12

+1.5VS

C2553

10U_0805_10V4Z

C2553

10U_0805_10V4Z

12

12

C2562

C2562

0.1U_0603_25V7K

0.1U_0603_25V7K

SUSPSUSP SUSP SYSON#

2

G

2N7002H_SOT23-3

G

2N7002H_SOT23-3

Q61

Q61

SUSP

2

R2489

R2489
470_0603_5%

470_0603_5%

1 2
61

Q2410A

Q2410A

SUSP

2

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

C2554

1U_0603_10V4Z

C2554

1U_0603_10V4Z

12

470_0603_5%

470_0603_5%

1 2
13

D

D

S

S

B

R2494

R2494
470_0603_5%

470_0603_5%

1 2
61

Q2413A

Q2413A

2

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

R2503@

R2503@

2

G

2N7002H_SOT23-3

G

2N7002H_SOT23-3

Q62

Q62
@

@

B

C2544

C2544

10U_0805_10V4Z

10U_0805_10V4Z

20mil 10mil

R2486 200K_0402_5%R2486 200K_0402_5%

+VSB

PCH_PWR_EN#

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

10/5, follow JM50

SUSP

C

MOS needed!

+3VALW TO +3VALW(PCH AUX Power)

Short J5 for PCH VCCSUS3.3

+3VALW

J2400 @

12

Q2408B

Q2408B

J2400 @

112

JUMP_43X79

JUMP_43X79

U2405

U2405
SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

8
7
6
5

12

34

5

2

4

3V_GATE

1
2
3

+3VALW_PCH

12

12

C2546

C2546

0.1U_0603_25V7K

0.1U_0603_25V7K

40mil

10U_0805_10V4Z

10U_0805_10V4Z

C2543

1U_0603_10V4Z

C2543

1U_0603_10V4Z

C2542

C2542

12

1 2
61

+1.05VS_VCCP to +1.05VSDGPU for GPU

Q2415

Q2415
AO4430L_SO8

AO4430L_SO8

8
7
6
5

OPT@

OPT@

12

5

ACIN

OPT@

OPT@

R2623

R2623

1K_0402_5%

1K_0402_5%

1 2

No39

4

1.05VSDGPU_GATE

34

2

G

G

100K_0402_5%

100K_0402_5%

OPT@

OPT@
C2560

C2560

C

+1.05VS_DGPU

1
2

12

3

510K_0402_5%

510K_0402_5%

12

12

@

@

C2733

C2733

R2493

R2493

OPT@

OPT@

0.1U_0603_25V7K

0.1U_0603_25V7K

13

D

D

Q2434

Q2434
2N7002H_SOT23-3

2N7002H_SOT23-3
@

@

S

S

OPT@

OPT@
C2552

C2552

10U_0805_10V4Z

10U_0805_10V4Z

+3VALW

12

OPT@

OPT@
R2624

R2624

34

OPT@

OPT@

Q2414B

Q2414B
2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

5

12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.05VS_VCCP

12

OPT@

OPT@
C2565

C2565

10U_0805_10V4Z

10U_0805_10V4Z

R2497OPT@

VGA_ON

510K_0402_5%

510K_0402_5%

VGA_ON#

OPT@

OPT@

Q2416B

Q2416B

R2497OPT@

0.1U_0603_25V7K

0.1U_0603_25V7K

20mil 10mil

+VSB

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

R2482

R2482

470_0603_5%

470_0603_5%

Q2408A

Q2408A

PCH_PWR_EN#

2

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

4A

OPT@

OPT@

C2732

10U_0805_10V4Z

C2732

10U_0805_10V4Z

12

OPT@

OPT@

1U_0603_10V4Z

1U_0603_10V4Z

+3VS

12

OPT@

OPT@

1 2

R2495

R2495

1K_0402_5%

1K_0402_5%

C2563

C2563

1 2
61

R2621

R2621

0_0805_5%

0_0805_5%

1 2

AO3413L_SOT23-3

AO3413L_SOT23-3

R2498

R2498
470_0603_5%

470_0603_5%
OPT@

OPT@

VGA_ON#

2

OPT@

OPT@

Q2416A

Q2416A
2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

+3VSDGPU

@

@

Q2412OPT@

Q2412OPT@

123

DGS

DGS

3VSdelay_gate

OPT@

OPT@

12

C2561

C2561

0.1U_0603_25V7K

0.1U_0603_25V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

D

SYSON#37,46

SYSON41,44,51

100K_0402_5%

100K_0402_5%

PCH_PWR_EN#20,46

100mil(1.5A)

12

OPT@

OPT@
C2559

C2559
10U_0805_10V4Z

10U_0805_10V4Z

OPT@

OPT@

Q2414A

Q2414A

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

Deciphered Date

Deciphered Date

Deciphered Date

D

SYSON#

SYSON

5

12

R2484

R2484

PCH_PWR_EN41

R2488

R2488

100K_0402_5%

100K_0402_5%

12

OPT@

OPT@
C2568

C2568

10U_0805_10V4Z

10U_0805_10V4Z

20mil 10mil

+VSB

R2505

R2505

OPT@ 510K_0402_5%

OPT@ 510K_0402_5%

VGA_ON#

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

OPT@

OPT@
R2622

R2622
470_0603_5%

470_0603_5%

1 2
61

3VSdelay_gate

2

2010/12/312008/08/10

2010/12/312008/08/10

2010/12/312008/08/10

E

+5VALW

R2480

R2480
100K_0402_5%

100K_0402_5%

1 2

34

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6
Q2406B

Q2406B

+5VALW

R2487

R2487

100K_0402_5%

100K_0402_5%

+1.5V

OPT@

OPT@

Q2423B

Q2423B

12

1 2

13

D

D

Q2409

Q2409

2

G

G

2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

Q2418

Q2418
AO4430L_SO8

AO4430L_SO8

8
7
6
5

OPT@

OPT@

4

1.5VSDGPU_GATE

12

5

ACIN

12

34

@

@

13

2

G

G

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

PCH_PWR_EN#

+1.5V to +1.5VSDGPU for GPU

SUSP5,53

SUSP#39,41,52,53

R2483

R2483

10K_0402_5%

10K_0402_5%

+VRAM_1.5VS

1
2

12

OPT@

12

C2569

C2569
OPT@

OPT@

0.1U_0603_25V7K

0.1U_0603_25V7K

OPT@

10U_0805_10V4Z

10U_0805_10V4Z

C2567

C2567

3

510K_0402_5%

510K_0402_5%

R2509

R2509

D

D

Q2426

Q2426
2N7002H_SOT23-3

2N7002H_SOT23-3
@

@

S

S

2009/08/17 add VGA_ON#

VGA_ON14,17,55

R2619

R2619

22K_0402_5%

22K_0402_5%

OPT@

OPT@

OPT@ R2507

OPT@

VGA_ON#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

VGA_ON#

470_0805_5%

470_0805_5%

E

+5VALW

SUSP

2

12

12

OPT@

OPT@

C2566

1U_0603_10V4Z

C2566

1U_0603_10V4Z

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

+5VALW

1 2

13

D

D

2

G

G

12

S

S

+VGA_CORE

R2507

1 2

13

D

D

2

G

G

S

S

R2479

R2479
100K_0402_5%

100K_0402_5%

1 2

61

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6
Q2406A

Q2406A

R2504

R2504
470_0603_5%

470_0603_5%
OPT@

OPT@

1 2
61

VGA_ON#

2

OPT@

OPT@

Q2423A

Q2423A

OPT@

OPT@
R2620

R2620
100K_0402_5%

100K_0402_5%

Q2433

Q2433
2N7002H_SOT23-3

2N7002H_SOT23-3
OPT@

OPT@

Q2425

Q2425
2N7002H_SOT23-3

2N7002H_SOT23-3
OPT@

OPT@

A

A

A

5745

5745

5745

A

For USB 20 small board

USB2.0+Audio codec + Jack conn

+5VS

+3VS

BEEP#41
HDA_SPKR13
EC_MUTE#41

1 1

HDA_RST#_AUDIO13

HDA_SDIN013

HDA_SDOUT_AUDIO13

HDA_SYNC_AUDIO13

HDA_BITCLK_AUDIO13

+5VALW

SPKL+
SPKL­SPKR+
SPKR-

SYSON#37,45
USB_OC0#17
USB20_N017
USB20_P017

EAPD41

DMIC_DATA34
DMIC_CLK34

JUSBF1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

GND1

30

GND2

ACES_85201-2805

ACES_85201-2805

CONN@JUSBF1

CONN@

SP01000GO00

No12

For LAN small board

12

A

LAN conn

JLAN1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19
GND21GND

ACES_87242-2001-09

ACES_87242-2001-09

SP02000OH00

+3VALW

CONN@JLAN1

CONN@

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

PWR_LED# 42
ON/OFFBTN# 43

ON/OFFBTN#

PWR_LED#

CLK_PCIE_LAN 14
CLK_PCIE_LAN# 14

LAN_CLKREQ# 14

NUM_LED# 41

CAPS_LED# 41

PWR_SAVE_LED# 41

KSO0 41,42

KSI1 41,42

ESD request 10/5

D2413

D2413

2

1

3

PJSOT24CH_SOT23-3

PJSOT24CH_SOT23-3

2 2

3 3

+3VALW +3V_LAN

No42

AO3413L_SOT23-3

AO3413L_SOT23-3

PCH_PWR_EN#20,45

PCIE_PRX_DTX_P114

PCIE_PRX_DTX_N114
PCIE_PTX_C_DRX_P114
PCIE_PTX_C_DRX_N114

PCH_PCIE_WAKE#15,39,44

Q2439

Q2439

KSI1

R2406

R2406
0_1206_5%

0_1206_5%

+3VS

EC_PME#41

PLT_RST#5,17,40,41,44

KSO0

PWR SAVE BTN#

@

@

123

DGS

DGS

PWR board

JPWR1

CONN@JPWR1

CONN@

1

1

2

2

3

3

4

4

5

GND

6

GND

ACES_88514-0401

ACES_88514-0401

4 4

SP01000R400

check:
PWR indicator is the same as PWR_LED?

B

L2408

C2403

C2403

1 2

1000P_0402_50V7K

1000P_0402_50V7K

@

@
C2404

C2404

1 2

1000P_0402_50V7K

1000P_0402_50V7K

@

@

No37
No44

ESD request

L2408

1 2

BLM18PG300SN1D_2P@

BLM18PG300SN1D_2P@

L2409

L2409

1 2

BLM18PG300SN1D_2P@

BLM18PG300SN1D_2P@

DMIC_CLK

DMIC_DATA

Int. Speaker Conn.

C1137

C1137

1

1000P_0402_50V7K

SPKL+

R1122 0_0805_5%R1122 0_0805_5%

1 2

SPKL-

R1124 0_0805_5%R1124 0_0805_5%

1 2

20mil

D1103 & D1104 please close to
JSPK1 & JSPK2 ,respectively

SPKR+ SPK_R+

R1130 0_0805_5%R1130 0_0805_5%

1 2

SPKR-

R1131 0_0805_5%R1131 0_0805_5%

1 2

20mil

H2415@H2415

H2416@H2416

@

1

@

1

1000P_0402_50V7K

2
1

C1134

C1134
1000P_0402_50V7K

1000P_0402_50V7K

2

D1103

D1103

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

C1138

C1138
1000P_0402_50V7K

1000P_0402_50V7K
2
1

C1141

C1141

1000P_0402_50V7K

1000P_0402_50V7K
2

D1104

D1104

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

H2417@H2417

@

1

1

2

1

2

3

2

1

1

2

1

2

3

2

1

Capacitors C1130-C1133 are only needed if
speaker connector is physically far from audio
codec. When in doubt, it's always a good
idea to have population option. Place them
close to speaker connector.

3P3 * 4

BUTTON

Battery Indicator BTN

SW2402

SW2402

MPTCFG-T-Q-T-R_2P

MPTCFG-T-Q-T-R_2P

KSO0

3

5

SN100001D10

KSO0

KSI1 PWR SAVE button
KSI2 Battery ID BTN#

check: PWR_SAVE# and BAT_STAT use keyboard matrix

B

No7

4

KSI2

21

6

C

ZZZ1

ZZZ1

PCB-MB

PCB-MB

FM1FM1

1

@

@

C1130

C1130
47P_0402_50V8J

47P_0402_50V8J

SPK_L+
SPK_L-

@

@

C1133

C1133
47P_0402_50V8J

47P_0402_50V8J

FM2FM2

1

Left Side

JSPK1
1
2

3
4

ACES_88266-02001

ACES_88266-02001

FAN1 Conn

+5VS

FM3FM3

FM4FM4

1

1

CONN@JSPK1

CONN@

1
2

G1
G2

FAN_SPEED141

0_0603_5%

0_0603_5%

1 2

C2722

C2722
10U_0805_10V4Z

10U_0805_10V4Z

1 2

R2476

R2476

D

SP020008Y00

Right Side

@

@

C1131

C1131
47P_0402_50V8J

47P_0402_50V8J

SPK_R-

@

@

C1132

C1132
47P_0402_50V8J

47P_0402_50V8J

JSPK2

CONN@JSPK2

CONN@

1

1

2

2

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001

2P8 * 11

H2400@H2400

@

1

H2401@H2401

H2402@H2402

@

@

1

1

SP020008Y00

H2412@H2412

H2411@H2411

@

1

H2423@H2423

H2422@H2422

@

@

1

1

No19
No27
No35
No38

KSI2 41,42

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/1/15

2007/1/15

2007/1/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

H2413@H2413

@

1

1

Reset key (shut down)

press: low pulse --> shut down --> need user to press power button to turn on

MAINPWON49,50

3V5V EN49

Deciphered Date

Deciphered Date

Deciphered Date

D

+5VS

12

No36

D2427

D2427
1SS355_SOD323-2

1SS355_SOD323-2
@

@

D2428@

D2428@

BAS16_SOT23-3

BAS16_SOT23-3

+VCC_FAN1

+3VS

12

R2477

R2477
10K_0402_5%

10K_0402_5%

12

C2725

C2725
1000P_0402_50V7K

1000P_0402_50V7K

FAN_PWM41

40mil

+VCC_FAN1

1 2

C2723

C2723

10U_0805_10V4Z

10U_0805_10V4Z

1 2

C2724

C2724

1000P_0402_50V7K

1000P_0402_50V7K

1 2

FAN_PWM

No13

JFAN1

CONN@JFAN1

CONN@

1

1

2

2

3

3

4

4

5

GND1

6

GND2

E&T_3806-F04N-02R

E&T_3806-F04N-02R

SP02000H900

H2406@H2406

H2405@H2405

H2404@H2404

H2403@H2403

@

@

@

@

1

1

No22

H2414@H2414

@

@

1

Open Door shut down key

Normally door closed --> BI low --> battery power on
Open door --> BI high --> battery power off

BI50

BI_RESET

1

1

R2641

R2641
0_0402_5%

0_0402_5%
@

@

1 2

R2642

R2642
0_0402_5%

0_0402_5%

1 2

H2418@H2418

H2408@H2408

H2407@H2407

@

1

1

H2420@H2420

@

@

1

1

BI_R

SP020008Y00

+RTCVCC

R2628

R2628
1K_0402_5%

1K_0402_5%

1 2

R2644

1

2

G

G

R2644
0_0402_5%

0_0402_5%
@

@

1 2

13

D

D

Q2438

Q2438
2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

EVQPLHA15_4P

EVQPLHA15_4P

1
2

SW2404

SW2404

3
4

5

6

D2430

D2430

3
2

BAV70W_SOT323-3

BAV70W_SOT323-3

BI_GATE

SN111002700

Title

Title

2010/12/31

2010/12/31

2010/12/31

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

4019BI

4019BI

4019BI

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

E

H2409@H2409

@

JSW1

CONN@JSW1

CONN@

1

1

2

2

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001

BI_GATE

12

R2629

R2629
10K_0402_5%

10K_0402_5%

E

H2410@H2410

@

@

1

1

H2424@H2424

H2425@H2425

@

@

1

1

BI

3

S

S

Q2435

Q2435
AO3413L_SOT23-3

AO3413L_SOT23-3

2

G

G

D

D

1

BI_RESET

AC

AC

46

46

46

AC

57

57

57

5

ACES_50305-00441-001

ACES_50305-00441-001

1

1

2

2

3

3

4

4

5

GND

6

GND

PJP1

PJP1

D D

2

3

PD9

@PD9

@

PJSOT24CH_SOT23-3

PJSOT24CH_SOT23-3

1

PD2

PD2

LL4148_LL34-2

LL4148_LL34-2

PR3

PR3

100K_0402_5%

100K_0402_5%

PR4

PR4

22K_0402_5%

22K_0402_5%

1 2

12

12

BATT+

C C

51ON#43

N1

12

PC5

PC5

0.22U_0603_25V7K

0.22U_0603_25V7K

12

PC1

PC1
1000P_0402_50V7K

1000P_0402_50V7K

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

3

PQ1

PQ1

SMB3025500YA_2P

SMB3025500YA_2P

2

1 2

12

PC2

PC2

100P_0402_50V8J

100P_0402_50V8J

1

PL1

PL1

PJ25

PJ25

@JUMP_43X39

@JUMP_43X39

112

VIN

PD1

PD1
LL4148_LL34-2

LL4148_LL34-2

1 2

12

PR1

PR1
68_1206_5%

68_1206_5%

12

PC6

PC6

0.1U_0603_25V7K

0.1U_0603_25V7K

4

2

12

PC3

PC3

100P_0402_50V8J

100P_0402_50V8J

12

PR2

PR2
68_1206_5%

68_1206_5%

VIN

12

VS

PC4

PC4

1000P_0402_50V7K

1000P_0402_50V7K

3

+3VALWP +3VALW

+5VALWP +5VALW

+1.5VP

PJ1 @

PJ1 @

2

112

JUMP_43X118

JUMP_43X118

PJ3

PJ3

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ5

PJ5

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ8

PJ8

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ9

PJ9

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ11

PJ11

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ13

PJ13

2

112

@ JUMP_43X118

@ JUMP_43X118

2

+1.8VS+1.8VSP

+1.5V

+1.05VS_VCCP+1.05VS_VCCPP

+VGA_COREP

+VSBP

1

PJ2

PJ2

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ4

PJ4

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ6

PJ6

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ7

PJ7

2

112

@ JUMP_43X118

@ JUMP_43X118

PJ10

PJ10

@JUMP_43X39

@JUMP_43X39

112

2

+0.75VS+0.75VSP

+VCCSA+VCCSAP

+VGA_CORE

+VSB

PD3

PD3

12

12

PR8

PR8

1

3

Pre_chg

12

PR9

PR9

100K_0402_5%

100K_0402_5%

PQ3

PQ3
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

LL4148_LL34-2

1

LL4148_LL34-2

2

PR6

0_0402_5%

0_0402_5%

PR15

PR15

PR6

1K_1206_5%

1K_1206_5%

1 2

PR7

PR7

1K_1206_5%

1K_1206_5%

1 2

PR10

PR10

1K_1206_5%

1K_1206_5%

1 2

PR13

PR13

1K_1206_5%

1K_1206_5%

1 2

12

2
3

4

PD20

PD20

BAS40CW_SOT323-3

BAS40CW_SOT323-3

PR5

PR5

0_0402_5%

+CHGRTC

PBJ1

PBJ1

-+

B B

ML1220T13RE

ML1220T13RE
@

@

0_0402_5%

12

1 2

560_0603_5%

560_0603_5%

PR11

PR11

1 2

+3VLP

PR12

PR12

560_0603_5%

560_0603_5%

1 2

VIN

+RTCBATT

ACOFF41

+5VALW

A A

5

PQ2

PQ2

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

3

100K_0402_5%

100K_0402_5%

2

1

@

@

12

PC80

2

12

PR14

PR14
100K_0402_5%

100K_0402_5%

1

3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PC80

0.1U_0402_25V6

0.1U_0402_25V6

PQ4

PQ4
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

3

B+

@

@

@

@

12

12

PC81

PC81

PC114

PC114

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6

Compal Secret Data

Compal Secret Data

2010/01/25

2010/01/25

2010/01/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2010/12/31

2010/12/31

2010/12/31

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019BI

4019BI

4019BI

Date: Sheet of

Date: Sheet of

Date: Sheet of

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

1

47

55

47

55

47

55

A

A

A

A

B

C

D

for reverse input protection

1

D

D

PQ5

PQ5

2

G

SI1304BDL-T1-E3_SC70-3G

SI1304BDL-T1-E3_SC70-3

S

S

PR16

PR16

1 2

1M_0402_5%

1 1

1M_0402_5%

PR17

PR17

1 2

3M_0402_5%

3M_0402_5%

3

8
7
6
5

+3VALW

P2

1
2

1 2

PC9

PC9

0.1U_0402_25V6

0.1U_0402_25V6

12

PC17

PC17

0.1U_0603_25V7K

0.1U_0603_25V7K

BQ24725_CMSRC

BQ24725_ACDRV

PR30

PR30

1 2

10K_0402_1%

10K_0402_1%

PR31

PR31

1 2

10K_0402_1%

10K_0402_1%

PR33

PR33

VIN

1 2

255K_0402_1%

255K_0402_1%

12

@

@

PC12

PC12

CSOP1

CSON1

+3VALW

CHG_B+

12

PC13

PC13

0.1U_0402_25V6

0.1U_0402_25V6

4

4

12

2200P_0402_50V7K

2200P_0402_50V7K

BQ24725_BATDRV

5

PQ9

PQ9

SIS412DN-T1-GE3_POWERPAK8-5

SIS412DN-T1-GE3_POWERPAK8-5

4.7U_LF919AS-4R7M-P3_5.2A_20%

4.7U_LF919AS-4R7M-P3_5.2A_20%

123

BQ24725_LX CHG

5

12

@

@

PQ10

PQ10

123

PC28

PC28

2.2U_0603_16V6K

2.2U_0603_16V6K

12

SIS412DN-T1-GE3_POWERPAK8-5

SIS412DN-T1-GE3_POWERPAK8-5

PL2

PL2

1 2

PR29

PR29

4.7_1206_5%

4.7_1206_5%

PC27

PC27

@

@

680P_0402_50V7K

680P_0402_50V7K

1 2

PR21

PR21

4.12K_0603_1%

4.12K_0603_1%

CSOP1

12

AO4466L_SO8

AO4466L_SO8

8
7
6
5

PR28

PR28

0.01_1206_1%

0.01_1206_1%

1
2

PC23

PC23

0.1U_0402_25V6

0.1U_0402_25V6

PQ8

PQ8

1
2
3

4

4
3

CSON1

12

12

PC25

PC25

0.1U_0402_25V6

0.1U_0402_25V6

PC14

PC14

0.01U_0402_50V7K

0.01U_0402_50V7K

12

PC21

PC21

@

@

12

PR20

PR20

12

10U_0805_25V6K

10U_0805_25V6K

0_0402_5%

0_0402_5%

12

PC22

PC22

10U_0805_25V6K

10U_0805_25V6K

BATT+

12

PC24

PC24

PC26

PC26

2200P_0402_50V7K

2200P_0402_50V7K

0.01U_0402_50V7K

0.01U_0402_50V7K

0.56UH_1127AS-R56N_3.3A_30%

0.56UH_1127AS-R56N_3.3A_30%

PR18

PR18

4

0.02_2512_1%

0.02_2512_1%

3

VIN

2

3

PD5

PD5
BAS40CW_SOT323-3

12

PC15

PC15

0.1U_0402_25V6

0.1U_0402_25V6

BQ24725_ACN

PC18

PC18

1 2

1U_0603_25V6K

BQ24725_ACP

1U_0603_25V6K

PU1

PU1

21

1

2

3

4

5

Pre_chg

12

PD7

PD7
RB751V-40_SOD323-2

RB751V-40_SOD323-2

12

PR35

PR35

154K_0402_1%

154K_0402_1%

BAS40CW_SOT323-3

1

12

PR24

PR24

10_1206_1%

10_1206_1%

BQ24725_LX

20

19

PAD

VCC

ACN

ACP

BQ24725RGRR_VQFN20_3P5X3P5

BQ24725RGRR_VQFN20_3P5X3P5

CMSRC

ACDRV

ACOK

ACDET6IOUT7SDA8SCL9ILIM

1 2

12

PC119

PC119

10U_0805_25V6K

10U_0805_25V6K

0.047U_0402_25V7K

0.047U_0402_25V7K
PC16

PC16

1 2

DH_CHG

18

HIDRV

PHASE

PL16

PL16

12

PR25

PR25

0_0603_5%

0_0603_5%

12

BQ24725_BST

17

16

BTST

BATDRV

10

12

12

12

PC109

PC109

10U_0805_25V6K

10U_0805_25V6K

PD6

PD6
RB751V-40_SOD323-2

RB751V-40_SOD323-2

PC19

PC19

1 2

1U_0603_25V6K

1U_0603_25V6K

REGN

15

LODRV

14

GND

13

SRP

12

SRN

11

12

PC29

PC29

PR34

PR34

100K_0402_1%

100K_0402_1%

12

PC11

PC11

PC10

PC10

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

DH_CHG

DL_CHG

PR66

PR66

10_0603_5%

10_0603_5%

SRP

1 2

PR67

PR67

6.8_0603_5%

6.8_0603_5%

SRN

1 2

BQ24725_BATDRV

PR32

PR32

1 2

316K_0402_1%

316K_0402_1%

0.01U_0402_25V7K

0.01U_0402_25V7K

AO4466L_SO8

AO4466L_SO8

PQ6

PQ6

8
7
6
5

4

12

PC8

PC8

2200P_0402_50V7K

2200P_0402_50V7K

VIN

2 2

3 3

@

@

3.3_1210_5%

@

3.3_1210_5%

@

PR26

PR26

3.3_1210_5%

3.3_1210_5%

PR27

PR27

12

12

12

PC20

PC20
@

@

P1 B+VIN

1
2
3

2.2U_0805_25V6K

2.2U_0805_25V6K

12

@

@

PR19

PR19

12

0_0402_5%

0_0402_5%

12

PC7

PC7

0.1U_0402_25V6

0.1U_0402_25V6

PR22

PR22

4.12K_0603_1%

4.12K_0603_1%

12

PR23

PR23

AO4466L_SO8

AO4466L_SO8

1
2
3

4

4.12K_0603_1%

4.12K_0603_1%

PQ7

PQ7

ACIN15,41,45

Vin Dectector

Min. Typ Max.
H-->L 17.23V
L--> H 17.63V

ILIM and external DPM

4 4

3.97A

12

PC30

PC30

0.1U_0402_25V6

0.1U_0402_25V6

12

PR36

PR36

PC31

PC31

66.5K_0402_1%

66.5K_0402_1%

12

100P_0402_50V8J

100P_0402_50V8J

EC_SMB_CK1 41,50

EC_SMB_DA1 41,50

ADP_I 41,50

to EC

Security Classification

Security Classification

Security Classification

2010/01/25

2010/01/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2010/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

2010/12/31

2010/12/31

2010/12/31

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Date: Sheet of

Date: Sheet of

Date: Sheet of

D

55

48

55

48

55

48

A

A

A

5

4

3

2

1

2VREF_8205

D D

PR37

PR37

13K_0402_1%

13K_0402_1%

1 2

PR39

HCB4532KF-800T90_1812

HCB4532KF-800T90_1812

PL3

PL3

B+

1 2

PC33

PC33

C C

B B

MAINPWON46,50

A A

RT8205_B+

12

12

PC35

PC35

PC34

PC34

0.1U_0603_25V7K

0.1U_0603_25V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

+3VALWP

330U_D2E_6.3VM_R25M

330U_D2E_6.3VM_R25M

PD4

PD4

LL4148_LL34-2

LL4148_LL34-2

VIN

VS

5

12

12

PC36

PC36

2200P_0402_50V7K

2200P_0402_50V7K

PL4

+

+

PQ15A

PQ15A

PL4

1 2

4.7UH +-20% FDSD0630-H-4R7M=P3 5.5A

4.7UH +-20% FDSD0630-H-4R7M=P3 5.5A

1

PC44

PC44

2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

VL

PR50

PR50
0_0402_5%

0_0402_5%

12

1M_0402_1%

1M_0402_1%
PR53

PR53

1 2

12

PR52

PR52
316K_0402_1%

316K_0402_1%

12

PR45
@ PR45

@

4.7_1206_5%

4.7_1206_5%

PC45
@ PC45

@

680P_0402_50V7K

680P_0402_50V7K

61

D

D

S

S

100K_0402_1%

100K_0402_1%

12

PR54

PR54

402K_0402_1%

402K_0402_1%

12

12

ENTRIP1

2

G

G

PR51

PR51

12

PC51

PC51

5

PQ11

PQ11

4

SIS412DN-T1-GE3_POWERPAK8-5

SIS412DN-T1-GE3_POWERPAK8-5

123

5

SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5
PQ13

PQ13

4

123

5

G

G

12

13

PQ16

PQ16
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4

Typ: 175mA

PC41

PC41

4.7U_0805_10V6K

4.7U_0805_10V6K

PD8

PD8

1 2

B+

RLZ5.1B_LL34

RLZ5.1B_LL34

ENTRIP2

34

D

D

PQ15B

PQ15B

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

S

S

+3VLP

12

PR43

PR43

1 2

1 2

0_0603_5%

0_0603_5%

PC42

PC42

0.1U_0603_25V7K

0.1U_0603_25V7K

3V5V EN46

PR48

PR48

499K_0402_1%

499K_0402_1%

1 2

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR47
0_0402_5%

0_0402_5%

12

PR49

PR49

100K_0402_1%

100K_0402_1%

+3.3VALWP
Ipeak=5.78A ; 1.2Ipeak=6.94A; Imax=4.05A
f=375KHz, L=4.7UH
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.716A
Vlimit=10*10^-6*110Kohm/10=0.11V
Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A
Iocp=7.06A~9.85AA (7.06A>6.94A -> ok) -DVT-

Issued Date

Issued Date

Issued Date

PR39

20K_0402_1%

20K_0402_1%

1 2

PR41

PR41

110K_0402_1%

110K_0402_1%

1 2

25

7
8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

@PR47

@

12

12

PC48

PC48

1U_0603_10V6K

1U_0603_10V6K

2VREF_8205

PU2

PU2

P PAD

VO2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2

2010/07/13 2011/07/13

2010/07/13 2011/07/13

2010/07/13 2011/07/13

3

12

PC32

PC32

1U_0603_10V6K

1U_0603_10V6K

ENTRIP2

6

5

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_B+

3

1

2

4

FB1

REF

TONSEL

15

ENTRIP1

PGOOD

BOOT1
UGATE1
PHASE1
LGATE1

NC18VREG5

VIN16GND

17

12

PC49

PC49

12

4.7U_0805_10V6K

4.7U_0805_10V6K

PC50

PC50

0.1U_0603_25V7K

0.1U_0603_25V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

PR38

PR38

30K_0402_1%

30K_0402_1%

1 2

PR40

PR40

20K_0402_1%

20K_0402_1%

1 2

PR42

PR42

154K_0402_1%

154K_0402_1%

ENTRIP1

1 2

24

VO1

23

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205EGQW_WQFN24_4X4

RT8205EGQW_WQFN24_4X4

VL

Typ: 175mA

Deciphered Date

Deciphered Date

Deciphered Date

PC37

PC37

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR44

PR44

0_0603_5%

0_0603_5%

1 2

RT8205_B+

12

12

PC38

PC38

PC39

PC39

4.7U_0805_25V6-K

4.7U_0805_25V6-K

SPOK 50

PC43

PC43

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
(2)SMPS2=375KHZ(+3VALWP)

+5VALWP
Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A
f=300KHz, L=4.7UH,Rentrip=154k ohm
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A
Vlimit=10*10^-6*154Kohm/10=0.15V
Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A
Iocp=8.44~11.57A (8.44>8.4 -> OK)

2

12

12

PC40

PC40

0.1U_0603_25V7K

0.1U_0603_25V7K

2200P_0402_50V7K

2200P_0402_50V7K

5

PQ12

PQ12

4

SIS412DN-T1-GE3_POWERPAK8-5

SIS412DN-T1-GE3_POWERPAK8-5

123

4.7UH +-20% FDSD0630-H-4R7M=P3 5.5A

4.7UH +-20% FDSD0630-H-4R7M=P3 5.5A

5

4

123

PQ14

SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

PQ14

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

1 2

12

PR46
@ PR46

@

4.7_1206_5%

4.7_1206_5%

12

PC47
@ PC47

@

680P_0402_50V7K

680P_0402_50V7K

PL5

PL5

PC46

PC46

150U_D2E_6.3VM_R18

150U_D2E_6.3VM_R18

1

49 55Tuesday, December 14, 2010

49 55Tuesday, December 14, 2010

49 55Tuesday, December 14, 2010

1

+

+

2

+5VALWP

A

A

A

5

ACES_50299-01001-001

D D

ACES_50299-01001-001

10

10

9

9

8

8

EC_SMDA

7

7

EC_SMCA

6

6

TH

5

5

BI+

4

4

3

3

2

2

1

1

PJP2

PJP2

<40,41>

VMB

PL6

PL6

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC53

PC53
1000P_0402_50V7K

1000P_0402_50V7K

C C

VL

PR69

PR69

100K_0402_1%

B B

100K_0402_1%

SPOK49

1 2

PR71

PR71
1K_0402_5%

1K_0402_5%

1 2

2

G

G

12

PC58

PC58

1U_0402_6.3V6K

1U_0402_6.3V6K

<40,41>

BATT+

12

PC54

PC54

0.01U_0402_25V7K

0.01U_0402_25V7K

B+

PR68

PR68

22K_0402_1%

22K_0402_1%

1 2

1

D

D

PQ20

PQ20

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

S

S

3

12

BI46

PR65

PR65

100K_0402_1%

100K_0402_1%

12

PR57

PR57
1K_0402_5%

1K_0402_5%

12

PC55

PC55

4

3

0.22U_0603_25V7K

0.22U_0603_25V7K

PR56

PR56

100_0402_1%

100_0402_1%

PR60

PR60

6.49K_0402_1%

6.49K_0402_1%
12

12

PR62

PR62
1K_0402_1%

1K_0402_1%

PQ19

PQ19

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

1

2

PR55

PR55
100_0402_1%

100_0402_1%

1 2

1 2

12

PC56

PC56

0.1U_0603_25V7K

0.1U_0603_25V7K

H_PROCHOT#5,41

2N7002W-T/R7_SOT323-3@G

2N7002W-T/R7_SOT323-3

EC_SMB_DA1 41,48

EC_SMB_CK1 41,48

+3VALWP

+VSBP

BATT_TEMP 41

13

D

D

@
PQ22

PQ22

S

S

2

G

3

PR75

@ PR75

@
0_0402_5%

0_0402_5%

1 2

PC52

PC52

0.1U_0603_25V7K

0.1U_0603_25V7K

MAINPWON46,49

+3VS

PR76

PR76

100K_0402_1%

100K_0402_1%

2

1

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

VL

12

12

Recovery at 72 degree C

VL

PR61@

PR61@

100K_0402_1%

100K_0402_1%

1 2

12

1
2
3
4

1
2
3

100K_0402_1%_NCP15WF104F03RC

@

100K_0402_1%_NCP15WF104F03RC

@

PR70

PR70

0_0402_5%

0_0402_5%

1 2

PC57

@ PC57

@

0.1U_0603_25V7K

0.1U_0603_25V7K

PU4

PU4

VCC

TMSNS1

GND

RHYST1

OT1

TMSNS2
RHYST2

OT2

G718TM1U_SOT23-8

G718TM1U_SOT23-8

PU3

PU3

VCC

TMSNS1

GND

RHYST1

~OT1

TMSNS2

~OT24RHYST2

G718TM1U_SOT23-8

G718TM1U_SOT23-8

+3VALWP

12

8
7
6
5

65W@ PR77

65W@

28.7K_0402_1%

28.7K_0402_1%

PR58

PR58

10K_0402_1%

10K_0402_1%

8
7
6
5

@

@

PR64

PR64

47K_0402_1%

47K_0402_1%

PH2

PH2

PR73

PR73
10K_0402_1%

10K_0402_1%

1 2

PR77

90W@PR77

90W@

16.2K_0402_1%

16.2K_0402_1%

PR77

1 2

9.53K_0402_1%

9.53K_0402_1%

12

12

65W@ PR74

65W@

5.62K_0402_1%

5.62K_0402_1%

12

PR74

8.87K_0402_1%

8.87K_0402_1%

12

12

PR63

PR63

PR74

90W@PR74

90W@

PR78

PR78
10K_0402_1%

10K_0402_1%

12

PR59

PR59
21K_0402_1%

21K_0402_1%

12

PH1

PH1

100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

12

@

@
PR72

PR72

7.15K_0402_1%

7.15K_0402_1%

13

D

D

2

G

G

S

S

@

@
PQ21

PQ21
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

ADP_I 41,48

65W/90W# 41

For 65W adapter==>action 70W , Recovery 54W

A A

5

4

For 90W adapter==>action 97W , Recovery 75W

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25

2010/01/25

2010/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2010/12/31

2010/12/31

2010/12/31

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019BI

4019BI

4019BI

Date: Sheet of

Tuesday, December 14, 2010

Date: Sheet of

Tuesday, December 14, 2010

Date: Sheet of

Tuesday, December 14, 2010

1

55

50

55

50

55

50

A

A

A

A

PR82

PR82

0_0402_5%

0_0402_5%

1 1

SYSON41,44,45

+5VALW

<Vo=1.5V> VFB=0.75V
V=0.75*(1+10K/10K)=1.5V
Fsw=298KHz

Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.
Ipeak=19.53A, Imax=23.44A, Iocp=13.67A

2 2

Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.63A
=>1/2Delta I=2.315A
choose Rcs=15K
Iocpmax=((15K*11uA)/0.0045)+2.315A=35.65A
Iocpmin=((15K*9uA)/(0.0056*1.3))+2.315A=23.06A
Iocp=23.06A~35.65A

1 2

PR84
@ PR84

@

PR86

PR86

100_0603_5%

100_0603_5%

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1 2

47K_0402_5%

47K_0402_5%

PC68

PC68

12

@

@
PC64

PC64

.1U_0402_16V7K

.1U_0402_16V7K

12

1 2

12

PR89

PR89
10K_0402_1%

10K_0402_1%

PR88

PR88

10K_0402_1%

10K_0402_1%

B

PR81

PR81

267K_0402_1%

267K_0402_1%

1 2

C

1.5_8209_B+
786

5

PQ23

PQ23

4

AO4406AL_SO8

AO4406AL_SO8

578

3 6

123

PQ24

PQ24

241

AO4456_SO8

AO4456_SO8

PC63

15

1

PU5

PU5

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

14

NC

BOOT

UGATE

EN/DEM

PHASE

VFB=0.75V

LGATE

GND7PGND

RT8209MGQW_WQFN14_3P5X3P5

RT8209MGQW_WQFN14_3P5X3P5

8

VDDP

13
12
11

CS

10
9

BST_1.5V

DH_1.5V
LX_1.5V

DL_1.5V

0_0603_5%
1 2

12

PR87

PR87

PR83

PR83

0_0603_5%

0.1U_0603_25V7K

0.1U_0603_25V7K

BST_1.5V-1

+5VALW

12

15K_0402_1%

15K_0402_1%

PC63
1 2

PC66

PC66

4.7U_0805_10V6K

4.7U_0805_10V6K

12

12

PC60

PC60

PC61

PC61

0.1U_0603_25V7K

0.1U_0603_25V7K

PL7

PL7

1 2

12

PC62

PC62

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC59

PC59

2200P_0402_50V7K

2200P_0402_50V7K

1UH_FDUE1040D-1R0M-P3_21.3A_20%

1UH_FDUE1040D-1R0M-P3_21.3A_20%

12

PR85

@PR85

@

4.7_1206_5%

4.7_1206_5%

12

PC67

@PC67

@
680P_0402_50V7K

680P_0402_50V7K

12

4.7U_0805_25V6-K

4.7U_0805_25V6-K

D

PL17

PL17

1 2

FBMA-L11-322513-151LMA50T_1210

FBMA-L11-322513-151LMA50T_1210

1

+

+

PC65

PC65
330U_D2E_2.5VM

330U_D2E_2.5VM

2

B+

+1.5VP

3 3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/13 2011/07/13

2010/07/13 2011/07/13

2010/07/13 2011/07/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

4019BI

4019BI

D

51 55Tuesday, December 14, 2010

51 55Tuesday, December 14, 2010

51 55Tuesday, December 14, 2010

A

A

A

5

PJ17

PJ17

SUSP#39,41,45,53

+5VALW

2

112

JUMP_43X118@

JUMP_43X118@

PJ18

PJ18

2

JUMP_43X118@

JUMP_43X118@

PR92 100K_0402_5%PR92 100K_0402_5%

112

PR99 100K_0402_5%PR99 100K_0402_5%

12

PC69

PC69
22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

12

1 2

1M_0402_5%

1M_0402_5%

PC76

PC76
22U_0805_6.3VAM

22U_0805_6.3VAM

1M_0402_5%

1M_0402_5%

PR94

PR94

PR104

PR104

EN_1.8V

12

PC73

PC73

1 2

EN_VCCSAP

12

1 2

+5VALW

D D

C C

VCCPPWRGOOD53

B B

PU6

PU6

10

9
8

5

0.1U_0402_10V7K

0.1U_0402_10V7K

PU7

PU7

10

9
8

5

PC79

PC79

0.1U_0402_10V7K

0.1U_0402_10V7K

4

4

LX

PVIN

PG

LX

PVIN
SVIN

FB

EN

TP

NC

7

11

SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

+3VS

PR103

PR103

1 2

10K_0402_5%

10K_0402_5%

4

PVIN

PG

PVIN
SVIN

EN

TP

NC

7

11

SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

2
3

6

NC

1

0_0402_5%

0_0402_5%

PR105

PR105

2

LX

3

LX

6

FB

NC

1

LX_1.8V

FB_1.8V

12

SA_PGOOD 41

LX_VCCSAP

FB_VCCSAP

PL8

PL8

2.2UH 20% FDSD0630-H-2R2M=P3 8.3A

2.2UH 20% FDSD0630-H-2R2M=P3 8.3A
1 2

12

PR90

PR90

4.7_1206_5%

4.7_1206_5%

FB=0.6Volt

12

PC74

PC74

680P_0603_50V7K

680P_0603_50V7K

2.2UH 20% FDSD0630-H-2R2M=P3 8.3A

2.2UH 20% FDSD0630-H-2R2M=P3 8.3A
1 2

12

PR97

PR97

4.7_1206_5%

4.7_1206_5%

FB=0.6Volt

12

PC77

PC77

680P_0603_50V7K

680P_0603_50V7K

PR91

PR91

20K_0402_1%

20K_0402_1%

PR93

PR93

10K_0402_1%

10K_0402_1%

PL9

PL9

10K_0402_1%

10K_0402_1%

PR95

PR95

PC75

PC75

12

12

12

68P_0402_50V8J

68P_0402_50V8J

12

PC70

PC70

68P_0402_50V8J

68P_0402_50V8J

PR100

PR100

1 2

3.4K_0402_1%

3.4K_0402_1%

3

12

12

PR101

PR101
0_0402_5%

0_0402_5%

1 2

12

PR108

PR108

20K_0402_1%

20K_0402_1%

13

D

D

2

G

G

S

S

PQ27

PQ27
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PC71

PC71

22U_0805_6.3VAM

22U_0805_6.3VAM

12

PC72

PC72

22U_0805_6.3VAM

22U_0805_6.3VAM

1.8VSP
Ipeak=3.35A ; 1.2Ipeak=4.02 ;Imax=2.345A
Vout=0.6*(1+(20K/10K))=1.8V

+1.8VSP

12

12

PR111

PR111
10K_0402_5%

10K_0402_5%

12

PC85

@ PC85

@
4700P_0402_25V7K

4700P_0402_25V7K

12

PC78

PC78

22U_0805_6.3VAM

22U_0805_6.3VAM

+3VS

12

12

12

PC83

PC83

PC82

PC82

22U_0805_6.3VAM

22U_0805_6.3VAM

@

@

PR109

PR109
10K_0402_5%

10K_0402_5%

PR112

@PR112

@

100K_0402_5%

100K_0402_5%

12

22U_0805_6.3VAM

22U_0805_6.3VAM

PC84

PC84

@

@

+VCCSAP

PR102

PR102

1 2

0_0402_5%

0_0402_5%

22U_0805_6.3VAM

22U_0805_6.3VAM

PR107

PR107

1 2

10_0402_5%

10_0402_5%

PQ28

PQ28
PMBT2222A_SOT23-3

PMBT2222A_SOT23-3

1

2

3

2

VSSSA_SENSE 9

VCCSA_SENSE 9

PR113 100K_0402_5%PR113 100K_0402_5%

12

12

@ PR114

@
10K_0402_5%

10K_0402_5%

PR114

1

VCCSA_VID1 9

VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required
0 0 0.9 V Yes/Yes
0 1 0.8 V Yes/Yes
1 1 0.75V No/Yes

A A

5

1 1 0.65V No/Yes

Note:Use VCCSA_SEL to switch High & Low Level for VID[1]
(ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/13 2011/07/13

2010/07/13 2011/07/13

2010/07/13 2011/07/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

4019BI

4019BI

4019BI

Date: Sheet

Date: Sheet

Date: Sheet

1

of

52 55Tuesday, December 14, 2010

of

52 55Tuesday, December 14, 2010

of

52 55Tuesday, December 14, 2010

A

A

A

5

D D

12

PC95

PC95

0.1U_0603_50V7K

0.1U_0603_50V7K

12

1 2

1U_0402_6.3V6K

1U_0402_6.3V6K

SUSP5,45

C C

PR119

SUSP

PR119

680K_0402_5%

680K_0402_5%

1 2

PQ45

PQ45

+5VALW

2

G

G

47K_0402_5%@

47K_0402_5%@

PR120

PR120

12

13

D

D

S

S

PR124

PR124

100_0603_5%

100_0603_5%

1 2

PC100

PC100

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

SUSP#39,41,45,52

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

B B

PR116

PR116

24.9K_0402_1%

24.9K_0402_1%

PC89

PC89

PR126

PR126

4.02K_0402_1%

4.02K_0402_1%

1 2

12

PR127

PR127

10K_0402_1%

10K_0402_1%

4

+1.5V

2

G

G

12

PR118

PR118

267K_0402_1%

267K_0402_1%

1 2

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

13

D

D

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

TON
VOUT
VDD
FB
PGOOD

SUSP

1

EN/DEM

VFB=0.75V

GND7PGND

PR129

PR129

1 2

10K_0402_1%

10K_0402_1%

S

S

PQ29

PQ29
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PU9

PU9

2
3
4
5
6

PC86

PC86

1 2

1K_0402_1%

1K_0402_1%

PQ30

PQ30

13

D

D

1K_0402_1%

2

15

NC

8

1K_0402_1%

G

G

S

S

14

13

BOOT

UGATE

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209MGQW_WQFN14_3P5X3P5

RT8209MGQW_WQFN14_3P5X3P5

+3VALW

3

12

PR115

PR115

12

PR117

PR117

BST_1.05VS_VCCP
DH_1.05VS_VCCP
LX_1.05VS_VCCP

DL_1.05VS_VCCP

PC88

PC88

.1U_0402_16V7K

.1U_0402_16V7K

PR121

PR121

0_0603_5%

0_0603_5%

1 2

12

PR125

PR125

15K_0402_1%

15K_0402_1%

12

12

PU8

PU8

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

G2992F1U_SO8

+0.75VSP

12

PC90

PC90
10U_0603_6.3V6M

10U_0603_6.3V6M

PC96

PC96

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

+5VALW

PC99

PC99

4.7U_0805_10V6K

4.7U_0805_10V6K

NC
NC
NC

TP

6
5
7
8
9

AO4406AL_SO8

AO4406AL_SO8

AO4456_SO8

AO4456_SO8

PQ31

PQ31

PQ32

PQ32

4

2

+3VALW

12

PC87

PC87
1U_0603_10V6K

1U_0603_10V6K

1.05VS_51117_B+

786

5

123

578

3 6

241

PR128

PR128

10_0402_5%

10_0402_5%

12

12

PC92

PC92

PC91

PC91

0.1U_0603_25V7K

0.1U_0603_25V7K

2200P_0402_50V7K

2200P_0402_50V7K

PL10

1UH_FDUE1040D-1R0M-P3_21.3A_20%

1UH_FDUE1040D-1R0M-P3_21.3A_20%

12

PR122

@PR122

@

4.7_1206_5%

4.7_1206_5%

12

PC98

@PC98

@

680P_0402_50V7K

680P_0402_50V7K

12

PL10

0_0402_5%

0_0402_5%

VCCIO_SENSE 8VCCPPWRGOOD52

12

PC93

PC93

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PR123

PR123

PL18

PL18

1 2

FBMA-L11-322513-151LMA50T_1210

FBMA-L11-322513-151LMA50T_1210

12

PC94

PC94

4.7U_0805_25V6-K

4.7U_0805_25V6-K

1

+

+

PC97

PC97
330U_D2E_2.5VM

330U_D2E_2.5VM

2

PR145

PR145

0_0402_5%

1 2

0_0402_5%

1

B+

+1.05VS_VCCPP

12

VSSIO_SENSE 8

PR130

@PR130

@

10K_0402_1%

10K_0402_1%

<Vo=1.05V> VFB=0.75V
V=0.75*(1+4.02K/10K)=1.052V
Fsw=298KHz

Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.
Ipeak=12.866A, Imax=9A, Iocp=15.439A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=3.33A

A A

=>1/2Delta I=1.665A
choose Rcs=15K
Iocpmax=((15K*11uA)/0.0045)+1.665A=37.62A
Iocpmin=((15K*9uA)/(0.0056*1.3))+1.665A=23.02A
Iocp=23.02A~37.62A

5

4

1 2

Security Classification

Security Classification

Security Classification

2010/07/13 2011/07/13

2010/07/13 2011/07/13

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/13 2011/07/13

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019BI

4019BI

4019BI

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

53 55Tuesday, December 14, 2010

53 55Tuesday, December 14, 2010

53 55Tuesday, December 14, 2010

1

A

A

A

5

12

PR153

PR153

1K_0402_1%

1K_0402_1%
@

@

12

GFX@ PC112

GFX@

150P_0402_50V8J

150P_0402_50V8J

1 2

PC116

D D

VR_HOT#41

C C

PH3

PH3

470KB_0402_5%_ERTJ0EV474JGFX@

470KB_0402_5%_ERTJ0EV474JGFX@

2-ph: PR172=20.5K Vboot=0V, Iccmax=54

B B

PC116

PR136

PR136

330P_0402_50V7K@

330P_0402_50V7K@

294K_0402_1%

294K_0402_1%

PR159

PR159

499_0402_1%@

499_0402_1%@

12

1 2

12

PR131

PR131

3.83K_0402_1%GFX@

3.83K_0402_1%GFX@

+3VS

1 2

1.91K_0402_1%

1.91K_0402_1%

PR156

PR156

VGATE15

PR133

PR133

27.4K_0402_1%GFX@

27.4K_0402_1%GFX@

1 2

PC122

PC122

47P_0402_50V8J

47P_0402_50V8J

NTCG

2-ph: PR172=169K Vboot=1.1V, Iccmax=54

A A

+CPU_CORE
Iocp=70A, IccMAX=53A
Load line=1.9mohm
DCR=1.1mohm

5

PC105

PC105

39P_0402_50V7KGFX@

39P_0402_50V7KGFX@

12

12

12

PR139

GFX@ PR139

GFX@

PC112

475K_0402_1%

475K_0402_1%

12

PC106

GFX@ PC106

GFX@

1000P_0402_50V7K

1000P_0402_50V7K

12

8.06K_0402_1%GFX@

8.06K_0402_1%GFX@
PR132

PR132

+1.05VS_VCCP

PC144

@PC144

@

.1U_0402_16V7K

.1U_0402_16V7K

1 2

VR_SVID_CLK8

12

54.9_0402_1%

54.9_0402_1%

VR_SVID_DAT8

PH5

PH5

470KB_0402_5%_ERTJ0EV474J

470KB_0402_5%_ERTJ0EV474J

PR149

PR149

1 2

1 2

1 2

12

PR161

PR161

27.4K_0402_1%

27.4K_0402_1%

PR158

PR158

3.83K_0402_1%

3.83K_0402_1%

A

A

+GFX_CORE
Iocp=40A, IccMAX=24A
Load line=3.9mohm
DCR=1.1mohm

GFX@

GFX@

2.55K_0402_1%GFX@

2.55K_0402_1%GFX@

422_0402_1%GFX@

422_0402_1%GFX@

12

330P_0402_50V7K

330P_0402_50V7K

PC104

PC104

1.91K_0402_1%GFX@

1.91K_0402_1%GFX@

PR148

PR148
130_0402_1%

130_0402_1%

1 2

VR_SVID_ALRT#8

VR_ON41

12

PR163

PR163

8.06K_0402_1%

8.06K_0402_1%

PR172

PR172

1 2

20.5K_0402_1%

20.5K_0402_1%
PR175

PR175

267K_0402_1%

267K_0402_1%

1 2

PC141

PC141
470P_0402_50V8J

470P_0402_50V8J

PR140

PR140

PR135

PR135

PR217

PR217

GFX_CORE_PWRGD41

SVID_SCLK

12

12

12

12

+3VS

1 2

0_0402_5%

0_0402_5%

comp

PC137

PC137

680P_0402_50V7K

680P_0402_50V7K

2K_0402_1%@

2K_0402_1%@

PR177

PR177

1 2

4

1 2

SVID_ALERT#

PR155

PR155

NTC

4

PU10

PU10

12

PC129

PC129

1000P_0402_50V7K

1000P_0402_50V7K

12

PC134

PC134

47P_0402_50V8J

47P_0402_50V8J

PC135

PC135

1000P_0402_50V7K

1000P_0402_50V7K

1 2

FB

1 2

PR176

PR176

3.32K_0402_1%

3.32K_0402_1%

+CPU_CORE

1

VWG

2

PGOODG

3

SDA

4

ALERT#

5

SCLK

6

VR_ON

7

PGOOD

8

VR_HOT#

9

NTC

10

VW

PR173

PR173

887_0402_1%

887_0402_1%

1 2

PR179

PR179

@ PC107

@
330P_0402_50V7K

330P_0402_50V7K

1 2

GFX@

GFX@

0.01U_0402_50V7K

0.01U_0402_50V7K

ISNG

ISPG

38

41

PAD

1 2

10_0402_1%

10_0402_1%

40

COMPG

comp

PC130 10P_0402_50V8JPC130 10P_0402_50V8J

36

37

39

FBG

RTNG

ISUMPG

ISUMNG

ISL95835HRTZ-T_TQFN40_5X5

ISL95835HRTZ-T_TQFN40_5X5

COMP11FB12ISEN3/ FB213ISEN214ISEN115RTN16ISUMN17ISUMP18VDD19VIN

FB

ISEN1

ISEN2

12

ISEN3

12

PC133

PC133

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

VSUM-

12

12

PC143

PC143

PC142

PC142

330P_0402_50V7K

330P_0402_50V7K

@

@

8

VCCSENSE

3

12

PC107

12

PC110

PC110

NTCG

35

NTCG

12

PC136

PC136

UGATEG

BOOTG

33

34

BOOTG

UGATEG

12

@

@

12

GFX@ PR134

GFX@
10_0402_1%

10_0402_1%

GFX@ PR143

GFX@
10_0402_1%

10_0402_1%

LGATEG

PHASEG

31

32

LGATEG

PHASEG

BOOT2
UGATE2
PHASE2

LGATE2

LGATE1
PHASE1
UGATE1

BOOT1

20

12

PR178

PR178

PC145 330P_0402_50V7K

PC145 330P_0402_50V7K

1.47K_0402_1%

1.47K_0402_1%

PR180

PR180

100_0402_1%

100_0402_1%

@

@

PWM3

2-ph: PR178=1.47K for ~70A OCP

PR181

PR181

0.01U_0402_50V7K

0.01U_0402_50V7K
10_0402_1%

10_0402_1%

1 2

8

VSSSENSE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR134

PR143

VCCP

12

3

12

30
29
28
27
26
25
24
23
22
21

+5VS

12

PC138

PC138

0.22U_0402_10V6K

0.22U_0402_10V6K

+VGFX_CORE

VCC_AXG_SENSE 9

VSS_AXG_SENSE 9

BOOT2
UGATE2
PHASE2
LGATE2

LGATE1
PHASE1
UGATE1
BOOT1

CPU_B+

12

12

0.22U_0603_25V7K

0.22U_0603_25V7K
PC123

PC123

PR164

PR164
1_0603_5%

1_0603_5%

1 2
12

PC131

PC131

1U_0603_10V6K

1U_0603_10V6K

12

12

PC139

PC139

PR174

PR174

12

11K_0402_1%

11K_0402_1%

0.022U_0402_16V7K

0.022U_0402_16V7K

12

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

UGATEG

PHASEG

BOOTG

LGATEG

+5VS

12

PR218

PR218

0_0603_5%

0_0603_5%

12

PR160

PR160

0_0402_5%

0_0402_5%

PR162

PR162

2.2_0603_5%

2.2_0603_5%

UGATE2

PHASE2

BOOT2

VSUM+

LGATE2

PR167

PR167

2.61K_0402_1%

2.61K_0402_1%

PH6

PH6
10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

VSUM-

PC146

PC146
.1U_0402_16V7K

.1U_0402_16V7K

UGATE1

1 2

PHASE1

BOOT1

LGATE1

Compal Secret Data

Compal Secret Data

Compal Secret Data

GFX@ PC108

GFX@

0.22U_0603_10V7K

0.22U_0603_10V7K

PR137

GFX@ PR137

GFX@

0_0603_5%

0_0603_5%

PC164

PC164

1U_0603_10V6K

1U_0603_10V6K

12

1 2

PR226

PR226

0_0603_5%

0_0603_5%

PR165

PR165

0_0603_5%

0_0603_5%

12

0.22U_0603_10V7K

0.22U_0603_10V7K

PR227

PR227

0_0603_5%

0_0603_5%

PR182

PR182

0_0603_5%

0_0603_5%

12

0.22U_0603_10V7K

0.22U_0603_10V7K

Deciphered Date

Deciphered Date

Deciphered Date

1 2

PR221

PR221

0_0603_5%

0_0603_5%

PC108

12

12

PC132

PC132

12

PC150

PC150

4

4

4

4

12

2

5

4

123

5

4

123

PQ33

GFX@ PQ33

GFX@

CSD17308Q3_SON8-5

CSD17308Q3_SON8-5

PQ34

GFX@ PQ34

GFX@

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

PC101

1 2

GFX@PC101

GFX@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PR138
@ PR138

@

4.7_1206_5%

4.7_1206_5%

12

PC113
@ PC113

@

680P_0603_50V7K

680P_0603_50V7K

+5VS

12

12

PC103

PC102

GFX@PC103

GFX@

GFX@PC102

GFX@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PL12

GFX@ PL12

GFX@

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

GFX@

GFX@

3.65K_0402_1%

3.65K_0402_1%

GFX@ PR144

GFX@

7.5K_0402_1%

7.5K_0402_1%

1 2

.1U_0402_16V7K

.1U_0402_16V7K

GFX@

GFX@

ISPG

1

4
3

2

PR141

PR141

GFX@ PH4

GFX@

PR144

10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

1 2

1 2

PR147

GFX@ PR147

GFX@
11K_0402_1%

11K_0402_1%

1 2

PC117

GFX@ PC117

GFX@

1 2

PC118

PC118

0.047U_0402_16V4Z

0.047U_0402_16V4Z

ISNG

12

PR152 0_0402_5%@PR152 0_0402_5%@

PH4

1

GFX_B+

+VGFX_CORE

1

+

+

PC111

12

PR142

GFX@ PR142

GFX@

1_0402_5%

1_0402_5%

PC115

GFX@ PC115

GFX@
.1U_0402_16V7K

.1U_0402_16V7K

1 2

12

PR151

PR151
953_0402_1%GFX@

953_0402_1%GFX@

Connect to +5V can disable
GFX portion

PC111

330U_X_2VM_R6MGFX@

330U_X_2VM_R6MGFX@

2

GFX_B+

2

PJ21

PJ21

2

JUMP_43X39

JUMP_43X39
@

@

1

1

FBMA-L11-322513-151LMA50T_1210

FBMA-L11-322513-151LMA50T_1210

PL11

5

12

PC125

PC125

PC124

PC124

PQ35

PQ35

4.7U_0805_25V6-K

CSD17308Q3_SON8-5

CSD17308Q3_SON8-5

PQ36

PQ36

PQ37

PQ37

CSD17308Q3_SON8-5

CSD17308Q3_SON8-5

PQ38

PQ38

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

CPU_B+

4.7U_0805_25V6-K

12

PR166
@ PR166

@

4.7_1206_5%

4.7_1206_5%

12

PC140
@ PC140

@

680P_0603_50V7K

680P_0603_50V7K

12

PC147

PC147

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PR183
@ PR183

@

4.7_1206_5%

4.7_1206_5%

12

PC151
@ PC151

@

680P_0603_50V7K

680P_0603_50V7K

123

5

123

5

123

5

123

2

CPU_B+

12

12

PC126

PC126

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR169

PR169

3.65K_0402_1%

3.65K_0402_1%

VSUM+

1 2

10K_0402_1%

10K_0402_1%

ISEN2

PR168

PR168

1 2

PR170

PR170

VSUM- ISEN1

1 2

1_0402_5%

1_0402_5%

12

12

PC149

PC149

PC148

PC148

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR185

PR185

3.65K_0402_1%

3.65K_0402_1%

VSUM+

1 2

10K_0402_1%

10K_0402_1%

ISEN1

PR184

PR184

1 2

1_0402_5%

1_0402_5%

VSUM-

PR186

PR186

1 2

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

PL11

1 2

1

+

+

PC127

PC127

2

68U_25V_M_R0.44

68U_25V_M_R0.44

PL13

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

PL13

1

4
3

2

PR171

PR171

10K_0402_1%

10K_0402_1%

PL14

PL14

1

4
3

2

10K_0402_1%

10K_0402_1%

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019BI

1

+CPU_CORE

12

+CPU_CORE

PR187

PR187

ISEN2

12

54 55Tuesday, December 14, 2010

54 55Tuesday, December 14, 2010

54 55Tuesday, December 14, 2010

B+

A

A

A

5

PJ20

VGA_ON

PJ20

2

JUMP_43X118@

JUMP_43X118@

10U_1206_25V6M

10U_1206_25V6M

PR194

VGA@ PR194

VGA@
10K_0402_1%

10K_0402_1%

1 2

112

VGA@ PC152

VGA@

PC152

12

10U_1206_25V6M

10U_1206_25V6M

+3VS

PR192

@PR192

@
10K_0402_5%

10K_0402_5%

1 2

12

VGA@ PC159

VGA@
.1U_0402_16V7K

.1U_0402_16V7K

B+_CORE

PC153

VGA@ PC153

VGA@

PC159

12

VGA_PWROK

B+

D D

VGA_ON

7,45

C C

Vtrip range ==> 0.2V ~ 3V
VFB=0.7V

V=0.7*(1+Rtop/Rbottom)
Fsw=350KHz

B B

Cout ESR=12m ohm Rdson(max)=3.2 mohm Rdson(typ)=2.6 mohm.
Ipeak=41.02A, Imax=28.714A, Iocp=43A
Delta I=((19-0.9)*(0.9/19))/(L*Fsw)=6.8A
=>1/2Delta I=3.4A
choose Rcs=75K
Iocpmax=((75K*11uA)/0.0013)+3.4A=75.52A
Iocpmin=((75K*9uA)/(0.0016*1.35))+3.4A=48.42A
Iocp=48.42A~75.52A

GPU_VID1

P0(Cold)

A A

P0(Hot)
P8/P12

GPU_VID0

0

1

1

0
1

1

NVIDIA/N12P-GS

ES --------

5

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

1.0V

0.975V

0.825V

----

VGA@

VGA@

4

+3VS

12

PR188

@ PR188

@

10K_0402_5%

10K_0402_5%

PU11

VGA@PU11

PR190

VGA@ PR190

VGA@
75K_0402_1%

75K_0402_1%
1 2

1 2

PR191

VGA@ PR191

VGA@
200K_0402_1%

200K_0402_1%

Switch freq. (RF pin setting)
47K ==>450KHz
100K ==>390KHz
200K ==>350KHz (Currently setting)
470K ==>300KHz

VGA@

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

RT8237_SON10_3X3

RT8237_SON10_3X3

VFB=0.7V

VBST

DRVH

V5IN

DRVL

BST_VCORE

10

DH_VCORE

9

SW_VCORE

8

SW

7

DL_VCORE

6
11

TP

TPCA8057-H Rds=2.6m/3.2m ohm

@

16.2K_0402_1%

16.2K_0402_1%

PQ44A

PQ44A

NVIDIA/N12P-GV1

VGA@ PR222

2

G

G

12

VGA@ PC163

VGA@
4700P_0402_25V7K

4700P_0402_25V7K

VGA@
10K_0402_5%

10K_0402_5%

1 2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

61

D

D

S

S

PR222

PC163

PR220

@ PR220

@

10K_0402_5%

10K_0402_5%

VGA@

VGA@

PQ44B

PQ44B

+3VSDGPU

VGA@ PR216

VGA@
10K_0402_5%

10K_0402_5%

1 2
12

12

PR219

@ PR219

1.025V

1.0V

0.85V

0.925V

4

3

5

PQ39

VGA@ PQ39

VGA@

123

CSD17308Q3_SON8-5

CSD17308Q3_SON8-5

DL_VCORE

5

D

D

S

S

Compal Secret Data

Compal Secret Data

Compal Secret Data

VGA@

VGA@

123

12

61

G

G

Deciphered Date

Deciphered Date

Deciphered Date

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

2200P_0402_25V7K

2200P_0402_25V7K

PQ41

PQ41

4

PC160

VGA@ PC160

VGA@

2

12

VGA@ PC162

VGA@
4700P_0402_25V7K

4700P_0402_25V7K

VGA@

VGA@

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PQ43A

PQ43A

4

PQ40

PQ40

4

PR205

GV@ PR205

GV@

10K_0402_1%

10K_0402_1%

GPU_VID2 22

PR189

VGA@ PR189

VGA@
0_0603_5%

0_0603_5%

1 2

+5VALW

VGA@

VGA@

PC155

PC155

1 2

1U_0603_6.3V6M

1U_0603_6.3V6M

PR216

VGA@ PR225

VGA@

34

D

D

10K_0402_5%

10K_0402_5%

5

G

G

S

S

AP

AP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VGA@ PC154

VGA@

0.1U_0603_25V7K

0.1U_0603_25V7K
1 2

+3VSDGPU

PR225

12

3

PC154

PR205

GS@ PR205

GS@

8.25K_0402_1%

8.25K_0402_1%

VGA@

VGA@

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PR223

@PR223

@
10K_0402_5%

10K_0402_5%

1 2

12

PR224

VGA@ PR224

VGA@
10K_0402_5%

10K_0402_5%

2010/07/13 2011/07/13

2010/07/13 2011/07/13

2010/07/13 2011/07/13

5

123

PR208

VGA@ PR208

VGA@
10K_0402_5%

10K_0402_5%

1 2

PC162

@ PR209

@

10K_0402_5%

10K_0402_5%

PQ43B

PQ43B

2

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

12

VGA@ PR193

VGA@

4.7_1206_5%

4.7_1206_5%

12

VGA@ PC158

VGA@
680P_0603_50V7K

680P_0603_50V7K

VGA@

VGA@

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

12

PR200

VGA@ PR200

VGA@
10K_0402_1%

10K_0402_1%

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

+3VSDGPU

VGA@ PR207

VGA@
10K_0402_5%

10K_0402_5%

1 2
12

PR209

AP

AP

2

PL15

VGA@ PL15

VGA@
3
4

PR193

PC158

PR198

GS@ PR198

GS@

1.82K_0402_1%

1.82K_0402_1%

12

VGA@

VGA@

PR207

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

VGA@ PR214

VGA@

34

D

D

10K_0402_5%

10K_0402_5%

5

G

G

S

S

1

2
1

ESR=10mohm

12

PR195

VGA@ PR195

VGA@
0_0402_5%

0_0402_5%

PR196

VGA@ PR196

VGA@
10_0402_5%

10_0402_5%

12

PR198

GV@ PR198

GV@

2.15K_0402_1%

2.15K_0402_1%

1 2

1 2
61

D

D

PQ42A

PQ42A

S

S

PQ42B

VGA@

PQ42B

VGA@

+3VSDGPU

PR214

12

1 2

12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

GCORE_SEN

GS@ PR201

GS@

6.49K_0402_1%

6.49K_0402_1%

PR201

GV@ PR201

GV@

8.66K_0402_1%

8.66K_0402_1%

2

G

G

12

VGA@ PC161

VGA@
4700P_0402_25V7K

4700P_0402_25V7K

VGA@ PR211

VGA@

34

D

D

S

S

PR213

@PR213

@
10K_0402_5%

10K_0402_5%

VGA@ PR215

VGA@
10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

5

G

G

GPU_VID0 22

PR215

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

4019B

SCHEMATIC,MB LA-A7121

I

PR201

PR203

VGA@ PR203

VGA@
10K_0402_5%

10K_0402_5%

1 2

PC161

PR211

12

1

VGA@+PC157

VGA@

+

330U_D2E_2.5VM

330U_D2E_2.5VM

2

VGAVCC_SENSE 23

+3VSDGPU

VGA@ PR202

VGA@
10K_0402_5%

10K_0402_5%

1 2

@PR206

@
10K_0402_5%

10K_0402_5%

1 2

+3VSDGPU

PR210

10K_0402_5%

10K_0402_5%

1 2

12

@ PR212

@
10K_0402_5%

10K_0402_5%

1

+VGA_COREP

PC157

PR202

PR206

VGA@PR210

VGA@

GPU_VID1 22

PR212

55 55Tuesday, December 14, 2010

55 55Tuesday, December 14, 2010

55 55Tuesday, December 14, 2010

A

A

A

of

of

of

A pahse
09/23

No01: P45, chnge Q2407 and Q2408, change DC interface part number,
change Q2407,2408,2410,2413,2414,2416,2423,2424 to SB00000EO10
No02: P15, change PCH_GPIO32 to CLKRUN# and pull down
No03: P18, delete Optimus_EN# and change to GPIO38

09/24

No04: P05,P16,P17,18, delete JXDP2 and relative intersheet symbols.
No05: P46, add 3P3 * 6
No06: D2100 swap from layout
No07: delete DCR and COLOR_ENG_EN function
No08: add LID_SW function and revise FAN circuits to following JM50 and NELA0
No09: add 3G@ for WWAN
No10: add R385 for reserved VCCIO_SEL pull high
No11: change CPU 60pin XDP to 26pin, revise relative circuits

09/27

power circuits combined
No12: change WWAN circuits (EC_SIM_DETECT, UIM_DET, WWAN_DET#)

D D

09/28

No13: P39, add pull high +3VS at UIM_DET
No14: P22, reserve SM bus 0 ohm
power circuits combined
No15: P07, From JM50, change VCCIO_SEL PU from +3VALW to +3VS, should check
No16: P19, From JM50, delete R300 (+1.8VS path to +VCCAFDI_CRM)
No17: P35, Only UMA path, delete 0 ohm at the path
No18: P97, From JM50, change D2416 symbol and add D2402, change R2536 symbol
No19: P43, From JM50, delete power delay circuits (DGPU_PWR_EN to VGA_ON, SUSP# to VS_ON)
No20: P46, change Power board conn 4 pin SP01000R400
No21: P42, From JM50, HDD LED sources from PCH and CR
power circuits LA-7121P_R01_20100928A.dsn combined
No22: P41, Power/ Jackie: delete IMVP_IMON, no need
No23: P41, move PLT_RST# pull low from R2226 to R388
No24: P3, add part location define
No25: P18 and P35, From JM50, delete CRT_DET# (don't use this pin) and change CRT_DET to PCH_GPIO0
No26: P17 and P37, From JM50, change OC pin from USB_OC1# to USB_OC0#
No27: P13, From JM50, change R107 to 0 ohm
No28: P42, reserve C2402
No29: P42, change JKB1 to SP01000R500, JTP1 to SP010014M00
No30: P97, change JUSB3 to DC233007O00
No31: P39, modify UIM_DET function, reserve WWAN_OFF# path

09/29

No32: P17 and 39, change WWAN from USB port 11 to port 9, and update page 3 table
No33: P14, change name : PEG_CLKREQ_R# to PEG_CLKREQ#_R
No34: P05, delete SM bus to XDP
No35: delete No31
No36: P13, add R25 at HDA_SYNC_R for potential leakage concern, (DG1.5)
power circuits JMSJM_20100929.dsn combined
No37: P42, From JM50, delete Q2431, no need to reserve it
No38: P42, from JM50, modify BATT LED circuits (need to confirm P/N);

combine PWR_LED# and PWR_SUSP_LED# and change source from +3VS to +3VALW
No39: P42, from JM50 GPIO table,
pin 16: USB30_LED# and rename USB3_LED# to USB30_LED# for related circuits
pin 19: NC, and delete SUSWARN# from PCH.
pin 21: 3G_LED#
pin 25: NC
pin 70: EC_SIM_DETECT
pin 73: PWR_SAVE_LED#, and add this signal to LAN connector
pin 86: H_PROCHOT#_EC
pin 89: PWRSHARE_OE#
pin 97: NC
pin 103: EC_PME#
pin 106: CPU1.5V_S3_GATE

C C

pin 108: SA_PGOOD
pin 118: NC

09/29

No40: P02, modify block diagram
No41: P04, P34, reserve eDP 2 lane
No42: P42, reverse KB conn pin define (pin1 different from the old one)
No43: P44 and P97, change USB3.0 and Codec
No44: P46, change power conn name to JPWR1
No45: P39, correct name: +3V_WWAN to +3VS_WWAN;

delete PCIE IF;
add 4 x 0 ohm for WWAN_DET# and UIM_DET
No46: P41, change EC pin define (from EC Donate), add AD_PID0

No47: P09, From JM50, delete +1.5V_CPU_VDDQ and delete JP2 from +1.5V

09/30

No1: P41, EC pin define change
pin 106: PWR_SAVE_LED# (USB30_LED# delete y customer)
pin 118: NC

No2: P17, P37, delete JUSB1 (will on daughter board), delete R2434 (already PU at PCH)
No3: P14, From JM50, add PCH_GPIO44 back; delete R95
No4: P14, P44, for USB30 clock, install R173, R2538, uninstall R2535, Y2400, C2607, C2608
No5: P14, From JM50, due to no PCH XDP, delete JTAG_TMS, TDO, TDI, add TP
No6: P15, From JM50, change CLKRUN# to PCH_GPIO32, Add pull high 8.2K
No7: P18, From JM50, add T63 to T80
No8: P20, From JM50, uninstall R303, install Q12, C174, R307
No9: P41, From JM50, Change PWRSHARE_OE# to USB_CHARGE_CB, Change PWRSHARE# to USB_CHARGE_EN#
No10: P46, install R2584 for phase A test
No11: P44, delete USB30_LED# circuits
No12: P43, From JM50, move USB3 conn and related power switch to P43
No13: P36, From ESD Jeremy, change HDMI ESD L2110~L2113 to SM070000K00 and install them;
No14: P37, P96, From ESD Jeremy, change USB ESD L2110~L2113 to SM070000K00 and install them;

10/2

No1: P7, From JM50, delete CPU AN35, AM35 signal
No2: P9, From JM50, delete Q15 and change R83,R85 to 1k
No3: P13, From JM50, delete GPIO13, GPIO33 and test point
No4: P13, From JM50, delete GPIO21 pull low and board ID function
No5: P17, From JM50, delete R2475, change DGPU_PWR_EN to VGA_ON, DGPU_PWR_EN# to VGA_ON#
No6: P17, From JM50, delete R331 (DGPU_HOLD_RST# pull high)

B B

No7: P18, From JM50, install R285
No8: P18, From JM50, delete R384 PWR_SAVE#
No9: P22, delete not neccessary part R1423
No10: P38, From JM50, reserved HDD +3VS
No11: P41, From JM50, temporarily follow the name: active high: PWR_SUSP_LED, PWR_LED, wait for EC definition
No12: P42, From JM50, same as No11, add MOS to reverse the 2 signals
No13: P42, From JM50, change PWR_STAT key to KB matrix, and change LAN connector pin define (PWR_SAVE# --> KSI1, KSO0)
No14: modify LAN board conn, now use 24 pin, will study 20 pin ok or not
No15: revise P91~99 small board
No16: P42, From JM50, swap BATT_AMB_LED# with BATT_GRN_LED#, change HDD LED and R, change Wireless LED part and to +3VS
No17: P46, From JM50, change PWRBTN_LED# to PWR_LED#
No18: P22, From JM50, add NV_PERFORMANCE to GPIO12, GPIO18
No19: P7,P11,P12, install M1@ and change M3@ to @
No20: P43, From JM50, U2414.5 change power source to +USB3_VCCA, Delete R2619

10/4 Bryant Hou

Update JP4=>JUSBFPC1
C1576 390U=>220U
USB3.0 & HDMI Conn Footprint
U2419 footprint(need you chk)
Combine new pw circuit
Add original JUSB1 circuit
Del JUSB2 circuit
add Speaker

10/5

No1: P46, add USBFFC1 back and modify pin(add SPKR signal)
No2: P46, modify JLAN1, delete 1 +3VALW, add 1 GND
No3: P37, delete R2434 (double pull high)
No4: P43, From JM50, update U2414 symbol
No5: P13, From JM50, add Q4 and R100 for Audio Issue
No6: P43, Layout request, L2402, L2403, L2404 swap N-P
No7: P22~P30, From JM50, based on JM50 circuits and JM30 part reference,
(but delete VGA_HDMI_DET and HDMI output, IFPC power circuits, change PEG names)

No8: P45, From JM50, Due to the change of GPU pages, DC interface changes too
No9: page 34~46 change to page 31 to 43

power page from P44 to P52
EE modify list : p99

No10: page12, From connector list,

A A

change JDIMM2 to SP07000NN00,
change JLVDS1 to SP010013I00,
change JCRT1 to DC060003L00
change JKB1 to SP01000GE00

No11: delete No7 and No8, change back original dGPU, add C1595~C1603, add R1498~R1506
, modify some R, C values

No12: From power, P46, change reset button connection to 3V5V EN
No13: for JM30/40/50/power common name: change +3VS_DGPU to +3VSDGPU

No14: P37, From JM50, change R2435 from 10K to 0 ohm
No15: P43, From JM50, Delete U36.1 net USB_Charge_EN#
No16: P41, From JM50, Add EC GPIO

Pin 118-->NV_PERFORMANCE
Pin 25-->USB_Charge_100mA
Pin 18-->USB_Charge_2A#

5

5

4

No17: From conn list, P40,update JREAD1 to DC021010041, update JUSB3 to DC231003030
No18: P37, From ESD Jeremy, change USB ESD to SC300000O00
No19: P46, From ESD Jeremy,add PWR board conn ESD SCA00000E10

10/6

No1: P13, change BIOS conn SP07000F500
No2: P43, From ESD Jeremy, install D2416, D2402
No3: P5, From ME, change JXDP1 to SP01000N300
No4: P46, delete JUSBFPC1
No5: P3, From EC Donate, update PID table
No6: From ME conn list, change JHDMI1: DC232001100; JLAN1: SP02000OH00
No7: Update symbol: SW2400,SW2401, C1405~1436, C1457, C1458, C1300, C1314, C1451~1453, R229~R231, R2619, Q2429
power circuits JMSJM_20101006.dsn combined:

1.Swap some component between NTC and NTCG.

2.Delete PC128

3.Add +0.75VSP on power IC side.

4.PQ41 on VGA low side.

5.Change PQ25 to SIS412DN.

6.Change PQ26 to SI7716.

7.Swap PH1 and PH2.

8.Delete PD4.

7.Add PL16 for EMI.

10/7

No1: Update footprint: R229, R230, R231 -- RP_0804_8P4R
No2: Update symbol: R51, R214, Q2406, Q2414, Q2416, Q2423, Q16, U2402, U2401

10/8

No1: P18, from checklist and CG5, pull down PCH_GPIO36 and 37
No2: P7,From JM50, delete R and add T82~85 on VAXG_VAL_SENSE ...
No3: P11,12, From JM50, delete R2039, R2041 M3 function
No4: P22, From JM50, add GPU_VID2
No5: P23, change part reference, R755~R760 change to R1507~1512
No6: P25, From JM50,delete C1597, C1598 and add R1513, R1514 to GND
No7: P23, From JM50, install R1431
No8: P25, From NVIDIA, reserve one 0 ohm R1515 to connect to +1.05VSDGPU

10/11

No1: P46, change JUSBFFC1 pin definition: add 1 +5VS and delete 1 GND
No2: P15, From JM50, R186.2 connect to PCH_PWROK
No3: P14, for Layout request, shrink C180, C181 to 0603
No4: P13, from Lance, move R122 and R25 to audio sub board
power circuits JM30_20101011C.dsn combined:

Change item-->Back the pull-up power to +3VSDGPU for GPUVID, add GPU_VID2
No5: P25, change R1515 connection to +1.05VS_DGPU

No6: P15, delete D2
No7: P22, delete C1440, add R1516, R1517
No8: P22, From NV DG:
for PLL, delete C1595, for NVVDD, delete C1442(330u), C1443~C1445, for PEX_PLLVDD, delete C1500, for FBx_PLLAVDD, delete C1508, C1513

No9: P15, install R196
No10: P22, From NVCARE, GPIO12 pull high(R1404), and NV_PERFORMANCE(D1400) use diode to prevent leakage,
delete R1409, R1402, R1403, T1400, change C1~C32 X7R

No11: P23, From NVCARE, add reserved 10K pull down on JTAG_TCK
No12: P43, delete USB_100MA_OC# (wait the symbol ok)
No13: P39, change P39 +UIM_PWR_C to +UIM_PWR

10/12

No1, From JM50, P17, P18, Change WWAN_OFF# from GPIO51 to GPIO37; Change WL_OFF# from GPIO55 to GPIO49
No2, From JM40, P42, change TP switch: SN111002700, P46, change reset key:SN100003A00
No3, From JM40, P46, change JPWR1 pin definition
No4, From JM40, P41, change ESD solution connection from SPI_CLK_R to SPI_CLK
No5, From JM40, P39, add R2625 pull high for WWAN_LED#
No6, From JM40, P18, change back PCH_GPIO38 to OPTIMUS_EN# and modify PU/PD
No7, P17,P18, check PCH power, delete L4, R296, L7, R325 and change C176, C199 from 0805 to 0603
No8, From ME, P42, BAT LED should be Top view, change LED2406 and LED2408 circuits
No9, From JM40, P41, reserve a path +3VLP to EC
No10, From RF, add C216, C217 for PCI CLK
No11, for BOM upload, change JUSBFFC1 to JUSBFC1, LED24xx to LED1,2,3,4,5; add ZZZ1
No12, for BOM upload,
change C1137, C1134, C1138, C1141 to SE074102K80,
change JP1 and JP3 "@",
change Q59~Q62, Q1301, Q2100, Q2102~Q2109, Q2404, Q2409, Q2417, Q2426, Q2433, Q2434 from SB570020120to SB000008J10,
change JXDP1, JSPK1 and JSPK2 "CONN@",
update C2726, C1309, C1400, C1509, C1514, C1446, C1447, C1480, C1487, R1483, R1486, R170, R173,
R393, R1455, R1456, R1463, R1464, R1470, R1471, R1478, R1479, D2102, D2103, Q16
change T* to "@"

10/13

No1, From JM40, P39, change D2409 part for BOM
No2, for BOM upload,

change R1300 to SD00000BN80 (0603), change C2489, C2493, C2496, C2494, C2495, C2487, C2491, C2488, C2492, C2497, C2485
No3, From JM40, P43, modify USB30 charger function

No4, From JM40, P46, change SW2403 to SN400000I00
No5, From Diode common, 2N7002 (SB000008J10), 2 in1 2N7002 (SB00000EO10), BSS138 (SB501380020)

No6, for BOM upload, update C1321, C2101, C2107, C2217, C2475, C2477
No7, for Layout request, update H2424 footprint, delete H2414
No8, follow nvidia, delete R1499~R1504, change C1~C32 to 0.1uF X7R

10/14

No1, P27, add GND connection: +FB_AVDD0, +FB_AVDD1
No2, P13, change R126 connection to HDA_SDOUT to HDA_SDOUT_R
power circuits JM30_20101014.dsn combined:
No3, P46, From Layout request, delete H2421 H2419 (netlist 1B)
No4, P36, From Layout request, swap L2110~L2113, (netlist 1C)
No5, P46, From Layout request, change H2423, H2422 footprint, (netlist 1D)
power circuits JM30_20101014A.dsn combined:

10/15

No1, P37, add JUSB2 (standard type USB for study)
No2, P46, From Lance, change reset key to SN111002700
No3, From JM50, update connector list, change JBT1 to 6pin : SP02000FR00
No4, From layout request, H2423 , H2422 , H2420 , H2418 change to H_3P3, change JHDMI1 to SUYIN_100042GR019M23BZR_19P-S
No5, From JM50, change reset and D-door shut down solution
No6, From JM50, change BAT ID BTN from KSI0 to KSI2
No7, P39, change EC_SIM_DETECT to EC_SIM_DETECT# due to low active
No8, P18, P39, delete UIM_DET_PCH and WWAN_DET#_PCH path
No9, P39, change +3VS to +3VS_WWAN circuits

10/18

power circuits JM30_20101018.dsn combined:
No1, P44, From JM40, add R2631~R2634
No2, P41, From JM40, change +3VLAW to +3VALW_EC for 2 power sources
No3, P38, From JM40, change JHDD1 pin define
No4, P34, rename R478, R479, to R2154, R2155; change C492, C493 to C2151, C2152
No5, P39, From JM50, add WLAN1 components for BT: R2635, R2636, D2432, Q2436
No6, P43, P44, From JM50, change USB3 conn from port 2 to port 1
No7, P13, From JM50, add PCH_GPIO19 pull high R394
No8, P18, From JM50, add PCH_GPIO28 pull high R395
No9, P44, From JM50, change U2412 to SA000046000
No10, P39, From JM50, change WWAN circuits
No11, (sourcer Amy requests, from Bryant mail 10/18 09:41PM)

change D2434 to SC600000B00,
change D3, D4, D5, D6, D1400, D2106, D2107, D2200, D2401, D2429 to SCS00000Z00,
change C1~C32, C1405~C1436, C1457, C1458 to SE076104K80

10/19

No1, P5, change JXDP1.13 from VGATE to SYS_PWROK
No2, P37, delete JUSB2
No3, P41, add R2234, T2217, T2218
No4, From JM50, P44, change 11 cap from 0.1u to 0.01uF (C2572~C2576, C2578~C2583)
No5, P46, reverse JFAN1 pin definition
No6, P14, P7, add CLK_CPU_ITP / CLK_CPU_ITP# path
No7, P37, add JUSB2 back (colay )

10/20

No1, From ME, P13, change U4 from SP07000F500 to SP07000OJ00
No2, P33, From JM40, change VGA strap definition
No3, P14, P7, delete 10/19 No6, reserve test point
power circuits JM30_20101020.dsn combined:
No4, P37, From layout request, L2401 swap
No5, P24, add 1 more 330uF for power study
No6, P34, reseve JLVDS1 pin7,8 for COLOR_ENG_EN and DCR
No7, From JM40, P29, P30, change OPT@ to GS@
No8, From JM40, P22 to P33, modify some parts to GS@ and GV@
No9, From JM40, P14, P44, for USB3 wake up function, uninstall R173, R2538, install R2535, C2607, C2608, Y2400
power circuits JM30_20101021.dsn combined:
No10, From JM40, P15, install R197
No11, From JM40, P44, Change USB3.0 power name +3V to +3V_USB3, Change USB3.0 power name +1.05V to +1.05V_USB3
No12, From JM40, P37, P43, ,use ABO common part, change U2400 and U2411 to AP2301MPG-13_MSOP8 (Follow HW3 Standard Part)

10/21

power circuits JM30_20101021.dsn combined (power revises)
No1, P22, From JM50, delete D1400 and add Q1400
power circuits JM30_20101021.dsn combined (revise +VGFX_CORE jumps)
No2, From JM40,

P33, add U2102 circuits for INVTPWM ESD
P44, add R2637, R2638, R2639, (Follow Vendor suggestion), change power name +3VA to +3VA_USB3
P43, add D2435, D2436, R2640, (Stuff diodes to gate backflow from EC or PPON1)
P39, change U2420.8 from +3VALW to +3VS

No3, P39, change D2431 to 2N7002
No4, P33, add J2 for GND_LVDS for GND noise solution
No5, P39, rename +3VS_GATE to +3VS_WWAN_GATE, and add BT_ON# intersheet
No6, from DRC check, delete some redundant nets
No7, P53, power changes +VGFX_CORE

4

3

3

2

10/22

No1: P43, From JM50, change D2435 from SCS00000Z00 to SC600000B00
No2, P33, delete 10/21 No 4 (add J2 for GND_LVDS for GND noise solution)
No3: P46, from ME request, add SPVS320200 for open door shut down function
No4: P46, change S1@ to install, S2@ to @
No5: P15, install R197 back
No6: P3, modify BOM config

10/24

No1: update schematics part and footprint: L2406, L2407, D2432, Q2436, D2427, C1130~C1133
No2: P46, change U2407 to AO4430L_SO8 for more power eating

10/25

No1: P41, P42, change netname from BATT_GRN_LED# to BATT_BLUE_LED#
power circuits JM30_20101025.dsn combined
No2: P05, delete XDP and related circuits
No3: P39, swap L2406, L2407
No4: P46, change P/N only: SW2405 SN400000Z00 (ALPS P/N: SPVS410100)
power circuits JM30_20101025A.dsn combined
No5: From JM40, P13, change SPI ROM (&U1) to SA00003K800

10/27

No1: From JM40, update P/N: PCH SA00004EE10
power circuits JM30_20101027.dsn combined ( for VID)

10/29

No1: From JM40, P44, change USB3.0 number to SA000048H00

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2008/08/10 2010/12/31

2008/08/10 2010/12/31

2008/08/10 2010/12/31

Deciphered Date

Deciphered Date

Deciphered Date

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

D

D

D

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

56 57

56 57

56 57

A

A

A

11/10 A phase SMT MEMO and Rework instruction
11/3

No1: P33, change X76@ R1491 samsung 64*16 PD 20K (from 25K)

11/5 SMT MEMO

No2: P33, change VRAM P/N: from SA00003MQ60 to SA000047Q20, from SA00003VS10 to SA00003YO00
No3: P44, uninstall R2637, R2639, install R2638 for BIOS setting from high active to low active

11/6 rework instruction

No4: P43,44, delete PPON1 signal and change D2435

11/8 rework instruction

No5: P41, add 10K pull high R2235 for EC_PME#

11/10 rework instruction

No6: follow nvidia Johnson Yeh, for N12P-GV strap pin:
below strap setting would need to be changed for N12P-GV-ES

1. ROM_SCLK: pull up 15K ohm.

2. ROM_SO: pull up 10K ohm.

3. STRAP2: pull up 45K ohm.

D D

4. STRAP3: pull down 5K ohm.

5. STRAP4: pull down 10K ohm.

6. STRAP_REF2, need to stuff with 40K ohm 1%.

7. PGOOD (pin E7) stuff 10K ohm.

11/11

No7: From DFB request, P46, change SW2402 to SN100001D10 (P5LM0 design)
No8: From JM40, change JUSB1 to TopYang DC021011051

11/12

No9: P41, delete colay EC BIOS ROM U2203
No10: P41, P46, Follow JM40 design, add EAPD signal for MUTE function in EC common code
No11: P37, change reserved JUSB2 P/N
power circuits JM30_2010-11-12A-FOR DCIN CONNECTOR.dsn combined

11/15

No12: P46; P34, change JUSBF1 P/N to SP01000GO00 (28 pin), and add DMIC_CLK, DMIC_DATA;
change JLVDS1 pin definition, but later should confirm with JM40/50
No13: P46, change JFAN1 P/N to SP02000H900 and swap pin definition

No8: JUSB1 footprint change because not sync up with ME

11/16

No14, P39,, change JWLAN1 pin definition: delete pin 17,19, 8, 10, 12, 14, 16;
P17, and delete R249 for no-use PCI CLK to WLAN
No8: change JUSB1 to TopYang DC021011051 and use DC021011050 footprint

No15, P37, delete JUSB2
No16, P43, change C2595 to SGA00002N80

11/19

No17, P43, add ON/OFF pull high R2467 to +3VALW_EC and unmount R2466
No18, From connector list v28, P43, JUSB3 to DC233008O00
No19, P46, (1) delete Open door shut down key (move to sub board), add 1 connector for this function;

(2) change reset key function, delete unmounted components
No20, P18, For VGA sequence logic, add circuits to DGPU_PWROK, and from pull high to pull low

11/24

No21, P44, To avoid leakage, delete R2638 0 ohm and add D2418
No22, P46, add H2414 7P0

11/25

No23, P44, To avoid SMIB leakage, Follow JM40 to do this circuit
No24, P14, reserve SMBUS 0 ohm: R396, R397, R398, R399

C C

11/26

No25, P43, revise USB3.0 function table
power circuits JM30_20101125.dsn combined

11/29

No26, P18, modify No20, delete VGA_PWROK path and add PMOS
No27, P46, modify P19, add back unpop parts, and reserve 0 ohm test resistor for open door function, use S1@ and S2@ to distinguish them
No28, P17, delete VGA_ON pull high
No29, P44, Modify No23, add pull low, change 2N7002
No30, P15, Follow JM40, change R210 to PCH_RSMRST#_R instead of PCH_RSMRST#
No31, P22, Follow JM40, change R1404 PU location from R1496.2 to Q1400.3
power circuits JM30_20101129.dsn combined
No32, P41, change Board ID:R2230 8.2K
No33, P34, From JM50, for LVDS rise sequence, change R2102 from 1K to 10K, change C2100 from 0.047u to 4.7U

11/30

No34, P18, modify VGA sequence - using 2 NMOS
No35, P46, modify reset and shut down function - delete S1@ and S2@ optional

12/1

No36, Follow JM40 2nd source,
D2101, D2105 change to SCS00003H00
D2417, D2427, D2435 change to SC100001K00
C186, C1459, C1473, C1474, C1477, C1478, C1484, C1485, C1498, C1506, C1510, C1515, C1538, C1539,
C1540, C1541, C1566, C1567, C1568, C1569, C1577, C1578, C1579, C1580, C1603, C2466 change to SE000000K80

No37, P34, 46, add EMI solution for DMIC_CLK, DMIC_DATA
power circuits JM30_20101201.dsn combined
No38, P46, From JM40, modify reset button
No39, P45, From JM40, change Q2415 to SB000007O10
No40, From JM40, due to common parts "AND", change U10, U11 to SA00000OH00
No41, add +3VS_CARD 0 ohm for power consumption measurement
new power circuits JM30_20101201.dsn combined again

12/3

No42, P46, Follow JM40add 3V_LAN MOS to separate 3VALW

12/8

BOM change Change SB000008J10 to SB00000J200
description VRAM hynix 128*16 --> SA00003YO20

12/9 design change No47 P33 N12P-GV QS DevID: 0x1050,

B B

5

PageNo.Func.date

No43

P33

No44

VRAM samsung 64*16 --> value 0011

P46

No45design change For DC power consumption and pwer sequence, change R2485 to 100K, R2490 to 200K, R2496 to 750K

P17No46BOM change change C1317 from @ to BT@

1. ROM_SCLK: pull up 5K ohm.

2. STRAP2: pull down 5K ohm.

3. ROM_SO: pull up 10K ohm.

4. STRAP3: pull down 5K ohm.

5. STRAP4: pull down 10K ohm.

6. STRAP_REF2, need to stuff with 40K ohm 1%.

7. PGOOD (pin E7) stuff 10K ohm.

STRAP0: as same as N12P-GS with 45K pull up.
STRAP1: pull down 35K as N12P-GS

4

3

2

1

should change later

A A

P17 for VGA_ON pull high deleted, need to arrange RP instead R

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2008/08/10 2010/12/31

2008/08/10 2010/12/31

2008/08/10 2010/12/31

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

SCHEMATIC,MB LA-A7121

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

D

D

D

4019BI

4019BI

4019BI

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Tuesday, December 14, 2010

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

57 57

57 57

57 57

A

A

A