Compal LA-7092P P5WE6, Aspire 5253G, LA-7092P P5WH6, LA-7092P P5WS6, LA-7092P JE50 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

JE50/HM50/SJV50_BZ

P5WE6/P5WH6/P5WS6 Schematics Document

AMD Brazos

Brazos with Zacate / Hudson M1 / Seymour XT

3 3

DIS only / UMA only / PX Muxless / PX Muxless with BACO

ZZZ

2010-10-28

LA-7092P REV: 0.3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

ZZZ

PCB

Part Number = DA60000L000

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-7092P P5WE6/H6/S6

E

0.3

1 46Friday, October 29, 2010

0.3

A

B

C

D

E

Compal Confidential

Model Name : P5WE6/P5WH6/P5WS6 JE50/HM50/SJV50_BZ

1 1

PCB PN : DA60000L000

VRAM 512M/1G 64M16/128M16 x 4

page 23

DDR3

Brazos

Vancuver Seymour

ATI

Thermal Sensor

ADM1032

page 19

Page 18,19,20,21,22

LVDS

page 10

uFCBGA-962

2 2

CRT

page 12

PCI-Express x 4

Gen2

DP0

DP1

AMD Brazos APU

FT1 BGA 413-Ball 19mm x 19mm

page 5,6,7

UMI Gen.1 x4

PCI-Express

HDMI Conn.

page 11

2.5GT/s per lane

Memory BUS(DDR3)

Single Channel

1.5V DDRIII 800~1066MHz

USB port 0,1,2

USB Conn x 3

page 33 page 10 page 33

USB port 5 USB port 7

CMOS Camera

204pin DDRIII-SO-DIMM X2

USB port6

Card Reader RT5137

page 29

page 8,9

USB port 8

BANK 0, 1, 2, 3

Bluetooth Conn

Mini card (WL)X1

page 29

FCH

Hudson-M1

BGA 605-Ball

3.3V 48MHz

3.3V 24.576MHz/48Mhz

23mm x 23mm

page 30

port 0

Gen2

SATA ODD Su

LED

3 3

page 32

MINI Card

WLAN

page 29

RTC CKT.

page 13

LAN(GbE)

Atheros AR8151

page 26

GPP2GPP3

RJ45

page 26

LPC BUS

Power On/Off CKT.

page 34

page 13,14,15,16,17

ENE KB930

page 31

S-ATA

SATA HDD Conn.

b/B

port 1

USB

HD Audio

page 30

HDA Codec CX20584

page 27

MIC Jack x 1 HP Jack x 1 Int MIC x 1 Int SPK x 1

page 28

Power sequence

VGA

DC/DC

page 24,25

DC/DC Interface CKT.

4 4

page 35

Fan Control

page 34

Touch Pad

page 32

EC I/O Buffer

page 32

Int.KBD

page 32

BIOS

page 32

Extend Card/B

Security Classification

Power Circuit

page 36,37,38,39,40,41 42,43,44,45

A

1. USB X2

2. ODD X1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

LA-7092P P5WE6/H6/S6

E

0.3

2 46Friday, October 29, 2010

0.3

A

Voltage Rails

Power Plane Description

VIN

B+

+VSB VSB always on power rail ON ON*ON

1 1

+APU_CORE_NB

+1.5V

+0.75VS 0.75VS switched power rail for DDR terminator

+1.05VS

+1.1VS 1.1VS switched power rail ON OFF OFF

+VGA_CORE Core voltage for GPU ON OFF OFF

+1.5VSG 1.5V switched power rail for GPU ON OFF OFF

+1.0VSG 1.0V switched power rail for GPU ON OFF OFF

2 2

+3V_LAN 3.3V power rail for LAN ON ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address

Device

SM Bus Controller 0

Device Address

APU SIC/SID (FCH_SMB3)

3 3

H_THERMTRIP# (FCH_ALERT#)

SM Bus Controller 1

Device Address HEX

DDR DIMM1 (FCH_SMB0)

DDR DIMM2 (FCH_SMB0)

WLAN (FCH_SMB0 )

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU (0.7-1.2V) ON+APU_CORE

1.0V switched power rail

1.5V power rail for CPU VDDIO and DDRIII

1.05V switched power rail for APU VDD10 ON OFF OFF

EC SM Bus2 address

Address Address

(FCH_SMB1 ~ FCH_SMB4, SMB_AL ERT#)

(FCH_SMB0)

1001-000xb

1001-001xb

DeviceHEX

ADM1032 (GPU)

HEX

90

92

B

S1 S3 S5

N/A N/A N/A

ON ON ON*+3VALW 3.3V always on power rail

ON ON ON*+5VALW 5V always on power rail

ON OFF

ON OFF+1.8VS 1.8V switched power rail OFF

ON+RTCVCC RT C power ON ON

1001-101xb

N/AN/AN/A

ON ON*+1.1VALW 1.1V always on power rail ON

OFF

ON

OFF

OFFON OFF+3VS 3. 3V switched power rail

OFFON OFF+5VS 5V switched power rail

OFF+3VSG 3.3V switched power rail for GPU ON OFF

OFF+1.8VSG 1.8V switched power rail for GPU ON OFF

ON

HEX

9AH

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

EVT / DVT

Project ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

ON

OFF

ON

OFF

V typ

AD_BID

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

*UMA only :

D

BOARD ID Table

ON ON

ON

OFF

LOW

OFF

Board ID

0 1 2 3 4 5 6 7

Project ID Table

max

Board ID

0 1 2 3 4 5 6 7

BTO Option Table

BTO Item BOM Structure

Display from APU Display from VGA Use VGA Muxless w/BACO Muxless wo/BACO WOBACO@ Muxless w/Vancouver Serise w/Manhttan Serise MAN@ Bluetooth BT@ AR8151 8151@ Seymour wo/Muxless wo/VGA WOVGA@ APU 1.5G APU 1.6G

UMA@

BT@ 8151@

WOVGA@ WOPX@

E

PCB Revision

UMA@ DISO@ VGA@ BACO@

PX@ VAN@

Seymour@ WOPX@

15G@ 16G@

VGA Chip SEL:

1. Seymour@ + Van@

2. Robson@ + Man@

*DIS only :

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

*Muxless w/BACO : Muxless wo/BACO :

Deciphered Date

D

APU Chip SEL:

1. 16G@

2. 15G@

DISO@VGA@

UMA@ UMA@

WOBACO@

VGA@ BACO@PX@ VGA@ WOBACO@PX@

Date: Sheet of

BT@ 8151@

WOPX@

BT@ 8151@

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Compal Electronics, Inc.

Notes List

LA-7092P P5WE6/H6/S6

E

3 4 6Friday, October 29, 2010

0.3

5

Power-Up/Down Sequence

1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-up sequence, though a shorter ramp-up duration is preferred.

2. VDDR3 should ramp-up before or simultaneously with VDDC.

3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin before

D D

DPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10.

4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC and VDD_CT have ramped up.

5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts to ramp-up (or vice versa).)

4

3

2

1

Without BACO option :

PE_GPIO0 : Low -> Reset dGPU ; High ->Normal operation PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON

BACO option :

PE_GPIO0 : High ->Normal operation (dGPU is not reseton BACO mode) PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON (always High)

dGPU Power Pins Max current

PCIE_PVDD, PCIE_VDDR, TSVDD, VDDR4, VDD_CT, DPE_PVDD, DP[F:E]_VDD18, DP[D:A]_PVDD, DP[D:A]_VDD18, AVDD, VDD1DI, A2VDDQ, VDD2DI, DPLL_PVDD, MPV18, and SPV18

DP[F:E]_VDD10, DP[D:A]_VDD10, DPLL_VDDC, and

Voltage

1.8V

1.0V

PX 3.0

OFF

BACO Mode

ON

1679mA

575mA

SPV10

VDDR3(3.3VSG)

Note: Do not drive any IOs before VDDR3 is ramped up.

PCIE_VDDC

VDDR3 , and A2VDD

BIF_VDDC (current consumption = 55mA@1.0V, in

PCIE_VDDC(1.0V)

BACO mode)

VDDR1

C C

VDDR1(1.5VSG)

VDDC/VDDCI

1.0V

3.3V

Same as VDDC

1.5V

1.12V

OFF

ON

ON Same as PCIE_VDDC

OFF

2A

190mA

70mA

2.8A

12.9A

VDDC/VDDCI(1.12V)

VDD_CT(1.8V)

iGPU

PERSTb

REFCLK

B B

Straps Reset

Straps Valid

PE_GPIO0 PE_EN

dGPU

BIF_VDDC

PE_GPIO1

+3.3VALW

+1.0V

MOS

Regulator

+3.3VSG

1

+1.0VSG

2

PX_mode

+1.5V

BACO Switch

SI4800

+1.5VSG

3

Global ASIC Reset

+B

+1.8V

T4+16clock

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/08/20 2011/08/20

3

Compal Secret Data

Deciphered Date

SI4800

2

+1.8VSG

5

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

Compal Electronics, Inc.

LA-7092P P5WE6/H6/S6

Regulator

dGPU Block Diagram

4

1

+VGA_CORE

PWRGOOD

4 46Friday, October 29, 2010

0.3

5

4

3

2

1

+1.8VS

APU_HDMI_TX2P<11>

APU_RST#<13> APU_PWRGD<13>

APU_HDMI_TX2N<11>

APU_HDMI_TX1P<11>

APU_HDMI_TX1N<11>

APU_HDMI_TX0P<11>

APU_HDMI_TX0N<11>

APU_HDMI_CLKP<11>

APU_HDMI_CLKN<11>

APU_TXOUT2+<10> APU_TXOUT2-<10>

APU_TXOUT1+<10> APU_TXOUT1-<10>

APU_TXOUT0+<10> APU_TXOUT0-<10>

APU_TXCLK+<10> APU_TXCLK-<10>

T93PADT93PAD T94PADT94PAD

Close to APU

APU_SIC APU_SID

APU_PROCHOT# APU_THERMTRIP# APU_ALERT#_R

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

T77PADT77PAD

APU : SA00004DO60 (S IC ZACATE 2M151 132B1240 1.5G BGA)

APU : SA000046G80 (S IC ZACATE 2M161232B2240 1.6G BGA )

U22

16G@U22

16G@

Zacate FT1 B0

R399 1K_0402_5%R399 1K_0402_5%

1 2

R400 1K_0402_5%R400 1K_0402_5%

D D

C C

B B

1 2

R142 300_0402_5%

R142 300_0402_5% R401 300_0402_5%R401 300_0402_5% R402 510_0402_1%R402 510_0402_1% R141 1K_0402_5%R141 1K_0402_5%

+3VS

R410 1K_0402_5%R410 1K_0402_5%

R109 4.7K_0402_5%UMA@R109 4.7K_0402_5%UMA@

R155 4.7K_0402_5%UMA@R155 4.7K_0402_5%UMA@

R411 1K_0402_5%R411 1K_0402_5%

R143 1K_0402_5%R143 1K_0402_5%

R414 1K_0402_5%R414 1K_0402_5%

APU_THERMTRIP#

If FCH internal pull-up disable d, level-shifte r could be dele ted. Need BIOS to dis able internal p ull-up!!

12

12 1 2 1 2

C237 0.01U_0402_25V7K

@

1 2

C238 0.01U_0402_25V7K

@

1 2

R425

1K_0402_5%

APU_SVC APU_SVD APU_RST# APU_PWRGD TEST_25_L TEST36

APU_RST#

APU_PWRGD

APU_PROCHOT#

APU_CRT_DDC_SCL

APU_CRT_DDC_SDA

APU_ALERT#_R

APU_SIC

APU_SID

+3VS

12

R424

R424 10K_0402_5%

10K_0402_5%

B

2

1 2

Q79

E

3 1

C

MMBT3904_NL_SOT23-3

1 2

R427 0_0402_5%@R427 0_0402_5%@

For DVT 1011

EC_THERM#<31>

FCH_PROCHOT#<13>

H_THERMTRIP# <1 4>

APU_CLKP<13> APU_CLKN<13>

APU_DISP_CLKP<13> APU_DISP_CLKN<13>

APU_SVC<44>

APU_SVD<44>

R169 0_0402_5%R169 0_0402_5%

1 2

R168 0_0402_5%@R168 0_0402_5%@

1 2

APU_VDDNB_RUN_FB _H<44>

APU_VDD0_RUN_FB_H<44>

APU_VDD0_RUN_FB_L<44>

CPU TSI interface level shift

@

C236 0.1U_0402_10V7K

@

R428

1 2

+3VS

31.6K_0402_1%

A A

1 2

@

R160

1 2

30K_0402_1%

G

2

13

D

S

D

S

@

Q22

BSH111 1N_SOT23-3

1 2

R431 0_0402_5%R431 0_0402_5%

G

2

13

D

S

D

S

@

Q23

BSH111 1N_SOT23-3

1 2

R434 0_0402_5%R434 0_0402_5%

5

EC_SMB_DAAPU_SID

EC_SMB_CKAPU_SIC

BSH111, the Vgs is: min = 0.4V Typ = 1.0V Max = 1.3V

1.607V for Gate

@

1 2

R429 0_0402_5%

1 2

R430 0_0402_5%R430 0_0402_5%

@

1 2

R432 0_0402_5%

1 2

R433 0_0402_5%R433 0_0402_5%

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

If use level shi ft, EC_SMB need pull up (pop R747 & R74 8)

FCH_SID

EC_SMB_DA2

FCH_SIC

EC_SMB_CK2

FCH_SID <14>

EC_SMB_DA2 <19,31>

FCH_SIC <14>

EC_SMB_CK2 <19,31>

4

T0 FCH

TO EC

T0 FCH

TO EC

U22B

A8

TDP1_TXP0

B8

TDP1_TXN0

B9

TDP1_TXP1

A9

TDP1_TXN1

D10

TDP1_TXP2

C10

TDP1_TXN2

A10

TDP1_TXP3

B10

TDP1_TXN3

B5

LTDP0_TXP0

A5

LTDP0_TXN0

D6

LTDP0_TXP1

C6

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

D8

LTDP0_TXP3

C8

LTDP0_TXN3

V2

CLKIN_H

V1

CLKIN_L

D2

DISP_CLKIN_H

D1

DISP_CLKIN_L

J1

SVC

J2

SVD

P3

SIC

P4

SID

T3

RESET_L

T4

PWROK

U1

PROCHOT_L

U2

THERMTRIP_L

T2

ALERT_L

N2

TDI

N1

TDO

P1

TCK

P2

TMS

M4

TRST_L

M3

DBRDY

M1

DBREQ_L

F4

VDDCR_NB_SENSE

G1

VDDCR_CPU_SENSE

F3

VDDIO_MEM_S_SENSE

F1

VSS_SENSE

B4

RSVD_1

W11

RSVD_2

V5

RSVD_3

ONTARIO-2M161000-1.6G_BGA413

15G@

DP_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

DP MISC

TDP1_AUXP

VGA DAC

TEST

TDP1_AUXN

TDP1_HPD

LTDP0_AUXP LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_REDB

DAC_GREEN

DAC_GREENB

DAC_BLUE

DAC_BLUEB

DAC_HSYNC

DAC_VSYNC

DAC_SCL DAC_SDA

DAC_ZVSS

TEST4 TEST5

TEST6 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19

TEST25_H

TEST25_L

TEST28_H

TEST28_L

TEST31

TEST33_H

TEST33_L

TEST34_H

TEST34_L

TEST35 TEST36 TEST37

TEST38

DMAACTIVE_L

DISPLAYPORT 1

DISPLAYPORT 0

CLK

SER

JTAG CTRL

R398 150_0402_1%R398 150_0402_1%

H3

1 2

G2 H2 H1

APU_HDMI_CLK

B2

APU_HDMI_DATA

C2

C1

APU_LCD_CLK

A3

APU_LCD_DATA

B3

R406 100K_0402_5%R406 100K_0402_5%

D3

1 2

C12

R407 150_0402_1%R407 150_0402_1%

D13 A12 B12 A13 B13

E1 E2

F2 D4

D12

R1 R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5

K3 T1

1 2

R408 150_0402_1%R408 150_0402_1%

1 2

R409 150_0402_1%R409 150_0402_1%

1 2

R144 499_0402_1%R144 499_0402_1%

1 2

T66

PAD

T67

PAD

T68

PAD

TEST15

TEST18 TEST19 TEST25_H TEST_25_L

TEST31 TEST33_H TEST33_L

Delete Test point for layout limitation 20100917

TEST35 TEST36 TEST37

R423 1K_0402_5%R423 1K_0402_5%

R415 1K_0402_5%@R415 1K_0402_5%@

R416 1K_0402_5%R416 1K_0402_5% R417 1K_0402_5%R417 1K_0402_5% R418 510_0402_1%R418 510_0402_1%

T73

PAD

C516 0.1U_0402_16V4ZC516 0.1U_0402_16V4Z

1 2

C517 0.1U_0402_16V4ZC517 0.1U_0402_16V4Z

1 2

R422 1K_0402_5%@R422 1K_0402_5%@

R958 1K_0402_5%R958 1K_0402_5%

T76

PAD

1 2

1 2 1 2 1 2

1 2

AMD Debug

+1.8VS +1.8VS

R842

1K_0402_5%

1 2

APU_TRST#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

0_0402_5%

R846

R847 10K_0402_5%R847 10K_0402_5%

R176 10K_0402_5%R176 10K_0402_5%

R177 10K_0402_5%R177 10K_0402_5%

APU_TRST#_R

1 2

12

Compal Secret Data

Deciphered Date

JHDT1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

SAMTE_ASP-136446-07-B

CONN@

2

APU_ENBKL <10> APU_ENVDD <10> APU_BLPWM <10>

APU_HDMI_CLK <11>

APU_HDMI_DATA <11>

APU_HDMI_HPD <11>

APU_LCD_CLK <10> APU_LCD_DATA <10>

APU_CRT_R <12>

APU_CRT_G <12>

APU_CRT_B <12>

APU_CRT_HSYNC <12> APU_CRT_VSYNC <12>

APU_CRT_DDC_SCL <12> APU_CRT_DDC_SDA <12>

ALLOW_STOP# <13>

+1.8VS

APU_TCK

2

APU_TMS

4

APU_TDI

6

APU_TDO

8

APU_PWRGD

10

APU_RST#

12

APU_DBRDY

14

APU_DBREQ#

16

J108_PLLTST0

18

J108_PLLTST1

20

R420 51_0402_1%R420 51_0402_1%

1 2

R421 51_0402_1%R421 51_0402_1%

1 2

+1.8VS

R843 1K_0402_5%R843 1K_0402_5%

R840 1K_0402_5%R840 1K_0402_5%

R798 1K_0402_5%R798 1K_0402_5%

R178 300_0402_5%R178 300_0402_5%

R799 0_0402_5%R799 0_0402_5%

R863 0_0402_5%R863 0_0402_5%

1 2

12

+1.8VS

TEST19

TEST18

Please be noted about TEST_18 and TEST_19

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FT1 CTRL/DP/CRT

LA-7092P P5WE6/H6/S6

5 46Friday, October 29, 2010

1

0.3

A

U22E

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6

4 4

3 3

2 2

DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS0<8,9> DDR_A_BS1<8,9> DDR_A_BS2<8,9>

DDR_A_DQS0<8,9>

DDR_A_DQS#0<8,9>

DDR_A_DQS1<8,9>

DDR_A_DQS#1<8,9>

DDR_A_DQS2<8,9>

DDR_A_DQS#2<8,9>

DDR_A_DQS3<8,9>

DDR_A_DQS#3<8,9>

DDR_A_DQS4<8,9>

DDR_A_DQS#4<8,9>

DDR_A_DQS5<8,9>

DDR_A_DQS#5<8,9>

DDR_A_DQS6<8,9>

DDR_A_DQS#6<8,9>

DDR_A_DQS7<8,9>

DDR_A_DQS#7<8,9>

DDR_A_CLK0<8> DDR_A_CLK#0<8> DDR_A_CLK1<8> DDR_A_CLK#1<8> DDR_B_CLK2<9> DDR_B_CLK#2<9> DDR_B_CLK3<9> DDR_B_CLK#3<9>

DDR_RST#<8,9>

DDR_EVENT#<8,9>

DDR_CKE0<8,9> DDR_CKE1<8,9>

DDR_A_ODT0< 8> DDR_A_ODT1< 8> DDR_B_ODT0< 9> DDR_B_ODT1< 9>

DDR_CS0_DIMMA#<8> DDR_CS1_DIMMA#<8> DDR_CS0_DIMMB#<9> DDR_CS1_DIMMB#<9>

DDR_A_RAS#<8,9> DDR_A_CAS#<8,9> DDR_A_WE#<8,9>

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1 DDR_A_CLK#1 DDR_B_CLK2 DDR_B_CLK#2 DDR_B_CLK3 DDR_B_CLK#3

DDR_RST# DDR_EVENT#

DDR_CKE0 DDR_CKE1

DDR_A_ODT0 DDR_A_ODT1 DDR_B_ODT0 DDR_B_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB# DDR_CS1_DIMMB#

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

U22E

R17

M_ADD0

H19

M_ADD1

J17

M_ADD2

H18

M_ADD3

H17

M_ADD4

G17

M_ADD5

H15

M_ADD6

G18

M_ADD7

F19

M_ADD8

E19

M_ADD9

T19

M_ADD10

F17

M_ADD11

E18

M_ADD12

W17

M_ADD13

E16

M_ADD14

G15

M_ADD15

R18

M_BANK0

T18

M_BANK1

F16

M_BANK2

D15

M_DM0

B19

M_DM1

D21

M_DM2

H22

M_DM3

P23

M_DM4

V23

M_DM5

AB20

M_DM6

AA16

M_DM7

A16

M_DQS_H0

B16

M_DQS_L0

B20

M_DQS_H1

A20

M_DQS_L1

E23

M_DQS_H2

E22

M_DQS_L2

J22

M_DQS_H3

J23

M_DQS_L3

R22

M_DQS_H4

P22

M_DQS_L4

W22

M_DQS_H5

V22

M_DQS_L5

AC20

M_DQS_H6

AC21

M_DQS_L6

AB16

M_DQS_H7

AC16

M_DQS_L7

M17

M_CLK_H0

M16

M_CLK_L0

M19

M_CLK_H1

M18

M_CLK_L1

N18

M_CLK_H2

N19

M_CLK_L2

L18

M_CLK_H3

L17

M_CLK_L3

L23

M_RESET_L

N17

M_EVENT_L

F15

M_CKE0

E15

M_CKE1

W19

M0_ODT0

V15

M0_ODT1

U19

M1_ODT0

W15

M1_ODT1

T17

M0_CS_L0

W16

M0_CS_L1

U17

M1_CS_L0

V16

M1_CS_L1

U18

M_RAS_L

V19

M_CAS_L

V17

M_WE_L

ONTARIO-2M161000-1.6 G_BGA413

15G@

DDR SYSTEM MEMORY

B

M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7

M_DATA8

M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15

M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23

M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31

M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39

M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47

M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55

M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63

M_VREF

M_ZVDDIO_MEM_S

B14 A15 A17 D18 A14 C14 C16 D16

C18 A19 B21 D20 A18 B18 A21 C20

C23 D23 F23 F22 C22 D22 F20 F21

H21 H23 K22 K21 G23 H20 K20 K23

N23 P21 T20 T23 M20 P20 R23 T22

V20 V21 Y23 Y22 T21 U23 W23 Y21

Y20 AB22 AC19 AA18 AA23 AA20 AB19 Y18

AC17 Y16 AB14 AC14 AC18 AB18 AB15 AC15

M23

M22

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7

DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23

DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39

DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55

DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

+MEM_VREF

R437

39.2_0402_1%

15 mils

12

C

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

PCIE_GTX_C_FRX_P0<18> PCIE_GTX_C_FRX_N0<18>

PCIE_GTX_C_FRX_P1<18> PCIE_GTX_C_FRX_N1<18>

PCIE_GTX_C_FRX_P2<18> PCIE_GTX_C_FRX_N2<18>

PCIE_GTX_C_FRX_P3<18> PCIE_GTX_C_FRX_N3<18>

+1.5V

+1.05VS

UMI_RX0P<13> UMI_RX0N<1 3>

UMI_RX1P<13> UMI_RX1N<1 3>

UMI_RX2P<13> UMI_RX2N<1 3>

UMI_RX3P<13> UMI_RX3N<1 3>

R435 2K_0402_1%R435 2K_0402_1%

Less than 1"

1 2

DDR_A_D[0..63] <8,9>

DDR_A_MA[0..15] <8,9>

DDR_A_DM[0..7] <8,9>

PCIE_GTX_C_FRX_P0 PCIE_GTX_C_FRX_N0

PCIE_GTX_C_FRX_P1 PCIE_GTX_C_FRX_N1

PCIE_GTX_C_FRX_P2 PCIE_GTX_C_FRX_N2

PCIE_GTX_C_FRX_P3 PCIE_GTX_C_FRX_N3

P_ZVDD_10

U22A

AA6

P_GPP_RXP0

Y6

P_GPP_RXN0

AB4

P_GPP_RXP1

AC4

P_GPP_RXN1

AA1

P_GPP_RXP2

AA2

P_GPP_RXN2

Y4

P_GPP_RXP3

Y3

P_GPP_RXN3

Y14

P_ZVDD_10

AA12

P_UMI_RXP0

Y12

P_UMI_RXN0

AA10

P_UMI_RXP1

Y10

P_UMI_RXN1

AB10

P_UMI_RXP2

AC10

P_UMI_RXN2

AC7

P_UMI_RXP3

AB7

P_UMI_RXN3

ONTARIO-2M161000-1.6 G_BGA413

15G@

PCIE I/F

UMI I/F

P_GPP_TXP0 P_GPP_TXN0

P_GPP_TXP1 P_GPP_TXN1

P_GPP_TXP2 P_GPP_TXN2

P_GPP_TXP3 P_GPP_TXN3

P_ZVSS

P_UMI_TXP0 P_UMI_TXN0

P_UMI_TXP1 P_UMI_TXN1

P_UMI_TXP2 P_UMI_TXN2

P_UMI_TXP3 P_UMI_TXN3

D

PCIE_FTX_GRX_P0

AB6

PCIE_FTX_GRX_N0

AC6

PCIE_FTX_GRX_P1

AB3

PCIE_FTX_GRX_N1

AC3

PCIE_FTX_GRX_P2

Y1

PCIE_FTX_GRX_N2

Y2

PCIE_FTX_GRX_P3

V3

PCIE_FTX_GRX_N3

V4

P_ZVSS

AA14

AB12 AC12

AC11 AB11

AA8 Y8

AB8 AC8

C518 0.1U_0402_16V7KVGA@C518 0.1U_0402_16V7KVGA@ C519 0.1U_0402_16V7KVGA@C519 0.1U_0402_16V7KVGA@

C520 0.1U_0402_16V7KVGA@C520 0.1U_0402_16V7KVGA@ C521 0.1U_0402_16V7KVGA@C521 0.1U_0402_16V7KVGA@

C522 0.1U_0402_16V7KVGA@C522 0.1U_0402_16V7KVGA@ C523 0.1U_0402_16V7KVGA@C523 0.1U_0402_16V7KVGA@

C524 0.1U_0402_16V7KVGA@C524 0.1U_0402_16V7KVGA@ C525 0.1U_0402_16V7KVGA@C525 0.1U_0402_16V7KVGA@

R436 1.27K_0402_1%R436 1.27K_0402_1%

1 2

Less than 1"

UMI_TX0P_C UMI_TX0N_C

UMI_TX1P_C UMI_TX1N_C

UMI_TX2P_C UMI_TX2N_C

UMI_TX3P_C UMI_TX3N_C

C526 0.1U_0402_16V7KC526 0.1U_0402_16V7K C527 0.1U_0402_16V7KC527 0.1U_0402_16V7K

C528 0.1U_0402_16V7KC528 0.1U_0402_16V7K C529 0.1U_0402_16V7KC529 0.1U_0402_16V7K

C530 0.1U_0402_16V7KC530 0.1U_0402_16V7K C531 0.1U_0402_16V7KC531 0.1U_0402_16V7K

C532 0.1U_0402_16V7KC532 0.1U_0402_16V7K C533 0.1U_0402_16V7KC533 0.1U_0402_16V7K

1 2 1 2

E

PCIE_FTX_C_GRX_P0 <18> PCIE_FTX_C_GRX_N0 <1 8>

PCIE_FTX_C_GRX_P1 <18> PCIE_FTX_C_GRX_N1 <1 8>

PCIE_FTX_C_GRX_P2 <18> PCIE_FTX_C_GRX_N2 <1 8>

PCIE_FTX_C_GRX_P3 <18> PCIE_FTX_C_GRX_N3 <1 8>

UMI_TX0P <13> UMI_TX0N < 13>

UMI_TX1P <13> UMI_TX1N < 13>

UMI_TX2P <13> UMI_TX2N < 13>

UMI_TX3P <13> UMI_TX3N < 13>

+1.5V

R149

1 2

1K_0402_5%

1 1

DDR_EVENT#

A

R438

1K_0402_1%

R439

1K_0402_1%

1 2

1

C534

1000P_0402_50V7K

2

1 2

Place within 1000 mils to APU 20100526

B

C535

+MEM_VREF

1

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

FT1 DDRIII/UMI/PCIE

LA-7092P P5WE6/H6/S6

E

6 46Friday, October 29, 2010

0.3

5

4

3

2

1

+APU_CORE

U22C

1

C539

D D

10U_0603_6.3V6M

2

1

C550

1U_0402_6.3V6K

2

1

C559

0.1U_0402_16V7K

2

+APU_CORE_NB

C C

C575

10U_0603_6.3V6M

C582

1U_0402_6.3V6K

C591

0.1U_0402_16V7K

B B

1

2

1

2

1

2

1

C536

2

10U_0603_6.3V6M

1

C551

2

1U_0402_6.3V6K

1

C560

0.1U_0402_16V7K

2

1

C576

10U_0603_6.3V6M

2

1

C583

1U_0402_6.3V6K

2

1

C592

0.1U_0402_16V7K

2

POWER

1

C620

@

10U_0603_6.3V6M

2

+APU_CORE

1

330U_D2E_2.5VM_R9M

+

C605

@

330U_D2E_2.5VM_R9M

+APU_CORE_NB

A A

C617

390U_2.5V_10M

+

C606

2

1

+

2

C541

10U_0603_6.3V6M

C552

1U_0402_6.3V6K

C561

0.1U_0402_16V7K

C577

10U_0603_6.3V6M

C584

1U_0402_6.3V6K

C593

0.1U_0402_16V7K

+1.05VS

1

+

C621

@

390U_2.5V_10M

2

1

+

C607

@

330U_D2E_2.5VM_R9M

2

1

+

C618

330U_D2_2.5VY_R9M

2

1

2

1

2

1

2

1

2

1

2

1

2

1

C542

2

10U_0603_6.3V6M

1

C553

1U_0402_6.3V6K

2

1

C562

0.1U_0402_16V7K

2

1

C578

10U_0603_6.3V6M

2

1

C585

1U_0402_6.3V6K

2

1

C594

0.1U_0402_16V7K

2

1

390U_2.5V_10M

+

C1104

2

Near CPU Socket

1

C619

10U_0603_6.3V6M

2

C543

10U_0603_6.3V6M

C563

C579

C586

1U_0402_6.3V6K

1

+

C1105

390U_2.5V_10M

2

1

2

10U_0603_6.3V6M

180P_0402_50V8J

1

0.1U_0402_16V7K

2

1

10U_0603_6.3V6M

2

1

2

POWER

10U_0603_6.3V6M

1

C616

@

2

1

C544

2

1

C554

2

1

C587

180P_0402_50V8J

2

1

C540

10U_0603_6.3V6M

2

1

C555

180P_0402_50V8J

2

1

C588

180P_0402_50V8J

2

+1.5V +1.8VS

1

C622

390U_2.5V_10M

2

+APU_CORE

+APU_CORE_NB

+1.5V

change 0603 for DVT

1

C623

+

10U_0603_6.3V6M

2

Near CPU Socket Near CPU Socket

11A

E5

VDDCR_CPU_1

E6

VDDCR_CPU_2

F5

VDDCR_CPU_3

F7

VDDCR_CPU_4

G6

VDDCR_CPU_5

G8

VDDCR_CPU_6

H5

VDDCR_CPU_7

H7

VDDCR_CPU_8

J6

VDDCR_CPU_9

J8

VDDCR_CPU_10

L7

VDDCR_CPU_11

M6

VDDCR_CPU_12

M8

VDDCR_CPU_13

N7

VDDCR_CPU_14

R8

VDDCR_CPU_15

A

10

E8

VDDCR_NB_1

E11

VDDCR_NB_2

E13

VDDCR_NB_3

F9

VDDCR_NB_4

F12

VDDCR_NB_5

G11

VDDCR_NB_6

G13

VDDCR_NB_7

H9

VDDCR_NB_8

H12

VDDCR_NB_9

K11

VDDCR_NB_10

K13

VDDCR_NB_11

L10

VDDCR_NB_12

L12

VDDCR_NB_13

L14

VDDCR_NB_14

M11

VDDCR_NB_15

M12

VDDCR_NB_16

M13

VDDCR_NB_17

N10

VDDCR_NB_18

N12

VDDCR_NB_19

N14

VDDCR_NB_20

P11

VDDCR_NB_21

P13

VDDCR_NB_22

2A

G16

VDDIO_MEM_S_1

G19

VDDIO_MEM_S_2

E17

VDDIO_MEM_S_3

J16

VDDIO_MEM_S_4

L16

VDDIO_MEM_S_5

L19

VDDIO_MEM_S_6

N16

VDDIO_MEM_S_7

R16

VDDIO_MEM_S_8

R19

VDDIO_MEM_S_9

W18

VDDIO_MEM_S_10

U16

VDDIO_MEM_S_11

ONTARIO-2M161000-1.6G_BGA413

15G@

+1.5V

C589

10U_0603_6.3V6M

C595

1U_0402_6.3V6K

C599

0.1U_0402_16V7K

+1.5V

2

1

2

1

2

1

2

C101

0.1U_0402_16V7K

1

C590

10U_0603_6.3V6M

2

1

C596

1U_0402_6.3V6K

2

1

C600

0.1U_0402_16V7K

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

2

1

C102

0.1U_0402_16V7K

GPU AND NB CORE

DDR3

1

C597

1U_0402_6.3V6K

2

1

C601

0.1U_0402_16V7K

2

TSense/PLL/DP/PCIE/IO

VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4 VDD_18_5 VDD_18_6

CPU CORE

VDD_18_7

DAC

VDD_18_DAC

POWER

DIS PLL

VDDPL_10

PCIE/IO/DDR3 Phy

VDD_10_1 VDD_10_2 VDD_10_3 VDD_10_4

DP Phy/IO

180P_0402_50V8J

1

C103

C103 180P_0402_50V8J

180P_0402_50V8J

2

POWER POWER

1

C685

2

10U_0603_6.3V6M

C624

390U_2.5V_10M

Near CPU Socket

+

2

1

C625

@

10U_0603_6.3V6M

2

(390uF_2.5V_6.3x5.7_ESR10m)*1=(SF000002O00)

5

4

U8 W8 U6 U9 W6 T7 V7

W9

U11

U13 W13 V12 T12

A4

VDD_33

1

C598

1U_0402_6.3V6K

2

1

C602

2

2A

0.15A

0.2A

5.5A

0.5A

+VDD_18

C545

+VDD_18_DAC

C556

+VDDL_10

C564

+VDD_10

C568

C580

1

C546

C537

2

0.1U_0402_16V7K

180P_0402_50V8J

add Cap. for CRT DVT

1

2

1

2

1

2

1

2

1

C557

C558

2

180P_0402_50V8J

1U_0402_6.3V6K

1

C566

C565

2

180P_0402_50V8J

0.1U_0402_16V7K

1

C570

C569

2

0.1U_0402_16V7K

180P_0402_50V8J

+3VS

1

C581

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C538

2

1U_0402_6.3V6K

1

C604

2

10U_0603_6.3V6M

1

C567

2

1U_0402_6.3V6K

1

C571

2

0.1U_0402_16V7K

Power Cap. Summary

APU

S POLY C 330U 2.5V M D2E TPE LESR9M H1.8 --->+APU_CORE(Qty : 3) Unpop:2

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+APU_CORE(Qty : 2)

S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->+APU_CORE_NB(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU--->+APU_CORE_NB(Qty : 1)

1

C547

2

1U_0402_6.3V6K

1 @

@

C684

2

10U_0603_6.3V6M

1

C572

2

1U_0402_6.3V6K

1

C548

C549

2

1U_0402_6.3V6K

L30

FBMA-L11-201209-221LMA30T_0805

Change from SM010014520 to SD002000080 20100816

10U_0603_6.3V6M

FBMA-L11-201209-221LMA30T_0805

1

C574

C573

2

1U_0402_6.3V6K

10U_0603_6.3V6M

L31

10U_0603_6.3V6M

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.5V(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->1.05VS(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.8VS(Qty : 1)

DDR3 Socket

S POLY C 330U 2V M X LESR6M SX H1.9 --->1.5V(Qty : 1)

FCH

S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->1.1VS(Qty : 1) UMA unpop

1

C603

180P_0402_50V8J

2

GPU

S POLY C 330U 2V M X LESR6M SX H1.9 --->VGA_CORE(Qty : 2) Unpop:1

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+VGA_CORE(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.5VSG(Qty : 1)

USB

1

C104

C104 180P_0402_50V8J

180P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

S_A-P_CAP 220U 6.3V M C45 R17M SVPE H4.4 --->+USB_VCCA(Qty : 1)

Compal Secret Data

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

+1.8VS

L29

12

FBMA-L11-201209-221LMA30T_0805

Change from SM010014520 to SD002000080 20100816

+1.8VS

12

+1.05VS

12

L32

12

FBMA-L11-201209-221LMA30T_0805

Change from SM010014520 to SD002000080 20100816

By case (Along split)

+1.5V

1

2

0.1U_0402_16V7K

2

U22D

A7

VSS_1

B7

VSS_2

B11

VSS_3

B17

VSS_4

B22

VSS_5

C4

VSS_6

D5

VSS_7

D7

VSS_8

D9

VSS_9

D11

VSS_10

D14

VSS_11

B15

VSS_12

D17

VSS_13

D19

VSS_14

E7

VSS_15

E9

VSS_16

E12

VSS_17

E20

VSS_18

F8

VSS_19

F11

VSS_20

F13

VSS_21

G4

VSS_22

G5

VSS_23

G7

VSS_24

G9

VSS_25

G12

VSS_26

G20

VSS_27

G22

VSS_28

H6

VSS_29

H11

VSS_30

H13

VSS_31

J4

VSS_32

J5

VSS_33

J7

VSS_34

J20

VSS_35

K10

VSS_36

K14

VSS_37

L4

VSS_38

L6

VSS_39

L8

VSS_40

L11

VSS_41

L13

VSS_42

L20

VSS_43

L22

VSS_44

M7

VSS_45

N4

VSS_46

N6

VSS_47

N8

VSS_48

N11

VSS_49

ONTARIO-2M161000-1.6G_BGA413

15G@

1

C608

1

C609

C610

2

0.1U_0402_16V7K

Title

Size Document Number Rev

C

Date: Sheet of

GND

1

C611

2

0.1U_0402_16V7K

Compal Electronics, Inc.

P07-FT1 PWR/VSS

LA-7092P P5WE6/H6/S6

180P_0402_50V8J

1

2

VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97

VSSBG_DAC

C612

180P_0402_50V8J

1

N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11

+APU_CORE

+APU_CORE_NB

+1.5V

+1.05VS

+1.8VS

+1.5V

+1.1VS

+GPU_CORE

+1.5VSG

+USB_VCCA

1

C613

2

180P_0402_50V8J

1

C615

C614

2

180P_0402_50V8J

0.3

7 46Monday, November 01, 2010

0.3

5

+1.5V

JDIMM1

+VREF_DQ

1

C626

0.1U_0402_16V4Z

2

D D

DDR_A_DQS#1<6,9> DDR_A_DQS1<6,9>

DDR_A_DQS#2<6,9> DDR_A_DQS2<6,9>

C C

DDR_CS1_DIMMA#<6>

B B

A A

+3VS

DDR_A_DQS#4<6,9> DDR_A_DQS4<6,9>

DDR_A_DQS#6<6,9> DDR_A_DQS6<6,9>

C646

2.2U_0603_6.3V4Z

1000P_0402_50V7K

DDR_CKE0<6,9>

DDR_A_BS2<6,9>

DDR_A_CLK0<6> DDR_A_CLK#0<6>

DDR_A_BS0<6,9>

DDR_A_WE#<6,9>

DDR_A_CAS#<6,9>

1

2

5

1

C627

2

1

C647

0.1U_0402_16V4Z

2

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

1 2

R150 10K_0402_5%R150 10K_0402_5%

12

R151

10K_0402_5%

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U8SN-7F

CONN@

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1 CK1#

VDD12

BA1 RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

4

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8 10 12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28 30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60 62 64 66

DDR_A_D30

68

DDR_A_D31

70 72

74 76

DDR_A_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86 88

DDR_A_MA6

90

DDR_A_MA4

92 94

DDR_A_MA2

96

DDR_A_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_D62 DDR_A_D63

DDR3 SO-DIMM A H:8mm Standard Type P/N:SP07000HA00 F/P:FOX_AS0A626-U8SN-7F_204P

4

+0.75VS

DDR_A_DQS#0 <6,9> DDR_A_DQS0 <6,9>

DDR_RST# <6,9>

DDR_A_DQS#3 <6,9> DDR_A_DQS3 <6,9>

DDR_CKE1 <6,9>

DDR_A_CLK1 <6> DDR_A_CLK#1 <6>

DDR_A_BS1 <6,9> DDR_A_RAS# <6,9>

DDR_CS0_DIMMA# <6> DDR_A_ODT0 <6>

DDR_A_ODT1 <6>

1

C645

1000P_0402_50V7K

2

DDR_A_DQS#5 <6,9> DDR_A_DQS5 <6,9>

DDR_A_DQS#7 <6,9> DDR_A_DQS7 <6,9>

DDR_EVENT# <6,9>

FCH_SMDAT0 <9 ,14,29> FCH_SMCLK0 <9,14,29>

1

C644

0.1U_0402_16V4Z

2

3

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

+1.5V

2

C628

1

0.1U_0402_16V4Z

2

C629

1

DDR_A_D[0..63] <6,9>

DDR_A_MA[0..15] <6,9>

DDR_A_DM[0..7] <6,9>

0.1U_0402_16V4Z

2

C630

1

0.1U_0402_16V4Z

2

C631

1

2

C632

1

0.1U_0402_16V4Z

CRB 0.1u X1 4.7u X1

+0.75VS

+VREF_CA

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

2

C640

@

0.1U_0402_16V4Z

1

Place near JDIMM1

2

C641

2

1

2

C633

1

0.1U_0402_16V4Z

1

C642

4.7U_0603_6.3V6K

2

EMI For DVT 10/20

+1.5V

1

+1.5V

R145

R145 1K_0402_1%

2

C635

1

1K_0402_1%

1 2

R147

R147 1K_0402_1%

1K_0402_1%

1 2

2

C636

1

0.1U_0402_16V4Z

2

C637

1

+VREF_CA

2

C638

1

0.1U_0402_16V4Z

15mil 15mil

+VREF_DQ

0.1U_0402_16V4Z

C634

CRB 100U X2

+1.5V

1

+

C1102

C1102 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

2

330U ESR:9m H:2 P/

N:SGA20331E10

0.1U_0402_16V4Z

2

C676

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

C643

C675

1

Title

Size Document Number Rev

Custom

Date: Sheet of

C675

1

Compal Electronics, Inc.

DDR3 SODIMM-I Socket

LA-7092P P5WE6/H6/S6

C678

+1.5V

R146

R146 1K_0402_1%

1K_0402_1%

1 2

R148

R148 1K_0402_1%

1K_0402_1%

1 2

2

C110

1

8 46Friday, October 29, 2010

0.3

5

4

3

2

1

+1.5V

JDIMM2

11 13 15 17 19 21 23 25 27

33 35

39 41

45 47 49 51 53 55 57 59

63

67 69

73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

1 2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26

CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

FOX_AS0A626-U4SN-7F

CONN@

DQS#0

DQS0

DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

+VREF_DQ

1

C681

2

DDR_A_DQS#1<6,8> DDR_A_DQS1<6,8>

DDR_A_DQS#2<6,8> DDR_A_DQS2<6,8>

DDR_A_BS2<6,8>

DDR_B_CLK2<6> DDR_B_CLK#2<6>

DDR_A_BS0<6,8>

DDR_A_WE#<6,8>

DDR_A_CAS#<6,8>

DDR_A_DQS#4<6,8> DDR_A_DQS4<6,8>

DDR_A_DQS#6<6,8> DDR_A_DQS6<6,8>

1 2 1 2

C681

1000P_0402_50V7K

DDR_CKE0<6,8>

C667

1

2

C680

0.1U_0402_16V4Z

D D

C C

B B

A A

0.1U_0402_16V4Z

DDR_CS1_DIMMB#<6>

For DRAM strap pin reservation 20100817

R961 10K_0402_5%R961 10K_0402_5%

+3VS

R153 10K_0402_5%@R153 10K_0402_5%@

2.2U_0603_6.3V4Z

CRB only one 4.7k

5

1

2

1

C668

0.1U_0402_16V4Z

2

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48

DDR_A_D49

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

@

1 2

R154

10K_0402_5%

R962

10K_0402_5%

For DRAM strap pin reservation 20100817

DQ4 DQ5

VSS3

VSS6

DQ6 DQ7

VSS8

DM1

DM2

CK1

CK1#

BA1

NC2

DM4

DM6

SDA SCL

VTT2

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8 10 12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28 30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60 62 64 66

DDR_A_D30

68

DDR_A_D31

70 72

74 76

DDR_A_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86 88

DDR_A_MA6

90

DDR_A_MA4

92 94

DDR_A_MA2

96

DDR_A_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_D62 DDR_A_D63

DDR3 SO-DIMM B H:4mm Standard Type P/N:SP07000H800 F/P:FOX_AS0A626-U4SN-7F_204P

4

+0.75VS

DDR_A_DQS#0 <6,8> DDR_A_DQS0 <6,8>

DDR_RST# <6,8>

DDR_A_DQS#3 <6,8> DDR_A_DQS3 <6,8>

DDR_CKE1 <6,8>

DDR_B_CLK3 <6> DDR_B_CLK#3 <6>

DDR_A_BS1 <6,8> DDR_A_RAS# <6,8>

DDR_CS0_DIMMB# <6> DDR_B_ODT0 <6>

DDR_B_ODT1 <6>

1

C665

0.1U_0402_16V4Z

2

DDR_A_DQS#5 <6,8> DDR_A_DQS5 <6,8>

DDR_A_DQS#7 <6,8> DDR_A_DQS7 <6,8>

DDR_EVENT# <6,8>

FCH_SMDAT0 <8,14,29> FCH_SMCLK0 <8,14,29>

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

+1.5V

0.1U_0402_16V4Z

2

C44

C45

1

0.1U_0402_16V4Z

+VREF_CA

1

C666

1000P_0402_50V7K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C45

1

0.1U_0402_16V4Z

2010/08/20 2011/08/20

DDR_A_D[0..63] <6,8>

DDR_A_MA[0..15] <6,8>

DDR_A_DM[0..7] <6,8>

0.1U_0402_16V4Z

2

1

Compal Secret Data

C652

Deciphered Date

C653

1

0.1U_0402_16V4Z

2

C654

1

0.1U_0402_16V4Z

2

C655

1

2

0.1U_0402_16V4Z

2

C682

1

0.1U_0402_16V4Z

2

C46

1

0.1U_0402_16V4Z

2

C683

1

0.1U_0402_16V4Z

2

C47

1

0.1U_0402_16V4Z

2

C48

1

CRB 0.1u X1 4,7uX1

+0.75VS

2

1

C664

4.7U_0603_6.3V6K

2

1

2

C51

C50

@

0.1U_0402_16V4Z

1

Place near JDIMM2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

DDR3 SODIMM-II Socket

LA-7092P P5WE6/H6/S6

C49

0.1U_0402_16V4Z

9 46Friday, October 29, 2010

0.3

5

4

3

2

1

LCD POWER CIRCUIT

+LCDVDD

D D

SSM3K7002F_SC59-3

UMA@

APU_ENVDD<5>

VGA_ENVDD<18>

+INVPWR_B+

FBMA-L11-201209-221LMA30T_0805

C C

W=60mils

C673

680P_0402_50V7K

FBMA-L11-201209-221LMA30T_0805

1

C674

C674 68P_0402_50V8J

68P_0402_50V8J

2

C1007 220P_0402_50V7KC1007 220P_0402_50V7K

C677 220P_0402_50V7KC677 220P_0402_50V7K

C679 220P_0402_50V7KC679 220P_0402_50V7K

1 2

R963 0_0402_5%

DISO@

1 2

R964 0_0402_ 5%

L2

12

L1

12

SM010014520 3000ma 220ohm@100mhz DCR 0.04

12

R396

300_0603_5%

13

D

Q81

S

LCDVDD_ON

12

1 2

L113

1.2UH_1127AS-1R2N_2.4A_30%

EMI request for DVT

DAC_BRIG

INVT_PWM

DISPOFF#

2

G

13

D

2

G

S

R395

100K_0402_5%

+3VALW

12

R393

R393 10K_0402_5%

10K_0402_5%

R397

R397 1K_0402_5%

1K_0402_5%

0.047U_0402_16V7K

Q83

Q83 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

Change 0603 size For DVT

B+

For LCD flash Change as 10k oh m

12

C670

4.7U_0603_6.3V6K

VGA_ENBKL<19>

APU_ENBKL<5>

BKOFF#<31>

1

2

C1005

G

+3VS

=

60mils

W

3

S

AO3413L_SOT23-3

AO3413L_SOT23-3 Q82

Q82

D

1

+LCDVDD

1

2

R1097 0_0402_5%DISO@R1097 0_0402_5%DISO@

1 2

R156 0_0402_5%UMA@R 156 0_0402_5%UMA@

1 2

R157 100K_0402_1%R157 100K_0402_1%

1

C669

4.7U_0603_6.3V6K

2

W=60mils

1

C1006

0.1U_0402_16V4Z

2

1 2

R484 0_0402_5%R484 0_0402_5%

12

R48510K_0402_5% R48510K_0402_5%

Change 0603 size For DVT

1 2

21

RB751V_SOD323

RB751V_SOD323 D4

@D4

@

+3VS

12

@

R483

R483 10K_0402_5%

10K_0402_5%

ENBKL <31>

DISPOFF#

LCD/LED PANEL Conn.

JLVDS1

41 42 43 44 45 46

IPEX_20143-040E-20F

CONN@

+LCDVDD

1

C671

10U_0603_6.3V6M

2

Change 0603 size For DVT

1

2

G1

3

G2

4

G3

5

G4

6

G5

7

G6

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

Place closed to JLVDS1

1

C672

0.1U_0402_16V4Z

2

+LCDVDD_L

INVT_PWM DISPOFF# I2CC_SCL I2CC_SDA

TXOUT0TXOUT0+

TXOUT1TXOUT1+

TXOUT2TXOUT2+

TXCLKTXCLK+

+INVPWR_B+

+LCDVDD

+3VS

R862 0_0402_5%@R862 0_0402_5%@

R860 0_0402_5%@R860 0_0402_5%@

+3VS

W=60mils

@

12

R841 0_0603_5%

60mils

W=

DAC_BRIG <31>

12

+3VS

USB20_N5 <14> USB20_P5 <14>

USB20_P5

+LCDVDD

LOCAL_DIM <31 >

COLOY_ENG_EN <31>

D15

@D15

@

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

CH2

CH1

USB20_N5

3

2

Vn

1

Change P/N as SC300000B00

B B

TXCLK+ TXCLK-

TXOUT2+ TXOUT2-

TXOUT1+ VGA_TXOUT1+ TXOUT1-

TXOUT0+ TXOUT0- VGA_TXOUT0-

I2CC_SDA

VGA ONLY

2 3 1 4

RP2 0_04 04_4P2R_5%DISO@RP2 0_0404_4P2R_5%DISO@

2 3 1 4

RP4 0_04 04_4P2R_5%DISO@RP4 0_0404_4P2R_5%DISO@

2 3 1 4

RP6 0_04 04_4P2R_5%DISO@RP6 0_0404_4P2R_5%DISO@

2 3 1 4

RP8 0_04 04_4P2R_5%DISO@RP8 0_0404_4P2R_5%DISO@

DISO@

12 12

R2700_0402_5% DISO@ R2700_0402_5% DISO@ R2720_0402_5%

R2720_0402_5%

VGA_TXCLK+ VGA_TXCLK-

VGA_TXOUT2+ VGA_TXOUT2-

VGA_TXOUT1-

VGA_TXOUT0+

VGA_LCD_CLKI2CC_SCL VGA_LCD_DAT

VGA_TXCLK+ <18> VGA_TXCLK- <18>

VGA_TXOUT2+ <18> VGA_TXOUT2- <18>

VGA_TXOUT1+ <18> VGA_TXOUT1- <18>

VGA_TXOUT0+ <18> VGA_TXOUT0- <18>

VGA_LCD_CLK <19>

VGA_LCD_DAT < 19>

APU_BLPWM<5>

EC_INVT_PWM<31>

VGA_INVT_PWM<18>

1 2

R1098 0_0402_5%UMA@R1098 0_0402_5%UMA@

1 2

R158 0_0402_5%DISO@R158 0_0402_5%DISO@

1 2

R1099 0_0402_5%@R1099 0_0402_5%@

INVT_PWMINVT_PWM

12

R1100

R1100 100K_0402_5%

100K_0402_5%

UMA ONLY

TXCLK+ TXCLK-

TXOUT2+ TXOUT2-

TXOUT0+

A A

TXOUT0- APU_TXOUT0-

I2CC_SDA

5

RP1 0_04 04_4P2R_5%UMA@RP1 0_0404_4P2R_5%UMA@

RP3 0_04 04_4P2R_5%UMA@RP3 0_0404_4P2R_5%UMA@

RP5 0_04 04_4P2R_5%UMA@RP5 0_0404_4P2R_5%UMA@

RP7 0_04 04_4P2R_5%UMA@RP7 0_0404_4P2R_5%UMA@

1 4 2 3

UMA@

R2690_0402_5% UMA@ R2690_0402_5% UMA@

12

R2710_0402_5%

12

APU_TXCLK+ APU_TXCLK-

APU_TXOUT2+ APU_TXOUT2-

APU_TXOUT1+TXOUT1+ APU_TXOUT1-TXOUT1-

APU_TXOUT0+

APU_LCD_CLKI2CC_SCL APU_LCD_DATA

APU_TXCLK+ <5> APU_TXCLK- <5>

APU_TXOUT2+ <5> APU_TXOUT2- <5>

APU_TXOUT1+ <5> APU_TXOUT1- <5>

APU_TXOUT0+ <5> APU_TXOUT0- <5>

APU_LCD_CLK <5> APU_LCD_DATA <5>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet

LVDS/CAMERA

LA-7092P P5WE6/H6/S6

10 46Friday, October 29, 2010

1

0.3

of

5

D D

APU_HDMI_CLK<5>

VGA_HDMI_SCLK<19>

APU_HDMI_DATA<5>

VGA_HDMI_SDATA<19>

UMA@

R970 0_0402_5%

R971 0_0402_5%DISO@R971 0_0402_ 5%DISO@

R972 0_0402_5%

R973 0_0402_5%DISO@R973 0_0402_ 5%DISO@

12

UMA@

12

4

R966

3

R521

@R521

@

0_0603_5%

+3VS

0_0402_5%

R968

1 2

4.7K_0402_5%

0_0402_5%

G

S

G

2

BSH111 1N_SOT23-3

13

D

S

D

S

Q128

BSH111 1N_SOT23-3

@

R172 0_0402_5%

@

R816 0_0402_5%

+HDMI_5V_OUT

R965

R522

R161

1 2

2

13

D

Q86

12

R161

12

2K_0402_5%

+5VS

Change P/N SCS00002000

HDMI_SCLK

HDMI_SDATA

1 2

D7

+HDMI_5V

2 1

CH491DPT_SOT23-3

W=40mils

F2

21

1.1A_6V_SMD1812P110TF

+HDMI_5V_OUT

1

C690

0.1U_0402_16V4Z

2

1

HDMI connector

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11 10

9 8 7 6 5 4 3 2 1

GND

CK_shield

GND

CK+

GND

D0-

GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

SUYIN_100042MR019S153ZL

CONN@

20 21 22 23

+HDMI_5V_OUT

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

Place closed to JHDMI1

C C

R524

1 2

0_0402_5%

+3VS

R527

R527 0_0402_5%

Use common via on related pair

R974 0_0402_5%DISO@R 974 0_0402_ 5%DISO@

VGA_HDMI_TXD2-<19> VGA_HDMI_TXD2+<19> VGA_HDMI_TXD1-<19> VGA_HDMI_TXD1+<19>

F

B B

rom VGA

From APU

VGA_HDMI_TXD0-<19> VGA_HDMI_TXD0+<19> VGA_HDMI_TXC-<19> VGA_HDMI_TXC+< 19>

APU_HDMI_TX2N<5> APU_HDMI_TX2P<5> APU_HDMI_TX1N<5> APU_HDMI_TX1P<5> APU_HDMI_TX0N<5> APU_HDMI_TX0P<5> APU_HDMI_CLKN<5> APU_HDMI_CLKP<5>

1 2

R975 0_0402_5%DISO@R 975 0_0402_ 5%DISO@

1 2

R976 0_0402_5%DISO@R 976 0_0402_ 5%DISO@

1 2

R978 0_0402_5%DISO@R 978 0_0402_ 5%DISO@

1 2

R979 0_0402_5%DISO@R 979 0_0402_ 5%DISO@

1 2

R980 0_0402_5%DISO@R 980 0_0402_ 5%DISO@

1 2

R982 0_0402_5%DISO@R 982 0_0402_ 5%DISO@

1 2

R983 0_0402_5%DISO@R 983 0_0402_ 5%DISO@

1 2

R984 0_0402_5%UMA@R984 0_0402_5%UMA@

1 2

R985 0_0402_5%UMA@R985 0_0402_5%UMA@

1 2

R986 0_0402_5%UMA@R986 0_0402_5%UMA@

1 2

R987 0_0402_5%UMA@R987 0_0402_5%UMA@

1 2

R988 0_0402_5%UMA@R988 0_0402_5%UMA@

1 2

R989 0_0402_5%UMA@R989 0_0402_5%UMA@

1 2

R990 0_0402_5%UMA@R990 0_0402_5%UMA@

1 2

R991 0_0402_5%UMA@R991 0_0402_5%UMA@

1 2

HDMI_C_TX2-_R HDMI_C_TX2+_R HDMI_C_TX1-_R HDMI_C_TX1+_R HDMI_C_TX0-_R HDMI_C_TX0+_R HDMI_C_CLK-_R HDMI_C_CLK+_R

DISO@

VGA_HDMI_DET<19>

APU_HDMI_HPD<5>

12

R977 0_0402_5%

UMA@

12

R981 0_0402_5%

10K_0402_5%

0_0402_5%

1 2

C

2

B

E

3 1

Q34

Q34 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

12

R530

0_0402_5%

@

1 2

R525 150K_0402_5%R525 150K_0402_5%

HDMI_HPD

12

R528

R528 365K_0402_1%

365K_0402_1%

@

SM070001310 400ma 90ohm@100mhz DCR 0.3

HDMI_C_CLK-

L68

L68 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_C_CLK+

HDMI_C_TX0- HDMI_R_D0-

L69

L69 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_C_TX0+

HDMI_C_TX1-

L54

L54 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_C_TX1+

HDMI_C_TX2-

L70

L70 WCM-2012-900T_0805

WCM-2012-900T_0805

@

R514 0_0402_5%R5 14 0_0402_5%

1 2

1

4

R513 0_0402_5%R5 13 0_0402_5%

1 2

R516 0_0402_5%R5 16 0_0402_5%

1 2

1

4

R515 0_0402_5%R5 15 0_0402_5%

1 2

R518 0_0402_5%R5 18 0_0402_5%

1 2

1

4

R517 0_0402_5%R5 17 0_0402_5%

1 2

R520 0_0402_5%R5 20 0_0402_5%

1 2

1

4

R519 0_0402_5%R5 19 0_0402_5%

1 2

2

3

2

3

2

3

2

3

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+HDMI_C_TX2+

Place closed to JHDMI1

HDMI_C_TX2-_R HDMI_C_TX2+_R

HDMI_C_TX1-_R HDMI_C_TX1+_R

HDMI_C_TX0-_R HDMI_C_TX0+_R

A A

HDMI_C_CLK-_R HDMI_C_CLK+_R

C508 0.1U_0402_16V7KC508 0.1U_0402_16V7K C509 0.1U_0402_16V7KC509 0.1U_0402_16V7K

C510 0.1U_0402_16V7KC510 0.1U_0402_16V7K C511 0.1U_0402_16V7KC511 0.1U_0402_16V7K

C512 0.1U_0402_16V7KC512 0.1U_0402_16V7K C513 0.1U_0402_16V7KC513 0.1U_0402_16V7K

C514 0.1U_0402_16V7KC514 0.1U_0402_16V7K C515 0.1U_0402_16V7KC515 0.1U_0402_16V7K

12 12

5

HDMI_C_TX2HDMI_C_TX2+

HDMI_C_TX1HDMI_C_TX1+

HDMI_C_TX0HDMI_C_TX0+

HDMI_C_CLKHDMI_C_CLK+

R509 499_0402_1%R509 499_0402_1%

1 2

R508 499_0402_1%R508 499_0402_1%

1 2

R506 499_0402_1%R506 499_0402_1%

1 2

R505 499_0402_1%R505 499_0402_1%

1 2

R503 499_0402_1%R503 499_0402_1%

1 2

R502 499_0402_1%R502 499_0402_1%

1 2

R501 499_0402_1%R501 499_0402_1%

1 2

R500 499_0402_1%R500 499_0402_1%

1 2

+HDMI_5V_OUT

12

R512

100K_0402_5%

13

D

2N7002_SOT23

2

G

Q87

S

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

HDMI Connector

LA-7092P P5WE6/H6/S6

11 46Friday, October 29, 2010

1

of

0.3

A

B

C

D

E

2

3

2

D32

@

C697

1

2

3

1

C695

10P_040 2_50V8J

L60

1 2

FCM2012 CF-800T06_2P

L81

1 2

FCM2012 CF-800T06_2P

1

2

D33

PJDLC05 C_SOT23-3

@

1

C696

2

10P_040 2_50V8J

C700

10P_040 2_50V8J

CRT_R_1

CRT_G_1

CRT_B_1

1

2

CRT Connector

PJDLC05 C_SOT23-3

1 2

PJDLC05 C_SOT23-3

10P_040 2_50V8J

1 1

CRT_R

CRT_G

CRT_B

150_0402_1%

12

R533

+CRT_VC C

150_0402_1%

A2Y

R537 10 K_0402_5% R537 10 K_0402_5%

5

P

G

3

1

OE#

150_0402_1%

12

R532

R531

+CRT_VC C

C699 0 .1U_0402_16V4 ZC699 0 .1U_0402_16V4 Z

2 2

1 2

CRT_HSYNC

C701 0 .1U_0402_16V4 Z C701 0 .1U_0402_16V4 Z

5

1

U23

P

4

OE#

A2Y

G

74AHCT1 G125GW_SO T353-5

3

1 2

CRT_VSYNC

10P_0402_50V8J

C692

C693

1

2

12

CRT_HSYNC _1

U19

CRT_VSYNC _1

4

74AHCT1 G125GW_SO T353-5

L57 FCM2012 CF-800T06_2P

L58 FCM2012 CF-800T06_2P

L59 FCM2012 CF-800T06_2P

10P_0402_50V8J

C694

1

2

+5VS

Change P/N SCS00002000

CRT_HSYNC _2

CRT_VSYNC _2

1

C702

10P_040 2_50V8J

2

W=40mils

D14

2 1

CH491DP T_SOT23-3

0.1U_040 2_16V4Z

1

C698

100P_04 02_50V8J

2

C703

68P_040 2_50V8J

F1

21

1.1A_6VD C_FUSE

1

C691

2

1

2

1

C704

C704 68P_040 2_50V8J

68P_040 2_50V8J

2

W=40mils

T95PA DT95PAD

T97PA DT97PAD

DSUB_12

DSUB_15

+CRT_VC C+R_CRT_VC C

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

C-H_13-12 201513CP

CONN@

16

G

17

G

P/N : DC060003V00 F/P : SUYIN_070546HR015M21MZR_15P-T

Close to Conn side

R549

4.7K_040 2_5%

+CRT_VC C

12

D

12

R548

4.7K_040 2_5%

BSH111 1 N_SOT23-3

R1009 0_0 402_5%

R1010 0_0 402_5%

+3VS

2

G

1 3

D

S

D

Q89

@

Title

Size Document Num ber Rev

Custom

Date: Sheet of

S

2

G

1 3

D

S

D

Q129

BSH111 1 N_SOT23-3

12

Compal Electronics, Inc.

LA-7092P P5WE6/H6/S6

S

CRT Connector

CRT_DAT ADSUB_12

CRT_CLK

E

12 46Friday, October 29, 201 0

0.3

3 3

Use common via on related pair

APU_CRT _R<5>

APU_CRT _G< 5>

APU_CRT _B<5>

om APU

Fr

4 4

F

rom VGA

APU_CRT _HSYNC<5>

APU_CRT _VSYNC<5>

APU_CRT _DDC_SDA< 5>

APU_CRT _DDC_SCL<5 >

VGA_CRT _R<19>

VGA_CRT _G<19>

VGA_CRT _B<19>

VGA_CRT _HSYNC<19>

VGA_CRT _VSYNC<19>

VGA_CRT _DATA<19>

VGA_CRT _CLK<19>

A

APU_CRT _R

APU_CRT _G

APU_CRT _B

APU_CRT _HSYNC

APU_CRT _VSYNC

APU_CRT _DDC_SCL CRT_CLK

VGA_CRT _R

VGA_CRT _G

VGA_CRT _B

VGA_CRT _HSYNC

VGA_CRT _VSYNC

VGA_CRT _DATA

VGA_CRT _CLK

R995 0_ 0402_5%UMA@R9 95 0_0402_5%UMA@

R996 0_ 0402_5%UMA@R9 96 0_0402_5%UMA@

R997 0_ 0402_5%UMA@R9 97 0_0402_5%UMA@

R998 0_ 0402_5%UMA@R9 98 0_0402_5%UMA@

R999 0_ 0402_5%UMA@R9 99 0_0402_5%UMA@

R1000 0 _0402_5%UMA@R 1000 0_0402_ 5%UMA@

R1001 0 _0402_5%UMA@R 1001 0_0402_ 5%UMA@

R1002 0 _0402_5%DISO@R1 002 0_0402_5 %DISO@

R1003 0_0402_5 %DISO@R 1003 0_0402_ 5%DISO@

R1004 0 _0402_5%DISO@R1 004 0_0402_5 %DISO@

R1005 0 _0402_5%DISO@R1 005 0_0402_5 %DISO@

R1006 0 _0402_5%DISO@R1 006 0_0402_5 %DISO@

R1007 0 _0402_5%DISO@R1 007 0_0402_5 %DISO@

R1008 0 _0402_5%DISO@R1 008 0_0402_5 %DISO@

12

B

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

CRT_DAT A

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

CRT_DAT A

CRT_CLK

DSUB_15APU_CRT _DDC_SDA

Security Class ification

2010/08/ 20 2011/08/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/ 20 2011/08/ 20

C

Compal Secret Data

Deciphered Date

A

B

C

D

E

For PCIE device reset on FS1 (GFX,GLAN,WLAN,LVDS Travis)

U31E

For DVT 1011

A_RST#<31>

UMI_RX0P<6> UMI_RX0N<6> UMI_RX1P<6>

+PCIE_VDDAN

PCIE_FTX_C_DRX_P2<26> PCIE_FTX_C_DRX_N2<26> PCIE_FTX_C_DRX_P3<29> PCIE_FTX_C_DRX_N3<29>

PCIE_FRX_DTX_P2<26> PCIE_FRX_DTX_N2<26> PCIE_FRX_DTX_P3<29> PCIE_FRX_DTX_N3<29>

UMI_RX1N<6> UMI_RX2P<6> UMI_RX2N<6> UMI_RX3P<6> UMI_RX3N<6>

UMI_TX0P<6> UMI_TX0N<6> UMI_TX1P<6> UMI_TX1N<6> UMI_TX2P<6> UMI_TX2N<6> UMI_TX3P<6> UMI_TX3N<6>

1 1

LAN WLAN

2 2

C53 0.1U_0402_16V7KC53 0.1U_0402_16V 7K

1 2

C54 0.1U_0402_16V7KC54 0.1U_0402_16V 7K

1 2

C55 0.1U_0402_16V7KC55 0.1U_0402_16V 7K

1 2

C56 0.1U_0402_16V7KC56 0.1U_0402_16V 7K

1 2

C57 0.1U_0402_16V7KC57 0.1U_0402_16V 7K

1 2

C58 0.1U_0402_16V7KC58 0.1U_0402_16V 7K

1 2

C59 0.1U_0402_16V7KC59 0.1U_0402_16V 7K

1 2

C60 0.1U_0402_16V7KC60 0.1U_0402_16V 7K

1 2

R560 590_0402_1%R560 590_0402_1% R561 2K_0402_1%R 561 2K_0402_1%

12 12

C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K

1 2

C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K

1 2

C717 0.1U_0402_16V7KC717 0.1U_0402_16V7K

1 2

C63 0.1U_0402_16V7KC63 0.1U_0402_16V7K

1 2

PCIE_RST# A_RST#

UMI_RX0P_C UMI_RX0N_C UMI_RX1P_C UMI_RX1N_C UMI_RX2P_C UMI_RX2N_C UMI_RX3P_C UMI_RX3N_C

PCIE_FTX_DRX_P2 PCIE_FTX_DRX_N2 PCIE_FTX_DRX_P3 PCIE_FTX_DRX_N3

close to FCH within 1"

CLK_SD_48M<29>

1M_0603_5%

1M_0603_5% R576

R576

APU_DISP_CLKP_R APU_DISP_CLKN_R

APU_CLKP_R APU_CLKN_R

CLK_PCIE_VGA_R CLK_PCIE_VGA#_R

CLK_PCIE_LAN_R CLK_PCIE_LAN#_R

CLK_PCIE_MINI1_R CLK_PCIE_MINI1#_R

25M_CLK_X1

25M_CLK_X2

FCH : SA000046H60 (S IC 218-0792001 A12 HUDSON-M1 FCBGA 605P)

FCH : SA000046H70 (S IC 218-0792006 A13 HUDSON-M1 FCBGA 605P)

B

R564 0_0402_5%R564 0_0402_5%

APU_DISP_CLKP<5> APU_DISP_CLKN<5>

APU_CLKP<5> APU_CLKN<5>

CLK_PCIE_VGA<18> CLK_PCIE_VGA#<18>

LAN

WLAN

3 3

CLK_PCIE_LAN<2 6> CLK_PCIE_LAN#<26>

CLK_PCIE_MINI1<29> CLK_PCIE_MINI1#<29>

1 2

R565 0_0402_5%R565 0_0402_5%

1 2

R162 0_0402_5%R162 0_0402_5%

1 2

R163 0_0402_5%R163 0_0402_5%

1 2

R569 0_0402_5%R569 0_0402_5%

1 2

R570 0_0402_5%R570 0_0402_5%

1 2

R571 0_0402_5%R571 0_0402_5%

1 2

R572 0_0402_5%R572 0_0402_5%

1 2

R573 0_0402_5%R573 0_0402_5%

1 2

R574 0_0402_5%R574 0_0402_5%

1 2

Follow result by vender 10/11

1 2

C66

27P_0402_50V8J

C67

27P_0402_50V8J

1 2

4 4

C64

1 2

22P_0402_50V8J

20M_0603_5%

C65

22P_0402_50V8J

R563

1 2

12

Close to FCH

Y4

4

OSC

1

OSC

32.768KHZ_12.5PF_Q13MC14610050_10PPM

A

RTC_32KHI

3

NC

2

NC

RTC_32KHO

12

Y3

25MHZ_20PF_7A25000012

U31E

P1

PCIE_RST_L

L1

A_RST_L

AD26

UMI_TX0P

AD27

UMI_TX0N

AC28

UMI_TX1P

AC29

UMI_TX1N

AB29

UMI_TX2P

AB28

UMI_TX2N

AB26

UMI_TX3P

AB27

UMI_TX3N

AE24

UMI_RX0P

AE23

UMI_RX0N

AD25

UMI_RX1P

AD24

UMI_RX1N

AC24

UMI_RX2P

AC25

UMI_RX2N

AB25

UMI_RX3P

AB24

UMI_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

21807-A11-HUDSON-M1_FCBGA605

PCI CLKS

PCI EXPRESS I/F

CLOCK GENERATOR

CPU

ALLOW_LDTSTP/DMA_AC TIVE_L

RTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22

LPC

INTRUDER_ALERT_L

C

AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

REQ1_L/GPIO40

GNT1_L/GPO44 GNT2_L/GPO45

INTE_L/GPIO32 INTF_L/GPIO33 INTG_L/GPIO34 INTH_L/GPIO35

SERIRQ/GPIO48

VDDBT_RTC_G

PCI I/F

REQ2_L/CLK_REQ8_L/GPIO41 REQ3_L/CLK_REQ5_L/GPIO42

GNT3_L/CLK_REQ7_L/GPIO46

LDRQ1_L/CLK_REQ6_L/GPIO49

W2

PCICLK0

W1 W3 W4 Y1

V2

PCIRST_L

AA1

AD0/GPIO0

AA4

AD1/GPIO1

AA3

AD2/GPIO2

AB1

AD3/GPIO3

AA5

AD4/GPIO4

AB2

AD5/GPIO5

AB6

AD6/GPIO6

AB5

AD7/GPIO7

AA6

AD8/GPIO8

AC2

AD9/GPIO9

AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8

CBE0_L

AD5

CBE1_L

AD8

CBE2_L

AA10

CBE3_L

AE8

FRAME_L

AB9

DEVSEL_L

AJ3

IRDY_L

AE7

TRDY_L

AC5

PAR

AF5

STOP_L

AE6

PERR_L

AE4

SERR_L

AE11

REQ0_L

AH5 AH4 AC12 AD12

GNT0_L

AJ5 AH6 AB12 AB11

CLKRUN_L

AD7

LOCK_L

AJ6 AG6 AG4 AJ4

H24

LPCCLK0

H25

LPCCLK1

J27

LAD0

J26

LAD1

H29

LAD2

H28

LAD3

G28

LFRAME_L

J25

LDRQ0_L

AA18 AB19

G21 H21

PROCHOT_L

K19

LDT_PG

G22

LDT_STP_L

J24

LDT_RST_L

C1

32K_X1

C2

32K_X2

D2

RTCCLK

B2 B1

2010/08/20 2011/08/20

T96PAD T96P AD

T92PAD T92P AD

1 2

R99 10K_0402_5%R99 10K_0402_5%

R853 0_0402_5%R853 0_0402_5%

1 2

R575 22_0402_5%R575 22_0402_5%

1 2

RTC_32KHI

RTC_32KHO

RTC_CLK <17,31>

C1272

1

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

PCI_CLK1 <17> PCI_CLK2 <17> PCI_CLK3 <17> PCI_CLK4 <17>

VGA_PWRGD_R

LPC_CLK1 <17> LPC_AD0 <31> LPC_AD1 <31> LPC_AD2 <31> LPC_AD3 <31> LPC_FRAME# <31>

ALLOW_STOP# <5> FCH_PROCHOT# <5> APU_PWRGD <5>

APU_RST# <5>

C1271

for Clear CMOS

1U_0402_6.3V4Z

A_RST#

PCI_AD23 <17> PCI_AD24 <17> PCI_AD25 <17> PCI_AD26 <17> PCI_AD27 <17>

VGA_PWRGD<24,43>

PE_GPIO0 <18> PE_GPIO1 <24,35>

SERIRQ <31>

1 2

R864 510_0402_5%R864 510_0402_5%

W=20mils

R175 33_0402_5%R175 33_0402_5%

1 2

150P_0402_50V8J

1

C1233

2

VGA_PWRGD VGA_PWRGD_R

For DVT 1011

LPC_CLK0 <17> LPC_CLK0_EC <31>

R865

@

0_0603_5%

1 2

D

+3VALW

C1234

1 2

0.1U_0402_16V4Z

5

2

P

B

4

Y

1

A

R174

8.2K_0402_5%@

1 2

NC7SZ08P5X_NL_SC70-5

G

3

U28

U28 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

Need to check material?

APU_PWRGD

+3VALW

U33

2

1

+1.8VS +3VS

S

FDV301N_NL_SOT23-3

C1199

1 2

0.1U_0402_16V4Z

5

P

B

4

Y

A

G

3

1 2

R839 0_0402_5%R839 0_0402_5%

10K_0402_5%

G

2

13

D

Q90

1 2

R830 0_0402_5%

1 2

R838 100K_0402_5%

RTC BATT Conn.

SUYIN_060003HA002G202ZL

P/N: SP07000OU00 F/P: SUYIN_060003HA002G202ZL_2P

+RTCVCC

1

C1270

2

0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet of

SUYIN_060003HA002G202ZL

D23

1

DAN202UT106_SC70-3

Compal Electronics, Inc.

FCH PCIE/PCI/ACPI/LPC/RTC

LA-7092P P5WE6/H6/S6

PLT_RST# <18,26,29>

PCIE_RST#

@

1 2

R582 0_0402_5%

12

R164

@

+RTCBATT

12

R179

R179 1K_0402_5%

1K_0402_5%

2

3

E

H_PWRGD_L <44>

1

CONN@

JBATT2

+

-

2

+CHGRTC

13 46Friday, October 29, 2010

0.3

+3VALW

1 2

R870 10K_0402_5%R870 10K_0402_5%

1 2

R871 10K_0402_5%R871 10K_0402_5%

1 2

R872 10K_0402_5%R872 10K_0402_5%

1 2

R603 10K_0402_5%R603 10K_0402_5%

1 2

R604 10K_0402_5%R604 10K_0402_5%

1 2

1 1

2 2

3 3

R605 10K_0402_5%R605 10K_0402_5%

1 2

R817 10K_0402_5%R817 10K_0402_5%

+3VS

1 2

R818 10K_0402_5%R818 10K_0402_5%

1 2

R597 4.7K_0402_5%R597 4.7K_0402_5%

1 2

R598 2.2K_0402_5%R598 2.2K_0402_5%

1 2

R599 2.2K_0402_5%R599 2.2K_0402_5%

FCH_PWRGD<44>

0.1U_0402_16V7K

@

1 2

+3VS

R626 2.2K_0402_5%

@

1 2

R404 100K_0402_5%

@

1 2

R173 10K_0402_5%

1 2

R587 10K_0402_5%R587 10K_0402_5%

1 2

R588 10K_0402_5%R588 10K_0402_5%

1 2

R606 2.2K_0402_5%R606 2.2K_0402_5%

@

1 2

R607 10K_0402_5%

@

1 2

R608 10K_0402_5%

1 2

R609 10K_0402_5%R609 10K_0402_5%

Pull-down for en able high perfo rmance mode 20100527 (requir ed for M1)

12

PX@

VGA@

R911

R912

10K_0402_5%

BACO@

R915

10K_0402_5%

12

WOPX@

R914

10K_0402_5%

R910

10K_0402_5%

12

WOVGA@

R913

10K_0402_5%

A

USB_OC2#

USB_OC1#

USB_OC0#

FCH_SIC

FCH_SID

FCH_PCIE_WAKE#

LAN_CLKREQ#

MINI1_CLKREQ#

NB_PWRGD

FCH_SMCLK0

FCH_SMDAT0

R580 0_0402_5%@R580 0_0402_5%@

R581 0_0402_5%R581 0_0402_5%

4

2

@

C112

1

VRAM_SEL

VGA_CLKREQ#_R

+3VALW+3VALW+3VALW

12

GPIO189 GPIO190 GPIO191

12

+3VS

@

C111 0.1U_0402_16V7K

1 2

5

2

P

B

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

U30

VRAM_Freq : 1->900Hz 0-> 800Hz*

FCH_SMCLK1

FCH_SMDAT1

EC_RSMRST#

HDA_BITCLK

HDA_SDIN0

HDA_SDOUT

12

@

1 2

R929 10K_0402_5%R929 10K_0402_5%

@

1 2

R930 10K_0402_5%

1 2

R931 10K_0402_5%R931 10K_0402_5%

1 2

R932 10K_0402_5%R932 10K_0402_5%

1 2

R933 10K_0402_5%R933 10K_0402_5%

+3VALW

HDA_BITCLK_AUDIO<27> HDA_SDOUT_AUDIO<27>

HDA_SDIN0<27>

HDA_SYNC_AUDIO<27>

HDA_RST_AUDIO#<27>

ODD_DA#_FCH

ODD_DETECT#

EC_PWROK <31>

VGATE <31,44>

EC_LID_OUT#

R579 10K_0402_5%@R579 10K_0402_5%@

USB_OC7#

USB_OC5#

1 2

B

U31A

GPIO187 GPIO188

J2

PCI_PME_L/GEVENT4_L

K1

RI_L/GEVENT22_L

D3

SPI_CS3_L/GBE_STAT1/GEVENT21_L

F1

SLP_S3_L

H1

SLP_S5_L

F2

PWR_BTN_L

H5

PWR_GOOD

G6

SUS_STAT_L

B3

TEST0

C4

TEST1/TMS

F6

TEST2

AD21

GA20IN/GEVENT0_L

AE21

KBRST_L/GEVENT1_L

K2

LPC_PME_L/GEVENT3_L

J29

LPC_SMI_L/GEVENT23_L

H2

GEVENT5_L

J1

SYS_RESET_L/GEVENT19_L

H6

WAKE_L/GEVENT8_L

F3

IR_RX1/GEVENT20_L

J6

THRMTRIP_L/SMBALERT_L/GEVEN T2_L

AC19

NB_PWRGD

G1

RSMRST_L

AD19

CLK_REQ4_L/SATA_IS0_L/GPIO64

AA16

CLK_REQ3_L/SATA_IS1_L/GPIO63

AB21

SMARTVOLT1/SATA_IS2_L/GPIO50

AC18

CLK_REQ0_L/SATA_IS3_L/GPIO60

AF20

SATA_IS4_L/FANOUT3/GPIO55

AE19

SATA_IS5_L/FANIN3/GPIO59

AF19

SPKR_GPIO66

AD22

SCL0_GPIO43

AE22

SDA0_GPIO47

F5

SCL1_GPIO227

F4

SDA1_GPIO228

AH21

CLK_REQ2_L/FANIN4_GPIO62

AB18

CLK_REQ1_L/FANOUT4_GPIO61

E1

IR_LED_L/LLB_L/GPIO184

AJ21

SMARTVOLT2/SHUTDOWN _L/GPIO51

H4

DDR3_RST_L/GEVENT7_L

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9_L

G5

GBE_LED2/GEVENT10_L

K3

GBE_STAT0/GEVENT11_L

AA20

CLK_REQG_L/GPIO65_OSCIN

H3

BLINK/USB_OC7_L/GEVENT18_L

D1

USB_OC6_L/IR_TX1/GEVENT6_L

E4

USB_OC5_L/IR_TX0/GEVENT17_L

D4

USB_OC4_L/IR_RX0/GEVENT16_L

E8

USB_OC3_L/AC_PRES/TDO/GEVENT15_L

F7

USB_OC2_L/TCK/GEVENT14_L

E7

USB_OC1_L/TDI/GEVENT13_L

F8

USB_OC0_L/TRST_L/GEVENT12_L

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST_L

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST_L

V7

GBE_PHY_INTR

E23

PS2_DAT/SDA4/GPIO187

E24

PS2_CLK/SCL4/GPIO188

F21

SPI_CS2_L/GBE_STAT2/GPIO166

G29

FC_RST_L/GPO160

D27

PS2KB_DAT/GPIO189

F28

PS2KB_CLK/GPIO190

F29

PS2M_DAT/GPIO191

E27

PS2M_CLK/GPIO192

21807-A11-HUDSON-M1_FCBGA605

EC_SWI#<31>

SLP_S3#<31> SLP_S5#<31>

PBTN_OUT#<31>

EC_GA20<31>

EC_KBRST#<3 1>

EC_SCI#<31> EC_SMI#< 31>

FCH_PCIE_WAKE#<26,29>

H_THERMTRIP#<5>

EC_RSMRST#<31>

LAN_CLKREQ#<26>

FCH_SPKR<27> FCH_SMCLK0<8,9,29> USB20_P7 <33> FCH_SMDAT0<8,9,29>

MINI1_CLKREQ#<29>

EC_LID_OUT#<31>

ODD_DA#_FCH< 30> ODD_DETECT#< 30>

USB_OC2#<33> USB_OC1#<33> USB_OC0#<33>

R583 33_0402_5%R583 33_0402_5%

1 2

R165 33_0402_5%R165 33_0402_5%

1 2

R589 33_0402_5%R589 33_0402_5%

1 2

R590 33_0402_5%R590 33_0402_5%

1 2

R591 10K_0402_5%R591 10K_0402_5%

1 2

R592 10K_0402_5%R592 10K_0402_5%

1 2

R593 10K_0402_5%R593 10K_0402_5%

+3VALW

1 2

R596 10K_0402_5%R596 10K_0402_5%

1 2

R600 10K_0402_5%R600 10K_0402_5%

1 2

T85 PADT85 PAD T86 PADT86 PAD

FCH_PWRGD

T82PADT82PAD T83PADT83PAD T84PADT84PAD

NB_PWRGD

FCH_SMCLK1 FCH_SMDAT1

VRAM_SEL

VGA_CLKREQ#_R

USB_OC7#

USB_OC5# ODD_DA#_FCH ODD_DETECT# USB_OC2# USB_OC1#

HDA_BITCLK HDA_SDOUT HDA_SDIN0

HDA_SYNC HDA_RST#

GPIO189 GPIO190 GPIO191

C

USB MISC

ACPI/WAKE UP EVENTS

GPIO

USB OC

HD AUDIO

GBE LAN

USBCLK/14M_25M_48M_OSC

EC_PWM0/EC_TIMER 0/GPIO197 EC_PWM1/EC_TIMER 1/GPIO198 EC_PWM2/EC_TIMER 2/GPIO199 EC_PWM3/EC_TIMER 3/GPIO200

USB 1.1

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB 2.0

SCL3_LV/GPIO195 SDA3_LV/GPIO196

EMBEDDED CTRL

KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

SCL2/GPIO193 SDA2/GPIO194

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218

D

A10

USB_RCOMP

G19

1 2

10mils and <1"

J10 H11

H9

USB_HSD[13:0]P/N:

J8

USB P/N pairs with trace lengths up to 10" and have a decoupling 5.6-pF capacitor

B12

footprint placed near the USB connector or device.

A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

GPIO193

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

R584 10K_0402_5%R584 10K_0402_5%

GPIO194

R586 10K_0402_5%R586 10K_0402_5%

EC_PWM2 EC_PWM3

R578

11.8K_0402_1%

USB20_P8 <29> USB20_N8 <29>

USB20_N7 <33>

USB20_P6 <29> USB20_N6 <29>

USB20_P5 <10> USB20_N5 <10>

USB20_P2 <33> USB20_N2 <33>

USB20_P1 <33> USB20_N1 <33>

USB20_P0 <33> USB20_N0 <33>

12 12

FCH_SIC <5> FCH_SID <5>

EC_PWM2 <17> EC_PWM3 <17>

MINI1-WLAN

BT

CardReader

Camera

USB/B (Right)

USB Conn (Left)

E

Root

EHCI CTL DEV 19, Fn 2

Root

EHCI CTL DEV 18, Fn 2

SKU_ID

4 4

(GPIO189)

PX_FN (GPIO190)

PX_SEL (GPIO191)

SKU_ID : 1->VGA* 0->UMA

PX_Function : 1->PX Enable* 0->PX D isable

PX_SEL : 1->PX 3.0* 0->PX 4.0

A

GPIO 189 190 191

UMA

0 DISO PX3.0 PX4.0

0 1

1

0

1

1 1 0

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH HDA/USB/ACPI

LA-7092P P5WE6/H6/S6

14 46Friday, October 29, 2010

E

0.3

A

1 1

C656 0.01U_0402_16V7KC656 0.01U_0402_16V7K

SATA_ITX_DRX_P0<30>

HDD

ODD

2 2

SATA_ITX_DRX_N0<30>

SATA_DTX_C_IRX_N0<30> SATA_DTX_C_IRX_P0<30>

SATA_ITX_DRX_P1<30> SATA_ITX_DRX_N1<30>

SATA_DTX_C_IRX_N1<30> SATA_DTX_C_IRX_P1<30>

1 2

C658 0.01U_0402_16V7KC658 0.01U_0402_16V7K

1 2

C648 0.01U_0402_16V7KC648 0.01U_0402_16V7K

1 2

C649 0.01U_0402_16V7KC649 0.01U_0402_16V7K

1 2

10 mils and < 1"

R610 1K_0402_1%R610 1K_ 0402_1%

1 2

R611 931_0402_1%R611 931_0402_1%

+AVDD_SATA

SATA_LED#<32>

+3VS

3 3

1 2

R616 10K_0402_5%R616 10K_0402_5%

1 2

C107

@

22P_0402_50V8J

C106

@

22P_0402_50V8J

1 2

12

Y7

@

25MHZ_20PF_7A25000012

FCH_SI_SPI_SO FCH_SO_SPI_SI FCH_SPICLK FCH_SPICS#/FSEL#

@

1M_0603_5%

1M_0603_5% R861

R861

B

SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0

SATA_ITX_C_DRX_P1 SATA_ITX_C_DRX_N1

SATA_CALRP SATA_CALRN

25M_SATA_X1

25M_SATA_X2

T78PADT78PAD

U31B

AH9

SATA_TX0P

AJ9

SATA_TX0N

AJ8

SATA_RX0N

AH8

SATA_RX0P

AH10

SATA_TX1P

AJ10

SATA_TX1N

AG10

SATA_RX1N

AF10

SATA_RX1P

AG12

SATA_TX2P

AF12

SATA_TX2N

AJ12

SATA_RX2N

AH12

SATA_RX2P

AH14

SATA_TX3P

AJ14

SATA_TX3N

AG14

SATA_RX3N

AF14

SATA_RX3P

AG17

SATA_TX4P

AF17

SATA_TX4N

AJ17

SATA_RX4N

AH17

SATA_RX4P

AJ18

SATA_TX5P

AH18

SATA_TX5N

AH19

SATA_RX5N

AJ19

SATA_RX5P

AB14

SATA_CALRP

AA14

SATA_CALRN

AD11

SATA_ACT_L/GPIO67

AD16

SATA_X1

AC16

SATA_X2

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO163

K4

SPI_CLK/GPIO162

K9

SPI_CS1_L/GPIO165

G2

ROM_RST_L/GPIO161

21807-A11-HUDSON-M1_FCBGA605

GPIOD

SERIAL ATA

SPI ROM

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE_L/GPIOD145

FC_AVD_L/GPIOD146

FC_WE_L/GPIOD148 FC_CE1_L/GPIOD149 FC_CE2_L/GPIOD150

FC_INT1/GPIOD144 FC_INT2/GPIOD147

FC_ADQ0/GPIOD128

FC_ADQ1/GPIOD129

FC_ADQ2/GPIOD130

FC_ADQ3/GPIOD131

FC_ADQ4/GPIOD132

FC_ADQ5/GPIOD133

FC_ADQ6/GPIOD134

FC_ADQ7/GPIOD135

FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137

FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140 FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

HW MONITOR

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMPIN3/TALERT_L/GPIO174

TEMP_COMM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

NC1 NC2

C

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

G27 Y2

ODD_PWR

TEMPIN0

R612 10K_0402_5%R612 10K_0402_5%

TEMPIN1

R613 10K_0402_5%R613 10K_0402_5%

TEMPIN2

R614 10K_0402_5%R614 10K_0402_5% R615 10K_0402_5%R615 10K_0402_5%

GPIO175

R617 10K_0402_5%R617 10K_0402_5%

GPIO176

R618 10K_0402_5%R618 10K_0402_5%

GPIO177

R619 10K_0402_5%R619 10K_0402_5%

GPIO178

R620 10K_0402_5%R620 10K_0402_5%

GPIO179

R621 10K_0402_5%R621 10K_0402_5%

GPIO180

R622 10K_0402_5%R622 10K_0402_5%

GPIO181

R623 10K_0402_5%@R623 10K_0402_5%@

GPIO182

R624 10K_0402_5%R624 10K_0402_5%

ODD_PWR <30>

12 12 12 12

12 12 12 12 12 12 12 12

D

VIN6/GBE_STAT3/G PIO181 Enable integrate d pull-down/up and leave uncon nected

E

@

1 2

+3VS

R504 0_0603_5%

R507 4.7K_0402_5%@R5 07 4.7K_0402_5 %@

1 2

R491 4.7K_0402_5%@R4 91 4.7K_0402_5 %@

+3VS

4 4

1 2

FCH_SPICS#/FSEL#

A

FCH_SPI_WP#

FCH_SPI_HOLD#

@

C784 0.1U_0402_16V4Z

1 2

FCH_+SPI_VCC

U32

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L1605DM2I-12G SOP 8P

SA00002TO00

SA00002TO00 @

@

SCLK

VCC

8 6 5

SI

2

SO

FCH_SPICLK_R FCH_SO_SPI_SI FCH_SI_SPI_SO

B

R510 0_0402_5%@R510 0_0402_5%@

1 2

FCH_SPICLK

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH-SATA/SPI

LA-7092P P5WE6/H6/S6

15 46Friday, October 29, 2010

E

0.3

A

Change 0603 size

+3VS

For DVT

2

C121

1 1

+1.8VS

R632

@

1 2

0_0603_5%

2

C114

C113

1

10U_0603_6.3V6M

GPIO I/F impleme nted: tied to + 1.8V_S0 GPIO I/F not imp lemented: tied to

+1.8V_S0 or 0 oh m to ground

12

R633

0_0402_5%

For DVT 1011

L44

+3VS

+1.1VS

L45

FBMA-L11-201209-221LMA30T_0805

2 2

+3VALW

FBMA-L11-201209-221LMA30T_0805

+1.1VALW

3 3

12

L46

12

L48

FBMA-L11-160808-221LMT_2P

12

L44

FBMA-L11-160808-221LMT_2P

1

C77

C105

2

10U_0603_6.3V6M

Change 0603 size For DVT

1

C85

C86

2

10U_0603_6.3V6M

2

C115

1

0.1U_0402_16V7K

2

C69

C744

@

1

4.7U_0603_6.3V6K

12

1

C78

2

10U_0603_6.3V6M

2

C116

1

0.1U_0402_16V7K

+VDDIO_18_FC

2

C746

@

1

0.1U_0402_16V7K

+VDDPL33_PCIE

1

C76

2

2.2U_0603_6.3V6K

2

C80

C79

1

0.1U_0402_16V7K

1U_0402_6.3V6K

+PCIE_VDDAN

0.1U_0402_16V7K

+VDDPL_33_SATA

+AVDD_SATA

1115.6mA

1345.2mA

+AVDD_USB

1

C87

C88

2

1U_0402_6.3V6K

10U_0603_6.3V6M

1

C93

2

534.5mA

1

C89

2

1U_0402_6.3V6K

0.1U_0402_16V7K

+VDDAN_11_USB

2

88.6mA

C94

1

0.1U_0402_16V7K

2.2U_0603_6.3V6K

42mA

0.16mA

22.5mA

15.5mA

B

U31C

AH1

VDDIO_33_PCIGP_1

V6

VDDIO_33_PCIGP_2

Y19

VDDIO_33_PCIGP_3

AE5

VDDIO_33_PCIGP_4

AC21

VDDIO_33_PCIGP_5

AA2

VDDIO_33_PCIGP_6

AB4

VDDIO_33_PCIGP_7

AC8

VDDIO_33_PCIGP_8

AA7

VDDIO_33_PCIGP_9

AA9

VDDIO_33_PCIGP_10

AF7

VDDIO_33_PCIGP_11

AA19

VDDIO_33_PCIGP_12

AF22

VDDIO_18_FC_1

AE25

VDDIO_18_FC_2

AF24

VDDIO_18_FC_3

AC22

VDDIO_18_FC_4

AE28

VDDPL_33_PCIE

U26

VDDAN_11_PCIE_1

V22

VDDAN_11_PCIE_2

V26

VDDAN_11_PCIE_3

V27

VDDAN_11_PCIE_4

V28

VDDAN_11_PCIE_5

V29

VDDAN_11_PCIE_6

W22

VDDAN_11_PCIE_7

W26

VDDAN_11_PCIE_8

AD14

VDDPL_33_SATA

AJ20

VDDAN_11_SATA_1

AF18

VDDAN_11_SATA_4

AH20

VDDAN_11_SATA_2

AG19

VDDAN_11_SATA_3

AE18

VDDAN_11_SATA_5

AD18

VDDAN_11_SATA_6

AE16

VDDAN_11_SATA_7

A18

VDDAN_33_USB_S_1

A19

VDDAN_33_USB_S_2

A20

VDDAN_33_USB_S_3

B18

VDDAN_33_USB_S_4

B19

VDDAN_33_USB_S_5

B20

VDDAN_33_USB_S_6

C18

VDDAN_33_USB_S_7

C20

VDDAN_33_USB_S_8

D18

VDDAN_33_USB_S_9

D19

VDDAN_33_USB_S_10

D20

VDDAN_33_USB_S_11

E19

VDDAN_33_USB_S_12

C11

VDDAN_11_USB_S_1

D11

VDDAN_11_USB_S_2

21807-A11-HUDSON-M1_FCBGA605

POWER

PCI/GPIO I/O

FLASH I/O

PCI EXPRESS

SERIAL ATA

USB I/O

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDRF_GBE_S

VDDIO_33_GBE_S

GBE LAN

VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2

VDDIO_GBE_S_1 VDDIO_GBE_S_2

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

CORE S5CORE S0 CLKGEN I/O 3.3V_S5 I/O

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

VDDPL_33_SYS

PLL

VDDPL_11_SYS_S

VDDPL_33_USB_S

VDDAN_33_HWM _S

VDDXL_33_S

C

N13 R15 N17 U13 U17 V12 V18 W12 W18

+VDDAN_11_CLK

K28 K29 J28 K26 J21 J20 K21 J22

V1

M10

L7 L9

M6 P8

49.5mA

A21 D21 B21 K10 L10 J9 T6 T8

F26 G26

15.3mA

M8

58mA

A11 B11

46.5mA

M21

65.3mA

L22

16.1mA

F19

11.4mA

D6

+VDDXL_33_S

L20

5mA

979.4mA

165.2mA

+VDDCR_11_USB

1

C738

2

0.1U_0402_16V7K

382.9mA

1

C72

2

0.1U_0402_16V7K

+VDDIO_AZ

+VDDPL33

+VDDPL11

+AVDD_USB

+VDDAN33_HWM

1

C95

2

2.2U_0603_6.3V6K

1

C70

C117

2

1

C73

2

1

C81

2

1

C83

2

FBMA-L11-160808-221LMT_2P

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C74

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C82

2

2.2U_0603_6.3V6K

1

C84

2

1U_0402_6.3V6K

L49

D

1

C71

C118

2

1U_0402_6.3V6K

10U_0603_6.3V6M

1

C743

2

1U_0402_6.3V6K

Change 0603 size For DVT

1

C90

2

0.1U_0402_16V7K

+3VS

1

2

10U_0603_6.3V6M

+3VALW

+1.1VALW

C91

C75

12

+1.1VS

1

FBMA-L11-201209-221LMA30T_0805

C109

2

10U_0603_6.3V6M

1

C92

2

0.1U_0402_16V7K

L43

12

+VDDCR_11_USB

FBMA-L11-160808-221LMT 0603

L107

@

Reserve

L47

FBMA-L11-201209-221LMA30T_0805

10U_0603_6.3V6M

12

+1.1VS

12

Add VGA@ For DVT

5

VOUT

4

FB

+1.1VALW

VGA@

APL5317

+1.1VS

C119

1

+

2

VIN

GND

EN

E

330U_D2_2.5VY_R9M

@

U85

1

1U_0402_6.3V6K

2

3

1 2

C989

@

C68

+3VALW

1

2

10U_0603_6.3V6M

L51

+3VS

+1.1VALW

4 4

+3VS

L51

FBMA-L11-160808-221LMT_2P

C777 2.2U_0603_6.3V6KC777 2.2U_0603_6.3V6K

1 2

L52

FBMA-L11-160808-221LMT_2P

C99 2.2U_0603_6.3V6KC99 2.2U_0603_6.3V6K

1 2

L55

FBMA-L11-160808-221LMT_2P

C120 2.2U_0603_6.3V6KC120 2.2U_0603_6.3V6K

1 2

+VDDPL_33_SATA

12

+VDDPL11

12

+VDDPL33

12

A

+1.1VS

+3VALW

L50

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-160808-221LMT_2P

12

Change 0603 size

12

For DVT

L53

1

C96

C108

2

10U_0603_6.3V6M

2

1

C782

C100

1

2

2.2U_0603_6.3V6K

B

1

C97

C778

2

1U_0402_6.3V6K

+VDDAN33_HWM

0.1U_0402_16V7K

1

C775

2

1U_0402_6.3V6K

+AVDD_SATA

1

C776

2

0.1U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VDDIO_AZ +3VALW

1 2

R634 0_0603_5%

1 2

R635 0_0603_5%R635 0_0603_5%

1

C98

2.2U_0603_6.3V6K

2

2010/08/20 2011/08/20

C

@

For 3V AZ device

Compal Secret Data

Deciphered Date

+3VS

For DVT 1011

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH PWR

LA-7092P P5WE6/H6/S6

16 46Friday, October 29, 2010

E

0.3

5

U31D

Y14

VSSIO_SATA_1

Y16

VSSIO_SATA_2

AB16

VSSIO_SATA_3

AC14

VSSIO_SATA_4

AE12

VSSIO_SATA_5

AE14

VSSIO_SATA_6

AF9

VSSIO_SATA_7

AF11

VSSIO_SATA_8

AF13

D D

C C

B B

VSSIO_SATA_9

AF16

VSSIO_SATA_10

AG8

VSSIO_SATA_11

AH7

VSSIO_SATA_12

AH11

VSSIO_SATA_13

AH13

VSSIO_SATA_14

AH16

VSSIO_SATA_15

AJ7

VSSIO_SATA_16

AJ11

VSSIO_SATA_17

AJ13

VSSIO_SATA_18

AJ16

VSSIO_SATA_19

A9

VSSIO_USB_1

B10

VSSIO_USB_2

K11

VSSIO_USB_3

B9

VSSIO_USB_4

D10

VSSIO_USB_5

D12

VSSIO_USB_6

D14

VSSIO_USB_7

D17

VSSIO_USB_8

E9

VSSIO_USB_9

F9

VSSIO_USB_10

F12

VSSIO_USB_11

F14

VSSIO_USB_12

F16

VSSIO_USB_13

C9

VSSIO_USB_14

G11

VSSIO_USB_15

F18

VSSIO_USB_16

D9

VSSIO_USB_17

H12

VSSIO_USB_18

H14

VSSIO_USB_19

H16

VSSIO_USB_20

H18

VSSIO_USB_21

J11

VSSIO_USB_22

J19

VSSIO_USB_23

K12

VSSIO_USB_24

K14

VSSIO_USB_25

K16

VSSIO_USB_26

K18

VSSIO_USB_27

H19

VSSIO_USB_28

Y4

EFUSE

D8

VSSAN_HWM

M19

VSSXL

P21

VSSIO_PCIECLK_1

P20

VSSIO_PCIECLK_2

M22

VSSIO_PCIECLK_3

M24

VSSIO_PCIECLK_4

M26

VSSIO_PCIECLK_5

P22

VSSIO_PCIECLK_6

P24

VSSIO_PCIECLK_7

P26

VSSIO_PCIECLK_8

T20

VSSIO_PCIECLK_9

T22

VSSIO_PCIECLK_10

T24

VSSIO_PCIECLK_11

V20

VSSIO_PCIECLK_12

J23

VSSIO_PCIECLK_13

21807-A11-HUDSON- M1_FCBGA605

GND

VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52

VSSPL_SYS

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

4

REQUIRED STRAPS

PULL HIGH

PULL LOW

PCI_CLK2<13>

PCI_CLK1<13> PCI_CLK3<13> PCI_CLK4<13> LPC_CLK0<13> LPC_CLK1<13> EC_PWM2<14> EC_PWM3<14> RTC_CLK<13,31>

3

PCI_CLK2

WATCHDOG TIMER ENABLE

WATCHDOG TIMER DISABLE

DEFAULT

R649

@

10K_0402_5%

R650

10K_0402_5%

PCI_CLK1

ALLOW PCIE GEN2

DEFAULT

FORCE PCIE GEN1

+3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW+3VS

12

R636

10K_0402_5%

12

R640

@

10K_0402_5%

12

R637

10K_0402_5%

12

R641

10K_0402_5%

2

Check Internal PU/PD

12

@

10K_0402_5%

12

10K_0402_5%

PCI_CLK4

NON Fusion CLOCK Mode

Fusion CLOCK Mode

DEFAULT

12

R639

@

10K_0402_5%

12

R643

10K_0402_5%

PCI_CLK3 LPC_CLK1

USE DEBUG STRAP

IGNORE DEBUG STRAP

DEFAULT

12

R638

@

10K_0402_5%

12

R642

10K_0402_5%

R166

R167

@

LPC_CLK0

internal EC ENABLE

internal EC DISABLE

DEFAULT

12

R594

10K_0402_5%

12

R601

2.2K_0402_5%

12

10K_0402_5%

12

@

2.2K_0402_5%

R550

R602

@

Internal CLKGEN Mode

DEFAULT

External CLKGEN Mode

12

R551

10K_0402_5%

12

R625

2.2K_0402_5%

12

@

RTC_CLK

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

1

EC_PWM3EC_PWM2

LPC ROM (H.L)

DEFAULT

SPI ROM(L,H)

DEBUG STRAPS

FCH M1 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

PCI_AD25 PCI_AD24

Selects FC PLL

DEFAULT

FC PLL bypassed

PULL HIGH

PULL LOW

PCI_AD27

USE internal PLL generated PLL CLK

DEFAULT

BYPASS PCI PLL

PCI_AD26

ILA AUTORUN Disabled

DEFAULT

ILA AUTORUN

Enabled

Disable I2C ROM

DEFAULT

Getting Value from I2C EPROM

PCI_AD23 Enable ROM Straps

Required Setting

DEFAULT

Reserved

PCI_AD27<13> PCI_AD26<13> PCI_AD25<13> PCI_AD24<13> PCI_AD23<13>

12

R644

@

2.2K_0402_5%

12

R645

@

2.2K_0402_5%

R646

@

12

R647

2.2K_0402_5%

12

@

2.2K_0402_5%

R648

12

@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/08/20 2011/08/20

3

check defaultCheck AD29,AD28 strap function

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

FCH-VSS/Strap

LA-7092P P5WE6/H6/S6

17 46Friday, October 29, 2010

1

0.3

of

5

4

3

2

1

GFX PCIE LANE REVERSAL

U2G

D D

PCIE_FTX_C_GRX_P[0..3]<6>

PCIE_FTX_C_GRX_N[0..3]<6>

C C

B B

PCIE_FTX_C_GRX_P[0..3]

PCIE_FTX_C_GRX_N[0..3]

PCIE_FTX_C_GRX_P0 PCIE_FTX_C_GRX_N0

PCIE_FTX_C_GRX_P1 PCIE_FTX_C_GRX_N1

PCIE_FTX_C_GRX_P2 PCIE_FTX_C_GRX_N2

PCIE_FTX_C_GRX_P3 PCIE_FTX_C_GRX_N3

CLK_PCIE_VGA<13>

AH16 A Connect to GND for "Normal Operation"

CLK_PCIE_VGA#<13>

ccessiable for "Test Purposes"

VGA@

R5 10K_0402_5%

VGA_RST#

AA38

Y37

Y35

W36

W38

V37

V35 U36

U38

T37

T35

R36

R38 P37

P35 N36

N38 M37

M35

L36

L38

K37

K35

J36

J38

H37

H35 G36

G38

F37

F35

E37

AB35 AA36

AH16

12

AA30

U2A

PCIE_RX0P PCIE_RX0N

PCIE_RX1P PCIE_RX1N

PCIE_RX2P PCIE_RX2N

PCIE_RX3P PCIE_RX3N

PCIE_RX4P PCIE_RX4N

PCIE_RX5P PCIE_RX5N

PCIE_RX6P PCIE_RX6N

PCIE_RX7P PCIE_RX7N

PCIE_RX8P PCIE_RX8N

PCIE_RX9P PCIE_RX9N

PCIE_RX10P PCIE_RX10N

PCIE_RX11P PCIE_RX11N

PCIE_RX12P PCIE_RX12N

PCIE_RX13P PCIE_RX13N

PCIE_RX14P PCIE_RX14N

PCIE_RX15P PCIE_RX15N

CLOCK

PCIE_REFCLKP PCIE_REFCLKN

PWRGOOD

PERSTB

2160809000A11SEYMOU_FCBGA962

Seymour@

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP

PCIE_CALRN

PCIE_GTX_C_FRX_P[0..3]

PCIE_GTX_C_FRX_N[0..3]

Y33

PCIE_GTX_FRX_N0

Y32

PCIE_GTX_FRX_P1

W33

PCIE_GTX_FRX_N1

W32

PCIE_GTX_FRX_P2

U33

PCIE_GTX_FRX_N2

U32

U30

PCIE_GTX_FRX_N3

U29

T33 T32

T30 T29

P33 P32

P30 P29

N33 N32

N30 N29

L33 L32

L30 L29

K33 K32

J33 J32

K30 K29

H33 H32

VGA@

Y30

1 2

R3 1.27K_0402_1%

VGA@

Y29

1 2

R6 2K_0402_1%

PCIE_GTX_C_FRX_P[0..3] <6>

PCIE_GTX_C_FRX_N[0..3] <6>

C1 0.1U_0402_16V7K

1 2

C2 0.1U_0402_16V7K

1 2

VGA@

1 2

+1.0VSG

VGA@

1 2

VGA@

1 2

VGA@

1 2

VGA@

C3 0.1U_0402_16V7K

C3 0.1U_0402_16V7K C4 0.1U_0402_16V7K

C4 0.1U_0402_16V7K

C5 0.1U_0402_16V7K

C5 0.1U_0402_16V7K C6 0.1U_0402_16V7K

C6 0.1U_0402_16V7K

C7 0.1U_0402_16V7K

C7 0.1U_0402_16V7K C8 0.1U_0402_16V7K

C8 0.1U_0402_16V7K

PCIE_GTX_C_FRX_P0PCIE_GTX_FRX_P0 PCIE_GTX_C_FRX_N0

PCIE_GTX_C_FRX_P1 PCIE_GTX_C_FRX_N1

PCIE_GTX_C_FRX_P2 PCIE_GTX_C_FRX_N2

PCIE_GTX_C_FRX_P3PCIE_GTX_FRX_P3 PCIE_GTX_C_FRX_N3

U2G

LVDS CONTROL

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

LVTMDP

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

2160809000A11SEYMOU_FCBGA962

Seymour@

PE_GPIO0<13>

PLT_RST#<13,26,29>

VARY_BL

TXOUT_U3P

TXOUT_U3N

TXOUT_L3P TXOUT_L3N

2.2K_0402_5%

add for VB support.

AK27 AJ27

DIGON

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

12

R394

@

R159 0_0402_5%

R1

R1 10K_0402_5%

10K_0402_5%

1 2

R2

1 2

10K_0402_5%

VGA_TXCLK+ VGA_TXCLK-

VGA_TXOUT0+ VGA_TXOUT0-

VGA_TXOUT1+ VGA_TXOUT1-

VGA_TXOUT2+ VGA_TXOUT2-

+3VSG

U16

5

2

P

B

1

A

G

3

NC7SZ08P5X_NL_SC70-5

DISO@

1 2

VGA@

PX@

Y

VGA_RST#

4

VGA_INVT_PWM <10> VGA_ENVDD <10>

VGA_TXCLK+ <10> VGA_TXCLK- <10>

VGA_TXOUT0+ <10> VGA_TXOUT0- <10>

VGA_TXOUT1+ <10> VGA_TXOUT1- <10>

VGA_TXOUT2+ <10> VGA_TXOUT2- <10>

Seymour XT P/N: SA000047H10 (S IC 216-0809000 A11 SEYMOUR XT M2)

A A

Robson XT P/N: SA00004DR20 (S IC 216-0774211 A11 Robson XT M2 )

U2

Robson@U2

Robson@

Security Classification

Robson XT-M2 A11

Robson A11 (SA00004DR20)

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Vancouver_ PCIE / LVDS

LA-7092P P5WE6/H6/S6

1

0.3

18 46Friday, October 29, 2010

0.3

5

Strap Name Pin Straps description <all internal PD>

VIP_DEVICE_EN

(GENLK_VSYNC)

VGA_DIS

TX_PWRS_ENB

TX_DEEMPH_EN

D D

CONFIG[2] CONFIG[1] CONFIG[0]

BIOS_ROM_EN

AUD[1] AUD(0)

BIF_GEN2_EN

RESERVED

+3VSG

C C

(GENLK_CLK)

R11 10K_0402_5%VGA@ R11 10K_0402_5%VGA@ R13 10K_0402_5%VGA@ R13 10K_0402_5%VGA@ R15 10K_0402_5%@R15 10K_0402_5%@ R16 10K_0402_5%@R16 10K_0402_5%@ R17 10K_0402_5%@R17 10K_0402_5%@ R18 10K_0402_5%VGA@ R18 10K_0402_5%VGA@ R19 10K_0402_5%@R19 10K_0402_5%@ R20 10K_0402_5%@R20 10K_0402_5%@ R21 10K_0402_5%DISO@ R21 10K_0402_5%DISO@ R22 10K_0402_5%DISO@ R22 10K_0402_5%DISO@ R23 10K_0402_5%@R23 10K_0402_5%@ R24 10K_0402_5%@R24 10K_0402_5%@ R25 10K_0402_5%@R25 10K_0402_5%@ R26 10K_0402_5%@R26 10K_0402_5%@ R27 10K_0402_5%@R27 10K_0402_5%@ R28 10K_0402_5%@R28 10K_0402_5%@

Robson (XT)/Seymour(XT)

Location VRAM_ID3

VRAM

Samsung

SA00004GS10 G-die K4W1G1646G-BC11

Hynix

SA000032420 Orion-die H5TQ1G63BFR-12C

Hynix

SA000041S40 Vega-die H5TQ1G63DFR-11C

+3VSG

+1.8VSG

12

CLK_GPIO10

ROMSE_GPIO22

R51 0_0402_5%

@

R52 0_0402_5%

XTALOUT

VGA@

18P_0402_50V8J

B B

A A

VIP Device Strap Enable indicates to the software driver 0: Driver would ignore the value sampled on VHAD_0 d

SYNC

V2

1: VHAD_0 to determine whether or not a VIP slave device

VGA Disable determines 0: VGA Controller capacity enabled

GPIO9

1: The device will not be recognized as the system’s VGA controller

Transmitter Power Saving Enable

GPIO0

0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable

GPIO1

0: Tx de-emphasis diabled for mobile mode 1: Tx de-emphasis enabled (Defailt setting for desktop)

GPIO13,12,11 (config 2,1,0) : a) If BIOS_ROM_EN = 1, then Config[2:0] defines

GPIO13 GPIO12

the ROM type.

GPIO11

b) If BIOS_ROM_EN = 0, then Config[2:0] defines the primary memory aperture size.

GPIO22 Enable external BIOS ROM device

0: Diable, 1: Enable

00: No audio function; 10: Audio for DisplayPort only;

HSYNC

01: Audio for DisplayPort and HDMI if adapter is detected;

VS

YNC

11: Audio for both DisplayPort and HDMI 0= Advertises the PCI-E device as 2.5 GT/s capable at power-on

GPIO2

1= Advertises the PCI-E device as 5.0 GT/s capable at power-on

5.0 GT/s capability will be controlled by software

H2SYNC

Internal use only. THIS PAD HAS AN INTERNAL PULL-DOWN AND MUST BE 0 V AT RESET. The pad may be left unconnected

GPIO8 GPIO21 GENERICC GPIO5

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

Check option2 need to b

e added or not?

0 0 1 1

1 1 0

R38

10K_0402_5%@R38

10K_0402_5%

@

R44

10K_0402_5%@R44

10K_0402_5%

@

12

@

C35

R40

10K_0402_5%@R40

10K_0402_5%

R39

10K_0402_5%@R39

10K_0402_5%

12

@

R46

10K_0402_5%@R46

10K_0402_5%

R45

10K_0402_5%@R45

10K_0402_5%

12

@

FLASH ROM

U5

5

D

6

C

1

S

7

HOLD

3

W

8

VCC

2

M25P10-AVMN6P

C31

0.1U_0402_16V4Z

1

VGA@

Y1

VGA@Y1

VGA@

2 1

27MHZ_16PF_X5H027000FG1H

5

VGA_GPIO0 VGA_GPIO1 VGA_GPIO2

SOUT_GPIO8

SIN_GPIO9

VGA_GPIO11 VGA_GPIO12 VGA_GPIO13

VGA_CRT_VSYNC VGA_CRT_HSYNC

GENERICC

change VGA@ as DISO@

V2SYNC

For PVT

H2SYNC BB_EN_GPIO21 ROMSE_GPIO22

VGA_GPIO5

VRAM_ID2 VRAM_ID1 VRAM_ID0

0 01

SOUT_GPIO8SIN_GPIO9

<size>

Internal PD

PD-Reset

12

VSS

R531M_0603_5%

64MX16

<4 pcs>

1

<4 pcs>

1

<4 pcs>

R41

10K_0402_5%@R41

10K_0402_5%

@

VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3

R47

10K_0402_5%@R47

10K_0402_5%

@

2

Q

TYPE 1

4

@

27MCLK

C36

VGA@

18P_0402_50V8J

ring reset

u

memory apertures CONFIG[3:0] 128 MB 000 256 MB 001 * 64 MB 010

+1.8VSG

+1.0VSG

L4

BLM18AG121SN1D_0603

VGA@

470ohm/1A

AL31 Manhattan/Vancouver is NC, Boardway is ADC input(0-1V) use measure regulator current or temperature

+1.8VSG

Setting

0

1

001

0

11

0

DNI

VGA_ENBKL<10>

+1.8VSG

L3

BLM18AG121SN1D_0603

VGA@

470ohm/1A

12

1

2

VGA@

L5

BLM18AG121SN1D_0603

VGA@

120ohm/0.3A

VGA_LCD_CLK<10> VGA_LCD_DAT<10>

10U_0603_6.3V6M

4

Don't have this strap on Whistler and Seymour

NC on Park, Robson and Seymour

NC on Park and Robson

NC on Park, Robson and Seymour

+3VSG

R12 4.7K_0402_5%VGA@R12 4.7K_0402_5%VGA@

1 2

R14 4.7K_0402_5%VGA@R14 4.7K_0402_5%VGA@

1 2

GPIO_0 will use to control PSI in the future product

12

R29

VGA@R29

VGA@

10K_0402_5%

GPU_VID0<43>

GPU_VID1<43>

VGA_HDMI_DET<11>

R42 499_0402_1%VGA@R42 499_0402_1%VGA@

1 2

R43 249_0402_1%VGA@R43 249_0402_1%VGA@

1 2

VGA@

1 2

C21 0.1U_0402_16V4Z

12

10U_0603_6.3V6M

C25

1

2

VGA@

+DPLL_VDDC

0.1U_0402_16V4Z

1U_0402_6.3V4Z

C29

C28

1

2

VGA@

12

VGA@

4

C30

1

2

VGA@

+TSVDD

C32

10U_0603_6.3V6M

C32

10U_0603_6.3V6M

C33

1U_0402_6.3V4Z

C33

1U_0402_6.3V4Z

1

2

VGA@

VGA_LCD_CLK VGA_LCD_DAT

VGA_GPIO0 VGA_GPIO1 VGA_GPIO2

VGA_GPIO5

VGA_ENBKL SOUT_GPIO8 SIN_GPIO9 CLK_GPIO10 VGA_GPIO11 VGA_GPIO12 VGA_GPIO13

GPU_VID0

T1T1

THM_ALERT#

GPU_VID1 BB_EN_GPIO21

ROMSE_GPIO22

T2T2 T3T3 T4T4 T5T5 T6T6 T7T7

GENERICC

NC on Park

0.1U_0402_16V4Z

0.1U_0402_16V4Z C26

C26

1

2

VGA@

R49 0_0402_5%@R49 0_0402_5%@

R50 0_0402_5%@R50 0_0402_5%@

GPU_THERM_D+ GPU_THERM_D-

C34

0.1U_0402_16V4Z

C34

0.1U_0402_16V4Z

1

2

VGA@

VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3

VGA_HDMI_DET

+VGA_VREF

+DPLL_PVDD

1U_0402_6.3V4Z

C27

1 2

15mil

1

10mil

27MCLK XTALOUT

10mil

0mil

U2B

AR8

NC_DVPCNTL_MVP_0

AU8

NC_DVPCNTL_MVP_1

AP8

NC_DVPCNTL_0

AW8

NC_DVPCNTL_1

AR3

NC_DVPCNTL_2

AR1

NC_DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

NC_DVPDATA_17

AV11

NC_DVPDATA_18

AT11

NC_DVPDATA_19

AR12

NC_DVPDATA_20

AW12

NC_DVPDATA_21

AU12

NC_DVPDATA_22

AP12

NC_DVPDATA_23

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

NC_GENERICF_HPD5

AH24

NC_GENERICG_HPD6

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AL31

TS_A/NC

AJ32

TSVDD

AJ33

TSVSS

2160809000A11SEYMOU_FCBGA962

Seymour@

MUTI GFX

I2C

PLL/CLOCK

20mA

75mA

125mA

THERMAL

3

TXCAP_DPA3P TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

NC_TXCDP_DPD3P

NC_TXCDM_DPD3N

NC_TX3P_DPD2P

NC_TX3M_DPD2N

DPD

NC_TX4P_DPD1P

NC_TX4M_DPD1N

NC_TX5P_DPD0P

NC_TX5M_DPD0N

DAC1

HSYNC VSYNC

RSET

70mA

AVDD

AVSSQ

45mA

VDD1DI

VSS1DI

R2/NC

R2B/NC

G2/NC

G2B/NC

B2/NC

B2B/NC

COMP/NC

DAC2

H2SYNC/GENLK_CLK

V2SYNC/GENLK_VSYNC

100mA

VDD2DI/NC

VSS2DI/NC

130mA

A2VDD/NC

2mA

A2VDDQ/NC

A2VSSQ/TSVSSQ

R2SET/NC

DDC/AUX

DDC1CLK

DDC1DATA

AUX1P

AUX1N

DDC2CLK

DDC2DATA

AUX2P

AUX2N

DDCCLK_AUX3P

DDCDATA_AUX3N

NC_DDCCLK_AUX4P

NC_DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

3

2

External VGA Thermal Sensor

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

Not share via for other GND

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36 AC38

AB34

AD34 AE34

AC33 AC34

AC30 AC31

AD30 AD31

AF30 AF31

AC32

C/NC

AD32

Y/NC

AF32

AD29 AC29

AG31 AG32

AG33

AD33

AF33

AA29

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30 AM30

AL29 AM29

AN21 AM21

AJ30 AJ31

AK30 AK29

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

VGA_HDMI_TXC+ <11> VGA_HDMI_TXC- <11>

VGA_HDMI_TXD0+ <11> VGA_HDMI_TXD0- <11>

VGA_HDMI_TXD1+ <11> VGA_HDMI_TXD1- <11>

VGA_HDMI_TXD2+ <11> VGA_HDMI_TXD2- <11>

NC on Park, Robson and Seymour

VGA_CRT_R <12>

VGA_CRT_G <12>

VGA_CRT_B <12>

VGA_CRT_HSYNC <12> VGA_CRT_VSYNC <12>

R30 499_0402_1%VGA@R30 499_0402_1%VGA@

1 2

10mil

+AVDD

10mil

+VDD1DI

H2SYNC V2SYNC

10mil

+VDD1DI

10mil

+A2VDD

10mil

+A2VDDQ

R48

715_0402_1%

1 2

VGA@

VGA_HDMI_SCLK VGA_HDMI_SDATA

NC

on Park,

Robson and Seymour

VGA_CRT_CLK VGA_CRT_DATA

NC on Park, Robson and Seymour

HDMI

10U_0603_6.3V6M

0.1U_0402_16V4Z

1U_0402_6.3V4Z

C12

1

2

VGA@

0.1U_0402_16V4Z

1U_0402_6.3V4Z

C15

1

2

VGA@

1U_0402_6.3V4Z

C18

1

2

VGA@

C22

1U_0402_6.3V4Z

C22

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

2

VGA_HDMI_SCLK <11> VGA_HDMI_SDATA <11>

VGA_CRT_CLK <12> VGA_CRT_DATA <12>

2010/08/20 2011/08/20

10U_0603_6.3V6M

C14

C13

C16

0.1U_0402_16V4Z

C24

VGA@

C19

VGA@

1

2

1

2

VGA@

1

2

VGA@

10U_0603_6.3V6M

C17

10U_0603_6.3V6M

C20

1

2

C23

10U_0603_6.3V6M

C23

10U_0603_6.3V6M

C52

1

2

L79 BLM18AG121SN1D_0603

VGA@

120ohm/0.3A

+3VSG

+1.8VSG

HDMI

CRT

Compal Secret Data

Deciphered Date

2

+3VSG

1

C10

VGA@

2

GPU_THERM_D+

2200P_0402_50V7K

VGA@

1 2

C11

GPU_THERM_D-

+3VSG

R9

4.7K_0402_5%

VGA@

VGA_SMB_CK2

VGA_SMB_DA2

L78

L78 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

12

VGA@

120ohm/0.3A

Change 0603 size For DVT

12

+1.8VSG

0.1U_0402_16V4Z

1 2

+1.8VSG

U4

VGA@U4

VGA@

1

VDD

SCLK

2

D+

SDATA

3

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

1001 101X b

Address

R10

4.7K_0402_5%

VGA@

1 2

2

DMN66D0LDW-7_SOT363-6

Q1A DMN66D0LDW-7_SOT363-6

VGA_CRT_CLK VGA_CRT_DATA

VGA_CRT_R VGA_CRT_G VGA_CRT_B

4

8

7

6

5

+3VSG

Q1B

5

61

VGA@

VGA@Q1B

VGA@

VGA_SMB_CK2

VGA_SMB_DA2

R7

0_0402_5%

VGA@

EC_SMB_CK2

3

EC_SMB_DA2

12

NC on Whistler and Seymour

In Whistler and Seymour, change to G

ENLK_CLK, GENLK_VSYNC for

Global Swap Lock on multiple GPUs

Except A2VSSQ change to TSVSSQ, others are NC on Whistler and Seymour

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Vancouver_Strape/DP/HDMI//CRT

LA-7092P P5WE6/H6/S6

1

THM_ALERT#

1 2

R8 4.7K_0402_5%

VGA@

EC_SMB_CK2 <5,31>

EC_SMB_DA2 <5,31>

R33 10K_0402_5%VGA@ R33 10K_0402_5%VGA@

1 2

R34 10K_0402_5%VGA@ R34 10K_0402_5%VGA@

1 2

R35 150_0402_1%VGA@ R35 150_0402_1%VGA@

1 2

R36 150_0402_1%VGA@ R36 150_0402_1%VGA@

1 2

R37 150_0402_1%VGA@ R37 150_0402_1%VGA@

1 2

1

+3VSG

19 46Friday, October 29, 2010

+3VSG

0.3

5

4

3

2

1

Robson,Seymour only support single channel memory (channel B only)

D D

U2C

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C37

NC_DQA0_0/DQA_0

C35

NC_DQA0_1/DQA_1

A35

NC_DQA0_2/DQA_2

E34

NC_DQA0_3/DQA_3

G32

NC_DQA0_4/DQA_4

D33

NC_DQA0_5/DQA_5

F32

NC_DQA0_6/DQA_6

E32

NC_DQA0_7/DQA_7

D31

NC_DQA0_8/DQA_8

F30

NC_DQA0_9/DQA_9

C30

NC_DQA0_10/DQA_10

A30

NC_DQA0_11/DQA_11

F28

NC_DQA0_12/DQA_12

C28

NC_DQA0_13/DQA_13

A28

NC_DQA0_14/DQA_14

E28

+1.5VSG

12

R54

VGA@

40.2_0402_1%

C C

100_0402_1%

40.2_0402_1%

100_0402_1%

B B

A A

R55

VGA@

R58

VGA@

R59

VGA@

+1.5VSG

12

MVREFDA

0.1U_0402_16V4Z

1

C37

VGA@

2

MVREFSA

C39

0.1U_0402_16V4Z

C39

0.1U_0402_16V4Z

1

2

VGA@

R62 243_0402_1%VGA@R62 243_0402_1%VGA@ R63 243_0402_1%VGA@R63 243_0402_1%VGA@ R64 243_0402_1%VGA@R64 243_0402_1%VGA@

R66 243_0402_1%VGA@R66 243_0402_1%VGA@ R67 243_0402_1%VGA@R67 243_0402_1%VGA@ R69 243_0402_1%VGA@R69 243_0402_1%VGA@

MVREFDA MVREFSA

12 12 12

NC_DQA0_15/DQA_15

D27

NC_DQA0_16/DQA_16

F26

NC_DQA0_17/DQA_17

C26

NC_DQA0_18/DQA_18

A26

NC_DQA0_19/DQA_19

F24

NC_DQA0_20/DQA_20

C24

NC_DQA0_21/DQA_21

A24

NC_DQA0_22/DQA_22

E24

NC_DQA0_23/DQA_23

C22

NC_DQA0_24/DQA_24

A22

NC_DQA0_25/DQA_25

F22

NC_DQA0_26/DQA_26

D21

NC_DQA0_27/DQA_27

A20

NC_DQA0_28/DQA_28

F20

NC_DQA0_29/DQA_29

D19

NC_DQA0_30/DQA_30

E18

NC_DQA0_31/DQA_31

C18

NC_DQA1_0/DQA_32

A18

NC_DQA1_1/DQA_33

F18

NC_DQA1_2/DQA_34

D17

NC_DQA1_3/DQA_35

A16

NC_DQA1_4/DQA_36

F16

NC_DQA1_5/DQA_37

D15

NC_DQA1_6/DQA_38

E14

NC_DQA1_7/DQA_39

F14

NC_DQA1_8/DQA_40

D13

NC_DQA1_9/DQA_41

F12

NC_DQA1_10/DQA_42

A12

NC_DQA1_11/DQA_43

D11

NC_DQA1_12/DQA_44

F10

NC_DQA1_13/DQA_45

A10

NC_DQA1_14/DQA_46

C10

NC_DQA1_15/DQA_47

G13

NC_DQA1_16/DQA_48

H13

NC_DQA1_17/DQA_49

J13

NC_DQA1_18/DQA_50

H11

NC_DQA1_19/DQA_51

G10

NC_DQA1_20/DQA_52

G8

NC_DQA1_21/DQA_53

K9

NC_DQA1_22/DQA_54

K10

NC_DQA1_23/DQA_55

G9

NC_DQA1_24/DQA_56

A8

NC_DQA1_25/DQA_57

C8

NC_DQA1_26/DQA_58

E8

NC_DQA1_27/DQA_59

A6

NC_DQA1_28/DQA_60

C6

NC_DQA1_29/DQA_61

E6

NC_DQA1_30/DQA_62

A5

NC_DQA1_31/DQA_63

L18

NC_MVREFDA

L20

NC_MVREFSA

L27

NC_MEM_CALRN0

N12

MEM_CALRN1

AG12

NC_MEM_CALRN2

M12

MEM_CALRP1

M27

NC_MEM_CALRP0

AH12

NC_MEM_CALRP2

2160809000A11SEYMOU_FCBGA9 62

Seymour@

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

NC_MAA0_0/MAA_0 NC_MAA0_1/MAA_1 NC_MAA0_2/MAA_2 NC_MAA0_3/MAA_3 NC_MAA0_4/MAA_4 NC_MAA0_5/MAA_5 NC_MAA0_6/MAA_6 NC_MAA0_7/MAA_7 NC_MAA1_0/MAA_8

NC_MAA1_1/MAA_9 NC_MAA1_2/MAA_10 NC_MAA1_3/MAA_11 NC_MAA1_4/MAA_12

NC_MAA1_5/MAA_13_BA2 NC_MAA1_6/MAA_14_BA0

NC_MAA1_7/MAA_A15_BA1

NC_WCKA0_0/DQMA_0

NC_WCKA0B_0/DQMA_1

NC_WCKA0_1/DQMA_2

NC_WCKA0B_1/DQMA_3

NC_WCKA1_0/DQMA_4

NC_WCKA1B_0/DQMA_5

NC_WCKA1_1/DQMA_6

NC_WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

MEMORY INTERFACE A

NC_EDCA0_0/QSA_0/RDQSA_0 NC_EDCA0_1/QSA_1/RDQSA_1 NC_EDCA0_2/QSA_2/RDQSA_2 NC_EDCA0_3/QSA_3/RDQSA_3 NC_EDCA1_0/QSA_4/RDQSA_4 NC_EDCA1_1/QSA_5/RDQSA_5 NC_EDCA1_2/QSA_6/RDQSA_6 NC_EDCA1_3/QSA_7/RDQSA_7

NC_DDBIA0_0/QSA_0B/WDQSA_0 NC_DDBIA0_1/QSA_1B/WDQSA_1 NC_DDBIA0_2/QSA_2B/WDQSA_2 NC_DDBIA0_3/QSA_3B/WDQSA_3 NC_DDBIA1_0/QSA_4B/WDQSA_4 NC_DDBIA1_1/QSA_5B/WDQSA_5 NC_DDBIA1_2/QSA_6B/WDQSA_6 NC_DDBIA1_3/QSA_7B/WDQSA_7

NC_ADBIA0/ODTA0

NC_ADBIA1/ODTA1

GDDR5

NC_CLKA0

NC_CLKA0B

NC_CLKA1

NC_CLKA1B

NC_RASA0B NC_RASA1B

NC_CASA0B NC_CASA1B

NC_CSA0B_0 NC_CSA0B_1

NC_CSA1B_0 NC_CSA1B_1

NC_CKEA0 NC_CKEA1

NC_WEA0B NC_WEA1B

NC_MAA0_8 NC_MAA1_8

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21 G19

H27 G27

J14 H14

K23 K19

K20 K17

K24 K27

M13 K16

K21 J20

K26 L15

H23 J19

R56

VGA@

40.2_0402_1%

R57

VGA@

100_0402_1%

R60

VGA@

40.2_0402_1%

R61

VGA@

100_0402_1%

MDB[0..63]<23>

+1.5VSG

12

+1.5VSG

12

C38

VGA@

C40

VGA@

MVREFDB

0.1U_0402_16V4Z

1

2

MVREFSB

0.1U_0402_16V4Z

1

2

MDB[0..63]

R65 5.11K_0402_1%

0.1U_0402_16V4Z

C41

VGA@C41

VGA@

R72

VGA@

51.1_0402_1%

VGA@

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

MVREFDB MVREFSB

TESTEN

12

TEST_MCLK TEST_YCLK

0.1U_0402_16V4Z

C42

2

VGA@C42

VGA@

1

12

R73

VGA@

51.1_0402_1%

U2D

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C5

DQB0_0/DQB_0

C3

DQB0_1/DQB_1

E3

DQB0_2/DQB_2

E1

DQB0_3/DQB_3

F1

DQB0_4/DQB_4

F3

DQB0_5/DQB_5

F5

DQB0_6/DQB_6

G4

DQB0_7/DQB_7

H5

DQB0_8/DQB_8

H6

DQB0_9/DQB_9

J4

DQB0_10/DQB_10

K6

DQB0_11/DQB_11

K5

DQB0_12/DQB_12

L4

DQB0_13/DQB_13

M6

DQB0_14/DQB_14

M1

DQB0_15/DQB_15

M3

DQB0_16/DQB_16

M5

DQB0_17/DQB_17

N4

DQB0_18/DQB_18

P6

DQB0_19/DQB_19

P5

DQB0_20/DQB_20

R4

DQB0_21/DQB_21

T6

DQB0_22/DQB_22

T1

DQB0_23/DQB_23

U4

DQB0_24/DQB_24

V6

DQB0_25/DQB_25

V1

DQB0_26/DQB_26

V3

DQB0_27/DQB_27

Y6

DQB0_28/DQB_28

Y1

DQB0_29/DQB_29

Y3

DQB0_30/DQB_30

Y5

DQB0_31/DQB_31

AA4

DQB1_0/DQB_32

AB6

DQB1_1/DQB_33

AB1

DQB1_2/DQB_34

AB3

DQB1_3/DQB_35

AD6

DQB1_4/DQB_36

AD1

DQB1_5/DQB_37

AD3

DQB1_6/DQB_38

AD5

DQB1_7/DQB_39

AF1

DQB1_8/DQB_40

AF3

DQB1_9/DQB_41

AF6

DQB1_10/DQB_42

AG4

DQB1_11/DQB_43

AH5

DQB1_12/DQB_44

AH6

DQB1_13/DQB_45

AJ4

DQB1_14/DQB_46

AK3

DQB1_15/DQB_47

AF8

DQB1_16/DQB_48

AF9

DQB1_17/DQB_49

AG8

DQB1_18/DQB_50

AG7

DQB1_19/DQB_51

AK9

DQB1_20/DQB_52

AL7

DQB1_21/DQB_53

AM8

DQB1_22/DQB_54

AM7

DQB1_23/DQB_55

AK1

DQB1_24/DQB_56

AL4

DQB1_25/DQB_57

AM6

DQB1_26/DQB_58

AM1

DQB1_27/DQB_59

AN4

DQB1_28/DQB_60

AP3

DQB1_29/DQB_61

AP1

DQB1_30/DQB_62

AP5

DQB1_31/DQB_63

Y12

MVREFDB

AA12

MVREFSB

AD28

TESTEN

AK10

CLKTESTA

AL10

CLKTESTB

2160809000A11SEYMOU_FCBGA9 62

Seymour@

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8

MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0

MEMORY INTERFACE B

EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7

ADBIB0/ODTB0 ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B RASB1B

CASB0B CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB0_8 MAB1_8

DRAM_RST

GDDR5

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8

AH11

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 B_BA2 B_BA0 B_BA1

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7

ODTB0 ODTB1

R68

R71

5.11K_0402_1%

12

VGA@R71

VGA@

CLKB0 CLKB0#

CLKB1 CLKB1#

RASB0# RASB1#

CASB0# CASB1#

CSB0#_0

CSB1#_0

CKEB0 CKEB1

WEB0# WEB1#

VGA@R68

VGA@

1 2

10_0402_5%

120P_0402_50V8

1

2

MAB[0..12]

B_BA[0..2]

DQMB#[0..7]

QSB[0..7]

QSB#[0..7]

ODTB0 <23> ODTB1 <23>

CLKB0 <23> CLKB0# <23>

CLKB1 <23> CLKB1# <23>

RASB0# <23> RASB1# <23>

CASB0# <23> CASB1# <23>

CSB0#_0 <23>

CSB1#_0 <23>

CKEB0 <23> CKEB1 <23>

WEB0# <23> WEB1# <23>

MAB13 <23>

VGA@ R70

VGA@

1 2

51.1_0402_1%

C43

VGA@

MAB[0..12] <23>

B_BA[0..2] <23>

DQMB#[0..7] <23>

QSB[0..7] <23>

QSB#[0..7] <23>

MAB13 is for 128M*16 VRAM

R70

VRAM_RST# <23>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Vancouver_Memory

LA-7092P P5WE6/H6/S6

1

20 46Fr iday, October 29, 2010

0.3

5

+1.5VSG

1

+

C322

VGA@

390U_2.5V_10M

D D

C C

390U_2.5V_10M

390U ESR:10m H:5.7 P/N:SF000002O00

2

10U_0603_6.3V6M

1

2

+1.8VSG

+3VSG

1

2

1

2

C335

1

MAN@C335

MAN@

2

C323

1U_0402_6.3V4Z

C338

1U_0402_6.3V4Z

1

VGA@C323

VGA@

VGA@C338

VGA@

2

C349

1U_0402_6.3V4Z

C348

1U_0402_6.3V4Z

1

VGA@C349

VGA@

VGA@C348

VGA@

2

C336

10U_0603_6.3V6M

C358

10U_0603_6.3V6M

1

VGA@C336

VGA@

VGA@C358

VGA@

2

Change 0603 size For DVT

L35

BLM18AG121SN1D_0603

120ohm/0.3A

Removed bead on ref137-12

1

2

10U_0603_6.3V6M

+1.0VSG

BLM18AG601SN1D_2P

120ohm/0.3A

C404

1U_0402_6.3V4Z

C403

1

VGA@C404

VGA@

VGA@C403

VGA@

2

L36

1

2

L40 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

470ohm/1A

+1.8VSG

BLM18AG121SN1D_0603

12

1

2

BLM18AG121SN1D_0603

L37

470ohm/1A

C409

10U_0603_6.3V6M

C410

1U_0402_6.3V4Z

1

VGA@C409

VGA@

VGA@C410

VGA@

2

5

VGA@L37

VGA@

12

C411

0.1U_0402_16V4Z

1

VGA@C411

VGA@

2

B B

+1.8VSG

A A

+1.8VSG

BLM18AG121SN1D_0603

L38

VGA@L38

VGA@

120ohm/0.3A

0.1U_0402_16V4Z

1

2

1

2

1

2

VGA@L35

VGA@

VGA@L36

VGA@

C405

VGA@C405

VGA@

1U_0402_6.3V4Z

10U_0603_6.3V6M

VGA@L40

VGA@

C324

1U_0402_6.3V4Z

C340

1U_0402_6.3V4Z

C339

1

VGA@C324

VGA@

VGA@C340

VGA@C339

VGA@

C329

VGA@C329

VGA@

C359

VGA@C359

VGA@

12

1

2

VGA@

2

C330

1U_0402_6.3V4Z

C331

1U_0402_6.3V4Z

1

2

1

2

C406

1U_0402_6.3V4Z

VGA@C406

VGA@

12

1

VGA@C330

VGA@

VGA@C331

VGA@

2

C361

1U_0402_6.3V4Z

C360

10U_0603_6.3V6M

1

VGA@C361

VGA@

VGA@C360

VGA@

2

1U_0402_6.3V4Z

C384

10U_0603_6.3V6M

1

VGA@C384

VGA@

2

C397

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

VGA@C397

VGA@

2

1U_0402_6.3V4Z

C400

10U_0603_6.3V6M

1

VGA@C400

VGA@

2

C407

0.1U_0402_16V4Z

1

VGA@C407

VGA@

2

C408

10U_0603_6.3V6M

1

VGA@C408

VGA@

2

4

U2E

MEM I/O

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

LEVEL TRANSLATION

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

I/O

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR4#4

AF15

VDDR4#5

AG13

VDDR4#7

AG15

VDDR4#8

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#6

M20

NC_VDDRHA

M21

NC_VSSRHA

V12

NC_VDDRHB

U12

NC_VSSRHB

PLL

H7

MPV18#1

H8

MPV18#2

AM10

SPV18

AN9

SPV10

AN10

SPVSS

VOLTAGE

VOLTAGE SENESE

SENESE

AF28

FB_VDDC

AG28

FB_VDDCI

AH29

FB_GND

2160809000A11SEYMOU_FCBGA9 62

Seymour@

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

2

+VDD_CT

+MPV_18

+SPV_18

+SPV10

C413

VGA@C413

VGA@

1 2

4

C342

VGA@C342

VGA@

C352

VGA@C352

VGA@

C363

VGA@C363

VGA@

+VDDR3

170mA

+VDDR4

GCORE_SEN

R375

2800mA

219mA

0

6

75mA

75

120mA

FB_GND

0_0402_5%VGA@

mA

C341

1U_0402_6.3V4Z

C325

1U_0402_6.3V4Z

1

VGA@C341

VGA@

VGA@C325

VGA@

2

C351

1U_0402_6.3V4Z

C350

1U_0402_6.3V4Z

1

VGA@C351

VGA@

VGA@C350

VGA@

2

C337

1U_0402_6.3V4Z

C362

1U_0402_6.3V4Z

1

VGA@C337

VGA@

VGA@C362

VGA@

2

C385

C386

0.1U_0402_16V4Z

1

VGA@C385

VGA@

VGA@C386

VGA@

2

C399

0.1U_0402_16V4Z

C398

1

VGA@C399

VGA@

VGA@C398

VGA@

2

C402

0.1U_0402_16V4Z

C401

1

VGA@C402

VGA@

VGA@C401

VGA@

2

C412

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

VGA@C412

VGA@

2

GCORE_SEN<43>

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDR/PCIE_PVDD

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

CORE

VDDC/BIF_VDDC#33

VDDC/BIF_VDDC#42

ISOLATED

ISOLATED CORE I/O

CORE I/O

AA31 AA32 AA33 AA34 V28 W29 W30 Y31 AB37

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

AA15

VDDC#1

AA17

VDDC#2

AA20

VDDC#3

AA22

VDDC#4

AA24

VDDC#5

AA27

VDDC#6

AB16

VDDC#7

AB18

VDDC#8

AB21

VDDC#9

AB23

VDDC#10

AB26

VDDC#11

AB28

VDDC#12

AC17

VDDC#13

AC20

VDDC#14

AC22

VDDC#15

AC24

POWER

VDDC#16

AC27

VDDC#17

AD18

VDDC#18

AD21

VDDC#19

AD23

VDDC#20

AD26

VDDC#21

AF17

VDDC#22

AF20

VDDC#23

AF22

VDDC#24

AG16

VDDC#25

AG18

VDDC#26

AG21

VDDC#27

AH22

VDDC#28

AH27

VDDC#29

AH28

VDDC#30

M26

VDDC#31

N24

VDDC#32

N27 R18

VDDC#34

R21

VDDC#35

R23

VDDC#36

R26

VDDC#37

T17

VDDC#38

T20

VDDC#39

T22

VDDC#40

T24

VDDC#41

T27 U16

VDDC#43

U18

VDDC#44

U21

VDDC#45

U23

VDDC#46

U26

VDDC#47

V17

VDDC#48

V20

VDDC#49

V22

VDDC#50

V24

VDDC#51

V27

VDDC#52

Y16

VDDC#53

Y18

VDDC#54

Y21

VDDC#55

Y23

VDDC#56

Y26

VDDC#57

Y28

VDDC#58

AA13

VDDCI#1

AB13

VDDCI#2

AC12

VDDCI#3

AC15

VDDCI#4

AD13

VDDCI#5

AD16

VDDCI#6

M15

VDDCI#7

M16

VDDCI#8

M18

VDDCI#9

M23

VDDCI#10

N13

VDDCI#11

N15

VDDCI#12

N17

VDDCI#13

N20

VDDCI#14

N22

VDDCI#15

R12

VDDCI#16

R13

VDDCI#17

R16

VDDCI#18

T12

VDDCI#19

T15

VDDCI#20

V15

VDDCI#21

Y13

VDDCI#22

3

FBMA-L11-201209-221LMA30T_0805

504mA

0.1U_0402_16V4Z

1

2

2A

1U_0402_6.3V4Z

1

2

FOR XT DDR3 13 A (RMS)/14.2 A(Peak)

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

2

10U_0603_6.3V6M

1

2

Change 0603 size For DVT

55mA

+BIF_VDDC

4A

+VDDCI+VDDCI

0.1U_0402_16V4Z

C414

1

VGA@C414

VGA@

2

C422

1U_0402_6.3V4Z

1

VGA@C422

VGA@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+PCIE_VDDR

C327

1U_0402_6.3V4Z

C343

0.1U_0402_16V4Z

C326

1

VGA@C343

VGA@

VGA@C326

VGA@

2

C353

C332

1U_0402_6.3V4Z

1

VGA@C353

VGA@

VGA@C332

VGA@

2

1U_0402_6.3V4Z

C364

1

VGA@C364

VGA@

2

C374

1U_0402_6.3V4Z

1

VGA@C374

VGA@

2

C387

10U_0603_6.3V6M

1

VGA@C387

VGA@

2

1U_0402_6.3V4Z

C415

1

VGA@C415

VGA@

2

C423

1U_0402_6.3V4Z

1

VGA@C423

VGA@

2

C328

1U_0402_6.3V4Z

1

2

1

2

C365

VGA@C365

VGA@

C375

VGA@C375

VGA@

C388

VGA@C388

VGA@

C416

1U_0402_6.3V4Z

VGA@C416

VGA@

C424

1U_0402_6.3V4Z

VGA@C424

VGA@

1

VGA@C327

VGA@

VGA@C328

VGA@

2

C354

1U_0402_6.3V4Z

C333

1U_0402_6.3V4Z

1

VGA@C354

VGA@

VGA@C333

VGA@

2

Change 0603 size For DVT

1U_0402_6.3V4Z

C366

1U_0402_6.3V4Z

1

VGA@C366

VGA@

2

C376

1U_0402_6.3V4Z

1

VGA@C376

VGA@

2

10U_0603_6.3V6M

C389

10U_0603_6.3V6M

1

VGA@C389

VGA@

2

C418

1U_0402_6.3V4Z

C417

1U_0402_6.3V4Z

1

VGA@C418

VGA@

VGA@C417

VGA@

2

C426

1U_0402_6.3V4Z

C425

1U_0402_6.3V4Z

1

VGA@C426

VGA@

VGA@C425

VGA@

2

2010/08/20 2011/08/20

FBMA-L11-201209-221LMA30T_0805

C345

1U_0402_6.3V4Z

C344

1U_0402_6.3V4Z

1

VGA@C345

VGA@

VGA@C344

VGA@

2

C355

1U_0402_6.3V4Z

C334

1U_0402_6.3V4Z

1

VGA@C355

VGA@

VGA@C334

VGA@

2

C368

1U_0402_6.3V4Z

C367

1

VGA@C368

VGA@

VGA@C367

VGA@

2

C378

1U_0402_6.3V4Z

C377

1

VGA@C378

VGA@

VGA@C377

VGA@

2

C391

10U_0603_6.3V6M

C390

1

VGA@C391

VGA@

VGA@C390

VGA@

2

C419

1U_0402_6.3V4Z

C420

1U_0402_6.3V4Z

1

VGA@C419

VGA@

VGA@C420

VGA@

2

C421

10U_0603_6.3V6M

C427

10U_0603_6.3V6M

1

VGA@C421

VGA@

VGA@C427

VGA@

2

Change 0603 size For DVT

Compal Secret Data

2

L34

VGA@L34

VGA@

C347

10U_0603_6.3V6M

C346

1U_0402_6.3V4Z

1

220ohm/2A

VGA@C347

VGA@

VGA@C346

VGA@

2

C356

1U_0402_6.3V4Z

C357

10U_0603_6.3V6M

1

VGA@C356

VGA@

VGA@C357

VGA@

2

C369

1U_0402_6.3V4Z

C370

1U_0402_6.3V4Z

1

VGA@C369

VGA@

VGA@C370

2

1

2

1

2

VGA@

2

C379

1U_0402_6.3V4Z

C380

1U_0402_6.3V4Z

1

VGA@C379

VGA@

VGA@C380

VGA@

2

C393

10U_0603_6.3V6M

C392

10U_0603_6.3V6M

1

VGA@C393

VGA@

VGA@C392

VGA@

2

330U ESR:10m H:5.7 P/N:SF000002O00

FBMA-L11-201209-121LMA50T_0805

C428

10U_0603_6.3V6M

1

VGA@C428

VGA@

2

Deciphered Date

2

12

+1.8VSG

Change 0603 size For DVT

1

+

C686

VGA@

390U_2.5V_10M

2

C371

1U_0402_6.3V4Z

1

VGA@C371

VGA@

2

C381

1U_0402_6.3V4Z

1

VGA@C381

VGA@

2

1

+

C394

VGA@

390U_2.5V_10M

2

L39

VGA@L39

VGA@

L41

VGA@L41

VGA@

12

+1.0VSG

C372

1U_0402_6.3V4Z

1

VGA@C372

VGA@

2

C382

1U_0402_6.3V4Z

1

VGA@C382

VGA@

2

1

+

330U_D2_2V_Y

2

12

C395

VGA@

1

C373

1U_0402_6.3V4Z

+VGA_CORE

1

VGA@C373

VGA@

2

C383

1U_0402_6.3V4Z

1

VGA@C383

VGA@

2

J7

2

JUMP_43X118@J7JUMP_43X118@

+VGA_CORE

112

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Vancouver_Power/GND

LA-7092P P5WE6/H6/S6

1

21 46M onday, November 01, 2010

0.3

5

U2F

4

3

2

1

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

D D

C C

B B

A A

@

1 2

R455 0_0603_ 5%

PCIE_VSS#10

J34

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#100

F17

GND#101

F19

GND#102

F21

GND#103

F23

GND#104

F25

GND#105

F27

GND#106

F29

GND#107

F31

GND#108

F33

GND#109

F7

GND#110

F9

GND#111

G2

GND#112

G6

GND#113

H9

GND#114

J2

GND#115

J27

GND#116

J6

GND#117

J8

GND#118

K14

GND#119

K7

GND#120

L11

GND#121

L17

GND#122

L2

GND#123

L22

GND#124

L24

GND#125

L6

GND#126

M17

GND#127

M22

GND#128

M24

GND#129

N16

GND#130

N18

GND#131

N2

GND#132

N21

GND#133

N23

GND#134

N26

GND#135

N6

GND#136

R15

GND#137

R17

GND#138

R2

GND#139

R20

GND#140

R22

GND#141

R24

GND#142

R27

GND#143

R6

GND#144

T11

GND#145

T13

GND#146

T16

GND#147

T18

GND#148

T21

GND#149

T23

GND#150

T26

GND#151

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#163

V18

GND#164

V21

GND#165

V23

GND#166

V26

GND#167

W2

GND#168

W6

GND#169

Y15

GND#170

Y17

GND#171

Y20

GND#172

Y22

GND#173

Y24

GND#174

Y27

GND#175

U13

GND#152

V13

GND#162

2160809000A11SEYMOU_FCBGA962

Seymour@

5

GND

GND/PX_EN#61

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60

GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

R378

1 2

U2H

DP C/D POWER

L42

VGA@L42

VGA@

BLM18AG121SN1D_0603

+1.8VSG

+1.0VSG

4

BLM18AG121SN1D_0603

470ohm/1A

BLM18AG121SN1D_0603

470ohm/1A

L67 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

470ohm/1A

PX_EN <24>

L80 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

470ohm/1A

+1.8VSG

+1.0VSG

0_0402_5%BACO@

12

C429

10U_0603_6.3V6M

1

VGA@C429

VGA@

2

L64

VGA@L64

VGA@

12

C435

10U_0603_6.3V6M

1

VGA@C435

VGA@

2

VGA@L67

VGA@

12

C441

10U_0603_6.3V6M

1

2

VGA@C 441

VGA@

VGA@L80

VGA@

12

C444

10U_0603_6.3V6M

1

VGA@C444

VGA@

2

150mA

C431

1U_0402_6.3V4Z

C430

0.1U_0402_16V4Z

1

VGA@C431

VGA@

VGA@C430

VGA@

2

110mA

C437

1U_0402_6.3V4Z

C436

0.1U_0402_16V4Z

1

VGA@C437

VGA@

VGA@C436

VGA@

2

440mA

C443

1U_0402_6.3V4Z

C442

0.1U_0402_16V4Z

1

2

VGA@C 443

VGA@

VGA@C 442

VGA@

4

0mA

2

C446

1U_0402_6.3V4Z

C445

0.1U_0402_16V4Z

1

VGA@C446

VGA@

VGA@C445

VGA@

2

+DPCD_VDD18

+DPCD_VDD10

+DPCD_VDD18

+DPCD_VDD10

R376

150_0402_1%

VGA@

12

+DPEF_VDD18

+DPEF_VDD10

+DPEF_VDD18

+DPEF_VDD10

R379

VGA@

150_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DP C/D POWER

AP20

DPCD/DPC_VDD18#1

AP21

DPCD/DPC_VDD18#2

AP13

DPCD/DPC_VDD10#1

AT13

DPCD/DPC_VDD10#2

AN17

DP/DPC_VSSR#1

AP16

DP/DPC_VSSR#2

AP17

DP/DPC_VSSR#3

AW14

DP/DPC_VSSR#4

AW16

DP/DPC_VSSR#5

AP22

DPCD/DPD_VDD18#1

AP23

DPCD/DPD_VDD18#2

AP14

DPCD/DPD_VDD10#1

AP15

DPCD/DPD_VDD10#2

AN19

DP/DPD_VSSR#1

AP18

DP/DPD_VSSR#2

AP19

DP/DPD_VSSR#3

AW20

DP/DPD_VSSR#4

AW22

DP/DPD_VSSR#5

AW18

DPCD_CALR

DP E/F POWER

AH34

DPEF/DPE_VDD18#1

AJ34

DPEF/DPE_VDD18#2

AL33

DPEF/DPE_VDD10#1

AM33

DPEF/DPE_VDD10#2

AN34

DP/DPE_VSSR#1

AP39

DP/DPE_VSSR#2

AR39

DP/DPE_VSSR#3

AU37

DP/DPE_VSSR#4

AF34

DPEF/DPF_VDD18#1

AG34

DPEF/DPF_VDD18#2

AK33

DPEF/DPF_VDD10#1

AK34

DPEF/DPF_VDD10#2

AF39

DP/DPF_VSSR#1

AH39

DP/DPF_VSSR#2

AK39

DP/DPF_VSSR#3

AL34

DP/DPF_VSSR#4

AM34

DP/DPF_VSSR#5

12

AM39

DPEF_CALR

2160809000A11SEYMOU_FCBGA962

Seymour@

2010/08/20 2011/08/20

DP A/B POWER

DPAB/DPA_VDD18#1 DPAB/DPA_VDD18#2

DPAB/DPA_VDD10#1 DPAB/DPA_VDD10#2

DP/DPA_VSSR#1 DP/DPA_VSSR#2 DP/DPA_VSSR#3 DP/DPA_VSSR#4 DP/DPA_VSSR#5

DPAB/DPB_VDD18#1 DPAB/DPB_VDD18#2

DPAB/DPB_VDD10#1 DPAB/DPB_VDD10#2

DP/DPB_VSSR#1 DP/DPB_VSSR#2 DP/DPB_VSSR#3 DP/DPB_VSSR#4 DP/DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DPAB_VDD18/DPA_PVDD

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPB_PVDD

DP_VSSR/DPB_PVSS

DPCD_VDD18/DPC_PVDD

DP_VSSR/DPC_PVSS

DPCD_VDD18/DPD_PVDD

DP_VSSR/DPD_PVSS

DPEF_VDD18/DPE_PVDD

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPF_PVDD

DP_VSSR/DPF_PVSS

Compal Secret Data

Deciphered Date

AN24 AP24

AP31 AP32

AN27 AP27 AP28 AW24 AW26

AP25 AP26

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

AU28 AV27

AV29 AR28

AU18 AV17

AV19 AR18

AM37 AN38

AL38 AM35

2

+DPAB_VDD18

+DPAB_VDD10

+DPAB_VDD18

+DPAB_VDD10

R377

R377 150_0402_1%

150_0402_1%

VGA@

1 2

+DPAB_VDD18

+DPCD_VDD18

+DPEF_VDD18

L63

VGA@L63

VGA@

BLM18AG121SN1D_0603

300mA

C432

10U_0603_6.3V6M

1

VGA@C432

VGA@

2

0mA

2

C438

0.1U_0402_16V4Z

1

VGA@C 438

VGA@

2

Title

Size Document Number Rev

Custom

Date: Sheet of

BLM18AG121SN1D_0603

1U_0402_6.3V4Z

C433

0.1U_0402_16V4Z

1

VGA@C433

VGA@

2

C439

1U_0402_6.3V4Z

10U_0603_6.3V6M

1

VGA@C 439

VGA@

2

Compal Electronics, Inc.

Vancouver_Power/GND

LA-7092P P5WE6/H6/S6

12

7

0ohm/1A

4

C434

VGA@C434

VGA@

L66

VGA@L66

VGA@

BLM18AG121SN1D_0603

12

C440

470ohm/1A

VGA@C 440

VGA@

1

+1.8VSG

+1.0VSG

0.3

22 46Friday, October 29, 2010

0.3

5

VREFCB_A1 VREFDB_Q1

D D

B_BA0<20> B_BA1<20>

VGA@R103

VGA@

VGA@R104

VGA@

VGA@R105

VGA@

VGA@R106

VGA@

B_BA2<20>

CKEB0<20>

CSB0#_0< 20> RASB0#<20> CASB0#<20> WEB0#<20>

R79

VGA@

243_0402_1%

ODTB0_1

R92 56_0402_1%

56_0402_1%

1 2

R94 56_0402_1%

56_0402_1%

1 2

ODTB1_1

1

2

1

2

CLKB0 CLKB0 CLKB0#

ODTB0_1

QSB3 QSB1

DQMB#3 DQMB#1

QSB#3 QSB#1

VRAM_RST#

12

+1.5VSG

VGA@R92

VGA@

VGA@R94

VGA@

C177

0.01U_0402_25V7K

VGA@C177

VGA@

C198

0.01U_0402_25V7K

VGA@C198

VGA@

ODTB0

ODTB1

0_0402_5%

MDB[0..63]

VRAM_RST#<20>

VGA@

R91

0_0402_5%

VGA@

R93

R103 56_0402_1%

56_0402_1%

1 2

R104 56_0402_1%

56_0402_1%

1 2

R105 56_0402_1%

56_0402_1%

1 2

R106 56_0402_1%

56_0402_1%

1 2

MDB[0..63]<20>

MAB[13..0]<20>

DQMB#[7..0]<20>

QSB[7..0]<20>

C C

B B

A A

QSB#[7..0]<20>

ODTB0<20>

ODTB1<20>

CLKB0<20>

CLKB0#<20>

CLKB1<20>

CLKB1#<20>

U6

M8

VREFCA

H1

VREFDQ

MAB0

N3

A0

MAB1

P7

A1

MAB2

P3

A2

MAB3

N2

A3

MAB4

P8

A4

MAB5

P2

A5

MAB6

R8

A6

MAB7

R2

A7

MAB8

T8

A8

MAB9

R3

A9

MAB10

L7

A10/AP

MAB11

R7

A11

MAB12

N7

A12

MAB13 MAB13 MAB13 MAB13

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

X76@

VGA@

4.99K_0402_1%

VGA@

4.99K_0402_1%

+1.5VSG

C178

1U_0402_6.3V6K

1

VGA@C178

VGA@

2

+1.5VSG

C199

10U_0603_6.3V6M

1

VGA@C199

VGA@

2

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

12

R83

12

R95

C179

1U_0402_6.3V6K

1

VGA@C179

VGA@

2

C200

10U_0603_6.3V6M

1

VGA@C200

VGA@

2

1U_0402_6.3V6K

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

C169

VGA@

C180

VGA@C180

VGA@

10U_0603_6.3V6M

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

1

2

C201

VGA@C201

VGA@

4

R80

VGA@

243_0402_1%

1

C170

2

VGA@

VREFCB_A2 VREFDB_Q2

B_BA0 B_BA1 B_BA2 B_BA2

CLKB0# CKEB0

ODTB0_1 CSB0#_0 RASB0# CASB0# WEB0#

QSB2 QSB0

DQMB#2 DQMB#0

QSB#2 QSB#0

VRAM_RST#

12

0.1U_0402_16V4Z

MDB26

E3

MDB28

F7

MDB27

F2

MDB31

F8

MDB25

H3

MDB30

H8

MDB24

G2

MDB29

H7

MDB15

D7

MDB10

C3

MDB12

C8

MDB11

C2

MDB13

A7

MDB9

A2

MDB14

B8

MDB8

A3

+1.5VSG

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSG

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

R84

VGA@

4.99K_0402_1%

VREFCB_A1 VREFCB_A2 VREFDB_Q2VREFDB_Q1

0.1U_0402_16V4Z

1

2

1U_0402_6.3V6K

C181

1U_0402_6.3V6K

1

VGA@C181

VGA@

2

C202

10U_0603_6.3V6M

1

VGA@C202

VGA@

2

12

R96

VGA@

4.99K_0402_1%

C182

VGA@C182

VGA@

VRAM P/N : Samsung : SA00004GS10 (S IC D3 64M16 K4W1G1646G-BC11 FBGA) 900MHz Hynix : SA000032420 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )800MHz Hynix : SA000041S40 ( S IC D3 64MX16 H5TQ1G63DFR-11C FBGA )900MHz

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12

+1.5VSG

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

1

2

U7

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

12

C184

1U_0402_6.3V6K

1

VGA@C184

VGA@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

C171

VGA@

1U_0402_6.3V6K

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4B1G1646E-HC12_FBGA96

X76@

R85

VGA@

4.99K_0402_1%

R97

VGA@

4.99K_0402_1%

C183

1U_0402_6.3V6K

VGA@C183

VGA@

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

0.1U_0402_16V4Z

1

2

C185

C186

1U_0402_6.3V6K

1

VGA@C185

VGA@

VGA@C186

VGA@

2

3

MDB22 MDB20 MDB21 MDB18 MDB19 MDB17 MDB23 MDB16

MDB1 MDB6 MDB0 MDB4 MDB3 MDB7 MDB2 MDB5

+1.5VSG

R86

VGA@

4.99K_0402_1%

R98

VGA@

4.99K_0402_1%

C187

1U_0402_6.3V6K

1

VGA@C187

VGA@

2

U8

VREFCB_A3 VREFDB_Q3

B_BA0 B_BA1

CLKB1

CKEB1<20>

ODTB1_1

CSB1#_0< 20> RASB1#<20> CASB1#<20> WEB1#<20>

QSB4 QSB5

DQMB#4 DQMB#5

QSB#4 QSB#5

VRAM_RST#

12

R81

VGA@

243_0402_1%

+1.5VSG+1.5VSG+1.5VSG+1.5VSG

12

0.1U_0402_16V4Z

1

12

C172

2

VGA@

+1.5VSG

1

2

+1.5VSG

1

2

U8

M8

VREFCA

H1

VREFDQ

MAB0

N3

A0

MAB1

P7

A1

MAB2

P3

A2

MAB3

N2

A3

MAB4

P8

A4

MAB5

P2

A5

MAB6

R8

A6

MAB7

R2

A7

MAB8

T8

A8

MAB9

R3

A9

MAB10

L7

A10/AP

MAB11

R7

A11

MAB12

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

X76@

+1.5VSG +1.5VSG +1.5VSG+1.5VSG

12

R87

VGA@

4.99K_0402_1%

12

C173

R78

VGA@

4.99K_0402_1%

C188

1U_0402_6.3V6K

VGA@C188

VGA@

10U_0603_6.3V6M

C203

VGA@C203

VGA@

C190

1U_0402_6.3V6K

C189

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

1

2

1

VGA@C190

VGA@

VGA@C189

VGA@

2

10U_0603_6.3V6M

C205

C204

1

VGA@C205

VGA@

VGA@C204

VGA@

2

R82

VGA@

243_0402_1%

C193

1U_0402_6.3V6K

1

VGA@C193

VGA@

2

VREFCB_A4 VREFDB_Q4

B_BA0 B_BA1 B_BA2

CLKB1 CLKB1#CLKB1# CKEB1

ODTB1_1 CSB1#_0 RASB1# CASB1# WEB1#

QSB6 QSB7

DQMB#6 DQMB#7

QSB#6 QSB#7

VRAM_RST#

12

R89

VGA@

4.99K_0402_1%

R101

VGA@

4.99K_0402_1%

C194

1

VGA@C194

VGA@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

0.1U_0402_16V4Z

1

2

C191

1U_0402_6.3V6K

VGA@C191

VGA@

10U_0603_6.3V6M

C206

VGA@C206

VGA@

F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

4.99K_0402_1%

C192

1U_0402_6.3V6K

1

VGA@C192

VGA@

2

R88

VGA@

R100

VGA@

MDB37 MDB34 MDB39 MDB33 MDB38 MDB32 MDB36

MDB44 MDB43 MDB47 MDB41 MDB45 MDB40 MDB46 MDB42

+1.5VSG

12

VREFDB_Q3VREFCB_A3 VREFCB_A4 VREFDB_Q4

0.1U_0402_16V4Z

1

12

C174

2

VGA@

+1.5VSG

1U_0402_6.3V6K

1

2

MDB35

E3

1U_0402_6.3V6K

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12

C195

VGA@C195

VGA@

12

1

2

U9

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

X76@

1

C175

2

VGA@

C197

1U_0402_6.3V6K

C196

1U_0402_6.3V6K

1

VGA@C197

VGA@

VGA@C196

VGA@

2

0.1U_0402_16V4Z

1

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

R90

VGA@

4.99K_0402_1%

R102

VGA@

4.99K_0402_1%

MDB55 MDB49 MDB52 MDB50 MDB53 MDB48 MDB54 MDB51

MDB56 MDB59 MDB63 MDB62 MDB57 MDB61 MDB58 MDB60

+1.5VSG

12

0.1U_0402_16V4Z

1

12

C176

2

VGA@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VRAM_DDR3 / Channel B

LA-7092P P5WE6/H6/S6

1

23 46Friday, October 29, 2010

0.3

5

4

3

2

1

VGA Muxless and Dis only Status Mapping table

Power Sequence of Granville

FCH_PWRGD

38ms

Ref CLK

INT_VGAPWR_ON

VGA_PWR_ON

D D

50ms

+3VSG

+VGA_CORE

VDDCI

+1.5VSG

+1.0VSG

+1.8VSG

20ms

Power Sequence of Whistler and Seymour

SUSP# +3VSG

(JUMP form +3VS)

VGA_ON

10ms

VGA_PWR_ON

1.5_VDDC_PWREN

+VGA_CORE

+1.5VSG

+1.0VSG

+1.8VSG

20ms

VGA_PWR_ON

1.5_VDDC_PWREN 1 +3.3VSG +1.8VSG +1.0VSG +VGA_CORE +1.5VSG ON +BIF_VDDC

VGA Muxless with BACO Status Mapping table

Normal mode BACO mode

PX_EN

1.5_VDDC_PWREN 1 0 VDDC_EN

1.0_EN +3.3VSG ON +1.8VSG ON

For PX sequence, >1mS delay is required between PE_GPIO1 and VGA_PWR_ON

+1.0VSG +VGA_CORE +1.5VSG +BIF_VDDC +VGA_CORE +1.0VSG

PE_GPIO1

C C

VGA_PWR_ON >1ms

VGA Power ON Circuit

+3VALW+3VALW

VGA@

U11A

U11A SN74LVC14APWLE_TS SOP14

SN74LVC14APWLE_TS SOP14

D

elay SUSP# 10ms

VGA_ON<31,35>

B B

VAN@

1 2

R111 0_0402_5%

0.1U_0402_16V4Z

C208

VGA@

Delay EC_PWROK 50ms

MAN@

INT_VGAPWR_ON<31>

R119 10K_0402_1%

10K_0402_1%

1 2

PX@

PE_GPIO1#<35>

A A

VAN_GPIO1_DELAY

MAN_GPIO1_DELAY

1 2

R121 0_0402_5%

VAN@

1 2

R122 0_0402_5%

MAN@

1 2

R123 0_0402_5%

5

1 2

R115 0_0402_5%

PX@R119

PX@

13

2

G

2N7002_SOT23

0.1U_0402_16V4Z

D

Q6

PX@

S

2

G

2N7002_SOT23

C210

VGA@

R118

31.6K_0402_1%

@

C213

VGA@

0.1U_0402_16V4Z

13

D

Q9

PX@

S

14

P

1

2

1

2

1

+3VS

12

2

1

O2I

G

7

VAN_GPIO1_DELAY

+3VALW +3VALW

VGA@

U11C

14

SN74LVC14APWLE_TS SOP14

P

5

O6I

G

7

MAN_GPIO1_DELAY

+3VALW +3VALW

C211

VGA@

1 2

VGA@

U11E

14

SN74LVC14APWLE_TS SOP14

P

11

O10I

G

7

4

0.1U_0402_16V4Z

VGA@

U11B

U11B SN74LVC14APWLE_TS SOP14

SN74LVC14APWLE_TS SOP14

14

P

3

O4I

G

7

VGA@

U11D

14

SN74LVC14APWLE_TS SOP14

P

9

O8I

G

7

VGA@

U11F

14

SN74LVC14APWLE_TS SOP14

P

13

O12I

G

7

VAN@

1 2

R170 0_0402_5%

For DVT 1011

MAN@

1 2

R171 0_0402_5%

For DVT 1011

PX@

1 2

R120

0_0402_5%

R116

0_0402_5%

DISO@

1 2

For VGA Power on control

2

C214

0.1U_0402_16V4Z

@

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Dis only Muxless High performance GPU Muxless Power-saving GPU

ON ON ON ON ON

1 1

0

0 OFF OFF OFF OFF OFF OFF

1

ON ON ON ON

+VGA_CORE +VGA_CORE

VGA Power Enable Signal Mapping table

Graville Whistler and Seymour

0 1

1

0

0 1

ON

ON ON ON ON

VGA_PWR_ON <25,35>PE_GPIO1<13,35>

2010/08/20 2011/08/20

ON

OFF

PX_EN<22>

VGA_PWRGD<13,43>

From +VGA_CORE regulator

Compal Secret Data

VGA_PWR_ON source signal INT_VGAPWR_ON VGA_ON

1 2

R77 0_0402_5%

12

R110

5.11K_0402_1%

BACO@

1.5_VDDC_PWREN

+1.0VSG

1.0_EN

VDDC_EN

+VGA_CORE

Deciphered Date

+3.3VSG +1.8VSG +1.0VSG +VDDCI +VGA_CORE +1.5VSG

VGA_PWR_ON

R108 10K_0402_5%

1 2

+3VS

BACO@

2

G

BACO@

1 2

R114 0_0402_5%

Q4

AO3416_SOT23-3

D

S

D

S

13

BACO@

G

2

G

2

13

D

S

D

S

BACO@

Q7

AO3416_SOT23-3

2

13

D

Q2

BACO@

S

2N7002_SOT23

C209

BACO@C209

BACO@

0.1U_0402_10V7K

12

NC7SZ08P5X_NL_SC70-5

0mil

30mil

1 3

VGA_PWR_ON SUSP# VGA_PWR_ON VGA_PWR_ON VGA_PWR_ON VGA_PWR_ON VGA_PWR_ON

WOBACO@

R107 0_0402_5%

1 2

+3VS

C207

BACO@C 207

BACO@

0.1U_0402_10V7K

1 2

U10

5

BACO@

2

P

B

1

A

+3VS

U12

5

2

P

B

1

A

G

3

Q5

Q5 AO3416_SOT23-3

AO3416_SOT23-3

D

S

D

S

1 3

BACO@

G

2

G

BACO@

D

S

D

S

Q8

Q8 AO3416_SOT23-3

AO3416_SOT23-3

1.5_VDDC_PWREN

4

Y

G

NC7SZ08P5X_NL_SC70-5

3

+5VS +5VS

R112

BACO@

1K_0402_5%

BACO@

Y

5

4

+BIF_VDDC

30mil2

1

C212

BACO@

10U_0603_6.3V6M

2

AO3416 NMOS V

gs(th)(Max)= 1V

Rds(on)(Max)= 22m ohm @Vgs=4.5V

Title

VGA power sequence and BACO

Size Document Number Rev

Custom

Date: Sheet of

LA-7092P P5WE6/H6/S6

1 2

DMN66D0LDW-7_SOT363-6

34

1

2

Compal Electronics, Inc.

VGA_PWR_ON VGA_PWR_ON

Combine with +VGA_CORE

1.5_VDDC_PWREN

1.5_VDDC_PWREN <35,43>

R113

BACO@

1K_0402_5%

Q3B

2

BACO@Q3B

BACO@

C239

BACO@

10U_0603_6.3V6M

1 2

61

R117 0_0805_5%

Change 0603 size For DVT

1

Q3A

DMN66D0LDW-7_SOT363-6

BACO@Q3A

BACO@

WOBACO@

1 2

VDDC_EN

24 46Friday, October 29, 2010

1.0_EN

+VGA_CORE

0.3

5

4

3

2

1

+3.3VS TO +3.3VSG 1.05VS TO +1.0VSG

+3VSG+3VS

VAN@

1 2

R124 0_ 0805_5%

Q10

D D

C219

1

MAN@

0.1U_060 3_25V7K

3VSG_GA TE

VGA_PW R_ON<2 4,35>

C C

VGA_PW R_ON

100K_04 02_5%

2

1 2

R128 33K_040 2_5%

MAN@

1 2

R13010K_040 2_5%

C222

MAN@

0.1U_060 3_25V7K

Q10

SI2301CDS -T1-GE3_SOT23-3

R126

MAN@

2

G

1

SSM3K70 02FU_SC70-3

2

MAN@

S

D

G

3VSG_GATE

2

1 2

13

D

MAN@

Q13

S

13

1

MAN@ C220

MAN@

10U_060 3_6.3V6M

C220

2

Change 0603 size For DVT

R127

R127 470_060 3_5%

470_060 3_5%

MAN@

1 2

13

D

MAN@

VGA_PW R_ON#

2

G

Q12

S

2N7002_ SOT23

VGA_PW R_ON# <35>

+1.5V TO +1.5VSG

+1.5V

U14

VGA@U14

VGA@

SI4800BDY-T1-G E3_SO8

8

1

2

VGA@

2

G

Q19

2N7002_ SOT23

7

5

1.5VSG_G ATE

13

D

510K_04 02_5%

S

ACIN

2

G

12

R140

VGA@

13

Change 0603 size For DVT

10U_060 3_6.3V6M

+VSB

B B

1.5_VDDC _PWREN#

R139 47K_040 2_5%

0.1U_060 3_25V7K

1

C230

C231

VGA@

2

10U_060 3_6.3V6M

VGA@

1 2

R136 100K_04 02_5%

VGA@

12

1

C235

VGA@

2

+1.5VSG

1 2 36

C224

VGA@

10U_060 3_6.3V6M

4

Change 0603 size For DVT

1

C233

VGA@

0.1U_060 3_25V7K

2

D

Q21

VGA@

2N7002_ SOT23

S

1

2

1

C225

VGA@

1U_0402 _6.3V4Z

2

R133

VGA@

470_060 3_5%

1 2

13

D

S

1.5_VDDC _PWREN#

2

G

Q17

Q17 2N7002_ SOT23

2N7002_ SOT23

VGA@

1.5_VDDC _PWREN# < 35>

Change 0603 size For DVT

10U_060 3_6.3V6M

+VSB

VGA_PW R_ON#

VGA@

R131 100K_04 02_5%

0.1U_060 3_25V7K

+1.8VS TO +1.8VSG

Change 0603 size For DVT

VGA_PW R_ON#

C226

10U_060 3_6.3V6M

+VSB

VGA@

R137 100K_04 02_5%

C234

VGA@

0.1U_060 3_25V7K

C216

VGA@

R129 10K_040 2_5%

12

C223

VGA@

1

VGA@

2

VGA@

R135 100K_04 02_5%

12

1

2

Change P/N SB00000GV00

+1.05VS

SI4800BDY-T1-G E3_SO8

8 7

1

C218

VGA@

2

10U_060 3_6.3V6M

1

2

ACIN<3 1,35,37>

C229

10U_060 3_6.3V6M

2N7002_ SOT23

5

1

VGA@

2

12

13

D

2

G

Q14

S

2N7002_ SOT23

S

VGA@

ACIN

ange P/N SB00000GV00

Ch

+1.8VS

U15

SI4800BDY-T1-G E3_SO8

8 7

5

1

VGA@

2

1.8VSG_G ATE

12

13

D

2

G

Q18

S

VGA@

ACIN

U13

1.0VSG_G ATE

R132

@ R132

@

2

G

VGA@U15

VGA@

R138

@ R138

@

2

G

VGA@U13

VGA@

1 2 36

4

Change 0603 size F

1

C221

VGA@

12

0.1U_060 3_25V7K

2

510K_0402_5%

13

D

2N7002_ SOT23

VGA@

Q15

S

1 2 36

4

Change 0603 size For DVT

1

12

C232

VGA@

0.1U_060 3_25V7K

2

510K_0402_5%

13

D

Q20

VGA@

2N7002_ SOT23

S

+1.0VSG

1

C215

VGA@

10U_060 3_6.3V6M

2

or DVT

+1.8VSG

1

C227

VGA@

10U_060 3_6.3V6M

2

1

C217

2

VGA@

1U_0402 _6.3V4Z

1

C228

2

VGA@

1U_0402 _6.3V4Z

1 2

13

D

S

1 2

13

D

S

R125

VGA@

470_060 3_5%

VGA_PW R_ON#

2

G

Q11

VGA@

Q11

VGA@

2N7002_ SOT23

R134

VGA@

470_060 3_5%

VGA_PW R_ON#

2

G

Q16

VGA@

Q16

VGA@

2N7002_ SOT23

A A

Security Class ification

2010/08/ 20 2011/08/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/ 20 2011/08/ 20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

VGA DC Interface

LA-7092P P5WE6/H6/S6

1

0.3

of

25 46Friday, October 29, 201 0

5

8152@

1 2

1

C1479

C1480

2

1U_0402_6.3V6K

0.1U_0402_16V4Z

close to pin6 close to pin34

+3VALW

PCIE_FRX_C_DTX_N0

PCIE_FRX_C_DTX_P0

CLK_PCIE_LAN# CLK_PCIE_LAN

C14740.1U_0402_16V4Z

C907 0.1U_0402_16V4ZC907 0.1U_0402_16V4Z

PCIE_FRX_DTX_N2<13>

PCIE_FRX_DTX_P2<13>

PCIE_FTX_C_DRX_N2<13>

PCIE_FTX_C_DRX_P2<13>

CLK_PCIE_LAN#<13>

CLK_PCIE_LAN<1 3>

D D

+3V_LAN

1 2

R1148 4.7K_0402_5%

1 2

R1150 4.7K_0402_5%R1150 4.7K_0402_5%

1 2

R1152 4.7K_0402_5%R1152 4.7K_0402_5%

C C

@

PLT_RST#

LAN_PME#

LAN_CLKREQ#

close to pin13

PLT_RST#<13,18,29>

FCH_PCIE_WAKE#<14,29>

EC_PME#<31>

LAN_CLKREQ#<14>

1

C1475

8151@

2

0.1U_0402_16V4Z

+1.1_AVDDL

1

C1476

8151@

2

0.1U_0402_16V4Z

close to pin31

1 2

C908 0.1U_0402_16V4ZC908 0.1U_0402_16V4Z

1 2

R909 0_0402_5%R909 0_0402_5%

1 2

R1143 0_0402_5%@R1143 0_0402_5%@

1 2

R1144 0_0402_5%R1144 0_0402_5%

1 2

8151@

LAN_CLKREQ#

8151@

R1155 0_0402_5%

1 2

W=30mils

1

C1478

2

0.1U_0402_16V4Z

1

2

1

C1477

2

0.1U_0402_16V4Z

close to pin19

Y6

LAN_X2LAN_X1

1 2

25MHZ_20PF_7A25000012

C1486

C1485

C1485 33P_0402_50V8K

33P_0402_50V8K

1 2

C1486 33P_0402_50V8K

33P_0402_50V8K

1 2

Change Y6 P/N as SJ100003300

Follow result by vender 10/11

T25

8152@

BOTH_TST1284

1

C1505

C1504

8151@

@

0.1U_0402_16V4Z

2

BOTH_TST1284

1000P_0402_50V7K

1

C1506

@

0.1U_0402_16V4Z

2

SP050001X10

1000P_0402_50V7K

1

C1508

C1507

8151@

2

1

C1509

@

0.1U_0402_16V4Z

2

1000P_0402_50V7K

B B

0_0603_5%

+1.7V_VDDCT

A A

0_0603_5%

1 2

R1160

LAN_MDI3+ LAN_MDI3-

LAN_MDI2+ LAN_MDI2-

LAN_MDI1+ LAN_MDI1-

LAN_MDI0+ LAN_MDI0-

1000P_0402_50V7K

1

C1503

@

1U_0402_6.3V6K

2

close to pin1 close to pin4 close to pin7 close to pin10

Place close to TCT pin

5

4

U70

29

TX_N

30

TX_P

36

RX_N

35

RX_P

32

REFCLK_N

33

REFCLK_P

2

3

25 26

28 27

7 8

4

13 19 31 34

6

41

PERST#

WAKE#

SMCLK SMDATA

TEST_RST TESTMODE

XTLO XTLI

CLKREQ#

AVDDL AVDDL AVDDL AVDDL AVDDL_REG

GND

LAN_PME#

LAN_X2 LAN_X1

1.8V_VDDCT_REG

AR8151-AL1B PN:SA00003LE30 AR8152-AL1E PN:SA00003JW10

R1157 0_0603_5%R1157 0_0603_5%

1 2

T25

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

6

TD2-

MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

12

TD4-

MX4-

350UH_IH-037-2

8151@

75_0402_1%

1

C1510

2

@

1

C1511

0.1U_0402_16V4Z

2

75_0402_1%

4

Atheros

8151-AL1A

AR8151-AL1A_QFN40_5X5

8151@

W=40mils

C1490

1

2

10U_0603_6.3V6M

24 23 22

21 20 19

18 17 16

15 14 13

R819

75_0402_1%

75_0402_1% R820

R820

12

8151@

R821

R821 75_0402_1%

75_0402_1%

LED_0 LED_1 LED_2

TRXN0 TRXP0 TRXN1 TRXP1 TRXN2 TRXP2 TRXN3 TRXP3

RBIAS

VDD33

LX

VDDCT

DVDDL

DVDDL_REG

AVDDH AVDDH

AVDDH_REG

+3V_LAN

C1491

C1492

1

2

1U_0402_6.3V6K

close to Pin 1

RJ45_MDI3+ RJ45_MDI3-

RJ45_MDI2+ RJ45_MDI2-

RJ45_MDI1+ RJ45_MDI1-

RJ45_MDI0+ RJ45_MDI0-

12

R822

R822 75_0402_1%

75_0402_1%

8151@

40mil

RJ45_GND

2

C941

C941 1000P_1206_2KV7K

1000P_1206_2KV7K

@

1

@

D48

1 2

B88069X9231T203_4P5X3P2-2

For EMI Request

R1138 5.1K_0402_5%R1138 5.1K_0402_5%

1 2

LAN_ACTIVITY

38

LAN_LINK#

39

LED2_CKR# LAN_CLKREQ#

23

LAN_MDI0-

12

LAN_MDI0+

11

LAN_MDI1-

15

LAN_MDI1+

14

LAN_MDI2-

18

LAN_MDI2+

17

LAN_MDI3-

21

LAN_MDI3+

20

10

R1146 keep away other singal (25mil)

1

LX

40

+1.7V_VDDCT

5

+1.1V_DVDDL

24 37

R1156 0_0603_5%8151 @R1156 0_060 3_5%8151@

16

1 2 22 9

3

R1139 0_0402_5%

R1146 2.37K_0402_1%R1146 2.37K_0402_1%

12

+3V_LAN

W=40mils

W=30mils

U70

8152@

AR8152-AL1E

Pin23 Function:

1.CLKREQ

2.AR8152L revA PH:

1 2

8152@

+2.7V_AVDDH

SA00003JW10

W=30mils

LAN_MDI0+

LAN_MDI0-

LAN_MDI1+

LAN_MDI1-

LAN_MDI2+

LAN_MDI2-

LAN_MDI3+

LAN_MDI3-

C1494

1

C1495

1U_0402_6.3V6K

2

R1140 49.9_0402_1%R1140 49.9_0402_1%

1 2

R1142 49.9_0402_1%R1142 49.9_0402_1%

1 2

R1145 49.9_0402_1%R1145 49.9_0402_1%

1 2

R1147 49.9_0402_1%R1147 49.9_0402_1%

1 2

R1149 49.9_0402_1%

1 2

8151@

R1151 49.9_0402_1%

1 2

8151@

R1153 49.9_0402_1%

1 2

8151@

R1154 49.9_0402_1%

1 2

8151@

1

C1496

2

0.1U_0402_16V4Z

1A

C1493

1

2

0.1U_0402_16V4Z

LAN_ACTIVITY LAN_LINK#

2

3

@

1

LANGND

D47

D47 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

LAN_LINK#

2

3

1

D51

D51 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

8151@

8152@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/20 2011/08/20

+3V_LAN

@

Populate when AR8151-AL1A

Populate when AR8152-AL1E

Compal Secret Data

R1158 0_0402_5%R1158 0_0402_5%

1 2

R1159 511_0402_1%R1159 511_0 402_1%

1

C1498

@

470P_0402_50V7K

2

LAN_ACTIVITY

C1499

470P_0402_50V7K

Deciphered Date

12

2

Close LAN chip

C1466 1000P_0402_50V7K

1 2

@

C1467 0.1U_0402_16V4ZC1467 0.1U_0402_16V4Z

1 2

C1468 1000P_0402_50V7K

1 2

@

C1469 0.1U_0402_16V4ZC1469 0.1U_0402_16V4Z

1 2

C1470 1000P_0402_50V7K

1 2

@

C1471 0.1U_0402_16V4Z

1 2

8151@

C1472 1000P_0402_50V7K

1 2

@

C1473 0.1U_0402_16V4Z

1 2

8151@

W=40mils

1 2

4.7UH_PG031B-4R7MS_1.1A_20%

L108

W=40mils

+1.7V_VDDCTLX

0.1U_0402_16V4Z

close to Lan pin5

1

C1497

8151@

2

0.1U_0402_16V4Z

close to Lan pin16close to Lan pin22close to Lan pin9

RJ45_MDI0+

RJ45_MDI0-

RJ45_MDI1+

RJ45_MDI2+

RJ45_MDI2-

RJ45_MDI1-

RJ45_MDI3+

RJ45_MDI3-

12

R1161 511_0402_1%R1161 511_0402_1%

1

@

2

RJ45_GND LANGND

2

1 2

C940

C940 1000P_1206_2KV7K

1000P_1206_2KV7K

100UH +-20% SSC0301101MCF 0.18A

Title

Size Document Number Rev

Custom

Date: Sheet of

LAN_ACTIVITY

L

2

1

C1481

2

1

C1482

10U_0603_6.3V6M

2

1

close to Lan pin40

W=30mils

+1.1V_DVDDL+2.7V_AVDDH

Green LED+

Green LED-

PR1+

PR1-

PR2+

PR3+

PR3-

PR2-

PR4+

PR4-

Yellow LED+

Yellow LED-

1

C1488

0.1U_0402_16V4Z

2

SANTA_130451-K

L109

1

C1487

1U_0402_6.3V6K

2

9

10

1

2

3

4

5

6

7

8

11

12

For EMI Request

Compal Electronics, Inc.

LAN AR8151 / AR8152

LA-7092P P5WE6/H6/S6

1

AN_LINK#

* default

C1483

1000P_0402_50V7K

close to Lan pin24close to Lan pin37

JRJ45

14

SHLD1

13

SHLD2

CONN@

1 2

B88069X9231T203_4P5X3P2-2

1

overclocking

*0

Un-overclocking

1*

SWR mod

LDO mode

0

1

C1484

0.1U_0402_16V4Z

2

1

C1489

0.1U_0402_16V4Z

2

40mil

D49

@D49

@

26 46Friday, October 29, 2010

0.3

A

D38

12

C952

C946

10mil

+3VS_AUX

1 2

C1515

D38

2 1

+3VS

+3VS_AUX

1

2

JUMP_43X39 @

CH751H-40PT_SOD323-2

1 1

BEEP#<31>

FCH_SPKR<14>

+3VS

R1165 0_0402_5%

2 2

+3VS_AUX

12

R1166

SENSE_A

Sense resistors must be connected same power that is used for VAUX_3.3

JUMP_43X39 @

R1166

5.11K_0402_1%

3 3

4 4

GND GNDA GND GNDA

1 2

R1167

39.2K_0402_1%

R1168 10K_0402_5%

J1

2

112

J2

2

112

J3

2

112

A

1U_0402_6.3V4Z

0.1U_0402_16V4Z

B

+5VS_AVDD+3VS

12

R783

R783 20K_0402_1%

R789

10K_0402_5%

R787

1 2

560_0402_5%

R788

1 2

560_0402_5%

R1093 0_0603_5%R1093 0_0603_5%

1

C1517

C1517 10U_0603_6.3V6M

10U_0603_6.3V6M

2

Change 0603 size For DVT

MIC1_L<28>

MIC1_R<28>

HP_PLUG# <2 8>

MIC_PLUG# <28 >

EC_MUTE#<31>

20K_0402_1%

1U_0402_6.3V4Z

1

C

Q72

2

B

E

3

2SC2411KT146_SOT23-3

D37

D37 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

2 1

1 2

HP_LEFT<28>

HP_RIGHT<28>

Change 0603 size For DVT

MIC1_L

1U_0402_6.3V6K

EC_MUTE# change as Pin12

EAPD<31>

1

C1528

0.1U_0402_16V4Z

2

112

J4

2

J5

2

J6

2

B

C

C936

1 2

R786

1 2

15.4K_0402_1%

MONO_IN

Dos Beep issue for PVT 10/28

Change 0603 size For DVT

20mil

+3VS_DVDD

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C1513

C1513

2

1

C1518

0.1U_0402_16V4Z

2

HP_LEFT

HP_RIGHT

4.7U_0603_6.3V6K

MIC1_C_L

MIC1_C_RMIC1_R

MONO_IN

SENSE_A

C

1

C1514

0.1U_0402_16V4Z

2

C1512

10U_0603_6.3V6M

2

1

C1516

2

1 2

C1524 1U_ 0402_6.3V6KC1524 1U_ 0402_6.3V6K

C934

1 2

C932

1 2

4.7U_0603_6.3V6K

+MIC1_BIASC

1 2

R1169 0_0402_5%R1169 0_0402_5%

1 2

R796 0_0402_5%R796 0_0402_5%

+AVEE

1

C1529

10U_0603_6.3V6M

2

Change 0603 size For DVT

U82

25

26

27

28

33

34

41

42

22

23

35

36

37

13

12

44 43

47

48

24

49

+3VS_AUX

PORTA_L

PORTA_R

PORTD_L

PORTD_R

PORTE_L

PORTE_R

PORTF_L

PORTF_R

FLY_P

FLY_N

PORTC_L

PORTC_R

C_BIAS

PCBEEP

EXT_MUTE#

SENSE A SENSE B

GPIO0/EAPD#

SPDIFO

AVEE

EP_GND

D

HD Audio Codec

Layout Note: Path from +5V to LPWR_5.0 and RPWR_5.0 must be very low resistance ( <0.01 ohms). Place bypass caps very close to device.

80mil

12

R1163

0.1_1206_1%

29

21

9

4

VDD_IO

VAUX_3.3

AVDD_HP

DVDD_3.3

18

31

15

LPWR5.0

AVDD_5V

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

PORTB_L

PORTB_R

B_BIAS

SDATA_IN

SDATA_OUT

RESET#

BIT_CLK

DMIC_3/4

DMIC_CLK0

DMIC_1/2

GPIO1/SPK_MUTE#

GPIO2/SPDIF2

FILT_1.8

FILT_1.65

AVDD_3.3

CX20584-11Z_QFN48_7X7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

Change 0603 size For DVT

80mil

+CLASSD_5V

C1519

0.1U_0402_16V4Z

+CLASSD_REF

40mil

20

RPWR5.0

CLASSDREF

14

16

19

17

39

40

38

8

6

10

SYNC

11

7

1

2

3

46 45

5

32

+3VS_LDO_OUT

30

0.1U_0402_16V4Z

1

2

SPKL+

SPKL-

SPKR+

SPKR-

C794 4.7U_0603_6.3V6KC794 4.7U_0603_6.3V6K

MIC2_C_L

MIC2_C_R

C797 4.7U_0603_6.3V6KC797 4.7U_0603_6.3V6K

+MIC2_BIASC

1 2

R793 33_0402_5%R793 33_0402_5%

HDA_SDOUT_AUDIO

HDA_SYNC_AUDIO

HDA_RST_AUDIO#

HDA_BITCLK_AUDIO

E

1

C1210

10U_0603_6.3V6M

2

1

C1520

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

Change 0603 size For DVT

1 2

L112

1 2

FBMA-10-100505-301T_2P

+5VS_AVDD

1

C1211

0.1U_0402_16V4Z

2

1

C1521

C1522

2

10U_0603_6.3V6M

SPKL+ <28>

SPKL- <28>

SPKR+ <28>

SPKR- <28>

INT_MIC_2 INT_MIC

R523 1K_0402_1%R523 1K_0402_1%

Change 0603 size For DVT

HDA_SDIN0 < 14>

HDA_SDOUT_AUDIO <14>

HDA_SYNC_AUDIO <14>

HDA_RST_AUDIO# <14 >

HDA_BITCLK_AUDIO <14>

C948

1 2

22P_0402_50V8J

1

2

F

1

C1523

10U_0603_6.3V6M

2

12

Pop For EMI 10/18

+FILT_1.65V

1

C1527

10mil

1

C1532

C1531

10U_0603_6.3V6M

2

2010/08/20 2011/08/20

E

C1527

1U_0603_10V6K

2

Change 0603 size For DVT

Compal Secret Data

0mil

1

C1530

0.1U_0402_16V4Z

2

Deciphered Date

F

R1162 0_0603_5%R1162 0_0603_5%

1 2

R1164 0_0603_5%R1164 0_0603_5%

10mil

1

C1525

0.1U_0402_16V4Z

2

Change 0603 size For DVT

+5VS

INT_MIC

15mil

220P_0402_50V7K

@

2

3

C979

D27

@D27

@

1

PJDLC05C_SOT23-3

G

INT_MIC

1

2

+MIC2_BIASC

1

220P_0402_50V7K

@

C980

2

12

R585

2.2K_0402_5%

1

C808

C808 220P_0402_50V7K

220P_0402_50V7K

2

Close to Conn

ACES_88266-02001

CONN@

H

JMIC2

1

2

3

G1

4

G2

Port Configuration

Port A: H eadphone jack (jack shared w ith S/PDIF ) Port B: I nternal M IC (mono o r stereo) Port C: M icrophone /LI/LO jac k Port D: L ine Out j ack (Optio nal) Port E: L ine In ja ck (Option al) Port F: N ot used. Port G: I nternal s tereo spea kers Port J: I nternal s tereo digi tal mic ( Optional) Port H: S /PDIF (ja ck shared with head phone)

+FILT_1.8

1

C1526

10U_0603_6.3V6M

2

Date: Sheet of

12

R1170

10K_0402_5%

R1170 only needed if supply to VAUX_3.3 is removed during system re-start.

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Compal Electronics, Inc.

HD Audio Codec CX20584

LA-7092P P5WE6/H6/S6

G

27 46Friday, October 29, 2010

H

0.3

A

B

C

D

E

Int. Speaker Conn.

1 1

2 2

HP_LEFT<27>

HP_RIGHT<27>

3 3

MIC1_L<27>

MIC1_R<27>

4 4

1 2

R694 100_0603_1%R694 100_0603_1%

1 2

R695 100_0603_1%R695 100_0603_1%

MIC1_R_1

1 2

R686 39_0603_1%R 686 39_0603_1%

1 2

R685 39_0603_1%R 685 39_0603_1%

CH751H-40PT_SOD323-2

L89

1 2

FBMA-L11-160808-700LMT_2P

L90

1 2

FBMA-L11-160808-700LMT_2P

SPKL+<27> SPKL-<27>

SPKR+<27> SPKR-<27>

+MIC1_BIASC +MIC1_BIASC

D43

R692

3.01K_0402_1%

C780

220P_0402_50V7K

HPOUT_L_1

HPOUT_R_1

21

12

1

2

SPKL+ SPKL-

30

mil

SPKR+ SPKR-

30mil

21

12

1

2

R834 0_0603_5%R834 0_0603_5%

1 2

R833 0_0603_5%R833 0_0603_5%

1 2

R831 0_0603_5%R831 0_0603_5%

1 2

R832 0_0603_5%R832 0_0603_5%

1 2

330P_0402_50V7K

1 2

L94 FBMA-L11-160808-700LMT_2PL94 FBMA-L11-160808-700LMT_2P

1 2

L93 FBMA-L11-160808-700LMT_2PL93 FBMA-L11-160808-700LMT_2P

D42

D42 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

R693

3.01K_0402_1%

MIC1_L_RMIC1_L_1

MIC1_R_R

3

C781

C781 220P_0402_50V7K

220P_0402_50V7K

PJDLC05C_SOT23-3

@

1000P_0402_50V7K

@

1000P_0402_50V7K

C779

HPOUT_L_2

HPOUT_R_2

2

@

D29

1

2

C1533

@

1000P_0402_50V7K

1

2

C1535

@

1000P_0402_50V7K

1

2

1

HP_PLUG#<27>

MIC_PLUG#<27>

2

C1534

1

2

C1536

1

2

C774

330P_0402_50V7K

1

MIC_PLUG#

HP_PLUG#

2

3

@

D24

PJDLC05C_SOT23-3

1

3

1

3

1

HP_PLUG#

MIC_PLUG#

SPK_L+ SPK_L-

2

D39

PJDLC05C_SOT23-3

SPK_R+ SPK_R-

2

D41

PJDLC05C_SOT23-3

JSPK2

1

2

Left

3

G1

4

G2

ACES_88266-02001

CONN@

JSPK1

1

2

Right

3

G1

4

G2

ACES_88266-02001

CONN@

Headphone Out

JHP1

1 2

3

4

5

6

SINGA_2SJ-0960-C01

CONN@

MIC JACK

JMIC1

1 2

3

4

5

6

SINGA_2SJ-A960-C01

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Amplifier & Audio Jack

LA-7092P P5WE6/H6/S6

28 46Friday, October 29, 2010

E

0.3

A

B

C

D

E

Mini-Express Card for WLAN

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

ACES_88910-5204

56

CONN@

H

+1.5VS

1

C708

4.7U_0603_6.3V6K

2

Change 0603 size For DVT

(MINI1_LED#)

eight : 4mm

1

C709

0.1U_0402_16V4Z

2

WL_OFF# PLT_RST# +3V_WLAN

MINI1_SMBCLK MINI1_SMBDAT

WIMAX_LED# WLAN_LED#_L

1

C710

0.1U_0402_16V4Z

2

1 2

R441 0_0603_5%R441 0_0603_5%

1 2

R442 0_0603_5%@R442 0_0603_5%@

@

1 2

@

R443 0_0603_5%

1 2

R444 0_0603_5%

USB20_N8 <14> USB20_P8 <14>

+3VS

+1.5VS

WL_OFF# <31> PLT_RST# <13,18,26>

+3VS

+3VS +3VALW

FCH_SMCLK0 <8,9,14> FCH_SMDAT0 <8, 9,14>

@

1 2

R836 10K_0402_5%

Power Primary Power (mA)

+3VS

+3V

+1.5VS

WIMAX_LED#

WLAN_LED#_L

Mini Card Power Rating

NormalPeak Normal

1000

330

500

R835

CHP202UPT_SOT323-3

R837 0_0402_5%R837 0_0402_5%

0_0402_5%

1 2

2

3

D44

1 2

750

250

375

1

@D44

@

Auxiliary Power (mA)

250 (wake enable)

5 (Not wake enable)

+3VS

12

R848

R848 100K_0402_5%

100K_0402_5%

MINI1_LED# <31>

(9~16mA)

+3VS

1

C705

4.7U_0603_6.3V6K

2

1 1

2 2

FCH_PCIE_WAKE#<14,26>

MINI1_CLKREQ#<14>

CLK_PCIE_MINI1#<13>

CLK_PCIE_MINI1<13>

PCIE_FRX_DTX_N3<13> PCIE_FRX_DTX_P3<13>

PCIE_FTX_C_DRX_N3<13> PCIE_FTX_C_DRX_P3<13>

R445

E51TXD_P80DATA<31>

E51RXD_P80CLK<31>

R445

1 2

1

C706

0.1U_0402_16V4Z

2

Change 0603 size For DVT

FCH_PCIE_WAKE#

1 2

R492

R492 100K_0402_5%

100K_0402_5%

+3VS

0_0402_5%

R440 0_0402_5%@R440 0_0402_5%@

E51TXD_P80DATA_R E51RXD_P80CLK

1 2

1

C707

0.1U_0402_16V4Z

2

JMINI1

112 334 556 778 9910 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

G153G254G355G3

Card Reader RTS5138 / RTS5137

(only SD+MMC function)

Card Reader Connector

3 3

4.7U_0603_6.3V6K

Change 0603 size For DVT

4 4

+3VS +3VS_CR

R854 0_0805_5%R854 0_0805_5%

1 2

12

C981 100P_0402_50V8JC981 100P_0402_50V8J R855

R855

1 2

6.2K_0603_1%

USB20_N6<14> USB20_P6<14>

30mil

2

C984

1

C985

C985 1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

A

C983

1

2

0.1U_0402_16V4Z

30mil

10mil

RREF

USB20_N6 USB20_P6

+3VS_CR +CARDPWR VREG

10mil

XDDRY_SDWP_MSCLK

XDCE#_SDD1 XDCLE_SDD0

1

2 3

4 5 6

7

8

9 10 11 12

U84

REFE

DM DP

3V3_IN CARD_3V3 V18

XD_CD#

SP1 SP2 SP3 SP4 SP5

17

GPIO0

24

CLK_IN

23

XD_D7

22

SP14

21

SP13

20

SP12

19

SP11

18

SP10

16

SP9

15

SP8

14

SP7

13

SP6

EPAD

RTS5138-GR_QFN24_4X4

25

Change to RTS5137 (SA000043500)

B

5IN1_LED#

@

1 2

R856 10_0402_5%

CLK_SD_48M_R

XDD5_SDD2_MS_D5 XDD4_SDD3_MSD1

XDD2_SDCMD

XDD0_SDCLK_MSD2

XDWE#_SDCD#

5IN1_LED# <32>

C982 10P_0402_50V8J

1 2

@

12

R857 22_0402_5%R857 22_0402_5%

CLK_SD_48M <13>

30mil

R859

100K_0402_5%

XDD4_SDD3_MSD1 XDD2_SDCMD

XDD0_SDCLK_MSD2

+SDPWR_MMCPWR+CARDPWR

Issued Date

30mil

C987

0.1U_0402_16V4Z

1

C988

0.1U_0402_16V4Z

2

C987, C988 close to connector

Compal Secret Data

2010/08/20 2011/08/20

Compal Secret Data

1 2

R858 0_0805_5%R858 0_0805_5%

@

1

C986

0.1U_0402_16V4Z

2

1 2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

XDCLE_SDD0 XDCE#_SDD1 XDD5_SDD2_MS_D5 XDDRY_SDWP_MSCLK XDWE#_SDCD#

Deciphered Date

D

+SDPWR_MMCPWR

JCR1

1

D3

2

CMD

3

VSS1

4

VDD

5

CLK

6

VSS2

7

D0

8

D1

9

D2

10

WP

11

CD

12

GND1

13

GND2

TAITW_PSDBTC09GLBS1N14N0

CONN@

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Title

MINI CARD / CardReader RTS5137

LA-7092P P5WE6/H6/S6

0.3

29 46Friday, Oc tober 29, 2010

E

29 46Friday, Oc tober 29, 2010

0.3

A

B

C

D

E

F

G

H

SATA HDD Conn.

JHDD1

1

SATA_ITX_DRX_P0<15> SATA_ITX_DRX_N0<15>

SATA_DTX_C_IRX_N0<15>

1 1

2 2

SATA_DTX_C_IRX_P0<15>

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

R405 0_0805_5%R405 0_0805_5%

+5VS

Change 0603 size F

1 2

or DVT

C657 0.01U_0402_16V7KC657 0.01U_0402_16V7K

1 2

C659 0.01U_0402_16V7KC659 0.01U_0402_16V7K

1 2

+3VS

1

C639

0.1U_0402_16V4Z

2

10U_0603_6.3V6M

1

C661

C660

2

1U_0402_6.3V4Z

+3VS

+5VS_HDD

0.1U_0402_16V4Z

1

C662

2

1000P_0402_50V7K

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

1

C663

2

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12 V1222GND

SANTA_192301-1

CONN@

GND

24 23

SATA ODD FFC Conn.

JODD1

1

SATA_ITX_DRX_P1<15> SATA_ITX_DRX_N1<15>

SATA_DTX_C_IRX_N1<15> SATA_DTX_C_IRX_P1<15>

ODD_DA#_FCH<14> ODD_DETECT#<14>

+5VS

3 3

C650 0.01U_0402_16V7KC650 0.01U_0402_16V7K

1 2

C651 0.01U_0402_16V7KC651 0.01U_0402_16V7K

1 2

R412 0_0402_5%@R412 0_0402_5%@

1 2

R403 0_0402_5%@R403 0_0402_5%@

1 2

80mils

1 2

R955 0_0805_5%

+5VS_ODD

SATA_DTX_IRX_N1 SATA_DTX_IRX_P1 ODD_DA#_FCH_R

R413

0_0402_5%

1 2

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1205N

CONN@

13 14

+5VS

+VSB

R760

470K_0402_5%

@

ODD_PWR<15>

4 4

A

2

G

@

1

@

2

1 2

ODD_EN

13

D

Q66

Q66 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

B

C812

1U_0402_6.3V6K@C812

1U_0402_6.3V6K

U40

@U40

@

SI4800BDY-T1-GE3_SO8

8 7

5

@

+5VS_ODD

1 2 36

4

C811

0.1U_0402_25V6K@C811

0.1U_0402_25V6K

R764

1.5M_0402_5%@R764

1.5M_0402_5%

1

@

2

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2010/08/20 2 011/08/20

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

HDD & ODD CONN

LA-7092P P5WE6/H6/S6

G

0.3

30 46Friday, October 29, 2010

H

0.3

5

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z C725

C725

1

C724

2

KSO[0..17]

KSI[0..7]

D D

C732

22P_040 2_50V8J@

12

LPC_CLK 0_EC<13>

+3VALW

+5VS

C C

+3VS+3VALW

@

R851

R851 0_0402_ 5%

0_0402_ 5%

1 2

+3VALW

B B

R462 47K_0 402_5%R 462 47K_ 0402_5%

C733 0.1U_0 402_16V4ZC733 0.1U_ 0402_16V4Z

1 2

R465 4 .7K_0402_5%R465 4.7K_ 0402_5%

1 2

R466 4 .7K_0402_5%R466 4.7K_0402_5%

@

R852

R852 0_0402_ 5%

0_0402_ 5%

@

1 2

R467 2 .2K_0402_5%

@

1 2

R468 2 .2K_0402_5%

1 2

R471 2 .2K_0402_5%R471 2.2K_ 0402_5%

1 2

R472 2 .2K_0402_5%R472 2.2K_ 0402_5%

1 2

R473 4 7K_0402_5%R473 47K_040 2_5%

1 2

R474 4 7K_0402_5%R474 47K_040 2_5%

R475 1 00K_0402_5%R4 75 10 0K_0402_5%

R476 1 0K_0402_5%

R497 1 00K_0402_5%

R488 1 00K_0402_5%R4 88 10 0K_0402_5%

R844 1 00K_0402_5%R8 44 10 0K_0402_5%

R845 1 00K_0402_5%R8 45 10 0K_0402_5%

@

1 2

@

12

KSO[0..17] <32>

KSI[0..7] <32>

@

12

R461 33_04 02_5%

12

TP_CLK

TP_DATA

EC_SMB_ CK2

EC_SMB_ DA2

EC_SMB_ CK1

EC_SMB_ DA1

KSO1

KSO2

LID_SW #

EC_PME#

PBTN_OU T#

For LED INV_PWM freq to 1K

ENBKL

LOCAL_D IM

COLOY_ENG_ EN

0.1U_040 2_16V4Z

PWR_ SUSP_LED<32 >

2

0.1U_040 2_16V4Z

EC_GA20<14>

EC_KBRS T#<14>

SERIRQ<13 >

LPC_FRA ME#<13>

LPC_AD3<13> LPC_AD2<13> LPC_AD1<13> LPC_AD0<13>

A_RST#<13>

EC_SCI#<14 >

@

R489

10K_040 2_5%

EC_SMB_ CK1<39> EC_SMB_ DA1<39> EC_SMB_ CK2<5,19> EC_SMB_ DA2<5,19>

SLP_S3#<14> SLP_S5#<14> EC_LID_OU T# < 14>

LOCAL_D IM<10>

MINI1_LED#<2 9>

COLOY_ENG_ EN<10>

EC_INVT_P WM<10>

FAN_SPE ED1<34>

WLAN _LED#<32>

1 2

EC_SMI#<14>

BT_ON#<33>

ON/OFF<34>

For Low PWR panel use

RTC_CLK

RTC_CLK<13,17>

EC_CRY1 EC_CRY2

A A

15P_040 2_50V8J

C739

2

1

2

5

2

C740

X1

15P_040 2_50V8J

1

OSC4OSC

NC3NC

32.768KH Z_12.5PF_Q13M C14610002

1 2

R888 0_040 2_5%

@

4

0.1U_040 2_16V4Z

1

C726

2

EC_GA20 EC_KBRS T# SERIRQ LPC_FRA ME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

LPC_CLK 0_EC

EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_ CK1 EC_SMB_ DA1 EC_SMB_ CK2 EC_SMB_ DA2

SLP_S3# SLP_S5# EC_SMI# LOCAL_D IM MINI1_LED#

COLOY_ENG_ EN EC_INVT_P WM FAN_SPE ED1 BT_ON# E51TXD_ P80DATA E51RXD_ P80CLK ON/OFF PWR_ SUSP_LED WLAN _LED#

12

4

C727

EC_CRY1 EC_CRY2

R889

R889 100K_04 02_5%

100K_04 02_5%

@

2

C728

1000P_0 402_50V7K

1

U26

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

3

+3VALW

L84

1 2

BLM18AG 601SN1D_2P

2

1

BLM18AG 601SN1D_2P

C729

C729 1000P_0 402_50V7K

1000P_0 402_50V7K

9

22

VCC

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

11

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_VCC A

33

96

111

125

67

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Flash ROM

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

GPO

GPI

GND

35

94

113

EN_DFAN1/DA1/GPIO3D

FSTCHG/SELIO#/GPIO50

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

ICH_PWROK/GPXO06

PM_SLP_S4#/GPXID1

AGND

KB930QF A1 LQFP 128P

69

20mil

ECAGND

DA Output

SPI Device Interface

GPIO

GND

24

1

C730

2

0.1U_040 2_16V4Z

ECAGND

21

BEEP#

23

SPIDI/RD#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

L85

26

ACOFF

27

BATT_TE MP

63 64

ADP_I

65

AD_BID0

66

AD_PID0

75 76

DAC_BRIG

68

EN_DFAN 1

70

IREF

71

CALIBRATE #

72

EC_MUTE #

83 84 85 86

TP_CLK

87

TP_DATA

88

3S/4S#

97

65W/9 0W#

98

VLDT_EN

99

LID_SW #

109

119 120 126 128

73 74 89

BATT_BL UE_LED#

90

INT_VGAPW R_ON

91

BATT_AM B_LED#

92

PWR_ LED

93

SYSON

95

VR_ON

121

ACIN

127

EC_RSMR ST#

100

EC_LID_OU T#

101

EC_ON

102

EC_SW I#

103

EC_PW ROK_R

104

BKOFF#

105

WL_O FF#

106 107 108

VGATE

110

ENBKL

112

EAPD

114

EC_THER M#

115

SUSP#

116

PBTN_OU T#

117

EC_PME#

118

124

12

Compal Secret Data

1

C736

4.7U_060 3_6.3V6K

2

Deciphered Date

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

CAPS_LED#/GPIO53

SUSP_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

ENBKL/GPXID2

BLM18AG 601SN1D_2P

2010/08/ 20 2011/08/ 20

3

BEEP# <2 7>

ACOFF <3 6,37>

ADP_I <37>

DAC_BRIG <10> EN_DFAN 1 < 34>

IREF <37>

CALIBRATE # <37>

EC_MUTE # <27>

TP_CLK < 32>

TP_DATA <32 >

3S/4S# <37> 65W/9 0W# <37>

VLDT_EN <35>

LID_SW # <32>

EC_SI_SPI_SO <32> EC_SO_S PI_SI <32>

EC_SPICS# /FSEL# <32>

FSTCHG <3 7> BATT_BL UE_LED# <32> INT_VGAPW R_ON <24> BATT_AM B_LED# <32 > PWR_ LED <32> SYSON <3 5,40,42> VR_ON <44 > ACIN <25 ,35,37>

EC_RSMR ST# <14>

EC_ON <34,38 > EC_SW I# <14>

BKOFF# <1 0> WL_O FF# <29>

VGA_ON <24,35>

VGATE <14,44 >

ENBKL <10> EAPD < 27> EC_THER M# <5>

SUSP# <35,40,41 >

PBTN_OU T# <14 > EC_PME# <26>

Change 0603 size For DVT

2

For EC Tools

ECAGND

12

C731 0.01U_04 02_16V7KC73 1 0.01U_0 402_16V7K

BATT_TE MP <39>

L111

1 2

FBMA-10-1 00505-301T_2P

EC_SPICLK <32>

C783

C783 33P_040 2_50V8K

33P_040 2_50V8K

Reserve for EMI, close to EC

Delay SUSP# 10ms

Size Document Num ber Rev

Date: Sheet of

2

Date: Sheet of

+3VALW

JP7

1

2

3

4

ACES_85 205-0400

@

65W/9 0W#

VR_ON

3S/4S#

Analog Project ID definition

+3VALW

@

Ra

1 2

Rb

1 2

Analog Board ID definition

+3VALW

Ra

Rb

EC_PW ROK_R

R254 0_040 2_5%R 254 0_04 02_5%

C737 100P_ 0402_50V8JC7 37 100P _0402_50V8J

BATT_TE MP

C741 100P_ 0402_50V8JC7 41 100P _0402_50V8J

ACIN

Compal Electronics, Inc.

Title

B

Compal Electronics, Inc.

EC ENE KB930

LA-7092P P5WE6/H6/S6

1

Place on MiniCard door

E51RXD_ P80CLK E51TXD_ P80DATA

R458 1 00K_0402_5%R458 100K_040 2_5%

R459 1 00K_0402_5%R459 100K_040 2_5%

1 2

R460 4 .7K_0402_5%R 460 4.7K_0402 _5%

R463

100K_04 02_5%

AD_PID0

R464

8.2K_040 2_5%

@

R469

100K_04 02_5%

1 2

AD_BID0

R470

8.2K_040 2_5%

1 2

12

E51RXD_ P80CLK <29 > E51TXD_ P80DATA <2 9>

12

1

C734

0.1U_040 2_16V4Z

2

1

C735

0.1U_040 2_16V4Z

2

1

Project_ID : 0-> 1-> 2->

Board_ID : 0-> 1->

+3VALW

EC_PW ROK <14 >

31 46Friday, October 29, 201 0

0.3

5

4

3

2

1

To TP/B Conn.

C742 0 .1U_0402_16V4 ZC742 0 .1U_0402_16V4 Z

1 2

+SPI_VCC

U27

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L16 05DM2I-12G SOP 8P

SA00004 1N00

VCC

SCLK

8 6 5

SI

2

SO

INT_KBD Conn.

KSI[0..7]

KSO[0..17]

C747 1 00P_0402_50V 8J@C747 100 P_0402_50V8J@

1 2

C748 1 00P_0402_50V 8J@C748 100 P_0402_50V8J@

1 2

C750 1 00P_0402_50V 8J@C750 100 P_0402_50V8J@

1 2

C752 1 00P_0402_50V 8J@C752 100 P_0402_50V8J@

1 2

C754 1 00P_0402_50V 8J@C754 100 P_0402_50V8J@

1 2

C756 1 00P_0402_50V 8J@C756 100 P_0402_50V8J@

1 2

C758 1 00P_0402_50V 8J@C758 100 P_0402_50V8J@

1 2

C760 1 00P_0402_50V 8J@C760 100 P_0402_50V8J@

1 2

C762 1 00P_0402_50V 8J@C762 100 P_0402_50V8J@

1 2

C764 1 00P_0402_50V 8J@C764 100 P_0402_50V8J@

1 2

C766 1 00P_0402_50V 8J@C766 100 P_0402_50V8J@

1 2

C768 1 00P_0402_50V 8J@C768 100 P_0402_50V8J@

1 2

C770 1 00P_0402_50V 8J@C770 100 P_0402_50V8J@

1 2

C772 1 00P_0402_50V 8J@C772 100 P_0402_50V8J@

1 2

KSI[0..7] <31>

KSO[0..17] <31>

EC_SPICLK _R

4

R481 0_ 0402_5%R4 81 0_0402_5%

1 2

EC_SO_S PI_SI <31> EC_SI_SPI_SO <31>

PWR_ SUSP_LED<31 >

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC_SPICLK <31>

PWR_ LED<31>

LEFT_BT N# RIGHT_BTN #

JLED1

1

2

3

4

5

6

7

8

9

GND

10

GND

ACES_85 201-08051

CONN@

PWR_ LED#

61

DMN66D0 LDW-7_SOT3 63-6

2

Q26A

R487

100K_04 02_5%

1 2

PWR_ SUSP_LED#

34

DMN66D0 LDW-7_SOT3 63-6

5

Q26B

R490

100K_04 02_5%

1 2

Compal Secret Data

2010/08/ 20 2011/08/ 20

3

Compal Secret Data

Deciphered Date

5

1 2

R479 0_060 3_5%R 479 0_06 03_5%

EC_SPICS# /FSEL#

28

G2

27

G1

SPI_WP # SPI_HOLD#

KSO16

KSO17

KSO7

KSO6

KSO5

KSO4

KSO3

KSI4

KSO2

KSO1

KSO0

KSI5

KSI6

KSI7

+3VALW

EC_SPICS# /FSEL#<31>

D D

+3VALW

C C

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2

B B

A A

KSI3 KSI4 KSI5 KSI6 KSI7

KSO15

KSO14

KSO13

KSO12

KSI0

KSO11

KSO10

KSI1

KSI2

KSO9

KSI3

KSO8

R480 4.7 K_0402_5%R480 4.7K _0402_5%

1 2

R482 4.7 K_0402_5%R482 4.7K _0402_5%

1 2

JKB1

26

KSO0

25

KSO1

24

KSO2

23

KSO3

22

KSO4

21

KSO5

20

KSO6

19

KSO7

18

KSO8

17

KSO9

16

KSO10

15

KSO11

14

KSO12

13

KSO13

12

KSO14

11

KSO15

10

KSO16

9

KSO17

8

KSI0

7

KSI1

6

KSI2

5

KSI3

4

KSI4

3

KSI5

2

KSI6

1

KSI7

ACES_88 747-2601

CONN@

C749 1 00P_0402_50V 8J@C749 100 P_0402_50V8J@

1 2

C751 1 00P_0402_50V 8J@C751 100 P_0402_50V8J@

1 2

C753 1 00P_0402_50V 8J@C753 100 P_0402_50V8J@

1 2

C755 1 00P_0402_50V 8J@C755 100 P_0402_50V8J@

1 2

C757 1 00P_0402_50V 8J@C757 100 P_0402_50V8J@

1 2

C759 1 00P_0402_50V 8J@C759 100 P_0402_50V8J@

1 2

C761 1 00P_0402_50V 8J@C761 100 P_0402_50V8J@

1 2

C763 1 00P_0402_50V 8J@C763 100 P_0402_50V8J@

1 2

C765 1 00P_0402_50V 8J@C765 100 P_0402_50V8J@

1 2

C767 1 00P_0402_50V 8J@C767 100 P_0402_50V8J@

1 2

C769 1 00P_0402_50V 8J@C769 100 P_0402_50V8J@

1 2

C771 1 00P_0402_50V 8J@C771 100 P_0402_50V8J@

1 2

SW1

SW1 SMT1-05-A _4P

SMT1-05-A _4P

3

4

LID_SW # WLAN _LED# MEDIA_LED #

PWR_ LED# ON/OFFBT N#

JTP1

7

GND

8

GND

ACES_85 201-0605N

CONN@

5

6

+5VS

1

2

3

3 4 5 6

1

2

LEFT_BT N#

4

RIGHT_BTN #

5 6

+3VALW

LID_SW # <31>

WLAN _LED# < 31>

+3VS

ON/OFFBT N# <34>

MEDIA_LED #

+3VALW

+3VS

+3VALW

1 2

R511 750_0 402_1%R511 750_040 2_1%

1 2

R477 750_0 402_1%

1 2

R478 3.01K_ 0402_1%R478 3.01 K_0402_1%

1 2

R499 750_0 402_1%R499 750_040 2_1%

1 2

R498 3.3K_0 402_5%R498 3.3K_ 0402_5%

For PEW76/86/96 LED light, R477, R499 change as 750 ohm R478 change as 3.01k ohm R498 change as 3.3k ohm

2

@

TP_CLK < 31>

TP_DATA <31 >

SW2

SW2 SMT1-05-A _4P

SMT1-05-A _4P

3

4

5

4

1

2

6

PJDLC05 C_SOT23-3

+3VS

5

U29

2

P

B

Y

1

A

G

NC7SZ08 P5X_NL_SC70-5

3

LED1

LED1 HT-191NB 5_BLUE

HT-191NB 5_BLUE

2 1

B

LED2

LED2 HT-191UD 5_AMBER

HT-191UD 5_AMBER

2 1

A

LED3

LED3 HT-191NB 5_BLUE

HT-191NB 5_BLUE

2 1

B

LED4

LED4 HT-191UD 5_AMBER

HT-191UD 5_AMBER

2 1

A

Title

Size Document Num ber Rev

B

Date: Sheet of

Date: Sheet

+5VS

C745

0.1U_040 2_16V4Z

RIGHT_BTN #

LEFT_BT N#

2

3

D11

PJDLC05 C_SOT23-3

1

+3VS

1 2

Compal Electronics, Inc.

KB/TP/LED/SPI ROM/PWRb

LA-7092P P5WE6/H6/S6

Pop R486 for RTS5137

R486

100K_04 02_5%

PWR_ LED#

PWR_ SUSP_LED#

BATT_BL UE_LED#

BATT_AM B_LED#

5IN1_LED# <29>

SATA_LE D# <15 >

TP_CLK

TP_DATA

2

3

D13

1

BATT_BL UE_LED# <31>

BATT_AM B_LED# <31 >

32 46Friday, October 29, 201 0

1

0.3

of

A

+5VALW

Change 0603 size

1 1

2 2

For DVT

Change 0603 size For DVT

C713

4.7U_0603_6.3V6K

SYSON#<35>

+5VALW

C715

4.7U_0603_6.3V6K

1

2

1

2

SYSON#

U24

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

1 2

4

FLG

EN

EPAD

9

AP2301MPG-13_MSOP8

U25

GND

VOUT VOUT

VIN VIN3VOUT

FLG

EN

EPAD

9

AP2301MPG-13_MSOP8

SA00003XM00 S IC AP2301MPG-13 MSOP 8P PWR SW

8 7 6 5

B

+USB_VCCA

80mil

+USB_VCCB

80mil

+3VALW

12

R446

R446 100K_0402_5%

100K_0402_5%

R447 10K_0402_5%R447 10K_0402_5%

1 2

C714

0.1U_0402_16V4Z

+3VALW

12

R450

R450 100K_0402_5%

100K_0402_5%

1 2

R452

R452 10K_0402_5%

10K_0402_5%

1

2

1

2

R449

@R449

@

0_0402_5%

1 2

C716

0.1U_0402_16V4Z

C

USB_OC0# <14>

USB_OC2# <14>

USB_OC1# <14>

+USB_VCCA

USB20_N0<14>

USB20_P0<14>

USB20_N0_R

D

SVPE, 4.2m, 18mohm

hange P/N SF000003I00

C

USB20_N0

USB20_P0

D10

4

5

+USB_VCCA

12

+

C711

220U_6.3V_M

1 2

R448 0_0402_5%@R448 0_0402_5%@

L83

1

4

WCM2012F2S-900T04_0805

R451 0_0402_5%@R451 0_0402_5%@

2

3

1 2

3

2

+USB_VCCA

470P_0402_50V7K

2

3

USB20_P0_R

1

C712

2

W=80mils

USB20_N0_R USB20_P0_R

E

JUSB1

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020133MB004S580ZL-C

CONN@

6

To USB/B Connector

1

PJUSB208_SOT23-6

Change P/N SC300000O00 for ESD

(Port 1,2)

JUSB2

3 3

10

13

11

GND

14

12

GND

ACES_85201-1205N

CONN@

+USB_VCCB

1

2

3

4

5

6

7

8

9

10 11 12

USB20_N1 USB20_P1

USB20_N2 USB20_P2

USB20_N1 <14> USB20_P1 <14>

USB20_N2 <14>

USB20_P2 <14>

Bluetooth Conn.

BT_ON#<31>

+BT_VCC

JBT1

GND

8

7

6

5

4

3

2

1

10

9

ACES_87213-0800G

CONN@

BT@

1 2

R453 10K_0402_5%

Change 0603 size For DVT

USB20_P7 <14> USB20_N7 <14>

+3VALW

C718

BT@

0.1U_0402_16V4Z

C720

BT@

0.1U_0402_16V4Z

+3VS

BT@

3

S

Q24

2

G

D

AO3413L_SOT23-3

1

C721

BT@C721

BT@

4.7U_0603_6.3V6K

2

BT@

1

C719

1U_0402_6.3V4Z

2

W=40mils

C722

BT@C722

BT@

0.1U_0402_16V4Z

2

G

+BT_VCC

12

BT@

R454

R454 300_0603_5%

300_0603_5%

BT@

13

D

Q25

Q25 2N7002_SOT23

2N7002_SOT23

S

4 4

Security Classification

2010/08/20 2011/08/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/08/20 2011/08/20

Compal Secret Data

C

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

USB/BT/USBsub

LA-7092P P5WE6/H6/S6

33 46Friday, October 29, 2010

E

0.3

SMT1-05-A _4P

1

2

Bottom Side

SMT1-05-A _4P

1

2

ON/OFF switch

TOP Side

R493 10 K_0603_5%@R493 10K_0603 _5%@

R494 10 K_0603_5%@R494 10K_0603 _5%@

Bottom Side

SW3

3

4

5

6

SW4

3

4

5

6

1 2

ON/OFFBT N#O N/OFFBTN#

EC_ON<31,38>

Power Button

D12

1

DAN202U T106_SC70-3

ON/OFFBT N# <32>

EC_ON

2

G

R496

10K_040 2_5%

1 2

+3VALW

R495

100K_04 02_5%

1 2

2

3

Change to SC600000B00

13

D

S

C773

1000P_0 402_50V7K

Q27

2N7002_ SOT23

2

1

ON/OFF <31>

51_ON# <36>

FAN1 Conn

Change 0603 size

+5VS

R566

R566 0_0603_ 5%

0_0603_ 5%

@

+VCC_FA N1

EN_DFAN 1<31>

1 2

R567 0_0402_ 5%R567 0_0402_ 5%

@

U37

1

EN

2

VIN

3

VOUT

4

VSET

1

APL5607 KI-TRG_SO8

C822

0.01U_04 02_25V4Z

2

FAN_SPE ED1<31>

For DVT

C821 10U_060 3_6.3V6MC 821 10U_ 0603_6.3V6M

1 2

8

GND

7

GND

6

GND

5

GND

+3VS

12

R568

R568 10K_040 2_5%

10K_040 2_5%

1

C825

C825 1000P_0 402_50V7K

1000P_0 402_50V7K

2

40mil

+VCC_FA N1

+5VS

12

D25

D25 1SS355_ SOD323-2@

1SS355_ SOD323-2@

1 2

10U_060 3_6.3V6M

1000P_0 402_50V7K

D26 BAS1 6_SOT23-3@ D26 B AS16_SOT23-3@

C823

1 2

C824

1 2

Change 0603 size For DVT

JFAN1

1

2 3

4

2

G1

5

3

G2

CONN@

ACES_85 204-03001

H1

H_3P0H1H_3P0

1

H11

H_3P0

1

H14

H_3P0

1

FD1

1

FIDUCIAL_C40 M80

Security Class ification

2010/08/ 20 2011/08/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/ 20 2011/08/ 20

Compal Secret Data

Deciphered Date

H2

H_4P0H2H_4P0

H12

H_3P0

1

H4

H3

H_4P0H3H_4P0

1

H19

H_3P0

1

FIDUCIAL_C40 M80

H5

H_3P0H4H_3P0

H_3P0H5H_3P0

1

H24

H_3P0

1

H18

H_3P4

1

FD2

1

Title

Size Document Num ber Rev

Custom

Date: Sheet of

H20

H_4P2

1

H17

H_3P0X3 P5N

1

FD3

1

FIDUCIAL_C40 M80

Compal Electronics, Inc.

Other IO/USB (right)

LA-7092P P5WE6/H6/S6

H_3P0H7H_3P0

H21

H7

1

H8

H_3P0H8H_3P0

1

H22

H23

H_4P2

1

H13

H_3P0N

1

FD4

1

FIDUCIAL_C40 M80

H_3P0

1

H10

34 46Friday, October 29, 2010

1

0.3

A

+5VALW TO +5VS

Change P/N SB00000GV00

+5VALW

U38

Change 0603 size For DVT

1

C1445

C1443

10U_0603_6.3V6M

1 1

+VSB

Change 0603 size For DVT

2 2

+VSB

10U_0603_6.3V6M

2

10U_0603_6.3V6M

1 2

R1103 100K_0402_5%R1103 100K_0402_5%

SUSP

2N7002_SOT23

1

C1453

C1454

10U_0603_6.3V6M

2

10U_0603_6.3V6M

12

R1112 200K_0402_5%R1112 200K_0402_5%

SUSP

Q61

2N7002_SOT23

U38

SI4800BDY-T1-GE3_SO8

8 7

5

1

2

5VS_GATE

2

G

Q55

G

Q55

+3VALW TO +3VS

+3VALW

SI4800BDY-T1-GE3_SO8

8 7

5

1

2

3VS_GATE

13

D

2

G

S

4

Change 0603 size For DVT

1

13

D

S

C1450

0.1U_0603_25V7K

2

Change P/N SB00000GV00

U41

1 2 36

4

Change 0603 size For DVT

1

C1456

0.1U_0603_25V7K

2

1 2 36

C1452

10U_0603_6.3V6M

+5VS

1

C1446

10U_0603_6.3V6M

2

+3VS

1

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

C1455

2

+1.5VS

Q63

SI2301CDS-T1-GE3_SOT23-3

S

D

13

G

3 3

100K_0402_5%

R1122

SUSP#

R1122

12

200K_0402_5%

C1463

0.1U_0603_25V7K

R1121

1 2

2

G

1

SSM3K7002FU_SC70-3

2

G

2

13

D

S

10U_0603_6.3V6M

Q67

1

2

C1461

+1.5VS+1.5V

Change 0603 size For DVT

R1120

R1120 470_0603_5%

470_0603_5%

1 2

13

D

2

G

Q65

S

2N7002_SOT23

SUSP

C1444

1 2 13

D

S

B

R1101

1 2

13

D

Q53

S

R1110

470_0603_5%

2

G

Q60

2N7002_SOT23

470_0603_5%

SUSP

2

G

2N7002_SOT23

SUSP

Change 0603 size For DVT

R1104

1K_0402_5%

+VSB

1 2

R1105 47K_0402_5%R1105 47K_0402_5%

VLDT_EN#

2N7002_SOT23

C

+1.1VALW TO +1.1VS

+1.1VALW

U39

SI4800BDY-T1-GE3_SO8

8

Q56

7

5

1

13

D

S

1.1VS_GATE

R1106

2

G

4

12

13

D

S

2

G

ACIN

12

C1448

10U_0603_6.3V6M

ACIN<25,31,37>

1 2 36

Change 0603 size For DVT

1

C1451

0.1U_0603_25V7K

2

300K_0402_5%

Q57

Q57 2N7002_SOT23

2N7002_SOT23

+1.1VS

1

C1447

10U_0603_6.3V6M

2

1

C1449

2

1U_0402_6.3V4Z

2N7002_SOT23

1.5_VDDC_PWREN#<25>

R1102

470_0603_5%

1 2

13

D

S

Q54

1.5_VDDC_PWREN<24,43>

G

2

VLDT_EN#

D

VLDT_EN<31>

10K_0402_5%

VGA_ON<24,31>

10K_0402_5%

1.5_VDDC_PWREN#

R1134

10K_0402_5%

12

R1107

VGA_ON#

R1113

+5VALW

2

G

+5VALW

2

G

12

+5VALW

2

G

12

R1131

R1131 100K_0402_5%

100K_0402_5%

1 2

13

D

Q77

Q77 2N7002_SOT23

2N7002_SOT23

S

R1111

R1111 100K_0402_5%

100K_0402_5%

1 2

13

D

Q51

Q51 2N7002_SOT23

2N7002_SOT23

S

R1114

R1114 100K_0402_5%

100K_0402_5%

1 2

13

D

Q58

Q58 2N7002_SOT23

2N7002_SOT23

S

E

+5VALW

R1108

R1108 100K_0402_5%

100K_0402_5%

1 2

SYSON#<33>

SYSON<31,40,42>

100K_0402_5%

SUSP<42>

SUSP#<31,40,41>

10K_0402_5%

PE_GPIO1#<24>

PE_GPIO1<13,24>

100K_0402_5%

VGA_PWR_ON#<25>

VGA_PWR_ON<24,25>

100K_0402_5%

SYSON#VLDT_EN#

12

R1109

SUSP

12

R1115

PE_GPIO1#

12

R1118

VGA_PWR_ON#

12

R1123

2

G

2

G

2

G

2

G

13

D

S

+5VALW

1 2

13

D

S

+5VALW

1 2

13

D

S

+5VALW

1 2

13

D

S

Q52

Q52 2N7002_SOT23

2N7002_SOT23

R1116

R1116 100K_0402_5%

100K_0402_5%

Q59

Q59 2N7002_SOT23

2N7002_SOT23

R1117

R1117 100K_0402_5%

100K_0402_5%

Q62

Q62 2N7002_SOT23

2N7002_SOT23

R1119

R1119 100K_0402_5%

100K_0402_5%

Q68

Q68 2N7002_SOT23

2N7002_SOT23

+1.5V +0.75VS +1.1VS +VGA_CORE

R1135

R1135 470_0603_5%

470_0603_5%

4 4

1 2

13

D

SYSON# SUSP VLDT_EN# 1.5_VDDC_PWREN#

2

G

Q78

S

2N7002_SOT23

R1137

R1137 470_0603_5%

470_0603_5%

1 2

13

D

S

A

2

G

Q80

Q80 2N7002_SOT23

2N7002_SOT23

1 2

13

D

S

R1128

R1128 470_0603_5%

470_0603_5%

2

G

Q74

Q74 2N7002_SOT23

2N7002_SOT23

R1126

R1126 470_0603_5%

470_0603_5%

VGA@

1 2

13

D

S

2

G

Q28

Q28 2N7002_SOT23

2N7002_SOT23

VGA@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2010/08/20 2011/08/20

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

LA-7092P P5WE6/H6/S6

35 46Friday, October 29, 2010

E

0.3

5

PJP1

@PJP1

@

ACES_50305-00441-001

1 2 3

4 GND GND

D D

BATT+

C C

51_ON#<34>

+CHGRTC

B B

PD2

LL4148_LL34-2

PR3

100K_0402_5%

1 2

PR4

22K_0402_5%

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

12

N1

12

PC5

0.22U_0603_25V7K

PR5

PR5 0_0603_5%

0_0603_5%

1 2

TP0610K-T1-E3_SOT23-3

12

SMB3025500YA_2P

1 2

12

PC2

100P_0402_50V8J

PQ1

+3VLP

PL1

13

2

VIN

ACOFF<31,37>

+5VALWP<38>

12

PC3

100P_0402_50V8J

VIN

PD1

PD1 LL4148_LL34-2

LL4148_LL34-2

1 2

12

PR1

PR1 68_1206_5%

68_1206_5%

12

PC6

0.1U_0603_25V7K

4

VIN

12

PR2

PR2 68_1206_5%

68_1206_5%

PR7

1K_1206_5%

1 2

PR8

1K_1206_5%

1 2

PR11

1K_1206_5%

1 2

PR12

1K_1206_5%

1 2

PD4

2

1

3

BAS40CW_SOT323-3

12

PC4

1000P_0402_50V7K

VS

PreCHG

2

LL4148_LL34-2

PD3

12

PR9

12

PR10

100K_0402_5%

13

PQ3

PQ3 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

PQ2

TP0610K-T1-E3_SOT23-3

2

100K_0402_5%

12

PR13

PR13 100K_0402_5%

100K_0402_5%

13

2

3

B+

13

PQ4

PQ4 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

PJ1

+3VALWP +3VALW

JUMP_43X118

+5VALWP

+VSBP +VSB

(120mA,40m ils ,Via NO.= 2)

+VGA_COREP

2

112

PJ3

2

112

JUMP_43X118

(5A,200mil s ,Via NO .= 10)

PJ5

2

112

JUMP_43X39

PJP3

@PJP3

@

JUMP_43X118

2

112

PJP4

@PJP4

@

JUMP_43X118

2

112

(13A,520mi ls ,Via N O.= 26)

PJ11

2

112

JUMP_43X118

(6A,240mil s ,Via NO .=12)

+VGA_CORE

+1.05VS+1.05VSP

1

PJ2

2

112

JUMP_43X118

(3A,120mil s ,Via NO .=6)(4.73A,200 mils ,Via NO.= 10)

PJ4

+1.1VALWP +1.1VALW+5VALW

JUMP_43X118

(3.15A,140 mils ,Via NO.=7)

JUMP_43X79

(3A,120mil s ,Via NO .=6)

(7A,280mil s ,Via NO .=14)

112

PJ6

112

JUMP_43X118

112

JUMP_43X118

2

PJ7

PJ13

+1.8VS+1.8VSP

+0.75VS+0.75VSP

2

+1.5V+1.5VP

PJ16

+1.5VSP +1.5VS1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

2

(1A,40mils ,Via NO. = 2)

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

PWR DCIN / Pre-charge

P5WE0 M/B LA-6901P Schematic

112

JUMP_43X118

2

0.3

36 46Friday, October 29, 2010

1

36 46Friday, October 29, 2010

0.3

A

Iada=0~4.74A(90W/19V=4.736A)

CP = 85%*Iada ; CP = 4.07A

ADP_I = 19.9*Iadapter*Rsense

PQ6

AO4407A_SO8

VIN

1 1

12

PR19

PR19 200K_0402_1%

200K_0402_1%

V1

13

2

61

D

2

G

S

PQ14A

2 2

3 3

PQ14A

DMN66D0LDW -7_SOT363-6

PACIN

ACOFF<31,36>

ACOFF

PDTC115EU_SOT323-3

CP mode

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)

AO4407A_SO8

8 7

5

47K

2

47K

PQ8

1 3

PDTA144EU_SOT323-3

PQ10

PQ10 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

PR38

47K_0402_5%

1 2

2

PQ17

4

13

P2

1 2 36

12

PC12

0.1U_0603_25V7K

5

G

IREF<3 1>

PQ7

AO4407A_SO8

1 2 3 6

4

12

PR17

PR17 200K_0402_1%

200K_0402_1%

12

6251VDD

PR27

PR27 150K_0402_1%

150K_0402_1%

3S/4S#<31>

PQ14B

DMN66D0LDW -7_SOT363-6

34

D

S

PR36

80.6K_0402_1%

12

PR39

100K_0402_1%

65W/90W#<31>

8 7

5

PC7

1 2

5600P_0402_25V7K

FSTCHG<31 >

PR25 47K_0402_5%PR25 47K_0402_5%

1 2

13

2

ADP_I<31>

12

6251VREF 6251aclim

PC24

0.01U_0402_25V7K

2N7002W- T/R7_SOT323-3

P3

PQ13

PQ13 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

0.01U_0402_25V7K

PC22 .1U_0402_16V7KPC22 .1U_0402_16V7K

PR40

1 2

12.1K_0402_1%

CALIBRATE#<31>

PR24

0_0402_5%

1 2

2

G

PQ18

where Vaclm=1.502V, Iinput=4.07A

BATT Type

Charging Voltage (0x15)

CV mode

CC=0.6~4.48A

IREF=0.7224*Icharge

Normal 3S LI-ON Cells

Ki

chlim=Iref*(PR37 4/(PR372+PR374) )

V =Iref*(100K/(80. 6K+100K)) =Iref*0.5537 Ichanrge=(165mV/PR369)*(Vchlim/3.3V) =(165m/20m)*(1/3 .3V)*Iref*0.553 7 =1.3842*Iref Iref=0.7224*Icha nrge =>Ki=0.722 4

12600mV

12.60V

IREF=0.43V~3.24V

B

PR14 0.02_2512_1%PR14 0.02_2512_1%

1

2

6251VDD

12

PR26

PC19 6800P_0402_25V7KPC19 6800P_0402_25V7K

1 2

PC20

1 2

10K_0402_1%

1 2

PR33 100_0402_1%PR33 100_0402_1%

12

PR43

PR42

13

D

2.55K_0402_1%

S

1 2

PR44

15.4K_0402_1%

PC30

@PC3 0

@

10U_1206_25V6M

1 2

PC56

@PC5 6

@

10U_1206_25V6M

1 2

4

3

12

PC13

2.2U_0603_6.3V6K

ACSETIN

6251_EN CSON

100K_0402_1%

PR31

6251VREF

20K_0402_1%

31.6K_0402_1%

1 2

RB751V-40_SOD323-2

PU1

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

PR45

B+

1.2UH_1127AS-1R2N_2. 4A_30%

1 2

VIN

PD5

PR22

10_1206_5%

24

DCIN

23

ACPRN

22

CSON

21

CSOP

20

CSIN

19

CSIP

18

PHASE

17

UGATE

16

BOOT

15

VDDP

14

LGATE

13

PGND

47K_0402_5%

ACPRN

PL17

PreCHG

12

1 2 12

DCIN

LX_CHG

DH_CHG

BST_CHG

DL_CHG

12

PC14

1000P_0402_25V8J

PC15

12

0.1U_0603_25V7K

ACPRN <38>

PC18

0.047U_0402_16V7K

1 2

20_0402_5%

PC21

0.1U_0603_25V7K

1 2

PR37

0_0603_5%

1 2

6251VDDP

1 2

12

PR46

PQ19

PDTC115EU_SOT323-3

HCB4532KF-800T90_1812

CSIN

CSIP

PR18

PR18 191K_0402_1%

191K_0402_1%

ACSETIN

PR23

14.3K_0402_1%

PR28

20_0402_5%

1 2

PR29

12

PR30

PR30 20_0402_5%

20_0402_5%

1 2

PR32

2_0402_5%

0.1U_0603_25V7K

BST_CHGA

12

PD8

PD8 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

PC28

4.7U_0603_6.3V6M

6251VDD

12

13

2

PL22

1 2

PR41

4.7_0603_5%

PR47

PR47 10K_0402_1%

10K_0402_1%

PC23

PC8

10U_1206_25V6M

CSOP

12

6251VDD

C

12

PC9

10U_1206_25V6M

PACIN

12

PR49

14.3K_0402_1%

12

PC10

0.1U_0603_25V7K

AO4466_SO8

PR48

10K_0402_1%

1 2

12

PQ16

CHG_B+

PC11

2200P_0402_25V7K

12

578

12

PC16

@

10U_1206_25V6M

PDTC115EU_SOT323-3

PQ15

PQ15 AO4466_SO8

AO4466_SO8

10UH_PCMB104T-100MS _6A_20%

3 6

241

3 6

241

ACIN <25,31,35>

PQ5

PQ5 AO4407A_SO8

AO4407A_SO8

1 2 3 6

PQ9

V1

PR21

100K_0402_5%

ACPRN

2N7002W- T/R7_SOT323-3

PL2

1 2

12

PR35

@

4.7_1206_5%

12

PC27

@

680P_0402_50V7K

4

PR15

PR15 10K_0402_1%

10K_0402_1%

1 2

13

12

2

PQ12

8 7

5

PR16

PR16 47K_0402_1%

47K_0402_1%

1 2

1SS355_SOD323-2

2

13

D

G

S

TCR=50ppm / C

CHGCHG

PD9

@PD9

@

1SS355_SOD323-2

1 2

PD12

@PD1 2

@

1 2

PC253

@

12

2200P_0402_25V7K

1

2

D

VIN

PR357

@PR3 57

@

200K_0402_1%

1 2

12

0.1U_0603_25V7K

PC17

PR34

4

0.02_1206_1%

3

ACOFF

VIN

PQ61

@

PQ61

@

13

D

2N7002W- T/R7_SOT323-3

PACIN

2

G

S

12

PC25

10U_1206_25V6M

<40,41>

12

PC26

10U_1206_25V6M

BATT+

Kv

4 4

Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K R=514K//31.6K//( 15.4K+3k)=11.37 2K r=514K//514K//31 .6K=28.14K Vcell=0.175*Vadj +3.99v

4.2V=0.175*Vadj+ 3.99V =>Vadj=1. 2V Vadj=Vref*(R/(R+ 514K))+CALIBRAT E*(r/(r=514K))

1.1483=CALIBRATE *0.6046 =>CALIB RATE=1.899

1.899=(4.2-(Vcel l+A*0.175))*Kv= (4.2-(4.2+A*0.1 75))*Kv A=Vref*(R/(R+514 K))=0.052 Kv=9.451

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

PWR-CHARGER

Size D ocument Number Rev

Custom

Date: Sheet of

P5WE0 M/B LA-6901P Schematic

D

37 46Friday, October 29, 2010

0.3

5

4

3

2

1

2VREF_8205

D D

PR50

13K_040 2_1%

1 2

PR52

RT8205_B+

PL3

HCB4532 KF-800T90_181 2

B+

C C

B B

A A

1 2

12

PC31

PC32

0.1U_0603_25V7K

+3VALWP

MAINPWON<39>

ACPRN<37>

EC_ON<31,34>

PR63

PR63 0_0402_ 5%

0_0402_ 5%

2N7002W -T/R7_SOT32 3-3

PR65

200K_04 02_5%

12

2

5

PC33

4.7U_0805_25V6-K

220U_6.3 V_M

12

PQ26

2

G

13

PQ27

PQ27 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

12

PC34

2200P_0402_50V7K

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1 2

1

+

PC42

2

PQ24B

DMN66D0 LDW-7_SOT3 63-6

VL

13

D

S

VS

100K_04 02_1%

1 2

PR66

578

3 6

241

PL4

12

PR67

12

PR58

@ PR58

@

4.7_1206_5%

12

PC44

@ PC44

@

680P_0402_50V7K

34

D

S

100K_04 02_1%

12

40.2K_0402_1%

578

PQ22

PQ22 AO4712_ SO8

AO4712_ SO8

3 6

241

ENTRIP1 ENTRIP2

5

G

PR64

12

2

PC49

2.2U_0603_6.3V6K

4

PQ20

AO4466_ SO8

2

G

13

PQ25

PQ25 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

Typ: 175mA

PC39

4.7U_0805_10V6K

B+

61

D

DMN66D0 LDW-7_SOT3 63-6

S

+3VLP

12

PR56

1 2

0_0603_ 5%

PC40

0.1U_060 3_25V7K

PR59 0_0402_ 5%

MAINPW ON

PR61

499K_04 02_1%

1 2

PQ24A

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0_0402_ 5%

12

PR62

100K_0402_1%

+3.3VALWP Ipeak=6.768A ; 1.2Ipeak=8.12A; Imax=4.738A f=375KHz, L=4.7UH,Rentrip=162k ohm Rdson=15~18m ohm 1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.774A Vlimit=10*10^-6*162Kohm/10=0.162V Ilimit=0.162/(18m*1.2)~0.162/(15m*1.2)=7.5A~9A Iocp=8.274A~9.774A

Issued Date

PR52

20K_040 2_1%

1 2

PR54

137K_04 02_1%

1 2

25

7

8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

@PR59

@

12

PC46

1U_0603_10V6K

2VREF_8205

PU2

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

2010/07/ 13 2011/07/ 13

3

12

PC29

1U_0603_10V6K

ENTRIP2

6

5

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_ B+

1

4

3

2

FB1

REF

TONSEL

15

ENTRIP1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

12

PC47

12

4.7U_0805_10V6K

PC48

0.1U_0603_25V7K

Compal Secret Data

PR51

30K_040 2_1%

1 2

PR53

20K_040 2_1%

1 2

PR55

154K_04 02_1%

ENTRIP1

1 2

24

VO1

23

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205E GQW_W QFN24_4X4

VL

T

yp: 175mA

Deciphered Date

PC35

4.7U_0805_25V6-K

PR57

0_0603_ 5%

1 2

RT8205_ B+

12

PC36

SPOK <39,41>

PC41

0.1U_060 3_25V7K

1 2

TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP) (2)SMPS2=375KHZ(+3VALWP)

2

12

PC37

4.7U_0805_25V6-K

+5VALWP Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A f=300KHz, L=4.7UH,Rentrip=154k ohm Rdson=15~18m ohm 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A Vlimit=10*10^-6*154Kohm/10=0.15V Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A Iocp=8.44~9.86A

12

PC38

0.1U_0603_25V7K

2200P_0402_50V7K

AO4466_ SO8

AO4712_ SO8

578

PQ21

3 6

241

PL5

12

PR60

@ PR60

@

12

PC45

@ PC45

@

PL5

1 2

4.7_1206_5%

220U_6.3 V_M

680P_0402_50V7K

1

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

578

PQ23

Title

Size Document Num ber Rev

Custom

Date: Sheet of

3 6

241

Compal Electronics, Inc.

3VALWP/5VALWP

P5WE0 M/B LA-6901P Schematic

PC43

38 46Friday, October 29, 201 0

1

+

2

+5VALWP

0.3

5

PJP2

SUYIN_200275GR008G13GZR

D D

GND GND

10 9 8

8

7

EC_SMDA

6

EC_SMCA

5

TH

4

PI

3

2

1

<40,41>

VMB

PL6

SMB3025500YA_2P

1 2

12

PC51

PC51 1000P_0402_50V7K

1000P_0402_50V7K

C C

VL

PR80

100K_0402_1%

B B

100K_0402_1%

SPOK<38,41>

1 2

PR81

PR81 1K_0402_5%

1K_0402_5%

1 2

2

G

12

PC55

<40,41>

BATT+

12

PC52

0.01U_0402_25V7K

B+

PR79

22K_0402_1%

1 2

13

D

PQ29

2N7002W-T/R7_SOT323-3

S

12

PR78

100K_0402_1%

12

PR70

PR70 1K_0402_5%

1K_0402_5%

12

PC53

0.22U_0603_25V7K

4

PR69

100_0402_1%

PR73

6.49K_0402_1%

12

PR75

PR75 1K_0402_1%

1K_0402_1%

PQ28

TP0610K-T1-E3_SOT23-3

13

2

1 2

PR68

PR68 100_0402_1%

100_0402_1%

1 2

12

PC54

0.1U_0603_25V7K

EC_SMB_DA1 <31>

EC_SMB_CK1 <31>

+3VALWP

+VSBP

BATT_TEMP < 31>

3

2

1

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

VL

PU3

PR74

@PR74

@

100K_0402_1%

1 2

PU3

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

100K_0402_1%_NCP15WF104F0 3RC

TMSNS1

RHYST1

TMSNS2

RHYST2

10K_0402_1%

8

7

6

5

@

47K_0402_1%

PR77

PH2

PR71

12

PR72

PR72 21K_0402_1%

21K_0402_1%

1 2

12

PR76

9.53K_0402_1%

12

@PH2

@

12

PH1

100K_0402_1%_NCP15WF104F0 3RC

PC50

0.1U_0603_25V7K

MAINPWON<38>

VL

12

1U_0402_6.3V6K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR-BATTERY CONN/OTP

Size Document Number Rev

Custom

P5WE0 M/B LA-6901P Schematic

Date: Sheet of

2

Date: Sheet of

1

39 46Friday, October 29, 2010

0.3

A

PJ14

@ PJ14

@

1 1

+5VALW

2

SUSP#<31,35,41>

112

JUMP_43X39

12

PC115

PC115 22U_0805_6.3VAM

22U_0805_6.3VAM

PR84

1 2

200K_0402_5%

EN_1.8VS

@

PR86

1M_0402_5%

SY8033BDBC_DFN10_3X3

12

B

12

PC120

0.22U_0402_10V6K

C

PU4

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

NC

7

11

LX_1.8VS

2

LX

3

LX

FB=0.6Volt

6

FB

NC

1

PR82

PC119

LX_1.8VS

PL7

2.2UH_MSCDRI-74A- 2R2M-E_6.5A_20%

1 2

12

20K_0402_1%

4.7_1206_5%

12

680P_0603_50V7K

PR83

FB_1.8VS

12

PR85

10K_0402_1%

+1.8VSP

12

PC116

68P_0402_50V8J

12

PC118

PC117

22U_0805_6.3VAM

D

G5603 TPS51117 RT8209MRT8209B

Temperature Compensated

2 2

Vtrip_min (SPEC)

Vtrip_max (SPEC)

+5VALW

3 3

SYSON<31,35,42>

-1180ppm/

℃℃℃℃

1600ppm/

℃℃℃℃

4500ppm/

℃℃℃℃

30mV 50mV 30mV 50mV

200mV 200mV 200mV 200mV

PR88

1 2

0_0402_5%

PR91

1 2

100_0603_5%

4.7U_0603_6.3V6K

PR90

30K_0402_5%

PC129

12

@

PC126

.1U_0402_16V7K

12

PR94

1 2

5.1K_0402_1%

12

PR95

5.1K_0402_1%

2

3

4

5

6

PU5

TON

VOUT

VDD

FB

PGOOD

1

15

14

NC

EN/DEM

VFB=0.75V

GND7PGND

RT8209MGQW _WQFN14_3P5X3P5

8

4800ppm/

255K_0402_1%

1 2

BST_1.5V

BOOT

UGATE

PHASE

CS

VDDP

LGATE

℃℃℃℃

PR87

PR89

1 2

0_0603_5%

DH_1.5V

13

LX_1.5V

12

PR92

11

1 2

7.68K_0402_1%

10

DL_1.5V

9

Rtrip: 5KΩ~15KΩ

BST_1.5V-1

PC127

1 2

0.1U_0603_25V7K

+5VALW

PC131

4.7U_0805_10V6K

1 2

PQ31

AO4726L_SO8

578

3 6

241

678

35241

12

PC121

4.7U_0805_25V6-K

PQ30

AO4466_SO8

12

Rds(on) = 5.3m ohm (typ) 7m ohm ( max)

12

PC123

4.7U_0805_25V6-K

1.0UH_PCMC104T-1R 0MN_20A_20%

PR93

@PR9 3

@

4.7_1206_5%

PC130

@PC1 30

@

680P_0603_50V7K

12

PC124

PC125

0.1U_0603_25V7K

0.1U_0603_25V7K 2200P_0402_50V7K

2200P_0402_50V7K

PL9

12

PL8

HCB2012KF-121T50_0805

1 2

1

+

PC128

PC128 330U_6.3V_M

330U_6.3V_M

2

B+

+1.5VP

<Vo=1.5V> VFB=0.75V Vo=0.75*(1+10K/10K)=1.5V Fsw=280KHz

Cout ESR=17 mohm Rdson(max)=7 mohm Rdson(typ)=5.3 mohm Ipeak=9.45A, Imax=6.615A

4 4

Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.93A =>1/2Delta I=2.467A Vtrip=Rtrip*10uA=0.0768 Iocpmin=Vtrip/(Rds(on)(max)*1.2)+Delta I/2=11.61A Iocpmax=Vtrip/(Rds(on)(typ)*1.2)+Delta I/2=14.54A Iocp=11.61A~14.54A

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2009/04/28

Compal Secret Data

Deciphered Date

C

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

1.8VSP/1.5VP

40 46Friday, October 29, 2010

D

40 46Friday, October 29, 2010

0.3

A

B

C

1.1VALW _B+

PL10

HCB2012KF-121T50_0805

12

D

B+

PC135

4.7U_0805_25V6-K

PL13

12

PC208

PC207

0.1U_0603_25V7K

2200P_0402_50V7K

+1.1VALW P

1

+

PC138

2

330U_6.3V_M

1.05VALW _B+

12

PC145

PC144

0.1U_0603_25V7K

<Vo=1.1V> VFB=0.75V V=0.75*(1+4.7K/10K)=1.1V Fsw=280KHz

Cout ESR=17 mohm Rdson(max)=18 mohm Rdson(typ)=15 mohm Ipeak=4.5A, Imax=3.15A Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=1.68A =>1/2Delta I=0.84A Vtrip=Rtrip*10uA=0.107 Iocpmin=Vtrip/(Rds(on)(max)*1.2)+Delta I/2=5.79A Iocpmax=Vtrip/(Rds(on)(typ)*1.2)+Delta I/2=6.78A Iocp=5.79A~6.78A

PL12

HCB2012KF-121T50_0805

12

B+

12

PC206

PC205

0.1U_0603_25V7K

2200P_0402_50V7K

+1.05VSP

1

+

PC148

2

330U_6.3V_M

<Vo=1.05V> VFB=0.75V V=0.75*(1+4.02K/10K)=1.05V Fsw=280KHz

Cout ESR=17 mohm Rdson(max)=7 mohm Rdson(typ)=5.3 mohm Ipeak=8.7A, Imax=6.09A Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=1.61A =>1/2Delta I=0.81A Vtrip=Rtrip*10uA=0.0825 Iocpmin=Vtrip/(Rds(on)(max)*1.2)+Delta I/2=10.63A Iocpmax=Vtrip/(Rds(on)(typ)*1.2)+Delta I/2=13.78A Iocp=10.63A~13.78A

12

578

PR96

TON

VOUT

VDD

FB

PGOOD

PR96

255K_0402_1%

1 2

1

15

14

NC

BOOT

UGATE

EN/DEM

PHASE

LGATE

GND7PGND

RT8209MGQW _WQFN14_3P5X3P5

8

PU7

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

4500ppm/

℃℃℃℃

PR98

0_0603_5%

1 2

CS

VDDP

255K_0402_1%

1 2

1

EN/DEM

BST_1.1V ALW

DH_1.1VALW

0.1U_0603_25V7K

13

12

11

10

9

0.1U_0603_25V7K

LX_1.1VALW

1 2

PR102

10.7K_0402_1%

DL_1.1VALW

Rtrip: 5KΩ~15KΩ

PR105

PR107

0_0603_5%

1 2

15

14

NC

BOOT

UGATE

PHASE

CS

VDDP

LGATE

GND7PGND

RT8209MGQW _WQFN14_3P5X3P5

8

4800ppm/

PC137

1 2

+5VALW

12

PC140

4.7U_0805_10V6K

BST_1.05V ALW

1 2

DH_1.05VALW

0.1U_0603_25V7K

13

LX_1.05VALW

12

11

1 2

PR111

8.25K_0402_1%

10

DL_1.05VALW

9

Rtrip: 5KΩ~15KΩ

℃℃℃℃

PC147

3 6

241

578

3 6

241

+5VALW

12

PC150

4.7U_0805_10V6K

Rds(on) = 5.3m ohm (typ) 7m ohm ( max)

1 1

PR97

0_0402_5%

SPOK<38,39>

+5VALW

2 2

3 3

4 4

Temperature Compensated

1 2

PR101

100_0603_1%

1 2

4.7U_0603_6.3V6K

SUSP#<31,35,40>

+5VALW

PR99

30K_0402_5%

PC139

12

@

12

PR106

200K_0402_5%

1 2

PR110

100_0603_1%

1 2

4.7U_0603_6.3V6K

G5603 TPS51117 RT8209MRT8209B

-1180ppm/

℃℃℃℃

12

PC136

PC136 .1U_0402_16V7K

.1U_0402_16V7K

@

4.7K_0402_1%

1 2

12

PR104

PR104 10K_0402_1%

10K_0402_1%

PR108

30K_0402_5%

PC149

PR103

@

12

1600ppm/

PC146

12

.1U_0402_16V7K

PR112

4.02K_0402_1%

1 2

12

PR113

PR113 10K_0402_1%

10K_0402_1%

℃℃℃℃

PU6

2

3

4

5

6

12

PC132

4.7U_0805_25V6-K

PQ32

AO4466_SO8

2.2UH_FDVE0630-H- 2R2M=P3_8.3A_20%

12

PQ33

12

578

3 6

678

35241

PR100

4.7_1206_5%

@ PR100

@

PC141

@ PC141

@

680P_0603_50V7K

241

AO4466_SO8

AO4712_SO8

PC133

PL11

1 2

PQ34

PQ35

PQ35 AO4726L_SO8

AO4726L_SO8

12

PC134

0.1U_0603_25V7K

4.7U_0805_25V6-K

12

PC143

PC142

4.7U_0805_25V6-K

2.2UH_FDVE0630-H- 2R2M=P3_8.3A_20%

1 2

12

PR109

4.7_1206_5%

12

PC151

680P_0603_50V7K

Vtrip_min (SPEC)

Vtrip_max (SPEC)

30mV 50mV 30mV 50mV

200mV 200mV 200mV 200mV

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2009/04/28

Compal Secret Data

Deciphered Date

C

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

1.1VALWP/1.05VSP

41 46Friday, October 29, 2010

D

41 46Friday, October 29, 2010

0.3

5

@

PR186

D D

SYSON<31,35,40>

+5VALW

PR186

1 2

0_0402_5%

@

PR178

1 2

100_0603_5%

4.7U_0603_6.3V6K

PR183

@PR183

@

30K_0402_5%

@

PC196

12

PC203

@PC203

@

.1U_0402_16V7K

4

PR180

@

255K_0402_1%

1 2

@

PR181

@

1

PU11

2

TON

EN/DEM

3

VOUT

4

VDD

VFB=0.75V

5

FB

6

PGOOD

BST_1.5V-2

15

14

NC

BOOT UGATE

PHASE

VDDP

LGATE

GND7PGND

RT8209MGQW_WQFN14_3 P5X3P5

8

PR181

1 2

0_0603_5%

BST_1.5V-2

DH_1.5V-2

13

LX_1.5V-2

12

@

PR185

1 2

11

CS

7.68K_0402_1%

10

DL_1.5V-2

9

PC199

@ PC199

@

1 2

0.1U_0603_25V7K

+5VALW

4.7U_0805_10V6K

1 2

PC200

@PC200

@

3

12

PC201

PC198

PQ46

4.7U_0805_25V6-K

PC201

PC204

@

4.7U_0805_25V6-K

1.0UH_PCMC104T-1R0MN_20A_ 20%

12

PR182

@PR182

@

4.7_1206_5%

12

PC195

@PC195

@

680P_0603_50V7K

PQ39

@

AO4726L_SO8

578

3 6

241

678

35241

@

@PQ46

@

AO4466_SO8

0.1U_0603_25V7K

@PL21

@

12

PL21

12

PC197

@

2200P_0402_50V7K

12

2

PL20

@ PL20

@

HCB2012KF-121T50_0805

1 2

1

+

330U_6.3V_M

2

B+

PC202

@+PC202

@

1

+1.5VSP

Rtrip: 5KΩ~15KΩ

PR184

@

1 2

5.1K_0402_1%

C C

12

@PR179

@

5.1K_0402_1%

PR179

Temperature Compensated

Vtrip_min (SPEC)

Vtrip_max (SPEC)

G5603 TPS51117 RT8209MRT8209B

-1180ppm/

℃℃℃℃

1600ppm/

℃℃℃℃

4500ppm/

℃℃℃℃

30mV 50mV 30mV 50mV

200mV 200mV 200mV 200mV

4800ppm/

℃℃℃℃

<Vo=1.5V> VFB=0.75V Vo=0.75*(1+10K/10K)=1.5V Fsw=280KHz

Cout ESR=17 mohm Rdson(max)=7 mohm Rdson(typ)=5.3 mohm Ipeak=9.45A, Imax=6.615A Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.93A =>1/2Delta I=2.467A Vtrip=Rtrip*10uA=0.0768 Iocpmin=Vtrip/(Rds(on)(max)*1.2)+Delta I/2=11.61A Iocpmax=Vtrip/(Rds(on)(typ)*1.2)+Delta I/2=14.54A Iocp=11.61A~14.54A

+1.5V

1

PJ15

1

JUMP_43X39

2

B B

4.7U_0805_6.3V6K

PR115

300K_0402_5%

SUSP<35>

A A

5

1 2

PC156

.1U_0402_16V7K

2

G

12

2

PC152

1 2

13

D

S

PQ36

PQ36 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4

PR114

1K_0402_1%

PR116

1K_0402_1%

12

For shortage changed

PU8

1

VIN

2

GND

3

VREF

4

VOUT

APL5336KAI-TRL_SOP8P8

+0.75VSP

12

PC155

PC154

10U_0603_6.3V6M

.1U_0402_16V7K

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

NC

VCNTL

NC

TP

Issued Date

8

7

6

5

9

3

+3VALW

12

PC153

PC153 1U_0603_10V6K

1U_0603_10V6K

Compal Secret Data

2009/10/02 2010/10/02

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

0.75VSP

42 46Friday, October 29, 2010

1

0.3

5

PL14

VGA@PL14

VGA@

HCB2012KF-121T50_0805

B+

1 2

VGA@

PR123

12

PC157

VGA@

2200P_0402_25V7K

D D

VGA@ PR123

VGA@

20K_0402_1%

1.5_VDDC_PWREN<24,35>

C C

1 2

PC158

+3VS

0.1U_0603_25V7K

1 2

12

B+_CORE

12

PC159

VGA@

10U_0805_25V6K

PR121

@PR121

@

10K_0402_5%

PC165

VGA@ PC165

VGA@

.1U_0402_16V7K

12

VGA@

12

PC160

10U_0805_25V6K

VGA_PWRGD<13,24>

4

+3VS

12

PR117

@ PR117

@

10K_0402_5%

PU9

VGA@ PU9

PR119

VGA@ PR119

VGA@

44.2K_0402_1%

1 2

PR120

VGA@ PR120

VGA@

200K_0402_1%

Switch Freq. (RF pin setting) 47K =>450KHz 100K =>390KHz 200K =>350KHz 470K =>290KHz

VGA@

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR_SON10_3X3

VFB=0.7V

VBST

DRVH

V5IN

DRVL

3

5

PR118

VGA@ PR118

VGA@

0_0603_5%

BST_VCORE

10

9

8

SW

7

6

11

TP

1 2

DH_VCORE

SW_VCORE

DL_VCORE

VGA@

PC162

1 2

1U_0603_6.3V6M

VGA@ PC161

VGA@

0.1U_0603_25V7K

1 2

+5VALW

PC161

4

PQ37

VGA@ PQ37

VGA@

TPCA8065-H_PPAK56-8-5

123

5

VGA@ PQ38

VGA@

TPCA8057-H_PPAK56-8-5

123

PQ38

Rds=2.6m/3.2mOHM

2

PL15

VGA@ PL15

VGA@

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

1 2

12

PR122

@PR122

@

4.7_1206_5%

12

PC164

@PC164

@

680P_0603_50V7K

12

VGA@ PR124

VGA@

0_0402_5%

1 2

PR124

PR125

VGA@ PR125

VGA@

10_0402_5%

PR126

VGA@ PR126

VGA@

2.87K_0402_1%

GCORE_SEN

12

ESR=10mohm

1

PC163

VGA@+PC163

VGA@

+

390U_2.5V_M

2

GCORE_SEN <21>

1

+VGA_COREP

PR130

VGA@ PR130

VGA@

10K_0402_5%

1 2

PC167

PR137

1

12

+3VSG

1 2

12

PR129

VGA@ PR129

VGA@

10K_0402_5%

1 2

PR132

@PR132

@

10K_0402_5%

1 2

PR136

@PR136

@

10K_0402_5%

GPU_VID1 <19>

PR138

VGA@ PR138

VGA@

10K_0402_5%

43 4 6Friday, October 29, 2010

0.3

VGA_CORE Vtrip= 0.7V Vo=0.7*(1+Rtop/Rdown) Fsw=350KHz

Ipeak=18.2A Imax=12.74A, 1.2*Ipeak=21.84A Delta I= ((19-0.9)*(0.9/19))/(L*Fsw)=6.8A Iocpmax=(66.5K*11uA)/(8*1.2*0.0026) +3.4=32.71A Iocpmin=(66.5K*9uA)/(8*1.2*0.0032)+3.4=22.88A Iocp=22.88~32.71A

B B

GPIO 15 GPIO 20

Seymour

VGA@ PR131

VGA@

30.9K_0402_1%

PQ40B

VGA@

PQ40B

VGA@

DMN66D0LDW-7_SOT363-6

Core Voltage LevelGPU_VID1GPU_VID0

11

10

1

A A

0

00

5

0.9V

1.00V

1.05V

1.10V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PR131

+3VSG

PR134

VGA@ PR134

34

D

S

3

VGA@

10K_0402_5%

1 2

5

G

12

PC168

VGA@ PC168

VGA@

4700P_0402_25V7K

PQ41B

VGA@

PQ41B

VGA@

DMN66D0LDW-7_SOT363-6

Compal Secret Data

2010/07/13 2011/07/13

Compal Secret Data

PR133

VGA@ PR133

VGA@

10K_0402_5%

1 2

12

PR135

@PR135

@

10K_0402_5%

Deciphered Date

VGA@ PC166

VGA@

2200P_0402_25V7K

D

S

AP

34

PC166

12

PR140

VGA@ PR140

VGA@

10K_0402_5%

5

G

2

VGA@ PR128

VGA@

8.87K_0402_1%

12

PR128

DMN66D0LDW-7_SOT363-6

+3VSG

PR139

@PR139

@

10K_0402_5%

12

1 2

12

VGA@ PR141

VGA@

10K_0402_5%

DMN66D0LDW-7_SOT363-6

PQ40A

VGA@

PQ40A

VGA@

GPU_VID0 <19>

PR141

PQ41A

VGA@

PQ41A

VGA@

Title

Size Document Number Rev

Custom

Date: Sheet of

PR127

VGA@ PR127

VGA@

17.4K_0402_1%

1 2

61

D

2

G

S

+VGA_COREP

12

VGA@ PC167

VGA@

4700P_0402_25V7K

VGA@ PR137

VGA@

61

D

S

10K_0402_5%

2

G

Compal Electronics, Inc.

P5WE6/S6/H6

A

1 1

+5VS +3V S

+3VS

12

PR155

@PR155

@

10K_0402_1%

PR165

95.3K_0402_1%

+APU_CORE

10K_0402_1%

12

10_0402_1%

PR154

105K_0402_1%

2 2

VGATE<14,31>

VR_ON<31 >

PR164

21.5K_0402_1%

1 2

PR159 100K_0402_5%@ PR159 100K_0402_5%@

1 2

PR157 100K_0402_5%PR157 100K_0402_5%

12

APU_VDD0_RUN_FB_H<5>

FCH_PWRGD<14>

H_PWRGD_L< 13>

3 3

APU_SVD<5> APU_SVC<5>

PR152

PR152 0_0402_5%

0_0402_5%

PR160

0_0402_5%

PR167

+5VALW

CPU_B+

12

PR153

@PR153

@

105K_0402_1%

12

PR156

@PR156

@

105K_0402_1%

ISL6265_PWROK

12

PR163

0_0402_5%

12

PR169

0_0402_5%

0.1U_0603_25V7K

B

PR143

2_0603_5%

1 2

PC177

0.1U_0603_16V7K

1 2

PR148

2_0603_5%

PC181

PU10

1

OFS/VFIXEN

2

PGOOD

3

PWROK

4

SVD

12

5

SVC

6

ENABLE

7

RBIAS

8

OCSET

9

VDIFF0

10

FB0

11

COMP0

12

VW0

ISP0

VSEN1

ISN0

PR168

PR168 0_0402_5%

0_0402_5%

1 2

12

48

VIN

ISP0

13

VSEN0

46

47

VCC

FB_NB

ISN0

15

14

PC169

47P_0402_50V8J

12

PC170

1000P_0402_50V7K

PC176

1000P_0402_50V7K

12

PR144

22K_0402_1%

PR149

0_0402_5%

PR150

PR150 0_0402_5%

0_0402_5%

23.7K_0402_1%

43

42

41

RTN_NB

VSEN_NB

OCSET_NB

VDIFF1

FB1

VSEN1

19

20

18

VSEN1

PC170

12

40

PGND_NB

COMP121ISP1

PR142

44.2K_0402_1%

44

45

FSET_NB

COMP_NB

ISL6265CHRTZ-T_TQFN48_6X6

RTN117VSEN0

RTN0

16

12

PR151

39

22

12

LGATE_NB

VW1

PR147

10_0402_5%

1 2

APU_VDD0_RUN_FB_L

1 2

10_0402_5%

12

38

37

BOOT_NB

PHASE_NB

UGATE_NB

BOOT0

UGATE0

PHASE0

PGND0

LGATE0

LGATE1

PGND1

PHASE1

UGATE1

BOOT1

ISN1

23

24

ISN0

ISP0

UGATE_NB

+APU_CORE_NB

PR187

PHASE_NB

LGATE_NB

PHASE_NB

UGATE_NB

36

35

34

33

32

31

30

PVCC

29

28

27

26

25

TP

49

C

PR189

0_0603_5%

1 2

PHASE_NB

BOOT_NB

LGATE_NB

APU_VDDNB_RUN_FB _H <5>

BOOT_NB

BOOT0

UGATE0

PHASE0

LGATE0

UGATE_NB1

PR145

2.2_0603_1%

1 2

0.22U_0603_10V7K

Rds(on) max =18 m ohm typ = 15 m ohm

UGATE0

PHASE0

BOOT0

+5VALW

12

PC190

PC190 1U_0603_16V6K

1U_0603_16V6K

1 2

PC178

PR190

0_0603_5%

1 2

PR158

2.2_0603_1%

1 2

0.22U_0603_10V7K

578

3 6

578

3 6

UGATE0-1

1 2

PC187

LGATE0

241

12

PC171

4.7U_0805_25V6-K

PQ42

AO4466_SO8

PQ43

AO4712_SO8

4

D

CPU_B+

12

PC174

2200P_0402_50V7K

PQ45

PC209

0.1U_0603_25V7K

PL18

1 2

12

PC182

4.7U_0805_25V6-K

12

PC183

4.7U_0805_25V6-K

12

PC172

4.7U_0805_25V6-K

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

12

@

PR146

4.7_1206_5%

12

@

PC180

PC180 680P_0603_50V7K

680P_0603_50V7K

5

PQ44

TPCA8065-H_PPAK56-8-5

123

PQ44, PQ45 need to link

TPCA8057-H 1N PPAK56-8

123 5

E

PL16

HCB2012KF-121T50_0805

12

PR188

PR188 220_0402_1%

12

PC211

PC212

PC210

0.1U_0603_25V7K

12

PC212

0.1U_0603_25V7K

1

+

PC179

PC179 220U_6.3V_M

220U_6.3V_M

2

12

PC185

PC184

0.1U_0603_25V7K

4.7U_0805_25V6-K

12

PR161

4.7_1206_5%

12

PC188

680P_0603_50V7K

220_0402_1%

12

PC173

0.1U_0603_25V7K

+APU_CORE_NB

ESR = 15 m ohm

CPU_B+

12

PC186

DCR = 1.1m ohm +-7%

2200P_0402_50V7K

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

4

3

PR162

12.7K_0402_1%

1 2

0.1U_0603_16V7K

4.53K_0402_1%

ISP0

PC175

PR166

220U_25V_M

PL19

PC189

1

+

2

12

PC57

10U_1206_25V6M

1

2

12

ISN0

PC58

10U_1206_25V6M

B+

12

+APU_CORE

APU_VDD0_RUN_FB_L<5>

DIFF_0

PR173

PC191

255_0402_1%

4 4

PC191

2200P_0402_25V7K

12

PR174

1K_0402_5%

12

54.9K_0402_1%

12

PR177

@ PR177

@

36.5K_0402_1%

A

12

PC192

220P_0402_50V8J

PR175

12

1200P_0402_50V7K

VW0

PC194

COMP0

12

1000P_0402_50V7K

6.81K_0402_1%

PC193

PR176

12

PR170

10_0402_1%

12

0_0402_5%

+1.5V

PR171

B

RTN0

12

1K_0402_5%

PR172

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/02 2010/10/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE

44 46Friday, October 29, 2010

E

0.3

5

4

3

2

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

Change PR115 from SD028000080 to SD028300380(S RES 1/16W 300K +-5% 0402)

1

D D

2

0.75VSP EN RC value

1.8VSP EN RC value

HW adjust timing

0.1 42

HW adjust timing 0.1 40

1.05VSP EN RC value

Add PC156 SE076104K80(S CER CAP .1U 16V K X7R 0402)

Change PR84 from SD028000080 to SD028200380(S RES 1/16W 200K +-5% 0402) Add PC120 SE095224K00(S CER CAP 0.22U 10V K X5R 0402)

Change PR106 from SD028000080 to SD028200380(S RES 1/16W 200K +-5% 0402) Add PC146 SE076104K80(S CER CAP .1U 16V K X7R 0402)

410 .1HW adjust timing

2010/09/24 DVT

3

4

5

C C

6

7

8

9

10

B B

11

12

VGA_COREP EN RC value

change BOM structure 1.5VSP change BOM structure to VGA@ for cost down of UMA

Adjust APU_CORE_NB OCP

Adjust APU_CORE_NB OCP to 15A

Add input choke in charger circuit. Add input choke for EMI ISN test in charger circuit.

Add snubber

Add snubber in CPU_COREP circuit.

Add snubber and input Cup. Add snubber and input Cup. in 1.05VSP circuit.

Add input Cup.

Add input Cup. in 1.1VALWP circuit.

Add input Cup. and H/S gate resistance in CPU_COREP circuit for EMI ISN test.

Adjust VGA_COREP VID value Adjust VGA_COREP VID value

0.1 42

0.1 37

0.1 44

0.1 41

0.1 44 2010/10/19 DVT

0.1 43

Change PR123 from SD034100280 to SD034200280(S RES 1/16W 20K +-1% 0402)

Change PU11, PL21, PQ39, PQ46, PR178, PR179, PR180, PR181, PR184, PR185, PR186, PC196, PC197, PC198, PC199, PC200, PC201, PC202, PC204 BOM structure to VGA@ del PL20 SM01000C000(S SUPPRE_ TAI-TECH HCB2012KF-121T50 0805)

Change PR151 from SD034110280 to SD034237280(S RES 1/16W 23.7K +-1% 0402)

440.1

Change PL17 from SM010018710 to SH00000B100(S COIL 1.2UH +-30% 1127AS-1R2N 2.4A)

Add PR161 SD001470B80(S RES 1/4W 4.7 +-5% 1206) Add PC188 SE025681K80(S CER CAP 680P 50V K X7R 0603) Add PR188 SD034220080(S RES 1/16W 220 +-1% 0402)

Add PR161 SD001470B80(S RES 1/4W 4.7 +-5% 1206) Add PC188 SE025681K80(S CER CAP 680P 50V K X7R 0603) Add PC205, PC206 SE042104K80(S CER CAP .1U 25V K X7R 0603)

Add PC207, PC208 SE042104K80(S CER CAP .1U 25V K X7R 0603)

Add PC209, PC210, PC211, PC212 SE042104K80(S CER CAP .1U 25V K X7R 0603) Add PC57, PC58 SE142106M80(S CER CAP 10U 25V M X5R 1206 H1.7) Add PR189, PR190 SD013000080(S RES 1/10W 0 +-5% 0603)

Change PR128 from SD034100280 to SD034976180(S RES 1/16W 9.76K +-1% 0402) Change PR127 from SD034200280 to SD034147280(S RES 1/16W 14.7K +-1% 0402) Change PR131 from SD000009K00 to SD034240280(S RES 1/16W 24K +-1% 0402)

2010/09/24 DVT430 .1HW adjust timing

2010/10/05 DVT

2010/10/07 DVT

2010/10/18 DVT

2010/10/21 DVT

Change PU11, PL21, PQ39, PQ46, PR178, PR179, PR180, PR181, PR184, PR185,

change BOM structure 1.5VSP change BOM structure to @ for cost down

13

0.1 42

PR186, PC196, PC197, PC198, PC199, PC200, PC201, PC202, PC204 BOM structure to @ del PL20 SM01000C000(S SUPPRE_ TAI-TECH HCB2012KF-121T50 0805)

2010/10/21 DVT

14

15

A A

16

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/04/12 2010/10/12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

PEW96 LA-6552P

45 46Friday, October 29, 2010

1

0.3

5

4

3

2

1

Modification list PURPOSEPHASE PAGE

P08 First release0.1 Base on PEW96, change platform (NB,CPU-->APU,SB820-->FCH)

0.2

D D

0.2

0.2 P5 Add R109, R155

0.2

0.2 P16 Add R635; Unpop R634 AMD suggestion for +VDDIO_AZ

0.2

0.2 P13 Add U33, C1199, R830, R838, R839 For VGA_PWRGD

0.2 P13 Remove C52, R557 For A_RST#

0.2 P27 EC_MUTE# change as 12 PIN form 46 PIN in Codec For External Mute Fail issue

0.2 P16 C113, C77, C743, C96 change 0603 size and add C121, C105, C108, C109 22uF cap. change two 10uF cap. 0603 size

0.2 P19 C14 change 0603 size and add C52 22uF cap. change two 10uF cap. 0603 size

0.2 P13 C66, C67 change 27pF Follow suggestion by TXC result

0.2

C C

0.2

0.2 P9 Add C643, C675, C676, C678 For DDR3 moat issue

0.2 P26 Remove C939 ; Reserve C941, D48, D49, D51, L109 For LAN

0.2 P7 Add C604, C684 For CRT Moniter issue

0.3 P-- C212, C623 change 0603 size ; add C628, C685

0.3

C220, C336, C347, C357, C359, C360, C387, C388, C389, C390, C391, C392, C393, C421,

P--

C427, C428, C1461 change 0603 size

C721 C669, C1005, C705, C708, C713, C715, C736, C794, C797, C932, C934, C983

P--

change 0603 size

Follow Standard Part 0805-->0603

C215, C216, C218, C224, C226, C227, C229, C230, C231, C660, C671, C821, C823,

P--

C1210, C1517, C1522, C1526, C1529, C1532, C1512, C1523, C1443, C1445, C1446, C1447,

Follow Standard Part 0805-->0603

C1448, C1452, C1453, C1454 change 0603 size

P35 R1122 change as 200k ohm, C1463 change as 0.1UF Adjust sequence

Pull up 4.7k ohm for CRT EDIE

+VDDIO_18_FC Tie to GND for Nun-share ROMP16 Unpop R632, C744, C69, C746; Pop R633

P24 Add R170, R171 For DISO BOM option

C1485, C1486 change 33pFP26 Follow suggestion by TXC result

P33 C711 Change as SF000003I00 Material shortage

Follow Standard Part 0805-->0603

R786 change as 15k ohm Dos Beep issueP27

P19 change R21, R22 as DISO@ Device Menage Audio issue0.3

B B

A A

Security Class ification

Change footprint 20100812

: For cost down purpose to change parts

5

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/ 20 2011/08/ 20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR

LA-7092P P5WE6/H6/S6

46 46Friday, October 29, 201 0

1

0.3

Compal LA-7092P P5WE6, Aspire 5253G, LA-7092P P5WH6, LA-7092P P5WS6, LA-7092P JE50 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual