COMPAL LA-7091P Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

JE51/HM51/SJV51_BZ

P5WE7/P5WH7/P5WS7 Schematics Document

AMD Brazos

Brazos with Ontario / Hudson M1 / Robson XT

3 3

DIS only / UMA only / PX Muxless / PX Muxless with BACO

ZZZ2

2010-11-29

LA-7091P REV: 0.2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/04 2010/08/04

Compal Secret Data

ZZZ2

PCB

Part Number = DA60000LQ00

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

<Doc>

E

0.1

1 48Monday, November 29, 2010

0.1

A

B

C

D

E

Compal Confidential

Model Name : HM51/SJV51_BZ

VRAM 512M/1G/2G

1 1

Vancuver Whistler/ Seymour

ATI

Mahattan Granville

Thermal Sensor

ADM1032

page 19

uFCBGA-962

Page 18,19,20,21,22

LVDS

page 10

2 2

CRT

page 12

HDMI Conn.

page 11

Card

LED

3 3

page 32

Reader RT5209

page 29

RTC CKT.

page 13

Power On/Off CKT.

page 34

64M16/128M16 x 4

MINI Card

WLAN

page 29

page 23

DDR3

PCI-Express x 4

Gen2

DP0

DP1

LAN(GbE)

Atheros AR8151

page 26

GPP2GPP3

RJ45

page 26

Brazos

AMD Brazos APU

FT1 BGA 413-Ball 19mm x 19mm

UMI Gen.1 x4

PCI-Express

2.5GT/s per lane

FCH

Hudson-M1

BGA 605-Ball 23mm x 23mm

page 13,14,15,16,17

LPC BUS

ENE KB930

page 31

page 5,6,7

Memory BUS(DDR3)

Single Channel

1.5V DDRIII 800~1600MHz

USB port 0,1,2

USB port 5 USB port 6

USB Conn x 3

page 33 page 10 page 33

3.3V 48MHz

3.3V 24.576MHz/48Mhz

S-ATA

Gen2

SATA HDD Conn.

page 30

port 0

CMOS Camera

HD Audio

SATA ODD

page 30

port 1

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

Bluetooth Conn

USB

page 8,9

USB port 8

Mini card (WL)X1

page 29

USB port 10/11

HDA Codec ALC271X

MIC Jack x 1 HP Jack x 1 Int MIC x 1 Int SPK x 1

Option 3G

page 29

page 27

page 28

Power sequence

VGA

DC/DC

page 24,25

DC/DC Interface CKT.

4 4

page 35

Fan Control

page 34

Touch Pad

page 32

EC I/O Buffer

page 32

Int.KBD

page 32

BIOS

page 32

Extend Card/B

Security Classification

Power Circuit

page 36,37,38,39,40,41 42,43,44,45

A

1. USB X2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

LA-7091P

E

0.1

2 48Wednesday, November 17, 2010

0.1

A

Voltage Rails

Power Plane Description

VIN

B+

+VSB VSB always on power rail ON ON*ON

+APU_CORE_NB

+1.5V

+0.75VS 0.75VS switched power rail for DDR terminator

+1.05VS

+1.1VS 1.1VS switched power rail ON OFF OFF

+VGA_CORE Core voltage for GPU ON OFF OFF

+1.5VSG 1.5V switched power rail for GPU ON OFF OFF

+1.0VSG 1.0V switched power rail for GPU ON OFF OFF

+3V_LAN 3.3V power rail for LAN ON ON OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address

1 1

Device

Smart Battery

SM Bus Controller 0

Device Address

APU SIC/SID (FCH_SMB3)

H_THERMTRIP# (FCH_ALERT#)

SM Bus Controller 1

Device Address HEX

DDR DIMM1 (FCH_SMB0)

DDR DIMM2 (FCH_SMB0)

WLAN (FCH_SMB0 )

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU (0.7-1.2V) ON+APU_CORE

1.0V switched power rail

1.5V power rail for CPU VDDIO and DDRIII

1.05V switched power rail for APU VDD10 ON OFF OFF

EC SM Bus2 address

Address Address

0001-011xb

HEX

NA

(FCH_SMB1 ~ FCH_SMB4, SMB_AL ERT#)

(FCH_SMB0)

1001-000xb

1001-001xb

Device

EMC1403-2(GPU)

HEX

90

92

S1 S3 S5

N/A N/A N/A

ON ON ON*+3VALW 3.3V always on power rail

ON ON ON*+5VALW 5V always on power rail

ON OFF

ON OFF+1.8VS 1.8V switched power rail OFF

ON+RTCVCC RTC power ON ON

1001-101xb

N/AN/AN/A

ON ON*+1.1VALW 1.1V always on power rail ON

OFF

ON

OFF

OFFON OFF+3VS 3.3V switched power rail

OFFON OFF+5VS 5V switched power rail

OFF+3VSG 3.3V switched power rail for GPU ON OFF

OFF+1.8VSG 1.8V switched power rail for GPU ON OFF

HEX

9EH

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

HIGH

LOW LOW LOW LOW

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

Project ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

LOWLOWLOW

EVT

ON

HIGHHIGHHIGH

HIGH

V typ

AD_BID

ON

OFF

ON

OFF

V

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

*UMA only : *DIS only : *Muxless w/BACO : Muxless wo/BACO :

ON ON

ON

OFF

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

LOW

OFF

max

BTO Option Table

Display from APU Display from VGA Use VGA Muxless w/BACO Muxless wo/BACO WOBACO@ Muxless w/Vancouver Serise w/Manhttan Serise MAN@ Bluetooth BT@ AR8151 8151@

UMA@

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

Project ID Table

Board ID

0 1 2 3 4 5 6 7

BTO Item BOM Structure

BT@ 8151@ DISO@VGA@

UMA@ UMA@

VGA@ BACO@PX@ VGA@ WOBACO@PX@

VAN@WOBACO@

PCB Revision

UMA@ DISO@ VGA@ BACO@

PX@ VAN@

BT@ 8151@

VAN@

BT@ 8151@

For Robson:

DIS only :

DISO@VGA@ MAN@WOBACO@

Muxless w/BACO : Muxless wo/BACO :

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

UMA@ UMA@

VGA@ BACO@PX@ VGA@ WOBACO@PX@

Title

Size Document Number Rev

Custom

Date: Sheet of

MAN@

BT@ 8151@

MAN@

BT@ 8151@

Compal Electronics, Inc.

Notes List

LA-7091P

3 4 8Tuesday, October 19, 2010

BT@ 8151@

0.1

5

4

3

2

1

D D

Power-Up/Down Sequence

1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-up sequence, though a shorter ramp-up duration is preferred.

2. VDDR3 should ramp-up before or simultaneously with VDDC.

3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin before DPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10.

4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC and VDD_CT have ramped up.

5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts to ramp-up (or vice versa).)

VDDR3(3.3VSG)

Note: Do not drive any IOs before VDDR3 is ramped up.

PCIE_VDDC(1.0V)

C C

VDDR1(1.5VSG)

Without BACO option :

PE_GPIO0 : Low -> Reset dGPU ; High ->Normal operation PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON

BACO option :

PE_GPIO0 : High ->Normal operation (dGPU is not reseton BACO mode) PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON (always High)

dGPU Power Pins Max current

PCIE_PVDD, PCIE_VDDR, TSVDD, VDDR4, VDD_CT, DPE_PVDD, DP[F:E]_VDD18, DP[D:A]_PVDD, DP[D:A]_VDD18, AVDD, VDD1DI, A2VDDQ, VDD2DI, DPLL_PVDD, MPV18, and SPV18

DP[F:E]_VDD10, DP[D:A]_VDD10, DPLL_VDDC, and SPV10

PCIE_VDDC

VDDR3 , and A2VDD

BIF_VDDC (current consumption = 55mA@1.0V, in BACO mode)

VDDR1

VDDC/VDDCI

Voltage

1.8V

1.0V

3.3V

Same as VDDC

1.5V

1.12V

PX 3.0

OFF

BACO Mode

ON

ON Same as PCIE_VDDC

OFF

1679mA

575mA

2A

190mA

70mA

2.8A

12.9A

VDDC/VDDCI(1.12V)

VDD_CT(1.8V)

iGPU

PERSTb

REFCLK

Straps Reset

B B

Straps Valid

Global ASIC Reset

T4+16clock

PE_GPIO0 PE_EN

PE_GPIO1

+3.3VALW

+1.0V

+1.8V

MOS

Regulator

SI4800

dGPU

1

2

5

BIF_VDDC

+3.3VSG

+1.0VSG

+1.8VSG

PX_mode

+1.5V

BACO Switch

SI4800

+B

Regulator

3

4

+1.5VSG

+VGA_CORE

PWRGOOD

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

dGPU Block Diagram

LA-7091P

4 48Tuesday, October 19, 2010

1

0.1

5

+1.8VS

D D

R399 1K_0402_5%R399 1K_0402_5%

1 2

R400 1K_0402_5%R400 1K_0402_5%

1 2

R142 300_0402_5%

R142 300_0402_5% R401 300_0402_5%R401 300_0402_5% R402 510_0402_1%R402 510_0402_1% R141 1K_0402_5%R141 1K_0402_5%

+3VS

R410 1K_0402_5%R410 1K_0402_5%

R411 1K_0402_5%R411 1K_0402_5%

R143 1K_0402_5%R143 1K_0402_5%

R414 1K_0402_5%R414 1K_0402_5%

12

12 1 2 1 2

C237 0.01U_0402_25V7K

@

1 2

C238 0.01U_0402_25V7K

@

1 2

APU_SVC APU_SVD APU_RST# APU_PWRGD TEST_25_L TEST36

APU_RST#

APU_PWRGD

APU_PROCHOT#

APU_ALERT#_R

APU_SIC

APU_SID

U22 UMA O@U22 UMA O@

ZACATE 2M151132B1240 1.5G BGA 413P

pull-up to 3.3V or 1.5V?

C C

EC_THERM#<31>

FCH_PROCHOT#<13>

+3VS

12

R424

R424 10K_0402_5%

10K_0402_5%

B B

APU_THERMTRIP#

If FCH internal pull-up disabl ed, level-shift er could be del eted. Need BIOS to di sable internal pull-up!!

R425

1K_0402_5%

B

2

1 2

Q79

E

3 1

C

MMBT3904_NL_SOT23-3

1 2

R427 0_0402_5%@R427 0_0402_5%@

H_THERMTRIP# < 14>

CPU TSI interface level shift

@

C236 0.1U_0402_10V7K

@

R428

1 2

+3VS

31.6K_0402_1%

A A

1 2

@

R160

1 2

30K_0402_1%

G

2

EC_SMB_DAAPU_SID

13

D

S

D

S

@

Q22

BSH111 1N_SOT23-3

1 2

R431 0_0402_5%R431 0_0402_5%

G

2

EC_SMB_CKAPU_SIC

13

D

S

D

S

@

Q23

BSH111 1N_SOT23-3

1 2

R434 0_0402_5%R434 0_0402_5%

5

BSH111, the Vgs is: min = 0.4V Typ = 1.0V Max = 1.3V

1.607V for Gate

@

1 2

R429 0_0402_5%

1 2

R430 0_0402_5%R430 0_0402_5%

@

1 2

R432 0_0402_5%

1 2

R433 0_0402_5%R433 0_0402_5%

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

If use level sh ift, EC_SMB nee d pull up (pop R747 & R74 8)

FCH_SID

EC_SMB_DA2

FCH_SIC

EC_SMB_CK2

4

APU_CLKP<13> APU_CLKN<13>

APU_DISP_CLKP<13> APU_DISP_CLKN<13>

APU_SVC<46>

APU_SVD<46>

APU_RST#<13> APU_PWRGD<13>

R169 0_0402_5%R169 0_0402_5%

1 2

R168 0_0402_5%@R168 0_0402_5%@

1 2

APU_VDDNB_RUN_FB_ H<46>

APU_VDD0_RUN_FB_H<46>

APU_VDD0_RUN_FB_L<46>

FCH_SID <14>

EC_SMB_DA2 <19,31>

FCH_SIC <14>

EC_SMB_CK2 <19,31>

4

APU_HDMI_CLKP<11>

T93PADT93PAD T94PADT94PAD

Close to APU

T0 FCH

TO EC

T0 FCH

TO EC

3

U22B

APU_SIC APU_SID

A8

TDP1_TXP0

B8

TDP1_TXN0

B9

TDP1_TXP1

A9

TDP1_TXN1

D10

TDP1_TXP2

C10

TDP1_TXN2

A10

TDP1_TXP3

B10

TDP1_TXN3

B5

LTDP0_TXP0

A5

LTDP0_TXN0

D6

LTDP0_TXP1

C6

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

D8

LTDP0_TXP3

C8

LTDP0_TXN3

V2

CLKIN_H

V1

CLKIN_L

D2

DISP_CLKIN_H

D1

DISP_CLKIN_L

J1

SVC

J2

SVD

P3

SIC

P4

SID

T3

RESET_L

T4

PWROK

U1

PROCHOT_L

U2

THERMTRIP_L

T2

ALERT_L

N2

TDI

N1

TDO

P1

TCK

P2

TMS

M4

TRST_L

M3

DBRDY

M1

DBREQ_L

F4

VDDCR_NB_SENSE

G1

VDDCR_CPU_SENSE

F3

VDDIO_MEM_S_SENSE

F1

VSS_SENSE

B4

RSVD_1

W11

RSVD_2

V5

RSVD_3

VGA@

DP_DIGON

DP_VARY_BL

DP MISC

TDP1_AUXP

VGA DAC

TEST

TDP1_AUXN

TDP1_HPD

LTDP0_AUXP LTDP0_AUXN

LTDP0_HPD

DAC_REDB

DAC_GREEN

DAC_GREENB

DAC_BLUE

DAC_BLUEB

DAC_HSYNC DAC_VSYNC

DAC_ZVSS

DMAACTIVE_L

DISPLAYPORT 1

DISPLAYPORT 0

CLK

SER

JTAG CTRL

ZACATE 2M161232B2240 1.6G BGA 413P

DP_ZVSS

DP_BLON

DAC_RED

DAC_SCL DAC_SDA

TEST4 TEST5

TEST6 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19

TEST25_H

TEST25_L

TEST28_H

TEST28_L

TEST31

TEST33_H

TEST33_L

TEST34_H

TEST34_L

TEST35 TEST36 TEST37

TEST38

APU_HDMI_TX2P<11>

APU_HDMI_TX2N<11>

APU_HDMI_TX1P<11>

APU_HDMI_TX1N<11>

APU_HDMI_TX0P<11>

APU_HDMI_TX0N<11>

APU_HDMI_CLKN<11>

APU_TXOUT2+<10> APU_TXOUT2-<10>

APU_TXOUT1+<10> APU_TXOUT1-<10>

APU_TXOUT0+<10> APU_TXOUT0-<10>

APU_TXCLK+<10> APU_TXCLK-<10>

APU_PROCHOT# APU_THERMTRIP# APU_ALERT#_R

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

T77PADT77PAD

R398 150_0402_1%R398 150_0402_1%

H3

G2 H2 H1

APU_HDMI_CLK

B2

APU_HDMI_DATA

C2

C1

APU_LCD_CLK

A3

APU_LCD_DATA

B3

R406 100K_0402_5%R406 100K_0402_5%

D3

C12 D13 A12 B12 A13 B13

E1 E2

F2 D4

D12

R1 R2 R6 T5

TEST15

E4 K4 L1

TEST18

L2

TEST19

M2

TEST25_H

K1

TEST_25_L

K2 L5 M5

TEST31

M21

TEST33_H

J18

TEST33_L

J19 U15 T15

TEST35

H4

TEST36

N5

TEST37

R5

K3 T1

2

1 2

R407 150_0402_1%R407 150_0402_1%

1 2

R408 150_0402_1%R408 150_0402_1%

1 2

R409 150_0402_1%R409 150_0402_1%

1 2

R144 499_0402_1%R144 499_0402_1%

1 2

T66

PAD

T67

PAD

T68

PAD

Delete Test point for layout limitation 20100917

T73

PAD

Delete Test point for layout limitation 20100917

T76

PAD

R423 1K_0402_5%R423 1K_0402_5%

1 2

@

R415 1K_0402_5%

1 2

R416 1K_0402_5%R416 1K_0402_5%

1 2

R417 1K_0402_5%R417 1K_0402_5%

1 2

R418 510_0402_1%R418 510_0402_1%

1 2

C516 0.1U_0402_16V4ZC516 0.1U_0402_16V4Z

1 2

C517 0.1U_0402_16V4ZC517 0.1U_0402_16V4Z

1 2

R422 1K_0402_5%@R422 1K_0402_5%@

1 2

R958 1K_0402_5%R958 1K_0402_5%

1 2

APU_ENBKL <10> APU_ENVDD <10> APU_BLPWM <10>

APU_HDMI_CLK <11>

APU_HDMI_DATA <11>

APU_HDMI_HPD <11>

APU_LCD_CLK <10> APU_LCD_DATA <10>

APU_CRT_R <12>

APU_CRT_G <12>

APU_CRT_B <12>

APU_CRT_HSYNC <12> APU_CRT_VSYNC <12>

APU_CRT_DDC_SCL <12> APU_CRT_DDC_SDA <12>

R420 51_0402_1%R420 51_0402_1%

1 2

R421 51_0402_1%R421 51_0402_1%

1 2

+1.8VS

ALLOW_STOP# <13>

+1.8VS

1

AMD Debug

+1.8VS +1.8VS

R842

1K_0402_5%

1 2

APU_TRST#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

0_0402_5%

R846

R847 10K_0402_5%R847 10K_0402_5%

R176 10K_0402_5%R176 10K_0402_5%

R177 10K_0402_5%R177 10K_0402_5%

APU_TRST#_R

1 2

12

Compal Secret Data

Deciphered Date

JHDT1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

SAMTE_ASP-136446-07-B

CONN@

2

APU_TCK

2

APU_TMS

4

APU_TDI

6

APU_TDO

8

APU_PWRGD

10

APU_RST#

12

APU_DBRDY

14

APU_DBREQ#

16

J108_PLLTST0

18

J108_PLLTST1

20

R843 1K_0402_5%R843 1K_0402_5%

R840 1K_0402_5%R840 1K_0402_5%

R798 1K_0402_5%R798 1K_0402_5%

R178 300_0402_5%R178 300_0402_5%

R799 0_0402_5%R799 0_0402_5%

R863 0_0402_5%R863 0_0402_5%

12

1 2

+1.8VS

TEST19

TEST18

Please be noted about TEST_18 and TEST_19

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FT1 CTRL/DP/CRT

LA-7091P

5 48Tuesday, December 07, 2010

1

0.1

5

U22E

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3

D D

C C

B B

DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS0<8,9> DDR_A_BS1<8,9> DDR_A_BS2<8,9>

DDR_A_DQS0<8,9>

DDR_A_DQS#0<8, 9>

DDR_A_DQS1<8,9>

DDR_A_DQS#1<8, 9>

DDR_A_DQS2<8,9>

DDR_A_DQS#2<8, 9>

DDR_A_DQS3<8,9>

DDR_A_DQS#3<8, 9>

DDR_A_DQS4<8,9>

DDR_A_DQS#4<8, 9>

DDR_A_DQS5<8,9>

DDR_A_DQS#5<8, 9>

DDR_A_DQS6<8,9>

DDR_A_DQS#6<8, 9>

DDR_A_DQS7<8,9>

DDR_A_DQS#7<8, 9>

DDR_A_CLK0<8> DDR_A_CLK#0<8> DDR_A_CLK1<8> DDR_A_CLK#1<8> DDR_B_CLK2<9> DDR_B_CLK#2<9> DDR_B_CLK3<9> DDR_B_CLK#3<9>

DDR_RST#<8,9>

DDR_EVENT#<8,9>

DDR_CKE0<8,9> DDR_CKE1<8,9>

DDR_A_ODT0<8> DDR_A_ODT1<8> DDR_B_ODT0<9> DDR_B_ODT1<9>

DDR_CS0_DIMMA#<8> DDR_CS1_DIMMA#<8> DDR_CS0_DIMMB#<9> DDR_CS1_DIMMB#<9>

DDR_A_RAS#<8,9> DDR_A_CAS#<8,9> DDR_A_WE#<8,9>

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_CKE1

DDR_A_ODT0 DDR_A_ODT1 DDR_B_ODT0 DDR_B_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB# DDR_CS1_DIMMB#

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

U22E

R17 H19 J17 H18 H17

G17

H15

G18

F19 E19 T19 F17 E18

W17

E16

G15

R18 T18 F16

D15 B19 D21 H22 P23

V23 AB20 AA16

DDR_A_DQS0

A16

DDR_A_DQS#0

B16

DDR_A_DQS1

B20

DDR_A_DQS#1

A20

DDR_A_DQS2

E23

DDR_A_DQS#2

E22

DDR_A_DQS3

J22

DDR_A_DQS#3

J23

DDR_A_DQS4

R22

DDR_A_DQS#4

P22

DDR_A_DQS5

W22

DDR_A_DQS#5

V22

DDR_A_DQS6

AC20

DDR_A_DQS#6

AC21

DDR_A_DQS7

AB16

DDR_A_DQS#7

AC16

DDR_A_CLK0

M17

DDR_A_CLK#0

M16

DDR_A_CLK1

M19

DDR_A_CLK#1

M18

DDR_B_CLK2

N18

DDR_B_CLK#2

N19

DDR_B_CLK3

L18

DDR_B_CLK#3

L17

DDR_RST#

L23

DDR_EVENT#

N17

DDR_CKE0

F15

E15

W19

V15

U19

W15

T17

W16

U17

V16

U18

V19

V17

ONTARIO-2M161000-1.6G_BGA413

VGA@

M_ADD0 M_ADD1 M_ADD2 M_ADD3 M_ADD4 M_ADD5 M_ADD6 M_ADD7 M_ADD8 M_ADD9 M_ADD10 M_ADD11 M_ADD12 M_ADD13 M_ADD14 M_ADD15

M_BANK0 M_BANK1 M_BANK2

M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7

M_DQS_H0 M_DQS_L0 M_DQS_H1 M_DQS_L1 M_DQS_H2 M_DQS_L2 M_DQS_H3 M_DQS_L3 M_DQS_H4 M_DQS_L4 M_DQS_H5 M_DQS_L5 M_DQS_H6 M_DQS_L6 M_DQS_H7 M_DQS_L7

M_CLK_H0 M_CLK_L0 M_CLK_H1 M_CLK_L1 M_CLK_H2 M_CLK_L2 M_CLK_H3 M_CLK_L3

M_RESET_L M_EVENT_L

M_CKE0 M_CKE1

M0_ODT0 M0_ODT1 M1_ODT0 M1_ODT1

M0_CS_L0 M0_CS_L1 M1_CS_L0 M1_CS_L1

M_RAS_L M_CAS_L M_WE_L

DDR SYSTEM MEMORY

4

M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7

M_DATA8

M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15

M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23

M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31

M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39

M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47

M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55

M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63

M_VREF

M_ZVDDIO_MEM_S

B14 A15 A17 D18 A14 C14 C16 D16

C18 A19 B21 D20 A18 B18 A21 C20

C23 D23 F23 F22 C22 D22 F20 F21

H21 H23 K22 K21 G23 H20 K20 K23

N23 P21 T20 T23 M20 P20 R23 T22

V20 V21 Y23 Y22 T21 U23 W23 Y21

Y20 AB22 AC19 AA18 AA23 AA20 AB19 Y18

AC17 Y16 AB14 AC14 AC18 AB18 AB15 AC15

M23

M22

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7

DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23

DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39

DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55

DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

+MEM_VREF

R437

39.2_0402_1%

12

15 mils

3

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

PCIE_GTX_C_FRX_P0<18> PCIE_GTX_C_FRX_N0<18>

PCIE_GTX_C_FRX_P1<18> PCIE_GTX_C_FRX_N1<18>

PCIE_GTX_C_FRX_P2<18> PCIE_GTX_C_FRX_N2<18>

PCIE_GTX_C_FRX_P3<18> PCIE_GTX_C_FRX_N3<18>

+1.05VS

Less than 1"

UMI_RX0P<13> UMI_RX0N<13>

UMI_RX1P<13> UMI_RX1N<13>

UMI_RX2P<13> UMI_RX2N<13>

UMI_RX3P<13> UMI_RX3N<13>

+1.5V

1 2

R435 2K_0402_1%R435 2K_0402_1%

DDR_A_D[0..63] <8,9>

DDR_A_MA[0..15] <8,9>

DDR_A_DM[0..7] <8,9>

PCIE_GTX_C_FRX_P0 PCIE_GTX_C_FRX_N0

PCIE_GTX_C_FRX_N1

PCIE_GTX_C_FRX_P2 PCIE_GTX_C_FRX_N2

PCIE_GTX_C_FRX_P3 PCIE_GTX_C_FRX_N3

P_ZVDD_10

U22A

AA6

P_GPP_RXP0

Y6

P_GPP_RXN0

AB4

P_GPP_RXP1

AC4

P_GPP_RXN1

AA1

P_GPP_RXP2

AA2

P_GPP_RXN2

Y4

P_GPP_RXP3

Y3

P_GPP_RXN3

Y14

P_ZVDD_10

AA12

P_UMI_RXP0

Y12

P_UMI_RXN0

AA10

P_UMI_RXP1

Y10

P_UMI_RXN1

AB10

P_UMI_RXP2

AC10

P_UMI_RXN2

AC7

P_UMI_RXP3

AB7

P_UMI_RXN3

ONTARIO-2M161000-1.6G_BGA413

VGA@

PCIE I/F

UMI I/F

P_GPP_TXP0 P_GPP_TXN0

P_GPP_TXP1 P_GPP_TXN1

P_GPP_TXP2 P_GPP_TXN2

P_GPP_TXP3 P_GPP_TXN3

P_ZVSS

P_UMI_TXP0 P_UMI_TXN0

P_UMI_TXP1 P_UMI_TXN1

P_UMI_TXP2 P_UMI_TXN2

P_UMI_TXP3 P_UMI_TXN3

PCIE_FTX_GRX_P0

AB6

PCIE_FTX_GRX_N0

AC6

PCIE_FTX_GRX_P1PCIE_GTX_C_FRX_P1

AB3

PCIE_FTX_GRX_N1

AC3

PCIE_FTX_GRX_P2

Y1

PCIE_FTX_GRX_N2

Y2

PCIE_FTX_GRX_P3

V3

PCIE_FTX_GRX_N3

V4

P_ZVSS

AA14

AB12 AC12

AC11 AB11

AA8 Y8

AB8 AC8

2

C518 0.1U_0402_16V7KVGA@C518 0.1U_0402_16V7KVGA@ C519 0.1U_0402_16V7KVGA@C519 0.1U_0402_16V7KVGA@

C520 0.1U_0402_16V7KVGA@C520 0.1U_0402_16V7KVGA@ C521 0.1U_0402_16V7KVGA@C521 0.1U_0402_16V7KVGA@

C522 0.1U_0402_16V7KVGA@C522 0.1U_0402_16V7KVGA@ C523 0.1U_0402_16V7KVGA@C523 0.1U_0402_16V7KVGA@

C524 0.1U_0402_16V7KVGA@C524 0.1U_0402_16V7KVGA@ C525 0.1U_0402_16V7KVGA@C525 0.1U_0402_16V7KVGA@

R436 1.27K_0402_1%R436 1.27K_0402_1%

Less than 1"

UMI_TX0P_C

C526 0.1U_0402_16V7KC526 0.1U_0402_16V7K

UMI_TX0N_C

C527 0.1U_0402_16V7KC527 0.1U_0402_16V7K

UMI_TX1P_C

C528 0.1U_0402_16V7KC528 0.1U_0402_16V7K

UMI_TX1N_C

C529 0.1U_0402_16V7KC529 0.1U_0402_16V7K

UMI_TX2P_C

C530 0.1U_0402_16V7KC530 0.1U_0402_16V7K

UMI_TX2N_C

C531 0.1U_0402_16V7KC531 0.1U_0402_16V7K

UMI_TX3P_C

C532 0.1U_0402_16V7KC532 0.1U_0402_16V7K

UMI_TX3N_C

C533 0.1U_0402_16V7KC533 0.1U_0402_16V7K

1 2 1 2

1 2

1 2 1 2

PCIE_FTX_C_GRX_P0 <18> PCIE_FTX_C_GRX_N0 <18>

PCIE_FTX_C_GRX_P1 <18> PCIE_FTX_C_GRX_N1 <18>

PCIE_FTX_C_GRX_P2 <18> PCIE_FTX_C_GRX_N2 <18>

PCIE_FTX_C_GRX_P3 <18> PCIE_FTX_C_GRX_N3 <18>

UMI_TX0P <13> UMI_TX0N <13>

UMI_TX1P <13> UMI_TX1N <13>

UMI_TX2P <13> UMI_TX2N <13>

UMI_TX3P <13> UMI_TX3N <13>

1

+1.5V

1K_0402_5%

DDR_EVENT#

R149

A A

1 2

5

R438

1K_0402_1%

R439

1K_0402_1%

1 2

1

C534

1000P_0402_50V7K

2

1 2

Place within 1000 mils to APU 20100526

4

C535

+MEM_VREF

1

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

FT1 DDRIII/UMI/PCIE

LA-7091P

1

6 48Tuesday, December 07, 2010

0.1

5

4

3

2

1

+APU_CORE

U22C

1

C543

10U_0603_6.3V6M

2

1

C563

0.1U_0402_16V7K

2

1

C579

10U_0603_6.3V6M

2

1

C586

1U_0402_6.3V6K

2

1

2

1

2

1

2

C620

@

1

C536

2

10U_0603_6.3V6M

1

C551

2

1U_0402_6.3V6K

1

C560

0.1U_0402_16V7K

2

1

C576

10U_0603_6.3V6M

2

1

C583

1U_0402_6.3V6K

2

1

C592

0.1U_0402_16V7K

2

1

2

1

C539

10U_0603_6.3V6M

2

D D

1

C550

1U_0402_6.3V6K

2

1

C559

0.1U_0402_16V7K

2

+APU_CORE_NB

C575

C C

10U_0603_6.3V6M

C582

1U_0402_6.3V6K

C591

0.1U_0402_16V7K

POWER

B B

10U_0603_6.3V6M

C541

10U_0603_6.3V6M

C552

1U_0402_6.3V6K

C561

0.1U_0402_16V7K

C577

10U_0603_6.3V6M

C584

1U_0402_6.3V6K

C593

0.1U_0402_16V7K

+1.05VS

1

+

C621

@

390U_2.5V_10M

2

1

2

1

2

1

2

1

2

1

2

1

2

1

C542

2

10U_0603_6.3V6M

1

C553

1U_0402_6.3V6K

2

1

C562

0.1U_0402_16V7K

2

1

C578

10U_0603_6.3V6M

2

1

C585

1U_0402_6.3V6K

2

1

C594

0.1U_0402_16V7K

2

1

C544

2

10U_0603_6.3V6M

1

C554

180P_0402_50V8J

2

C587

180P_0402_50V8J

1

2

1

C540

10U_0603_6.3V6M

2

1

C555

180P_0402_50V8J

2

1

C588

180P_0402_50V8J

2

+APU_CORE

+APU_CORE_NB

+1.5V

C589

10U_0603_6.3V6M

C595

1U_0402_6.3V6K

C599

0.1U_0402_16V7K

Change Cap. H4.4 ESR17

+APU_CORE

1

+

C607

330U_D2E_2.5VM_R9M

2

1

+

C618

330U_D2_2.5VY_R9M

2

1

390U_2.5V_10M

+

C1104

2

Near CPU Socket

1

C619

10U_0603_6.3V6M

2

C1105

390U_2.5V_10M

1

330U_D2E_2.5VM_R9M

+

C605

C606

2

+APU_CORE_NB

1

+

C617

330U_2.5V_M

2

C606

330U_D2E_2.5VM_R9M

A A

Near CPU Socket

1

+

2

POWER

10U_0603_6.3V6M

1

C616

@

2

+1.5V

1

+

C622

330U_D2E_2.5VM_R9M

2

Near CPU Socket

+1.5V

POWER

1

C623

22U_0805_6.3V6M

2

(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)

(S ELE CAP 330U 6.3V M 6.3X5.9 LESR15M VU)*1=(SF000002000)

5

20100813

4

U22C

E5

VDDCR_CPU_1

E6

VDDCR_CPU_2

F5

VDDCR_CPU_3

F7

VDDCR_CPU_4

G6

VDDCR_CPU_5

G8

VDDCR_CPU_6

H5

VDDCR_CPU_7

H7

VDDCR_CPU_8

J6

VDDCR_CPU_9

J8

VDDCR_CPU_10

L7

VDDCR_CPU_11

M6

VDDCR_CPU_12

M8

VDDCR_CPU_13

N7

VDDCR_CPU_14

R8

VDDCR_CPU_15

E8

VDDCR_NB_1

E11

VDDCR_NB_2

E13

VDDCR_NB_3

F9

VDDCR_NB_4

F12

VDDCR_NB_5

G11

VDDCR_NB_6

G13

VDDCR_NB_7

H9

VDDCR_NB_8

H12

VDDCR_NB_9

K11

VDDCR_NB_10

K13

VDDCR_NB_11

L10

VDDCR_NB_12

L12

VDDCR_NB_13

L14

VDDCR_NB_14

M11

VDDCR_NB_15

M12

VDDCR_NB_16

M13

VDDCR_NB_17

N10

VDDCR_NB_18

N12

VDDCR_NB_19

N14

VDDCR_NB_20

P11

VDDCR_NB_21

P13

VDDCR_NB_22

G16

VDDIO_MEM_S_1

G19

VDDIO_MEM_S_2

E17

VDDIO_MEM_S_3

J16

VDDIO_MEM_S_4

L16

VDDIO_MEM_S_5

L19

VDDIO_MEM_S_6

N16

VDDIO_MEM_S_7

R16

VDDIO_MEM_S_8

R19

VDDIO_MEM_S_9

W18

VDDIO_MEM_S_10

U16

VDDIO_MEM_S_11

ONTARIO-2M161000-1.6G_BGA413

VGA@

1

2

1

2

1

2

C101

0.1U_0402_16V7K

1

C590

10U_0603_6.3V6M

2

1

C596

1U_0402_6.3V6K

2

1

C600

0.1U_0402_16V7K

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

2

C102

0.1U_0402_16V7K

1

+1.8VS

C624

330U_6.3V_M

GPU AND NB CORE

DDR3

1

C597

1U_0402_6.3V6K

2

1

C601

0.1U_0402_16V7K

2

1

+

C625

@

10U_0603_6.3V6M

2

TSense/PLL/DP/PCIE/IO

CPU CORE

DAC

POWER

PCIE/IO/DDR3 Phy

1

2

POWER

1

2

Near CPU Socket

VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4 VDD_18_5 VDD_18_6 VDD_18_7

VDD_18_DAC

DIS PLL

VDDPL_10

VDD_10_1 VDD_10_2 VDD_10_3 VDD_10_4

DP Phy/IO

VDD_33

1

C598

1U_0402_6.3V6K

2

1

C602

180P_0402_50V8J

2

C103

C103 180P_0402_50V8J

180P_0402_50V8J

+VDD_18

U8 W8 U6 U9 W6 T7 V7

W9

U11

U13 W13 V12 T12

A4

C603

1

2

3

1

C545

2

+VDD_18_DAC

1

C556

2

+VDDL_10

1

C564

2

+VDD_10

1

C568

2

1

C580

2

1

180P_0402_50V8J

2

C104

C104 180P_0402_50V8J

180P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1

C537

2

180P_0402_50V8J

1

C557

2

180P_0402_50V8J

1

C565

2

180P_0402_50V8J

1

C569

2

180P_0402_50V8J

1

C581

2

0.1U_0402_16V7K

1

C546

C538

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C678

C558

2

10U_0603_6.3V6M

1U_0402_6.3V6K

1

C567

C566

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C571

C570

2

0.1U_0402_16V7K

+3VS

1U_0402_6.3V6K

2010/08/04 2010/08/04

1

C547

2

1U_0402_6.3V6K

FOR HW3

1

C684

@

2

10U_0603_6.3V6M

1

C572

2

1U_0402_6.3V6K

Power Cap. Summ ary

APU

*S POLY C 330U 2.5V M D2E TPE LESR9M H1.8 --->+APU_CORE(Qty : 3)

*S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->+APU_CORE_NB(Qty : 1)

*S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->1.05VS(Qty : 1)

*S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->+1.5V(Qty : 1)

*S ELE CAP 330U 6.3V M 6.3X5.9 LESR15M VU --->+1.8VS(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+APU_CORE(Qty : 2) Reverse

S_A-P_CAP 330U 2.5V M 6.3X4.2 R17M VLPS --->+APU_CORE_NB(Qty : 1) Reverse +1.5V(Qty : 1) Reverse

DDR3

S POLY C 330U 2V M X LESR6M SX H1.9 --->1.5V(Qty : 1) Reserve

FCH

*S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->1.1VS(Qty : 1)

GPU

*S POLY C 330U 2V M X LESR6M SX H1.9 --->VGA_CORE(Qty : 1)

*S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+VGA_CORE(Qty : 1)

S POLY C 330U 2V M X LESR6M SX H1.9 --->VGA_CORE(Qty : 1) Reserve

*S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.5VSG(Qty : 1)

USB

*S_A-P_CAP 220U 6.3V M C45 R17M SVPE H4.4 --->+USB_VCCA(Qty : 1)

1

C548

C549

2

1U_0402_6.3V6K

L30

FBMA-L11-201209-221LMA30T_0805

Change from SM010014520 to SD002000080 20100816

10U_0603_6.3V6M

FBMA-L11-201209-221LMA30T_0805

1

C573

C574

2

1U_0402_6.3V6K

10U_0603_6.3V6M

Compal Secret Data

Deciphered Date

+1.8VS

L29

12

FBMA-L11-201209-221LMA30T_0805

Change from SM010014520 to SD002000080 20100816

10U_0603_6.3V6M

+1.8VS

12

+1.05VS

L31

12

L32

12

FBMA-L11-201209-221LMA30T_0805

Change from SM010014520 to SD002000080 20100816

10U_0603_6.3V6M

By case (Along split)

2

+1.5V

0.1U_0402_16V7K

U22D

A7

VSS_1

B7

VSS_2

B11

VSS_3

B17

VSS_4

B22

VSS_5

C4

VSS_6

D5

VSS_7

D7

VSS_8

D9

VSS_9

D11

VSS_10

D14

VSS_11

B15

VSS_12

D17

VSS_13

D19

VSS_14

E7

VSS_15

E9

VSS_16

E12

VSS_17

E20

VSS_18

F8

VSS_19

F11

VSS_20

F13

VSS_21

G4

VSS_22

G5

VSS_23

G7

VSS_24

G9

VSS_25

G12

VSS_26

G20

VSS_27

G22

VSS_28

H6

VSS_29

H11

VSS_30

H13

VSS_31

J4

VSS_32

J5

VSS_33

J7

VSS_34

J20

VSS_35

K10

VSS_36

K14

VSS_37

L4

VSS_38

L6

VSS_39

L8

VSS_40

L11

VSS_41

L13

VSS_42

L20

VSS_43

L22

VSS_44

M7

VSS_45

N4

VSS_46

N6

VSS_47

N8

VSS_48

N11

VSS_49

ONTARIO-2M161000-1.6G_BGA413

VGA@

GND

VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97

VSSBG_DAC

N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11

Change as OS_CON Cap. next phase

1

C609

C608

2

0.1U_0402_16V7K

1

C611

C610

2

0.1U_0402_16V7K

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

P07-FT1 PWR/VSS

1

C612

2

180P_0402_50V8J

LA-7091P

1

C613

2

180P_0402_50V8J

1

C615

C614

2

180P_0402_50V8J

0.1

7 48Wednesday, November 03, 2010

0.1

5

4

3

2

1

+1.5V

JDIMM1

+VREF_DQ

1

C627

C626

D D

C C

B B

0.1U_0402_16V4Z

+3VS

C626

2

DDR_A_DQS#1<6, 9> DDR_A_DQS1<6,9>

DDR_A_DQS#2<6, 9> DDR_A_DQS2<6,9>

DDR_A_WE#<6,9>

DDR_CS1_DIMMA#<6>

DDR_A_DQS#4<6, 9> DDR_A_DQS4<6,9>

DDR_A_DQS#6<6, 9> DDR_A_DQS6<6,9>

1

C646

2.2U_0603_6.3V4Z

2

1000P_0402_50V7K

DDR_CKE0<6,9>

DDR_A_BS2<6,9>

DDR_A_CLK0<6> DDR_A_CLK#0<6>

DDR_A_BS0<6,9>

DDR_A_CAS#<6, 9>

C647

0.1U_0402_16V4Z

DDR_A_D0 DDR_A_D1

1

DDR_A_DM0

2

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

1 2

R150 10K_0402_5%R150 10K_0402_5%

1

2

12

R151

10K_0402_5%

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U8SN-7F

CONN@

VREF_CA

EVENT#

VSS3

DQS0 VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

VTT2

+1.5V

2

DDR_A_D4

4

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

G2

DDR_A_D5

6 8 10 12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28 30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60 62 64 66

DDR_A_D30

68

DDR_A_D31

70 72

74 76

DDR_A_MA15

78

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86 88

DDR_A_MA6

90

DDR_A_MA4

92 94

DDR_A_MA2

96

DDR_A_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128

DDR_A_D36

130

DDR_A_D37

132 134

DDR_A_DM4

136 138

DDR_A_D38

140

DDR_A_D39

142 144

DDR_A_D44

146

DDR_A_D45

148 150 152 154 156

DDR_A_D46

158

DDR_A_D47

160 162

DDR_A_D52

164

DDR_A_D53

166 168

DDR_A_DM6

170 172

DDR_A_D54

174

DDR_A_D55

176 178

DDR_A_D60

180

DDR_A_D61

182 184 186 188 190

DDR_A_D62

192

DDR_A_D63

194 196 198 200 202 204

206

+0.75VS

DDR3 SO-DIMM A H:8mm Standard Type P/N:SP07000HA00 F/P:FOX_AS0A626-U8SN-7F_204P

DDR_A_DQS#0 <6,9> DDR_A_DQS0 <6,9>

DDR_RST# <6,9>

DDR_A_DQS#3 <6,9> DDR_A_DQS3 <6,9>

DDR_CKE1 <6,9>

DDR_A_CLK1 <6> DDR_A_CLK#1 <6>

DDR_A_BS1 <6,9> DDR_A_RAS# <6,9>

DDR_CS0_DIMMA# <6> DDR_A_ODT0 <6>

DDR_A_ODT1 <6>

1

C645

1000P_0402_50V7K

2

DDR_A_DQS#5 <6,9> DDR_A_DQS5 <6,9>

DDR_A_DQS#7 <6,9> DDR_A_DQS7 <6,9>

DDR_EVENT# <6,9>

FCH_SMDAT0 <9, 14,29> FCH_SMCLK0 <9,14,29>

1

C644

0.1U_0402_16V4Z

2

+VREF_CA

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

+1.5V

2

C628

1

0.1U_0402_16V4Z

2

C629

1

DDR_A_D[0..63] <6,9>

DDR_A_MA[0..15] <6,9>

DDR_A_DM[0..7] <6,9>

0.1U_0402_16V4Z

2

C630

1

0.1U_0402_16V4Z

Place near JDIMM1

0.1U_0402_16V4Z

C631

0.1U_0402_16V4Z

2

C632

1

0.1U_0402_16V4Z

2

C633

1

0.1U_0402_16V4Z

2

1

CRB 0.1u X1 4. 7u X1

+0.75VS

C640

@

2

C641

0.1U_0402_16V4Z

1

2

1

C642

4.7U_0603_6.3V6K

2

+1.5V

R145

R145 1K_0402_1%

2

C635

1

1K_0402_1%

1 2

R147

R147 1K_0402_1%

1K_0402_1%

1 2

2

C636

1

0.1U_0402_16V4Z

2

1

15mil 15mil

+VREF_DQ

0.1U_0402_16V4Z

2

C634

1

CRB 100U X2

+1.5V

1

+

C1102

C1102 330U_X_2VM_R6M

330U_X_2VM_R6M

2

330U ESR:6m H:2 P/N:SGA00001Q80

+VREF_CA

C637

0.1U_0402_16V4Z

2

C638

1

+1.5V

R146

R146 1K_0402_1%

1K_0402_1%

1 2

R148

R148 1K_0402_1%

1K_0402_1%

1 2

0.1U_0402_16V4Z

2

C110

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

DDR3 SODIMM-I Socket

LA-7091P

1

8 48Tuesday, December 07, 2010

0.1

5

4

3

2

1

+1.5V

JDIMM2

11 13 15 17 19 21 23 25 27

33 35

39 41

45 47 49 51 53 55 57 59

63

67 69

73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

1 2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26

CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

FOX_AS0A626-U4SN-7F

CONN@

VSS3

DQS#0

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5 VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7 VSS50

DQ62

DQ63 VSS52

EVENT#

+VREF_DQ

1

C681

2

DDR_A_DQS#1<6,8> DDR_A_DQS1<6,8>

DDR_A_DQS#2<6,8> DDR_A_DQS2<6,8>

DDR_A_BS2<6,8>

DDR_B_CLK2<6> DDR_B_CLK#2<6>

DDR_A_BS0<6,8>

DDR_A_CAS#<6,8>

DDR_A_DQS#4<6,8> DDR_A_DQS4<6,8>

DDR_A_DQS#6<6,8> DDR_A_DQS6<6,8>

1 2 1 2

C681

1000P_0402_50V7K

DDR_CKE0<6,8>

DDR_A_WE#<6,8>

C667

1

2

C680

0.1U_0402_16V4Z

D D

C C

B B

A A

0.1U_0402_16V4Z

DDR_CS1_DIMMB#<6>

For DRAM strap pin reservation 20100817

R961 10K_0402_5%R961 10K_0402_5%

+3VS

R153 10K_0402_5%@R153 10K_0402_5%@

2.2U_0603_6.3V4Z

CRB only one 4.7k

5

1

2

1

C668

0.1U_0402_16V4Z

2

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48

DDR_A_D49

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

@

1 2

R154

10K_0402_5%

R962

10K_0402_5%

For DRAM strap pin reservation 20100817

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA SCL

VTT2

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8 10 12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28 30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60 62 64 66

DDR_A_D30

68

DDR_A_D31

70 72

74 76

DDR_A_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

4

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86 88

DDR_A_MA6

90

DDR_A_MA4

92 94

DDR_A_MA2

96

DDR_A_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_D62 DDR_A_D63

+0.75VS

DDR_A_DQS#0 <6,8> DDR_A_DQS0 <6,8>

DDR_RST# <6,8>

DDR_A_DQS#3 <6,8> DDR_A_DQS3 <6,8>

DDR_CKE1 <6,8>

DDR_B_CLK3 <6> DDR_B_CLK#3 <6>

DDR_A_BS1 <6,8> DDR_A_RAS# <6,8>

DDR_CS0_DIMMB# <6> DDR_B_ODT0 <6>

DDR_B_ODT1 <6>

C665

0.1U_0402_16V4Z

DDR_A_DQS#5 <6,8> DDR_A_DQS5 <6,8>

DDR_A_DQS#7 <6,8> DDR_A_DQS7 <6,8>

DDR_EVENT# <6,8>

FCH_SMDAT0 <8,14,29> FCH_SMCLK0 <8,14,29>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VREF_CA

1

2

1

C666

1000P_0402_50V7K

2

DDR3 SO-DIMM B H:4mm Standard Type P/N:SP07000H800 F/P:FOX_AS0A626-U4SN-7F_204P

Issued Date

3

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DM[0..7]

+1.5V

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2010/08/04 2010/08/04

C44

C45

1

0.1U_0402_16V4Z

Compal Secret Data

DDR_A_D[0..63] <6,8>

0.1U_0402_16V4Z

2

C652

1

Deciphered Date

DDR_A_MA[0..15] <6,8>

DDR_A_DM[0..7] <6,8>

2

C653

C654

1

C654

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

2

C655

1

0.1U_0402_16V4Z

2

C682

1

0.1U_0402_16V4Z

2

C46

1

0.1U_0402_16V4Z

2

C683

1

0.1U_0402_16V4Z

2

C47

1

0.1U_0402_16V4Z

CRB 0.1u X1 4,7uX1

+0.75VS

2

C51

C50

@

0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet of

DDR3 SODIMM-II Socket

0.1U_0402_16V4Z

1

Place near JDIMM2

Compal Electronics, Inc.

LA-7091P

1

2

C48

1

2

1

2

C49

0.1U_0402_16V4Z

1

C664

4.7U_0603_6.3V6K

2

9 48Tuesday, December 07, 2010

0.1

5

4

3

2

1

D D

+LCDVDD

R396

300_0603_5%

D

Q81

UMA@

DISO@

12

LCDVDD_ON

Q81

S

L25

1.2UH_1127AS-1R2N_2.4A_30%

1 2

R1212 0_1206_5%R1212 0_1206_5%

DAC_BRIG

INVT_PWM

DISPOFF#

SSM3K7002F_SC59-3

APU_ENVDD<5>

VGA_ENVDD<18>

C C

+INVPWR_B+

FBMA-L11-201209-221LMA30T_0805

W=60mils

680P_0402_50V7K

C673

FBMA-L11-201209-221LMA30T_0805

1

C674

C674 68P_0402_50V8J

68P_0402_50V8J

2

C1007 220P_0402_50V7KC1007 220P_0402_50V7K

C677 220P_0402_50V7KC677 220P_0402_50V7K

C679 220P_0402_50V7KC679 220P_0402_50V7K

1 2

R963 0_0402_5%

1 2

R964 0_0402_5%

L2

L1

SM010014520 3000ma 220ohm@100mhz DCR 0.04

12

LCD POWER CIRCUIT

2

G

13

D

2

G

S

R395

100K_0402_5%

12

+3VALW

12

R393

R393 10K_0402_5%

10K_0402_5%

R397

R397 1K_0402_5%

1K_0402_5%

0.047U_0402_16V7K

Q83

Q83 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

B+

12

13

12

@

12

VGA_ENBKL<19>

APU_ENBKL<5>

1

C670

2

C1005

4.7U_0805_10V4Z

BKOFF#<31>

+3VS

G

2

R1097 0_0402_5%DISO@R1097 0_0402_5%DISO@

R156 0_0402_5%UMA@R156 0_0402_5%UMA@

W=60mils

1

2

S

Q82

Q82 AO3413_SOT23-3

AO3413_SOT23-3

D

1 3

+LCDVDD

1

2

1 2

R157 100K_0402_1%R157 100K_0402_1%

12

C669

4.7U_0805_10V4Z

W=60mils

C1006

0.1U_0402_16V4Z

1 2

R484 0_0402_5%R484 0_0402_5%

R48510K_0402_5% R48510K_0402_5%

21

RB751V_SOD323

RB751V_SOD323 D4

@D4

@

+3VS

12

ENBKL <31>

@

R483

R483 10K_0402_5%

10K_0402_5%

DISPOFF#

LCD/LED PANEL Conn.

DAC_BRIG<31>

USB20_P5<14> USB20_N5<14>

+3VS

+LCDVDD

1

2

DAC_BRIG

R387 0_0402_5%R387 0_0402_5% R523 0_0402_5%R523 0_0402_5%

C671

10U_0805_10V4Z

+LCDVDD

1 2 1 2 1 2

C480

22P_0402_50V8J

Place closed to JLVDS1

1

C672

0.1U_0402_16V4Z

2

W=60mils

+INVPWR_B+

DISPOFF# INVT_PWM

TXCLK+

TXCLK-

TXOUT2+ TXOUT2-

TXOUT1+ TXOUT1-

TXOUT0+ TXOUT0-

I2CC_SDA

I2CC_SCL

+3VS

1

2

+3VS_CAMERA USB20_CMOS_P5 USB20_CMOS_N5

C481

C481 22P_0402_50V8J

22P_0402_50V8J

@

+3VS

USB20_P5

R388 0_0402_5% R388 0_0402_5%

@

20100927 Change to 88341

JLVDS1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

ACES_88341-3000B001

CONN@

D15

@D15

@

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

USB20_N5

3

CH2

2

Vn

1

CH1

Change P/N as SC300000B00

B B

VGA ONLY

R2700_0402_5% DISO@ R2700_0402_5% DISO@

12

R2720_0402_5%

12

VGA_TXCLK+ VGA_TXCLK-

VGA_TXOUT2+ VGA_TXOUT2-

VGA_TXOUT1-

VGA_TXOUT0+

VGA_LCD_CLKI2CC_SCL VGA_LCD_DAT

VGA_TXCLK+ <18> VGA_TXCLK- <18>

VGA_TXOUT2+ <18> VGA_TXOUT2- <18>

VGA_TXOUT1+ <18> VGA_TXOUT1- <18>

VGA_TXOUT0+ <18> VGA_TXOUT0- <18>

VGA_LCD_CLK <19> VGA_LCD_DAT <19>

INVT_PWM

APU_BLPWM<5>

EC_INVT_PWM<31>

VGA_INVT_PWM<18>

1 2

R1098 0_0402_5%UMA@R1098 0_0402_5%UMA@

1 2

R158 0_0402_5%DISO@R158 0_0402_5%DISO@

1 2

R1099 0_0402_5%@R1099 0_0402_5%@

INVT_PWM

12

R1100

R1100 100K_0402_5%

100K_0402_5%

LVDS Function Change list For R01

1.Add DISO@ and VGA path conne ct circuit

2.Remove reserv e DMIC circuit

TXCLK+ TXCLK-

TXOUT2+ TXOUT2-

TXOUT1+ VGA_TXOUT1+ TXOUT1-

TXOUT0+ TXOUT0- VGA_TXOUT0-

I2CC_SDA

RP2 0_0404_4P2R_5%DISO@RP2 0_0404_4P2R_5%DISO@

RP4 0_0404_4P2R_5%DISO@RP4 0_0404_4P2R_5%DISO@

RP6 0_0404_4P2R_5%DISO@RP6 0_0404_4P2R_5%DISO@

RP8 0_0404_4P2R_5%DISO@RP8 0_0404_4P2R_5%DISO@

2 3 1 4

DISO@

UMA ONLY

UMA@

R2690_0402_5% UMA@ R2690_0402_5% UMA@

12

R2710_0402_5%

12

APU_TXCLK+ APU_TXCLK-

APU_TXOUT2+ APU_TXOUT2-

APU_TXOUT1+TXOUT1+ APU_TXOUT1-TXOUT1-

APU_TXOUT0+ APU_TXOUT0-

APU_LCD_CLKI2CC_SCL APU_LCD_DATA

APU_TXCLK+ <5> APU_TXCLK- <5>

APU_TXOUT2+ <5> APU_TXOUT2- <5>

APU_TXOUT1+ <5> APU_TXOUT1- <5>

APU_TXOUT0+ <5> APU_TXOUT0- <5>

APU_LCD_CLK <5> APU_LCD_DATA <5>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

LVDS/CAMERA

LA-7091P

1

0.1

10 48Tuesday, December 07, 2010

0.1

TXCLK+ TXCLK-

TXOUT2+ TXOUT2-

TXOUT0+

A A

TXOUT0-

I2CC_SDA

1 4 2 3

RP1 0_0404_4P2R_5%UMA@RP1 0_0404_4P2R_5%UMA@

1 4 2 3

RP3 0_0404_4P2R_5%UMA@RP3 0_0404_4P2R_5%UMA@

1 4 2 3

RP5 0_0404_4P2R_5%UMA@RP5 0_0404_4P2R_5%UMA@

1 4 2 3

RP7 0_0404_4P2R_5%UMA@RP7 0_0404_4P2R_5%UMA@

5

D D

HDMI Function Change list For R01

1.Add DISO@ and VGA path connect circuit

APU_HDMI_CLK<5>

VGA_HDMI_SCLK<19>

APU_HDMI_DATA<5>

VGA_HDMI_SDATA<19>

UMA@

R970 0_0402_5 %

R971 0_0402_5%DISO@R971 0_0402_5%DISO@

R972 0_0402_5%

R973 0_0402_5%DISO@R973 0_0402_5%DISO@

12

UMA@

12

2.Level Shift implement

3.Add termination resistance option

C C

4

R966

3

R521

@R521

@

0_0603_5%

+3VS

0_0402_5%

R968

1 2

4.7K_0402_5%

0_0402_5%

G

2

S

G

2

BSH111 1N_SOT23-3

13

D

S

D

S

Q128

BSH111 1N_SOT23-3

@

R172 0_0402_5%

@

R816 0_0402_5%

+HDMI_5V_OUT

R965

R522

R161

1 2

13

D

Q86

12

R161

12

2K_0402_5%

+5VS

HDMI_SCLK

HDMI_SDATA

1 2

D7

+HDMI_5V

2 1

CH491DPT_SOT23-3

W=40mils

F2

1.1A_6V_SMD1812P110TF

21

Place closed to JHDMI1

+HDMI_5V_OUT

1

C690

0.1U_0402_16V4Z

2

1

HDMI connector

JHDMI1

1 2

1

4

1 2

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

ACON_HMR2E-AK120D

CONN@

2

3

20

GND

21

GND

22

GND

23

GND

20100928 change CNN DC232001100 100042GR019M23BZR

HDMI_R_CK-

HDMI_R_CK+

+HDMI_5V_OUT

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

SM070001310 400ma 90ohm@100mhz DCR 0.3

HDMI_C_CLK-

L68

L68 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_C_CLK+

R514 0_0402_5%R514 0_0402_5%

1

4

R513 0_0402_5%R513 0_0402_5%

HDMI_C_TX0- HDMI_R_D0-

L69

L69 WCM-2012-900T_0805

WCM-2012-900T_0805

@

R524

1 2

0_0402_5%

+3VS

R527

R527 0_0402_5%

Use common via on related pair

R974 0_0402_5%DISO@R974 0_0402_5%DISO@

VGA_HDMI_TXD2-<19> VGA_HDMI_TXD2+<19> VGA_HDMI_TXD1-<19> VGA_HDMI_TXD1+<19>

From VGA

B B

From APU

VGA_HDMI_TXD0-<19> VGA_HDMI_TXD0+<19> VGA_HDMI_TXC-<19> VGA_HDMI_TXC+< 19>

APU_HDMI_TX2N<5> APU_HDMI_TX2P<5> APU_HDMI_TX1N<5> APU_HDMI_TX1P<5> APU_HDMI_TX0N<5> APU_HDMI_TX0P<5> APU_HDMI_CLKN<5> APU_HDMI_CLKP<5>

1 2

R975 0_0402_5%DISO@R975 0_0402_5%DISO@

1 2

R976 0_0402_5%DISO@R976 0_0402_5%DISO@

1 2

R978 0_0402_5%DISO@R978 0_0402_5%DISO@

1 2

R979 0_0402_5%DISO@R979 0_0402_5%DISO@

1 2

R980 0_0402_5%DISO@R980 0_0402_5%DISO@

1 2

R982 0_0402_5%DISO@R982 0_0402_5%DISO@

1 2

R983 0_0402_5%DISO@R983 0_0402_5%DISO@

1 2

R984 0_0402_5%UM A@R984 0_0402_5%UMA@

1 2

R985 0_0402_5%UM A@R985 0_0402_5%UMA@

1 2

R986 0_0402_5%UM A@R986 0_0402_5%UMA@

1 2

R987 0_0402_5%UM A@R987 0_0402_5%UMA@

1 2

R988 0_0402_5%UM A@R988 0_0402_5%UMA@

1 2

R989 0_0402_5%UM A@R989 0_0402_5%UMA@

1 2

R990 0_0402_5%UM A@R990 0_0402_5%UMA@

1 2

R991 0_0402_5%UM A@R991 0_0402_5%UMA@

1 2

HDMI_C_TX2-_R HDMI_C_TX2+_R HDMI_C_TX1-_R HDMI_C_TX1+_R HDMI_C_TX0-_R HDMI_C_TX0+_R HDMI_C_CLK-_R HDMI_C_CLK+_R

DISO@

VGA_HDMI_DET<19>

APU_HDMI_HPD<5>

12

R977 0_0 402_5%

UMA@

12

R981 0_0 402_5%

10K_0402_5%

0_0402_5%

1 2

C

2

B

E

3 1

Q34

Q34 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

12

R530

0_0402_5%

@

1 2

R525 150 K_0402_5%R525 150K_0402_5%

HDMI_HPD

12

R528

R528 365K_0402_1%

365K_0402_1%

@

HDMI_C_TX0+

HDMI_C_TX1-

L54

L54 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_C_TX1+

HDMI_C_TX2-

L70

L70 WCM-2012-900T_0805

WCM-2012-900T_0805

@

R516 0_0402_5%R516 0_0402_5%

1 2

1

4

R515 0_0402_5%R515 0_0402_5%

1 2

R518 0_0402_5%R518 0_0402_5%

1 2

1

4

R517 0_0402_5%R517 0_0402_5%

1 2

R520 0_0402_5%R520 0_0402_5%

1 2

1

4

R519 0_0402_5%R519 0_0402_5%

1 2

2

3

2

3

2

3

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+HDMI_C_TX2+

Place closed to JHDMI1

HDMI_C_TX2-_R HDMI_C_TX2+_R

HDMI_C_TX1-_R HDMI_C_TX1+_R

HDMI_C_TX0-_R HDMI_C_TX0+_R

A A

HDMI_C_CLK-_R HDMI_C_CLK+_R

C508 0.1U_0402_16V7KC508 0.1U_0402_16V7K C509 0.1U_0402_16V7KC509 0.1U_0402_16V7K

C510 0.1U_0402_16V7KC510 0.1U_0402_16V7K C511 0.1U_0402_16V7KC511 0.1U_0402_16V7K

C512 0.1U_0402_16V7KC512 0.1U_0402_16V7K C513 0.1U_0402_16V7KC513 0.1U_0402_16V7K

C514 0.1U_0402_16V7KC514 0.1U_0402_16V7K C515 0.1U_0402_16V7KC515 0.1U_0402_16V7K

12 12

5

HDMI_C_TX2HDMI_C_TX2+

HDMI_C_TX1HDMI_C_TX1+

HDMI_C_TX0HDMI_C_TX0+

HDMI_C_CLKHDMI_C_CLK+

R509 499_0402_1%R509 499_0402_1%

1 2

R508 499_0402_1%R508 499_0402_1%

1 2

R506 499_0402_1%R506 499_0402_1%

1 2

R505 499_0402_1%R505 499_0402_1%

1 2

R503 499_0402_1%R503 499_0402_1%

1 2

R502 499_0402_1%R502 499_0402_1%

1 2

R501 499_0402_1%R501 499_0402_1%

1 2

R500 499_0402_1%R500 499_0402_1%

1 2

+HDMI_5V_OUT

12

R512

100K_0402_5%

13

D

2N7002_SOT23

2

Q87

G

S

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

HDMI Connector

LA-7091P

11 48Tuesday, December 07, 2010

1

of

0.1

5

4

3

2

1

D D

2

3

2

D32

@

C697

1

2

3

1

L60

1 2

FCM2012CF-800T06_2P

L81

1 2

FCM2012CF-800T06_2P

1

C695

2

10P_0402_50V8J

D33

PJDLC05C_SOT23-3

@

1

C696

2

10P_0402_50V8J

C700

10P_0402_50V8J

CRT_R_1

CRT_G_1

CRT_B_1

CRT Connector

PJDLC05C_SOT23-3

CRT_R

CRT_G

CRT_B

150_0402_1%

12

R531

R532

C C

+CRT_VCC

C699 0.1U_0402_16V4ZC699 0.1U_0402_16V4Z

1 2

1

5

U23

C701 0.1U_0402_16V4Z C701 0.1U_0402_16V4Z

P

A2Y

G

3

1 2

4

OE#

74AHCT1G125GW_SOT353-5

CRT_VSYNC

CRT_HSYNC

150_0402_1%

12

R533

R537 10K_0402_5% R537 10K_0402_5%

+CRT_VCC

5

P

A2Y

G

3

10P_0402_50V8J

C692

C693

1

2

12

CRT_HSYNC_1

1

U19

CRT_VSYNC_1

4

OE#

74AHCT1G125GW_SOT353-5

10P_0402_50V8J

1

2

L57 FCM2012CF-800T06_2PL57 FCM2012CF-800T06_2P

1 2

L58 FCM2012CF-800T06_2PL58 FCM2012CF-800T06_2P

1 2

L59 FCM2012CF-800T06_2PL59 FCM2012CF-800T06_2P

1 2

10P_0402_50V8J

C694

1

2

10P_0402_50V8J

CRT_HSYNC_2

CRT_VSYNC_2

1

2

+5VS

1

C702

10P_0402_50V8J

2

W=40mils

D14

2 1

RB491D_SC59-3

1

2

F1

1.1A_6VDC_FUSE

0.1U_0402_16V4Z

C698

100P_0402_50V8J

1

2

C703

68P_0402_50V8J

C691

21

1

2

W=40mils

1

2

T100

PAD

T99

PAD

DSUB_12

DSUB_15

C704

C704 68P_0402_50V8J

68P_0402_50V8J

+CRT_VCC+R_CRT_VCC

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

C-H_13-12201513CP

CONN@

20100928 change CNN

16

G

17

G

P/N : LTCX002UM00

F/P : SUYIN 070546HR015M21MZR 15 H9.2 D-SUB

B B

A A

CRTI Function Change list For R01

1.Add DISO@ and VGA path connect circuit

2.Level Shift implement

Use common via on related pair

APU_CRT_R

APU_CRT_G

APU_CRT_B

APU_CRT_HSYNC

APU_CRT_VSYNC

APU_CRT_DDC_SCL C RT_CLK

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

VGA_CRT_HSYNC

VGA_CRT_VSYNC

VGA_CRT_DATA

VGA_CRT_CLK

From APU

From VGA

5

APU_CRT_R<5>

APU_CRT_G<5>

APU_CRT_B<5>

APU_CRT_HSYNC<5>

APU_CRT_VSYNC<5>

APU_CRT_DDC_SDA<5>

APU_CRT_DDC_SCL<5>

VGA_CRT_R<19>

VGA_CRT_G<19>

VGA_CRT_B<19>

VGA_CRT_HSYNC<19>

VGA_CRT_VSYNC<19>

VGA_CRT_DATA<19>

VGA_CRT_CLK<19>

R995 0_0402_5%UMA@R 995 0_0402_5%UMA@

R996 0_0402_5%UMA@R 996 0_0402_5%UMA@

R997 0_0402_5%UMA@R 997 0_0402_5%UMA@

R998 0_0402_5%UMA@R 998 0_0402_5%UMA@

R999 0_0402_5%UMA@R 999 0_0402_5%UMA@

R1000 0_0402_5%U MA@R1000 0_0402_5%UMA@

R1001 0_0402_5%U MA@R1001 0_0402_5%UMA@

R1002 0_0402_5%D ISO@R1002 0_0402_5%DISO@

R1003 0_0402_5%D ISO@R1003 0_0402_5%DISO@

R1004 0_0402_5%D ISO@R1004 0_0402_5%DISO@

R1005 0_0402_5%D ISO@R1005 0_0402_5%DISO@

R1006 0_0402_5%D ISO@R1006 0_0402_5%DISO@

R1007 0_0402_5%D ISO@R1007 0_0402_5%DISO@

R1008 0_0402_5%D ISO@R1008 0_0402_5%DISO@

4

+CRT_VCC

Close to Conn side

+3VS

12

R548

R549

12

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

CRT_DATA

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

CRT_DATA

CRT_CLK

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

4.7K_0402_5%

DSUB_12

DSUB_15APU_CRT_DDC_SDA

R549

2

R548

4.7K_0402_5%

1 3

Q89

BSH111 1N_SOT23-3

@

12

R1009 0_0402_5%

@

12

R1010 0_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet of

2.2K_0402_5%

2

G

D

S

D

S

2

G

1 3

D

Q129

BSH111 1N_SOT23-3

Compal Electronics, Inc.

+3VS

12

R403

S

CRT Connector

LA-7092P

1

12

R412

2.2K_0402_5%

CRT_DATA

CRT_CLKCRT_CLK

12 48Tuesday, December 07, 2010

0.1

5

4

3

2

1

For PCIE device reset on FS1 (GFX,GLAN,WLAN,LVDS Travis)

150P_0402_50V8J

C52

A_RST#

A_RST#<31>

UMI_RX0P<6> UMI_RX0N<6> UMI_RX1P<6>

PCIE_FTX_C_DRX_P0<29,33> PCIE_FTX_C_DRX_N0<29,33> PCIE_FTX_C_DRX_P1<27> PCIE_FTX_C_DRX_N1<27> PCIE_FTX_C_DRX_P2<26> PCIE_FTX_C_DRX_N2<26> PCIE_FTX_C_DRX_P3<29> PCIE_FTX_C_DRX_N3<29>

PCIE_FRX_DTX_P0<29,33> PCIE_FRX_DTX_N0<29,33>

PCIE_FRX_DTX_P1<27> PCIE_FRX_DTX_N1<27> PCIE_FRX_DTX_P2<26> PCIE_FRX_DTX_N2<26> PCIE_FRX_DTX_P3<29> PCIE_FRX_DTX_N3<29>

UMI_RX1N<6> UMI_RX2P<6> UMI_RX2N<6> UMI_RX3P<6> UMI_RX3N<6>

UMI_TX0P<6> UMI_TX0N<6> UMI_TX1P<6> UMI_TX1N<6> UMI_TX2P<6> UMI_TX2N<6> UMI_TX3P<6> UMI_TX3N<6>

+PCIE_VDDAN

D D

JMINI2

Card reader

LAN WLAN

C C

R557 33_0402_ 5%R557 33_0402_ 5%

R560 590_0402_1%R560 590_0402_1% R561 2K_0402_1%R561 2K_0402_1%

1 2

12

C53 0.1U_0402_16V7KC53 0.1U_0402_16V7K

1 2

C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K

1 2

C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K

1 2

C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K

1 2

C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K

1 2

C58 0.1U_0402_16V7KC58 0.1U_0402_16V7K

1 2

C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K

1 2

C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K

1 2

12 12

C1562 0.1U_0402_16V7KC1562 0.1U_0402_16V7K

1 2

C1563 0.1U_0402_16V7KC1563 0.1U_0402_16V7K

1 2

C105 0.1U_0402_16V7KC105 0.1U_0402_16V7K

1 2

C108 0.1U_0402_16V7KC108 0.1U_0402_16V7K

1 2

C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K

1 2

C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K

1 2

C717 0.1U_0402_16V7KC717 0.1U_0402_16V7K

1 2

C63 0.1U_0402_16V7KC63 0.1U_0402_16V7K

1 2

PCIE_RST#

A_RST#_R

UMI_RX0P_C UMI_RX0N_C UMI_RX1P_C UMI_RX1N_C UMI_RX2P_C UMI_RX2N_C UMI_RX3P_C UMI_RX3N_C

PCIE_FTX_DRX_P0 PCIE_FTX_DRX_N0 PCIE_FTX_DRX_P1 PCIE_FTX_DRX_N1 PCIE_FTX_DRX_P2 PCIE_FTX_DRX_N2 PCIE_FTX_DRX_P3 PCIE_FTX_DRX_N3

close to FCH within 1"

R564 0_0402_5%R564 0_0402_5%

APU_DISP_CLKP<5> APU_DISP_CLKN<5>

APU_CLKP<5> APU_CLKN<5>

CLK_PCIE_VGA<18> CLK_PCIE_VGA#<18>

LAN

WLAN

B B

Mini2

CLK_PCIE_LAN<26> CLK_PCIE_LAN#<26>

CLK_PCIE_MINI1<29> CLK_PCIE_MINI1#<29>

CLK_PCIE_MINI2<29> CLK_PCIE_MINI2#<29>

CLK_PCIE_CR<27> CLK_PCIE_CR#<27>

CLK_PCIE_USB30<33> CLK_PCIE_USB30#<33>

1 2

R565 0_0402_5%R565 0_0402_5%

1 2

R162 0_0402_5%R162 0_0402_5%

1 2

R163 0_0402_5%R163 0_0402_5%

1 2

R569 0_0402_5%R569 0_0402_5%

1 2

R570 0_0402_5%R570 0_0402_5%

1 2

R571 0_0402_5%R571 0_0402_5%

1 2

R572 0_0402_5%R572 0_0402_5%

1 2

R573 0_0402_5%R573 0_0402_5%

1 2

R574 0_0402_5%R574 0_0402_5%

1 2

R1204 0_0402_5%R1204 0_0402_5%

1 2

R1205 0_0402_5%R1205 0_0402_5%

1 2

R668 0_0402_5%R668 0_0402_5%

1 2

R667 0_0402_5%R667 0_0402_5%

1 2

R686 0_0402_5%R686 0_0402_5%

1 2

R685 0_0402_5%R685 0_0402_5%

1 2

APU_DISP_CLKP_R APU_DISP_CLKN_R

APU_CLKP_R APU_CLKN_R

CLK_PCIE_VGA_R CLK_PCIE_VGA#_R

CLK_PCIE_LAN_R CLK_PCIE_LAN#_R

CLK_PCIE_MINI1_R CLK_PCIE_MINI1#_R

CLK_PCIE_MINI2_R CLK_PCIE_MINI2#_R

CLK_PCIE_CR_R CLK_PCIE_CR#_R

CLK_PCIE_USB30_R CLK_PCIE_USB30#_R

Del 1012

1 2

C66

22P_0402_50V8J

C67

22P_0402_50V8J

1 2

A A

C64

1 2

22P_0402_50V8J

20M_0402_5%

C65

22P_0402_50V8J

R563

1 2

12

5

Close to FCH

Y4

4

OSC

1

OSC

32.768KHZ_12.5PF_Q13MC14610050_10PPM

RTC_32KHI

3

NC

2

NC

RTC_32KHO

12

1M_0603_5%

Y3

R576

25MHZ_20PF_7A25000012

25M_CLK_X1

25M_CLK_X2

4

U31E

P1

PCIE_RST_L

L1

A_RST_L

AD26

UMI_TX0P

AD27

UMI_TX0N

AC28

UMI_TX1P

AC29

UMI_TX1N

AB29

UMI_TX2P

AB28

UMI_TX2N

AB26

UMI_TX3P

AB27

UMI_TX3N

AE24

UMI_RX0P

AE23

UMI_RX0N

AD25

UMI_RX1P

AD24

UMI_RX1N

AC24

UMI_RX2P

AC25

UMI_RX2N

AB25

UMI_RX3P

AB24

UMI_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

21807-A11-HUDSON-M1_FCBGA605

PCI CLKS

PCI EXPRESS I/F

CLOCK GENERATOR

CPU

ALLOW_LDTSTP/DMA_AC TIVE_L

RTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22

LPC

INTRUDER_ALERT_L

3

AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

REQ1_L/GPIO40

GNT1_L/GPO44 GNT2_L/GPO45

INTE_L/GPIO32

INTF_L/GPIO33 INTG_L/GPIO34 INTH_L/GPIO35

SERIRQ/GPIO48

PROCHOT_L

VDDBT_RTC_G

PCI I/F

REQ2_L/CLK_REQ8_L/GPIO41 REQ3_L/CLK_REQ5_L/GPIO42

GNT3_L/CLK_REQ7_L/GPIO46

LDRQ1_L/CLK_REQ6_L/GPIO49

W2

PCICLK0

W1 W3 W4 Y1

V2

PCIRST_L

AA1

AD0/GPIO0

AA4

AD1/GPIO1

AA3

AD2/GPIO2

AB1

AD3/GPIO3

AA5

AD4/GPIO4

AB2

AD5/GPIO5

AB6

AD6/GPIO6

AB5

AD7/GPIO7

AA6

AD8/GPIO8

AC2

AD9/GPIO9

AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8

CBE0_L

AD5

CBE1_L

AD8

CBE2_L

AA10

CBE3_L

AE8

FRAME_L

AB9

DEVSEL_L

AJ3

IRDY_L

AE7

TRDY_L

AC5

PAR

AF5

STOP_L

AE6

PERR_L

AE4

SERR_L

AE11

REQ0_L

AH5 AH4 AC12 AD12

GNT0_L

AJ5 AH6 AB12 AB11

CLKRUN_L

AD7

LOCK_L

AJ6 AG6 AG4 AJ4

H24

LPCCLK0

H25

LPCCLK1

J27

LAD0

J26

LAD1

H29

LAD2

H28

LAD3

G28

LFRAME_L

J25

LDRQ0_L

AA18 AB19

G21 H21 K19

LDT_PG

G22

LDT_STP_L

J24

LDT_RST_L

C1

32K_X1

C2

32K_X2

D2

RTCCLK

B2 B1

2010/08/04 2010/08/04

T96PAD T96PAD

PCI_CLK1 <17> PCI_CLK2 <17> PCI_CLK3 <17> PCI_CLK4 <17>

T92PAD T92PAD

CR_HPD <27>

R4

1 2

10K_0402_5%

R853 0_0402_5%R853 0_0402_5% R575 22_0402_5%R575 22_0402_5%

PAD

RTC_32KHI

RTC_32KHO

R170 33_0402_5%R170 33_0402_5%

1 2

C1272

1

2

0.1U_0402_16V4Z

Compal Secret Data

1 2 1 2

T101

1

2

Deciphered Date

VGA_PWRGD_R

C1271

1U_0402_6.3V4Z

A_RST#_R

PCI_AD23 <17> PCI_AD24 <17> PCI_AD25 <17> PCI_AD26 <17> PCI_AD27 <17>

VGA_PWRGD<24,45>

PE_GPIO0 <18> PE_GPIO1 <24,37>

LPC_CLK1 <17> LPC_AD0 <31> LPC_AD1 <31> LPC_AD2 <31> LPC_AD3 <31> LPC_FRAME# <31>

SERIRQ <31>

ALLOW_STOP# <5> FCH_PROCHOT# <5> APU_PWRGD <5>

APU_RST# <5>

RTC_CLK <17,31>

1 2

R864 510_0402_5%R864 510_0402_5%

W=20mils

for Clear CMOS

R175 33_0402_5%R175 33_0402_5%

1 2

150P_0402_50V8J

VGA_PWRGD VGA_PWRGD_R

For DVT 1011

LPC_CLK0 <17> LPC_CLK0_EC <31>

R865

@

0_0603_5%

1 2

2

+3VALW

C1234

1 2

0.1U_0402_16V4Z

5

2

P

B

4

Y

1

A

1

R174

C1233

R174

8.2K_0402_5%@

2

1 2

Need to check material?

APU_PWRGD

+3VALW

U33

2

1

NC7SZ08P5X_NL_SC70-5

G

3

U28

U28 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

FDV301N_NL_SOT23-3

C1199

1 2

0.1U_0402_16V4Z

5

P

B

4

Y

A

G

3

1 2

R839 0_0402_5%R839 0_0402_5%

+1.8VS +3VS

G

2

S

Q90

R830 0_0402_5%

R838 100K_0402_5%

RTC BATT Conn.

P/N: SP07000OU00 F/P: SUYIN_060003HA002G2 02ZL_2P

+RTCVCC

1

C1270

2

0.1U_0402_16V4Z

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH PCIE/PCI/ACPI/LPC/RTC

1 2

R582 0_0402_5%

12

R164

10K_0402_5%

13

D

@

1 2

@

1 2

+RTCBATT

D23

2

3

DAN202UT106_SC70-3

LA-7091P

1

+RTCBATT

PLT_RST# < 18,26,27,29,33>

PCIE_RST#

@

H_PWRGD_L <46>

1

CONN@

JBATT2

+

-

SUYIN_060003HA002G202ZL

2

12

R179

R179 1K_0402_5%

1K_0402_5%

+CHGRTC

13 48Tuesday, December 07, 2010

0.1

+3VALW

1 2

R870 10K_0402_5%R8 70 10K_0402_5%

1 2

R871 10K_0402_5%R8 71 10K_0402_5%

@

1 2

R872 10K_0402_5%

1 2

R603 10K_0402_5%R603 10K_0402_5%

1 2

R604 10K_0402_5%R604 10K_0402_5%

1 2

D D

C C

B B

A A

R605 10K_0402_5%R605 10K_0402_5%

1 2

R817 10K_0402_5%R817 10K_0402_5%

+3VS

1 2

R818 10K_0402_5%R818 10K_0402_5%

1 2

R597 4.7K_0402_5%R597 4.7K_0402_5%

1 2

R598 2.2K_0402_5%R598 2.2K_0402_5%

1 2

R599 2.2K_0402_5%R599 2.2K_0402_5%

FCH_PWRGD<46>

0.1U_0402_16V7K

1 2

+3VS

R626 2.2K_0402_5%R626 2.2K_0402_5%

@

1 2

R404 100K_0402_5%

@

1 2

R173 10K_0402_5%

1 2

R587 10K_0402_5%R5 87 10K_0402_5%

1 2

R588 10K_0402_5%R5 88 10K_0402_5%

1 2

R606 2.2K_0402_5%R606 2.2K_0402_5%

@

1 2

R607 10K_0402_5%

@

1 2

R608 10K_0402_5%

1 2

R609 10K_0402_5%R609 10K_0402_5%

Pull-down for e nable high perf ormance mode 20100527 (requi red for M1)

12

PX@

R912

R911

10K_0402_5%

12

R914

R915

BACO@

UMAO@

10K_0402_5%

BOARD Config.

5

USB_OC2#

USB_OC1#

USB_OC0#

FCH_SIC

FCH_SID

FCH_PCIE_WAKE#

LAN_CLKREQ#

MINI1_CLKREQ#

NB_PWRGD

FCH_SMCLK0

FCH_SMDAT0

R580 0_0402_5 %@R580 0_0402_5%@

R581 0_0402_5 %R581 0_0402_5 %

4

2

@

C112

1

VRAM_SEL

VGA_CLKREQ#_R

+3VALW+3VALW+3 VALW

12

VGA@

R910

10K_0402_5%

GPIO189 GPIO190 GPIO191

12

R913

UMAO@

10K_0402_5%

+3VS

@

C111 0.1U_0402_16V7K

1 2

5

P

B

Y

A

G

3

VRAM_Freq : 1->900Hz 0-> 800Hz *

FCH_SMCLK1

FCH_SMDAT1

EC_RSMRST#

HDA_BITCLK

HDA_SDIN0

HDA_SDOUT

12

2

1

NC7SZ08P5X_NL_SC70-5

@

U30

GPIO189 GPIO190 GPIO191

0 0

1

0

1

1 2

R929 10K_0402_5%R9 29 10K_0402_5%

@

1 2

R930 10K_0402_5%

1 2

R931 10K_0402_5%R9 31 10K_0402_5%

1 2

R932 10K_0402_5%R9 32 10K_0402_5%

1 2

R933 10K_0402_5%R9 33 10K_0402_5%

1 2

R1219 10K_0402_5%R1219 10K_0402_5%

+3VALW

HDA_BITCLK_AUDIO<28> HDA_SDOUT_AUDIO<28>

HDA_SDIN0<28>

HDA_SYNC_AUDIO<28>

HDA_RST_AUDIO#<28>

ODD_DA#_FCH

ODD_DETECT#

EC_PWROK <31>

VGATE <31,46>

Function

UMA

DIS

EC_LID_OUT#

SMIB

R579 10K_0402_5%@R579 10K_0402_5%@

USB_OC7#

USB_OC5#

1 2

4

EC_SWI#<31>

SLP_S3#<31> SLP_S5#<31>

PBTN_OUT#<31>

EC_GA20<31>

EC_KBRST#<31>

EC_SCI#<31> EC_SMI#<31>

FCH_PCIE_WAKE#<26,29,33>

H_THERMTRIP#<5>

EC_RSMRST#<31>

USB30_CLKREQ#< 33>

CR_CLKREQ#<27>

LAN_CLKREQ#<26>

FCH_SPKR<28> FCH_SMCLK0<8,9,29> FCH_SMDAT0<8,9,29>

MINI2_CLKREQ#<29> MINI1_CLKREQ#<29>

SMIB<33>

R583 33_0402_ 5%R583 33_0402_ 5%

1 2

R165 33_0402_ 5%R165 33_0402_ 5%

1 2

R589 33_0402_ 5%R589 33_0402_ 5%

1 2

R590 33_0402_ 5%R590 33_0402_ 5%

1 2

+3VALW

SMIB

EC_LID_OUT#<31>

ODD_DA#_FCH<30> ODD_DETECT#<30>

USB_OC0#<33>

R591 10K_0402_5%R591 10K_0402_5%

1 2

R592 10K_0402_5%R592 10K_0402_5%

1 2

R593 10K_0402_5%R593 10K _0402_5%

1 2

R596 10K_04 02_5%R596 10K_0402_5%

1 2

R600 10K_04 02_5%R600 10K_0402_5%

1 2

FCH_PWRGD

T82PADT82PAD T83PADT83PAD T84PADT84PAD

NB_PWRGD

CR_CLKREQ#

FCH_SMCLK1 FCH_SMDAT1

VRAM_SEL

VGA_CLKREQ#_R

USB_OC7#

USB_OC5# ODD_DA#_FCH ODD_DETECT# USB_OC2# USB_OC1# USB_OC0#

HDA_BITCLK HDA_SDOUT HDA_SDIN0

HDA_SYNC HDA_RST#

T85 PADT85 PAD T86 PADT86 PAD

GPIO189 GPIO190 GPIO191

For BRD Config.

GPIO187 GPIO188

3

U31A

J2

PCI_PME_L/GEVENT4_L

K1

RI_L/GEVENT22_L

D3

SPI_CS3_L/GBE_STAT1/GEVENT21_L

F1

SLP_S3_L

H1

SLP_S5_L

F2

PWR_BTN_L

H5

PWR_GOOD

G6

SUS_STAT_L

B3

TEST0

C4

TEST1/TMS

F6

TEST2

AD21

GA20IN/GEVENT0_L

AE21

KBRST_L/GEVENT1_L

K2

LPC_PME_L/GEVENT3_L

J29

LPC_SMI_L/GEVENT23_L

H2

GEVENT5_L

J1

SYS_RESET_L/GEVENT19_L

H6

WAKE_L/GEVENT8_L

F3

IR_RX1/GEVENT20_L

J6

THRMTRIP_L/SMBALERT_L/GEVEN T2_L

AC19

NB_PWRGD

G1

RSMRST_L

AD19

CLK_REQ4_L/SATA_IS0_L/GPIO64

AA16

CLK_REQ3_L/SATA_IS1_L/GPIO63

AB21

SMARTVOLT1/SATA_IS2_L/GPIO50

AC18

CLK_REQ0_L/SATA_IS3_L/GPIO60

AF20

SATA_IS4_L/FANOUT3/GPIO55

AE19

SATA_IS5_L/FANIN3/GPIO59

AF19

SPKR_GPIO66

AD22

SCL0_GPIO43

AE22

SDA0_GPIO47

F5

SCL1_GPIO227

F4

SDA1_GPIO228

AH21

CLK_REQ2_L/FANIN4_GPIO62

AB18

CLK_REQ1_L/FANOUT4_GPIO61

E1

IR_LED_L/LLB_L/GPIO184

AJ21

SMARTVOLT2/SHUTDOWN _L/GPIO51

H4

DDR3_RST_L/GEVENT7_L

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9_L

G5

GBE_LED2/GEVENT10_L

K3

GBE_STAT0/GEVENT11_L

AA20

CLK_REQG_L/GPIO65_OSCIN

H3

BLINK/USB_OC7_L/GEVENT18_L

D1

USB_OC6_L/IR_TX1/GEVENT6_L

E4

USB_OC5_L/IR_TX0/GEVENT17_L

D4

USB_OC4_L/IR_RX0/GEVENT16_L

E8

USB_OC3_L/AC_PRES/TDO/GEVENT15_L

F7

USB_OC2_L/TCK/GEVENT14_L

E7

USB_OC1_L/TDI/GEVENT13_L

F8

USB_OC0_L/TRST_L/GEVENT12_L

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST_L

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST_L

V7

GBE_PHY_INTR

E23

PS2_DAT/SDA4/GPIO187

E24

PS2_CLK/SCL4/GPIO188

F21

SPI_CS2_L/GBE_STAT2/GPIO166

G29

FC_RST_L/GPO160

D27

PS2KB_DAT/GPIO189

F28

PS2KB_CLK/GPIO190

F29

PS2M_DAT/GPIO191

E27

PS2M_CLK/GPIO192

21807-A11-HUDSON-M1_FCBGA605

2

USB MISC

ACPI/WAKE UP EVENTS

GPIO

USB OC

HD AUDIO

GBE LAN

USBCLK/14M_25M_48M_OSC

EC_PWM0/EC_TIMER 0/GPIO197 EC_PWM1/EC_TIMER 1/GPIO198 EC_PWM2/EC_TIMER 2/GPIO199 EC_PWM3/EC_TIMER 3/GPIO200

USB 1.1

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB 2.0

SCL3_LV/GPIO195 SDA3_LV/GPIO196

EMBEDDED CTRL

KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

SCL2/GPIO193 SDA2/GPIO194

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218

A10

G19

USB_RCOMP

R578

1 2

11.8K_0402_1%

10mils and <1"

J10 H11

H9

USB_HSD[13:0]P/N:

J8

USB P/N pairs with trace lengths up to 10" and have a decoupling 5.6-pF capacitor

B12

footprint placed near the USB connector or device.

A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

GPIO193

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

R584 10K_0402_5%R584 10K_0402_5%

GPIO194

R586 10K_0402_5%R586 10K_0402_5%

EC_PWM2 EC_PWM3

USB20_P11 <29> USB20_N11 <29>

USB20_P10 <29> USB20_N10 <29>

USB20_P9 <29> USB20_N9 <29>

USB20_P8 <29> USB20_N8 <29>

USB20_P6 <33> USB20_N6 <33>

USB20_P5 <10> USB20_N5 <10>

USB20_P3 <33> USB20_N3 <33>

USB20_P2 <33> USB20_N2 <33>

USB20_P1 <33> USB20_N1 <33>

USB20_P0 <33> USB20_N0 <33>

12 12

FCH_SIC <5> FCH_SID <5>

EC_PWM2 <17> EC_PWM3 <17>

MINI2-

MINI1-WLAN

USB (3.0)

BT

Camera

USB/B (3.0)

USB/B (Right)

USB Conn (Left)

1

3G

Root

EHCI CTL DEV 19, Fn 2

Root

EHCI CTL DEV 18, Fn 2

1

1 1

5

1

PX3

0

PX4

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

FCH HDA/USB/ACPI

LA-7091P

14 48Tuesday, December 07, 2010

1

of

0.1

5

D D

C656 0.01U_0402_16V7KC656 0.01U_0402_16V7K

SATA_ITX_DRX_P0< 30>

HDD

ODD

C C

SATA_ITX_DRX_N0<30>

SATA_DTX_C_IRX_N0<30> SATA_DTX_C_IRX_P0<30>

SATA_ITX_DRX_P1< 30> SATA_ITX_DRX_N1<30>

SATA_DTX_C_IRX_N1<30> SATA_DTX_C_IRX_P1<30>

1 2

C658 0.01U_0402_16V7KC658 0.01U_0402_16V7K

1 2

C648 0.01U_0402_16V7KC648 0.01U_0402_16V7K

1 2

C649 0.01U_0402_16V7KC649 0.01U_0402_16V7K

1 2

10 mils and < 1"

R610 1K_0402_1%R610 1K_0402_1%

1 2

R611 931_0402_1%R611 931_0402_1%

Change +1.1Vs as +AVDD_SATA

B B

+AVDD_SATA

SATA_LED#<32>

+3VS

1 2

R616 10K_04 02_5%R616 10K_0402_5%

1 2

C107

@

22P_0402_50V8J

C106

@

22P_0402_50V8J

1 2

12

Y7

@

25MHZ_20PF_7A25000012

FCH_SI_SPI_SO FCH_SO_SPI_SI FCH_SPICLK FCH_SPICS#/FSEL#

@

1M_0603_5%

1M_0603_5% R861

R861

4

SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0

SATA_ITX_C_DRX_P1 SATA_ITX_C_DRX_N1

SATA_CALRP SATA_CALRN

25M_SATA_X1

25M_SATA_X2

T78PADT78PAD

U31B

AH9

SATA_TX0P

AJ9

SATA_TX0N

AJ8

SATA_RX0N

AH8

SATA_RX0P

AH10

SATA_TX1P

AJ10

SATA_TX1N

AG10

SATA_RX1N

AF10

SATA_RX1P

AG12

SATA_TX2P

AF12

SATA_TX2N

AJ12

SATA_RX2N

AH12

SATA_RX2P

AH14

SATA_TX3P

AJ14

SATA_TX3N

AG14

SATA_RX3N

AF14

SATA_RX3P

AG17

SATA_TX4P

AF17

SATA_TX4N

AJ17

SATA_RX4N

AH17

SATA_RX4P

AJ18

SATA_TX5P

AH18

SATA_TX5N

AH19

SATA_RX5N

AJ19

SATA_RX5P

AB14

SATA_CALRP

AA14

SATA_CALRN

AD11

SATA_ACT_L/GPIO67

AD16

SATA_X1

AC16

SATA_X2

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO163

K4

SPI_CLK/GPIO162

K9

SPI_CS1_L/GPIO165

G2

ROM_RST_L/GPIO161

21807-A11-HUDSON-M1_FCBGA605

GPIOD

SERIAL ATA

SPI ROM

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE_L/GPIOD145

FC_AVD_L/GPIOD146

FC_WE_L/GPIOD148 FC_CE1_L/GPIOD149 FC_CE2_L/GPIOD150

FC_INT1/GPIOD144 FC_INT2/GPIOD147

FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140 FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

HW MONITOR

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMPIN3/TALERT_L/GPIO174

TEMP_COMM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

NC1 NC2

3

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

G27 Y2

TEMPIN0 TEMPIN1 TEMPIN2

GPIO175 GPIO176 GPIO177 GPIO178 GPIO179 GPIO180 GPIO181 GPIO182

T102PAD T102PAD

ODD_PWR

R612 10K_0402_5%R612 10K_0402_5% R613 10K_0402_5%R613 10K_0402_5% R614 10K_0402_5%R614 10K_0402_5% R615 10K_0402_5%R615 10K_0402_5%

R617 10K_0402_5%R617 10K_0402_5% R618 10K_0402_5%R618 10K_0402_5% R619 10K_0402_5%R619 10K_0402_5% R620 10K_0402_5%R620 10K_0402_5% R621 10K_0402_5%R621 10K_0402_5% R622 10K_0402_5%R622 10K_0402_5% R623 10K_0402_5%@R623 10K_0402_5%@ R624 10K_0402_5%R624 10K_0402_5%

ODD_PWR <30>

12 12 12 12

12 12 12 12 12 12 12 12

2

VIN6/GBE_STAT3/ GPIO181 Enable integrat ed pull-down/up and leave unco nnected

1

@

1 2

+3VS

R504 0_0603_5%

R507 4.7K_0402_5%@R507 4.7K_0402_5%@

1 2

R491 4.7K_0402_5%@R491 4.7K_0402_5%@

+3VS

A A

1 2

FCH_SPICS#/FSEL#

5

FCH_SPI_WP#

FCH_SPI_HOLD#

@

C784 0.1U_0402_16V4Z

1 2

FCH_+SPI_VCC

U32

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L1605DM2I-12G SOP 8P

SA00002TO00

SA00002TO00 @

@

VCC

SCLK

8 6 5

SI

2

SO

FCH_SPICLK_R FCH_SO_SPI_SI FCH_SI_SPI_SO

4

R510 0_0402_5%@R510 0_0402_5%@

1 2

FCH_SPICLK

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH-SATA/SPI

LA-7091P

15 48Tuesday, December 07, 2010

1

0.1

A

+3VS

1

C113

GPIO I/F implem ented: tied to +1.8V_S0

1 1

+1.8VS

R632

1 2

0_0603_5%

@

GPIO I/F not im plemented: tied to +1.8V_S0 or 0 o hm to ground

12

R633

Check pop or not in A-Test??

+3VS

2

C114

C115

2

22U_0805_6.3V6M

0_0402_5%

L44

FBMA-L11-160808-221LMT_2P

C115

1

0.1U_0402_16V7K

2

C69

C744

@

1

4.7U_0603_6.3V6K

12

0805 0ohm?

+1.1VS

L45

FBMA-L11-201209-221LMA30T_0805

2 2

+3VALW

FBMA-L11-201209-221LMA30T_0805

+1.1VALW

3 3

12

L46

12

C85

L48

FBMA-L11-160808-221LMT_2P

12

1

C78

C77

2

22U_0805_6.3V6M

1U_0402_6.3V6K

1

C86

C87

2

10U_0603_6.3V6M

C87

2

10U_0603_6.3V6M

2

C116

1

0.1U_0402_16V7K

+VDDIO_18_FC

2

@

C746

1

0.1U_0402_16V7K

+VDDPL33_PCIE

1

C76

2

+PCIE_VDDAN

2.2U_0603_6.3V6K

2

C79

2

C80

1

0.1U_0402_16V7K

+VDDPL_33_SATA

+AVDD_SATA

1354.2mA

+AVDD_USB

534.5mA

1

C89

C88

2

1U_0402_6.3V6K

1

C93

2

0.1U_0402_16V7K

+VDDAN_11_USB

2

88.6mA

C94

1

0.1U_0402_16V7K

2.2U_0603_6.3V6K

42mA

0.16mA

22.5mA

1115.6mA

15.5mA

B

U31C

AH1

VDDIO_33_PCIGP_1

V6

VDDIO_33_PCIGP_2

Y19

VDDIO_33_PCIGP_3

AE5

VDDIO_33_PCIGP_4

AC21

VDDIO_33_PCIGP_5

AA2

VDDIO_33_PCIGP_6

AB4

VDDIO_33_PCIGP_7

AC8

VDDIO_33_PCIGP_8

AA7

VDDIO_33_PCIGP_9

AA9

VDDIO_33_PCIGP_10

AF7

VDDIO_33_PCIGP_11

AA19

VDDIO_33_PCIGP_12

AF22

VDDIO_18_FC_1

AE25

VDDIO_18_FC_2

AF24

VDDIO_18_FC_3

AC22

VDDIO_18_FC_4

AE28

VDDPL_33_PCIE

U26

VDDAN_11_PCIE_1

V22

VDDAN_11_PCIE_2

V26

VDDAN_11_PCIE_3

V27

VDDAN_11_PCIE_4

V28

VDDAN_11_PCIE_5

V29

VDDAN_11_PCIE_6

W22

VDDAN_11_PCIE_7

W26

VDDAN_11_PCIE_8

AD14

VDDPL_33_SATA

AJ20

VDDAN_11_SATA_1

AF18

VDDAN_11_SATA_4

AH20

VDDAN_11_SATA_2

AG19

VDDAN_11_SATA_3

AE18

VDDAN_11_SATA_5

AD18

VDDAN_11_SATA_6

AE16

VDDAN_11_SATA_7

A18

VDDAN_33_USB_S_1

A19

VDDAN_33_USB_S_2

A20

VDDAN_33_USB_S_3

B18

VDDAN_33_USB_S_4

B19

VDDAN_33_USB_S_5

B20

VDDAN_33_USB_S_6

C18

VDDAN_33_USB_S_7

C20

VDDAN_33_USB_S_8

D18

VDDAN_33_USB_S_9

D19

VDDAN_33_USB_S_10

D20

VDDAN_33_USB_S_11

E19

VDDAN_33_USB_S_12

C11

VDDAN_11_USB_S_1

D11

VDDAN_11_USB_S_2

21807-A11-HUDSON-M1_FCBGA605

POWER

PCI/GPIO I/O

FLASH I/O

PCI EXPRESS

SERIAL ATA

USB I/O

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDRF_GBE_S

VDDIO_33_GBE_S

GBE LAN

VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2

VDDIO_GBE_S_1 VDDIO_GBE_S_2

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

CORE S5CORE S0 CLKGEN I/O 3.3V_S5 I/O

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

VDDPL_33_SYS

PLL

VDDPL_11_SYS_S

VDDPL_33_USB_S

VDDAN_33_HWM _S

VDDXL_33_S

C

N13 R15 N17 U13 U17 V12 V18 W12 W18

+VDDAN_11_CLK

K28 K29 J28 K26 J21 J20 K21 J22

V1

M10

L7 L9

M6 P8

49.5mA

A21 D21 B21 K10 L10 J9 T6 T8

F26 G26

15.3mA

M8

58mA

A11 B11

46.5mA

M21

65.3mA

L22

16.1mA

F19

11.4mA

D6

+VDDXL_33_S

L20

5mA

979.4mA

165.2mA

+VDDCR_11_USB

1

C738

2

0.1U_0402_16V7K

382.9mA

1

C72

2

0.1U_0402_16V7K

+VDDIO_AZ

+VDDPL33

+VDDPL11

+AVDD_USB

+VDDAN33_HWM

1

C95

2

2.2U_0603_6.3V6K

1

C70

C117

2

1

C73

2

1

C81

2

1

C83

2

FBMA-L11-160808-221LMT_2P

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C74

2

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C82

2

2.2U_0603_6.3V6K

1

C84

2

1U_0402_6.3V6K

L49

12

D

C118

C75

2

1U_0402_6.3V6K

10U_0603_6.3V6M

1

C743

2

1U_0402_6.3V6K

22U_0805_6.3V6M

+3VALW

+1.1VALW

1

C90

C91

2

0.1U_0402_16V7K

+3VS

1

C71

C118

+1.1VS

0805 0ohm?

L43

FBMA-L11-201209-221LMA30T_0805

12

+VDDCR_11_USB

FBMA-L11-160808-221LMT 0603

Reserve

FBMA-L11-201209-221LMA30T_0805

1

2

0.1U_0402_16V7K

FBMA-L11-201209-221LMA30T_0805

1

C92

Check 0_0805 or bead in A-Test

2

10U_0603_6.3V6M

+1.1VS

@

L107

12

5

VOUT

4

FB

L47

12

+1.1VALW

APL5317

+1.1VS

C119

1

+

2

VIN

GND

EN

E

330U_D2_2.5VY_R9M

@

U85

1

1U_0402_6.3V6K

2

3

1 2

C989

@

C68

+3VALW

1

2

10U_0603_6.3V6M

0805 0ohm?

L51

+3VS

+1.1VALW

4 4

+3VS

L51

FBMA-L11-160808-221LMT_2P

C777 2.2U_0603_6.3V6KC777 2.2U_0603_6.3V6K

1 2

L52

FBMA-L11-160808-221LMT_2P

C99 2.2U_0603_6.3V6KC99 2.2U_0603_6.3V6K

1 2

L55

FBMA-L11-160808-221LMT_2P

C120 2.2U_0603_6.3V6KC120 2.2U_0603_6.3V6K

1 2

+VDDPL_33_SATA

12

+VDDPL11

12

+VDDPL33

12

A

+1.1VS

+3VALW

L50

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-160808-221LMT_2P

12

L53

12

B

1

C96

1

C100

2

1

C97

2

22U_0805_6.3V6M

1U_0402_6.3V6K

+VDDAN33_HWM

2

C782

1

0.1U_0402_16V7K

2.2U_0603_6.3V6K

1

C775

C778

2

1U_0402_6.3V6K

+AVDD_SATA

1

C776

2

0.1U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VDDIO_AZ +3VALW

@

1 2

R634 0_0603_5%

1 2

R635 0_0603_5%R635 0_0603_5%

1

C98

2.2U_0603_6.3V6K

2

2010/08/04 2010/08/04

C

For 3V AZ device

Compal Secret Data

Deciphered Date

+3VS

For DVT 1011

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FCH PWR

LA-7091P

16 48Friday, October 29, 2010

E

0.1

5

4

3

2

1

D D

C C

B B

U31D

Y14

VSSIO_SATA_1

Y16

VSSIO_SATA_2

AB16

VSSIO_SATA_3

AC14

VSSIO_SATA_4

AE12

VSSIO_SATA_5

AE14

VSSIO_SATA_6

AF9

VSSIO_SATA_7

AF11

VSSIO_SATA_8

AF13

VSSIO_SATA_9

AF16

VSSIO_SATA_10

AG8

VSSIO_SATA_11

AH7

VSSIO_SATA_12

AH11

VSSIO_SATA_13

AH13

VSSIO_SATA_14

AH16

VSSIO_SATA_15

AJ7

VSSIO_SATA_16

AJ11

VSSIO_SATA_17

AJ13

VSSIO_SATA_18

AJ16

VSSIO_SATA_19

A9

VSSIO_USB_1

B10

VSSIO_USB_2

K11

VSSIO_USB_3

B9

VSSIO_USB_4

D10

VSSIO_USB_5

D12

VSSIO_USB_6

D14

VSSIO_USB_7

D17

VSSIO_USB_8

E9

VSSIO_USB_9

F9

VSSIO_USB_10

F12

VSSIO_USB_11

F14

VSSIO_USB_12

F16

VSSIO_USB_13

C9

VSSIO_USB_14

G11

VSSIO_USB_15

F18

VSSIO_USB_16

D9

VSSIO_USB_17

H12

VSSIO_USB_18

H14

VSSIO_USB_19

H16

VSSIO_USB_20

H18

VSSIO_USB_21

J11

VSSIO_USB_22

J19

VSSIO_USB_23

K12

VSSIO_USB_24

K14

VSSIO_USB_25

K16

VSSIO_USB_26

K18

VSSIO_USB_27

H19

VSSIO_USB_28

Y4

EFUSE

D8

VSSAN_HWM

M19

VSSXL

P21

VSSIO_PCIECLK_1

P20

VSSIO_PCIECLK_2

M22

VSSIO_PCIECLK_3

M24

VSSIO_PCIECLK_4

M26

VSSIO_PCIECLK_5

P22

VSSIO_PCIECLK_6

P24

VSSIO_PCIECLK_7

P26

VSSIO_PCIECLK_8

T20

VSSIO_PCIECLK_9

T22

VSSIO_PCIECLK_10

T24

VSSIO_PCIECLK_11

V20

VSSIO_PCIECLK_12

J23

VSSIO_PCIECLK_13

21807-A11-HUDSON-M1_FCBGA605

GND

VSSPL_SYS

VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

DEBUG STRAPS

FCH M1 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

PULL HIGH

PULL LOW

REQUIRED STRAPS

PCI_CLK1

PULL HIGH

PULL LOW

PCI_CLK2<13> PCI_CLK1<13> PCI_CLK3<13> PCI_CLK4<13> LPC_CLK0<13> LPC_CLK1<13> EC_PWM2< 14> EC_PWM3< 14> RTC_CLK<13,31>

WATCHDOG TIMER ENABLE

TIMER DISABLE

DEFAULT

10K_0402_5%

PCI_AD27

USE internal PLL generated PLL CLK

DEFAULT

BYPASS PCI PLL

ALLOW PCIE GEN2

DEFAULT

FORCE PCIE GEN1

+3VS +3VS +3VS +3VS +3VALW +3VALW+3VALW +3VALW+3VALW

12

R636

R649

@

R650

@

10K_0402_5%

12

R640

@

10K_0402_5%

12

10K_0402_5%

PCI_AD26

ILA AUTORUN Disabled

DEFAULT

ILA AUTORUN

Enabled

R637

@

R641

PCI_AD25 PCI_AD24

Selects FC PLL

DEFAULT

FC PLL bypassed

Check Internal PU/PD

PCI_CLK3

USE DEBUG STRAP

IGNORE DEBUG STRAP

DEFAULT

12

R638

@

10K_0402_5%

12

R642

10K_0402_5%

Disable I2C ROM

DEFAULT

Getting Value from I2C EPROM

PCI_CLK4

NON Fusion CLOCK Mode

Fusion CLOCK Mode

DEFAULT

12

R639

@

10K_0402_5%

12

R643

10K_0402_5%

LPC_CLK0

internal EC ENABLE

internal EC DISABLE

DEFAULT

12

R594

R166

10K_0402_5%

12

R601

R167

@

PCI_AD23 Enable ROM Straps

2.2K_0402_5%

Required Setting

DEFAULT

Reserved

R550

R602

LPC_CLK1PCI_CLK2

Internal CLKGEN Mode

DEFAULT

External CLKGEN Mode

12

@

12

R551

10K_0402_5%

12

R625

@

2.2K_0402_5%

RTC_CLK

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

EC_PWM3EC_PWM2

LPC ROM (H.L)

DEFAULT

SPI ROM(L,H)WATCHDOG

PCI_AD27<13> PCI_AD26<13> PCI_AD25<13> PCI_AD24<13> PCI_AD23<13>

12

R644

@

2.2K_0402_5%

12

R645

@

2.2K_0402_5%

R646

@

12

R647

@

2.2K_0402_5%

12

R648

@

2.2K_0402_5%

12

check defaultCheck AD29,AD28 strap function

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

FCH-VSS/Strap

LA-7091P

17 48Tuesday, December 07, 2010

1

0.1

A

B

C

D

E

GFX PCIE LANE REVERSAL

U2A

1 1

2 2

3 3

PCIE_FTX_C_GRX_P[0..3]<6>

PCIE_FTX_C_GRX_N[0..3]<6>

U2

Robson@U2

Robson@

Robson XT-M2 A11

Robson A11 (SA00004DR20)

PCIE_FTX_C_GRX_P[0..3]

PCIE_FTX_C_GRX_N[0..3]

PCIE_FTX_C_GRX_P0 PCIE_FTX_C_GRX_N0

PCIE_FTX_C_GRX_P1 PCIE_FTX_C_GRX_N1

PCIE_FTX_C_GRX_P2 PCIE_FTX_C_GRX_N2

PCIE_FTX_C_GRX_P3 PCIE_FTX_C_GRX_N3

CLK_PCIE_VGA<13> CLK_PCIE_VGA#<13>

AH16 Accessiable for "Test Purposes" Connect to GND for "Normal Operation"

VGA@

R5 10K_0402_5%

VGA_RST#

U2A

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AH16

12

PWRGOOD

AA30

PERSTB

VGA@

2160809000A11SEYMOU_FCBGA962

Seymour XT P/N: SA000047H00 (S IC 216-0809000 A11 SEYMOUR XT M2 0FH)

Robson XT P/N: SA00004DR20 (S IC 216-0774211 A11 Robson XT M2 )

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

CALIBRATION

PCIE_CALRP

PCIE_CALRN

PCIE_GTX_C_FRX_P[0..3]

PCIE_GTX_C_FRX_N[0..3]

Y33

PCIE_GTX_FRX_N0

Y32

PCIE_GTX_FRX_P1

W33

PCIE_GTX_FRX_N1

W32

PCIE_GTX_FRX_P2

U33

PCIE_GTX_FRX_N2

U32

U30

PCIE_GTX_FRX_N3

U29

T33 T32

T30 T29

P33 P32

P30 P29

N33 N32

N30 N29

L33 L32

L30 L29

K33 K32

J33 J32

K30 K29

H33 H32

VGA@

Y30

1 2

R3 1.27K_0402_1%

VGA@

1 2

Y29

R6 2K_0402_1%

PCIE_GTX_C_FRX_P[0..3] <6>

PCIE_GTX_C_FRX_N[0..3] <6>

C1 0. 1U_0402_16V7K

1 2

C2 0. 1U_0402_16V7K

1 2

VGA@

C3 0. 1U_0402_16V7K

1 2

C4 0. 1U_0402_16V7K

1 2

VGA@

C5 0. 1U_0402_16V7K

1 2

C6 0. 1U_0402_16V7K

1 2

VGA@

C7 0. 1U_0402_16V7K

1 2

C8 0. 1U_0402_16V7K

1 2

VGA@

+1.0VSG

PCIE_GTX_C_FRX_P0PCIE_GTX_FRX_P0 PCIE_GTX_C_FRX_N0

PCIE_GTX_C_FRX_P1 PCIE_GTX_C_FRX_N1

PCIE_GTX_C_FRX_P2 PCIE_GTX_C_FRX_N2

PCIE_GTX_C_FRX_P3PCIE_GTX_FRX_P3 PCIE_GTX_C_FRX_N3

U2G

2160809000A11SEYMOU_FCBGA962

PE_GPIO0<13>

PLT_RST#<13,26,27,29,33>

LVDS CONTROL

LVTMDP

R394

2.2K_0402_5%

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N

12

@

2

1

1 2

R159 0_0402_5%

TXOUT_U3P

TXOUT_U3N

TXOUT_L3P TXOUT_L3N

+3VSG

B

A

DISO@

AK27

VARY_BL

AJ27

DIGON

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

VGA@

U16

5

PX@

P

VGA_RST#

4

Y

G

3

NC7SZ08P5X_NL_SC70-5

add for VB support.

R1

R1 10K_0402_5%

10K_0402_5%

1 2

VGA@

R2

1 2

10K_0402_5%

VGA@

VGA_TXCLK+ VGA_TXCLK-

VGA_TXOUT0+ VGA_TXOUT0-

VGA_TXOUT1+ VGA_TXOUT1-

VGA_TXOUT2+ VGA_TXOUT2-

VGA_INVT_PWM <10> VGA_ENVDD <10>

VGA_TXCLK+ <10> VGA_TXCLK- <10>

VGA_TXOUT0+ <10> VGA_TXOUT0- <10>

VGA_TXOUT1+ <10> VGA_TXOUT1- <10>

VGA_TXOUT2+ <10> VGA_TXOUT2- <10>

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2010/08/04 2010/08/04

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Madison_ PCIE / LVDS

LA-7091P

E

0.1

18 48T uesday, December 07, 2010

0.1

5

Strap Name Pin Straps description <all internal PD>

VIP_DEVICE_EN

(GENLK_VSYNC)

VGA_DIS

TX_PWRS_ENB

D D

TX_DEEMPH_EN

CONFIG[2] CONFIG[1] CONFIG[0]

BIOS_ROM_EN

AUD[1] AUD(0)

BIF_GEN2_EN

RESERVED

+3VSG

R11 10K_0402_5%VGA@ R11 10K_0402_5%VGA@ R13 10K_0402_5%VGA@ R13 10K_0402_5%VGA@ R15 10K_0402_5%@R15 10K_0402_5%@ R16 10K_0402_5%@R16 10K_0402_5%@ R17 10K_0402_5%@R17 10K_0402_5%@ R18 10K_0402_5%VGA@ R18 10K_0402_5%VGA@

Seymour(XT)

Location

VRAM

R19 10K_0402_5%@R19 10K_0402_5%@ R20 10K_0402_5%@R20 10K_0402_5%@ R21 10K_0402_5%DISO@R21 10K_0402_5%DISO@ R22 10K_0402_5%DISO@R22 10K_0402_5%DISO@ R23 10K_0402_5%@R23 10K_0402_5%@ R24 10K_0402_5%@R24 10K_0402_5%@ R25 10K_0402_5%@R25 10K_0402_5%@ R26 10K_0402_5%@R26 10K_0402_5%@ R27 10K_0402_5%@R27 10K_0402_5%@ R28 10K_0402_5%@R28 10K_0402_5%@

C C

Hynix (512M)

Samsung (512M)

Check option2 need to be added or not?

+1.8VSG

B B

A A

+3VSG

HY@

SA@

CLK_GPIO10

ROMSE_GPIO22

R51 0_0402_5%

@

R52 0_0402_5%

XTALOUT

18P_0402_50V8J

VIP Device Strap Enable indicates to the software driver 0: Driver would ignore the value sampled on VHAD_0 during reset

V2SYNC

1: VHAD_0 to determine whether or not a VIP slave device

VGA Disable determines 0: VGA Controller capacity enabled

GPIO9

1: The device will not be recognized as the system’s VGA controller

Transmitter Power Saving Enable

GPIO0

0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable

GPIO1

0: Tx de-emphasis diabled for mobile mode 1: Tx de-emphasis enabled (Defailt setting for desktop)

GPIO13,12,11 (config 2,1,0) : a) If BIOS_ROM_EN = 1, then Config[2:0] defines

GPIO13 GPIO12

the ROM type.

GPIO11

b) If BIOS_ROM_EN = 0, then Config[2:0] defines the primary memory aperture size.

GPIO22 Enable external BIOS ROM device

0: Diable, 1: Enable

00: No audio function; 10: Audio for DisplayPort only;

HSYNC

01: Audio for DisplayPort and HDMI if adapter is detected;

VSYNC

11: Audio for both DisplayPort and HDMI 0= Advertises the PCI-E device as 2.5 GT/s capable at power-on

GPIO2

1= Advertises the PCI-E device as 5.0 GT/s capable at power-on

5.0 GT/s capability will be controlled by software

H2SYNC

Internal use only. THIS PAD HAS AN INTERNAL

(GENLK_CLK)

PULL-DOWN AND MUST BE 0 V AT RESET. The pad may be left unconnected

GPIO8 GPIO21 GENERICC GPIO5

R40

R46

R531M_0603_5%

1

R41

10K_0402_5%

R41

10K_0402_5%

12

SA@

R47

10K_0402_5%

R47

10K_0402_5%

12

HY@

Q

VSS

@

C36

VGA@

18P_0402_50V8J

VGA_GPIO0 VGA_GPIO1 VGA_GPIO2

SOUT_GPIO8

SIN_GPIO9 VGA_GPIO11 VGA_GPIO12 VGA_GPIO13

VGA_CRT_VSYNC VGA_CRT_HSYNC

GENERICC

V2SYNC

H2SYNC BB_EN_GPIO21 ROMSE_GPIO22

VGA_GPIO5

VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3

SOUT_GPIO8SI N_GPIO9

2

TYPE 1

4

27MCLK

O

1

Internal PD

PD-Reset

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

VRAM_ID2 VRAM_ID1 VRA M_ID0

VRAM_ID3

1

O

R39

10K_0402_5%

R39

10K_0402_5%

R38

10K_0402_5%

R38

10K_0402_5%

12

VGA@

HYSA@

HY@

R45

10K_0402_5%

R45

10K_0402_5%

R44

10K_0402_5%

R44

10K_0402_5%

12

X76@

SA@

FLASH ROM

U5

5

D

6

C

1

S

7

HOLD

3

12

W

8

12

VCC

2

M25P10-AVMN6P

C31

@

0.1U_0402_16V4Z

1

VGA@

Y1

2 1

27MHZ_16PF_X5H027000FG1H

C35

5

10K_0402_5%

VGA@Y1

VGA@

memory apertures CONFIG[3:0] 128 MB 000 256 MB 001 * 64 MB 010

SA000041S40 Hynix 64MX16 H5TQ1G63DER-11C

SA00004GS10 Samsung 64M16 K4W1G1646G-BC11

+1.0VSG

L4

BLM18AG121SN1D_0603

VGA@

470ohm/1A

AL31 Manhattan/Vancouver is NC, Boardway is ADC input(0-1V) use measure regulator current or temperature

Setting

0

1

001

0

11

0

DNI

VGA_ENBKL<10>

+1.8VSG

L3

BLM18AG121SN1D_0603

VGA@

470ohm/1A

12

1

2

VGA@

+1.8VSG

L5

BLM18AG121SN1D_0603

VGA@

120ohm/0.3A

4

Don't have this strap on Whistler and Seymour

NC on Park, Robson and Seymour

NC on Park and Robson

NC on Park, Robson and Seymour

+3VSG

R12 4.7K_0402_5%VGA@R12 4.7K_0402_5%VGA@ R14 4.7K_0402_5%VGA@R14 4.7K_0402_5%VGA@

VGA_LCD_CLK<10> VGA_LCD_DAT<10>

GPIO_0 will use to control PSI in the future product

12

R29

VGA@R 29

VGA@

10K_0402_5%

GPU_VID0<45>

GPU_VID1<45>

VGA_HDMI_DET<11>

R42 499_0402_1%VGA@R42 499_0402_1%VGA@

1 2

R43 249_0402_1%VGA@R43 249_0402_1%VGA@

1 2

C21 0.1U_0402_16V4Z

12

10U_0603_6.3V6M

C25

1

2

VGA@

0.1U_0402_16V4Z

10U_0603_6.3V6M

C29

C28

4

VGA@

1

2

VGA@

12

C32

10U_0603_6.3V6M

C32

10U_0603_6.3V6M

1

2

VGA@

1 2 1 2

VGA_LCD_CLK VGA_LCD_DAT

T1T1

T2T2 T3T3 T4T4 T5T5 T6T6 T7T7

VGA@

0.1U_0402_16V4Z

0.1U_0402_16V4Z C26

C26

1

2

+DPLL_VDDC

1U_0402_6.3V4Z

C30

GPU_THERM_D+ GPU_THERM_D-

+TSVDD

C33

1U_0402_6.3V4Z

C33

1U_0402_6.3V4Z

VGA@

VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3

VGA_GPIO0 VGA_GPIO1 VGA_GPIO2

VGA_GPIO5

VGA_ENBKL SOUT_GPIO8 SIN_GPIO9 CLK_GPIO10 VGA_GPIO11 VGA_GPIO12 VGA_GPIO13

GPU_VID0

THM_ALERT#

GPU_VID1 BB_EN_GPIO21 ROMSE_GPIO22

GENERICC

NC on Park

VGA_HDMI_DET

+DPLL_PVDD

1U_0402_6.3V4Z

1

2

VGA@

1 2

R49 0_0402_5%@R 49 0_0402_5%@

1 2

R50 0_0402_5%@R 50 0_0402_5%@

C34

0.1U_0402_16V4Z

C34

0.1U_0402_16V4Z

1

2

C27

15mil

+VGA_VREF

10mil

27MCLK XTALOUT

10mil

U2B

MUTI GFX

AR8

NC_DVPCNTL_ MVP_0

AU8

NC_DVPCNTL_ MVP_1

AP8

NC_DVPCNTL_ 0

AW8

NC_DVPCNTL_ 1

AR3

NC_DVPCNTL_ 2

AR1

NC_DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

NC_DVPDATA_ 17

AV11

NC_DVPDATA_ 18

AT11

NC_DVPDATA_ 19

AR12

NC_DVPDATA_ 20

AW12

NC_DVPDATA_ 21

AU12

NC_DVPDATA_ 22

AP12

NC_DVPDATA_ 23

AJ21

SWAPL OCKA

AK21

SWAPL OCKB

I2C

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_ SMBDATA

AJ23

GPIO_4_ SMBCLK

AH17

GPIO_5_ AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_ BLON

AJ13

GPIO_8_ ROMSO

AH15

GPIO_9_ ROMSI

AJ16

GPIO_10 _ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14 _HPD2

AM13

GPIO_15 _PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17 _THERMAL_INT

AN14

GPIO_18 _HPD3

AM17

GPIO_19 _CTF

AL13

GPIO_20 _PWRCNTL_1

AJ14

GPIO_21 _BB_EN

AK13

GPIO_22 _ROMCSB

AN13

GPIO_23 _CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_ HPD4

AH26

NC_GENERI CF_HPD5

AH24

NC_GENERI CG_HPD6

AK24

HPD1

AH13

VREFG

AM32

DPLL_PV DD

AN32

DPLL_PV SS

AN31

DPLL_VDD C

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AL31

TS_A/NC

AJ32

TSVDD

AJ33

TSVSS

21608090 00A11SEYMOU_FCBGA962

75mA

PLL/CLOCK

125mA

THERMAL

20mA

3

TXCAP_DPA3 P TXCAM_DPA3 N

TX0P_DPA2 P

TX0M_DPA2N

DPA

TX1P_DPA1 P

TX1M_DPA1N

TX2P_DPA0 P

TX2M_DPA0N

TXCBP_DPB3 P TXCBM_DPB3 N

TX3P_DPB2 P

TX3M_DPB2N

DPB

TX4P_DPB1 P

TX4M_DPB1N

TX5P_DPB0 P

TX5M_DPB0N

TXCCP_DPC3P TXCCM_DPC3N

TX0P_DPC2 P

TX0M_DPC2N

DPC

TX1P_DPC1 P

TX1M_DPC1N

TX2P_DPC0 P

TX2M_DPC0N

NC_TXCDP_DP D3P

NC_TXCDM_DPD 3N

NC_TX3P_DP D2P NC_TX3M_DPD 2N

DPD

NC_TX4P_DP D1P NC_TX4M_DPD 1N

NC_TX5P_DP D0P NC_TX5M_DPD 0N

DAC1

HSYNC VSYNC

RSET

70mA

AVDD

AVSSQ

45mA

VDD1DI VSS1DI

R2/NC

R2B/NC

G2/NC

G2B/NC

B2/NC

B2B/NC

C/NC

Y/NC

COMP/NC

DAC2

H2SYNC/GENL K_CLK

V2SYNC/GE NLK_VSYNC

100mA

VDD2DI/NC VSS2DI/NC

130mA

A2VDD/NC

2mA

A2VDDQ/NC

A2VSSQ/ TSVSSQ

R2SET/NC

DDC/AUX

DDC1CLK

DDC1DATA

AUX1P AUX1N

DDC2CLK

DDC2DATA

AUX2P AUX2N

DDCCLK_AUX 3P

DDCDATA_AUX 3N

NC_DDCCLK_ AUX4P

NC_DDCDATA_A UX4N

DDCCLK_AUX 5P

DDCDATA_AUX 5N

DDC6CLK

DDC6DATA

NC_DDCCLK_ AUX7P

NC_DDCDATA_A UX7N

VGA@

3

2

External VGA Thermal Sensor

VGA@

GPU_THERM_D+

2200P_0402_50V7K

VGA@

C11

GPU_THERM_D-

4.7K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

12

+1.8VSG

12

+1.8VSG

+3VSG

0.1U_0402_16V4Z

1

C10

2

1 2

ADM1032ARMZ-2REEL_MSOP8

Address

+3VSG

R9

VGA@

1 2

NC on Whistler and Seymour

In Whistler and Seymour, change to GENLK_CLK, GENLK_VSYNC for Global Swap Lock on multiple GPUs

Except A2VSSQ change to TSVSSQ, others are NC on Whistler and Seymour

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

Not share via for other GND

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36 AC38

AB34

AD34 AE34

AC33 AC34

AC30 AC31

AD30 AD31

AF30 AF31

AC32 AD32 AF32

AD29 AC29

AG31 AG32

AG33

AD33

AF33

AA29

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30 AM30

AL29 AM29

AN21 AM21

AJ30 AJ31

AK30 AK29

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VGA_HDMI_TXC+ <11> VGA_HDMI_TXC- <11>

VGA_HDMI_TXD0+ <11> VGA_HDMI_TXD0- <11>

VGA_HDMI_TXD1+ <11> VGA_HDMI_TXD1- <11>

VGA_HDMI_TXD2+ <11> VGA_HDMI_TXD2- <11>

NC on Park, Robson and Seymour

VGA_CRT_R <12>

VGA_CRT_G <12>

VGA_CRT_B <12>

VGA_CRT_HSYNC <12> VGA_CRT_VSYNC <12>

R30 499_0402_1%VGA@R30 499_0402_1%VGA@

1 2

10mil

+AVDD

10mil

+VDD1DI

H2SYNC V2SYNC

10mil

+VDD1DI

10mil

+A2VDD

10mil

+A2VDDQ

R48

715_0402_1%

1 2

VGA@

VGA_HDMI_SCLK VGA_HDMI_SDATA

NC on Park, Robson and Seymour

VGA_CRT_CLK VGA_CRT_DATA

NC on Park, Robson and Seymour

HDMI

L78

L78 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

22U_0805_6.3V6M

0.1U_0402_16V4Z

1U_0402_6.3V4Z

C12

1

2

VGA@

1U_0402_6.3V4Z

C15

1

2

VGA@

1U_0402_6.3V4Z

C18

1

2

VGA@

C22

1U_0402_6.3V4Z

C22

1U_0402_6.3V4Z

1

2

VGA_HDMI_SCLK <11> VGA_HDMI_SDATA <11>

VGA_CRT_CLK <12> VGA_CRT_DATA <12>

2010/08/04 2010/08/04

C14

C13

1

2

VGA@

0.1U_0402_16V4Z

10U_0603_6.3V6M

C16

C17

1

2

VGA@

0.1U_0402_16V4Z

10U_0603_6.3V6M

C19

1

2

VGA@

C23

10U_0603_6.3V6M

C23

10U_0603_6.3V6M

C24

0.1U_0402_16V4Z

C24

0.1U_0402_16V4Z

1

2

HDMI

CRT

Compal Secret Data

Deciphered Date

VGA@

120ohm/0.3A

L79

L79 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

VGA@

120ohm/0.3A

+3VSG

C20

+1.8VSG

2

U4

1

VDD

2

D+

3

D-

THERM#4GND

R10

4.7K_0402_5%

VGA@

1 2

1

VGA@U4

VGA@

SCLK

SDATA

ALERT#

1001 101X b

2

Q1A D MN66D0LDW-7_SOT363-6

VGA_CRT_CLK VGA_CRT_DATA

VGA_CRT_R VGA_CRT_G VGA_CRT_B

Date: Sheet of

VGA_SMB_CK2

8

VGA_SMB_DA2

7

6

5

+3VSG

5

4

Q1B

VGA@Q1B

VGA@

DMN66D0LDW-7_SOT363-6

61

VGA@

Title

Madison_Strape/DP/HDMI//CRT

Size Doc ument Number Rev

Custom

LA-7091P

THM_ALERT#

12

R7

0_0402_5%

1 2

VGA@

R8 4.7K_0402_5%

VGA@

EC_SMB_CK2

3

EC_SMB_DA2

EC_SMB_CK2 <5,31>

EC_SMB_DA2 <5,31>

R33 10K_0402_5%VGA@ R33 10K_0402_5%VGA@

1 2

R34 10K_0402_5%VGA@ R34 10K_0402_5%VGA@

1 2

R35 150_0402_1%VGA@ R35 150_0402_1%VGA@

1 2

R36 150_0402_1%VGA@ R36 150_0402_1%VGA@

1 2

R37 150_0402_1%VGA@ R37 150_0402_1%VGA@

1 2

Compal Electronics, Inc.

1

+3VSG

0.1

19 48Tuesday, December 07, 2010

0.1

A

Robson,Seymour only support single channel memory (channel B only)

U2D

DDR2

U2C

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C37

NC_DQA0_0/DQA_0

C35

NC_DQA0_1/DQA_1

A35

NC_DQA0_2/DQA_2

E34

NC_DQA0_3/DQA_3

G32

NC_DQA0_4/DQA_4

D33

NC_DQA0_5/DQA_5

F32

NC_DQA0_6/DQA_6

E32

NC_DQA0_7/DQA_7

D31

NC_DQA0_8/DQA_8

F30

NC_DQA0_9/DQA_9

C30

NC_DQA0_10/DQA_10

A30

NC_DQA0_11/DQA_11

F28

NC_DQA0_12/DQA_12

C28

NC_DQA0_13/DQA_13

A28

NC_DQA0_14/DQA_14

E28

+1.5VSG

12

R54

VGA@

40.2_0402_1 %

100_0402_ 1%

1 1

40.2_0402_1 %

100_0402_ 1%

R55

VGA@

R58

VGA@

R59

VGA@

+1.5VSG

12

MVREFDA

0.1U_0402_16V4Z

1

C37

VGA@

2

MVREFSA

C39

0.1U_0402_16V4Z

C39

0.1U_0402_16V4Z

1

2

VGA@

R62 243_0 402_1%VGA@R62 2 43_0402_1%VGA@ R63 243_0 402_1%VGA@R63 2 43_0402_1%VGA@ R64 243_0 402_1%VGA@R64 2 43_0402_1%VGA@

R66 243_0 402_1%VGA@R66 2 43_0402_1%VGA@ R67 243_0 402_1%VGA@R67 2 43_0402_1%VGA@ R69 243_0 402_1%VGA@R69 2 43_0402_1%VGA@

MVREFDA MVREFSA

12 12 12

NC_DQA0_15/DQA_15

D27

NC_DQA0_16/DQA_16

F26

NC_DQA0_17/DQA_17

C26

NC_DQA0_18/DQA_18

A26

NC_DQA0_19/DQA_19

F24

NC_DQA0_20/DQA_20

C24

NC_DQA0_21/DQA_21

A24

NC_DQA0_22/DQA_22

E24

NC_DQA0_23/DQA_23

C22

NC_DQA0_24/DQA_24

A22

NC_DQA0_25/DQA_25

F22

NC_DQA0_26/DQA_26

D21

NC_DQA0_27/DQA_27

A20

NC_DQA0_28/DQA_28

F20

NC_DQA0_29/DQA_29

D19

NC_DQA0_30/DQA_30

E18

NC_DQA0_31/DQA_31

C18

NC_DQA1_0/DQA_32

A18

NC_DQA1_1/DQA_33

F18

NC_DQA1_2/DQA_34

D17

NC_DQA1_3/DQA_35

A16

NC_DQA1_4/DQA_36

F16

NC_DQA1_5/DQA_37

D15

NC_DQA1_6/DQA_38

E14

NC_DQA1_7/DQA_39

F14

NC_DQA1_8/DQA_40

D13

NC_DQA1_9/DQA_41

F12

NC_DQA1_10/DQA_42

A12

NC_DQA1_11/DQA_43

D11

NC_DQA1_12/DQA_44

F10

NC_DQA1_13/DQA_45

A10

NC_DQA1_14/DQA_46

C10

NC_DQA1_15/DQA_47

G13

NC_DQA1_16/DQA_48

H13

NC_DQA1_17/DQA_49

J13

NC_DQA1_18/DQA_50

H11

NC_DQA1_19/DQA_51

G10

NC_DQA1_20/DQA_52

G8

NC_DQA1_21/DQA_53

K9

NC_DQA1_22/DQA_54

K10

NC_DQA1_23/DQA_55

G9

NC_DQA1_24/DQA_56

A8

NC_DQA1_25/DQA_57

C8

NC_DQA1_26/DQA_58

E8

NC_DQA1_27/DQA_59

A6

NC_DQA1_28/DQA_60

C6

NC_DQA1_29/DQA_61

E6

NC_DQA1_30/DQA_62

A5

NC_DQA1_31/DQA_63

L18

NC_MVREFDA

L20

NC_MVREFSA

L27

NC_MEM_CALRN0

N12

MEM_CALRN1

AG12

NC_MEM_CALRN2

M12

MEM_CALRP1

M27

NC_MEM_CALRP0

AH12

NC_MEM_CALRP2

2160809000A11SEYMOU_FCBGA9 62

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

NC_MAA0_0/MAA_0 NC_MAA0_1/MAA_1 NC_MAA0_2/MAA_2 NC_MAA0_3/MAA_3 NC_MAA0_4/MAA_4 NC_MAA0_5/MAA_5 NC_MAA0_6/MAA_6 NC_MAA0_7/MAA_7 NC_MAA1_0/MAA_8

NC_MAA1_1/MAA_9 NC_MAA1_2/MAA_10 NC_MAA1_3/MAA_11 NC_MAA1_4/MAA_12

NC_MAA1_5/MAA_13_BA2 NC_MAA1_6/MAA_14_BA0

NC_MAA1_7/MAA_A15_BA1

NC_WCKA0_0/DQMA_0

NC_WCKA0B_0/DQMA_1

NC_WCKA0_1/DQMA_2

NC_WCKA0B_1/DQMA_3

NC_WCKA1_0/DQMA_4

NC_WCKA1B_0/DQMA_5

NC_WCKA1_1/DQMA_6

NC_WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

MEMORY INTERFACE A

NC_EDCA0_0/QSA_0/RDQSA_0 NC_EDCA0_1/QSA_1/RDQSA_1 NC_EDCA0_2/QSA_2/RDQSA_2 NC_EDCA0_3/QSA_3/RDQSA_3 NC_EDCA1_0/QSA_4/RDQSA_4 NC_EDCA1_1/QSA_5/RDQSA_5 NC_EDCA1_2/QSA_6/RDQSA_6 NC_EDCA1_3/QSA_7/RDQSA_7

NC_DDBIA0_0/QSA_0B/WDQSA_0 NC_DDBIA0_1/QSA_1B/WDQSA_1 NC_DDBIA0_2/QSA_2B/WDQSA_2 NC_DDBIA0_3/QSA_3B/WDQSA_3 NC_DDBIA1_0/QSA_4B/WDQSA_4 NC_DDBIA1_1/QSA_5B/WDQSA_5 NC_DDBIA1_2/QSA_6B/WDQSA_6 NC_DDBIA1_3/QSA_7B/WDQSA_7

NC_ADBIA0/ODTA0 NC_ADBIA1/ODTA1

NC_CLKA0

NC_CLKA0B

NC_CLKA1

NC_CLKA1B

NC_RASA0B NC_RASA1B

NC_CASA0B NC_CASA1B

NC_CSA0B_0 NC_CSA0B_1

NC_CSA1B_0 NC_CSA1B_1

NC_CKEA0 NC_CKEA1

NC_WEA0B NC_WEA1B

NC_MAA0_8 NC_MAA1_8

GDDR5

VGA@

MDB[0..63]<23>

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21 G19

H27 G27

J14 H14

K23 K19

K20 K17

K24 K27

M13 K16

K21 J20

K26 L15

H23 J19

R56

VGA@

40.2_0402_1 %

R57

VGA@

100_0402_ 1%

R60

VGA@

40.2_0402_1 %

R61

VGA@

100_0402_ 1%

+1.5VSG

12

+1.5VSG

12

C38

VGA@

C40

VGA@

MVREFDB

0.1U_0402_16V4Z

1

2

MVREFSB

0.1U_0402_16V4Z

1

2

MDB[0..63]

R65 5.11K_ 0402_1%

0.1U_0402_16V4Z

C41

VGA@C41

VGA@

R72

VGA@

51.1_0402_1 %

VGA@

2

1

12

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

MVREFDB MVREFSB

TESTEN

12

TEST_MCLK TEST_YCLK

0.1U_0402_16V4Z

C42

2

VGA@C42

VGA@

1

12

R73

VGA@

51.1_0402_1 %

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C5

DQB0_0/DQB_0

C3

DQB0_1/DQB_1

E3

DQB0_2/DQB_2

E1

DQB0_3/DQB_3

F1

DQB0_4/DQB_4

F3

DQB0_5/DQB_5

F5

DQB0_6/DQB_6

G4

DQB0_7/DQB_7

H5

DQB0_8/DQB_8

H6

DQB0_9/DQB_9

J4

DQB0_10/DQB_10

K6

DQB0_11/DQB_11

K5

DQB0_12/DQB_12

L4

DQB0_13/DQB_13

M6

DQB0_14/DQB_14

M1

DQB0_15/DQB_15

M3

DQB0_16/DQB_16

M5

DQB0_17/DQB_17

N4

DQB0_18/DQB_18

P6

DQB0_19/DQB_19

P5

DQB0_20/DQB_20

R4

DQB0_21/DQB_21

T6

DQB0_22/DQB_22

T1

DQB0_23/DQB_23

U4

DQB0_24/DQB_24

V6

DQB0_25/DQB_25

V1

DQB0_26/DQB_26

V3

DQB0_27/DQB_27

Y6

DQB0_28/DQB_28

Y1

DQB0_29/DQB_29

Y3

DQB0_30/DQB_30

Y5

DQB0_31/DQB_31

AA4

DQB1_0/DQB_32

AB6

DQB1_1/DQB_33

AB1

DQB1_2/DQB_34

AB3

DQB1_3/DQB_35

AD6

DQB1_4/DQB_36

AD1

DQB1_5/DQB_37

AD3

DQB1_6/DQB_38

AD5

DQB1_7/DQB_39

AF1

DQB1_8/DQB_40

AF3

DQB1_9/DQB_41

AF6

DQB1_10/DQB_42

AG4

DQB1_11/DQB_43

AH5

DQB1_12/DQB_44

AH6

DQB1_13/DQB_45

AJ4

DQB1_14/DQB_46

AK3

DQB1_15/DQB_47

AF8

DQB1_16/DQB_48

AF9

DQB1_17/DQB_49

AG8

DQB1_18/DQB_50

AG7

DQB1_19/DQB_51

AK9

DQB1_20/DQB_52

AL7

DQB1_21/DQB_53

AM8

DQB1_22/DQB_54

AM7

DQB1_23/DQB_55

AK1

DQB1_24/DQB_56

AL4

DQB1_25/DQB_57

AM6

DQB1_26/DQB_58

AM1

DQB1_27/DQB_59

AN4

DQB1_28/DQB_60

AP3

DQB1_29/DQB_61

AP1

DQB1_30/DQB_62

AP5

DQB1_31/DQB_63

Y12

MVREFDB

AA12

MVREFSB

AD28

TESTEN

AK10

CLKTESTA

AL10

CLKTESTB

2160809000A11SEYMOU_FCBGA9 62

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8

MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0

MEMORY INTERFACE B

EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7

ADBIB0/ODTB0

ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B RASB1B

CASB0B CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB0_8 MAB1_8

DRAM_RST

GDDR5

VGA@

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8

AH11

VGA@R6 8

VGA@

1 2

120P_0402_50V8

1

2

MAB[0..12]

B_BA[0..2]

DQMB#[0..7]

QSB[0..7]

QSB#[0..7]

ODTB0 <23> ODTB1 <23>

CLKB0 <23> CLKB0# <23>

CLKB1 <23> CLKB1# <23>

RASB0# < 23> RASB1# < 23>

CASB0# < 23> CASB1# < 23>

CSB0#_0 <23>

CSB1#_0 <23>

CKEB0 <2 3> CKEB1 <2 3>

WEB0# <23> WEB1# <23>

VGA@ R7 0

VGA@

51.1_0402_1 %

C43

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 B_BA2 B_BA0 B_BA1

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7

ODTB0 ODTB1

CLKB0 CLKB0#

CLKB1 CLKB1#

RASB0# RASB1#

CASB0# CASB1#

CSB0#_0

CSB1#_0

CKEB0 CKEB1

WEB0# WEB1#

R68

1 2

R71

5.11K_0402_1%

5.11K_0402_1% 10_0402_5 %

10_0402_5 %

12

VGA@R71

VGA@

MAB13 <2 3>

R70

MAB[0..12] <23>

B_BA[0..2] <23>

DQMB#[0..7] <23>

QSB[0..7] <2 3>

QSB#[0..7] <23>

MAB13 is for 128M*16 VRAM

VRAM_RST# <23>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Memory

LA-7091P

20 48Tuesday, Decemb er 07, 2010

0.1

A

U2E

MEM I/O

+1.5VSG

C322

VGA@

390U_2.5V_10 M

330U ESR:10m H:5.7 P/N:SF000002O00

1

+

2

10U_0603_6.3V6M

1

2

+1.8VSG

+3VSG

C335

MAN@C335

MAN@

C323

1U_0402_6.3V4Z

1

VGA@C323

VGA@

2

C348

1U_0402_6.3V4Z

1

VGA@C348

VGA@

2

C358

10U_0603_6.3V6M

10U_0805_6.3V6M

1

VGA@C358

VGA@

2

L35

BLM18AG121SN1 D_0603

120ohm/0.3A

C338

VGA@C338

VGA@

C349

VGA@C349

VGA@

C336

VGA@C336

VGA@

Removed bead on ref137-12

1 1

+1.8VSG

L36

BLM18AG601SN1 D_2P

120ohm/0.3A

1

2

1

2

1

2

VGA@L35

VGA@

VGA@L36

VGA@

C324

1U_0402_6.3V4Z

C339

1U_0402_6.3V4Z

1

VGA@C324

VGA@

VGA@C339

VGA@

2

C330

1U_0402_6.3V4Z

C329

1U_0402_6.3V4Z

1

VGA@C330

VGA@

VGA@C329

VGA@

2

C360

10U_0805_6.3V6M

C359

10U_0805_6.3V6M

1

VGA@C360

VGA@

VGA@C359

VGA@

2

12

1

2

1

2

12

1

2

BLM18AG121SN1 D_0603

12

L37

VGA@L37

VGA@

C409

0.1U_0402_16V4Z

C410

1U_0402_6.3V4Z

1

VGA@C409

VGA@

VGA@C410

VGA@

2

C411

VGA@C411

VGA@

1

2

C403

10U_0603_6.3V6M

VGA@C403

VGA@

+1.0VSG

C404

1U_0402_6.3V4Z

1

VGA@C404

VGA@

2

L40 BLM18AG121SN1 D_0603

BLM18AG121SN1 D_0603

470ohm/1A

C406

1U_0402_6.3V4Z

C405

0.1U_0402_16V4Z

1

VGA@C406

VGA@

VGA@C405

VGA@

2

12

VGA@L40

VGA@

+1.8VSG

120ohm/0.3A

+1.8VSG

BLM18AG121SN1 D_0603

12

L38

VGA@L38

VGA@

10U_0603_6.3V6M

1

2

470ohm/1A

C325

1U_0402_6.3V4Z

C341

1U_0402_6.3V4Z

C340

1U_0402_6.3V4Z

1

VGA@C325

VGA@

VGA@C340

VGA@

2

C350

1U_0402_6.3V4Z

C331

1U_0402_6.3V4Z

1

VGA@C350

VGA@

VGA@C331

VGA@

2

C361

1U_0402_6.3V4Z

C337

1U_0402_6.3V4Z

1

VGA@C361

VGA@

VGA@C337

VGA@

2

C384

10U_0603_6.3V6M

C385

1U_0402_6.3V4Z

1

VGA@C384

VGA@

VGA@C385

VGA@

2

C397

10U_0603_6.3V6M

C398

1U_0402_6.3V4Z

1

VGA@C397

VGA@

VGA@C398

VGA@

2

C400

10U_0603_6.3V6M

C401

1U_0402_6.3V4Z

1

VGA@C400

VGA@

VGA@C401

VGA@

2

C407

0.1U_0402_16V4Z

VGA@C407

VGA@

C408

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

VGA@C408

VGA@

2

GCORE_SEN<45>

C342

1U_0402_6.3V4Z

1

VGA@C341

VGA@

VGA@C342

VGA@

2

C352

1U_0402_6.3V4Z

C351

1U_0402_6.3V4Z

1

VGA@C352

VGA@

VGA@C351

VGA@

2

C363

1U_0402_6.3V4Z

C362

1U_0402_6.3V4Z

1

VGA@C363

VGA@

VGA@C362

VGA@

2

+VDD_CT

C386

0.1U_0402_16V4Z

VGA@C386

VGA@

+VDDR3

C399

0.1U_0402_16V4Z

VGA@C399

VGA@

+VDDR4

C402

0.1U_0402_16V4Z

VGA@C402

VGA@

+MPV_18

+SPV_18

+SPV10

C413

0.1U_0402_16V4Z

C412

1

VGA@C413

VGA@

VGA@C412

VGA@

2

GCORE_SEN

R375

1 2

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

J7

J9 K11 K13

K8 L12 L16 L21 L23 L26

L7

M11

N11

P7

R11 U11

U7

Y11

Y7

AF26 AF27 AG26 AG27

AF23 AF24 AG23 AG24

AF13 AF15 AG13 AG15

AD12 AF11 AF12 AG11

M20 M21

V12 U12

H7

H8

AM10

AN9

AN10

AF28

AG28

FB_GND

AH29

0_0402_5%VGA@

2800mA

VDDR1#15 VDDR1#16 VDDR1#17 VDDR1#18 VDDR1#19 VDDR1#20 VDDR1#21 VDDR1#22 VDDR1#23 VDDR1#24 VDDR1#25 VDDR1#26 VDDR1#27 VDDR1#28 VDDR1#29 VDDR1#30 VDDR1#31 VDDR1#32 VDDR1#33 VDDR1#34

LEVEL

LEVEL TRANSLATION

TRANSLATION

VDD_CT#1 VDD_CT#2

219mA

VDD_CT#3 VDD_CT#4

I/O

VDDR3#1 VDDR3#2

60mA

VDDR3#3 VDDR3#4

VDDR4#4 VDDR4#5 VDDR4#7 VDDR4#8

170mA

VDDR4#1 VDDR4#2 VDDR4#3 VDDR4#6

NC_VDDRHA NC_VSSRHA

NC_VDDRHB NC_VSSRHB

PLL

MPV18#1

75mA

MPV18#2

75mA

SPV18

120mA

SPV10

SPVSS

VOLTAGE

VOLTAGE SENESE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

2160809000A11SEYMOU_FCBGA9 62

VGA@

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4

504mA

PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDR/PCIE_PVDD

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5

2A

PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

CORE

VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15

POWER

VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32

VDDC/BIF_VDDC#33

VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41

VDDC/BIF_VDDC#42

VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58

4A

VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15

ISOLATED

VDDCI#16

CORE I/O

VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22

VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8 VDDCI#9

AA31 AA32 AA33 AA34 V28 W29 W30 Y31 AB37

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

FBMA-L11-20120 9-221LMA30T_0805

+PCIE_VDDR

C328

1U_0402_6.3V4Z

C326

0.1U_0402_16V4Z

1

VGA@C326

VGA@

2

1U_0402_6.3V4Z

C353

1U_0402_6.3V4Z

1

VGA@C353

VGA@

2

FOR XT DDR3 13 A (RMS)/14.2 A(Peak)

C364

1U_0402_6.3V4Z

1

VGA@C364

VGA@

2

C374

1U_0402_6.3V4Z

1

VGA@C374

VGA@

2

C387

10U_0805_6.3V6M

1

VGA@C387

VGA@

2

+BIF_VDDC

1U_0402_6.3V4Z

C343

C327

1U_0402_6.3V4Z

1

VGA@C343

VGA@

2

C332

1

VGA@C332

VGA@

2

C365

1U_0402_6.3V4Z

VGA@C365

VGA@

C375

1U_0402_6.3V4Z

VGA@C375

VGA@

C388

10U_0805_6.3V6M

VGA@C388

VGA@

1

VGA@C328

VGA@

VGA@C327

VGA@

2

C354

1U_0402_6.3V4Z

C333

1U_0402_6.3V4Z

1

VGA@C354

VGA@

VGA@C333

VGA@

2

C366

1U_0402_6.3V4Z

1

VGA@C366

VGA@

2

C376

1U_0402_6.3V4Z

1

VGA@C376

VGA@

2

10U_0805_6.3V6M

C389

10U_0805_6.3V6M

1

VGA@C389

VGA@

2

C345

1U_0402_6.3V4Z

C344

1U_0402_6.3V4Z

1

VGA@C345

VGA@

VGA@C344

VGA@

2

C355

1U_0402_6.3V4Z

C334

1U_0402_6.3V4Z

1

VGA@C355

VGA@

VGA@C334

VGA@

2

C367

C368

1U_0402_6.3V4Z

1

VGA@C367

VGA@

VGA@C368

VGA@

2

C378

1U_0402_6.3V4Z

C377

1

VGA@C378

VGA@

VGA@C377

VGA@

2

C390

C391

10U_0805_6.3V6M

1

VGA@C390

VGA@

VGA@C391

VGA@

2

FBMA-L11-20120 9-221LMA30T_0805

C346

1U_0402_6.3V4Z

1

VGA@C346

VGA@

2

C356

1U_0402_6.3V4Z

1

VGA@C356

VGA@

2

C369

1U_0402_6.3V4Z

1

VGA@C369

VGA@

2

C379

1U_0402_6.3V4Z

1

VGA@C379

VGA@

2

C392

10U_0805_6.3V6M

1

VGA@C392

VGA@

2

L34

C347

10U_0805_6.3V6M

VGA@C347

VGA@

C357

10U_0805_6.3V6M

VGA@C357

VGA@

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

2

10U_0805_6.3V6M

1

2

12

VGA@L34

VGA@

220ohm/2A

1U_0402_6.3V4Z

C370

1

VGA@C370

VGA@

2

1U_0402_6.3V4Z

C380

1

VGA@C380

VGA@

2

C393

1

+

VGA@C393

VGA@

390U_2.5V_10 M

2

+1.8VSG

+1.0VSG

C371

VGA@C371

VGA@

C381

VGA@C381

VGA@

C394

VGA@

55mA

L39

VGA@L39

+VDDCI+VDDCI

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C415

C414

1

VGA@C415

VGA@

VGA@C414

VGA@

2

C423

1U_0402_6.3V4Z

C422

1U_0402_6.3V4Z

1

VGA@C423

VGA@

VGA@C422

VGA@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

C417

1U_0402_6.3V4Z

C416

1U_0402_6.3V4Z

1

VGA@C416

VGA@

2

C424

1U_0402_6.3V4Z

1

VGA@C424

VGA@

2

C418

1U_0402_6.3V4Z

1

VGA@C417

VGA@

VGA@C418

VGA@

2

C425

1U_0402_6.3V4Z

C426

1U_0402_6.3V4Z

1

VGA@C425

VGA@

VGA@C426

VGA@

2

2010/08/04 2010/08/04

1U_0402_6.3V4Z

1

2

10U_0805_6.3V6M

1

2

C420

1U_0402_6.3V4Z

C419

1

VGA@C420

VGA@

VGA@C419

VGA@

2

C427

10U_0805_6.3V6M

C421

1

VGA@C427

VGA@

VGA@C421

VGA@

2

Compal Secret Data

C428

10U_0805_6.3V6M

1

VGA@C428

VGA@

2

VGA@

FBMA-L11-20120 9-121LMA50T_0805

Deciphered Date

12

L41

VGA@L41

VGA@

12

C372

1U_0402_6.3V4Z

1

VGA@C372

VGA@

2

C382

1U_0402_6.3V4Z

1

VGA@C382

VGA@

2

1

+

330U_D2_2 V_Y

2

C373

1U_0402_6.3V4Z

1

VGA@C373

VGA@

2

C383

1U_0402_6.3V4Z

1

VGA@C383

VGA@

2

1

+

C396

C395

@

VGA@

330U_D2_2 V_Y

2

Reserve for PWR test

J7

2

JUMP_43X118@J7JUMP_43X118@

+VGA_CORE

112

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Madison_Power/GND

LA-7091P

0.1

21 48Tuesday, Decemb er 07, 2010

0.1

5

U2F

4

3

2

1

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

PCIE_VSS#10

J34

D D

C C

B B

A A

@

1 2

R455 0_0603 _5%

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#100

F17

GND#101

F19

GND#102

F21

GND#103

F23

GND#104

F25

GND#105

F27

GND#106

F29

GND#107

F31

GND#108

F33

GND#109

F7

GND#110

F9

GND#111

G2

GND#112

G6

GND#113

H9

GND#114

J2

GND#115

J27

GND#116

J6

GND#117

J8

GND#118

K14

GND#119

K7

GND#120

L11

GND#121

L17

GND#122

L2

GND#123

L22

GND#124

L24

GND#125

L6

GND#126

M17

GND#127

M22

GND#128

M24

GND#129

N16

GND#130

N18

GND#131

N2

GND#132

N21

GND#133

N23

GND#134

N26

GND#135

N6

GND#136

R15

GND#137

R17

GND#138

R2

GND#139

R20

GND#140

R22

GND#141

R24

GND#142

R27

GND#143

R6

GND#144

T11

GND#145

T13

GND#146

T16

GND#147

T18

GND#148

T21

GND#149

T23

GND#150

T26

GND#151

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#163

V18

GND#164

V21

GND#165

V23

GND#166

V26

GND#167

W2

GND#168

W6

GND#169

Y15

GND#170

Y17

GND#171

Y20

GND#172

Y22

GND#173

Y24

GND#174

Y27

GND#175

U13

GND#152

V13

GND#162

2160809000A11SEYMOU_FCBGA962

VGA@

5

GND

GND/PX_EN#61

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60

GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

R378

1 2

U2H

AW14 AW16

AW20 AW22

12

AW18

12

U2H

DP C/D POWER

AP20

DPCD/DPC_VDD18#1

AP21

DPCD/DPC_VDD18#2

AP13

DPCD/DPC_VDD10#1

AT13

DPCD/DPC_VDD10#2

AN17

DP/DPC_VSSR#1

AP16

DP/DPC_VSSR#2

AP17

DP/DPC_VSSR#3 DP/DPC_VSSR#4 DP/DPC_VSSR#5

AP22

DPCD/DPD_VDD18#1

AP23

DPCD/DPD_VDD18#2

AP14

DPCD/DPD_VDD10#1

AP15

DPCD/DPD_VDD10#2

AN19

DP/DPD_VSSR#1

AP18

DP/DPD_VSSR#2

AP19

DP/DPD_VSSR#3 DP/DPD_VSSR#4 DP/DPD_VSSR#5

DPCD_CALR

DP E/F POWER

AH34

DPEF/DPE_VDD18#1

AJ34

DPEF/DPE_VDD18#2

AL33

DPEF/DPE_VDD10#1

AM33

DPEF/DPE_VDD10#2

AN34

DP/DPE_VSSR#1

AP39

DP/DPE_VSSR#2

AR39

DP/DPE_VSSR#3

AU37

DP/DPE_VSSR#4

AF34

DPEF/DPF_VDD18#1

AG34

DPEF/DPF_VDD18#2

AK33

DPEF/DPF_VDD10#1

AK34

DPEF/DPF_VDD10#2

AF39

DP/DPF_VSSR#1

AH39

DP/DPF_VSSR#2

AK39

DP/DPF_VSSR#3

AL34

DP/DPF_VSSR#4

AM34

DP/DPF_VSSR#5

AM39

DPEF_CALR

2160809000A11SEYMOU_FCBGA962

VGA@

2010/08/04 2010/08/04

DP A/B POWER

DPAB/DPA_VDD18#1 DPAB/DPA_VDD18#2

DPAB/DPA_VDD10#1 DPAB/DPA_VDD10#2

DP/DPA_VSSR#1 DP/DPA_VSSR#2 DP/DPA_VSSR#3 DP/DPA_VSSR#4 DP/DPA_VSSR#5

DPAB/DPB_VDD18#1 DPAB/DPB_VDD18#2

DPAB/DPB_VDD10#1 DPAB/DPB_VDD10#2

DP/DPB_VSSR#1 DP/DPB_VSSR#2 DP/DPB_VSSR#3 DP/DPB_VSSR#4 DP/DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DPAB_VDD18/DPA_PVDD

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPB_PVDD

DP_VSSR/DPB_PVSS

DPCD_VDD18/DPC_PVDD

DP_VSSR/DPC_PVSS

DPCD_VDD18/DPD_PVDD

DP_VSSR/DPD_PVSS

DPEF_VDD18/DPE_PVDD

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPF_PVDD

DP_VSSR/DPF_PVSS

Compal Secret Data

Deciphered Date

AN24 AP24

AP31 AP32

AN27 AP27 AP28 AW24 AW26

AP25 AP26

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

AU28 AV27

AV29 AR28

AU18 AV17

AV19 AR18

AM37 AN38

AL38 AM35

+DPAB_VDD18

+DPAB_VDD10

+DPAB_VDD18

+DPAB_VDD10

1 2

+DPAB_VDD18

+DPCD_VDD18

+DPEF_VDD18

2

R377

R377 150_0402_1%

150_0402_1%

VGA@

C432

10U_0603_6.3V6M

1

VGA@C432

VGA@

2

C438

0.1U_0402_16V4Z

1

VGA@C4 38

VGA@

2

Title

Madison_Power/GND

Size Document Number Rev

Custom

LA-7091P

Date: Sheet of

150mA

L42

VGA@L42

VGA@

BLM18AG121SN1D_0603

+1.8VSG

+1.0VSG

BLM18AG121SN1D_0603

470ohm/1A

BLM18AG121SN1D_0603

470ohm/1A

440mA

L67 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

470ohm/1A

PX_EN <24>

L80 BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

470ohm/1A

4

+1.8VSG

+1.0VSG

0_0402_5%BACO@

110mA

L64

VGA@L67

VGA@

240mA

VGA@L80

VGA@

VGA@L64

VGA@

12

C429

10U_0603_6.3V6M

1

VGA@C429

VGA@

2

12

C435

10U_0603_6.3V6M

1

VGA@C435

VGA@

2

12

0.1U_0402_16V4Z

C441

10U_0603_6.3V6M

1

2

VGA@C4 41

VGA@

C444

10U_0603_6.3V6M

1

VGA@C444

VGA@

2

C431

1U_0402_6.3V4Z

C430

0.1U_0402_16V4Z

1

VGA@C431

VGA@

VGA@C430

VGA@

2

C436

0.1U_0402_16V4Z

C437

1U_0402_6.3V4Z

1

VGA@C436

VGA@

VGA@C437

VGA@

2

C442

C443

1U_0402_6.3V4Z

1

2

VGA@C4 42

VGA@

VGA@C4 43

VGA@

C446

1U_0402_6.3V4Z

C445

0.1U_0402_16V4Z

1

VGA@C446

VGA@

VGA@C445

VGA@

2

+DPCD_VDD18

+DPCD_VDD10

+DPCD_VDD18

+DPCD_VDD10

R376

150_0402_1%

VGA@

+DPEF_VDD18

+DPEF_VDD10

+DPEF_VDD18

+DPEF_VDD10

R379

150_0402_1%

VGA@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

300mA

L63

VGA@L63

VGA@

BLM18AG121SN1D_0603

C433

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

VGA@C433

VGA@

2

10U_0603_6.3V6M

C439

1U_0402_6.3V4Z

1

VGA@C4 39

VGA@

2

12

470ohm/1A

C434

VGA@C434

VGA@

220mA

L66

VGA@L66

VGA@

BLM18AG121SN1D_0603

12

C440

470ohm/1A

VGA@C4 40

VGA@

Compal Electronics, Inc.

1

+1.8VSG

+1.0VSG

0.1

22 48Tuesday, December 07, 2010

0.1

5

U6

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13

CLKB0 CLKB0#

ODTB0_1

+1.5VSG

U6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-H C12_FBGA96

X76@

R83

VGA@

4.99K_0402_ 1%

R95

VGA@

4.99K_0402_ 1%

C178

1U_0402_6.3V6K

C179

1U_0402_6.3V6K

1

VGA@C178

VGA@

VGA@C179

VGA@

2

10U_0603_6.3V6M

C199

10U_0603_6.3V6M

1

VGA@C199

VGA@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

12

VREFCB_A1

1

12

C169

2

VGA@

1U_0402_6.3V6K

C180

1U_0402_6.3V6K

1

VGA@C180

VGA@

2

C200

C201

10U_0603_6.3V6M

1

VGA@C200

VGA@

VGA@C201

VGA@

2

VREFCB_A1 VREFDB_Q1

D D

B_BA0<20 > B_BA1<20 >

VGA@R1 03

VGA@

VGA@R1 04

VGA@

VGA@R1 05

VGA@

VGA@R1 06

VGA@

R79

VGA@

243_0402_ 1%

ODTB0_1

R92 56_0402_1 %

56_0402_1 %

1 2

R94 56_0402_1 %

56_0402_1 %

1 2

ODTB1_1

B_BA2<20 >

CKEB0<20>

CSB0#_0<20> RASB0#<20 > CASB0#<20 > WEB0#<20>

VRAM_RST#

12

VGA@R9 2

VGA@

VGA@R9 4

VGA@

0.01U_0402_25V7K

1

2

0.01U_0402_25V7K

1

2

+1.5VSG

C177

VGA@C177

VGA@

C198

VGA@C198

VGA@

QSB3 QSB1

DQMB#3 DQMB#1

QSB#3 QSB#1

ODTB0

ODTB1

0_0402_5%

MDB[0..63]

VRAM_RST#<20>

VGA@

R91

0_0402_5%

VGA@

R93

R103 56_0402_1 %

56_0402_1 %

1 2

R104 56_0402_1 %

56_0402_1 %

1 2

R105 56_0402_1 %

56_0402_1 %

1 2

R106 56_0402_1 %

56_0402_1 %

1 2

MDB[0..63]<20>

MAB[13..0]<20>

DQMB#[7..0]<20>

QSB[7..0]<20>

C C

B B

A A

QSB#[7..0]<20 >

ODTB0<20>

ODTB1<20>

CLKB0<20>

CLKB0#<20>

CLKB1<20>

CLKB1#<20>

4

U7

M8

VREFCA

H1

VREFDQ

MAB0

N3

A0

MAB1

P7

A1

MAB2

P3

A2

MAB3

N2

A3

MAB4

P8

A4

MAB5

P2

A5

MAB6

R8

A6

MAB7

R2

A7

MAB8

T8

A8

MAB9

R3

A9

MAB10

L7

A10/AP

MAB11

R7

A11

MAB12

N7

A12

MAB13 MAB13

T3

A13

T7

A14

M7

A15/BA3

B_BA0

M2

BA0

B_BA1

N8

BA1

B_BA2

M3

BA2

CLKB0

J7

CK

CLKB0#

K7

CK

CKEB0

K9

CKE/CKE0

ODTB0_1

K1

ODT/ODT0

CSB0#_0

L2

CS/CS0

RASB0#

J3

RAS

CASB0#

K3

CAS

WEB0#

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-H C12_FBGA96

X76@

4.99K_0402_ 1%

+1.5VSG

C183

1U_0402_6.3V6K

1

VGA@C183

VGA@

2

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

R85

VGA@

R97

VGA@

1U_0402_6.3V6K

1

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

12

C171

VGA@

C184

C185

1U_0402_6.3V6K

1

VGA@C184

VGA@

VGA@C185

VGA@

2

MDB22

E3

MDB20

F7

MDB21

F2

MDB18

F8

MDB19

H3

MDB17

H8

MDB23

G2

MDB16

H7

MDB1

D7

MDB6

C3

MDB0

C8

MDB4

C2

MDB3

A7

MDB7

A2

MDB2

B8

MDB5

A3

+1.5VSG

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREFCB_A2 VREFD B_Q2VREFDB_Q1

1

2

1

2

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

0.1U_0402_16V4Z

C186

1U_0402_6.3V6K

VGA@C186

VGA@

+1.5VSG

R86

VGA@

4.99K_0402_ 1%

R98

VGA@

4.99K_0402_ 1%

C187

1U_0402_6.3V6K

1

VGA@C187

VGA@

2

VGA@

243_0402_ 1%

12

C170

VGA@

VREFCB_A2 VREFDB_Q2

QSB2 QSB0

DQMB#2 DQMB#0

QSB#2 QSB#0

VRAM_RST#

12

R80

0.1U_0402_16V4Z

1

2

MDB26

E3

MDB28

F7

MDB27

F2

MDB31

F8

MDB25

H3

MDB30

H8

MDB24

G2

MDB29

H7

MDB15

D7

MDB10

C3

MDB12

C8

MDB11

C2

MDB13

A7

MDB9

A2

MDB14

B8

MDB8

A3

+1.5VSG

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSG

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

R84

VGA@

4.99K_0402_ 1%

0.1U_0402_16V4Z

R96

VGA@

4.99K_0402_ 1%

C181

C182

1U_0402_6.3V6K

1

VGA@C181

VGA@

VGA@C182

VGA@

2

VRAM P/N : Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P) 800MHz

C202

10U_0603_6.3V6M

Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )800MHz Hynix : SA000041S40 (S IC D3 64MX16-12C FBGA 1.5V )900MHz

VGA@C202

VGA@

3

U8

VREFCB_A3 VREFDB_Q3

CKEB1<20>

CSB1#_0<20> RASB1#<20 > CASB1#<20 > WEB1#<20>

QSB4 QSB5

DQMB#4 DQMB#5

QSB#4 QSB#5

VRAM_RST#

12

R81

VGA@

243_0402_ 1%

+1.5VSG+1.5VSG+1.5VSG+1.5VSG

12

0.1U_0402_16V4Z

1

12

C172

2

VGA@

+1.5VSG

U8

M8

VREFCA

H1

VREFDQ

MAB0

N3

A0

MAB1

P7

A1

MAB2

P3

A2

MAB3

N2

A3

MAB4

P8

A4

MAB5

P2

A5

MAB6

R8

A6

MAB7

R2

A7

MAB8

T8

A8

MAB9

R3

A9

MAB10

L7

A10/AP

MAB11

R7

A11

MAB12

N7

A12

T3

A13

T7

A14

M7

A15/BA3

B_BA0

M2

BA0

B_BA1

N8

BA1

B_BA2

M3

BA2

CLKB1

J7

CK

CLKB1#

K7

CK

K9

CKE/CKE0

ODTB1_1

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-H C12_FBGA96

X76@

+1.5VSG +1.5VSG +1.5VSG+1.5VSG

12

R87

VGA@

4.99K_0402_ 1%

0.1U_0402_16V4Z

1

12

C173

R78

VGA@

4.99K_0402_ 1%

C188

1U_0402_6.3V6K

1

VGA@C188

VGA@

2

10U_0603_6.3V6M

C203

1

VGA@C203

VGA@

2

VGA@

1

2

1

2

1U_0402_6.3V6K

10U_0603_6.3V6M

2

VGA@

C189

C190

1U_0402_6.3V6K

C191

1U_0402_6.3V6K

1

VGA@C189

VGA@

VGA@C190

VGA@

VGA@C191

VGA@

2

10U_0603_6.3V6M

C204

VGA@C204

VGA@

C206

C205

1

VGA@C206

VGA@

VGA@C205

VGA@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

1

2

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

R88

VGA@

4.99K_0402_ 1%

R100

VGA@

4.99K_0402_ 1%

C192

1U_0402_6.3V6K

VGA@C192

VGA@

MDB35 MDB37 MDB34 MDB39 MDB33 MDB38 MDB32 MDB36

MDB44 MDB43 MDB47 MDB41 MDB45 MDB40 MDB46 MDB42

2

U9

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13

B_BA0 B_BA1 B_BA2

CLKB1 CLKB1# CKEB1

ODTB1_1 CSB1#_0 RASB1# CASB1# WEB1#

R89

VGA@

R101

VGA@

C195

1U_0402_6.3V6K

VGA@C195

VGA@

U9

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-H C12_FBGA96

X76@

12

C175

VGA@

C196

1U_0402_6.3V6K

1

VGA@C196

VGA@

2

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

0.1U_0402_16V4Z

1

2

C197

VGA@C197

VGA@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

4.99K_0402_ 1%

VREFCB_A4 VREFDB_Q4

+1.5VSG

QSB6 QSB7

DQMB#6 DQMB#7

QSB#6 QSB#7

VRAM_RST#

12

R82

VGA@

243_0402_ 1%

12

4.99K_0402_ 1%

VREFDB_Q3VREFCB_A3 VREFCB_A4 VRE FDB_Q4

0.1U_0402_16V4Z

1

12

C174

VGA@

2

+1.5VSG

4.99K_0402_ 1%

C194

1U_0402_6.3V6K

C193

1U_0402_6.3V6K

1

2

1

VGA@C194

VGA@

VGA@C193

VGA@

2

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

R90

VGA@

R102

VGA@

1

MDB55

E3

MDB49

F7

MDB52

F2

MDB50

F8

MDB53

H3

MDB48

H8

MDB54

G2

MDB51

H7

MDB56

D7

MDB59

C3

MDB63

C8

MDB62

C2

MDB57

A7

MDB61

A2

MDB58

B8

MDB60

A3

+1.5VSG

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSG

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

0.1U_0402_16V4Z

1

12

C176

2

VGA@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

VRAM_DDR3 / Channel B

LA-7091P

1

23 48Tuesday, Decemb er 07, 2010

0.1

5

4

3

2

1

VGA Muxless and Dis only Status Mapping table

Power Sequence of Granville

FCH_PWRGD

38ms

Ref CLK

D D

INT_VGAPWR_ON

50ms

VGA_PWR_ON

+3VSG

+VGA_CORE

VDDCI

+1.5VSG

+1.0VSG

+1.8VSG

20ms

Power Sequence of Whistler and Seymour

SUSP# +3VSG

(JUMP form +3VS)

VGA_ON

10ms

VGA_PWR_ON

1.5_VDDC_PWREN

+VGA_CORE

+1.5VSG

+1.0VSG

+1.8VSG

20ms

VGA_PWR_ON

1.5_VDDC_PWREN 1 +3.3VSG +1.8VSG +1.0VSG +VGA_CORE +1.5VSG +BIF_VDDC

VGA Muxless with BACO Status Mapping table

Normal mode BACO mode

PX_EN

1.5_VDDC_PWREN VDDC_EN

1.0_EN +3.3VSG +1.8VSG

For PX sequence, >1mS delay is required between PE_GPIO1 and VGA_PWR_ON

+VGA_CORE +1.5VSG

C C

PE_GPIO1

+BIF_VDDC

VGA_PWR_ON >1ms

+VGA_CORE

VGA Power ON Circuit

+3VALW+3VALW

U11B

U11A

U11A SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

Delay SUSP# 10ms

VGA_ON<31,37>

B B

Delay EC_PWROK 50ms

INT_VGAPWR_ON<31>

R119 10K_0402_1%

10K_0402_1%

1 2

PX@

PE_GPIO1#<37>

A A

VAN_GPIO1_DELAY

MAN_GPIO1_DELAY

1 2

R121 0_0402_5%

VAN@

1 2

R122 0_0402_5%

MAN@

1 2

R123 0_0402_5%

1 2

R111 0_0402_5%

1 2

R115 0_0402_5%

PX@R119

PX@

2

G

2N7002_SOT23

VAN@

MAN@

13

D

S

Q6

PX@

C208

0.1U_0402_16V4Z

C210

0.1U_0402_16V4Z

31.6K_0402_1%

13

D

Q9

PX@

2

G

2N7002_SOT23

S

R118

@

0.1U_0402_16V4Z

14

P

1

O2I

G

VGA@

7

VAN_GPIO1_DELAY

+3VALW +3VALW

U11C

14

SN74LVC14APWLE_TSSOP14

P

5

O6I

G

VGA@

7

MAN_GPIO1_DELAY

+3VALW +3VALW

C211

12

11

2

VGA@

1

C211

1 2

U11E

14

SN74LVC14APWLE_TSSOP14

P

O10I

G

VGA@

7

C213

2

1

2

VGA@

1

+3VS

VGA@

0.1U_0402_16V4Z

U11B SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

14

P

3

O4I

G

VGA@

7

U11D

14

SN74LVC14APWLE_TSSOP14

P

9

O8I

G

VGA@

7

U11F

14

SN74LVC14APWLE_TSSOP14

P

13

O12I

G

VGA@

7

1 2

R1259

0_0402_5%

1 2

R1260

0_0402_5%

1 2

R120

0_0402_5%

VAN@

MAN@

1014 add for BOM structure

R116

0_0402_5%

DISO@

1 2

PX@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

For VGA Power on control

2

C214

0.1U_0402_16V4Z

@

1

Issued Date

Dis only Muxless High performance GPU

1

1 ON ON ON ON ON

+VGA_CORE

ON ON ON ON ON

+VGA_CORE

VGA_PWR_ON source signal 1 0 1 0 1 ON ON ON ON ON

ON ON ON OFF OFF

0

+3.3VSG +1.8VSG +1.0VSG +VDDCI +VGA_CORE +1.5VSG+1.0VSG

+1.0VSG

VGA_PWR_ON

R108 10K_0402_5%

1 2

+3VS

BACO@

PX_EN<22>

VGA_PWRGD<13,45>

From +VGA_CORE regulator

VGA_PWR_ON <25,37>PE_GPIO1<13,37>

Compal Secret Data

2010/08/04 2010/08/04

Compal Secret Data

1 2

R77 0_0402_5%

12

R110

5.11K_0402_1%

BACO@

1.5_VDDC_PWREN

+1.0VSG

1.0_EN

VDDC_EN

+VGA_CORE

Deciphered Date

AO3416_SOT23-3

S

G

2

S

Q7

AO3416_SOT23-3

VGA Power Enable Signal Mapping table

BACO@

13

D

2

Q2

G

BACO@

S

2N7002_SOT23

C209

BACO@C209

BACO@

0.1U_0402_10V7K

12

BACO@

1 2

R114 0_0402_5%

NC7SZ08P5X_NL_SC70-5

Q4

D

20mil

13

BACO@

2

30mil

13

D

BACO@

1 3

Muxless Power-saving GPU

0

0 OFF OFF OFF OFF OFF OFF

Graville Whistler and Seymour

INT_VGAPWR_ON0 1

VGA_PWR_ON VGA_PWR_ON VGA_PWR_ON VGA_PWR_ON VGA_PWR_ON VGA_PWR_ON

WOBACO@

R107 0_0402_5%

1 2

+3VS

C207

BACO@C207

BACO@

0.1U_0402_10V7K

1 2

U10

5

BACO@

2

P

B

1

A

+3VS

5

2

P

B

1

A

G

3

Q5

Q5 AO3416_SOT23-3

AO3416_SOT23-3

D

S

D

S

1 3

BACO@

G

2

G

BACO@

D

S

D

S

Q8

Q8 AO3416_SOT23-3

AO3416_SOT23-3

U12

1.5_VDDC_PWREN

4

Y

G

NC7SZ08P5X_NL_SC70-5

3

R112

BACO@

1K_0402_5%

BACO@

5

4

Y

+BIF_VDDC

1

2

Title

VGA power sequence and BACO

Size Document Number Rev

Custom

LA-7091P

Date: Sheet of

VGA_ON SUSP# VGA_PWR_ON VGA_PWR_ON

Combine with +VGA_CORE

1.5_VDDC_PWREN

+5VS +5VS

R113

BACO@

1K_0402_5%

1 2

DMN66D0LDW-7_SOT363-6

34

30mil

C212

BACO@

22U_0805_6.3V6M

AO3416 NMOS Vgs(th)(Max)= 1V Rds(on)(Max)= 22m ohm @Vgs=4.5V

Compal Electronics, Inc.

1 2

Q3B

61

2

BACO@Q3B

BACO@

WOBACO@

1 2

R117 0_0805_5%

1.5_VDDC_PWREN <37,44,45>

VDDC_EN

1.0_EN

Q3A

DMN66D0LDW-7_SOT363-6

BACO@Q3A

BACO@

+VGA_CORE

24 48Tuesday, December 07, 2010

0.1

5

4

3

2

1

5

4

3

2

1

1.05VS TO +1.0VSG+3.3VS TO +3.3VSG

+1.05VS

1

C218

VGA@

2

10U_0805_10V4Z

VGA@

12

10K_0402_5%

R129

12

2

G

Q14

1

2N7002_SOT23

VGA@

2

ACIN<31,37,39>

+1.8VS

1

C229

VGA@

2

10U_0805_10V4Z

VGA@

12

R135 100K_0402_5%

12

2

G

Q18

1

2N7002_SOT23

VGA@

2

U13

VGA@U13

VGA@

SI4800BDY-T1-GE3_SO8

8 7

5

4

1.0VSG_GATE

13

D

12

S

R132

@ R132

@

13

D

ACIN

D

2

G

S

U15

VGA@U15

VGA@

SI4800BDY-T1-GE3_SO8

8 7

5

4

1.8VSG_GATE

12

13

D

R138

@ R138

@

S

510K_0402_5%

13

D

Q20

2

G

VGA@

G

VGA@

2N7002_SOT23

S

510K_0402_5%

Q15

VGA@

2N7002_SOT23

+1.5VSG

C224

VGA@

1

2

C220

1

2

+3VSG+3VS

R127

R127 470_0603_5%

470_0603_5%

MAN@

1 2

13

D

MAN@

Q12

S

2N7002_SOT23

1

C225

VGA@

1U_0402_6.3V4Z

2

VGA_PWR_ON#

2

G

1 2

13

D

S

R133

VGA@

470_0603_5%

1.5_VDDC_PWREN#

2

G

Q17

Q17 2N7002_SOT23

2N7002_SOT23

VGA@

VGA_PWR_ON# <37>

1.5_VDDC_PWREN# <37>

VGA_PWR_ON#

+1.8VS TO +1.8VSG+1.5V TO +1.5VSG

VGA_PWR_ON#

C216

10U_0805_10V4Z

+VSB

VGA@

R131 100K _0402_5%

C223

VGA@

0.1U_0603_25V7K

C226

10U_0805_10V4Z

+VSB

VGA@

R137 100K_0402_5%

C234

VGA@

0.1U_0603_25V7K

VAN@

1 2

R124 0_0805_5%

Q10

SI2301CDS-T1-GE3_SOT23-3

S

D

D D

C219

1

R126

MAN@

0.1U_0603_25V7K

3VSG_GATE

VGA_PWR_ON<24,37>

C C

1.5_VDDC_PWREN#

B B

VGA_PWR_ON

10U_0805_10V4Z

+VSB

R139 47K_0402_5%

0.1U_0603_25V7K

1 2

0.1U_0603_25V7K

1

C231

C230

VGA@

2

10U_0805_10V4Z

VGA@

1 2

R136 100 K_0402_5%

VGA@

12

1

C235

VGA@

2

R126

MAN@

100K_0402_5%

2

1 2

R128 33K_ 0402_5%

MAN@

R13010K_0402_5%

1

C222

MAN@

2

+1.5V

SI4800BDY-T1-GE3_SO8

8 7

5

1

2

13

VGA@

2

G

Q19

2N7002_SOT23

ACIN

U14

1.5VSG_GATE

D

S

D

13

G

2

3VSG_GATE

10U_0805_6.3V6M

1 2

13

D

MAN@

Q13

2

G

S

SSM3K7002FU_SC70-3

VGA@U14

VGA@

4

1

12

R140

2

510K_0402_5%

VGA@ R140

VGA@

13

D

Q21

2

G

VGA@

G

VGA@

2N7002_SOT23

S

MAN@

MAN@ C220

MAN@

1 2 36

10U_0805_10V4Z

C233

VGA@

0.1U_0603_25V7K

1 2 36

C215

VGA@

10U_0805_10V4Z

1

C221

VGA@

0.1U_0603_25V7K

2

+1.8VSG

1 2 36

C227

VGA@

10U_0805_10V4Z

1

C232

VGA@

0.1U_0603_25V7K

2

+1.0VSG

1

2

1

2

1

C217

2

VGA@

1U_0402_6.3V4Z

1

C228

2

VGA@

1U_0402_6.3V4Z

D

S

1 2

13

D

S

R125

VGA@

470_0603_5%

1 2

13

2

G

Q11

Q11 2N7002_SOT23

2N7002_SOT23

R134

VGA@

470_0603_5%

VGA_PWR_ON#

2

G

Q16

VGA@

Q16

VGA@

2N7002_SOT23

VGA_PWR_ON#

VGA@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

RobsonXT-S3 DC Interface

LA-7091P

1

25 48Tuesday, December 07, 2010

0.1

5

4

3

2

1

U70

C907 0.1U_0402_16V4ZC907 0.1U_0402_16V4Z

PCIE_FRX_DTX_N2<13>

PCIE_FRX_DTX_P2<13>

PCIE_FTX_C_DRX_N2<13>

PCIE_FTX_C_DRX_P2<13>

CLK_PCIE_LAN#<13>

D D

+3V_LAN

1 2

R1148 4.7K_0402_5%

1 2

R1150 4.7K_0402_5%R1150 4.7K_0402_5%

1 2

R1152 4.7K_0402_5%R1152 4.7K_0402_5%

C C

25MHZ_20PF_7A25000012

2

C1485

C1485 27P_0402_50V8J

27P_0402_50V8J

1

@

Y6

1 2

PLT_RST#

LAN_PME#

LAN_CLKREQ#

close to pin13

LAN_X2LAN_X1

CLK_PCIE_LAN<13>

FCH_PCIE_WAKE#<14,29,33>

EC_PME#<31>

LAN_CLKREQ#<14>

1

C1475

8151@

2

0.1U_0402_16V4Z

close to pin19

2

C1486

C1486 27P_0402_50V8J

27P_0402_50V8J

1

PLT_RST#<13,18,27,29,33>

1

2

close to pin31

1 2

C908 0.1U_0402_16V4ZC908 0.1U_0402_16V4Z

1 2

LAN_CLKREQ#

+1.1_AVDDL

1

C1477

C1476

8151@

2

0.1U_0402_16V4Z

close to pin34

R909 0_0402_5%R909 0_0402_5%

1 2

R1143 0_0402_5%@R1143 0_0402_5%@

1 2

R1144 0_0402_5%R1144 0_0402_5%

1 2

8151@

R1155 0_0402_5%

1 2

W=30mils

1

C1478

2

0.1U_0402_16V4Z

Change Y6 P/N as SJ100003300

PCIE_FRX_C_DTX_N2

PCIE_FRX_C_DTX_P2

CLK_PCIE_LAN# CLK_PCIE_LAN

8152@

1 2

1

C1480

C1479

2

1U_0402_6.3V6K

0.1U_0402_16V4Z

close to pin6

+3VALW

LAN_PME#

LAN_X2 LAN_X1

1.8V_VDDCT_REG

C14740.1U_0402_16V4Z

R1157 0_0603_5%R1157 0_0603_5%

U70

29

TX_N

Atheros

TX_P

RX_N

RX_P

REFCLK_N REFCLK_P

2

PERST#

3

WAKE#

SMCLK SMDATA

TEST_RST TESTMODE

7

XTLO

8

XTLI

4

CLKREQ#

AVDDL AVDDL AVDDL AVDDL

6

AVDDL_REG

GND

AR8151-AL1A_QFN40_5X5

8151@

Atheros

8151-AL1A

DVDDL_REG

AVDDH_REG

30

36

35

32 33

25 26

28 27

13 19 31 34

41

AR8151-AL1B PN:SA00003LE30 AR8152-AL1E PN:SA00003JW10

W=40mils

1 2

10U_0603_6.3V6M

C1490

1

2

+3V_LAN

C1491

1

2

10U_0603_6.3V6M

1U_0402_6.3V6K

LED_0 LED_1 LED_2

TRXN0 TRXP0 TRXN1 TRXP1 TRXN2 TRXP2 TRXN3 TRXP3

RBIAS

VDD33

VDDCT

DVDDL

AVDDH AVDDH

C1492

1

2

R1138 5.1K_0402_5%R1138 5.1K_0402_5%

1 2

LAN_ACTIVITY

38

LAN_LINK#

39

LED2_CKR# LAN_CLKREQ#

23

LAN_MDI0-

12

LAN_MDI0+

11

LAN_MDI1-

15

LAN_MDI1+

14

LAN_MDI2-

18

LAN_MDI2+

17

LAN_MDI3-

21

LAN_MDI3+

20

R1146 2.37K_0402_1%R1146 2.37K_0402_1%

10

R1146 keep away other singal (25mil)

1

40

LX

5

24 37

R1156 0_0603_5%8151@R1156 0_0603_5%8151@

16 22 9

LX

+1.7V_VDDCT

+1.1V_DVDDL

1 2

U71

12

W=40mils

W=30mils

8152@

AR8152-AL1E

1A

C1493

1

2

0.1U_0402_16V4Z

close to Pin 1

B B

LAN_MDI3+

1

C1503

@

1U_0402_6.3V6K

2

LAN_MDI3-

LAN_MDI2+ LAN_MDI2-

LAN_MDI1+ LAN_MDI1-

LAN_MDI0+ LAN_MDI0-

1000P_0402_50V7K

1

C1504

@

0.1U_0402_16V4Z

2

close to CT1

1000P_0402_50V7K

1

C1505

C1506

8151@

2

close to CT2

1000P_0402_50V7K

1

C1507

@

8151@

0.1U_0402_16V4Z

2

1

C1509

C1508

@

0.1U_0402_16V4Z

2

close to CT3

1000P_0402_50V7K

1

C1510

2

close to CT4

0_0603_5%

+1.7V_VDDCT

A A

0_0603_5%

1 2

R1160

@

T97

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

BOTHHAND_NS0013LF

T98

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

BOTHHAND_NS0013LF

8151@

1

C1511

0.1U_0402_16V4Z

2

CT1

CT2

CT3

CT4

12

R822

R822 75_0402_1%

75_0402_1%

8151@

RJ45_GND

RJ45_MDI3+ RJ45_MDI3-

RJ45_MDI2+ RJ45_MDI2-

RJ45_MDI1+ RJ45_MDI1-

RJ45_MDI0+ RJ45_MDI0-

40mil

16

TX+

15

TX-

14

CT

13

NC

12

NC

11

CT

10

RX+

9

16

TX+

15

TX-

14

CT

13

NC

12

NC

11

CT

10

RX+

9

75_0402_1%

R819

R820

12

R821

R821 75_0402_1%

75_0402_1%

R820

8151@

75_0402_1%

Place close to TCT pin

5

4

Pin23 Function:

1.CLKREQ

2.AR8152L revA PH:

1 2

R1139 0_0402_5%

8152@

+3V_LAN

+2.7V_AVDDH

SA00003JW10

W=30mils

+2.7V_AVDDH

LAN_MDI0+

LAN_MDI0-

LAN_MDI1+

LAN_MDI1-

LAN_MDI2+

LAN_MDI2-

LAN_MDI3+

LAN_MDI3-

C1494

1

C1495

1U_0402_6.3V6K

2

R1140 49.9_0402_1%R1140 49.9_0402_1%

1 2

R1142 49.9_0402_1%R1142 49.9_0402_1%

1 2

R1145 49.9_0402_1%R1145 49.9_0402_1%

1 2

R1147 49.9_0402_1%R1147 49.9_0402_1%

1 2

R1149 49.9_0402_1%

1 2

R1151 49.9_0402_1%

1 2

R1153 49.9_0402_1%

1 2

R1154 49.9_0402_1%

1 2

1

2

0.1U_0402_16V4Z

8151@

C1496

W=40mils

1

2

Close LAN chip

C1466 1000P_0402_50V7K

@

1 2

C1467 0.1U_0402_16V4ZC1467 0.1U_0402_16V4Z

1 2

C1468 1000P_0402_50V7K

1 2

@

C1469 0.1U_0402_16V4ZC1469 0.1U_0402_16V4Z

1 2

C1470 1000P_0402_50V7K

@

1 2

C1471 0.1U_0402_16V4Z

1 2

8151@

C1472 1000P_0402_50V7K

@

1 2

C1473 0.1U_0402_16V4Z

1 2

8151@

L108

1 2

4.7UH_PG031B-4R7MS_1.1A_20%

0.1U_0402_16V4Z

1

C1497

8151@

2

0.1U_0402_16V4Z

close to Lan pin16close to Lan pin22close to Lan pin9

R1158 0_0402_5%R1158 0_0402_5%

+3V_LAN

LAN_LINK#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/04/12 2010/10/12

1 2

R1159 511_0402_1%R1159 511_0402_1%

1

C1498

@

470P_0402_50V7K

2

C994,C995 for LED EMI

LAN_ACTIVITY

C1499

470P_0402_50V7K

T25

8152@

BOTH_TST1284

Compal Secret Data

Deciphered Date

12

1

@

2

LAN_ACTIVITY LAN_LINK#

SP050001X10

12

R1161 511_0402_1%R1161 511_0402_1%

J17

@

2

3

D47

D47 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

@

1

2

RJ45_MDI0+

RJ45_MDI0-

RJ45_MDI1+

RJ45_MDI2+

RJ45_MDI2-

RJ45_MDI1-

RJ45_MDI3+

RJ45_MDI3-

B88069X9231T203_4P5X3P2-2

2

1

JUMP_43X118

1

W=40mils

+1.7V_VDDCTLX

1

C1481

10U_0603_6.3V6M

2

W=30mils

+1.1V_DVDDL

C1487

1U_0402_6.3V6K

9

10

1

2

3

4

5

6

7

8

11

12

D59

@D59

@

12

1 2

C940 1000P_1206_2KV7KC940 1000P_1206_2KV7K

12

D60

@D60

@

L119

100UH +-20% SSC0301101MCF 0.18A

8151@

8152@

Title

Size Document Number Rev

Custom

Date: Sheet of

LAN_ACTIVITY

LAN_LINK#

* default

1

2

C1482

C1483

1000P_0402_50V7K

2

1

close to Lan pin40 close to Lan pin5

1

C1488

0.1U_0402_16V4Z

2

close to Lan pin24close to Lan pin37

JRJ45

@

D57

B88069X9231T203_4P5X3P2-2

JRJ45

SHLD1 SHLD2

SANTA_130451-K

CONN@

1

C1500

0.1U_0402_16V4Z

2

1 2

@

Green LED+

Green LED-

PR1+

PR1-

PR2+

PR3+

PR3-

PR2-

PR4+

PR4-

Yellow LED+

Yellow LED-

@

1 2

LANGNDRJ45_GND

Populate when AR8151-AL1A

Populate when AR8152-AL1E

Compal Electronics, Inc.

LAN AR8151 / AR8152

LA-7091P

1

*0

1*

0

1

C1484

0.1U_0402_16V4Z

2

1

C1489

0.1U_0402_16V4Z

2

Same as P5WE0

14 13

2

3

@

1

overclocking

Un-overclocking

SWR mod

LDO mode

40mil

D58

D58 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

26 48Tuesday, December 07, 2010

0.1

5

4

3

2

1

RTS5209-GR

+3VS +3VS_CR

D D

PCIE_FTX_C_DRX_P1<13>

PCIE_FTX_C_DRX_N1<13>

CLK_PCIE_CR<13>

CLK_PCIE_CR#<13>

PCIE_FRX_DTX_P1<13>

PCIE_FRX_DTX_N1<13>

C C

add 4.7UF

R1162 0_0805_5%R1162 0_08 05_5%

+3VS_CR

C1517 10U_0603_6.3V6MC1517 10U_0603_6.3V6M

1

2

C1522

1 2

6.8P_0402_50V8C

Reserved

1 2

PCIE_FTX_C_DRX_P1

PCIE_FTX_C_DRX_N1

CLK_PCIE_CR

CLK_PCIE_CR#

C1515 0.1U_0402_16V4ZC1515 0.1U_0402_16V4Z

C1513 0.1U_0402_16V4ZC1513 0.1U_0402_16V4Z

+CARDPWR

C1518 0.1U_0402_16V4ZC 1518 0 .1U_0402_16V4Z

1

2

C1520

SD_D1_R SD_D1

SD_D0_R SD_D0

SD_CLK_R SD_CLK

30mil

C1512 4.7U_0603_6.3V6KC 1512 4.7U_0603_6.3V6K

1 2

PCIE_FRX_C_DTX_P1PCIE_FRX_DTX_P1

1 2

PCIE_FRX_C_DTX_N1PCIE_FRX_DTX_N1

1 2

C1516 0.1U_0402_16V4ZC1516 0.1U_0402_16V4Z

XD_CD#

DV33_18

2

1

C1574

0.1U_0402_16V4Z

2

R1166 0_0402_5%R1166 0_04 02_5%

R1167 0_0402_5%R1167 0_04 02_5%

R1168 33_0402_5%R1168 33_0402_5%

R1169 0_0402_5%R1169 0_04 02_5%

R1170 0_0402_5%R1170 0_04 02_5%

4.7U_0603_6.3V6K

1

1 2

SP1_SDD7_XDRDY

SP2_SDD6_XDRE#

SP3_SDD5_XDCE#

SP4_SDD4_XDWE#

SD_CMDSD_CMD_R

SD_D3SD_D3_R

AV12

DV12DV12

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

AV12

6

HSOP

7

HSON

8

GND

9

DV12

10

Card1_3V3

11

3V3_IN

12

Card2_3V3

13

XD_CD#

14

DV33_18

15

GND

Rename to

16

XDRDY 1014

SP1

17

SP2

18

SP3

19

SP4

20

SD_D1

21

SD_D0

22

SD_CLK

23

SD_CMD

24

SD_D3

RTS5209-GR_LQFP48_7X7

U92

48

RREF

47

3V3_IN

46

CLK_REQ#

45

PERST#

44

EEDO

43

EECS

42

EESK

41

GPIO/EEDI

40

MS_INS#

39

SD_CD#

38

SP15

37

SP14

36

SP13

35

SP12

34

SP11

33

SP10

32

SP9

31

SP8

30

SP7

29

SP6

28

SP5

27

DV12_S

26

GND

25

SD_D2

R1163

RREF

6.2K_0603_1%

CR_CLKREQ#

1 2

R1164 0_0402_5%R1164 0_04 02_5%

CR_5IN1_LED#

MS_INS#

SD_CD#

SP15_SDWP_XDD7

SP14_MSCLK_XDD6

SP13_MSD7_XDD5

SP12_MSD3_XDD4

SP11_MSD6_XDD3

SP10_MSD2_XDD2

SP9_MSD0_XDD1

SP8_MSD4_XDD0

SP7_MSD1_XDWP #

SP6_MSD5_XDALE

SP5_MSBS_XDCLE

DV12_S

SD_D2 SD_D2_R

R1165 0_0402_5%R1165 0_04 02_5%

+3VS_CR

12

CR_CLKREQ# <14>

PLT_RST# <13,18,26,29,33>

CR_HPD <13>

CR_5IN1_LED# <32>

SP14_MSCLK_XDD6_R

1 2

C1521

1 2

C1523

1 2

R1171 0_0402_5%R1171 0_04 02_5%

1 2

C1514

0.1U_0402_16V4Z

2

C1519

@ C1519

@

6.8P_0402_50V8C

1

Reserved

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

SD_CLK_R SD_CMD_R SD_CD# SP15_SDWP_XDD7

R180

SD_D0_R SD_D1_R

@

SD_D2_R SD_D3_R

1 2

33_0402_5%

2

C124

@C124

@

1

SP9_MSD0_XDD1 SP7_MSD1_XDWP #

22P_0402_50V8J

SP10_MSD2_XDD2 SP12_MSD3_XDD4

SP14_MSCLK_XDD6_R

MS_INS# SP5_MSBS_XDCLE

@

R181

1 2

33_0402_5%

2

C125

@C125

@

1

22P_0402_50V8J

Card Reader Connector

+XDPWR_SDPW R_MSPWR

JREAD1

11

SD_VCC

18

MS_VCC

39

XD_VCC

8

SD_CLK

16

SD_CMD

1

SD_CD

2

SD_WP

4

SD/MMC_DAT0

3

SD/MMC_DAT1

21

SD/MMC_DAT2

19

SD/MMC_DAT3

10

MS_DATA0

9

MS_DATA1

12

MS_DATA2

15

MS_DATA3

17

MS_SCLK

14

MS_INS

7

MS_BS

TAITW_R013-P17-HM_NR

CONN@

XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7

XD_CD

XD_R/B

XD_RE

XD_CE XD_CLE XD_ALE

XD_WE

XD_WP-IN

SD_GND SD_GND MS_GND MS_GND XD_GND XD_GND

GND GND

SP8_MSD4_XDD0

31

SP9_MSD0_XDD1

32

SP10_MSD2_XDD2

33

SP11_MSD6_XDD3

34

SP12_MSD3_XDD4

35

SP13_MSD7_XDD5

36

SP14_MSCLK_XDD6_R

37

SP15_SDWP_XDD7

38

XD_CD#

22

SP1_SDD7_XDRDY

23

SP2_SDD6_XDRE#

24

SP3_SDD5_XDCE#

25

SP5_MSBS_XDCLE

26

SP6_MSD5_XDALE

27

SP4_SDD4_XDWE#

28

SP7_MSD1_XDWP #

29

6 13 5 20 30 40 41 42

R171

@

Rename to

33_0402_5%

XDRDY 1014

1 2

2

C123

@ C 123

@

22P_0402_50V8J

1

Change To new CNN

12/14 C1241 close to JREAD1.13

B B

check X'tal?

close to JREAD1.43

+XDPWR_SDPW R_MSPWR +XDPWR_SDPW R_MSPWR+CARDPWR

modify 0.1 u to 10uF

2

C1524

1

10U_0603_6.3V6M

C1242 close to JREAD1.22

1

C1525

2

0.1U_0402_16V4Z

30mil

1

C1526

2

0.1U_0402_16V4Z

R1173

100K_0402_5%

@

1 2

R1172 0_0805_5%R1172 0_0805_5%

1

C1527

0.1U_0402_16V4Z

2

30mil

C6, C7 close to connector

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2010/04/12 2010/10/12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Compal Electronics, Inc.

CardReader-RTS5209-GR

LA-7091P

1

0.1

27 48Tuesday, December 07, 2010

0.1

5

change 1206?

1 2

R1174 0_0805_5%R1174 0_0805_5%

+5VS

1

C1528

0.1U_0402_16V4Z

D D

2

U94

60mil 40mil

1

IN

5

4

+VDDA

1 2

C1529

0.01U_0402_16V7K

@

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

@

(output = 300 mA)

4.75V

SM010014520 3000ma 220ohm@100mhz DCR 0.04

0.1U_0402_16V4Z

L110

+VDDA

FBMA-L11-201209-221LMA30T_0805

12

@

10U_0805_10V4Z

SM010014520 3000ma 220ohm@100mhz DCR 0.04

L111

+VDDA

FBMA-L11-201209-221LMA30T_0805

12

10U_0805_10V4Z

SM010030010 200ma 120ohm@100mhz DCR 0.2

L113

+VDDA

C C

Internal MIC

COM_MIC

Combo MIC

12

BLM18AG121SN1D_0603

R1188 1K_0402_5%R1188 1K_0402_5%

R1189 1K_0402_5%R1189 1K_0402_5%

10U_0805_10V4Z

12

External MIC

B B

HP_PLUG#

R1199 39.2K_0402_1%R1199 39.2K_0402_1%

MIC_PLUG#

R1200 20K_0402_1%R1200 20K_0402_1%

A A

12

MIC2JD

EAPD<31>

5

0.1U_0402_16V4Z

1

C1534

C1533

2

@

Place near Pin46

0.1U_0402_16V4Z

1

C1537

C1536

2

Place near Pin39

0.1U_0402_16V4Z

1

C1543

2

Place near Pin25, 38

INT_MICINT_M IC_R

COM_MIC_R

MIC1_L

Combo MIC

Internal MIC

External MIC

C1555

R1196

C1556 2.2U_0402_6.3VMC1556 2.2U_0402_6.3VM

1 2

R1201 20K_0402_1%R1201 20K_0402_1%

1 2

R1202 0_0402_5%R1202 0_0402_5%

1

2

1

2

1

2

C1546

C1547

C1548

C1549

C1550

C1551

1

2

+MIC2_VREFO

+MIC1_VREFO

1 2

C1544

0.1U_0402_16V4Z

1 2

C1552

2.2U_0402_6.3VM

+INTMIC_VREFO

10U_0805_10V4Z

20mil

1

C1545

2

LINE2_C_L

4.7U_0603_6.3V6K

LINE2_C_R

4.7U_0603_6.3V6K

MIC2_C_L

4.7U_0603_6.3V6K

MIC2_C_R

4.7U_0603_6.3V6K

MIC1_C_L

4.7U_0603_6.3V6K

MIC1_C_RMIC1_R

4.7U_0603_6.3V6K

12

20K_0402_1%

SENSE_A SENSE_B

+PVDD_HDA

+PVDD1_HDA

10mil

DGND

10mil

U93

14

15

16

17

23

24

21

22

35

36

29

30

31

28

19

34

13 18 47

48

7

49

ALC271X-GR_QFN48_7X7

0_0603_5%

+AVDD_HDA

LINE2_L

LINE2_R

68mA

MIC2_L

MIC2_R

LINE1_L

LINE1_R

MIC1_L

MIC1_R

CBN

CBP

MIC2_VREFO

MIC1_VREFO_R

MIC1_VREFO_L

LDD_CAP

JDREF

CPVEE

SENSE A SENSE B EAPD

SPDIFO

DVSS

GND

+PVDD_HDA

R1184

38

AVDD125AVDD2

4

1 2

39

PVDD1

600mA

GND

4

HD Audio Codec

10mil

1

46

DVDD

PVDD2

35mA

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HPOUT_L

HPOUT_R

SDATA_IN

SDATA_OUT

RESET#

GPIO0/DMIC_DATA

GPIO1/DMIC_CLK

PCBEEP

MONO_OUT

AVSS2

AVSS1 PVSS2 PVSS1

J1 JUMP_43X39@J1JUMP_43X39@

2

112

J2 JUMP_43X39@J2JUMP_43X39@

2

112

J3 JUMP_43X39@J3JUMP_43X39@

2

112

GNDA

BEEP#<31>

FCH_SPKR<14>

+3VS_DVDD

1

C1538

0.1U_0402_16V4Z

2

9

DVDD_IO

40

41

45

44

32

33

HDA_SDIN0_AUDIO

8

5

10

SYNC

11

6

BCLK

2

3

4

PD#

MONO_IN

12

20 37

CODEC_VREF

27

VREF

10mil

26 43 42

AGND

GND GNDA

3

R1178

D48

C1532

1 2

1U_0402_6.3V4Z

C1535

1 2

1U_0402_6.3V4Z

D48

2 1

R1180

1 2

560_0402_5%

R1183

1 2

560_0402_5%

10K_0402_5%

CH751H-40PT_SOD323-2

SM010030010 200ma 120ohm@100mhz DCR 0.2

10U_0603_6.3V6M

1

C1539

2

0.1U_0402_16V4Z

Place near Pin1, 9

SPKL+

SPKL-

SPKR+

SPKR-

HP_LEFT

HP_RIGHT

1 2

HDA_SDOUT_AUDIO < 14>

HDA_SYNC_AUDIO <14>

HDA_RST_AUDIO# <14>

HDA_BITCLK_AUDIO < 14>

R1193

1 2

FBMA-10-100505-301T_2P

EC_MUTE# <31>

C1559 0.1U_0402_16V4ZC1559 0. 1U_0402_16V4Z C1560 10U_0805_10V4Z

C1560 10U_0805_10V4Z

Place next pin27

1

C1540

2

R1192

R1192 33_0402_5%

33_0402_5%

1 2

1 2 1 2

@

EC_MUTE#

C1554

C1554 22P_0402_50V8J

22P_0402_50V8J

1 2

R32 4. 7K_0402_5%

BLM18AG121SN1D_0603

HDA_SDIN0 <14>

@

vender suggest @ to improve bo sound noise 0930

J4 JUMP_43X39@J4JUMP_43X39@

2

112

J5 JUMP_43X39@J5JUMP_43X39@

2

112

J6 JUMP_43X39@J6JUMP_43X39@

2

112

3

2

+VDDA

12

R1175

+3VS

12

2

B

D50

D50 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

2 1

L112

10K_0402_5%

1 2

C1530 1U_0402_6.3V4ZC1530 1U_0402_6.3V4Z

12

R1179

R1179 10K_0402_5%

10K_0402_5%

C1531

1 2

1U_0402_6.3V4Z

1

C

Q130

E

3

2SC2411K_SOT23-3

12

+3VS

MONO_IN

1 2

R1181

2.4K_0402_1%

HP_LEFT

R1186 75_0603_5%R1186 75_0603_5%

1 2

HP_RIGHT HPOUT_R _1

R1187 75_0603_5%R1187 75_0603_5%

1 2

SPKR+

R1176 0_0603_5%R1176 0_0603_5%

1 2

SPKR-

R1177 0_0603_5%R1177 0_0603_5%

1 2

SPKL+

R1182 0_0603_5%R1182 0_0603_5%

1 2

R1185 0_0603_5%R1185 0_0603_5%

1 2

HPOUT_L_1

1 2

PJDLC05C_SOT23-3

330P_0402_50V7K

L114 FBMA-L11-160808-700LMT_2PL114 FBMA-L11-160808-700LMT_2P

L115 FBMA-L11-160808-700LMT_2PL115 FBMA-L11-160808-700LMT_2P

SM010004010 300ma 70ohm@100mhz DCR 0.3

+MIC2_VREFO

R1220

22K_0402_5%

12

R1191

1 2

CH751H-40PT_SOD323-2

MIC2JD

Q131

BSS138_NL_SOT23-3

13

D

S

2

G

10U_0805_10V4Z

C1553

1 2

22K_0402_5%

1

2

For EMI

MIC1_L_1

L116

1 2

R1197 1K_0603_5%R1197 1K_0603_5%

MIC1_R

1 2

R1198 1K_0603_5%R1198 1K_0603_5%

SM010004010 300ma 70ohm@100mhz DCR 0.3

INT_MIC_L

2

3

D56

@

PJDLC05C_SOT23-3

1

Security Classification

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2010/08/04 2010/08/04

FBMA-L11-160808-700LMT_2P

MIC1_R_1

L117

FBMA-L11-160808-700LMT_2P

Compal Secret Data

1 2

+INTMIC_VREFO

Deciphered Date

vender suggest add 22k for discharge speed 0930

R1190

2.2K_0402_5%

COM_MIC

2

+MIC1_VREFO

D53

R1194

4.7K_0402_5%

C1557

220P_0402_50V7K

SM010004010 300ma 70ohm@100mhz DCR 0.3

12

R1203

R1203 10K_0402_5%

10K_0402_5%

15mil

INT_MIC_R

FBMA-L11-160808-700LMT_2P

1

C1561

220P_0402_50V7K

2

Int. Speaker Conn.

20mil

2

D49

@

1

20mil

D51

PJDLC05C_SOT23-3

C1541

HPOUT_L_2

HPOUT_R_2

21

12

1

2

For EMI

L118

1 2

@

2

C1542

330P_0402_50V7K

1

21

D54

D54 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

R1195

4.7K_0402_5%

MIC1_L_RMIC1_L

MIC1_R_R

1

C1558

220P_0402_50V7K

2

15mil

INT_MIC_L

1

JSPK1

SPK_R+

3

SPK_R-

2

3

1

COM_MIC

HP_PLUG#

2

3

MIC_PLUG#

D55

PJDLC05C_SOT23-3

1

Int. MIC

JMIC2

1

2

3

G1

4

G2

ACES_88266-02001

CONN@

Title

Size Document Number Rev

C

LA-7091P

Date: Sheet of

JSPK1

1

2

3

G1

4

G2

ACES_88266-02001

CONN@

JSPK2

SPK_L+ SPK_L-SPKL-

JSPK2

1

2

3

G1

4

G2

ACES_88266-02001

CONN@

Singatron 2SJ2326 DC021007151

Headphone Out

JHP1

3 6

1

2 4

5

SINGA_2SJ2326-001111

CONN@

MIC_PLUG#

HP_PLUG#

2

3

D52

D52 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

MIC JACK

JMIC1

1 2

3

4

5

6

SINGA_2SJ-A960-C01

CONN@

Compal Electronics, Inc.

HD Audio Codec ALC271X

1

28 48T uesday, December 07, 2010

0.1

5

4

3

2

1

Mini-Express Card for WLAN

+1.5VS+3VS

FCH_PCIE_WAKE#

+3VS

0_0402_5%

1 2

R492

R492 100K_0402_5%

100K_0402_5%

1

C706

0.1U_0402_16V4Z

2

R440 0_0402_5%@R440 0_0402_5%@

E51TXD_P80DATA_R E51RXD_P80CLK

1

C705

4.7U_0805_10V4Z

2

D D

C C

FCH_PCIE_WAKE#<14,26,33>

MINI1_CLKREQ#<14>

CLK_PCIE_MINI1#<13>

CLK_PCIE_MINI1<13>

PCIE_FRX_DTX_N3<13> PCIE_FRX_DTX_P3<13>

PCIE_FTX_C_DRX_N3<13> PCIE_FTX_C_DRX_P3<13>

R445

E51TXD_P80DATA<31>

E51RXD_P80CLK<31>

R445

1 2

1

C707

0.1U_0402_16V4Z

2

JMINI1

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132

33

35

37

39

41

43

45

47

49

51

GND53GND

ACES_51711-0520W-001

CONN@

1

C708

4.7U_0805_10V4Z

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34

34

36

38

40

42

44

46

48

50

52

54

same conn as P5WE0

Height : 6.7mm

1

C709

0.1U_0402_16V4Z

2

WL_OFF# PLT_RST#

+3VS_MINI1

MINI1_SMBCLK MINI1_SMBDAT

WIMAX_LED# WLAN_LED#_L

1

C710

0.1U_0402_16V4Z

2

1 2

R441 0_0603_5%R441 0_0603_5%

1 2

R442 0_0603_5%@R442 0_0603_5%@

@

1 2

@

R443 0_0603_5%

1 2

R444 0_0603_5%

(MINI1_LED#)

USB20_N8 <14> USB20_P8 <14>

+3VS

+1.5VS

WL_OFF# <31>

PLT_RST# <13,18,26,27,33>

+3VS +3VALW

+3VS

1 2

R836 10K_0402_5%

FCH_SMCLK0 <8,9,14> FCH_SMDAT0 <8, 9,14>

@

+3VS

1

C1575

3G@

0.1U_0402_16V4Z

2

Power Primary Power (mA)

+3VS

+3V

+1.5VS

WIMAX_LED#

WLAN_LED#_L

Mini Card Power Rating

NormalPeak Normal

1000

330

500

R835

CHP202UPT_SOT323-3

R837 0_0402_5%R837 0_0402_5%

1 2

2

3

D44

1 2

0_0402_5%

@D44

@

750

250

375

1

Auxiliary Power (mA)

250 (wake enable)

5 (Not wake enable)

+3VS

12

R848

R848 100K_0402_5%

100K_0402_5%

MINI1_LED# <31>

(9~16mA)

Reserve

+3VS

+3VS_FULL+3VS_FULL +1.5VS

60mil

R1206 0_1206_5%

MINI2_CLKREQ#<14>

CLK_PCIE_MINI2<13>

+3VS_FULL

12

FCH_PCIE_WAKE#

5

@ R1207

@

0_0402_5%

1 2

+3VS +3VS_FULL

B B

CLK_PCIE_MINI2#<13>

PCIE_FRX_DTX_N0<13, 33> PCIE_FRX_DTX_P0<13,33>

PCIE_FTX_C_DRX_N0<13,33> PCIE_FTX_C_DRX_P0<13,33>

A A

R1207

(WLAN_BT_DATA) (WLAN_BT_CLK)

E51TXD_P80DATA_R E51RXD_P80CLK

1

C1564

4.7U_0805_10V4Z

2

1

C1565

0.1U_0402_16V4Z

2

JMINI2

1 3 5 7 9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

BELLW_80003-1021

CONN@

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

GND2

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

1

C1566

4.7U_0805_10V4Z

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

C1567

0.1U_0402_16V4Z

2

+1.5VS +3VS_FULL

+3VS_MINI2

MINI2_SMBCLK MINI2_SMBDATA FCH_SMDAT0

1

C1568

0.1U_0402_16V4Z

2

The same circuit with JMINI1,

but different PCIE & USB....

WL_OFF#

PLT_RST#

R1208 0_0603_5%R1208 0_0603_5%

1 2

R1209 0_0603_5%@R1209 0_0603_5%@ R1210 0_0402_5%@R1210 0_0402_5%@

1 2

R1211 0_0402_5%@R1211 0_0402_5%@

USB20_N9_R USB20_P9_R

1 2

R1213 0_0402_5% R1213 0_0402_5%

1 2

R1214 0_0402_5% R1214 0_0402_5%

1 2

R1215 0_0402_5%R1215 0_0402_5%

1 2

(9~16mA)

same conn as P5WE0

Height : 4mm

4

1

C1569

0.1U_0402_16V4Z

2

MINI2_LED#

+3VS +3VALW

FCH_SMCLK0

USB20_N9 USB20_P9

USB20_N9 <14> USB20_P9 <14>

Close to 3G CONN

Security Classification

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDEN TIAL AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANS FERED FROM THE C USTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

1

+

2

Peak: 2.75A Normal: 1.1A

1

C1576

C1576 220U_6.3V_M

220U_6.3V_M

3G@

47P_0402_50V8J

1

C1577

C1578

3G@

2

10U_0603_6.3V6M

J3G1

20

22

20

GND

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

21

1

GND

ACES_87213-2000G

CONN@

20mil

Compal Secret Data

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

2

For 3G / GPS

To 3G Module Connect

+3VS +3VS

R1221

R1221 100K_0402_5%

100K_0402_5%

3G@

1 2

WWAN_OFF# MINI2_LED#

0_0402_5%

SUSP<37,44>

+VSB

USB20_N11_R1 USB20_P11_R1

R1258 0_0402_5%SIN@R1258 0_0402_5%SIN@ R1257 0_0402_5%SIN@R1257 0_0402_5%SIN@

47K_0402_5%

1 2 1 2

R790

3G@

SUSP

R1222

3G@ R1222

3G@

R1223

3G@ R1223

3G@

0_0402_5%

3G_GATE

R03 modify

12

13

D

Q64

2

3G@

G

S

SSM3K7002F_SC59-3

Title

MINI CARD / CardReader RTS5137

Size Document Number Rev

Date: Sheet of

WWAN_OFF# NEED CHECK

WWAN_OFF# <31> MINI2_LED# <31>

USB20_N11 <14> USB20_P11 <14>

USB20_N10 <14> USB20_P10 <14>

3G@

1

C820

0.1U_0603_25V7K

2

Compal Electronics, Inc.

LA-7091P

1

0.1

29 48T uesday, December 07, 2010

0.1

5

4

3

2

1

SATA HDD Conn.

JHDD1

1

SATA_ITX_DRX_P0<15> SATA_ITX_DRX_N0<15>

SATA_DTX_C_IRX_N0<15>

D D

C C

SATA_DTX_C_IRX_P0<15>

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

R405 0_0805_5 %R405 0_0805_5 %

+5VS

1 2

C657 0.01U_0402_16V7KC657 0.01U_0402_16V7K

1 2

C659 0.01U_0402_16V7KC659 0.01U_0402_16V7K

1 2

+3VS

1

C639

0.1U_0402_16V4Z

2

10U_0805_10V4Z

1

C661

2

1U_0402_6.3V4Z

1

2

C660

+3VS

+5VS_HDD

0.1U_0402_16V4Z

1

C662

2

1000P_0402_50V7K

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

1

C663

2

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Rsv

19

GND

20

12V

21

12V

22

12V

23

GND

24

GND

OCTEK_SAT-22DD1G

CONN@

Same as P5WE0

+3VS

SATA ODD FFC Conn.

SATA ODD Conn.

R736

13

D

R737

1M_0402_5%

12

Q85

1 2

2

G

@

R736 10K_0402_5%

10K_0402_5%

@

ODD_DA#_R

12

@R737

@

1 2

R735

13

D

10K_0402_5%

S

Need to check, CRB IRLML6401 Rds(on)=50mohm, Id=4.3A

+5VS

1000P_0402_50V7K

@R735

@

1

C990

2

Q84

AO3413_SOT23-3

S

@C990

@

SATA_ITX_DRX_P1<15> SATA_ITX_DRX_N1<15>

SATA_DTX_C_IRX_N1<15> SATA_DTX_C_IRX_P1<15>

ODD_DETECT#<14>

G

ODD_DA#_R

@

D

13

2

+5VS

100mils

+5VS_ODD

C650 0.01U_0402_16V7KC650 0.01U_0402_16V7K

1 2

C651 0.01U_0402_16V7KC651 0.01U_0402_16V7K

1 2

R1216 0_0402_5%@R1216 0_0402_ 5%@

1 2

R955 0_0 805_5% R955 0_0805_5%

1 2

R763

@R763

@

1 2

0_0402_5%

SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

+5VS_ODD

JODD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11 12

GND

MD

GND

GND13GND

OCTEK_SLS-13SB1G_RV

CONN@

17 16 15 14

Same as P5WE0

+5VS_ODD

10U_0805_10V4Z

1

2

80mils

C1571

1U_0402_6.3V6K

C1571

1U_0402_6.3V6K

C1570

1

2

C1573

1000P_0402_50V7K

C1573

1000P_0402_50V7K

C1572

0.1U_0402_16V4Z

C1572

0.1U_0402_16V4Z

1

2

G

2

S

R152

@R152

@

0_0402_5%

S

Q88

Q88 2N7002_SOT23

2N7002_SOT23

@

R732

1M_0402_5%

2N7002_SOT23

+3VS

@R732

@

ODD_DA#_FCH<14>

B B

8/13 Reserve zero power ODD Function

ODD_PWR<15>

A A

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HDD & ODD CONN

LA-7091P

30 48Tuesday, December 07, 2010

1

0.1

5

4

3

2

1

+3VALW

0.1U_0402_16V4Z

C725

0.1U_0402_16V4Z

SERIRQ<13>

LPC_AD3<1 3> LPC_AD2<1 3> LPC_AD1<1 3> LPC_AD0<1 3>

@

1 2

0.1U_0402_16V4Z

1

C726

2

EC_GA20 EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

LPC_CLK0_EC

EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SLP_S3# SLP_S5# EC_SMI# LOCAL_DIM MINI1_LED#

COLOY_ENG_EN EC_INVT_PWM FAN_SPEED1 BT_ON# E51TXD_P80DATA E51RXD_P80CLK ON/OFF PWR_SUSP_LED WLAN_LED#

12

C727

EC_CRY1 EC_CRY2

R889

R889 100K_0402_5%

100K_0402_5%

@

2

C728

1000P_0402_50V7K

1

U26

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

2

C729

C729 1000P_0402_50V7K

1000P_0402_50V7K

1

Int. K/B

Int. K/B Matrix

Matrix

0.1U_0402_16V4Z

1

C724

2

D D

C C

@

R851

R851 0_0402_5%

0_0402_5%

1 2

B B

No use for Scheck list

KSO[0..17]

KSI[0..7]

C732

22P_0402_50V8J@

12

LPC_CLK0_EC<13>

+3VALW

+5VS

+3VS+3VA LW

1 2

+3VALW

R462 47K_0402_5%R462 47K_0402_5%

C733 0.1U_0402_16V4ZC733 0.1U_0402_16V4Z

1 2

R465 4.7K_0402_5%R465 4.7K_0402_5%

1 2

R466 4.7K_0402_5%R466 4.7K_0402_5%

@

R852

R852 0_0402_5%

0_0402_5%

@

1 2

R467 2.2K_0402_5%

@

1 2

R468 2.2K_0402_5%

1 2

R471 2.2K_0402_5%R471 2.2K_0402_5%

1 2

R472 2.2K_0402_5%R472 2.2K_0402_5%

1 2

R473 47K_0402_5%R473 47K_0402_5%

1 2

R474 47K_0402_5%R474 47K_0402_5%

R475 100K_0402_5%R475 100K_0402_5%

@

1 2

R476 10K_0402_5%

@

R497 100K_0402_5%

R488 100K_0402_5%R488 100K_0402_5%

R844 100K_0402_5%R844 100K_0402_5%

R845 100K_0402_5%R845 100K_0402_5%

KSO[0..17] <32>

KSI[0..7] <32>

@

R461 33_0402_5%

12

TP_CLK

TP_DATA

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK1

EC_SMB_DA1

KSO1

KSO2

LID_SW#

12

EC_PME#

PBTN_OUT#

12

For LED INV_PWM freq to 1K

ENBKL

12

LOCAL_DIM

12

COLOY_ENG_EN

12

2

0.1U_0402_16V4Z

EC_GA20<14>

EC_KBRST#<14>

LPC_FRAME#<13>

A_RST#<13>

EC_SCI#<14>

R489

10K_0402_5%

EC_SMB_CK1<41> EC_SMB_DA1<41> EC_SMB_CK2<5,19> EC_SMB_DA2<5,19>

SLP_S3#<14> SLP_S5#<14> EC_LID_OUT# <14>

EC_SMI#<1 4>

MINI1_LED#<29>

EC_INVT_PWM<10>

FAN_SPEED1<36>

BT_ON#<33>

ON/OFF<36>

PWR_SUSP_LED<32>

WLAN_LED#<32>

For Low PWR panel use

RTC_CLK

RTC_CLK<13,17>

EC_CRY1 EC_CRY2

2

C739

15P_0402_50V8J

A A

1

2

C740

X1

15P_0402_50V8J

1

OSC4OSC

NC3NC

32.768KHZ_12.5PF_Q13MC14610002

1 2

R888 0_0402_5%

@

1 2

BLM18AG601SN1D_2P

9

22

33

96

111

VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

SM Bus

GPIO

GND

11

24

35

94

L84

+EC_VCCA

1

2

ECAGND

67

125

VCC

AVCC

INVT_PWM/PWM 1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03

EC_LID_OUT#/GPXO04

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

GPI

AGND

GND

KB930QF A1 LQFP 128P

69

20mil

113

ECAGND

C730

0.1U_0402_16V4Z

AD3/GPIO3B AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

BKOFF#/GPXO08

GPXO10 GPXO11

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

L85

BLM18AG601SN1D_2P

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

12

MINI2_LED# BEEP#

ACOFF

BATT_TEMP

ADP_I AD_BID0 AD_PID0

DAC_BRIG EN_DFAN1 IREF CALIBRATE#

EC_MUTE#

WWAN_LED #

TP_CLK TP_DATA

3S/4S# 65W/90W# VLDT_EN LID_SW#

BATT_BLUE_LED# INT_VGAPWR_ON BATT_AMB_LED# PWR_LED SYSON VR_ON ACIN

EC_RSMRST# EC_LID_OUT# EC_ON EC_SWI#

EC_PWROK_R BKOFF# WL_OFF#

VGATE ENBKL EAPD EC_THERM# SUSP# PBTN_OUT# EC_PME#

1

C736

4.7U_0805_10V4Z

2

BEEP# <28>

ACOFF <38,39>

ADP_I <39>

DAC_BRIG <10> EN_DFAN1 <36>

IREF <39>

CALIBRATE# <39>

EC_MUTE# <28>

WWAN_LED # <32>

TP_CLK <32>

TP_DATA <32>

3S/4S# <39> 65W/90W# <39>

VLDT_EN <37>

LID_SW# <32>

EC_SI_SPI_SO <32> EC_SO_SPI_SI <32>

EC_SPICS#/FSEL# <32>

FSTCHG <39> BATT_BLUE_LED# <32> INT_VGAPWR_ON <24> BATT_AMB_LED# <32>

PWR_LED <32> SYSON <33,37,42> VR_ON <46> ACIN <25,37,39>

EC_RSMRST# <14>

EC_ON <36,40> EC_SWI# <14>

BKOFF# <10>

WL_OFF# <29>

WWAN_OFF# <29>

VGA_ON <24,37>

VGATE <14,46>

ENBKL <10> EAPD <28> EC_THERM# <5>

SUSP# <37,42,43>

PBTN_OUT# <14> EC_PME# <26>

MINI2_LED# <29>

ECAGND

12

C731 0.01U_04 02_16V7KC731 0.01U_0402_16V7K

BATT_TEMP <41>

FBMA-10-100505-301T_2P

R419

1 2

Reserve for EMI, close to EC

Delay SUSP# 10ms

For EC Tools

ACES_85205-0400

@

EC_SPICLK <32>

C783

C783 33P_0402_50V8K

33P_0402_50V8K

+3VALW

JP7

1

2

3

4

65W/90W#

VR_ON

3S/4S#

Analog Project ID definition

Ra

Rb

Analog Board ID definition

Ra

Rb

EC_PWROK_R

BATT_TEMP

ACIN

Place on MiniCard door

E51RXD_P80CLK E51TXD_P80DATA

R458 100K_0402_5%R458 100K_0402_5%

R459 100K_0402_5%R459 100K_0402_5%

1 2

R460 4.7K_0402_5%R460 4.7K_0402_5%

+3VALW

R463

@

100K_0402_5%

1 2

AD_PID0

R464

8.2K_0402_5%

1 2

+3VALW

@

R469

100K_0402_5%

1 2

AD_BID0

R470

8.2K_0402_5%

1 2

R254 0_0402_5%R254 0_0402_5%

C737 100P_0402_50V8JC737 100P_04 02_50V8J

12

C741 100P_0402_50V8JC741 100P_04 02_50V8J

12

E51RXD_P80CLK <29> E51TXD_P80DATA <29>

12

1

C734

0.1U_0402_16V4Z

2

1

C735

0.1U_0402_16V4Z

2

+3VALW

Project_ID : 0-> 1-> 2->

Board_ID : 0-> 1->

EC_PWROK <14>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

EC ENE KB930

LA-7091P

1

0.1

31 48Tuesday, December 07, 2010

0.1

A

B

C

D

E

To TP/B Conn.

C742 0.1U_0402_16V4ZC742 0.1U_0402_16V4Z

1 2

+3VALW

R479 0_0603_5%R479 0_0603_5%

1 1

2 2

3 3

4 4

EC_SPICS#/FSEL#<31>

+3VALW

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

KSO15

C749 100P_0402_50V8J

KSO14

C751 100P_0402_50V8J

KSO13

C753 100P_0402_50V8J

KSO12

C755 100P_0402_50V8J

KSI0

C757 100P_0402_50V8J

KSO11

C759 100P_0402_50V8J

KSO10

C761 100P_0402_50V8J

KSI1

C763 100P_0402_50V8J

KSI2

C765 100P_0402_50V8J

KSO9

C767 100P_0402_50V8J

KSI3

C769 100P_0402_50V8J

KSO8

C771 100P_0402_50V8J

G1 G2

EC_SPICS#/FSEL#

27 28

R480 4.7K_0402_5%R480 4.7K_0402_5%

1 2

R482 4.7K_0402_5%R482 4.7K_0402_5%

1 2

JKB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

ACES_85201-26051

CONN@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

1 2

@

SPI_WP# SPI_HOLD#

1 2

+SPI_VCC

U27

1

CS#

3 7 4

VCC

WP#

SCLK HOLD# GND

MX25L1605DM2I-12G SOP 8P

SA000041N00

SI

SO

INT_KBD Conn.

KSI[0..7]

KSO[0..17]

Same as P5WE0

KSO16

C747 100P_0402_50V8J

1 2

KSO17

C748 100P_0402_50V8J

1 2

KSO7

C750 100P_0402_50V8J

1 2

KSO6

C752 100P_0402_50V8J

1 2

KSO5

C754 100P_0402_50V8J

1 2

KSO4

C756 100P_0402_50V8J

1 2

KSO3

C758 100P_0402_50V8J

1 2

KSI4

C760 100P_0402_50V8J

1 2

KSO2

C762 100P_0402_50V8J

1 2

KSO1

C764 100P_0402_50V8J

1 2

KSO0

C766 100P_0402_50V8J

1 2

KSI5

C768 100P_0402_50V8J

1 2

KSI6

C770 100P_0402_50V8J

1 2

KSI7

C772 100P_0402_50V8J

1 2

KSI[0..7] <31>

KSO[0..17] <31>

@

8 6 5 2

EC_SPICLK_R

R481 0_0402_5%R481 0_0402_5%

1 2

EC_SO_SPI_SI <31> EC_SI_SPI_SO <31>

PWR_LED<31>

PWR_SUSP_LED<31>

+3VS

2

1

R487

100K_0402_5%

R490

100K_0402_5%

1 2

150_0402_1%

1 2

R1217 750_0402_1%R1217 750_0402_1%

1 2

150_0402_1%

C122

C122 22P_0402_50V8J

22P_0402_50V8J

@

61

2

1 2

34

5

1 2

R1224

R1218

EC_SPICLK <31>

PWR_LED#

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6 Q26A

Q26A

PWR_SUSP_LED#

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6 Q26B

Q26B

LED8

BLED8

HT-191NB5_BLUE

2 1

B

LED4

2 1

A

HT-191UD5_AMBER

LED7

BLED7

HT-191NB5_BLUE

2 1

B

LED3

BLED3

HT-191NB5_BLUE

2 1

B

LEFT_BTN# RIGHT_BTN#

WWAN_LED #

WLAN_LED#

SW1

SW1 SMT1-05-A_4P

SMT1-05-A_4P

3

4

5

MEDIA_LED#

JTP1

7 8

ACES_85201-0605N

CONN@

6

+5VS

1

2

3

4

5

6

6 GND GND

1

2

For EC request

+3VALW

+3VS

WWAN_LED # <31>

+3VALW

TP_CLK <31>

1 2 3 4 5 6 7 8 9 10

MEDIA_LED#

150_0402_1%

R511

1 2

R499

150_0402_1%

1 2

TP_DATA <31>

SW2

SW2 SMT1-05-A_4P

SMT1-05-A_4P

3

4

5

LID_SW# WLAN_LED# MEDIA_LED#

PWR_LED# ON/OFFBTN#

4

6

LEFT_BTN# RIGHT_BTN#

JLED1

1 2 3 4 5 6 7

8 GND GND

ACES_85201-0805N

CONN@

R477 750_0402_1%@R477 750_0402_1%@

R478 750_0402_1%R478 750_0402_1%

R498 750_0402_1%R498 750_0402_1%

For PEW76/86/96 LED light,

R477, R499 change as 750 ohm

R478 change as 3.01k ohm

R498 change as 3.3k ohm

1

2

PJDLC05C_SOT23-3

+3VALW

+3VS

5

U29

2

P

B

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

LED5

LED5 HT-191NB5_BLUE

HT-191NB5_BLUE

2 1

B

LED1

LED1 HT-191UD5_AMBER

HT-191UD5_AMBER

2 1

A

LED6

LED6 HT-191NB5_BLUE

HT-191NB5_BLUE

2 1

B

LED2

LED2 HT-191UD5_AMBER

HT-191UD5_AMBER

2 1

A

+5VS

C745

0.1U_0402_16V4Z

RIGHT_BTN#

LEFT_BTN#

2

3

D11

PJDLC05C_SOT23-3

1

LID_SW# <31>

WLAN_LED# <31>

ON/OFFBTN# <36>

+3VS

R486

100K_0402_5%

1 2

PWR_LED#

PWR_SUSP_LED#

BATT_BLUE_LED#

BATT_AMB_LED#

3

Same as P5WE0 CNN

Pop R486 for RTS5137

CR_5IN1_LED# <27>

SATA_LED# <15>

BATT_BLUE_LED# <31>

BATT_AMB_LED# <31>

2

1

TP_CLK

TP_DATA

D13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

KB/TP/LED/SPI ROM/PWRb

LA-7091P

32 48Tuesday, December 07, 2010

E

0.1

A

B

C

D

E

SVPE, 4.4m, 17mohm

+3VALW

12

R446

+5VALW

1 1

C713

4.7U_0805_10V4Z

SYSON#<37>

1

2

U24

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

EN

EPAD

9

AP2301MPG-13_MSOP8

+USB_VCCA

80mil

8 7 6 5

FLG

R446 100K_0402_5%

100K_0402_5%

1 2

R447

0.1U_0402_16V4Z

10K_0402_5%

1

C714

2

USB_OC0# < 14>

USB20_N0<14>

USB20_P0<14>

USB20_N0_R

USB20_N0

USB20_P0

D10

4

+USB_VCCA

12

+

C711

220U_6.3V_M

1 2

R448 0_0402_5%@R448 0_0402_5%@

L83

1

2

4

WCM2012F2S-900T04_0805

R451 0_0402_5%@R451 0_0402_5%@

4

1 2

3

470P_0402_50V7K

2

3

USB20_P0_R

1

C712

2

W=80mils

USB20_N0_R USB20_P0_R

JUSB1

1 2 3 4

5 6 7 8

Same as P5WE0 CNN

VCC DD+

GND

GND1 GND2 GND3 GND4

SUYIN_020133GB004M25MZL

CONN@

Del U24/U25 USB Power switch 0930

+USB_VCCA

2 2

5

6

ESD Change P/N SC300000B00 For DVT

(Port 1,2)

JUSB2

10

13

11

GND

14

12

GND

ACES_85201-1205N

CONN@

3 3

+5VALW

1

2

3

4

5

6

7

8

9

10 11 12

SYSON#

USB20_N1

USB20_P1

USB20_N2 USB20_P2

SYSON# <37>

USB20_N1 <14> USB20_P1 <14>

USB20_N2 <14>

USB20_P2 <14>

To USB/B Connector(for LS-6904P USB2.0 function of USB3.0/20 daughter board)

USB3.0 Conn.

Bluetooth Conn.

BT_ON#<31>

JBT1

10

GND

9

GND

ACES_87213-0800G

CONN@

+BT_VCC

8

7

6

5

4

3

2

1

1 2

R453 10K_0402_5%

30

28

26

24

22

20

18

16

14

12

10

8

6

4

2

36

JUSB3

CONN@ JU SB3

CONN@

29

GND31GND32GND33GND34GND35GND

27

25

23

21

19

17

15

13

11

9

7

5

3

1

PCIE_FTX_C_DRX_P0 <13,29>

PCIE_FTX_C_DRX_N0 <13,29>

PCIE_FRX_DTX_P0 <13,29>

PCIE_FRX_DTX_N0 <13,29>

CLK_PCIE_USB30 <13>

CLK_PCIE_USB30# <13> USB20_N3 <14> USB20_P3 <14>

PLT_RST# <13,18,26,27,29>FCH_PCIE_WAKE#<14,26,29>

USB30_CLKREQ# <14>

+3VALW

+5VALW

OD output

ACES_50050-03071-001_30P

SMIB<14>

+1.5V

4 4

+5VALW

SYSON<31,37,42>

PJUSB208_SOT23-6

C718

0.1U_0402_16V4Z

BT@

C720

0.1U_0402_16V4Z

USB20_P6 <14> USB20_N6 <14>

2

1

+3VALW

BT@

+3VS

BT@

S

G

2

D

1 3

1

C721

BT@C721

BT@

4.7U_0805_10V4Z

2

1

C719

1U_0402_6.3V4Z

2

Q24

AO3413_SOT23-3

W=40mils

C722

0.1U_0402_16V4Z

2

BT@

BT@C722

BT@

G

+BT_VCC

12

BT@

R454

R454 300_0603_5%

300_0603_5%

BT@

13

D

Q25

Q25 2N7002_SOT23

2N7002_SOT23

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

USB/BT/USBsub

LA-7091P

33 48Tuesday, December 07, 2010

E

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/27 2011/08/27

Compal Secret Data

Deciphered Date

Title

USB3.0 PD720200

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

1

34 48Tuesday, October 19, 2010

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/08/27 2011/08/27

Compal Secret Data

Deciphered Date

Title

USB3.0 PD720200

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

35 48Tuesday, October 19, 2010

1

0.1

A

B

C

D

E

+VCC_FAN1

H5

H_3P0H5H_3P0

1

H20

H_4P2

H17

H_3P0X3P5N

FIDUCIAL_C40M80

+5VS

12

10U_0805_10V4Z

1000P_0402_50V7K

H_3P0H7H_3P0

H21

H_4P2

1

FD3

1

D25

D25 1SS355_SOD323-2@

1SS355_SOD323-2@

D26 BAS16_ SOT23-3@D26 B AS16_SOT23-3@

1 2

C823

1 2

C824

1 2

H7

H_3P0H8H_3P0

1

H22

H_4P2

1

H13

H_3P0N

FIDUCIAL_C40M80

JFAN1

1 2 3

ACES_85205-03001

CONN@

H8

1

H23

H_4P2

1

FD4

1

H10

H_3P0

H24

H_3P4

1

H26

H25

H_3P4

1

H6

H_3P0H6H_3P0

1

H27

H_3P4

H15

H_7P0N

1

H29

H28

H_3P4

1

R566

R566 0_0603_5%

0_0603_5%

@

1 2

+5VS

@

+3VALW

1 2

SW3

SMT1-05-A_4P

1

2

5

6

SW4

5

6

R493 10K_0603_5%@R493 10K _0603_5%@

1 2

R494 10K_0603_5%@R494 10K _0603_5%@

ON/OFFBTN#ON/OFFBTN#

3

4

3

4

EC_ON<31,40>

1

DAN202UT106_SC70-3

ON/OFFBTN# <32>

EC_ON

R496

10K_0402_5%

R495

100K_0402_5%

1 2

D12

2

3

C773

1000P_0402_50V7K

13

D

Q27

2

G

2N7002_SOT23

S

1 2

ON/OFF <31>

51_ON# <38>

2

1

+VCC_FAN1

EN_DFAN1<31 >

R567 0_0 402_5%R567 0_0402_5%

1 1

SMT1-05-A_4P

1

2

2 2

3 3

U37

1 2 3 4

1

APL5607KI-TRG_SO8

C822

0.01U_0402_25V4Z

2

FAN_SPEED1<31>

C821 10U _0805_10V4ZC821 10U _0805_10V4Z

1 2

H1

H_3P0H1H_3P0

H11

H_3P0

H14

H_3P0

FD1

GND GND GND GND

8 7 6 5

+3VS

H2

H_4P0H2H_4P0

1

H12

H_3P0

1

EN VIN VOUT VSET

FIDUCIAL_C40M80

12

R568

R568 10K_0402_5%

10K_0402_5%

1

C825

C825 1000P_0402_50V7K

1000P_0402_50V7K

2

H3

H_4P0H3H_4P0

H_3P0H4H_3P0

1

H19

H_3P0

1

H_3P4

FD2

1

FIDUCIAL_C40M80

H4

1

H18

1

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/04 2010/08/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Other IO/USB (right)

LA-7091P

36 48Tuesday, December 07, 2010

E

0.1

5

4

3

2

1

R1109

R1115

R1118

R1123

1

SYSON#VLDT_EN#

SUSP

+5VALW

R1108

R1108 100K_0402_5%

100K_0402_5%

1 2

13

D

Q52

2

G

2N7002_SOT23

12

S

+5VALW

R1116

R1116 100K_0402_5%

100K_0402_5%

1 2

13

D

Q59

2

G

2N7002_SOT23

G

2N7002_SOT23

12

S

+5VALW

R1117

R1117 100K_0402_5%

100K_0402_5%

1 2

13

D

Q62

2

G

2N7002_SOT23

G

2N7002_SOT23

12

S

+5VALW

R1119

R1119 100K_0402_5%

100K_0402_5%

1 2

13

D

Q68

2

G

2N7002_SOT23

G

2N7002_SOT23

12

S

0.1

37 48Tuesday, December 07, 2010

0.1

D D

C1443

10U_0805_10V4Z

1 2

+VSB

R1103 100K_0402_5%R1103 100K_0402_5%

C C

1

C1453

10U_0805_10V4Z

2

+VSB

R1112 200K_0402_5%R1112 200K_0402_5%

2N7002_SOT23

+5VALW

1

C1445

2

10U_0805_10V4Z

SUSP

2

G

Q55

G

Q55

2N7002_SOT23

+3VALW TO +3VS

+3VALW

SI4800BDY-T1-GE3_SO8

8 7

5

1

C1454

2

10U_0805_10V4Z

12

SUSP

3VS_GATE

13

2

G

Q61

G

Q61

U38

SI4800BDY-T1-GE3_SO8

8 7

5

4

5VS_GATE

1

13

D

S

U41

D

S

C1450

0.1U_0603_25V7K

2

4

1

C1456

0.1U_0603_25V7K

2

1 2 36

+5VS

1

C1446

10U_0805_10V4Z

2

+3VS

1

C1452

10U_0805_10V4Z

2

1

C1444

2

1U_0402_6.3V4Z

1

C1455

2

1U_0402_6.3V4Z

1 2 13

D

S

R1101

1 2

13

D

G

Q53

S

R1110

470_0603_5%

SUSP

2

G

Q60

2N7002_SOT23

470_0603_5%

SUSP

2

2N7002_SOT23

R1104

1K_0402_5%

+VSB

R1105 47K_0402_5%R1105 47K_0402_5%

+1.5VS

Q63

+5VALW TO +5VS

Q63

SI2301CDS-T1-GE3_SOT23-3

S

D

SUSP

G

2

13

D

Q67

S

13

10U_0805_6.3V6M

D

S

B B

SUSP#

220K_0402_5%

0.1U_0603_25V7K

+1.5V +0.75VS +1.1VS +VGA_CORE

R1135

R1135 470_0603_5%

470_0603_5%

1 2

13

D

A A

S

SYSON#

2

G

Q78

Q78 2N7002_SOT23

2N7002_SOT23

R1122

R1121

100K_0402_5%

12

1

C1463

2

R1137

R1137 470_0603_5%

470_0603_5%

1 2

13

D

S

5

1 2

2

G

SSM3K7002FU_SC70-3

2

G

2N7002_SOT23

2N7002_SOT23 Q80

Q80

R1128

R1128 470_0603_5%

470_0603_5%

1 2

13

2

G

Q74

Q74 2N7002_SOT23

2N7002_SOT23

1

C1461

2

VLDT_EN#

+1.5VS+1.5V

1 2

13

D

S

R1120

R1120 470_0603_5%

470_0603_5%

SUSP

2

G

Q65

2N7002_SOT23

R1126

R1126 470_0603_5%

470_0603_5%

VGA@

1 2

13

D

S

1.5_VDDC_PWREN#

2

G

Q28

Q28 2N7002_SOT23

2N7002_SOT23

VGA@

+5VALW

2

@

PJ8

2

JUMP_43X118

1

10U_0603_6.3V6M

R1124

C109

1

SUSP#

@

2

SUSP#

4

47K_0402_5%

@

47K_0402_5%

0.1U_0402_16V7K

12

R1125

+1.1VALW TO +1.1VS

+1.1VALW

U39

SI4800BDY-T1-GE3_SO8

8

12

C1448

10U_0805_10V4Z

1 2

VLDT_EN#

2N7002_SOT23

ACIN<25,31,39>

1

C1457

0.1U_0603_25V7K

2

1

2

12

C1465

7

5

1

2

G

Q56

G

Q56

ACIN

+5VALW

C1464

0.1U_0402_16V7K

@

+3VALW

112

1

JUMP_43X118

@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

13

PJ12

D

S

@

1.1VS_GATE

2

G

1

2

4

12

R1106

300K_0402_5%

13

D

Q57

Q57 2N7002_SOT23

2N7002_SOT23

S

+3VS

C1458

0.1U_0603_25V7K

1

2

3

4

10U_0603_6.3V6M

2

C121

1

2

3

+1.1VS

1 2 36

1

2

1

C1449

2

1U_0402_6.3V4Z

R1102

470_0603_5%

1 2

13

D

S

VLDT_EN#

2

G

Q54

2N7002_SOT23

C1447

10U_0805_10V4Z

1

C1451

0.1U_0603_25V7K

2

11/25 FOR EMI

1

C1459

0.1U_0603_25V7K

2

U95

MOS1_D

ON_MOS1

CAP_MOS1

5_VDD

ON_MOS2

CAP_MOS2

MOS2_D5MOS2_S

@

2010/08/04 2010/08/04

1

C1460

0.1U_0603_25V7K

2

1.5_VDDC_PWREN#<25>

10

MOS1_S

9

8

GND

7

6

11

GND

SLG59M232VTR_TDFN14-10_3X2

Compal Secret Data

Deciphered Date

1.5_VDDC_PWREN<24,44,45>

C604

1 2 @

@

1000P_0402_50V7K

C676

1 2

@

1000P_0402_50V7K

VLDT_EN<31>

10K_0402_5%

VGA_ON<24,31>

10K_0402_5%

1.5_VDDC_PWREN#

R1134

10K_0402_5%

1

C643

@

4.7U_0603_6.3V6K

2

PJ9

112

1

C675

@

4.7U_0603_6.3V6K

2

12

R1107

R1113

2

G

112

VGA_ON#

2

12

+5VALW

1 2

13

D

S

+5VS

PJ10

2

@JUMP_43X118

+5VALW

R1111

R1111 100K_0402_5%

100K_0402_5%

1 2

13

D

Q51

2

G

2N7002_SOT23

G

2N7002_SOT23

12

S

+5VALW

R1114

R1114 100K_0402_5%

100K_0402_5%

1 2

13

D

Q58

G

2N7002_SOT23

G

2N7002_SOT23

S

R1131

R1131 100K_0402_5%

100K_0402_5%

Q77

Q77 2N7002_SOT23

2N7002_SOT23

2

@JUMP_43X118

+3VS

VGA_PWR_ON#<25>

VGA_PWR_ON<24,25>

Title

Size Document Number Rev

Custom

Date: Sheet of

SYSON#<33>

SYSON<31,33,42>

100K_0402_5%

SUSP<29,44>

SUSP#<31,42,43>

10K_0402_5%

PE_GPIO1#<24>

PE_GPIO1<13,24>

Compal Electronics, Inc.

PE_GPIO1#

100K_0402_5%

VGA_PWR_ON#

100K_0402_5%

DC Interface

LA-7091P

5

PL1

PJP1

@PJP1

@

ACES_50305-00441-001

1 2 3

4 GND GND

2

D D

C C

B B

3

PD10 PJSOT24CH_SOT23-3

PJSOT24CH_SOT23-3

1

@PD10

@

BATT+

51_ON#<36>

+CHGRTC

PD2

LL4148_LL34-2

PR3

100K_0402_5%

1 2

PR4

22K_0402_5%

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

12

N1

12

PC5

0.22U_0603_25V7K

PR5

PR5 0_0603_5%

0_0603_5%

1 2

TP0610K-T1-E3_SOT23-3

SMB3025500YA_2P

1 2

12

PC2

100P_0402_50V8J

PQ1

+3VLP

PL1

PR6

PR6 0_0603_5%

0_0603_5%

1 2

2

ACOFF<31,39>

+5VALWP<40>

13

VIN

12

PC3

100P_0402_50V8J

VIN

PD1

PD1 LL4148_LL34-2

LL4148_LL34-2

1 2

12

PR1

PR1 68_1206_5%

68_1206_5%

12

PC6

0.1U_0603_25V7K

4

VIN

12

PR2

PR2 68_1206_5%

68_1206_5%

PR7

1K_1206_5%

1 2

PR8

1K_1206_5%

1 2

@

PR11

1K_1206_5%

1 2

@

PR12

1K_1206_5%

1 2

@

PD4

2

1

3

BAS40CW_SOT323-3

@

12

PC4

1000P_0402_50V7K

VS

PreCHG

2

3

+3VALWP +3VALW

+5VALWP

+VSBP +VSB

PQ2

LL4148_LL34-2@

PD3

12

PR9

PR10

100K_0402_5%

@

13

PQ3

PQ3 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

@

PQ2

TP0610K-T1-E3_SOT23-3

2

100K_0402_5%

12

@

PR13

PR13 100K_0402_5%

100K_0402_5%

13

@

2

@

B+

13

PQ4

PQ4 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

+VGA_COREP

JUMP_43X118

(5A,200mil s ,Via NO. = 10)

JUMP_43X39

(120mA,40m ils ,Via N O.= 2)

PJP3

@PJP3

@

JUMP_43X118

PJP4

@PJP4

@

JUMP_43X118

112

PJ1

PJ3

PJ5

PJ11

2

+VGA_CORE

+1.1VALWP +1.1VALW+5VALW

JUMP_43X118

(3A,120mil s ,Via NO. =6)(3.9A,160m ils ,Via N O.= 8)

JUMP_43X118

(7A,280mil s ,Via NO. =14)

JUMP_43X79

(3A,120mil s ,Via NO. =6)

JUMP_43X118

+1.5VP1 +1.5V1

JUMP_43X118

2

+1.05VS+1.05VSP

JUMP_43X118

112

1

PJ2

2

PJ4

2

PJ6

2

PJ7

PJ13

PJ16

+1.8VS+1.8VSP

+0.75VS+0.75VSP

2

+1.5V+1.5VP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

PWR DCIN / Pre-charge

P5WE0 M/B LA-6901P Schematic

1

38 47Tuesday, December 07, 2010

0.1

A

Iada=0~4.74A(90W/19V=4.736A)

CP = 85%*Iada ; CP = 4.07A

ADP_I = 19.9*Iadapter*Rsense

PQ6

AO4407A_SO8

VIN

1 1

12

PR19

PR19 47K_0402_1%

47K_0402_1%

13

V1

2

61

D

2

G

S

2 2

3 3

S

PQ14A

DMN66D0LDW -7_SOT363-6

ACOFF<31,38>

PDTC115EU_SOT323-3

CP mode

PACIN

ACOFF

AO4407A_SO8

8 7

5

47K

2

47K

PQ8

1 3

PDTA144EU_SOT323-3

PQ10

PQ10 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

PR38

47K_0402_5%

1 2

2

PQ17

4

13

P2

1 2 36

12

PC12

0.1U_0603_25V7K

5

G

IREF<31>

PQ7

SI4459ADY-T1-GE3_SO8

1 2 3 6

4

12

PR17

PR17 200K_0402_1%

200K_0402_1%

12

6251VDD

PR27

PR27 150K_0402_1%

150K_0402_1%

3S/4S#<31>

PQ14B

DMN66D0LDW -7_SOT363-6

34

D

S

PR36

80.6K_0402_1%

12

PR39

100K_0402_1%

65W/90W#<31>

8 7

5

PC7

5600P_0402_25V7K

PR25 47K_0402_5%PR25 47K_0402_5%

1 2

2

12

PC24

0.01U_0402_25V7K

1 2

FSTCHG<31 >

ADP_I<31>

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)

P3

0_0402_5%

13

PQ13

PQ13 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

0.01U_0402_25V7K

1 2

PC22 .1U_0402_16V7KPC22 .1U_0402_16V7K

PR40

1 2

12.1K_0402_1%

PQ18

2N7002W- T/R7_SOT323-3

PQ18

CALIBRATE#<31>

where Vaclm=1.502V, Iinput=4.07A

BATT Type CV mode

Charging Voltage (0x15)

CC=0.6~4.48A

IREF=0.7224*Icharge

Normal 3S LI-ON Cells

Ki Vchlim=Iref*(PR 374/(PR372+PR37 4)) =Iref*(100K/(80 .6K+100K)) =Iref*0.5537 Ichanrge=(165mV/PR369)*(Vchlim/3.3V) =(165m/20m)*(1/ 3.3V)*Iref*0.55 37 =1.3842*Iref Iref=0.7224*Ich anrge =>Ki=0.72 24

12600mV

12.60V

IREF=0.43V~3.24V

PR14 0.02_2512_1%PR14 0.02_2512_1%

1

2

PR24

12

PC19 6800P_0402_25V7KPC19 6800P_0402_25V7K

PC20

1 2

12

PR42

13

D

2.55K_0402_1%

2

G

S

1 2

15.4K_0402_1%

B

@

PC112

10U_0805_25V6K

12

PC113

10U_0805_25V6K@

191K_0402_1%

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

12

VIN

PR88

PD5

PR22

10_1206_5%

24

23

22

21

20

19

18

17

16

15

14

13

47K_0402_5%

ACPRN

1 2 12

DCIN

LX_CHG

DH_CHG

BST_CHG

DL_CHG

PreCHG

12

PR18 191K_0402_1%

191K_0402_1%

12

PR23

PC14

14.3K_0402_1%

1000P_0402_25V8J

PC15

12

0.1U_0603_25V7K

ACPRN <4 0>

PC18

0.047U_0402_16V7K

1 2

PR29

20_0402_5%

PC21

0.1U_0603_25V7K

1 2

PR37

0_0603_5%

1 2

6251VDDP

PC28

1 2

4.7U_0603_6.3V6M

12

PR46

2

PQ19

PDTC115EU_SOT323-3

B+

PL17

4

3

6251VDD

12

PR26

100K_0402_1%

1 2

PR31

1 2

10K_0402_1%

1 2

PR33 100_0402_1%P R33 100_0402_1%

6251aclim6251VREF

12

PR43

20K_0402_1%

PR44

PL17

1 2

1.2UH_1231AS-H-1R2 N=P3_2.9A_30%

RB751V-40_SOD323-2

12

PC13

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K PU1

PU1

1

VDD

ACSETIN

2

ACSET

6251_EN CSON

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

6251VREF

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

PR45

31.6K_0402_1%

1 2

C

PL22

FBMA-L18-453215-900LM A90T_1812

1 2

CSIN

CSIP

PC8

@PR18

@

ACSETIN

PR28

20_0402_5%

1 2

12

PR30

PR30 20_0402_5%

20_0402_5%

1 2

PR32

2_0402_5%

BST_CHGA

12

6251VDD

0.1U_0603_25V7K

PD8

PD8 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

12

13

PC23

PR41

4.7_0603_5%

PR47

PR47 10K_0402_1%

10K_0402_1%

10U_1206_25V6M

CSOP

12

6251VDD

12

PC9

10U_1206_25V6M

PACIN

12

PR49

14.3K_0402_1%

12

PC10

0.1U_0603_25V7K

AO4466_SO8

PR48

10K_0402_1%

1 2

12

PQ16

PC11

CHG_B+

12

2200P_0402_25V7K

PDTC115EU_SOT323-3

578

PQ15

PQ15 AO4466_SO8

AO4466_SO8

10UH_PCMB104T-100MS _6A_20%

3 6

241

578

3 6

241

ACIN <25,31,37>

1 2 3 6

PR15

10K_0402_1%

2200P_0402_50V7K

PQ9

PL2

1 2

12

PR35

@

4.7_1206_5%

12

PC27

@

680P_0402_50V7K

PQ5

PQ5 AO4407A_SO8

AO4407A_SO8

4

PC66

@PC6 6

@

1 2

13

PR87

@PR8 7

@

100K_0402_1%

8 7

5

PR16

PR16 47K_0402_1%

47K_0402_1%

1 2

2

1 2

12

V1

2

G

ACPRN

TCR=50ppm / C

CHGCHG

1

2

D

PD6

1 2

1SS355_SOD323-2

PR189

200K_0402_1%

1 2

PD9

1SS355_SOD323-2

12

13

D

PC107

0.1U_0603_25V7K

S

PQ30

@

PQ30

@

2N7002W- T/R7_SOT323-3

4

0.02_1206_1%

3

VIN

ACOFF

PR189

13

D

PQ51

2

2N7002W- T/R7_SOT323-3

G

S

PR34

PC25

10U_1206_25V6M

VIN

PACIN

<40,41>

BATT+

12

PC26

10U_1206_25V6M

4 4

Kv Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K R=514K//31.6K// (15.4K+3k)=11.3 72K r=514K//514K//3 1.6K=28.14K Vcell=0.175*Vad j+3.99v

4.2V=0.175*Vadj +3.99V =>Vadj=1 .2V Vadj=Vref*(R/(R +514K))+CALIBRA TE*(r/(r=514K))

1.1483=CALIBRAT E*0.6046 =>CALI BRATE=1.899

1.899=(4.2-(Vce ll+A*0.175))*Kv =(4.2-(4.2+A*0. 175))*Kv A=Vref*(R/(R+51 4K))=0.052 Kv=9.451

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

PWR-CHARGER

Size D ocument Number Rev

Custom

Date: Sheet of

P5WE0 M/B LA-6901P Schematic

D

39 47Tuesday, December 07, 2010

0.1

5

4

3

2

1

2VREF_8205

D D

12

PC110

PC104

@

10U_0805_25V6K

RT8205_B+

PL3

FBMA-L18 -453215-900LMA 90T_1812

B+

C C

B B

A A

1 2

12

PC33

4.7U_0805_25V6-K

220U_6.3 V_M

12

PQ26

2

G

13

PQ27

PQ27 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

12

PC34

2200P_0402_50V7K

SIS412DN-T 1-GE3_POWE RPAK8-5

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1 2

1

+

PC42

2

PQ24B

DMN66D0 LDW-7_SOT3 63-6

VL

13

D

S

VS

100K_04 02_1%

1 2

PR66

5

PQ20

123

PL4

12

5

PR58

4.7_1206_5%

12

PC44

680P_0402_50V7K

ENTRIP1 ENTRIP2

34

D

S

100K_04 02_1%

12

PR67

40.2K_0402_1%

PQ22

PQ22 SI7716ADN -T1-GE3_POW ERPAK8-5

SI7716ADN -T1-GE3_POW ERPAK8-5

123

5

G

PR64

12

2

PC49

2.2U_0603_6.3V6K

4

12

PC31

PC32

0.1U_0603_25V7K

+3VALWP

MAINPWON<41>

ACPRN<39>

EC_ON<31,36>

PR63

PR63 0_0402_ 5%

0_0402_ 5%

2N7002W -T/R7_SOT32 3-3

PR65

200K_04 02_5%

12

2

5

4

2

G

13

PQ25

PQ25 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

Typ: 175mA

PC39

4.7U_0805_10V6K

B+

61

D

DMN66D0 LDW-7_SOT3 63-6

S

+3VLP

12

PR56

1 2

0_0603_ 5%

PC40

0.1U_060 3_25V7K

PR59 0_0402_ 5%

MAINPW ON

PR61

499K_04 02_1%

1 2

PQ24A

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0_0402_ 5%

12

PR62

100K_0402_1%

+3.3VALWP Ipeak=6.768A ; 1.2Ipeak=8.12A; Imax=4.738A f=375KHz, L=4.7UH,Rentrip=162k ohm Rdson=15~18m ohm 1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.774A Vlimit=10*10^-6*162Kohm/10=0.162V Ilimit=0.162/(18m*1.2)~0.162/(15m*1.2)=7.5A~9A Iocp=8.274A~9.774A

Issued Date

PR50

13K_040 2_1%

1 2

PR52

20K_040 2_1%

1 2

PR54

137K_04 02_1%

1 2

25

7

8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

@PR59

@

12

PC46

1U_0603_10V6K

2VREF_8205

PU2

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

2010/07/ 13 2011/07/ 13

3

12

PC29

1U_0603_10V6K

ENTRIP2

5

6

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_ B+

2

3

4

15

1

FB1

REF

TONSEL

ENTRIP1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

12

PC47

12

4.7U_0805_10V6K

PC48

0.1U_0603_25V7K

Compal Secret Data

PR51

30K_040 2_1%

1 2

PR53

20K_040 2_1%

1 2

PR55

154K_04 02_1%

ENTRIP1

1 2

24

VO1

23

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205E GQW_W QFN24_4X4

VL

Typ: 175mA

Deciphered Date

PC35

4.7U_0805_25V6-K

PR57

0_0603_ 5%

1 2

RT8205_ B+

12

PC36

SPOK <41,43>

1 2

12

PC38

PC37

0.1U_0603_25V7K

4.7U_0805_25V6-K

PC41

0.1U_060 3_25V7K

SI7716ADN -T1-GE3_POW ERPAK8-5

TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP) (2)SMPS2=375KHZ(+3VALWP)

+5VALWP Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A f=300KHz, L=4.7UH,Rentrip=154k ohm Rdson=15~18m ohm 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A Vlimit=10*10^-6*154Kohm/10=0.15V Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A Iocp=8.44~9.86A

2

0.1U_0603_25V7K

2200P_0402_50V7K

Title

Size Document Num ber Rev

Custom

Date: Sheet of

5

PQ21

SIS412DN-T 1-GE3_POWE RPAK8-5

123

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1 2

12

5

PR60

4.7_1206_5%

12

PC45

123

PC45

680P_0402_50V7K

PL5

220U_6.3 V_M

PQ23

4

Compal Electronics, Inc.

3VALWP/5VALWP

P5WE0 M/B LA-6901P Schematic

1

PC43

+5VALWP

1

+

2

0.1

40 47Tuesday, December 07, 2 010

5

PJP2

SUYIN_200275GR008G13GZR

D D

GND GND

10 9 8

8

7

EC_SMDA

6

EC_SMCA

5

TH

4

PI

3

2

1

<40,41>

VMB

PL6

SMB3025500YA_2P

1 2

12

PC51

PC51 1000P_0402_50V7K

1000P_0402_50V7K

C C

VL

PR80

100K_0402_1%

B B

100K_0402_1%

SPOK<40,43>

1 2

PR81

PR81 1K_0402_5%

1K_0402_5%

1 2

2

G

12

PC55

<40,41>

BATT+

12

PC52

0.01U_0402_25V7K

B+

PR79

22K_0402_1%

1 2

13

D

PQ29

2N7002W-T/R7_SOT323-3

S

12

PR78

100K_0402_1%

12

PR70

PR70 1K_0402_5%

1K_0402_5%

12

PC53

4

0.22U_0603_25V7K

PR69

100_0402_1%

PR73

6.49K_0402_1%

12

PR75

PR75 1K_0402_1%

1K_0402_1%

PQ28

TP0610K-T1-E3_SOT23-3

13

2

1 2

PR68

PR68 100_0402_1%

100_0402_1%

1 2

12

PC54

0.1U_0603_25V7K

EC_SMB_DA1 <31>

EC_SMB_CK1 <31>

+3VALWP

+VSBP

BATT_TEMP < 31>

3

2

1

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

Recovery at 72 degree C

VL

PR74

@PR74

@

100K_0402_1%

1 2

1

2

3

4

100K_0402_1%_NCP15WF104F0 3RC

PU3

VCC

TMSNS1

GND

RHYST1

OT1

TMSNS2

RHYST2

OT2

G718TM1U_SOT23-8

10K_0402_1%

8

7

6

5

@

47K_0402_1%

PR77

PH2

PR71

12

PR72

PR72 21K_0402_1%

21K_0402_1%

1 2

12

PR76

9.53K_0402_1%

12

@PH2

@

12

PH1

100K_0402_1%_NCP15WF104F0 3RC

PC50

0.1U_0603_25V7K

MAINPWON<40>

VL

12

1U_0402_6.3V6K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR-BATTERY CONN/OTP

Size Document Number Rev

Custom

P5WE0 M/B LA-6901P Schematic

Date: Sheet of

2

Date: Sheet of

1

41 47Tuesday, December 07, 2010

0.1

A

PJ14

@ PJ14

@

PC72

12

2

JUMP_43X39

SUSP#<31,37,43>

12

PC69

@PC69

@

0.1U_0402_16V7K

12

112

PR188

5.9K_0402_1%

12

PR191

5.76K_0402_1%

12

PC115

PC115 22U_0805_6.3VAM

22U_0805_6.3VAM

PR84

1 2

200K_0402_5%

12

EN_1.8VS

@

PR86

1M_0402_5%

2

3

4

5

6

+5VALW

A

+5VALW

PR93 0_0402_5%PR93 0_0402_5%

1 2

@PR9 5

@

30K_0402_5%

PR192

100_0603_1%

1 2

4.7U_0603_6.3V6K

PR95

1 1

2 2

SYSON<31,33,37>

3 3

<Vo=1.5V> VFB=0.75V Vo=0.75*(1+10K/10K)=1.5V Fsw=280KHz

Cout ESR=17 mohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm Ipeak=14.4A, Imax=10.08A, Iocp=17.28A

4 4

Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=3.9A =>1/2Delta I=1.95A Vtripmax=Iocp*Rdson=16.2*5.6*1.3=0.118V Rcs=Vtrip/9uA=0.118V/9uA=13.1K choose Rcs=13K Iocpmax=((13K*11uA)/0.0045)+1.95A=32A Iocpmin=((13K*9uA)/(0.0056*1.3))+1.95A=18A Iocp=18A~32A

B

SY8033BDBC_DFN10_3X3

12

226K_0402_1%

1 2

1

PU13

TON

EN/DEM

VOUT

VDD

FB

PGOOD

GND7PGND

B

PU4

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

NC

7

11

12

PC120

0.22U_0402_10V6K

VGA@ PR193

VGA@

PR92

8

8.45K_0402_1%

PR94

2.2_0603_5%

BST_1.5V

1 2

14NC15

13

BOOT

UGATE

12

PHASE

11

1 2

CS

6670@ PR193

6670@

10

VDDP

9

LGATE

S IC RT8209MGQW WQFN 14 P PWM

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

LX

3

LX

6

FB

NC

1

LX_1.8VS

PR193

BST_1.5V-1

DH_1.5V

LX_1.5V

PR193

15.8K_0402_1%

DL_1.5V

Issued Date

LX_1.8VS

FB=0.6Volt

0.1U_0603_25V7K

PC70

1 2

+5VALW

12

PC205

4.7U_0805_10V6K

C

PL7

2.2UH_MSCDRI-74A- 2R2M-E_6.5A_20%

1 2

12

20K_0402_1%

PR82

PC119

20K_0402_1%

4.7_1206_5%

12

680P_0603_50V7K

578

3 6

D6D5D7D

4

G

S

3

2010/01/25 2009/04/28

12

PR83

FB_1.8VS

12

PR85

10K_0402_1%

PQ47

PQ47 AO4466_SO8

AO4466_SO8

241

1.0UH_PCMC104T-1R 0MN_20A_20%

8

PQ65

6670@PQ65

6670@

FDS6670AS_NL_SO8

S

2

1

Compal Secret Data

Deciphered Date

PC116

68P_0402_50V8J

12

PC121

1 2

12

PR194

4.7_1206_5%

12

PC73

680P_0603_50V7K

C

12

4.7U_0805_25V6-K

PL24

PR194

PC73

12

1.5V_B+

PC67

4.7U_0805_25V6-K

12

PC117

22U_0805_6.3VAM

12

PC68

2200P_0402_50V7K

1

+

2

+1.8VSP

12

PC118

22U_0805_6.3VAM

PL23

FBMA-L18-453215-900LM A90T_1812

12

PC89

12

PC78

0.1U_0402_25V6

+1.5VP

PC71

PC71 330U_B2_2VM_R15M

330U_B2_2VM_R15M

PQ65

VGA@ PQ65

VGA@

AO4456_SO8

D

B+

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

1.8VSP/1.5VP

42 47Tuesday, December 07, 2010

D

42 47Tuesday, December 07, 2010

0.1

A

PR96

TON

VOUT

VDD

FB

PGOOD

PR96

255K_0402_1%

1 2

1

14NC15

BOOT

UGATE

EN/DEM

PHASE

VDDP

LGATE

GND7PGND

RT8209MGQW _WQFN14_3P5X3P5

8

PR98

0_0603_5%

1 2

CS

1 1

PR97

0_0402_5%

SPOK<40,41>

+5VALW

2 2

1 2

30K_0402_5%

PR101

100_0603_1%

1 2

PC139

4.7U_0603_6.3V6K

PR99

12

PC136

PC136 .1U_0402_16V7K

@

12

.1U_0402_16V7K

@

PR103

4.7K_0402_1%

1 2

12

PR104

PR104 10K_0402_1%

10K_0402_1%

PU6

2

3

4

5

6

13

12

11

10

9

B

BST_1.1V ALW

DH_1.1VALW

LX_1.1VALW

1 2

PR102

10K_0402_1%

DL_1.1VALW

PC137

1 2

0.1U_0603_25V7K

+5VALW

12

PC140

4.7U_0805_10V6K

5

4

PQ32

PQ32 SIS412DN-T1-GE3_POW ERPAK8-5

SIS412DN-T1-GE3_POW ERPAK8-5

123

5

PQ33

PQ33 SI7716ADN-T1-GE3_POW ERPAK8-5

SI7716ADN-T1-GE3_POW ERPAK8-5

4

123

1.1VALW _B+

12

PC133

PC132

4.7U_0805_25V6-K

PL11

2.2UH_FDVE0630-H- 2R2M=P3_8.3A_20%

1 2

12

PR100

4.7_1206_5%

12

PC141

680P_0603_50V7K

12

PC134

0.1U_0603_25V7K

4.7U_0805_25V6-K

C

PL10

FBMA-L18-453215-900LM A90T_1812

12

PC75

PC74

PC135

0.1U_0402_25V6

2200P_0402_50V7K

+1.1VALW P

1

+

PC138

2

330U_4V_M

12

0.1U_0402_25V6

<Vo=1.1V> VFB=0.75V V=0.75*(1+4.7K/10K)=1.1V Fsw=280KHz

Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm. Ipeak=9.61A, Imax=6.73A, Iocp=11.53A Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A =>1/2Delta I=1.03A Vtripmax=Iocp*Rdson=11.53*5.6*1.3=0.084V Rcs=Vtrip/9uA=0.084V/9uA=9.3K choose Rcs=10K Iocpmax=((10K*11uA)/0.0045)+1.03A=25A Iocpmin=((10K*9uA)/(0.0056*1.3))+1.03A=13.39A Iocp=13.39A~25A

FBMA-L18-453215-900LM A90T_1812

1.05VALW _B+

PL12

D

B+

12

B+

12

AO4466_SO8

241

AO4726L_SO8

241

12

PC142

4.7U_0805_25V6-K

PQ34

2.2UH_FDVE0630-H- 2R2M=P3_8.3A_20%

1 2

12

PR109

4.7_1206_5%

PQ35

4.7_1206_5%

12

PC151

680P_0603_50V7K

Compal Secret Data

578

PR105

255K_0402_1%

2

3

4

5

6

PU7

TON

VOUT

VDD

FB

PGOOD

1 2

1

EN/DEM

GND7PGND

PR106

200K_0402_5%

SUSP#<31,37,42>

3 3

+5VALW

4 4

1 2

PR110

100_0603_1%

1 2

4.7U_0603_6.3V6K

A

PR108

30K_0402_5%

@

PC149

12

PC146

12

.1U_0402_16V7K

@

12

PR112

4.02K_0402_1%

1 2

12

PR113

PR113 10K_0402_1%

10K_0402_1%

PR107

0_0603_5%

1 2

14NC15

BOOT

UGATE

PHASE

VDDP

LGATE

RT8209MGQW _WQFN14_3P5X3P5

8

B

BST_1.05V ALW

DH_1.05VALW

13

LX_1.05VALW

12

11

1 2

CS

10

9

PR111

10K_0402_1%

DL_1.05VALW

3 6

PC147

1 2

0.1U_0603_25V7K

+5VALW

12

PC150

4.7U_0805_10V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

578

3 6

2010/01/25 2009/04/28

12

PC143

PC144

0.1U_0603_25V7K

4.7U_0805_25V6-K

PL13

Deciphered Date

C

12

PC77

PC76

PC145

2200P_0402_50V7K

0.1U_0402_25V6

+1.05VSP

1

+

PC148

2

330U_4V_M

<Vo=1.1V> VFB=0.75V V=0.75*(1+4.02K/10K)=1.05V Fsw=280KHz

Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm. Ipeak=9.61A, Imax=6.73A, Iocp=11.53A Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A =>1/2Delta I=1.03A Vtripmax=Iocp*Rdson=11.53*5.6*1.3=0.084V Rcs=Vtrip/9uA=0.084V/9uA=9.3K choose Rcs=10K Iocpmax=((10K*11uA)/0.0045)+1.03A=25A Iocpmin=((10K*9uA)/(0.0056*1.3))+1.03A=13.39A Iocp=13.39A~25A

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

1.1VALWP/1.0VSP

D

0.1

43 47Tuesday, December 07, 2010

0.1

5

@

PR186

D D

1.5_VDDC_PWREN

+5VALW

C C

PR186

1 2

0_0402_5%

PR178

1 2

100_0603_5%

4.7U_0603_6.3V6K

PR183

@PR183

@

30K_0402_5%

12

PC196

12

@PC203

@

.1U_0402_16V7K

5.1K_0402_1%

12

5.1K_0402_1%

PC203

PR184

1 2

PR179

<BOM Structure>PR179

4

PR180

255K_0402_1%

1 2

PR181

BST_1.5V-2

1

EN/DEM

VFB=0.75V

GND7PGND

14NC15

BOOT UGATE

PHASE

VDDP

LGATE

RT8209MGQW_WQFN14_3 P5X3P5

8

PU11

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

PR181

1 2

0_0603_5%

BST_1.5V-3

DH_1.5V-2

13

LX_1.5V-2

12

PR185

1 2

11

CS

7.87K_0402_1%

10

DL_1.5V-2

9

PC199

<BOM Structure>PC 199

1 2

0.1U_0603_25V7K

+5VALW

<BOM Structure>PC200

4.7U_0805_10V6K

1 2

PC200

3

12

PC198

PQ46

<BOM Structure>PQ46

AO4466_SO8

12

PC201

PC204

4.7U_0805_25V6-K

1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%

12

PR182

<BOM Structure>PR182

4.7_1206_5%

12

PC195

<BOM Structure>PC195

680P_0603_50V7K

PQ39

<BOM Structure>PQ39

AO4712_SO8

578

3 6

578

241

3 6

241

12

0.1U_0603_25V7K

PL21

2

@PL20

@

FBMA-L18-453215-900LMA90T_1812

1 2

12

PC197

2200P_0402_50V7K

12

PL20

1

+

PC202

PC202

330U_4V_M

2

1

B+

+1.5VP1

+1.5V

1

PJ15

1

JUMP_43X39

2

B B

4.7U_0805_6.3V6K

PR115

200K_0402_5%

SUSP<29,37>

A A

5

1 2

PC156

@PC156

@

.1U_0402_16V7K

2

G

12

2

PC152

1 2

13

D

S

PQ36

PQ36 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4

PR114

1K_0402_1%

PR116

1K_0402_1%

12

PC154

.1U_0402_16V7K

For shortage changed

PU8

1

VIN

2

GND

3

VREF

4

VOUT

APL5336KAI-TRL_SOP8P8

+0.75VSP

PC155

PC155 10U_0603_6.3V6M

10U_0603_6.3V6M

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

NC

VCNTL

NC

TP

Issued Date

8

7

6

5

9

3

+3VALW

12

PC153

PC153 1U_0603_10V6K

1U_0603_10V6K

Compal Secret Data

2009/10/02 2010/10/02

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

0.75VSP

44 47Tuesday, December 07, 2010

1

0.3

5

PL14

VGA@ PL14

VGA@

FBMA-L18-453215-900LMA90T_1812

B+

1 2

VGA@

PR123

12

PC157

VGA@

2200P_0402_25V7K

D D

VGA@ PR123

VGA@

20K_0402_1%

1.5_VDDC_PWREN<24,37,44>

C C

1 2

PC158

+3VS

0.1U_0603_25V7K

1 2

12

B+_CORE

12

PC159

VGA@

10U_0805_25V6K

PR121

@PR121

@

10K_0402_5%

VGA@ PC165

VGA@

.1U_0402_16V7K

12

VGA@

PC165

12

PC160

10U_0805_25V6K

Ipeak

Seymour(15W) 14.2A(VDDC+VDDCI)

B B

Switch freq. (RF pin setting) 47K ==>450KHz 100K ==>390KHz 200K ==>350KHz (Currently setting) 470K ==>300KHz

GPIO 20

GPU_VID1

A A

GPIO 15

GPU_VID0

1

0

1

0

1

0

Whistler

Core Voltage Level

0.85V

0.9V

0.95V

1.0V

5

Seymour

Core Voltage Level

0.85V

0.9V

1.0V

1.1V

4

+3VS

12

PR117

@ PR117

@

10K_0402_5%

VGA_PWRGD<13,24>

PU9

VGA@PU9

PR119

VGA@ PR119

VGA@

30K_0402_1%

1 2

PR120

VGA@ PR120

VGA@

470K_0402_1%

Switch Freq. (RF pin setting) 47K =>450KHz 100K =>390KHz 200K =>350KHz 470K =>290KHz

VGA_CORE F=1/(75*e-12*44.2)=300K Ipeak=25A Imax=17.5A Iocp=30A

VGA@

1

VBST

PGOOD

2

TRIP

DRVH

3

EN

4

5

SW

V5IN

VFB

DRVL

RF

TP

TPS51218DSCR_SON10_3X3

VFB=0.7V

10

9

8

7

6

11

Follow the project of NEW70 for VGA_CORE circuit

For Seymour 1/2Delta I=4.31A Vtrip=40.2K*10uA=0.402V Iocp=0.402V/(8*3.2m)+1/2Delta I =15.70A+4.31A=20.01A

4

BST_VCORE

DH_VCORE

SW_VCORE

DL_VCORE

PR118

VGA@ PR118

VGA@

0_0603_5%

1 2

VGA@

PC162

1 2

1U_0603_6.3V6M

3

VGA@ PC161

VGA@

0.1U_0603_25V7K

1 2

+5VALW

PC161

4

5

VGA@ PQ37

VGA@

TPCA8065-H_PPAK56-8-5

123

5

VGA@ PQ38

VGA@

TPCA8057-H_PPAK56-8-5

123

PQ37

PQ38

2

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

12

VGA@ PR122

VGA@

4.7_1206_5%

12

VGA@ PC164

VGA@

680P_0603_50V7K

Rds=2.6m/3.2mOHM

12

PR131

VGA@ PR131

VGA@

30K_0402_1%

VGA@ PR134

34

D

PQ40B

VGA@

PQ40B

VGA@

DMN66D0LDW-7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S

3

VGA@

10K_0402_5%

1 2

5

G

12

VGA@ PC168

VGA@

4700P_0402_25V7K

2010/08/20 2011/08/20

+3VSG

VGA@ PR133

VGA@

10K_0402_5%

PR134

1 2

12

@PR135

PC168

DMN66D0LDW-7_SOT363-6

@

10K_0402_5%

PQ41B

VGA@

PQ41B

VGA@

Compal Secret Data

Deciphered Date

VGA@ PC166

VGA@

2200P_0402_25V7K

PR133

PR135

D

S

AP

34

PC166

G

2

PL15

VGA@ PL15

VGA@

1 2

PR122

PC164

12

VGA@ PR128

VGA@

13.3K_0402_1%

PR140

VGA@ PR140

VGA@

10K_0402_5%

5

12

1 2

12

PR128

DMN66D0LDW-7_SOT363-6

+3VSG

PR139

@PR139

@

10K_0402_5%

12

1 2

12

VGA@ PR141

VGA@

10K_0402_5%

DMN66D0LDW-7_SOT363-6

1

PR130

VGA@ PR130

VGA@

10K_0402_5%

1 2

PC167

PR137

1

+VGA_COREP

+3VSG

12

P5WE0

ESR=10mohm

1

PC163

VGA@+PC163

VGA@

PR124

VGA@ PR124

VGA@

10_0402_5%

PR125

VGA@ PR125

VGA@

0_0402_5%

GCORE_SEN

12

PR126

2.87K_0402_1%VGA@

PQ40A

VGA@

PQ40A

VGA@

GPU_VID0 <19>

PR141

PQ41A

VGA@

PQ41A

VGA@

Title

Size Document Number Rev

Custom

Date: Sheet of

+

390U_2.5V_M

2

GCORE_SEN <21>

PR127

VGA@ PR127

VGA@

11.5K_0402_1%

1 2

61

D

2

G

S

+VGA_COREP

12

VGA@ PC167

VGA@

4700P_0402_25V7K

VGA@ PR137

VGA@

61

D

S

Compal Electronics, Inc.

2

G

10K_0402_5%

+3VSG

VGA@ PR129

VGA@

10K_0402_5%

1 2

@PR132

@

10K_0402_5%

1 2

PR136

@PR136

@

10K_0402_5%

1 2

12

VGA@ PR138

VGA@

10K_0402_5%

45 4 7Tuesday, December 07, 2010

PR129

PR132

GPU_VID1 <19>

PR138

0.2

A

1 1

+5VS +3VS

+3VS

12

PR155

@PR155

@

10K_0402_1%

PR165

95.3K_0402_1%

10K_0402_1%

12

10_0402_1%

PR154

105K_0402_1%

2 2

FCH_PWRGD<14>

H_PWRGD_L< 13>

3 3

VGATE<14,31>

APU_SVD<5> APU_SVC<5>

VR_ON<31 >

21.5K_0402_1%

PR164

1 2

APU_VDD0_RUN_FB_H<5>

PR159 100K_0402_5%@PR159 100K _0402_5%@

PR157 100K_0402_5%PR157 100K_0402_5%

12

+APU_CORE

PR152

PR152 0_0402_5%

0_0402_5%

PR160

0_0402_5%

PR167

@PR153

@

12

@PR156

@

ISL6265_PWROK

12

+5VALW

CPU_B+

0.1U_0603_25V7K

PR153 105K_0402_1%

105K_0402_1%

PR156 105K_0402_1%

105K_0402_1%

12

PR163

0_0402_5%

PR169

0_0402_5%

B

PR143

2_0603_5%

1 2

PC177

0.1U_0603_16V7K

1 2

PR148

2_0603_5%

PC181

PU10

1

OFS/VFIXEN

2

PGOOD

3

PWROK

4

SVD

5

12

SVC

6

ENABLE

7

RBIAS

8

OCSET

9

VDIFF0

10

FB0

11

COMP0

12

VW0

VSEN1

ISP0 ISN0

PR168

PR168 0_0402_5%

0_0402_5%

1 2

12

46

47

48

VIN

VCC

FB_NB

VSEN0

ISN0

ISP0

15

14

13

VSEN0

PC169

47P_0402_50V8J

12

PC170

1000P_0402_50V7K

PC176

1000P_0402_50V7K

12

PR144

22K_0402_1%

PR149

0_0402_5%

PR150

PR150 0_0402_5%

0_0402_5%

11K_0402_1%

40

41

42

43

RTN_NB

VSEN_NB

OCSET_NB

VDIFF1

FB1

VSEN1

19

20

18

VSEN1

PC170

12

PGND_NB

COMP121ISP1

PR142

44.2K_0402_1%

44

45

FSET_NB

COMP_NB

ISL6265CHRTZ-T_TQFN48_6X6

RTN1

RTN0

17

16

12

PR151

39

22

12

LGATE_NB

VW1

PR147

10_0402_5%

1 2

APU_VDD0_RUN_FB_L

1 2

10_0402_5%

12

37

38

BOOT_NB

PHASE_NB

UGATE_NB

BOOT0

UGATE0

PHASE0

PGND0

LGATE0

LGATE1

PGND1

PHASE1

UGATE1

BOOT1

ISN1

23

24

ISN0

ISP0

C

+APU_CORE_NB

PR187

PHASE_NB

LGATE_NB

PHASE_NB

UGATE_NB

36

35

34

33

32

31

30

PVCC

29

28

27

26

25

TP

49

SIS412DN-T1-GE3_POWERPAK8-5

UGATE_NB

1 2

PR195

0_0603_5%

PHASE_NB

BOOT_NB

LGATE_NB

APU_VDDNB_RUN_FB_ H <5>

BOOT_NB

BOOT0

UGATE0

PHASE0

LGATE0

0_0603_5%

PR145

2.2_0603_1%

1 2

0.22U_0603_10V7K

Rds(on) max =18 m ohm typ = 15 m ohm

UGATE0

PHASE0

BOOT0

+5VALW

12

PQ42

4

1 2

PC178

4

0_0603_5%

1 2

PR158

2.2_0603_1%

1 2

0.22U_0603_10V7K

PC190

PC190 1U_0603_16V6K

1U_0603_16V6K

5

PC171

4.7U_0805_25V6-K

123

5

PQ43

SI7716ADN-T1-GE3_POWERPAK8-5

123

PR190

PC187

LGATE0

4

1 2

4

D

CPU_B+

12

5

12

PC174

PC173

PC172

0.1U_0603_25V7K

4.7U_0805_25V6-K

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

12

TPCA8065-H_PPAK56-8-5

123

2200P_0402_50V7K

PL18

1 2

PR146

4.7_1206_5%

PC180

PC180 680P_0603_50V7K

680P_0603_50V7K

12

PC182

PC183

4.7U_0805_25V6-K

PQ44

PQ44, PQ45 need to link

PQ45

PQ45 TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

B+

@

PC122

12

PC114

12

PL19

4

3

PR162

PC189

0.1U_0603_16V7K

PR166

4.53K_0402_1%

E

10U_0805_25V6K

10U_0805_25V6K@

1

2

12

+APU_CORE

ISN0

PL16

FBMA-L18-453215-900LMA90T_1812

12

1

+

220U_25V_M

PC175

2

1

2

12

PC184

PC185

4.7U_0805_25V6-K

+

PC179

PC179 220U_6.3V_M

220U_6.3V_M

12

0.1U_0603_25V7K

12

PR161

4.7_1206_5%

12

PC188

680P_0603_50V7K

12

+APU_CORE_NB

ESR = 15 m ohm

CPU_B+

12

PC186

DCR = 1.1m ohm +-7%

2200P_0402_50V7K

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

12.7K_0402_1%

1 2

ISP0

APU_VDD0_RUN_FB_L<5>

DIFF_0

PC191

PR173

2200P_0402_25V7K

255_0402_1%

4 4

12

PR174

1K_0402_5%

12

54.9K_0402_1%

12

PR177

@ PR177

@

36.5K_0402_1%

A

12

PC192

220P_0402_50V8J

PR175

12

1200P_0402_50V7K

VW0

PC194

COMP0

12

1000P_0402_50V7K

6.81K_0402_1%

PC193

PR176

12

PR170

10_0402_1%

0_0402_5%

PR171

+1.5V

RTN0

12

1K_0402_5%

PR172

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/08/20 2011/08/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Compal Electronics, Inc.

CPU_CORE

46 47Tuesday, December 07, 2010

E

0.2

12

B

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

D D

2

3

4

5

C C

6

7

8

9

10

B B

11

12

13

14

15

A A

16

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/04/12 2010/10/12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

PEW96 LA-6552P

47 47Tuesday, December 07, 2010

1

0.1

5

4

3

2

1

Modification list PURPOSEPHASE PAGE

P08 First release0.1 Base on PEW96, change platform (NB,CPU-->APU,SB820-->FCH)

C113, C77, C743, C96 change 0603 size

0.1

P19 C14 change 0603 size C347, C357 change 0603 sizeP21

P31

C736 change 0603 size C821, C823 change 0603 sizeP34 C1443, C1445 change 0603 size

0.1 P33 C711 Change as SF000003I00

0.1 P35

D D

C C

R1122 change as 200k ohm, C1463 change as 0.1UF Adjust sequence

P16

C705 change 0603 sizeP29

P35

Material shortage

Hight limitationC669, C671, C1005 change 0603 sizeP10

Hight limitation

B B

A A

Security Class ification

Change footprint 20100812

: For cost down purpose to change parts

5

Security Class ification

2010/08/ 20 2011/08/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/08/ 20 2011/08/ 20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR

LA-7092P P5WE6/H6/S6

48 48Tuesday, October 19 , 2010

1

0.2

COMPAL LA-7091P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual