COMPAL LA-6931P Schematics

A

www.bufanxiu.com

1 1

B

C

D

E

Compal Confidential

2 2

Schematics Document

Intel Huron River

Sandy Bridge with Couger Point core logic

3 3

4 4

A

B

2010-10-27

REV:1.0

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-6931P

LA-6931P

LA-6931P

E

1 58Wednesday, October 27, 2010

1 58Wednesday, October 27, 2010

1 58Wednesday, October 27, 2010

1.0

1.0

1.0

A

www.bufanxiu.com

B

C

D

E

Compal

Mode
Fil

e Name : LA-6931P

1 1

Confidential

l Name : P5LM0

ATI
Granville-Pro/Whistler-Pro

page
22,23,24,25,26,27,28

PEG

(DIS)

Fan Control

PCI

p

age 43

-E 2.0x16 5GT/s PER LANE100MHz

133MHz

Intel

Sandy Bridge (DIS)

Processor

Memo

ry BUS(DDRIII)

Dual Channel

1.5V DDRIII: 1066MT/S
1333MT/S

204pin DDRIII-SO-DIMM X4

BANK 0, 1, 2, 3

page 10,11

rPGA989

LVDS(DIS)

HDMI(DIS)

CRT(DIS)

LVDS Conn.

page 29

(UMA)

HDMI Conn.

2 2

page 31

CRT

page 30

CRT Conn.

page 30

PCI-Express x 8 (PCIE1/2 2.5/5GT/S)

port 5

CardReader
R5U232

page 37

port 4

USB3.0 conn x 1

NEC UPD720200F1

page 36

port 2 port 1

MINI Card x1

WLAN

page 38

LVDS

page 29

LAN(GbE)

RTL8111E

100MHz

2.7GT/s

LVDS(UMA)

CRT(UMA)

100MHz

page 33

37.5mm*37.5mm

page 4,5,6,7,8,9,10

Cougar Point-M

PCH

989pins

25mm*25mm

page 13,14,15,16,17
18,19,20,21

DMI x4FDI x8

USB conn x2

USB port 0,1
USB Port 2 (eSATA)

100MHz

1GB/s x4

USBx14

HD Audio

3.3V 48MHz

3.3V 24MHz

SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

SPI

port 0

SPI ROM x1

page 13

SATA HDD
Conn.

page 32

Bluetooth

CMOS Camera

Conn

USB port 10

page 42page 35 page 29

100MHz

port 1

SATA ODD
Conn.

page 32

USB port 3

port 4

eSATA
Conn.

page 35

TV Tuner

USB port 5

HDA Codec

ALC669X

page 41

Audio AMP

TPA6017

page 42

page 38

3 3

Sub-board

LS-6931P

RTC CKT.

page 13

Power On/Off CKT.

page 40

DC/DC Interface CKT.

4 4

page 44,45

Power Circuit DC/DC

page 46~55

A

Power/B

page 41

LS-6932P

ARCADE/B

page29

LS-6933P

FP/B

page 44

LS-6934P

USB/B

page 43

LS-6935P

TP/B

page 35

B

RJ45

page 33

Touch Pad

EC I/O Buffer

ENE KB930

page 34

page 39

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPC BUS

33MHz

page 39

C

Int.KBD

page 40

BIOS ROM

page 40

Compal Secret Data

Compal Secret Data

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

E

Phone Jack x 3
+SubWoofer

page 42

2 58Wednesday, October 27, 2010

2 58Wednesday, October 27, 2010

2 58Wednesday, October 27, 2010

Int. Speaker

page 42

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

LA-6931P

LA-6931P

LA-6931P

1.0

1.0

1.0

A

www.bufanxiu.com

Vol

tage Rails

Power Plane Description

VIN

B

+

T+ Battery power supply (12.6V) N/A N/A N/A

BAT

1 1

2 2

+CPU_CORE

+0.

75VS 0.75V switched power rail for DDR terminator

+1.05VS_VCCP

+1.5V ON ON OFF

+1.5VS

+1.8VS 1.8V switched power rail

+3VALW 3.3V always on power rail

+3VALW_PCH

+LAN_IO

+3VS

+5VALW

+5VS

+VSB VSB always on power rail ON ON*

+RTCVCC RTC power

+VGA_CORE

+1.5VSDGPU

+1.8VSDGPU

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.05V switched power rail for CPU (PCH)

Core voltage for IGPU+VGFX_CORE

1.5V power rail for DDRIII

1.5V switched power rail

3.3V power rail for PCH

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

5V power rail for GPU

1.5V power rail for VRAM

1.8V switched power rail for GPU

External PCI Devices

Device IDSEL#

EC SM Bus1 address

Device

Address Address

REQ#/GNT#

EC SM Bus2 address

Device

B

S1S

3 S5

N/A N/A N/A

ON

ON OFF

ON OFF

ON OFF OFF

ON OFF OFF

ON

ON

ON ON

ON ON

ON

ON

ON

ON

Interrupts

N/AN/AN/A

O

OFF

OFF

OFF

OFF

OFF

ON ON*

ON*

ON*

OFF

OFF

ON ON*

OFF

OFFON

ONON

OFFON OFF

OFFON OFF

OFFON OFF

FF

DGPU
(DIS)

ON

ONONOFF

IGP
(SG)

OFF

ON

C

TE

U

STA

Full ON

S1(Power On Suspend)

S3

(Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

LOW

SLP

HIGH

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

_S4#

LOWLOWLOW

SLP

D

_S5#

HIGHHIGHHIGH

HIGH

HIGH

+VA

E

V

LW

+

+VS Clo

N

ON

ON

ON

OFF

OFF

ON ON

ON

OFF

OFF

OFF

O

O

N

N

O

ON

ON

ck

LOW

OFF

OFF

OFF

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

BOARD ID Table

Board ID

*

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

PCB Revision

0

0.1

1
2
3

0.4

4
5
6
7

AD_BID

0 V

V typ

AD_BID

0 V 0 V

V

AD_BID

max

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

3.300 V

BTO Option Table

BTO Item BOM Structure

Switchable
Graphics

Granville GRA@
Whistler WHI@

DDR M1
DDR M3

DIS@DIS Only

SG@

CIR@For CIR
USB2@USB2.0 bus
M1@
M3@
45@For 45 level

USB Port Table

0
1

2

3
4
5
6

7

8

9
10
11
12
13

4 External
USB Port

USB/B

USB Conn.

Mini Card 1
Mini Card 2

USB Conn.
eSATA USB
CMOS Camera
Finger Print
USB3.0 @
Blue Tooth

43 Level BOM Config

Granville DIS:

Whistler SG:

45 Level BOM Config

45@

DIS@GRA@ CIR@ M1@

WHI@ SG@ CIR@ M1@

VRAM BOM Config

X76255BOL01:
X76255BOL02
X76255BOL04

HYNIX 1G (old die)
HYNIX 1G (new die)
HYNIX 2G

3 3

Ibex SM Bus address

Device Address

USB 2.0 USB 1.1 Port

UHCI0

UHCI1

EHCI1

UHCI2

UHCI3

UHCI4

EHCI2

4 4

UHCI5

UHCI6

A

B

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

LA-6931P

LA-6931P

LA-6931P

E

3 58Wednesday, October 27, 2010

3 58Wednesday, October 27, 2010

3 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

4

3

2

1

D D

JCPU1A

JCPU1A

EDP_COMP

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

DMI_CRX_PTX_N0<15>
DMI_CRX_PTX_N1<15>
DMI_CRX_PTX_N2<15>
DMI_CRX_PTX_N3<15>

DMI_CRX_PTX_P0<15>
DMI_CRX_PTX_P1<15>
DMI_CRX_PTX_P2<15>
DMI_CRX_PTX_P3<15>

DMI_CTX_PRX_N0<15>
DMI_CTX_PRX_N1<15>
DMI_CTX_PRX_N2<15>
DMI_CTX_PRX_N3<15>

DMI_CTX_PRX_P0<15>
DMI_CTX_PRX_P1<15>
DMI_CTX_PRX_P2<15>
DMI_CTX_PRX_P3<15>

C C

FDI_CTX_PRX_N0<15>
FDI_CTX_PRX_N1<15>
FDI_CTX_PRX_N2<15>
FDI_CTX_PRX_N3<15>
FDI_CTX_PRX_N4<15>
FDI_CTX_PRX_N5<15>
FDI_CTX_PRX_N6<15>
FDI_CTX_PRX_N7<15>

FDI_CTX_PRX_P0<15>
FDI_CTX_PRX_P1<15>
FDI_CTX_PRX_P2<15>
FDI_CTX_PRX_P3<15>
FDI_CTX_PRX_P4<15>
FDI_CTX_PRX_P5<15>
FDI_CTX_PRX_P6<15>

+1.05VS_VCCP

12

R296

R296

24.9_0402_1%

24.9_0402_1%

B B

eDP_COMPIO and ICOMPO signals
should be shorted near balls
and routed with typical
impedance <25 mohms

FDI_CTX_PRX_P7<15>

FDI_FSYNC0<15>
FDI_FSYNC1<15>

FDI_INT<15>

FDI_LSYNC0<15>
FDI_LSYNC1<15>

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

PEG_COMP

J22
J21
H22

PEG_HRX_GTX_N15

K33

PEG_HRX_GTX_N14

M35

PEG_HRX_GTX_N13

L34

PEG_HRX_GTX_N12

J35

PEG_HRX_GTX_N11

J32

PEG_HRX_GTX_N10

H34

PEG_HRX_GTX_N9

H31

PEG_HRX_GTX_N8

G33

PEG_HRX_GTX_N7

G30

PEG_HRX_GTX_N6

F35

PEG_HRX_GTX_N5

E34

PEG_HRX_GTX_N4

E32

PEG_HRX_GTX_N3

D33

PEG_HRX_GTX_N2

D31

PEG_HRX_GTX_N1

B33

PEG_HRX_GTX_N0

C32

PEG_HRX_GTX_P15

J33

PEG_HRX_GTX_P14

L35

PEG_HRX_GTX_P13

K34

PEG_HRX_GTX_P12

H35

PEG_HRX_GTX_P11

H32

PEG_HRX_GTX_P10

G34

PEG_HRX_GTX_P9

G31

PEG_HRX_GTX_P8

F33

PEG_HRX_GTX_P7

F30

PEG_HRX_GTX_P6

E35

PEG_HRX_GTX_P5

E33

PEG_HRX_GTX_P4

F32

PEG_HRX_GTX_P3

D34

PEG_HRX_GTX_P2

E31

PEG_HRX_GTX_P1

C33

PEG_HRX_GTX_P0

B32

PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15

M29

PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14

M32

PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13

M31

PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12

L32

PEG_HTX_GRX_N11 PEG_HTX_C_GRX_N11

L29

PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10

K31

PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9

K28

PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8

J30

PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7

J28

PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6

H29

PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5

G27

PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4

E29

PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3

F27

PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2

D28

PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1

F26

PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0

E25

PEG_HTX_GRX_P15 PEG_HTX_C_GRX_P15

M28

PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14

M33

PEG_HTX_GRX_P13 PEG_HTX_C_GRX_P13

M30

PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12

L31

PEG_HTX_GRX_P11 PEG_HTX_C_GRX_P11

L28

PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10

K30

PEG_HTX_GRX_P9 PEG_HTX_C_GRX_P9

K27

PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8

J29

PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7

J27

PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6

H28

PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5

G28

PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4

E28

PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3

F28

PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2

D27

PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1

E26

PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0

D25

Typ- suggest 220nF. The change in AC capacitor
value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)

+1.05VS_VCCP

12

R1

R1

24.9_0402_1%

24.9_0402_1%

C1 0.22U_0402_10V6KC1 0.22U_0402_10V6K

1 2

C2 0.22U_0402_10V6KC2 0.22U_0402_10V6K

1 2

C3 0.22U_0402_10V6KC3 0.22U_0402_10V6K

1 2

C4 0.22U_0402_10V6KC4 0.22U_0402_10V6K

1 2

C5 0.22U_0402_10V6KC5 0.22U_0402_10V6K

1 2

C6 0.22U_0402_10V6KC6 0.22U_0402_10V6K

1 2

C7 0.22U_0402_10V6KC7 0.22U_0402_10V6K

1 2

C8 0.22U_0402_10V6KC8 0.22U_0402_10V6K

1 2

C9 0.22U_0402_10V6KC9 0.22U_0402_10V6K

1 2

C10 0.22U_0402_10V6KC10 0.22U_0402_10V6K

1 2

C11 0.22U_0402_10V6KC11 0.22U_0402_10V6K

1 2

C12 0.22U_0402_10V6KC12 0.22U_0402_10V6K

1 2

C13 0.22U_0402_10V6KC13 0.22U_0402_10V6K

1 2

C14 0.22U_0402_10V6KC14 0.22U_0402_10V6K

1 2

C15 0.22U_0402_10V6KC15 0.22U_0402_10V6K

1 2

C16 0.22U_0402_10V6KC16 0.22U_0402_10V6K

1 2

C17 0.22U_0402_10V6KC17 0.22U_0402_10V6K

1 2

C18 0.22U_0402_10V6KC18 0.22U_0402_10V6K

1 2

C19 0.22U_0402_10V6KC19 0.22U_0402_10V6K

1 2

C20 0.22U_0402_10V6KC20 0.22U_0402_10V6K

1 2

C21 0.22U_0402_10V6KC21 0.22U_0402_10V6K

1 2

C22 0.22U_0402_10V6KC22 0.22U_0402_10V6K

1 2

C23 0.22U_0402_10V6KC23 0.22U_0402_10V6K

1 2

C24 0.22U_0402_10V6KC24 0.22U_0402_10V6K

1 2

C25 0.22U_0402_10V6KC25 0.22U_0402_10V6K

1 2

C26 0.22U_0402_10V6KC26 0.22U_0402_10V6K

1 2

C27 0.22U_0402_10V6KC27 0.22U_0402_10V6K

1 2

C28 0.22U_0402_10V6KC28 0.22U_0402_10V6K

1 2

C29 0.22U_0402_10V6KC29 0.22U_0402_10V6K

1 2

C30 0.22U_0402_10V6KC30 0.22U_0402_10V6K

1 2

C31 0.22U_0402_10V6KC31 0.22U_0402_10V6K

1 2

C32 0.22U_0402_10V6KC32 0.22U_0402_10V6K

1 2

PEG_HRX_GTX_N[0..15] <22>
PEG_HRX_GTX_P[0..15] <22>

PEG_HTX_C_GRX_N[0..15] <22>
PEG_HTX_C_GRX_P[0..15] <22>

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

LA-6931P

LA-6931P

LA-6931P

1

of

4 58Wednesday, October 27, 2010

4 58Wednesday, October 27, 2010

4 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

4

JCPU1B

JCPU1B

3

2

1

CLK_CPU_DMI_R

A28

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

MISC

MISC

BCLK

BCLK#

PRDY#

PREQ#

TRST#

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWR OK

AR33

RESET#

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

H_PECI<18,40>

12

@

@

R19

R19
0_0402_5%

0_0402_5%

H_SNB_IVB#<17>

T1 PADT1 PAD

R7

R7

0_0402_5%

0_0402_5%

1 2

R9

R9

56_0402_5%

56_0402_5%

1 2

R10

R10

0_0402_5%

0_0402_5%

1 2

R11

R11

0_0402_5%

0_0402_5%

1 2

R15

R15

0_0402_5%

0_0402_5%

1 2

R18

R18

130_0402_5%

130_0402_5%

1 2

H_CATERR#

H_PECI_ISO

H_PROCHOT#_R

H_THEMTRIP#_R

H_PM_SYNC_R

H_CPUPWRGD_R

PM_DRAM_PWR GD_RPM _SYS_PWRGD_BUF

BUF_CPU_RST#

+1.05VS_VCCP

D D

C C

Bu

Processor Pullups

R6 62_0402_5%R6 62_0402_5%

R8 10K_0402_5%R8 10K_0402_5%

C916 220P_0402_50V7KC916 220P_0402_50V7K

12

12

12

10/11

For ESD

ffered reset to CPU

PLT_RST#<17,34,37,39,40>

PLT_RST#

H_PROCHOT# CLK_DP_R

H_CPUPWRGD_R

H_PROCHOT#<40,50>

H_THRMTRIP#<18>

H_PM_SYNC<15>

H_CPUPWRGD<18>

+3VS

+1.05VS_VCCP

12

R13

R13
75_0402_5%

75_0402_5%

R17

R17

43_0402_1%

43_0402_1%

1 2

5

1

P

NC

2

A

G

3

1

C35

C35

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

U1

U1

BUFO_CPU_RST# BUF_CPU_RST#

4

Y

SN74LVC1G07DCKR_SC70-5

SN74LVC1G07DCKR_SC70-5

TCK
TMS

TDO

TDI

A27

A16
A15

R8

AK1
A5
A4

AP29
AP27

AR26
AR27
AP30

AR28
AP26

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

CLK_CPU_DMII#_R

CLK_DP#_R

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

XDP_PRDY#
XDP_PREQ#

XDP_TCK
XDP_TMS
XDP_TRST#

XDP_TDO

XDP_DBRESET#

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7

R2 0_0402_5%R2 0_0402_5%

1 2

R3 0_0402_5%R3 0_0402_5%

1 2

R4 0_0402_5%R4 0_0402_5%

1 2

R5 0_0402_5%R5 0_0402_5%

1 2

H_DRAMRST# <6>

T31PAD T31PAD
T32PAD T32PAD

T33PAD T33PAD
T38PAD T38PAD

R902 51_0402_5%R902 51_0402_5%

R25 51_0402_5%R25 51_0402_5%

12

T39PAD T39PAD

12

XDP_DBRESET# <15>

T40PAD T40PAD
T42PAD T42PAD
T44PAD T44PAD
T46PAD T46PAD
T47PAD T47PAD
T48PAD T48PAD
T49PAD T49PAD
T50PAD T50PAD

PM_DRAM_PWR GD<15>

+1.05VS_VCCP

+3VS

CLK_CPU_DMI <14>
CLK_CPU_DMI# <14>

CLK_DP <14>
CLK_DP# <14>

C36

C36

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R29

R29

10K_0402_5%

10K_0402_5%

1 2

+3VALW

1

2

5

1

B

2

A

3

SUSP<45,53>

U3

U3
74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

P

PM_SYS_PWRGD_BUF

4

O

G

SUSP

2

G

G

+1.5V_CPU_VDDQ

12

@

@

R30

R30
39_0402_5%

39_0402_5%

13

D

D

@

@

Q1

Q1
2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

12

R26

R26
200_0402_5%

200_0402_5%

B B

DDR3 Compe nsation Si gnals

SM_RCOMP0

R20 14 0_0402_1%R20 14 0_0402_1%

SM_RCOMP1

R21 25 .5_0402_1%R21 25 .5_0402_1%

SM_RCOMP2

R22 20 0_0402_1%R22 20 0_0402_1%

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10/18 Remove XDP Connector

Compal Secret Data

Compal Secret Data

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet

XDP_DBRESET#

R31 1K_0402_5%R31 1K_0402_5%

Compal Electronics, Inc.

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

LA-6931P

LA-6931P

LA-6931P

12

12

12

+3VS

12

1.0

1.0

1.0

of

5 58Wednesday, October 27, 2010

5 58Wednesday, October 27, 2010

1

5 58Wednesday, October 27, 2010

5

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JCPU1C

JCPU1C

4

3

JCPU1D

JCPU1D

2

1

DDR_A_D[0..63]<11>

D D

C C

B B

DDR_A_BS0<11>
DDR_A_BS1<11>
DDR_A_BS2<11>

DDR_A_CAS#<11>
DDR_A_RAS#<11>
DDR_A_WE#<11>

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8

AK9
AH8
AH9
AL9

AL8
AP11
AN11

AL12
AM12
AM11

AL11
AP12
AN12

AJ14
AH14

AL15
AK15

AL14
AK14

AJ15
AH15

AE10
AF10

AE8
AD9
AF9

F10

AJ5
AJ6
AJ8

AJ9

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9
F9
F7
G8
G7
K4
K5
K1

K2

M8

N8
N7

M9

N9

M7

V6

J1
J5
J4
J2

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

RSVD_TP[10]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]
RSVD_TP[9]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR_A_CLK0 <11>
DDR_A_CLK0# <11>
DDR_A_CKE0 <11>

DDR_A_CLK1 <11>
DDR_A_CLK1# <11>
DDR_A_CKE1 <11>

DDR_A_CLK2 <11>
DDR_A_CLK2# <11>
DDR_A_CKE2 <11>

DDR_A_CLK3 <11>
DDR_A_CLK3# <11>
DDR_A_CKE3 <11>

DDR_A_CS0# <11>
DDR_A_CS1# <11>
DDR_A_CS2# <11>
DDR_A_CS3# <11>

DDR_A_ODT0 <11>
DDR_A_ODT1 <11>
DDR_A_ODT2 <11>
DDR_A_ODT3 <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11> DDR_B_MA[0..15] <12>

DDR_B_D[0..63]<12>

DDR_B_BS0<12>
DDR_B_BS1<12>
DDR_B_BS2<12>

DDR_B_CAS#<12>
DDR_B_RAS#<12>
DDR_B_WE#<12>

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

D10

K10

AM5
AM6
AR3

AP3
AN3
AN2
AN1

AP2

AP5
AN9

AT5

AT6

AP6
AN8
AR6
AR5
AR9

AJ11

AT8

AT9

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9
AA7

AA10

AB8
AB9

C9
A7

C8
A9
A8
D9
D8

G4

F4

F1
G1
G5

F5

F2
G2

K9

J10

K8

K7
M5

N4

N2

N1
M4

N5
M2
M1

R6

J7
J8

J9

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

RSVD_TP[17]
RSVD_TP[18]

RSVD_TP[19]
RSVD_TP[20]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

DDR_B_CLK0 <12>
DDR_B_CLK0# <12>
DDR_B_CKE0 <12>

DDR_B_CLK1 <12>
DDR_B_CLK1# <12>
DDR_B_CKE1 <12>

DDR_B_CLK2 <12>
DDR_B_CLK2# <12>
DDR_B_CKE2 <12>

DDR_B_CLK3 <12>
DDR_B_CLK3# <12>
DDR_B_CKE3 <12>

DDR_B_CS0# <12>
DDR_B_CS1# <12>
DDR_B_CS2# <12>
DDR_B_CS3# <12>

DDR_B_ODT0 <12>
DDR_B_ODT1 <12>
DDR_B_ODT2 <12>
DDR_B_ODT3 <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

Sandy Bridge_rPGA_Rev1p0

Deciphered Date

Deciphered Date

Deciphered Date

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

LA-6931P

LA-6931P

LA-6931P

1

6 58Wednesday, October 27, 2010

6 58Wednesday, October 27, 2010

6 58Wednesday, October 27, 2010

1.0

1.0

1.0

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

R839

@R839

@

0_0402_5%

0_0402_5%

1 2

D

S

D

S

DDR3_DRAMRST#_R

1 2

13

Q2

Q2
BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

G

2

1

C37

C37

0.047U_0402_16V4Z

0.047U_0402_16V4Z

2

H_DRAMRST#<5>

R35

R35

4.99K_0402_1%

4.99K_0402_1%

A A

DRAMRST_CNTRL_PC H<7,14>

5

R36

R36

0_0402_5%

0_0402_5%

1 2

DRAMRST_CNTRL

+1.5V

R33

R33

1K_0402_5%

1K_0402_5%

12

1 2

R34

R34
1K_0402_5%

1K_0402_5%

4

DDR3_DRAMRST# <11,12>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

5

www.bufanxiu.com

4

3

2

1

CFG Straps for Processor

CFG2

D D

JCPU1E

JCPU1E

L7

RSVD28

AG7

T2 PADT2 PAD
T3 PADT3 PAD
T4 PADT4 PAD
T5 PADT5 PAD
T6 PADT6 PAD
T7 PADT7 PAD
T8 PADT8 PAD
T9 PADT9 PAD
T10 PADT10 PAD
T11 PADT11 PAD
T12 PADT12 PAD
T13 PADT13 PAD
T51 PADT51 PAD
T52 PADT52 PAD
T54 PADT54 PAD
T58 PADT58 PAD
T61 PADT61 PAD
T64 PADT64 PAD

C C

R322 49.9_0402_1%R322 49.9_0402_1%

+VGFX_CORE

+CPU_CORE

R915 0_0402_5%@R915 0_0402_5%@

1 2

M3@

M3@

Q22 AP2302GN_SOT23-3

R916 0_0402_5%@R916 0_0402_5%@

9/06

Q22 AP2302GN_SOT23-3

D

S

D

S

1 3

G

G

2

DRAMRST_CNTRL_PC H

1 2

M3@

M3@

Q23 AP2302GN_SOT23-3

Q23 AP2302GN_SOT23-3

D

S

D

S

1 3

G

G

2

+V_DDR_M3_REFA

B B

+V_DDR_M3_REFB

1 2

R323 49.9_0402_1%R323 49.9_0402_1%
R320 49.9_0402_1%R320 49.9_0402_1%
R321 49.9_0402_1%R321 49.9_0402_1%

DRAMRST_CNTRL_PC H <6,14>

1 2

CPU_RSVD6

CPU_RSVD7

12

12

1K_0402_1%

1K_0402_1%

R41

R41

M1@

M1@

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE

CPU_RSVD6
CPU_RSVD7

12

12

R42

R42
1K_0402_1%

1K_0402_1%

M1@

M1@

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

RESERVED

RESERVED

RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

VCC_DIE_SENSE

RSVD54
RSVD55

RSVD56
RSVD57
RSVD58

KEY

AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

AT2
AT1
AR1

B1

T14PAD T14PAD

CLK_RES_ITP <14 >

CLK_RES_ITP# <1 4>

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

*

Display Port Presence Strap

CFG4

*

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

12

R37

R37
1K_0402_1%

1K_0402_1%

1: Normal Operation; Lane # definition matches
socket pin map definition

0:Lane Reversed

CFG4

1K_0402_1%

1K_0402_1%

12

@

@

R38

R38
1K_0402_1%

1K_0402_1%

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6

CFG5

@R39

@

12

12

R40

@R40

R39

@

1K_0402_1%

1K_0402_1%

2 enabled)

CFG7

12

@R43

@

R43
1K_0402_1%

1K_0402_1%

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0: PEG Wait for BIOS for training

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

LA-6931P

LA-6931P

LA-6931P

1

7 58Wednesday, October 27, 2010

7 58Wednesday, October 27, 2010

7 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

+CPU_CORE

Bottom Socket Cavity

C38

10U_0805_6.3V6M

C38

10U_0805_6.3V6M

1

D D

+CPU_CORE

2

C788

10U_0805_6.3V6M

C788

10U_0805_6.3V6M

1

2

C39

10U_0805_6.3V6M

C39

10U_0805_6.3V6M

1

2

C789

10U_0805_6.3V6M

C789

10U_0805_6.3V6M

1

2

Top Socket Cavity

C799

22U_0805_6.3V6M

C799

22U_0805_6.3V6M

1

2

C C

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

C800

22U_0805_6.3V6M

C800

22U_0805_6.3V6M

1

1

2

2

Top Socket Edge

C74

22U_0805_6.3V6M

C74

22U_0805_6.3V6M

C73

C73

1

1

2

2

C801

22U_0805_6.3V6M

C801

22U_0805_6.3V6M

C805

22U_0805_6.3V6M

C805

22U_0805_6.3V6M

Bottom Socket Edge

C812

330U_D2_2.5VY_R9M+C812

330U_D2_2.5VY_R9M

C811

330U_D2_2.5VY_R9M+C811

330U_D2_2.5VY_R9M

1

1

+

+

2

2

B B

A A

4

SV type CPU

C40

10U_0805_6.3V6M

C40

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

1

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

+

+

2

10U_0805_6.3V6M

1

2

C790

10U_0805_6.3V6M

C790

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

C68

22U_0805_6.3V6M

C68

22U_0805_6.3V6M

1

1

2

2

C806

22U_0805_6.3V6M

C806

22U_0805_6.3V6M

1

1

2

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

C813

C813

C814

C814

+

+

2

C42

10U_0805_6.3V6M

C42

10U_0805_6.3V6M

C41

C41

1

2

C791

C791

C792

10U_0805_6.3V6M

C792

10U_0805_6.3V6M

1

2

C803

22U_0805_6.3V6M

C803

22U_0805_6.3V6M

C802

22U_0805_6.3V6M

C802

22U_0805_6.3V6M

C907

22U_0805_6.3V6M

C907

22U_0805_6.3V6M

C807

22U_0805_6.3V6M

C807

22U_0805_6.3V6M

1

1

2

2

C808

22U_0805_6.3V6M

C808

22U_0805_6.3V6M

1

1

2

2

C804

22U_0805_6.3V6M

C804

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C809

22U_0805_6.3V6M

C809

22U_0805_6.3V6M

1

2

09/10

53A

C810

C810

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26

AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27

AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

3

POWER

JCPU1F

JCPU1F

POWER

18A

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CORE SUPPLY

CORE SUPPLY

PEG AND DDR

PEG AND DDR

VCC_SENSE
VSS_SENSE

VCCIO_SENSE
VSSIO_SENSE

SENSE LINES SVID

SENSE LINES SVID

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

VCCSENSE_R
VSSSENSE_R

2

+1.05VS_VCCP

1

2

1

2

1

2

1

2

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

VCCIO_SENSE
VSSIO_SENSE

22U_0805_6.3V6M

C43

C43

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

C48

C48

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C44

C44

C785

C785

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

2

@

@

@

@

C50

C50

C49

C49

2

MB Bottom Socket Cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

MB Top Socket Cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

C795

C795

22U_0805_6.3V6M

22U_0805_6.3V6M

C910

C910

R50 0_0402_5%R50 0_0402_5%

1 2

R51 0_0402_5%R51 0_0402_5%

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

2

1

2

12

@

@

C797

C797

C796

C796

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C904

C904

C209

C209

2

R44

R44
130_0402_5%

130_0402_5%

R46

R46

43_0402_1%

43_0402_1%

1 2

R842 0_0402_5%R842 0_0402_5%

1 2

R843 0_0402_5%R843 0_0402_5%

1 2

VCCIO_SENSE <53>
VSSIO_SENSE <53>

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

+1.05VS_VCCP+1.05VS_VCCP

+CPU_CORE

C786

C786

C51

C51

C798

C798

C211

C211

12

R903

R903
75_0402_5%

75_0402_5%

12

12

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C47

C47

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

C787

C787

2

330U_D2_2V_Y

330U_D2_2V_Y

1

C793

C793

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C212

C212

2

R844

R844
100_0402_1%

100_0402_1%

R52

R52
100_0402_1%

100_0402_1%

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

1

1

C794

C794

+

+

+

+

2

C906

C906

2

@

@

Place the PU
re

Place the PU
res

istors clo se to CPU

VCCSENSE <56>
VSSSENSE <56>

1

+1.05VS_VCCP

VR_SVID_ALRT# <56>
VR_SVID_CLK <56>
VR_SVID_DAT <56>

sistors cl ose to VR

5

4

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

LA-6931P

LA-6931P

LA-6931P

1

8 58Wednesday, October 27, 2010

8 58Wednesday, October 27, 2010

8 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

4

3

2

1

+1.5V_CPU_VDDQ Source

+1.5V +1.5V_CPU_VDDQ

+VSB

+3VALW

12

@

@

R2302

R2302
100K_0402_5%

D D

R2304

@R2304

@

0_0402_5%

0_0402_5%

CPU1.5V_S3_GATE<40>

SUSP#<40,45,46,51,53>

+VGFX_CORE

1 2

R2305

@R2305

@

0_0402_5%

0_0402_5%

1 2

100K_0402_5%

RUN_ON_CPU1.5VS3#

34

@

@

Q2301B

Q2301B
DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

5

Top Socket Cavity

R845

0_0402_5%

R845

0_0402_5%

DIS@

DIS@

C C

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

SG@

SG@

SG@

SG@

1

1

2

C818

C818

C817

C817

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

SG@

SG@

SG@

SG@

1

1

2

C820

C820

C819

C819

2

Top Socket Edge

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

SG@

SG@

SG@

SG@

1

1

2

C822

C822

C821

C821

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

SG@

SG@

SG@

SG@

1

1

2

C824

C824

C823

C823

2

Bottom Socket Cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

SG@

SG@

SG@

SG@

1

1

2

Bottom Socket Edge

1

B B

2

C826

C826

C825

C825

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

@

@

1

C828

C828

C829

C829

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

SG@

SG@

SG@

SG@

1

1

2

1

2

C101

C101

C100

C100

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

@

@

1

C113

C113

C830

C830

2

Bottom Socket Edge

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

1

1

SG@

SG@

@

Vaxg

Can connect to GND if motherboard only

‧‧‧‧

supports external graphics and if GFX VR is not
stuffed in a common motherboard design,

VAXG can be left floating in a common

‧‧‧‧

motherboard design (Gfx VR keeps VAXG from
floating) if the VR is stuffed

A A

+1.8VS

R66

R66

0_0805_5%

0_0805_5%

1 2

330U_D2_2V_Y+C908

330U_D2_2V_Y

1

+

2

+

+

2

+1.8VS_VCCPLL

C908

@

+

+

C103

C103

C104

C104

2

C836

10U_0805_6.3V6M

C836

10U_0805_6.3V6M

1

2

C837

1U_0402_6.3V6K

C837

1U_0402_6.3V6K

1

2

12

61

2

26A

C838

1U_0402_6.3V6K

C838

1U_0402_6.3V6K

1

2

@

@

R2300

R2300
100K_0402_5%

100K_0402_5%

RUN_ON_CPU1.5VS3

@

@

Q2301A

Q2301A
DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

330K_0402_5%

330K_0402_5%

JCPU1G

JCPU1G

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24
AL23
AL21
AL20
AL18

AL17
AK24
AK23
AK21
AK20
AK18
AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17
AH24
AH23
AH21
AH20
AH18
AH17

B6
A6
A2

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

@R2303

@

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VCCPLL1
VCCPLL2
VCCPLL3

R2303

Q2300

@Q2300

@

AO4728L_SO8

AO4728L_SO8

8
7
6
5

12

1
2
3

4

D

1

@

@

C2300

C2300

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

POWER

POWER

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

D

S

S

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

VREFMISC

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SENSE

@

@

R2301

R2301
220_0603_5%

220_0603_5%

1 2

8/31 Intel

13

2

G

G

Q2310

@

Q2310

@

2N7002H_SOT23-3

2N7002H_SOT23-3

VAXG_SENSE

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

FC_C22

VCCSA_VID1

RUN_ON_CPU1.5VS3#

AK35
AK34

+V_SM_VREF should
have 20 mil trace width

+VREF_DDR_CPU

AL1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5A

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

6A

M27
M26
L26
J26
J25
J24
H26
H25

H23

H_FC_C22

C22
C24

+1.5V_CPU_VDDQ +1.5V

C815 0.1U_0402_10V7KC815 0.1U_0402_10V7K

C816 0.1U_0402_10V7KC816 0.1U_0402_10V7K

C914 0.1U_0402_10V7KC914 0.1U_0402_10V7K

C915 0.1U_0402_10V7KC915 0.1U_0402_10V7K

8/31 Intel

VCC_AXG_SENSE <56>
VSS_AXG_SENSE <56>

R917 0_0402_5%R917 0_0402_5%

1

C909

C909

2

10U_0805_6.3V6M

1

2

1

2

R67

R67
10K_0402_5%

10K_0402_5%

1 2

10U_0805_6.3V6M

C105

C105

+VCCSA

10U_0805_6.3V6M

10U_0805_6.3V6M

C831

C831

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C106

C106

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C832

C832

2

12

1

2

1

2

R847

@R847

@

0_0402_5%

0_0402_5%

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C107

C107

C833

C833

1

C108

C108

2

10U_0603_6.3V6M

10U_0603_6.3V6M

@

@

1

2

1

2

+VCCSA

C834

C834

VCCSA_SENSE <52>

VCCSA_SEL <52>

12

12

12

12

1 2

+1.5V_CPU_VDDQ

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C827

C827

2

R846 100_0402_5%R846 100_0402_5%

1

+

+

C835

C835
330U_D2_2V_Y

330U_D2_2V_Y

2

R65 0_0402_5%R65 0_0402_5%

10U_0805_6.3V6M

10U_0805_6.3V6M

C110

C110

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

@JP3

@

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

1

+

+

C102

C102

330U_D2_2V_Y

330U_D2_2V_Y

2

1 2

1 2

JP6

JP6

JP3

+1.5VS

+1.5V

8/31 Intel

+1.5V_CPU_VDDQ

VCCSA_SENSE

R919

R919
100_0402_5%

100_0402_5%

1 2

R918

R918
100_0402_5%

100_0402_5%

1 2

VSSSA_SENSE <52>

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

LA-6931P

LA-6931P

LA-6931P

1

9 58Wednesday, October 27, 2010

9 58Wednesday, October 27, 2010

9 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

D D

C C

B B

4

JCPU1H

JCPU1H

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10

AR25
AR22
AR19
AR16
AR13
AR10

AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AJ25

AR7
AR4
AR2

AP7
AP4
AP1

AN7
AN4

AK7
AK4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

3

JCPU1I

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS

2

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

1

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

LA-6931P

LA-6931P

LA-6931P

1

1.0

1.0

10 58Wednesday, October 27, 2010

10 58Wednesday, October 27, 2010

10 58Wednesday, October 27, 2010

1.0

5

www.bufanxiu.com

+V_DDR_M3_REFA

12

M3@

M3@

R2016

R2016
0_0402_5%

0_0402_5%

D D

All VREF traces should
have 10 mil trace width

C C

B B

A A

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1

2

DDR_A_CKE0<6>

DDR_A_CLK0<6>
DDR_A_CLK0#<6>

DDR_A_CS1#<6>

8/30

+3VS

+V_DDR_M1_REFA_DQ

12

M1@

M1@

R2020

R2020
0_0402_5%

0_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C2000

C2000

C2001

C2001

1

2

R2007 10K_0402_5%R2007 10K_0402_5%

1 2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C2023

C2023

2

5

VREF_DQA

DDR_A_D0
DDR_A_D1

DDR_A_DM0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_A_CKE0

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDR_A_CLK0
DDR_A_CLK0#

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDR_A_CS1#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C2024

C2024

1

12

2

+1.5V +1.5V

JDIMM1

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

10K_0402_5%

10K_0402_5%

R2008

R2008

VTT1

205

G1

LCN_DAN06-K4406-0102

LCN_DAN06-K4406-0102

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6
DQ7

VSS8
DQ12
DQ13

VSS10

DM1

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

VSS24

DQ30
DQ31

VSS26

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL

VTT2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108
110
112
114

S0#

116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

G2

4

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DDR3_DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_A_CKE1

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_CLK1
DDR_A_CLK1#

DDR_A_BS1
DDR_A_RAS#

DDR_A_CS0#
DDR_A_ODT0

DDR_A_ODT1

VREFA_CA

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

D_CK_SDATA
D_CK_SCLK

+0.75VS

4

DDR_A_CKE1 <6>

DDR_A_CLK1 <6>
DDR_A_CLK1# <6>

DDR_A_CS0# <6>
DDR_A_ODT0 <6>

DDR_A_ODT1 <6>

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C2015

C2015

1

1

2

2

M1@

M1@

0_0402_5%

0_0402_5%

C2016

C2016

M3@

M3@

0_0402_5%

0_0402_5%

DDR_A_CKE2<6>

DDR_A_BS2<6>

DDR_A_CLK2<6>
DDR_A_CLK2#<6>

DDR_A_BS0<6>

DDR_A_WE#<6>
DDR_A_CAS#<6>

DDR_A_CS3#<6>

+V_DDR_M1_REFA_CA

12

R2021

R2021

+V_DDR_M3_REFA

12

R2017

R2017

R2005 10K_0402_5%R2005 10K_0402_5%

+3VS

8/30

1 2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

2

VREF_DQA

DDR_A_D0
DDR_A_D1

DDR_A_DM0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_A_CKE2

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDR_A_CLK2
DDR_A_CLK2#

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDR_A_CS3#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C2022

C2022

1

C2021

C2021

2

3

+1.5V +1.5V

JDIMM2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

10K_0402_5%

10K_0402_5%

12

R2006

R2006

205

VTT1

G1

SUYIN_600023HB204G256ZL

SUYIN_600023HB204G256ZL

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

VTT2

CK1

BA1

NC2

SCL

A15
A14

A11

A7

A6
A4

A2
A0

S0#

G2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DDR3_DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_A_CKE3

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_CLK3
DDR_A_CLK3#

DDR_A_BS1
DDR_A_RAS#

DDR_A_CS2#
DDR_A_ODT2

DDR_A_ODT3

VREFA_CA

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

D_CK_SDATA
D_CK_SCLK

2

+0.75VS

DDR3_DRAMRST# <6,12>

DDR_A_CKE3 <6>

DDR_A_CLK3 <6>
DDR_A_CLK3# <6>

DDR_A_BS1 <6>
DDR_A_RAS# <6>

DDR_A_CS2# <6>
DDR_A_ODT2 <6>

DDR_A_ODT3 <6>

C2013

2.2U_0603_6.3V4Z

C2013

2.2U_0603_6.3V4Z

1

1

2

2

D_CK_SDATA <12,14,39>

D_CK_SCLK <12,14,39>

DDR3 SO-DIMM A

Standard Type

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+1.5V

1K_0402_1%

1K_0402_1%

12

R2001

R2001

M1@

M1@

+V_DDR_M1_REFA_DQ

1K_0402_1%

1K_0402_1%

12

R2003

R2003

M1@

M1@

+1.5V

C2002

1U_0402_6.3V6K

C2002

1U_0402_6.3V6K

C2003

1U_0402_6.3V6K

C2003

1U_0402_6.3V6K

1

1

2

2

+1.5V

C2007

10U_0603_6.3V6M

C2007

10U_0603_6.3V6M

C2006

10U_0603_6.3V6M

C2006

10U_0603_6.3V6M

1

1

2

2

C2014

0.1U_0402_16V4Z

C2014

0.1U_0402_16V4Z

Layout Note:
Place near JDIMM1.203,204

+0.75VS

C2017

1U_0402_6.3V6K

C2017

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

LA-6931P

LA-6931P

LA-6931P

1

+1.5V

1K_0402_1%

1K_0402_1%

12

M1@

M1@

1K_0402_1%

1K_0402_1%

12

M1@

M1@

DDR_A_DQS#[0..7] <6>

DDR_A_DQS[0..7] <6>

DDR_A_D[0..63] < 6>

DDR_A_MA[0..15] <6>

Layout Note:
Place near JDIMM1

C2005

1U_0402_6.3V6K

C2005

1U_0402_6.3V6K

C2004

1U_0402_6.3V6K

C2004

1U_0402_6.3V6K

1

1

2

2

C2009

10U_0603_6.3V6M

C2009

10U_0603_6.3V6M

C2008

10U_0603_6.3V6M

C2008

10U_0603_6.3V6M

1

2

C2018

C2018

1

2

C2010

10U_0603_6.3V6M

C2010

10U_0603_6.3V6M

1

1

2

2

C2019

1U_0402_6.3V6K

C2019

1U_0402_6.3V6K

C2020

1U_0402_6.3V6K

C2020

1U_0402_6.3V6K

1

2

1

R2002

R2002

+V_DDR_M1_REFA_CA

R2004

R2004

C2011

10U_0603_6.3V6M

C2011

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

2

2

11 58Wednesday, October 27, 2010

11 58Wednesday, October 27, 2010

11 58Wednesday, October 27, 2010

330U_D2_2V_Y

330U_D2_2V_Y

C2051

C2051

1

@

@

C2012

C2012

+

+

2

1.0

1.0

1.0

+V_DDR_M3_REFB

www.bufanxiu.com

12

M3@

M3@

R2018

R2018
0_0402_5%

0_0402_5%

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K
C2025

C2025

1

1

D D

2

2

C C

DDR_B_CKE0<6>

DDR_B_CLK0<6>
DDR_B_CLK0#<6>

DDR_B_CS1#<6>

B B

A A

8/30

+3VS

C2049

2.2U_0603_6.3V4Z

C2049

2.2U_0603_6.3V4Z

1

1

2

2

10/9 Follow KAQ00, pin197
PU to +3VS

5

+V_DDR_M1_REFB_DQ

12

M1@

M1@

R2009

R2009
0_0402_5%

0_0402_5%

VREF_DQ_B

DDR_B_D0

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_B_D1

C2026

C2026

DDR_B_DM0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_B_CKE0

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDR_B_CLK0
DDR_B_CLK0#

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_B_CS1#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

R2014

R2014

1 2

1 2

R2015 10K_0402_5%R2015 10K_0402_5%

C2050

0.1U_0402_16V4Z

C2050

0.1U_0402_16V4Z

5

+1.5V

10K_0402_5%

10K_0402_5%

JDIMM4

JDIMM4

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

SUYIN_600025HB204G256ZL

SUYIN_600025HB204G256ZL

CONN@

CONN@

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1
CK1#

VDD12

BA1
RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL
VTT2

+1.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108
110
112
114

S0#

116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

G2

4

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_B_CKE1

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

DDR_B_CLK1
DDR_B_CLK1#

DDR_B_BS1
DDR_B_RAS#

DDR_B_CS0#
DDR_B_ODT0

DDR_B_ODT1

VREF_CAB

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

D_CK_SDATA
D_CK_SCLK

+0.75VS

4

DDR_B_CKE1 <6>

DDR_B_CLK1 <6>
DDR_B_CLK1# <6>

DDR_B_CS0# <6>
DDR_B_ODT0 <6>

DDR_B_ODT1 <6>

C2041

2.2U_0603_6.3V4Z

C2041

2.2U_0603_6.3V4Z

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C2042

C2042

8/30

+3VS

DDR_B_CKE2<6>

DDR_B_BS2<6>

DDR_B_CLK2<6>
DDR_B_CLK2#<6>

DDR_B_BS0<6>

DDR_B_WE#<6>
DDR_B_CAS#<6>

DDR_B_CS3#<6>

+V_DDR_M1_REFB_CA

M1@

M1@

12

R2019

R2019
0_0402_5%

0_0402_5%

+V_DDR_M3_REFB

M3@

M3@

12

R2022

R2022
0_0402_5%

0_0402_5%

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z
C2048

C2048

C2047

C2047

1

1

2

2

3

+1.5V

VREF_DQ_B

DDR_B_D0
DDR_B_D1

DDR_B_DM0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_B_CKE2

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDR_B_CLK2
DDR_B_CLK2#

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_B_CS3#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

R2012

R2012

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R2013

R2013

1 2

JDIMM3

JDIMM3

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

LCN_DAN06-K4406-0103

LCN_DAN06-K4406-0103

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

RAS#

ODT0

ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

GND2

BOSS2

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2

VSS

4

DQ4

6

DQ5

8

VSS

10
12
14

VSS

16

DQ6

18

DQ7

20

VSS

22
24
26

VSS

28

DM1

30
32

VSS

34
36
38

VSS

40
42
44

VSS

46

DM2

48

VSS

50
52
54

VSS

56
58
60

VSS

62
64
66

VSS

68
70
72

VSS

74
76

VDD

78

A15

80

A14

82

VDD

84

A11

86

A7

88

VDD

90

A6

92

A4

94

VDD

96

A2

98

A0

100

VDD

102

CK1

104

CK1#

106

VDD

108

BA1

110
112

VDD

114

S0#

116
118

VDD

120
122

NC

124

VDD

126
128

VSS

130
132
134

VSS

136

DM4

138

VSS

140
142
144

VSS

146
148
150

VSS

152
154
156

VSS

158
160
162

VSS

164
166
168

VSS

170

DM6

172

VSS

174
176
178

VSS

180
182
184

VSS

186
188
190

VSS

192
194
196

VSS

198
200

SDA

202

SCL

204

VTT

206
208

Compal Secret Data

Compal Secret Data

Compal Secret Data

+1.5V

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_B_CKE3

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

DDR_B_CLK3
DDR_B_CLK3#

DDR_B_BS1
DDR_B_RAS#

DDR_B_CS2#
DDR_B_ODT2

DDR_B_ODT3

VREF_CAB

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

D_CK_SDATA
D_CK_SCLK

Deciphered Date

Deciphered Date

Deciphered Date

2

+0.75VS

2

DDR3_DRAMRST# <6,11>

DDR_B_CKE3 <6>

DDR_B_CLK3 <6>
DDR_B_CLK3# <6>

DDR_B_BS1 <6>
DDR_B_RAS# <6>

DDR_B_CS2# <6>
DDR_B_ODT2 <6>

DDR_B_ODT3 <6>

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

C2039

C2039

D_CK_SDATA <11,14,39>

C2040

0.1U_0402_16V4Z

C2040

0.1U_0402_16V4Z

1

1

2

2

D_CK_SCLK <11,14,39>

1

+1.5V

1K_0402_1%

1K_0402_1%

12

R2010

R2010

M1@

M1@

M1@

M1@

C2028

C2028

C2029

1U_0402_6.3V6K

C2029

1U_0402_6.3V6K

1

2

C2035

10U_0603_6.3V6M

C2035

10U_0603_6.3V6M

C2034

10U_0603_6.3V6M

C2034

10U_0603_6.3V6M

1

1

2

2

Layout Note:
Place near JDIMMB.203,204

C2044

1U_0402_6.3V6K

C2044

1U_0402_6.3V6K

C2045

1U_0402_6.3V6K

C2045

1U_0402_6.3V6K

1

2

+V_DDR_M1_REFB_CA

1K_0402_1%

1K_0402_1%

12

R2011

R2011

DDR_B_DQS#[0..7] <6>

DDR_B_DQS[0..7] <6>

DDR_B_D[0..63] <6>

DDR_B_MA[0..15] <6>

C2030

1U_0402_6.3V6K

C2030

1U_0402_6.3V6K

1

2

C2036

10U_0603_6.3V6M

C2036

10U_0603_6.3V6M

C2037

10U_0603_6.3V6M

C2037

10U_0603_6.3V6M

1

1

2

2

C2046

1U_0402_6.3V6K

C2046

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

@

@

C2038

C2038

1

2

M1@

M1@

M1@

M1@

+1.5V

12

12

+1.5V

+1.5V

+0.75VS

1K_0402_1%

1K_0402_1%

R2023

R2023

1K_0402_1%

1K_0402_1%

R2024

R2024

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

1

2

+V_DDR_M1_REFB_DQ

1U_0402_6.3V6K

1U_0402_6.3V6K

C2027

C2027

1

2

Layout Note:
Place near JDIMMB

C2032

C2032

C2033

10U_0603_6.3V6M

C2033

10U_0603_6.3V6M

1

2

C2043

1U_0402_6.3V6K

C2043

1U_0402_6.3V6K

1

2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR3 SO-DIMM B

Reverse Type

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

LA-6931P

LA-6931P

LA-6931P

1

12 58Wednesday, October 27, 2010

12 58Wednesday, October 27, 2010

12 58Wednesday, October 27, 2010

330U_D2_2V_Y

330U_D2_2V_Y

@

@

1

C2031

C2031

+

+

2

1.0

1.0

1.0

5

www.bufanxiu.com

PCH_RTCX1

1 2

R69 10M_0402_5%R69 10M_0402_5%

32.768KHZ_12.5PF_Q13MC14610002Y132.768KHZ_12.5PF_Q13MC14610002

1

Y1

18P_0402_50V8J

18P_0402_50V8J

1

D D

2

+RTCVCC

R849 1M_0402_5%R849 1M_0402_5%

R850 330K_0402_5%R850 330K_0402_ 5%

*

OSC4OSC

C840

C840

NC3NC

2

1 2

1 2

INTVRMEN

H

：：：：

Integrated VRM enable

L

：：：：

Integrated VRM disable

PCH_RTCX2

1

C841

C841
18P_0402_50V8J

18P_0402_50V8J

2

SM_INTRUDER#

PCH_INTVRMEN

+RTCVCC

1U_0603_10V4Z

1U_0603_10V4Z

1 2

R71 20K_04 02_5%R71 20K_0402_5%

1 2

R848 20 K_0402_5%R848 20K_0402_5%

1U_0603_10V4Z

1U_0603_10V4Z

C839

C839

C843

C843

(INTVRMEN should always be pull high.)

+3VS

R79 1K_0402_5%@R79 1K_0402_5%@

1 2

HIGH= Enable ( No Reboot )
LOW= Disable (Default)

*

C C

+3VALW_PCH

HDA_SDO<40>

HDA_SDO

ME debug mode,this signal has a weak internal PD
Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3VALW_PCH

R89 1K_0402_5%R89 1K_0402_5%

R853

@R853

@

1K_0402_5%

1K_0402_5%

R85

R85

0_0402_5%

0_0402_5%

12

HDA_SPKR

HDA_SPKR<42>

HDA_SDOUT

12

12

HDA_SYNC

HDA_SDIN0<42>

PAD

PAD

PAD

PAD

R90

R90

51_0402_5%

51_0402_5%

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

1.5V when sampled high

*

1.8V when sampled low
Needs to be pulled High for Huron River platfrom

B B

R95

R95

33_0402_5%

33_0402_5%

HDA_BIT_CLK

HDA_BITCLK_AUDIO<42>

HDA_SYNC_AUDIO<42>

HDA_RST#_AUDIO<42>

HDA_SDOUT_AUDIO<42>

1 2

R96

R96

33_0402_5%

33_0402_5%

1 2

R99

R99

33_0402_5%

33_0402_5%

1 2

R100

R100

33_0402_5%

33_0402_5%

1 2

HDA_SYNC_R

HDA_RST#

HDA_SDOUT

Prevent back drive issue.

+3VS

G

G

2

Q4

Q4
BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

HDA_SYNC

13

D

S

D

S

R97

R97

1 2

0_0402_5%@

0_0402_5%@

12

R930

R930
1M_0402_5%

1M_0402_5%

ME

T19

T19

T18

T18

1

2

1

2

12

4

CMOS

JCMOS1

SHORT PADS@JCMOS1

SHORT PADS

12

@

10/21

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

GPIO33

GPIO13

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS#

PCH_SPI_SI

PCH_SPI_SO

PCH_RTCRST#

PCH_SRTCRST#

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

C36

N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

U60A

U60A

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

JTAG

JTAG

RTCIHDA

RTCIHDA

SPI

SPI

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN

SATA 6G

SATA 6G

SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

3

C842

C842

1U_0603_10V4Z

Place C127 close to PCH.

C38
A38
B37
C37

D36

E36
K36

V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

1U_0603_10V4Z

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

DCR_R DCR

1 2

R78 0_0402_5%R78 0_0402_5%

SERIRQ

SATA_DTX_C_PRX_N4
SATA_DTX_C_PRX_P4
SATA_PTX_DRX_N4
SATA_PTX_DRX_P4

37.4_0402_1%

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

PCH_GPIO19

37.4_0402_1%

1 2

49.9_0402_1%

49.9_0402_1%

1 2

1 2

R94 750_0402_1%R94 750_0402_1%

2

+RTCVCC +RTCBATT

1

1

2

LPC_AD0 <39,40>
LPC_AD1 <39,40>
LPC_AD2 <39,40>
LPC_AD3 <39,40>

LPC_FRAME# <39,40>

SERIRQ <40>

SATA_DTX_C_PRX_N0 <33>
SATA_DTX_C_PRX_P0 <33>
SATA_PTX_DRX_N0 <33>
SATA_PTX_DRX_P0 <33>

SATA_DTX_C_PRX_N2 <33>
SATA_DTX_C_PRX_P2 <33>
SATA_PTX_DRX_N2 <33>
SATA_PTX_DRX_P2 <33>

trace width 10milW=20mils

D1

D1

2

R70 1K_0402_5%R70 1K_0402_5%

3

BAV70W_SOT323-3

BAV70W_SOT323-3

DCR <30>

HDD

ODD

W=20mils

+3VLP

12

PCH_GPIO19

SERIRQ

PCH_SATALED#

DCR

SPI ROM FOR ME ( 4MByte )

If use SPI programme r,
R854 shoul d be open
(Normal is pop)

R854

R854

+3VS

0_0402_5%

0_0402_5%

1 2

D10

@ D1 0

@

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

9/06

R91

R91

R93

R93

PCH_SATALED# < 41>

PAD

PAD

T15

T15

SATA for eSATA

SATA_DTX_C_PRX_N4 <36>
SATA_DTX_C_PRX_P4 <36>
SATA_PTX_DRX_N4 <36>
SATA_PTX_DRX_P4 <36>

+1.05VS_VCC_SATA

+1.05VS_SATA3

PCH_SPI_CS#

R86 0_0402_5%R86 0_0402_5%

PCH_SPI_CLK

R87 33_0402_5%R87 33_0402_5%

PCH_SPI_SI

R856 33_0402_5%R856 33_0402_5%

1 2

1 2

1 2

10/20

JBATT1

JBATT1

1

+

LOTES_AAA-BAT-019-K01_2P

LOTES_AAA-BAT-019-K01_2P

CONN@

CONN@

R224 10K_0402_5%R224 10K_0402_5%

R74 10K_0402_5%R74 10K_0402_5%

R851 10K_0402_5%R851 10K_0402_5%

R77 20K_0402_5%@R77 20K_0402_5%@

1 2

Please short PJP35

C844

C844

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PCH_SPI_WP#

PCH_SPI_HOLD#

PCH_SPI_CS#_R

PCH_SPI_CLK_R

PCH_SPI_SI_R

C845

@C845

@

22P_0402_50V8J

22P_0402_50V8J

12

PCH_SPI_WP#

PCH_SPI_HOLD#

-

12

12

12

R80 3.3K_0402_5%R80 3.3K_0402_5%

R852 3.3K_04 02_5%R852 3.3K_0402 _5%

+3V_DSW_SPI

PCH_SPI_SO PCH_SPI_SO_R

U4

U4

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

32M MX25L3206EM2I-12G SOP 8P 3V

32M MX25L3206EM2I-12G SOP 8P 3V

R92

@R92

@

33_0402_5%

33_0402_5%

PCH_SPI_CLK_R

1 2

Reserve for EMI please close to UH1

1

2

+3VS

1 2

1 2

R855 33_0402_5%R855 33_0402_5%

4

VSS

PCH_SPI_SO_R

2

Q

+3VS

12

C905 22P_0402_50V8J

C214 22P_0402_50V8J

C214 22P_0402_50V8J

+3VALW_PCH +3VALW_PCH+3VALW_PCH

12

A A

R857

R857

200_0402_5%

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPC H_JTAG_TMS

12

R859

R859

100_0402_1%

100_0402_1%

@

@

1 2

12

R858

R858

200_0402_5%

200_0402_5%

12

R860

R860
100_0402_1%

100_0402_1%

HDA_SDOUT_AUDIO

12

200_0402_5%

200_0402_5%

12

100_0402_1%

100_0402_1%

5

R104

R104

R861

R861

HDA_BITCLK_AUDIO

@

@

1 2

C905 22P_0402_50V8J

9/29

PCH_GPIO21

Project ID GPIO21

DIS

*

Muxless

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

0
1

Title

Title

Title

PCH (1/8) SATA,HDA,SPI, LPC, XDP

PCH (1/8) SATA,HDA,SPI, LPC, XDP

PCH (1/8) SATA,HDA,SPI, LPC, XDP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-6931P

LA-6931P

LA-6931P

Date: Sheet of

Date: Sheet of

Date: Sheet of

R98 10K_0402_5%D IS@R98 10K _0402_5%DIS@

R101 10K_0402_5%SG@R101 10K_0402_5%SG@

12

12

Compal Electronics, Inc.

1

+3VS

1.0

1.0

13 58Wednesday, October 27, 2010

13 58Wednesday, October 27, 2010

13 58Wednesday, October 27, 2010

1.0

5

www.bufanxiu.com

PCIE_PRX_DTX_N1<34>

PCIE LAN

Wireless LAN

D D

USB3.0

Card Reader

C C

Wireless LAN

USB3.0

PCIE LAN

Card Reader

B B

+3VS

R148 10K_0402_5%R148 10K_0402_5%

R150 10K_0402_5%R150 10K_0402_5%

A A

+3VALW_PCH

R153 10K_0402_5%R153 10K_0402_5%

R154 10K_0402_5%R154 10K_0402_5%

R155 10K_0402_5%R155 10K_0402_5%

R879 10K_0402_5%R879 10K_0402_5%

R881 10K_0402_5%R881 10K_0402_5%

R161 10K_0402_5%R161 10K_0402_5%

R162 10K_0402_5%R162 10K_0402_5%

PCIE_PRX_DTX_P1<34>
PCIE_PTX_C_DRX_N1<34>
PCIE_PTX_C_DRX_P1<34>

PCIE_PRX_DTX_N2<39>
PCIE_PRX_DTX_P2<39>
PCIE_PTX_C_DRX_N2<39>
PCIE_PTX_C_DRX_P2<39>

PCIE_PRX_C_DTX_N4<37>
PCIE_PRX_C_DTX_P4<37>
PCIE_PTX_C_DRX_N4<37>
PCIE_PTX_C_DRX_P4<37>

PCIE_PRX_C_DTX_N5<38>
PCIE_PRX_C_DTX_P5<38>
PCIE_PTX_C_DRX_N5<38>
PCIE_PTX_C_DRX_P5<38>

CLK_PCIE_MINI1#<39>
CLK_PCIE_MINI1<39>

MINI1_CLKREQ#<39>

CLK_PCIE_USB30#<37>
CLK_PCIE_USB30<37>

USB30_CLKREQ#<37>

CLK_PCIE_LAN#<34>
CLK_PCIE_LAN<34>

LAN_CLKREQ#<34>

CLK_PCIE_READER#<38>
CLK_PCIE_READER<38>

CLK_PEG_VGA#<22>

CLK_PEG_VGA<22>

PEG_CLKREQ#<23>

CLK_RES_ITP#<7>
CLK_RES_ITP<7>

12

12

12

12

12

12

12

12

12

5

C846 0.1U_0402_10V7KC846 0.1U_0402_10V7K
C847 0.1U_0402_10V7KC847 0.1U_0402_10V7K

C848 0.1U_0402_10V7KC848 0.1U_0402_10V7K
C849 0.1U_0402_10V7KC849 0.1U_0402_10V7K

C850 0.1U_0402_10V7KC850 0.1U_0402_10V7K
C851 0.1U_0402_10V7KC851 0.1U_0402_10V7K

C852 .1U_0402_16V7KC852 .1U_0402_16V7K
C138 .1U_0402_16V7KC138 .1U_0402_16V7K

R867 0_0402_5%R867 0_0402_5%
R119 0_0402_5%R119 0_0402_5%

R868 0_0402_5%R868 0_0402_5%
R869 0_0402_5%R869 0_0402_5%

R124 0_0402_5%R124 0_0402_5%
R125 0_0402_5%R125 0_0402_5%

R143 0_0402_5%R143 0_0402_5%
R878 0_0402_5%R878 0_0402_5%

MINI1_CLKREQ#

USB30_CLKREQ#

PEG_D_CLKREQ#

PCH_GPIO73

LAN_CLKREQ#

PCH_GPIO26

PCH_GPIO44

PCH_GPIO45

PCH_GPIO46

1 2
1 2

1 2
1 2

1 2
1 2

12
12

12
12

12
12

1 2
1 2

R875 0_0402_5%R875 0_0402_5%

1 2

R132 0_0402_5%R132 0_0402_5%

1 2

R138 0_0402_5%R138 0_0402_5%

1 2

R139 0_0402_5%R139 0_0402_5%

1 2

12
12

4

U60B

PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

PCIE_PRX_C_DTX_N4
PCIE_PRX_C_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

PCIE_PRX_C_DTX_N5
PCIE_PRX_C_DTX_P5

PCIE_PTX_DRX_N5
PCIE_PTX_DRX_P5

PCH_GPIO73

CLK_MINI1#
CLK_MINI1

CLK_USB30#
CLK_USB30

USB30_CLKREQ#

CLK_LAN#

PCH_GPIO26

CLK_READER#
CLK_READER

PCH_GPIO44

CLK_VGA#
CLK_VGA

PCH_GPIO45 XTAL25_OUT

PCH_GPIO46

CLK_BCLK_ITP#
CLK_BCLK_ITP

R927 0_0402_5%R927 0_0402_5%

1 2

D11

@D11

@

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

U60B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

PEG_CLKREQ#PEG_D_CLKREQ#

21

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

PCI-E*

CLOCKS

CLOCKS

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

9/06

4

3

LID_SW_OUT#

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PC H

A12

PCH_SML0CLK

C8

PCH_SML0DATA

G12

PCH_GPIO74

C13

PCH_SML1CLK

E14

PCH_SML1DATA

M16

M7

T11

P10

PCH_GPIO47

M10

AB37
AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

CLK_DP#

AM12

CLK_DP

AM13

CLK_BUF_CPU_DMI#

BF18

CLK_BUF_CPU_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2CLK_LAN

BG30

CLK_BUF_DREF_96M#

G24

CLK_BUF_DREF_96M

E24

CLK_BUF_PCIE_SATA#

AK7

CLK_BUF_PCIE_SATA

AK5

CLK_BUF_ICH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

CLK_FLEX0

K43

CLK_27M_TCLK_R

F47

CLK_FLEX1

H47

CLK_48M_USB3_PCH_R

K49

12

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_DMI2_N
CLKIN_DMI2_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

R145 100K_0402_5%R145 100K_0402_ 5%

+3VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

LID_SW_OUT# <40>

DRAMRST_CNTRL_PC H <6,7>

CLK_CPU_DMI# <5>
CLK_CPU_DMI <5>

CLK_DP# <5>
CLK_DP < 5>

CLK_PCI_LPBACK <17>

R141

R141

90.9_0402_1%

90.9_0402_1%

1 2

T16 PADT16 PAD

R906 22_0402_5%R906 22_0402_5%

T17 PADT17 PAD

2

G

G

Compal Secret Data

Compal Secret Data

Compal Secret Data

R307 22_0402_5%@R307 22_0402_5 %@

PCH_GPIO44

13

D

D

Q5

Q5

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

Deciphered Date

Deciphered Date

Deciphered Date

12

CR_CLKREQ# <38>

12

2

+1.05VS_VCCDIFFCLKN

CLK_27M_TCLK <23>

CLK_48M_USB3_PCH <37>

2

1

PCH_SMBCLK

PCH_SMBDATA

PCH_SML0CLK

PCH_SML0DATA

PCH_SML1CLK

PCH_SML1DATA

PCH_GPIO74

PCH_GPIO47

LID_SW_OUT#

DRAMRST_CNTRL_PC H

6 1

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

PCH_SMBCLK

PCH_SML1DATA

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

PCH_SML1CLK

CLK_BUF_CPU_DMI#
CLK_BUF_CPU_DMI

CLKIN_DMI2#
CLKIN_DMI2

CLK_BUF_DREF_96M#
CLK_BUF_DREF_96M

CLK_BUF_PCIE_SATA#
CLK_BUF_PCIE_SATA

CLK_BUF_ICH_14M

XTAL25_IN

C853

C853

27P_0402_50V8J

27P_0402_50V8J

CLK_BUF_ICH_14M

CLK_PCI_LPBACK

R110 2.2K_0402_5%R110 2.2K_0402_5%

1 2

R111 2.2K_0402_5%R111 2.2K_0402_5%

1 2

R146 2.2K_0402_5%R146 2.2K_0402_5%

1 2

R877 2.2K_0402_5%R877 2.2K_0402_5%

1 2

R113 2.2K_0402_5%R113 2.2K_0402_5%

1 2

R864 2.2K_0402_5%R864 2.2K_0402_5%

1 2

R112 10K_0402_5%R112 10K_0402_5%

1 2

R865 10K_0402_5%R865 10K_0402_5%

1 2

R862 10K_0402_5%R862 10K_0402_5%

1 2

R863 10K_0402_5%R863 10K_0402_5%

1 2

+3VS

Q8A

Q8A

3 4

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

6 1

Q3A

Q3A

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

1

2

R116

R116

4.7K_0402_5%

4.7K_0402_5%

2

1 2

D_CK_SDATAPCH_SMBDATA

R866

R866

4.7K_0402_5%

4.7K_0402_5%

5

1 2

D_CK_SCLK

Q8B

Q8B

+3VS

2

5

3 4

Q3B

Q3B

R871 10K_0402_5%R871 10K_0402_5%

1 2

R872 10K_0402_5%R872 10K_0402_5%

1 2

R873 10K_0402_5%R873 10K_0402_5%

1 2

R874 10K_0402_5%R874 10K_0402_5%

1 2

R876 10K_0402_5%R876 10K_0402_5%

1 2

R134 10K_0402_5%R134 10K_0402_5%

1 2

R136 10K_0402_5%R136 10K_0402_5%

1 2

R137 10K_0402_5%R137 10K_0402_5%

1 2

R140 10K_0402_5%R140 10K_0402_5%

1 2

1 2

R904 1M_0402_5%R904 1M _0402_5%

Y2

Y2

25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012

@R147

@

33_0402_5%

33_0402_5%

@R151

@

33_0402_5%

33_0402_5%

12

R147

12

R151

12

+3VS

+3VS

Pull up at EC side.

EC_SMB_DA2

EC_SMB_CK2

1

C854

C854
27P_0402_50V8J

27P_0402_50V8J

2

C855

@C855

@

22P_0402_50V8J

22P_0402_50V8J

1 2

C856

@C856

@

22P_0402_50V8J

22P_0402_50V8J

1 2

D_CK_SDATA <11,12,39>

D_CK_SCLK <11,12,39>

EC_SMB_DA2 <23,40>

EC_SMB_CK2 <23,40>

Reserve for EMI please close to U60

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

LA-6931P

LA-6931P

LA-6931P

1

14 58Wednesday, October 27, 2010

14 58Wednesday, October 27, 2010

14 58Wednesday, October 27, 2010

+3VALW_PCH

10/11

1.0

1.0

1.0

5

www.bufanxiu.com

D D

R189

R189

0_0402_5%

0_0402_5%

12

+3VS

5

U5

@U5

@

PCH_PWROK<40>

VGATE<56>

C C

R167 10K_0402_5%R167 10K_0402_5%

SPOK<49,50>

+3VS

R883 200_0402_5%R883 200_0402_5%

B B

+3VALW_PCH

R183 10K_0402_5%R183 10K_0402_5%

R184 200K_0402_5%R184 200K_0402_5%

R185 10K_0402_5%R185 10K_0402_5%

R885 10K_0402_5%R885 10K_0402_5%

1

IN1

VCC

OUT

2

IN2

GND

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

3

12

R174

R174

0_0402_5%

0_0402_5%

SUSWARN#_RSUSACK#_R

@

@

12

D5

D5

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

12

12

12

12

SYS_PWROK

4

SYS_PWROK

PCH_RSMRST#_R

21

PM_DRAM_PWR GD

SUSWARN#

PCH_ACIN

PCH_GPIO72

RI#

SYS_PWROK <27>

XDP_DBRESET#<5>

PCH_APWROK<40>

PM_DRAM_PWR GD<5>

PCH_RSMRST#<40>

PBTN_OUT#<40>

SUSWARN#<40>

DMI_CTX_PRX_N0<4>
DMI_CTX_PRX_N1<4>
DMI_CTX_PRX_N2<4>
DMI_CTX_PRX_N3<4>

DMI_CTX_PRX_P0<4>
DMI_CTX_PRX_P1<4>
DMI_CTX_PRX_P2<4>
DMI_CTX_PRX_P3<4>

DMI_CRX_PTX_N0<4>
DMI_CRX_PTX_N1<4>
DMI_CRX_PTX_N2<4>
DMI_CRX_PTX_N3<4>

DMI_CRX_PTX_P0<4>
DMI_CRX_PTX_P1<4>
DMI_CRX_PTX_P2<4>
DMI_CRX_PTX_P3<4>

+1.05VS_VCCP

PCH_PWROK

ACIN<40,45,48>

4

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

1 2

1 2

1 2

DMI_IRCOMP

RBIAS_CPY

SUSACK#_R

XDP_DBRESET#_R

SYS_PWROK

PCH_PWROK_R

PM_DRAM_PWR GD

PCH_RSMRST#_R

SUSWARN#_R

PBTN_OUT#_R

PCH_ACIN

21

APWROK

PCH_GPIO72

RI#

1 2

R165 49.9_0402_1%R165 49.9_0402_1%

1 2

R166 750_0402_1%R166 750_0402_1%

4mil width and place
within 500mil of the PCH

R171 0_0402_5%R171 0_0402_5%

R176 0_0402 _5%R176 0_0402_5%

R882 0_0402 _5%R882 0_0402_5%

1 2

R179 0_0402_5%R179 0_0402_5%

1 2

R884 0_0402_5%R884 0_0402_5%

1 2

R182 0_0402_5%R 182 0_0402_5%

D2 CH751H-40PT_SOD323-2D2 CH751H-40PT_SOD323-2

U60C

U60C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PW R_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

3

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

DMI

DMI

System Power Management

System Power Management

FDI_RXP6

FDI

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

PCH_DPWROK

WAKE#

PCH_GPIO32

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

T30 PADT30 PAD

T24 PADT24 PAD

H_PM_SYNC

PCH_GPIO29

R172

R172
0_0402_5%

0_0402_5%

1 2

R168

@R168

@

0_0402_5%

0_0402_5%

1 2

T20 PADT20 PAD

T21 PADT21 PAD

T22 PADT22 PAD

T23 PADT23 PAD

T25 PADT25 PAD

2

FDI_CTX_PRX_N0 <4>
FDI_CTX_PRX_N1 <4>
FDI_CTX_PRX_N2 <4>
FDI_CTX_PRX_N3 <4>
FDI_CTX_PRX_N4 <4>
FDI_CTX_PRX_N5 <4>
FDI_CTX_PRX_N6 <4>
FDI_CTX_PRX_N7 <4>

FDI_CTX_PRX_P0 <4>
FDI_CTX_PRX_P1 <4>
FDI_CTX_PRX_P2 <4>
FDI_CTX_PRX_P3 <4>
FDI_CTX_PRX_P4 <4>
FDI_CTX_PRX_P5 <4>
FDI_CTX_PRX_P6 <4>
FDI_CTX_PRX_P7 <4>

FDI_INT <4>

FDI_FSYNC0 <4>

FDI_FSYNC1 <4>

FDI_LSYNC0 <4>

FDI_LSYNC1 <4>

PCH_RSMRST#_R

PCH_DPWROK <40>

PCH_PCIE_WAKE# <34,37,39>

SUSCLK <40>

PM_SLP_S5# <4 0>

PM_SLP_S4# <4 0>

PM_SLP_S3# <4 0>

H_PM_SYNC <5>

DSWODVREN

*

WAKE#

PCH_GPIO29

PCH_GPIO32

Can be left NC
when IAMT is not
support on the
platfrom

R163 330K_0402_5%R163 330K_0402_5%

R164 330K_0402_5%@R164 330K_0402_5%@

DSWODVREN - On D ie DSW VR Enabl e
H：Enable
L：Disable

R170 10K_0402_5%R170 10K_0402_5%

R173 10K_0402_5%@R173 10K_0402_5%@

R175 8.2K_0402_5%R175 8.2K_0402_5%

1

1 2

1 2

1 2

+RTCVCC

12

12

+3VALW_PCH

+3VS

R187 10K_0402_5%R187 10K_0402_5%

A A

12

5

PCH_RSMRST#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,

PCH (3/8) DMI,FDI,PM,

PCH (3/8) DMI,FDI,PM,

LA-6931P

LA-6931P

LA-6931P

1

1.0

1.0

1.0

of

15 58Wednesday, October 27, 2010

15 58Wednesday, October 27, 2010

15 58Wednesday, October 27, 2010

5

www.bufanxiu.com

D D

R188 100K_0402_5%R188 100K_0402_ 5%

1 2

ENBKL

Reserved for DIS Only

R193 0_0402_5%DIS@R193 0_0402_5%DIS@

DGPU_BKL_EN<23>

C C

B B

IGPU_BKLT_EN

+3VS

+3VS

R198 2.2K_0402_5%S G@R198 2.2K_0402_5%S G@

R200 2.2K_0402_5%S G@R200 2.2K_0402_5%S G@

R900 150_0402_1%SG@R900 150_0402 _1%SG@

R202 150_0402_1%SG@R202 150_0402 _1%SG@

R203 150_0402_1%SG@R203 150_0402 _1%SG@

R311 2.2K_0402_5%SG@R311 2 .2K_0402_5%SG@

1 2

R313 2.2K_0402_5%SG@R313 2 .2K_0402_5%SG@

1 2

R194 2.2K_0402_5%SG@R194 2 .2K_0402_5%SG@

1 2

R195 2.2K_0402_5%SG@R195 2 .2K_0402_5%SG@

1 2

R196 2.2K_0402_5%SG@R196 2 .2K_0402_5%SG@

1 2

R197 2.2K_0402_5%SG@R197 2 .2K_0402_5%SG@

1 2

1 2

1 2

1 2

1 2

1 2

1 2

R905 0_0402_5%SG@R 905 0_0 402_5%SG@

1 2

PCH_HDMI_SCLK

PCH_HDMI_SDATA

PCH_CRT_CLK

PCH_CRT_DATA

PCH_CRT_B

PCH_CRT_G

PCH_CRT_R

ENBKLDGPU_BKL_EN

PCH_LCD_CLK

PCH_LCD_DATA

CTRL_CLK

CTRL_DATA

4

ENBKL <40>

3

U60D

12

R345

R345
0_0402_5%

0_0402_5%

AF37
AF36

AE48
AE47

AK39
AK40

AN48

AM47

AK47

AJ48

AN47

AM49

AK49

AJ47

AF40
AF39

AH45
AH47
AF49
AF45

AH43
AH49
AF47
AF43

M45

N48

M40

M47
M49

J47

P45

T40
K47

T45
P39

P49
T49

T39

T43
T42

U60D

L_BKLTEN
L_VDD_EN

L_BKLTCTL

L_DDC_CLK
L_DDC_DATA

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

LVDS

LVDS

CRT

CRT

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

SG@

SG@

2.37K_0402_1%

2.37K_0402_1%

SG@

SG@

0_0402_5%

0_0402_5%

1K_0402_0.5%

1K_0402_0.5%

IGPU_BKLT_EN

12

12

PCH_TXCLK­PCH_TXCLK+

PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

PCH_TZCLK­PCH_TZCLK+

PCH_TZOUT0­PCH_TZOUT1­PCH_TZOUT2-

PCH_TZOUT0+
PCH_TZOUT1+
PCH_TZOUT2+

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

PCH_CRT_CLK
PCH_CRT_DATA

PCH_CRT_HSYNC
PCH_CRT_VSYNC

R199

R199

CTRL_CLK
CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_IREF

12

PCH_ENVDD<30>

DPST_PWM<30>

PCH_LCD_CLK<30>
PCH_LCD_DATA<30>

R886

R886

R192

R192

PCH_TXCLK-< 30>
PCH_TXCLK+<30>

PCH_TXOUT0-<30>
PCH_TXOUT1-<30>
PCH_TXOUT2-<30>

PCH_TXOUT0+<30>
PCH_TXOUT1+<30>
PCH_TXOUT2+<30>

PCH_TZCLK-<30>
PCH_TZCLK+<30>

PCH_TZOUT0-<30>
PCH_TZOUT1-<30>
PCH_TZOUT2-<30>

PCH_TZOUT0+<30>
PCH_TZOUT1+<30>
PCH_TZOUT2+<30>

PCH_CRT_B<31>
PCH_CRT_G<31>
PCH_CRT_R<31>

PCH_CRT_CLK<31>

PCH_CRT_DATA<31>

PCH_CRT_HSYNC<31>
PCH_CRT_VSYNC<31>

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

2

PCH_HDMI_SCLK
PCH_HDMI_SDATA

PCH_HDMI_SCLK < 32>

PCH_HDMI_SDATA <32>

PCH_HDMI_DET <32>

PCH_HDMI_TXD2-

PCH_HDMI_TXD2+

PCH_HDMI_TXD1-

PCH_HDMI_TXD1+

PCH_HDMI_TXD0-

PCH_HDMI_TXD0+

PCH_HDMI_TXC-

PCH_HDMI_TXC+

PCH_HDMI_TXD2- < 32>
PCH_HDMI_TXD2+ <32>
PCH_HDMI_TXD1- < 32>
PCH_HDMI_TXD1+ <32>
PCH_HDMI_TXD0- < 32>
PCH_HDMI_TXD0+ <32>
PCH_HDMI_TXC- <3 2>
PCH_HDMI_TXC+ <32>

1

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (4/9) LVDS,CRT,DP,HDMI

PCH (4/9) LVDS,CRT,DP,HDMI

PCH (4/9) LVDS,CRT,DP,HDMI

LA-6931P

LA-6931P

LA-6931P

1

16 58Wednesday, October 27, 2010

16 58Wednesday, October 27, 2010

16 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

+3VS

R204

R204

PCI_PIRQA#

18

PCI_PIRQD#

27

PCI_PIRQC#

D D

R207 8.2K_0402_5%R207 8.2K_0402_5%

R208 8.2K_0402_5%@R208 8.2K_0402_5%@

R929 8.2K_0402_5%R929 8.2K_0402_5%

C C

R209 8.2K_0402_5%R209 8.2K_0402_5%

36
45

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

R205

R205

18
27
36
45

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

R206

R206

18
27
36
45

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

1 2

1 2

1 2

1 2

PCI_PIRQB#

BT_ON#
PCH_GPIO51
PCH_GPIO53

PCH_GPIO2
PCH_GPIO55
PCH_GPIO4
ODD_DA#

09/09

PCH_GPIO52

VGA_ON_R

DGPU_HOLD_RST#

Boot BIOS Strap bit1 BBS1

Boot BIOS

Bit10

1

1

0

Destination

Reserved

PCI

SPI

LPC

CLK_PCI_LPBACK<14>

CLK_PCI_LPC<40>

VGA_ON<23,46,54>

CLK_PCI_LPC

CLK_PCI_LPC_WLAN< 39>

Bit11

GNT1#/
GPIO51

0

110

0

B B

4

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

12

12

T27PAD T27PAD
T28PAD T28PAD
T29PAD T29PAD

DGPU_HOLD_RST#
PCH_GPIO52
VGA_ON_R

PCH_GPIO51
PCH_GPIO53
PCH_GPIO55

PCH_GPIO2
ODD_DA#
PCH_GPIO4
BT_ON#

PLT_RST#

R191

R191

0_0402_5%

0_0402_5%

ODD_DA#<33>

BT_ON#<44>

T26PAD T26PAD

PLT_RST#<5,34,37,39,40>

R889 22_0402_5%R889 22_0402_5%
R890 22_0402_5%R890 22_0402_5%

1 2

R908 22_0402_5%R908 22_0402_5%

1 2

CLK_PCI0
CLK_PCI1
CLK_PCI2
CLK_PCI3
CLK_PCI4

CLK_PCI1

U60E

U60E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

RSVD

RSVD

PCI

PCI

3

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NVRAM

NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_RCOMP

NV_RE#_WRB0
NV_RE#_WRB1

NV_WE#_CK0
NV_WE#_CK1

USB

USB

USBRBIAS#

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE
NV_CLE

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5

NV_CLE

AY1

AV10

AT8

AY5
BA2

AT12
BF3

USB20_N0

C24

USB20_P0

A24

USB20_N1

C25

USB20_P1

B25
C26
A26
K28
H28

USB20_N4

E28

USB20_P4

D28

USB20_N5

C28

USB20_P5

A28
C29
B29
N28

PCH HM65 config not support USB port 6 & 7.

M28
L30
K30

USB20_N9

G30

USB20_P9

E30

USB20_N10

C30

USB20_P10

A30

USB20_N11

L32

USB20_P11

K32

USB20_N12

G32

USB20_P12

E32

USB20_N13

C32

USB20_P13

A32

USBRBIAS

C33

B33

USB_OC#1

A14

USB_OC#2

K20

PCH_GPIO41

B17

PCH_GPIO42

C16

PCH_GPIO43

L16

PCH_GPIO9

A16

PCH_GPIO10

D14

PCH_GPIO14

C14

USB20_N0 <43>
USB20_P0 <43>
USB20_N1 <36>
USB20_P1 <36>

USB20_N4 <39>
USB20_P4 <39>
USB20_N5 <39>
USB20_P5 <39>

USB20_N9 <36>
USB20_P9 <36>
USB20_N10 <30>
USB20_P10 <30>
USB20_N11 <44>
USB20_P11 <44>
USB20_N12 <37>
USB20_P12 <37>
USB20_N13 <43>
USB20_P13 <43>

Within 500 mils

1 2

R216 22.6_0402_1%R 216 22.6_0402_1%

USB_OC#1 <4 3>
USB_OC#2 <3 6>

2

USB/B

USB Conn.(HS) JUSB1

Mini Card(WLAN)

Mini Card(Mini2)

eSATA USB Conn.

CMOS Camera (LVDS)

Fingerprint

USB3.0 Conn reserve

Bluetooth

(For USB Port0)
(For USB Port1)
(For eSATA USB P ort)

DMI Termination Voltage

NV_CLE

8/31 Intel

NV_CLE

R211 1K_0402_5%R211 1K_0402_5%

CLOSE TO THE BRANCHING POINT

USB_OC#1
USB_OC#2
PCH_GPIO42
PCH_GPIO9
PCH_GPIO14
PCH_GPIO10
PCH_GPIO41
PCH_GPIO43

OC[0..3] use for EHCI 1
OC[4..7] use for EHCI 2

R314 10K_0402_5%R314 10K_0402_5%
R315 10K_0402_5%R315 10K_0402_5%
R887 10K_0402_5%R887 10K_0402_5%
R888 10K_0402_5%R888 10K_0402_5%
R214 10K_0402_5%R214 10K_0402_5%
R215 10K_0402_5%R215 10K_0402_5%
R287 10K_0402_5%R287 10K_0402_5%
R899 10K_0402_5%R899 10K_0402_5%

1

Set to Vcc when HIGH

Set to Vss when LOW

+1.8VS

12

R210

R210

2.2K_0402_5%

2.2K_0402_5%

12

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

H_SNB_IVB# <5>

+3VALW_PCH

R219

R219

0_0402_5%

0_0402_5%

R221 0_0402_5%@R221 0_0402_5%@

PLT_RST#

DGPU_HOLD_RST#

A A

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

12

+3VS

5

U7

U7

2

P

B

4

Y

1

A

G

3

5

100_0402_5%

100_0402_5%

1 2

12

100K_0402_5%

100K_0402_5%

R222

R222

R220

R220

PLTRST_VGA# <22>

PLT_RST#

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

4

1

2

12

+3VS

5

U8

@U8

@

P

IN1

4

O

IN2

G

3

PLT_RST_BUF# <38,39>

12

R223

R223

100K_0402_5%

100K_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (5/9) PCI, USB, NVRAM

PCH (5/9) PCI, USB, NVRAM

PCH (5/9) PCI, USB, NVRAM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-6931P

LA-6931P

LA-6931P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

17 58Wednesday, October 27, 2010

17 58Wednesday, October 27, 2010

17 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

D D

GPIO28

On-Die PLL Voltage Regulator
This signal has a weak internal pull up

：

On-Die voltage r egulator enable

H

*

L：On-Die PLL Volta ge Regulator di sable

R891 1K_0402_5%@R891 1K_0402_5%@

1 2

PCH_GPIO28

CRT_DET#<31>

4

2

G

G

+3VS

R225

R225
10K_0402_5%

10K_0402_5%

1 2

CRT_DET

13

D

D

@

@

Q14

Q14
2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

High: CRT Plugged

3

2

PCH_GPIO68

PCH_GPIO69

PCH_GPIO70

PCH_GPIO71

1

R909 10K_0402_5%R909 10K_0402_5%

1 2

R910 10K_0402_5%R910 10K_0402_5%

1 2

R911 10K_0402_5%R911 10K_0402_5%

1 2

R912 10K_0402_5%R912 10K_0402_5%

1 2

+3VS

+3VS

PCH_GPIO27 (Have internal Pull-High)
High: VCCVRM VR Enable

*

Low: VCCVRM VR Disable

R228 10K_0402_5%@R228 10K_0402_5%@

1 2

PCH_GPIO37

C C

+3VS

R230 1K_0402_5%@R230 1K_0402_5%@

1 2

R232 100K_0402_5%R 232 100K_0402_5%

1 2

+3VS

R235 10K_0402_5%R235 10K_0402_5%

1 2

R894 10K_0402_5%R894 10K_0402_5%

1 2

R895 10K_0402_5%R895 10K_0402_5%

1 2

R238 10K_0402_5%R238 10K_0402_5%

1 2

R239 10K_0402_5%R239 10K_0402_5%

1 2

R240 10K_0402_5%R240 10K_0402_5%

1 2

R241 10K_0402_5%R241 10K_0402_5%

1 2

B B

R896 200K_0402_5%R 896 200K_0402_5%

1 2

R243 10K_0402_5%R243 10K_0402_5%

1 2

R244 10K_0402_5%R244 10K_0402_5%

1 2

R245 10K_0402_5%R245 10K_0402_5%

1 2

+3VALW_PCH

R246 10K_0402_5%R246 10K_0402_5%

1 2

R247 1K_0402_5%R247 1K_0402_5%

1 2

R897 10K_0402_5%R897 10K_0402_5%

1 2

R907 10K_0402_5%R907 10K_0402_5%

1 2

PCH_GPIO27

PCH_GPIO37

PCH_GPIO1

DGPU_HPD_INT#

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO38

PCH_GPIO39

ODD_DETECT#

PCH_GPIO34

PCH_GPIO48

PCH_GPIO49

PCH_GPIO12

SMIB_D

PCH_GPIO57

ODD_EN

EC_SCI#<40>

EC_SMI#<40>

SMIB<37>

R233 0_0402_5%R 233 0_ 0402_5%

ODD_EN<33>

ODD_DETECT#<33>

R920 0_0402_5%@R920 0_0402_5%@

1 2

1 2

VGA_PWROK<22,27,55>

COLOR_ENG_EN<30>

9/22

10/26

R931 10K_0402_5%@R931 10K_0402_5%@

1 2

R249 10K_0402_5%@R249 10K_0402_5%@

1 2

A A

R928 0_0402_5%R928 0_0402_5%

1 2

D12

@D12

@

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

ODD_DETECT#

PCH_GPIO35

SMIBSMIB_D

21

CRT_DET

PCH_GPIO1

DGPU_HPD_INT#

EC_SCI#

EC_SMI#

PCH_GPIO12

SMIB

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

ODD_EN

PCH_GPIO27

PCH_GPIO28

PCH_GPIO34

PCH_GPIO35

ODD_DETECT#

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

T53PAD T53PAD

T55PAD T55PAD

T57PAD T57PAD

T59PAD T59PAD

T60PAD T60PAD

T62PAD T62PAD

9/06

5

4

U60F

U60F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

RCIN#

PROCPWRGD

GPIO

GPIO

THRMTRIP#

CPU/MISC

CPU/MISC

INIT3_3V#

NC_1

NC_2

NC_3

NC_4

NC_5

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

PCH_GPIO68

C40

PCH_GPIO69

B41

PCH_GPIO70

C41

PCH_GPIO71

A40

P4

PCH_PECI_R

AU16

PECI

EC_KBRST#

P5

AY11

PCH_THRMTRIP#_R

AY10

T14

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

T34 PADT34 PAD

T35 PADT35 PAD

T36 PADT36 PAD

T37 PADT37 PAD

T41 PADT41 PAD

T43 PADT43 PAD

T45 PADT45 PAD

@

1 2

R8930_0402_5%@R8930_0402_5%

1 2

R234 390_0402_5%R234 390_0402_5%

INIT3_3V

This signal has weak internal
PU, can't pull low

Intel schematic reviwe recommand.

2

H_PECI <5,40>

EC_KBRST# <40>

H_CPUPWRGD <5>

H_THRMTRIP#

+3VS

1 2

R229

R229
10K_0402_5%

10K_0402_5%

EC_KBRST#

GATEA20 <40>

H_THRMTRIP# <5>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (6/9) GPIO, CPU, MISC

PCH (6/9) GPIO, CPU, MISC

PCH (6/9) GPIO, CPU, MISC

LA-6931P

LA-6931P

LA-6931P

R892 10K_0402_5%R892 10K_0402_5%

1 2

of

18 58Wednesday, October 27, 2010

18 58Wednesday, October 27, 2010

1

18 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

4

3

2

1

POWER

+1.05VS_VCCP

D D

C C

B B

+1.05VS_VCCP

+1.05VS_VCCP

R255

R255

0_0805_5%

0_0805_5%

1 2

R260

@R260

@

0_0603_5%

0_0603_5%

JP5

JP5

12

C861

10U_0805_6.3V6M

C861

10U_0805_6.3V6M

C862

1U_0402_6.3V6K

C862

1U_0402_6.3V6K

1

R258

R258

1

2

2

1

2

1

2

+1.05VS_VCCDPLLEXP

12

T63PAD T63PAD

C157

1U_0402_6.3V6K

C157

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+3VS_VCCA3GBG

1

C874

C874

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.05VS_VCCP

PAD-OPEN 4x4m

PAD-OPEN 4x4m

+1.05VS_VCCP

R253 0_0603_5%R253 0_0603_5%

This pin can be left as no connect in
On-Die VR enabled mode (default).

+1.05VS_VCC_EXP

C156

10U_0805_6.3V6M

C156

10U_0805_6.3V6M

1

2

+3VS

0_0805_5%

0_0805_5%

1 2

+1.05VS_VCCAPLL_FDI

Place CH53 Near BG6 pin

12

C876

@C876

@

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_PCH

C863

1U_0402_6.3V6K

C863

1U_0402_6.3V6K

1

2

+1.05VS_VCCDPLLEXP

+VCCAPLLEXP

+1.05VS_VCC_EXP

C871

1U_0402_6.3V6K

C871

1U_0402_6.3V6K

C870

C870

1

2

+3VS_VCCA3GBG

+1.05VS_VCCAPLL_FDI

R261

R261

+1.05VS_VCCDPLL_FDI

1 2

0_0805_5%

0_0805_5%

+VCCP_VCCDMI

C864

1U_0402_6.3V6K

C864

1U_0402_6.3V6K

1

2

C872

1U_0402_6.3V6K

C872

1U_0402_6.3V6K

1

2

+VCCAFDI_VRM

U60G

U60G

13

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

00mA

2925mA

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

1mA

CRTLVDS

CRTLVDS

1m

A

VCCTX_LVDS[1]

VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3]

VCCTX_LVDS[4]

DMI

DMI

20mA

190mA

NAND / SPI HVCMOS

NAND / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

+VCCADAC

U48

U47

+VCCA_LVDS

AK36

AK37

AM37

AM38

AP36

AP37

+3VS_VCC3_3_6

V33

V34

+VCCAFDI_VRM

AT16

+VCCP_VCCDMI

AT20

+1.05VS_VCC_DMI_CCI

AB36

AG16

AG17

AJ16

AJ17

+3V_VCCPSPI

V1

1

2

+VCCTX_LVDS

1

SG@

SG@

C865

C865

0.01U_0402_16V7K

0.01U_0402_16V7K

2

1

2

1

2

1

2

+VCCADAC+1.05VS_PCH

0.1U_0402_10V7K

0.1U_0402_10V7K

C858

0.01U_0402_16V7K

C858

0.01U_0402_16V7K

1

2

R254

R254

0_0805_5%

0_0805_5%

1 2

C868

C868

0.1U_0402_10V7K

0.1U_0402_10V7K

+VCCAFDI_VRM

1

C873

C873
1U_0402_6.3V6K

1U_0402_6.3V6K

2

C875

C875

0.1U_0402_10V7K

0.1U_0402_10V7K

+3V_VCCPSPI

C877

C877
1U_0402_6.3V6K

1U_0402_6.3V6K

C859

C859

1

C860

C860
10U_0805_6.3V6M

10U_0805_6.3V6M

2

12

R251

R251
0_0402_5%

0_0402_5%

DIS@

DIS@

1

SG@

SG@

C866

C866

0.01U_0402_16V7K

0.01U_0402_16V7K

2

+3VS

+VCCP_VCCDMI

R257

R257
0_0805_5%

0_0805_5%

1 2

R259

R259
0_0805_5%

0_0805_5%

1 2

L1

L1

MBK1608221YZF_2P

MBK1608221YZF_2P

12

R250

R250

0.022_0805_1%

0.022_0805_1%

SG@

SG@

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

+1.05VS_VCCP

+1.8VS+VCCPNAND

R262

R262

0_0805_5%

0_0805_5%

1 2

+3VS

+3VS

L2

SG@ L2

SG@

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608

12

R252

R252
0_0402_5%

0_0402_5%

DIS@

DIS@

R256

R256
0_0805_5%

0_0805_5%

1 2

1

C869

C869
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW_PCH

0.1uH inductor, 200mA

+1.05VS_VCCP

SG@

SG@

C867

C867

+1.8VS

12

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Iccmax
Current (A)

0.001

5

5

0.001

0.001

0.266

0.001

0.08

0.08

1.3

0.042

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5Vc cSusHDA

0.119

0.01

VccVRM 1.8 / 1 .5 0.16

1.05VccCLK DMI

0.02

VccSSC 1.0 5 0.095

VccDIFFCLKN 1.05 0.0 55

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.06

+1.5VS

R263 0_0603_5%R263 0_0603_5%

+1.8VS

R264 0_0603_5%@R264 0_0603_5%@

Intel reco mmand
stuff RH19 7 and unst uff RH198

12

12

+VCCAFDI_VRM

+VCCAFDI_VRM

VCCVRM==>1.5V FOR MOBILE

CVRM==>1.8V FOR DESKTOP

VC

VCCVRM = 1 60mA detal waiting f or newest spec

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (7/9) PWR

PCH (7/9) PWR

PCH (7/9) PWR

LA-6931P

LA-6931P

LA-6931P

1

1.0

1.0

1.0

of

19 58Wednesday, October 27, 2010

19 58Wednesday, October 27, 2010

19 58Wednesday, October 27, 2010

5

www.bufanxiu.com

+3VS

D D

C C

+1.05VS_VCCP

B B

A A

R898

@R898

@

0_0805_5%

0_0805_5%

1 2

L3

L3

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

R280

R280
0_0805_5%

0_0805_5%

+VCCA_DPLL_L

1 2

+1.05VS_VCCP

+1.05VS_VCCP

+1.05VS_VCCP

+1.05VS_VCCP

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

0_0603_5%

+3VS_VCC_CLKF33

10U_0805_10V4Z

10U_0805_10V4Z

1

2

+1.05VS_VCCP

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

R284

R284

12

1

2

R286

R286

12

1

2

R288

R288

12

1

2

R290

@R290

@

12

1

2

C878

C878

C895

C895
1U_0402_6.3V6K

1U_0402_6.3V6K

C897

C897
1U_0402_6.3V6K

1U_0402_6.3V6K

C197

C197
1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

L4

@L4

@

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

C173

C173

10U_0805_10V4Z

10U_0805_10V4Z

L5

L5

1 2

1 2

L6

L6

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

+1.05VM_VCCSUS

C900

@C900

@

1U_0402_6.3V6K

1U_0402_6.3V6K

C167

1U_0402_6.3V6K

C167

1U_0402_6.3V6K

+3VALW

1

+1.05VS_VCCP

@

@

2

+1.05VS_VCCP

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C186

220U_B2_2.5VM_R35+C186

220U_B2_2.5VM_R35

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

+

2

2

+1.05VS_VCCDIFFCLKN

+1.05VS_VCCP

+1.05VS_VCCP

+3VALW_PCH

R272 0_0603_5%@R272 0_0603_5%@

1 2

R273 0_0603_5%R 273 0_ 0603_5%

R277

R277

0_0805_5%

0_0805_5%

1 2

C187

220U_B2_2.5VM_R35+C187

220U_B2_2.5VM_R35

C890

C890

1

+

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

R293

R293

0_0603_5%

0_0603_5%

1 2

1

2

4

Have internal VRM

R266

@R266

@

0_0603_5%

0_0603_5%

12

R268

R268

0_0603_5%

0_0603_5%

1 2

C880

@C880

@

0.1U_0402_10V7K

0.1U_0402_10V7K

12

1 2

C885

1U_0402_6.3V6K

C885

1U_0402_6.3V6K

1

2

C891

1U_0402_6.3V6K

C891

1U_0402_6.3V6K

1

2

1

C896

C896

2

1

C899

C899

2

C902

0.1U_0402_10V7K

C902

0.1U_0402_10V7K

C901

4.7U_0603_6.3V6K

C901

4.7U_0603_6.3V6K

1

1

2

2

+VCCACLK

+VCCPDSW

1

C168

C168

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

+VCCSUS1

1

C881

@C881

@

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VM_VCCASW

C882

22U_0805_6.3V6M

C882

22U_0805_6.3V6M

1

1

2

2

C886

1U_0402_6.3V6K

C886

1U_0402_6.3V6K

1

1

2

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

+VCCSST

+1.05VM_VCCSUS

+V_CPU_IO

C903

0.1U_0402_10V7K

C903

0.1U_0402_10V7K

+RTCVCC

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

3

2

1

VCC3_3 = 2 66mA detal waiting f or newest spec

CDMI = 42m A detal wa iting for newest sp ec

VC

+5VALW

POWER

U60J

U60J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

C883

22U_0805_6.3V6M

C883

22U_0805_6.3V6M

C887

1U_0402_6.3V6K

C887

1U_0402_6.3V6K

C205

0.1U_0402_10V7K

C205

0.1U_0402_10V7K

C204

C204

1

2

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47

BF47

AF17
AF33
AF34
AG34

AG33

V16

T17
V19

BJ8

A22

C206

0.1U_0402_10V7K

C206

0.1U_0402_10V7K

1

2

VCCASW[3]

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[11]

VCCIO[10]

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

VCCRTC

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

POWER

VCCIO[29]

119mA

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

10mA

HDA

HDA

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

1mA

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

V5REF

3m

A

1010mA

Clock and Miscellaneous

Clock and Miscellaneous

80mA

80mA

55mA

95mA

1mA

CPURTC

CPURTC

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+1.05VS_VCCUSBCORE

1

2

1

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_VCCPSUS

+PCH_V5REF_RUN

+3V_VCCPSUS

+3VS_VCCPCORE

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

+VCCSUSHDA

1

C207

C207

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0_0603_5%

0_0603_5%

C879

C879
1U_0402_6.3V6K

1U_0402_6.3V6K

+3V_VCCPUSB

C172

0.1U_0402_10V7K

C172

0.1U_0402_10V7K

+3V_VCCAUBG

1

C174

C174

0.1U_0402_10V7K

0.1U_0402_10V7K

2

C884 1U_0402_6.3V6K@ C884 1U_0402_6.3V6K@

R283

R283

0_0603_5%

0_0603_5%

1

C893

C893

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.05VS_SATA3

+VCCSATAPLL

+1.05VS_VCC_SATA

R291 0_0603_5%R 291 0_ 0603_5%

R292 0_0603_5%R 292 0_ 0603_5%

R294 0_0603_5%R 294 0_ 0603_5%

R295 0_0603_5%R 295 0_ 0603_5%

R269

R269

R271

R271
0_0603_5%

0_0603_5%

1 2

+3VS

12

1

2

12

12

12

12

+1.05VS_VCCP

12

+3VALW_PCH

12

+3VALW_PCH

R274

R274

0_0603_5%

0_0603_5%

12

+1.05VS_VCCP

R276

R276

0_0603_5%

0_0603_5%

12

1

2

1

2

1

2

+1.05VS_SATA3

1

2

R289

R289

0_0805_5%

0_0805_5%

C898

C898
1U_0402_6.3V6K

1U_0402_6.3V6K

R278

R278
0_0603_5%

0_0603_5%

C888

C888
1U_0402_6.3V4Z

1U_0402_6.3V4Z

R281

R281
0_0805_5%

0_0805_5%

C889

C889

0.1U_0402_10V7K

0.1U_0402_10V7K

C892

C892

0.1U_0402_10V7K

0.1U_0402_10V7K

C894

C894
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCP

12

+1.05VS_VCCP

+3VALW_PCH

PCH_PWR_EN#<45>

+3VALW_PCH

12

+3VS

12

R282

R282
0_0603_5%

0_0603_5%

0_0805_5%

0_0805_5%

+3VS

12

+1.05VS_VCCP

R285

R285

12

L7

@L7

@

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

1

C196

@C196

@

10U_0805_10V4Z

10U_0805_10V4Z

Place CH80 Near AK1 pin

2

R267

R267
0_0603_5%

0_0603_5%

@

@

Q15

Q15

AO3413L_SOT23-3

AO3413L_SOT23-3

10_0402_5%

10_0402_5%

10_0402_5%

10_0402_5%

+1.05VS_VCCP

12

123

DGS

DGS

R275

R275

R279

R279

1

@

2

+3VALW_PCH+5VALW_PCH

12

+3VS+5VS

12

+5VALW_PCH

R270

20K_0402_5%@R270

20K_0402_5%

C171

0.1U_0402_10V7K@C171

0.1U_0402_10V7K

12

@

21

D3

D3
CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

1

C176

C176

0.1U_0603_25V7K

0.1U_0603_25V7K

2

21

D4

D4
CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

1

C184

C184
1U_0603_10V6K

1U_0603_10V6K

2

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (8/9) PWR

PCH (8/9) PWR

PCH (8/9) PWR

LA-6931P

LA-6931P

LA-6931P

1

of

20 58Wednesday, October 27, 2010

20 58Wednesday, October 27, 2010

20 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

D D

C C

B B

A A

U60H

U60H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

U60I

U60I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

2

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

1

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (9/9) VSS

PCH (9/9) VSS

PCH (9/9) VSS

LA-6931P

LA-6931P

LA-6931P

1

21 58Wednesday, October 27, 2010

21 58Wednesday, October 27, 2010

21 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

D D

PEG_HTX_C_GRX_P0<4>
PEG_HTX_C_GRX_N0< 4>

PEG_HTX_C_GRX_P1<4>
PEG_HTX_C_GRX_N1< 4>

PEG_HTX_C_GRX_P2<4>
PEG_HTX_C_GRX_N2< 4>

PEG_HTX_C_GRX_P3<4>
PEG_HTX_C_GRX_N3< 4>

PEG_HTX_C_GRX_P4<4>
PEG_HTX_C_GRX_N4< 4>

C C

B B

VGA_PWROK<18,27,55>

A A

PEG_HTX_C_GRX_P5<4>
PEG_HTX_C_GRX_N5< 4>

PEG_HTX_C_GRX_P6<4>
PEG_HTX_C_GRX_N6< 4>

PEG_HTX_C_GRX_P7<4>
PEG_HTX_C_GRX_N7< 4>

PEG_HTX_C_GRX_P8<4>
PEG_HTX_C_GRX_N8< 4>

PEG_HTX_C_GRX_P9<4>
PEG_HTX_C_GRX_N9< 4>

PEG_HTX_C_GRX_P10<4>
PEG_HTX_C_GRX_N10< 4>

PEG_HTX_C_GRX_P11<4>
PEG_HTX_C_GRX_N11< 4>

PEG_HTX_C_GRX_P12<4>
PEG_HTX_C_GRX_N12< 4>

PEG_HTX_C_GRX_P13<4>
PEG_HTX_C_GRX_N13< 4>

PEG_HTX_C_GRX_P14<4>
PEG_HTX_C_GRX_N14< 4>

PEG_HTX_C_GRX_P15<4>
PEG_HTX_C_GRX_N15< 4>

CLK_PEG_VGA<14>
CLK_PEG_VGA#<14>

VGA_PWROK VGA_PWROK_R

10K_0402_1%

10K_0402_1%

R766

R766

PLTRST_VGA#< 17>

1 2

R517 0_0402_5%@R517 0_0402_5%@

VGA_PWROK_R

12

PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1

PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2

PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4

PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5

PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6

PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_N7

PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N9

PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10

PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11

PEG_HTX_C_GRX_P12
PEG_HTX_C_GRX_N12

PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P15
PEG_HTX_C_GRX_N15

CLK_PEG_VGA
CLK_PEG_VGA#

PLTRST_VGA#

AA38

W36

W38

U36

U38

R36

R38

N36

N38
M37

M35

H37

H35
G36

G38

AB35
AA36

AH16

AA30

Y37

Y35

V37

V35

T37

T35

P37

P35

L36

L38
K37

K35
J36

J38

F37

F35
E37

WHESTLERM2

WHESTLERM2

4

U54A

U54A

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

CLOCK

CLOCK

PCIE_REFCLKP
PCIE_REFCLKN

PWRGOOD

PERSTB

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

CALIBRATION

CALIBRATION

PCIE_CALRP

PCIE_CALRN

PEG_HRX_C_GTX_P0

Y33

PEG_HRX_C_GTX_N0

Y32

PEG_HRX_C_GTX_P1

W33

PEG_HRX_C_GTX_N1

W32

PEG_HRX_C_GTX_P2

U33

PEG_HRX_C_GTX_N2

U32

PEG_HRX_C_GTX_P3

U30

PEG_HRX_C_GTX_N3

U29

PEG_HRX_C_GTX_P4

T33

PEG_HRX_C_GTX_N4

T32

PEG_HRX_C_GTX_P5

T30

PEG_HRX_C_GTX_N5

T29

PEG_HRX_C_GTX_P6

P33

PEG_HRX_C_GTX_N6

P32

PEG_HRX_C_GTX_P7

P30

PEG_HRX_C_GTX_N7

P29

PEG_HRX_C_GTX_P8

N33

PEG_HRX_C_GTX_N8

N32

PEG_HRX_C_GTX_P9

N30

PEG_HRX_C_GTX_N9

N29

PEG_HRX_C_GTX_P10

L33

PEG_HRX_C_GTX_N10

L32

PEG_HRX_C_GTX_P11

L30

PEG_HRX_C_GTX_N11

L29

PEG_HRX_C_GTX_P12

K33

PEG_HRX_C_GTX_N12

K32

PEG_HRX_C_GTX_P13

J33

PEG_HRX_C_GTX_N13

J32

PEG_HRX_C_GTX_P14

K30

PEG_HRX_C_GTX_N14

K29

PEG_HRX_C_GTX_P15

H33

PEG_HRX_C_GTX_N15

H32

PCIE_CALRP

Y30

PCIE_CALRN

Y29

3

C66 0.22U_0402_10V6KC66 0.22U_0402_10V6K

1 2

C67 0.22U_0402_10V6KC67 0.22U_0402_10V6K

1 2

C82 0.22U_0402_10V6KC82 0.22U_0402_10V6K

1 2

C83 0.22U_0402_10V6KC83 0.22U_0402_10V6K

1 2

C54 0.22U_0402_10V6KC54 0.22U_0402_10V6K

1 2

C55 0.22U_0402_10V6KC55 0.22U_0402_10V6K

1 2

C56 0.22U_0402_10V6KC56 0.22U_0402_10V6K

1 2

C57 0.22U_0402_10V6KC57 0.22U_0402_10V6K

1 2

C58 0.22U_0402_10V6KC58 0.22U_0402_10V6K

1 2

C59 0.22U_0402_10V6KC59 0.22U_0402_10V6K

1 2

C84 0.22U_0402_10V6KC84 0.22U_0402_10V6K

1 2

C85 0.22U_0402_10V6KC85 0.22U_0402_10V6K

1 2

C60 0.22U_0402_10V6KC60 0.22U_0402_10V6K

1 2

C61 0.22U_0402_10V6KC61 0.22U_0402_10V6K

1 2

C86 0.22U_0402_10V6KC86 0.22U_0402_10V6K

1 2

C87 0.22U_0402_10V6KC87 0.22U_0402_10V6K

1 2

C88 0.22U_0402_10V6KC88 0.22U_0402_10V6K

1 2

C89 0.22U_0402_10V6KC89 0.22U_0402_10V6K

1 2

C52 0.22U_0402_10V6KC52 0.22U_0402_10V6K

1 2

C53 0.22U_0402_10V6KC53 0.22U_0402_10V6K

1 2

C62 0.22U_0402_10V6KC62 0.22U_0402_10V6K

1 2

C63 0.22U_0402_10V6KC63 0.22U_0402_10V6K

1 2

C90 0.22U_0402_10V6KC90 0.22U_0402_10V6K

1 2

C91 0.22U_0402_10V6KC91 0.22U_0402_10V6K

1 2

C92 0.22U_0402_10V6KC92 0.22U_0402_10V6K

1 2

C93 0.22U_0402_10V6KC93 0.22U_0402_10V6K

1 2

C45 0.22U_0402_10V6KC45 0.22U_0402_10V6K

1 2

C46 0.22U_0402_10V6KC46 0.22U_0402_10V6K

1 2

C80 0.22U_0402_10V6KC80 0.22U_0402_10V6K

1 2

C81 0.22U_0402_10V6KC81 0.22U_0402_10V6K

1 2

C64 0.22U_0402_10V6KC64 0.22U_0402_10V6K

1 2

C65 0.22U_0402_10V6KC65 0.22U_0402_10V6K

1 2

1 2

R75 1.27K_0402_1%R75 1.27K_0402_1%

1 2

R82 2K_0402_1%R82 2K_0402_1%

9/14 Change poewr net to +1.0VSDGPU

+1.0VSDGPU

PEG_HRX_GTX_P0 <4>
PEG_HRX_GTX_N0 <4>

PEG_HRX_GTX_P1 <4>
PEG_HRX_GTX_N1 <4>

PEG_HRX_GTX_P2 <4>
PEG_HRX_GTX_N2 <4>

PEG_HRX_GTX_P3 <4>
PEG_HRX_GTX_N3 <4>

PEG_HRX_GTX_P4 <4>
PEG_HRX_GTX_N4 <4>

PEG_HRX_GTX_P5 <4>
PEG_HRX_GTX_N5 <4>

PEG_HRX_GTX_P6 <4>
PEG_HRX_GTX_N6 <4>

PEG_HRX_GTX_P7 <4>
PEG_HRX_GTX_N7 <4>

PEG_HRX_GTX_P8 <4>
PEG_HRX_GTX_N8 <4>

PEG_HRX_GTX_P9 <4>
PEG_HRX_GTX_N9 <4>

PEG_HRX_GTX_P10 <4>
PEG_HRX_GTX_N10 <4>

PEG_HRX_GTX_P11 <4>
PEG_HRX_GTX_N11 <4>

PEG_HRX_GTX_P12 <4>
PEG_HRX_GTX_N12 <4>

PEG_HRX_GTX_P13 <4>
PEG_HRX_GTX_N13 <4>

PEG_HRX_GTX_P14 <4>
PEG_HRX_GTX_N14 <4>

PEG_HRX_GTX_P15 <4>
PEG_HRX_GTX_N15 <4>

2

U54G

U54G

WHESTLERM2

WHESTLERM2

LVDS CONTROL

LVDS CONTROL

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

LVTMDP

LVTMDP

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

VARY_BL

DIGON

TXOUT_U3P

TXOUT_U3N

TXOUT_L3P
TXOUT_L3N

VGA_PNL_PWM

add for DPST support.

VGA_PNL_PWM

AK27

ENVDD

AJ27

VGA_TZCLK+

AK35

VGA_TZCLK-

AL36

VGA_TZOUT0+

AJ38

VGA_TZOUT0-

AK37

VGA_TZOUT1+

AH35

VGA_TZOUT1-

AJ36

VGA_TZOUT2+

AG38

VGA_TZOUT2-

AH37

AF35
AG36

AP34
AR34

AW37
AU35

AR37
AU39

AP35
AR35

AN36
AP37

T1400T1400
T1401T1401

VGA_TXCLK+
VGA_TXCLK-

VGA_TXOUT0+
VGA_TXOUT0-

VGA_TXOUT1+
VGA_TXOUT1-

VGA_TXOUT2+
VGA_TXOUT2-

T1402T1402
T1403T1403

1

12

@

@

R84

R84
10K_0402_5%

10K_0402_5%

VGA_PNL_PWM <30>
ENVDD <30>

VGA_TZCLK+ <30>
VGA_TZCLK- <30>

VGA_TZOUT0+ <30>
VGA_TZOUT0- <30>

VGA_TZOUT1+ <30>
VGA_TZOUT1- <30>

VGA_TZOUT2+ <30>
VGA_TZOUT2- <30>

VGA_TXCLK+ <30>
VGA_TXCLK- <30>

VGA_TXOUT0+ <30>
VGA_TXOUT0- <30>

VGA_TXOUT1+ <30>
VGA_TXOUT1- <30>

VGA_TXOUT2+ <30>
VGA_TXOUT2- <30>

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Mannhatton_ PCIE / LVDS

Mannhatton_ PCIE / LVDS

Mannhatton_ PCIE / LVDS

LA-6931P

LA-6931P

LA-6931P

1

22 58Wednesday, October 27, 2010

22 58Wednesday, October 27, 2010

22 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

Strap Name Pin Straps description

TX_PWRS_ENB

TX_DEEMPH_EN

BIF_GEN2_EN

CONFIG[1]

D D

CONFIG[2]
CONFIG[0]

BIOS_ROM_EN

AUD[1]
AUD(0)

SMS_EN_HARD

VIP_DEVICE
_STRAP_DIS

VRAM

Hynix(8pcs) 1GB (old)
H5TQ1G63BFR-12C

Hynix(8pcs) 1GB (900MHz)
H5TQ1G63DFR-11C

Samsung(8pcs) 1GB (900MHz)
K4W1G1646G-BC11 LF

Hynix(8pcs) 2GB (800MHz)
H5TQ2G63BFR-12C

C C

Samsung(8pcs) 2GB (800MHz)
K4W2G1646C-HC12

+1.8VSDGPU

B B

A A

18P_0402_50V8J

18P_0402_50V8J

R648

10K_0402_5%

10K_0402_5%

12

X76@R648

X76@

CLK_27M_TCLK<14>

+3VS_DELAY

R106 10K_0402_5%@R106 10K_0402_5%@
R131 10K_0402_5%@R131 10K_0402_5%@
R568 10K_0402_5%@R568 10K_0402_5%@
R115 10K_0402_5%@R115 10K_0402_5%@

R135 10K_0402_5%R135 10K_0402_5%
R133 10K_0402_5%@R133 10K_0402_5%@
R128 10K_0402_5%@R128 10K_0402_5%@

R121 10K_0402_5%@R121 10K_0402_5%@

R378 10K_0402_5%R378 10K_0402_5%

R666

R666

C567

C567

27MHZ_16PF_X5H027000FG1H

27MHZ_16PF_X5H027000FG1H

C651

C651

12

1 2
1 2
1 2
1 2

1 2
1 2
1 2

1 2

1 2

Transmitter Power Saving Enable

GPIO0

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable

GPIO1

0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)

0= Advertises the PCI-E device as 2.5 GT/s capable at power-on

GPIO2

5.0 GT/s capability will be controlled by software

GPIO13,12,11 (config 2,1,0) :

GPIO13

a) If BIOS_ROM_EN = 1, then Config[2:0] defines

GPIO12

the ROM type.

GPIO11

b) If BIOS_ROM_EN = 0, then Config[2:0] defines
the primary memory aperture size.

Enable external BIOS ROM device

GPIO22

0: Diable, 1: Enable

00: No audio function; 10: Audio for DisplayPort only;

HSYNC
VSYNC

01: Audio for DisplayPort and HDMI if adapter is detected;
11: Audio for both DisplayPort and HDMI

Can be unconnected if not used.

H2SYNC

V2SYNC

Can be unconnected if not used.

Location

VRAM_ID21VRA

M_ID1

VRAM_ID0

O

O

O

O

1

1

O

1

1

O

O

1 O 1

R645

10K_0402_5%

10K_0402_5%

R647

10K_0402_5%

10K_0402_5%

12

X76@R645

X76@

X76@R647

X76@

VRAM_ID0
VRAM_ID1
VRAM_ID2

R1557 0_0402_5%GRA@R1557 0_0402_5%GRA@

C278

C278

1 2

@

@

12

100P_0402_50V8J

100P_0402_50V8J

R5241M_0603_5% R5241M_0603_5%

Y3

Y3

2 1

18P_0402_50V8J

18P_0402_50V8J

1 2

1 2

100P_0402_50V8J

100P_0402_50V8J

10K_0402_5%

10K_0402_5%

XTALINXTALOUT

C658

C658

5

JTAG_CLK

VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
VGA_AC_DET

VGA_GPIO11
VGA_GPIO12
VGA_GPIO13

GENERICC

JTAG_TMS

GPU_VID1

JTAG_TRSTB

VDDCI_VID

Y3 must install on SG mode

+1.8VSDGPU

+1.0VSDGPU

memory apertures
CON

FIG[3:0]
128 MB 000
256 MB 001
64 MB 010

VGA_LCD_CLK<30>
VGA_LCD_DAT<30>

ACIN_BUF<40>

DGPU_BKL_EN<16>

PEG_CLKREQ#<14>

+1.8VSDGPU

L16

L16

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

10U_0603_6.3V6M

10U_0603_6.3V6M

L19

L19

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

+1.8VSDGPU

4

Default

0

0

01= Advertises the PCI-E device as 5.0 GT/s capable at power-on

001

0

11

0

0

D9

@D9

@

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

VDDCI_VID<54>

DGPU_BKL_EN

R901

R901

1 2

100K_0402_5%

100K_0402_5%

GPU_VID0<55>

GPU_VID1<55>

R109 10K_0402_5%WHI@R109 10K_0402_5%WHI@

VGA_HDMI_DET<32>

R142 499_0402_1%R142 499_0402_1%

R144 249_0402_1%R144 249_0402_1%

12

1

C123

C123

2

12

C150

10U_0603_6.3V6M

C150

10U_0603_6.3V6M

1

2

L12

L12

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

12

1

2

4

T1404T1404

PEG_CLKREQ#

1 2

1 2

1 2

1 2

C124

0.1U_0402_16V4Z

C124

0.1U_0402_16V4Z

1

2

C159

0.1U_0402_16V4Z

C159

0.1U_0402_16V4Z

1

2

C75

10U_0603_6.3V6M

C75

10U_0603_6.3V6M

4.7K_0402_5%

4.7K_0402_5%

21

C277

C277

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+DPLL_PVDD

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

+DPLL_VDDC

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

+TSVDD

C99

1U_0402_6.3V4Z

C99

1U_0402_6.3V4Z

1

2

VRAM_ID0
VRAM_ID1
VRAM_ID2

+3VS_DELAY

12

R536

R536

VGA_GPIO0
VGA_GPIO1
VGA_GPIO2

VGA_AC_DET

VGA_GPIO11
VGA_GPIO12
VGA_GPIO13

GPU_VID0

THM_ALERT#

GPU_VID1

T1405T1405

T1406T1406

GENERICC

VGA_HDMI_DET

C134

C134

125mA

C149

C149

1

2

12

R534

R534

4.7K_0402_5%

4.7K_0402_5%

VGA_SMB_DA2
VGA_SMB_CK2

JTAG_TRSTB

JTAG_CLK
JTAG_TMS

+DPLL_VDDC

GPU_THERM_D+
GPU_THERM_D-

C127

0.1U_0402_16V4Z

C127

0.1U_0402_16V4Z

+VGA_VREF

75mA

XTALIN
XTALOUT

R770 0_0402_5%

R770 0_0402_5%

@

@

1 2

@

@

1 2

R771 0_0402_5%

R771 0_0402_5%

5mA

U54B

U54B

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF_HPD5

AH24

GENERICG_HPD6

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AL31

TS_A/NC

AJ32

TSVDD

AJ33

TSVSS

WHESTLERM2

WHESTLERM2

MUTI GFX

MUTI GFX

I2C

I2C

PLL/CLOCK

PLL/CLOCK

THERMAL

THERMAL

3

VGA_HDMI_TXC+

AU24

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P
TX0M_DPA2N

DPA

DPA

TX1P_DPA1P
TX1M_DPA1N

TX2P_DPA0P
TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P
TX3M_DPB2N

DPB

DPB

TX4P_DPB1P
TX4M_DPB1N

TX5P_DPB0P
TX5M_DPB0N

TXCCP_DPC3P
TXCCM_DPC3N

TX0P_DPC2P
TX0M_DPC2N

DPC

DPC

TX1P_DPC1P
TX1M_DPC1N

TX2P_DPC0P
TX2M_DPC0N

TXCDP_DPD3P
TXCDM_DPD3N

TX3P_DPD2P
TX3M_DPD2N

DPD

DPD

TX4P_DPD1P
TX4M_DPD1N

TX5P_DPD0P
TX5M_DPD0N

DAC1

DAC1

HSYNC
VSYNC

RSET

AVDD

AVSSQ

VDD1DI
VSS1DI

R2/NC

R2B/NC

G2/NC

G2B/NC

B2/NC

B2B/NC

C/NC

Y/NC

COMP/NC

DAC2

DAC2

H2SYNC/GENLK_CLK

V2SYNC/GENLK_VSYNC

VDD2DI/NC

VSS2DI/NC

A2VDD/NC

A2VDDQ/NC

A2VSSQ/TSVSSQ

R2SET/NC

DDC/AUX

DDC/AUX

DDC1CLK

DDC1DATA

AUX1P
AUX1N

DDC2CLK

DDC2DATA

AUX2P
AUX2N

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

DDCCLK_AUX7P

DDCDATA_AUX7N

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

VGA_HDMI_TXC-

AV23

VGA_HDMI_TXD0+

AT25

VGA_HDMI_TXD0-

AR24

VGA_HDMI_TXD1+

AU26

VGA_HDMI_TXD1-

AV25

VGA_HDMI_TXD2+

AT27

VGA_HDMI_TXD2-

AR26

AR30
AT29

AV31
AU30

AR32
AT31

AT33
AU32

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

VGA_CRT_HSYNC

AC36

VGA_CRT_VSYNC

AC38

R68 499_0402_1%R68 499_0402_1%

AB34

+AVDD

AD34
AE34

+VDD1DI

AC33
AC34

AC30
AC31

AD30
AD31

AF30
AF31

AC32
AD32
AF32

H2SYNC

AD29

V2SYNC

AC29

+VDD2DI

AG31
AG32

+A2VDD

AG33

+A2VDDQ

AD33

AF33

R81

R81

715_0402_1%

715_0402_1%

GRA@

GRA@

AA29

1 2

VGA_HDMI_SCLK

AM26

VGA_HDMI_SDATA

AN26

HDMI

AM27
AL27

AM19
AL19

AN20
AM20

AL30
AM30

AL29
AM29

VGA_DDC_CLK

AN21

VGA_DDC_DATA

AM21

AJ30
AJ31

AK30
AK29

Issued Date

Issued Date

Issued Date

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

1 2

M96 only

CRT

VGA_HDMI_TXC+ <32>
VGA_HDMI_TXC- <32>

VGA_HDMI_TXD0+ < 32>
VGA_HDMI_TXD0- <32>

VGA_HDMI_TXD1+ < 32>
VGA_HDMI_TXD1- <32>

VGA_HDMI_TXD2+ < 32>
VGA_HDMI_TXD2- <32>

+3VS_DELAY

+3VS_DELAY

R47

R47

R48

R48

4.7K_0402_5%

4.7K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

70mA

45mA

100mA

130mA

1.5mA

4.7K_0402_5%

4.7K_0402_5%

1 2

1 2

3/2 Change Bom structure of C120 to
mount,Change value of R525 to 24k ohm(1%)

VGA_CRT_R <31>

VGA_CRT_G <31>

VGA_CRT_B <31>

VGA_CRT_HSYNC <31>
VGA_CRT_VSYNC <31>

C96

1U_0402_6.3V4Z

C96

1U_0402_6.3V4Z

1

1

2

2

C137

1U_0402_6.3V4Z

C137

1U_0402_6.3V4Z

1

1

2

2

R76

R76

0_0603_5%

0_0603_5%

GRA@

GRA@

R72

R72

0_0603_5%

0_0603_5%

GRA@

GRA@

1

@

2

VGA_HDMI_SCLK <32>
VGA_HDMI_SDATA <32>

4

2

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

Q9A DMN66D0LDW-7 2N_SOT363-6Q9A DMN66D0LD W-7 2N_SOT363-6

C79

0.1U_0402_16V4Z

C79

0.1U_0402_16V4Z

1

C72

C72
10U_0805_10V4Z

10U_0805_10V4Z

2

C136

10U_0603_6.3V6M

C136

10U_0603_6.3V6M

C148

0.1U_0402_16V4Z

C148

0.1U_0402_16V4Z

1

2

+1.8VSDGPU

+3VS_DELAY

C78

0.1U_0402_16V4Z@C78

0.1U_0402_16V4Z

C97

1U_0402_6.3V4Z@C97

1U_0402_6.3V4Z

1

1

@

@

2

2

L10

L10
BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

L9

L9
BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

10U_0603_6.3V6M@C71

10U_0603_6.3V6M

PWR Sequence

+3VS_DELAY

VGA_CORE (VDDC)

+1.8VS

VGA_DDC_CLK <31>
VGA_DDC_DATA <31>

Compal Secret Data

Compal Secret Data

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

GPU_THERM_D+

GPU_THERM_D-

5

EC_SMB_CK2

3

Q9B

Q9B

EC_SMB_DA2

61

Use boradway GPU,
R28 change to
0 Ohm(SD028000080)

VGA_ON<17,46,54>

12

12

R1444

R1444

0_0603_5%

0_0603_5%

GRA@

GRA@

C71

2

+3VS_DELAY

1

2

2200P_0402_50V7K

2200P_0402_50V7K

1 2

C109

C109

+3VS_DELAY

+3VS

100K_0402_5%

100K_0402_5%

0_0402_5%

0_0402_5%

+1.8VSDGPU

+1.8VSDGPU

+1.8VSDGPU

External VGA Thermal Sensor

C111

0.1U_0402_16V4Z@C111

0.1U_0402_16V4Z

@

U15

@U15

1

VDD

2

D+

3

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

ADM1032ARMZ-2REEL_MSOP8

EC_SMB_CK2 <14,40>

EC_SMB_DA2 <14,40>

AO3413_SOT23-3

AO3413_SOT23-3

C120

C120

R45

R45

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

R525

R525

24K_0402_1%

24K_0402_1%

R28

R28

@

SCLK

SDATA

ALERT#

R833

@ R833

@

0_0603_5%

0_0603_5%

D

S

D

S

13

Q10

Q10

12

G

G

2

10U_0805_6.3V6M

10U_0805_6.3V6M

2

G

G

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C69

C69

2

V2SYNC
H2SYNC

VGA_CRT_VSYNC
VGA_CRT_HSYNC

VGA_HDMI_SCLK
VGA_HDMI_SDATA
VGA_DDC_CLK
VGA_DDC_DATA

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

Title

Title

Title

Mannhatton_Strape/DP/HDMI//CRT

Mannhatton_Strape/DP/HDMI//CRT

Mannhatton_Strape/DP/HDMI//CRT

e Document Number Rev

Size Document Number Rev

Size Document Number Rev

Siz

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

VGA_SMB_CK2

8

VGA_SMB_DA2

7

6

5

+3VS_DELAY

100mA

1

C476

C476

R795

R795
470_0603_5%

470_0603_5%

2

1 2
13

D

D

13

D

D

Q76

Q76

S

S

Q7

Q7

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

R63 10K_0402_5%@R63 10K_0402_5%@

1 2

R62 10K_0402_5%@R62 10K_0402_5%@

1 2

R510 10K_0402_5%R510 10K_0402_5%

1 2

R513 10K_0402_5%R513 10K_0402_5%

1 2

R528 10K_0402_5%R528 10K_0402_5%

1 2

R529 10K_0402_5%R529 10K_0402_5%

1 2

R530 10K_0402_5%R530 10K_0402_5%

1 2

R532 10K_0402_5%R532 10K_0402_5%

1 2

R514 150_0402_1%R514 150_0402_1%

1 2

R511 150_0402_1%R511 150_0402_1%

1 2

R515 150_0402_1%R515 150_0402_1%

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-6931P

LA-6931P

LA-6931P

1

THM_ALERT#

1 2

R32 4.7K_0402_5%R32 4.7K_0402_5%

VGA_ON#

2

G

G

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1

+3VS_DELAY

VGA_ON# <46, 54,55>

+3VS_DELAY

23 58Wednesday, October 27, 2010

23 58Wednesday, October 27, 2010

23 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

U54C

U54C

DDR2

DDR2
GDDR3/GDDR5

GDDR3/GDDR5
DDR3

MDA[0..63]

C216

0.1U_0402_16V4Z

C216

0.1U_0402_16V4Z

MVREFDA

R343 240_0402_1%R343 240_0402_1%

1 2

R344 240_0402_1%R344 240_0402_1%

1 2

R361 240_0402_1%R361 240_0402_1%

1 2

R498 240_0402_1%R498 240_0402_1%

1 2

R499 240_0402_1%R499 240_0402_1%

1 2

R500 240_0402_1%R500 240_0402_1%

1 2

MVREFSA

1

C1467

C1467

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

5

MVREFSA

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8

MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

+1.5VSDGPU

R114

R114

R117

R117

R1485

R1485

40.2_0402_1%

40.2_0402_1%

R1487

R1487

100_0402_1%

100_0402_1%

MDA[0..63]<28>

12

12

+1.5VSDGPU

+1.5VSDGPU

12

12

MVREFDA

1

2

D D

C C

40.2_0402_1%

40.2_0402_1%

100_0402_1%

100_0402_1%

B B

A A

DDR3

C37

DQA0_0/DQA_0

C35

DQA0_1/DQA_1

A35

DQA0_2/DQA_2

E34

DQA0_3/DQA_3

G32

DQA0_4/DQA_4

D33

DQA0_5/DQA_5

F32

DQA0_6/DQA_6

E32

DQA0_7/DQA_7

D31

DQA0_8/DQA_8

F30

DQA0_9/DQA_9

C30

DQA0_10/DQA_10

A30

DQA0_11/DQA_11

F28

DQA0_12/DQA_12

C28

DQA0_13/DQA_13

A28

DQA0_14/DQA_14

E28

DQA0_15/DQA_15

D27

DQA0_16/DQA_16

F26

DQA0_17/DQA_17

C26

DQA0_18/DQA_18

A26

DQA0_19/DQA_19

F24

DQA0_20/DQA_20

C24

DQA0_21/DQA_21

A24

DQA0_22/DQA_22

E24

DQA0_23/DQA_23

C22

DQA0_24/DQA_24

A22

DQA0_25/DQA_25

F22

DQA0_26/DQA_26

D21

DQA0_27/DQA_27

A20

DQA0_28/DQA_28

F20

DQA0_29/DQA_29

D19

DQA0_30/DQA_30

E18

DQA0_31/DQA_31

C18

DQA1_0/DQA_32

A18

DQA1_1/DQA_33

F18

DQA1_2/DQA_34

D17

AG12

AH12

A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13

H11
G10

K10

N12

M12
M27

J13

G8

K9

G9

A8
C8
E8
A6
C6
E6
A5

L18
L20

L27

DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63

MVREFDA
MVREFSA

MEM_CALRN0
MEM_CALRN1
MEM_CALRN2

MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

WHESTLERM2

WHESTLERM2

DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_3/QSA_7B/WDQSA_7

DDR3/GDDR3 Memory Stuff Option

GDDR5

MVREF 1.5 V 1.8/1.5 V 1.5 V

Ra

Rb

40.2 R

100 R

4

DDR2

DDR2
GDDR5/GDDR3

GDDR5/GDDR3
DDR3

DDR3

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8

MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12

MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0

MAA1_7/MAA_A15_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

GDDR5/DDR2/GDDR3

MEMORY INTERFACE A

MEMORY INTERFACE A

EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7

ADBIA0/ODTA0
ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0
CKEA1

WEA0B
WEA1B

MAA0_8
MAA1_8

GDDR5

GDDR5

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

A32
C32
D23
E22
C14
A14
E10
D9

C34
D29
D25
E20
E16
E12
J10
D7

A34
E30
E26
C20
C16
C12
J11
F8

J21
G19

H27
G27

J14
H14

K23
K19

K20
K17

K24
K27

M13
K16

K21
J20

K26
L15

H23
J19

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12

A_BA2
A_BA0
A_BA1

DQMA#0

DQMA#1

DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0

QSA1

QSA2

QSA3

QSA4

QSA5

QSA6

QSA7

QSA#0

QSA#1

QSA#2

QSA#3

QSA#4

QSA#5

QSA#6

QSA#7

ODTA0
ODTA1

CLKA0
CLKA0#

CLKA1
CLKA1#

RASA0#
RASA1#

CASA0#
CASA1#

CSA0#_0

CSA1#_0

CKEA0
CKEA1

WEA0#
WEA1#

MAA13

GDDR3 DDR3

40.2 R

100 R

40.2 R

100 R

4

MAA0 <28>
MAA1 <28>
MAA2 <28>
MAA3 <28>
MAA4 <28>
MAA5 <28>
MAA6 <28>
MAA7 <28>
MAA8 <28>
MAA9 <28>
MAA10 <28>
MAA11 <28>
MAA12 <28>
A_BA2 <28>
A_BA0 <28>
A_BA1 <28>

DQMA#0 <28>
DQMA#1 <28>
DQMA#2 <28>
DQMA#3 <28>
DQMA#4 <28>
DQMA#5 <28>
DQMA#6 <28>
DQMA#7 <28>

QSA0 <28>
QSA1 <28>
QSA2 <28>
QSA3 <28>
QSA4 <28>
QSA5 <28>
QSA6 <28>
QSA7 <28>

QSA#0 < 28>
QSA#1 < 28>
QSA#2 < 28>
QSA#3 < 28>
QSA#4 < 28>
QSA#5 < 28>
QSA#6 < 28>
QSA#7 < 28>

ODTA0 <28>
ODTA1 <28>

CLKA0 <28>
CLKA0# <28>

CLKA1 <28>
CLKA1# <28>

RASA0# <28>
RASA1# <28>

CASA0# <28>
CASA1# <28>

CSA0#_0 <28>

CSA1#_0 <28>

CKEA0 <28>
CKEA1 <28>

WEA0# <28>
WEA1# <28>

3

C247

C247

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

1 2

C482

C482

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

51.1_0402_1%

51.1_0402_1%

@

@

MDB[0..63]

GRA@

GRA@

R377

R377

10K_0402_5%

10K_0402_5%

WHI@

WHI@

R83

R83

5.11K_0402_1%

5.11K_0402_1%

TEST_MCLK
TEST_YCLK

1

1

2

2

R327

R327

Compal Secret Data

Compal Secret Data

Compal Secret Data

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8

MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

MVREFDB

MVREFSB

TESTEN

C475

C475

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

R265

R265

51.1_0402_1%

51.1_0402_1%

@

@

Note:Route 50 Ohm
Single-end / 100 Ohm
differential trace and
keep short

Deciphered Date

Deciphered Date

Deciphered Date

MDB[0..63]<29>

+1.5VSDGPU

12

R129

R129

40.2_0402_1%

40.2_0402_1%

R118

R118

100_0402_1%

100_0402_1%

+1.5VSDGPU

12

R130

R130

40.2_0402_1%

40.2_0402_1%

12

R122

R122

100_0402_1%

100_0402_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MVREFDB

12

1

2

+3VS_DELAY

MVREFSB

C233

0.1U_0402_16V4Z

C233

0.1U_0402_16V4Z

1

2

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

AM8
AM7

AM6
AM1

AA12

AD28

AK10

AL10

AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6

AK3
AF8
AF9
AG8
AG7
AK9

AK1

AN4
AP3
AP1
AP5

C5
C3
E3
E1
F1
F3
F5

G4

H5
H6

J4
K6
K5
L4

M6
M1
M3
M5

N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5

AA4
AB6
AB1
AB3

AJ4

AL7

AL4

Y12

2

U54D

U54D

DDR2

DDR2
GDDR3/GDDR5

GDDR3/GDDR5
DDR3

DDR3

DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63

MVREFDB
MVREFSB

TESTEN

CLKTESTA
CLKTESTB

WHESTLERM2

WHESTLERM2

2

DDR2

DDR2
GDDR5/GDDR3

GDDR5/GDDR3
DDR3

DDR3

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8

MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12

MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

GDDR5/DDR2/GDDR3

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0

MEMORY INTERFACE B

MEMORY INTERFACE B

EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_3/QSB_7B/WDQSB_7

ADBIB0/ODTB0
ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B
RASB1B

CASB0B
CASB1B

CSB0B_0
CSB0B_1

CSB1B_0
CSB1B_1

CKEB0
CKEB1

WEB0B
WEB1B

MAB0_8
MAB1_8

GDDR5

GDDR5

DRAM_RST

MAB0

P8

MAB1

T9

MAB2

P9

MAB3

N7

MAB4

N8

MAB5

N9

MAB6

U9

MAB7

U8

MAB8

Y9

MAB9

W9

MAB10

AC8

MAB11

AC9

MAB12

AA7

B_BA2

AA8

B_BA0

Y8

B_BA1

AA9

DQMB#0

H3

DQMB#1

H1

DQMB#2

T3

DQMB#3

T5

DQMB#4

AE4

DQMB#5

AF5

DQMB#6

AK6

DQMB#7

AK5

QSB0

F6

QSB1

K3

QSB2

P3

QSB3

V5

QSB4

AB5

QSB5

AH1

QSB6

AJ9

QSB7

AM5

QSB#0

G7

QSB#1

K1

QSB#2

P1

QSB#3

W4

QSB#4

AC4

QSB#5

AH3

QSB#6

AJ8

QSB#7

AM3

ODTB0

T7

ODTB1

W7

CLKB0

L9

CLKB0#

L8

CLKB1

AD8

CLKB1#

AD7

RASB0#

T10

RASB1#

Y10

CASB0#

W10

CASB1#

AA10

CSB0#_0

P10
L10

CSB1#_0

AD10
AC10

CKEB0

U10

CKEB1

AA11

WEB0#

N10

WEB1#

AB11

T8
W8

AH11

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LA-6931P

LA-6931P

LA-6931P

1

MAB0 <29>
MAB1 <29>
MAB2 <29>
MAB3 <29>
MAB4 <29>
MAB5 <29>
MAB6 <29>
MAB7 <29>
MAB8 <29>
MAB9 <29>
MAB10 <29>
MAB11 <29>
MAB12 <29>
B_BA2 <29>
B_BA0 <29>
B_BA1 <29>

DQMB#0 <29>
DQMB#1 <29>
DQMB#2 <29>
DQMB#3 <29>
DQMB#4 <29>
DQMB#5 <29>
DQMB#6 <29>
DQMB#7 <29>

QSB0 <29>
QSB1 <29>
QSB2 <29>
QSB3 <29>
QSB4 <29>
QSB5 <29>
QSB6 <29>
QSB7 <29>

QSB#0 <29>
QSB#1 <29>
QSB#2 <29>
QSB#3 <29>
QSB#4 <29>
QSB#5 <29>
QSB#6 <29>
QSB#7 <29>

ODTB0 <29>
ODTB1 <29>

CLKB0 <29>
CLKB0# <29>

CLKB1 <29>
CLKB1# <29>

RASB0# <29 >
RASB1# <29 >

CASB0# <29 >
CASB1# <29 >

CSB0#_0 <29>

CSB1#_0 <29>

CKEB0 <29>
CKEB1 <29>

WEB0# <29>
WEB1# <29>

MAB13 <29>MAA13 <28>

R126

R512

R512

1 2

10_0402_5%

10_0402_5%

R127

R127

5.1K_0402_1%

5.1K_0402_1%

Mannhatton_ Memory

Mannhatton_ Memory

Mannhatton_ Memory

1 2

51_0402_5%

51_0402_5%

1

C241

C241
120P_0402_50V8

120P_0402_50V8

2

1

R126

VRAM_RST# <28,29>

5.1k Ohm

R127

R512

10 Ohm

51 Ohm

R126

C1465 120 pF

24 58Wednesday, October 27, 2010

24 58Wednesday, October 27, 2010

24 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

For DDR3 , MVDDQ=1.5V

+1.5VSDGPU

D D

C C

L29

L29

+1.8VSDGPU

BLM18AG121SN1D_0603

B B

A A

BLM18AG121SN1D_0603

Note:
+MPV_18=150mA

+1.8VSDGPU

12

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

12

L68

L68

10U_0603_6.3V6M

10U_0603_6.3V6M

1 2

1 2

1

2

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C714

C714

C580100P_0402_50V8J @C580100P_0402_50V8J @

C582100P_0402_50V8J @C582100P_0402_50V8J @

C293

C293

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

GCORE_SEN

FB_GND

1

+

+

C581

C581

330U_D2_2V_Y

330U_D2_2V_Y

2

+1.8VSDGPU

+3VS_DELAY

+1.8VSDGPU

C291

C291

C290

0.1U_0402_16V4Z

C290

0.1U_0402_16V4Z

C289

1U_0402_6.3V4Z

C289

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C712

C712

1

2

+1.0VSDGPU

1

2

C709

C709

1

2

C258

1U_0402_6.3V4Z

C258

1U_0402_6.3V4Z

C270

1U_0402_6.3V4Z

C270

1U_0402_6.3V4Z

1

1

1

2

2

2

C261

1U_0402_6.3V4Z

C261

1U_0402_6.3V4Z

C155

1U_0402_6.3V4Z

C155

1U_0402_6.3V4Z

1

2

C746

10U_0805_6.3V6M

C746

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

1

2

2

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

C292

0.1U_0402_16V4Z

C292

0.1U_0402_16V4Z

Note:GCORE_SEN and FB_GND should route as
differential pair
Same as VDDCI_SEN and FB_GND

1

1

2

2

C738

10U_0805_6.3V6M

C738

10U_0805_6.3V6M

C742

C742

1

1

2

2

12

L51

L51

12

L21

L21

L28

L28

10U_0603_6.3V6M

10U_0603_6.3V6M

L66

L66

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

4

U54E

C268

1U_0402_6.3V4Z

C268

1U_0402_6.3V4Z

C250

1U_0402_6.3V4Z

C250

1U_0402_6.3V4Z

1

2

C231

1U_0402_6.3V4Z

C231

1U_0402_6.3V4Z

C238

1U_0402_6.3V4Z

C238

1U_0402_6.3V4Z

1

2

C743

10U_0805_6.3V6M

C743

10U_0805_6.3V6M

C736

10U_0805_6.3V6M

C736

10U_0805_6.3V6M

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

12

1

C226

C226

C240

C240

2

12

C262

1U_0402_6.3V4Z

C262

1U_0402_6.3V4Z

C266

1U_0402_6.3V4Z

C266

1U_0402_6.3V4Z

1

1

2

2

C269

1U_0402_6.3V4Z

C269

1U_0402_6.3V4Z

C169

1U_0402_6.3V4Z

C169

1U_0402_6.3V4Z

1

1

2

2

C215

1U_0402_6.3V4Z

C215

1U_0402_6.3V4Z

C195

1U_0402_6.3V4Z

C195

1U_0402_6.3V4Z

1

1

2

2

C166

1U_0402_6.3V4Z

C166

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

2

1

2

1

2

1

2

C181

1U_0402_6.3V4Z

C181

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C260

10U_0603_6.3V6M

C260

10U_0603_6.3V6M

GCORE_SEN<55>

VDDCI_SEN<54>

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

C236

C236

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

C635

C635

C191

C191

C249

1U_0402_6.3V4Z

C249

1U_0402_6.3V4Z

C267

1U_0402_6.3V4Z

C267

1U_0402_6.3V4Z

1

1

2

2

C248

1U_0402_6.3V4Z

C248

1U_0402_6.3V4Z

1

1

2

2

C245

1U_0402_6.3V4Z

C245

1U_0402_6.3V4Z

1

1

2

2

C160

C160

C182

C182

C243

1U_0402_6.3V4Z

C243

1U_0402_6.3V4Z

C244

1U_0402_6.3V4Z

C244

1U_0402_6.3V4Z

+VDD_CT

+VDDR3

+VDDR4_5

2900mA

17mA

60mA

170mA

170mA

150mA

+MPV_18

+SPV_18

+SPV10

C251

0.1U_0402_16V4Z

C251

0.1U_0402_16V4Z

C265

C265

1

2

75mA

120mA

GCORE_SEN

VDDCI_SEN

FB_GND

AC7

AD11

AF7

AG10

AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10

K11
K13

M11
N11

R11
U11

AF26

AF27
AG26
AG27

AF23

AF24
AG23
AG24

AF13

AF15
AG13
AG15

AD12

AF11

AF12
AG11

M20
M21

V12
U12

AM10

AN9

AN10

AF28

AG28

AH29

AJ7

J7
J9

K8
L12
L16
L21
L23
L26

L7

P7

U7
Y11

Y7

H7

H8

U54E

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34

LEVEL

LEVEL
TRANSLATION

TRANSLATION

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6

NC_VDDRHA
NC_VSSRHA

NC_VDDRHB
NC_VSSRHB

MPV18#1
MPV18#2

SPV18

SPV10

SPVSS

VOLTAGE

VOLTAGE
SENESE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

WHESTLERM2

WHESTLERM2

MEM I/O

MEM I/O

I/O

I/O

PLL

PLL

3

PCIE_VDDR/PCIE_PVDD

PCIE

PCIE

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

VDDC#1

CORE

CORE

VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8

VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15

POWER

POWER

VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32

VDDC/BIF_VDDC#33

VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41

VDDC/BIF_VDDC#42

VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8

VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15

ISOLATED

ISOLATED

VDDCI#16

CORE I/O

CORE I/O

VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22

400mA

+PCIE_VDDR

AA31
AA32
AA33
AA34
V28
W29
W30
Y31

+PCIE_PVDD

AB37

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

29500mA

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

+VDDCI

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

+VGA_CORE

+VGA_CORE

+VDDCI

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

2

C142

0.1U_0402_16V4Z

C142

0.1U_0402_16V4Z

C144

0.1U_0402_16V4Z

C144

0.1U_0402_16V4Z

C131

1U_0402_6.3V4Z

C131

1

2

C158

1U_0402_6.3V4Z

C158

1U_0402_6.3V4Z

1

2

C188

1U_0402_6.3V6K

C188

1U_0402_6.3V6K

1

2

C162

1U_0402_6.3V6K

C162

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C257

C257

1

2

C175

C175

1

2

C678

C678

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1

2

1

2

1

2

C199

1U_0402_6.3V6K

C199

1U_0402_6.3V6K

C674

10U_0805_6.3V6M

C674

10U_0805_6.3V6M

1

2

1

1

2

2

C151

C151

C152

1U_0402_6.3V4Z

C152

1U_0402_6.3V4Z

1

1

2

2

+PCIE_VDDR +PCIE_PVDD

C223

1U_0402_6.3V6K

C223

1U_0402_6.3V6K

C165

1U_0402_6.3V6K

C165

1U_0402_6.3V6K

1

2

C200

1U_0402_6.3V6K

C200

1U_0402_6.3V6K

C218

1U_0402_6.3V6K

C218

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C271

C271

C275

C275

1

2

Fo

r non-BACO designs, connect BIF_VDDC to VDDC.

For BACO designs - see BACO reference schematics (ref138)

C193

1U_0402_6.3V6K

C193

1U_0402_6.3V6K

C224

1U_0402_6.3V6K

C224

1U_0402_6.3V6K

1

1

2

2

C279

10U_0805_6.3V6M

C279

10U_0805_6.3V6M

1

2

C129

1U_0402_6.3V4Z

C129

1U_0402_6.3V4Z

C126

1U_0402_6.3V4Z

C126

1U_0402_6.3V4Z

1

2

C153

1U_0402_6.3V4Z

C153

1U_0402_6.3V4Z

C143

1U_0402_6.3V4Z

C143

1U_0402_6.3V4Z

1

2

R1563 0_0402_5%WHI@R1563 0_0402_5%W HI@

C222

1U_0402_6.3V6K

C222

1U_0402_6.3V6K

1

2

C192

1U_0402_6.3V6K

C192

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C125

C125

1

2

+BIF_VDDC

C203

1U_0402_6.3V6K

C203

1U_0402_6.3V6K

1

1

2

2

@

1

2

1

2

1

2

1

2

1

2

C161

1U_0402_6.3V6K

C161

1U_0402_6.3V6K

@

C130

1U_0402_6.3V4Z@C130

1U_0402_6.3V4Z

1

2

C154

1U_0402_6.3V4Z

C154

1U_0402_6.3V4Z

1

2

12

C217

1U_0402_6.3V6K

C217

1U_0402_6.3V6K

C178

1U_0402_6.3V6K

C178

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

C132

C132

C177

1U_0402_6.3V6K

C177

1U_0402_6.3V6K

1

2

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

C145

1U_0402_6.3V4Z@C145

1U_0402_6.3V4Z

C632

10U_0805_6.3V6M

C632

10U_0805_6.3V6M

1

2

C139

1U_0402_6.3V4Z

C139

1U_0402_6.3V4Z

C114

10U_0805_6.3V6M

C114

10U_0805_6.3V6M

1

2

40mA

C219

1U_0402_6.3V6K

C219

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C164

1U_0402_6.3V6K

C164

1U_0402_6.3V6K

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C239

C239

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C202

1U_0402_6.3V6K

C202

1U_0402_6.3V6K

1

1

2

2

L50

L50

12

PCIE_VDDC

+1.0VSDGPU

C201

C201

1

2

C170

C170

1

2

C146

C146

1U_0402_6.3V6K

1U_0402_6.3V6K

C190

C190

1

2

+1.8VSDGPU

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C77

C77

C189

1U_0402_6.3V6K

C189

1U_0402_6.3V6K

C183

1U_0402_6.3V6K

C183

1U_0402_6.3V6K

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

+

+

2

C179

C179

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C95

C95

GRA@

GRA@

2

C180

1U_0402_6.3V6K

C180

1U_0402_6.3V6K

1

2

C194

1U_0402_6.3V6K

C194

1U_0402_6.3V6K

1

2

C577

C577

9/23

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

1

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C70

C70

GRA@

GRA@

GRA@

GRA@

2

2

C163

1U_0402_6.3V6K

C163

1U_0402_6.3V6K

1

2

C210

1U_0402_6.3V6K

C210

1U_0402_6.3V6K

1

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

C578

C578

+

+

2

WHI@

WHI@

JP9

JP9

L11

L11

1 2

GRA@

GRA@

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

C602

C602

+

+

2

+1.8VSDGPU

+VGA_CORE

+VGA_CORE

4A

12/7 Add C580/C582=@100pF(Avoid noise)

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Mannhatton_Power/GND

Mannhatton_Power/GND

Mannhatton_Power/GND

LA-6931P

LA-6931P

LA-6931P

1

25 58Wednesday, October 27, 2010

25 58Wednesday, October 27, 2010

25 58Wednesday, October 27, 2010

1.0

1.0

1.0

U54F

www.bufanxiu.com

U54F

5

4

3

2

1

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

PCIE_VSS#10

J34

M34
M39
N31
N34

R34

U31
U34

W31
W34

M17
M22
M24
N16
N18

N21
N23
N26

R15
R17

R20
R22
R24
R27

U15
U17

U20
U22
U24
U27

U13

K31
K34
K39
L31
L34

P31
P34
P39

T31
T34
T39

V34
V39

Y34
Y39

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33

F7

F9
G2
G6

H9

J2
J27

J6

J8

K14

K7
L11
L17

L2
L22
L24

L6

N2

N6

R2

R6
T11
T13
T16
T18
T21
T23
T26

U2

U6
V11
V16
V18
V21
V23
V26

W2

W6
Y15
Y17
Y20
Y22
Y24
Y27

V13

PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35

GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
NC#1
NC#2

WHESTLERM2

WHESTLERM2

GND

GND

5

GND/PX_EN#61

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

D D

C C

B B

A A

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60

GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

A39
AW1
AW39

For PX_EN,
refer to the
BACO
reference
schematics
for detail

+1.8VSDGPU

PX_EN <27,46>

+1.0VSDGPU

L14

L14

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

4

+1.8VSDGPU

+1.0VSDGPU

+1.8VSDGPU

+1.0VSDGPU

12

C94

10U_0603_6.3V6M

C94

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

L13

L13

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

12

0_0603_5%

0_0603_5%

R831

R831

R591 0_0603_5%R591 0_0603_5%

R832

R832

0_0603_5%

0_0603_5%

R573 0_0603_5%R573 0_0603_5%

+DPE_VDD18

C141

1U_0402_6.3V4Z

C141

1U_0402_6.3V4Z

C140

C140

1

2

1U_0402_6.3V4Z

C128

0.1U_0402_16V4Z

C128

0.1U_0402_16V4Z

1

2

+DPE_VDD18

+DPE_VDD10

1U_0402_6.3V4Z

1

2

+DPE_VDD18

+DPE_VDD10

C76

10U_0603_6.3V6M

C76

10U_0603_6.3V6M

1

2

U54H

U54H

DP C/D POWER

+DPC_VDD18

+DPC_VDD10

+DPD_VDD18

+DPD_VDD10

R558

R558

150_0402_1%

150_0402_1%

12

+DPE_VDD18

+DPE_VDD10

C98

C98

R516

R516

150_0402_1%

150_0402_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AP20
AP21

AP13
AT13

AN17
AP16

AP17
AW14
AW16

AP22

AP23

AP14

AP15

AN19

AP18

AP19
AW20
AW22

AW18

AH34

AJ34

AL33

AM33

AN34

AP39

AR39

AU37

AF34

AG34

AK33

AK34

AF39

AH39

AK39

AL34

AM34

12

AM39

3

DP C/D POWER

DPCD/DPC_VDD18#1
DPCD/DPC_VDD18#2

DPCD/DPC_VDD10#1
DPCD/DPC_VDD10#2

DP/DPC_VSSR#1
DP/DPC_VSSR#2
DP/DPC_VSSR#3
DP/DPC_VSSR#4
DP/DPC_VSSR#5

DPCD/DPD_VDD18#1
DPCD/DPD_VDD18#2

DPCD/DPD_VDD10#1
DPCD/DPD_VDD10#2

DP/DPD_VSSR#1
DP/DPD_VSSR#2
DP/DPD_VSSR#3
DP/DPD_VSSR#4
DP/DPD_VSSR#5

DPCD_CALR

DP E/F POWER

DP E/F POWER

DPEF/DPE_VDD18#1
DPEF/DPE_VDD18#2

DPEF/DPE_VDD10#1
DPEF/DPE_VDD10#2

DP/DPE_VSSR#1
DP/DPE_VSSR#2
DP/DPE_VSSR#3
DP/DPE_VSSR#4

DPEF/DPF_VDD18#1
DPEF/DPF_VDD18#2

DPEF/DPF_VDD10#1
DPEF/DPF_VDD10#2

DP/DPF_VSSR#1
DP/DPF_VSSR#2
DP/DPF_VSSR#3
DP/DPF_VSSR#4
DP/DPF_VSSR#5

DPEF_CALR

WHESTLERM2

WHESTLERM2

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

DP A/B POWER

DP A/B POWER

DPAB/DPA_VDD18#1
DPAB/DPA_VDD18#2

DPAB/DPA_VDD10#1
DPAB/DPA_VDD10#2

DP/DPA_VSSR#1
DP/DPA_VSSR#2
DP/DPA_VSSR#3
DP/DPA_VSSR#4
DP/DPA_VSSR#5

DPAB/DPB_VDD18#1
DPAB/DPB_VDD18#2

DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2

DP/DPB_VSSR#1
DP/DPB_VSSR#2
DP/DPB_VSSR#3
DP/DPB_VSSR#4
DP/DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DP PLL POWER

DPAB_VDD18/DPA_PVDD

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPB_PVDD

DP_VSSR/DPB_PVSS

DPCD_VDD18/DPC_PVDD

DP_VSSR/DPC_PVSS

DPCD_VDD18/DPD_PVDD

DP_VSSR/DPD_PVSS

DPEF_VDD18/DPE_PVDD

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPF_PVDD

DP_VSSR/DPF_PVSS

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

AN24
AP24

AP31
AP32

AN27
AP27
AP28
AW24
AW26

AP25
AP26

AN33
AP33

AN29
AP29
AP30
AW30
AW32

AW28

AU28
AV27

AV29
AR28

AU18
AV17

AV19
AR18

AM37
AN38

AL38
AM35

+DPA_VDD18

+DPA_VDD10

+DPB_VDD18

+DPB_VDD10

R533

R533
150_0402_1%

150_0402_1%

1 2

+DPA_PVDD

+DPB_PVDD+DPE_VDD10

+DPC_PVDD

+DPD_PVDD

+DPE_PVDD

+DPF_PVDD

2

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C147

C147

1

2

C133

1U_0402_6.3V4Z

C133

1U_0402_6.3V4Z

1

2

R834

R834

0_0603_5%

0_0603_5%

R835

R835

0_0603_5%

0_0603_5%

R836

R836

0_0603_5%

0_0603_5%

R837

R837

0_0603_5%

0_0603_5%

R838

R838

0_0603_5%

0_0603_5%

C647

10U_0603_6.3V6M

C647

10U_0603_6.3V6M

C644

0.1U_0402_16V4Z

C644

0.1U_0402_16V4Z

1

2

L18

L18

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

C135

10U_0603_6.3V6M

C135

10U_0603_6.3V6M

1

2

+1.8VSDGPU

+1.0VSDGPU

L55

L55

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

C185

1U_0402_6.3V4Z

C185

1U_0402_6.3V4Z

1

2

12

1

2

+1.8VSDGPU

+1.8VSDGPU

+1.8VSDGPU

C645

0.1U_0402_16V4Z

C645

0.1U_0402_16V4Z

1

1

2

2

C648

0.1U_0402_16V4Z

C648

0.1U_0402_16V4Z

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

+1.8VSDGPU

+1.0VSDGPU

L58

L58
BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

12

C665

10U_0603_6.3V6M

C665

C663

0.1U_0402_16V4Z

C663

0.1U_0402_16V4Z

C642

1U_0402_6.3V4Z

C642

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

LA-6931P

LA-6931P

LA-6931P

10U_0603_6.3V6M

C664

1U_0402_6.3V4Z

C664

1U_0402_6.3V4Z

1

1

2

2

L54

L54

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

12

C638

10U_0603_6.3V6M

C638

10U_0603_6.3V6M

1

2

L52

L52

BLM18AG121SN1D_0603

BLM18AG121SN1D_0603

12

C639

10U_0603_6.3V6M

C639

10U_0603_6.3V6M

C643

C643

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Mannhatton_Power/GND

Mannhatton_Power/GND

Mannhatton_Power/GND

1

26 58Wednesday, October 27, 2010

26 58Wednesday, October 27, 2010

26 58Wednesday, October 27, 2010

+1.8VSDGPU

+1.8VSDGPU

+1.8VSDGPU

1.0

1.0

1.0

5

www.bufanxiu.com

+3VS_DELAY

12

SG@

SG@

R1560

R1560
10K_0402_5%

SG@

SG@

2

G

G

S

S

SG@

SG@

1

Q17

Q17

G

G

Q19A

Q19A

2

10K_0402_5%

13

D

D

SG@

SG@

2N7002_SOT23-3

2N7002_SOT23-3

S

S

65

D

D

13

Q16

Q16

SG@

SG@

Q19B

Q19B
BSL214N_PG-TSOP6

BSL214N_PG-TSOP6

4 2

SG@

SG@

Q18

Q18
BSR202N_PG-SC59-3

BSR202N_PG-SC59-3

D

D

1 3

2

D D

PX_EN<26,46>

PX_EN =0, for Normal Operation
PX_EN =1, for BACO MODE

C C

PX_EN needs to be
isolated during a scan
dump.

R1559

R1559

SG@

SG@

1 2

0_0402_5%

0_0402_5%

+1.0VSDGPU

BSL214N_PG-TSOP6

BSL214N_PG-TSOP6

+1.0VSDGPU_ON

+VGA_CORE

BSR202N_PG-SC59-3

BSR202N_PG-SC59-3

GPU_CORE_ON

4

SYS_PWR OK<15>

For the MOSFETs on the path of de livering PCIE_VDDC
(1.0V_REG) to BIF_VDDC (Q19) R_ds on of
140 mOhms or less is required.

3

55mA@1.0V, in BACO mode)

S

S

G

G

For the MOSFETs on the path of de livering VDDC to
BIF_VDDC (Q17 and Q18), R_dson of 21 mOhms or
less is required.

PX_MODE =1, for Normal Operation
PX_MODE =0, for BACO MODE

+3VS_DELAY

SG@

SG@

1 2

C912 0.1U_0402_16V6K

C912 0.1U_0402_16V6K

5

1

IN1

VCC

2

IN2

GND

3

+BIF_VDDC

1

SG@

SG@

2

PX_MODE

4

OUT

U64

SG@U64

SG@

MC74VHC1G08DFT2G_S C70-5

MC74VHC1G08DFT2G_S C70-5

+VGA_CORE

DIS@

DIS@

R1558

R1558

1 2

0_0402_5%

0_0402_5%

22U_0805_6.3V6M

22U_0805_6.3V6M

C913

C913

connect to +GPU_CORE without BACO

3

+3VS_DELAY

C911 0.1U_0402_16V 6K

C911 0.1U_0402_16V 6K

5

VGA_PW ROK<18,22,55>

PX_MODE

1

VCC

IN1

2

IN2

GND

3

MC74VHC1G08DFT2G_S C70-5

MC74VHC1G08DFT2G_S C70-5

OUT

U65

SG@

SG@

1 2

4

SG@U 65

SG@

2

+5VS +5VS

12

SG@

SG@

R1562

R1562

1K_0402_5%

1K_0402_5%

61

2

DMN66D0LDW -7 2N_SOT363-6

DMN66D0LDW -7 2N_SOT363-6

SG@

SG@

Q21A

Q21A

12

SG@

SG@

R1561

R1561

1K_0402_5%

1K_0402_5%

34

SG@

SG@

Q21B

Q21B

5

DMN66D0LDW -7 2N_SOT363-6

DMN66D0LDW -7 2N_SOT363-6

1

GPU_CORE_ON

+1.0VSDGPU_ON

Voltage In BACO mode

VDDR1

VDDC/VDDCI

1.5V

0.85-1.15V

OFF

OFF

ONothers

+VDDC REG

PX_MODE

EN

+MVDDQ REG

EN

B B

system power good

+3VS_Delay
+1.1VS
+1.8V

power on sequence:
(1) +3VS_Delay ----> +VDDC ----> +1.8VS

( > 0ms ) ( reac h 90% )

(2) +3VS_Delay ----> +1.8VS ----> +VDDC

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2009/11/12 2010/11/12

2009/11/12 2010/11/12

2009/11/12 2010/11/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

( > 0ms ) ( reac h 90% )

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

BACO

BACO

BACO

LA-6931P

LA-6931P

LA-6931P

1

27 58Wednesday, Oct ober 27, 2010

27 58Wednesday, Oct ober 27, 2010

27 58Wednesday, Oct ober 27, 2010

1.0

1.0

1.0

of

5

www.bufanxiu.com

VRAM_RST#<24,29>

MDA[0..63]

A_BA0<24>
A_BA1<24>
A_BA2<24>

CKEA0<24>

CSA0#_0<24>
RASA0#<24>
CASA0#<24>
WEA0#<24>

QSA2<24>
QSA0<24>

DQMA#2<24>
DQMA#0<24>

QSA#2<24>
QSA#0<24>

MAA0<24>
MAA1<24>
MAA2<24>
MAA3<24>
MAA4<24>
MAA5<24>
MAA6<24>
MAA7<24>
MAA8<24>
MAA9<24>
MAA10<24>
MAA11<24>
MAA12<24>
MAA13<24>

240_0402_1%

240_0402_1%

MDA[0..63]<24>

D D

C C

R59

R59

VREFCA_A1
VREFDA_Q1

A_BA0
A_BA1
A_BA2

CLKA0#
CKEA0

ODTA0_1
CSA0#_0
RASA0#
CASA0#
WEA0#

QSA2
QSA0

DQMA#2
DQMA#0

QSA#2
QSA#0

VRAM_RST#

12

8/25 Follow REF137_06 8/25 Follow

+1.5VSDGPU

ODTA0_1

R522

R521

B B

ODTA0<24>

ODTA1<24>

ODTA0

ODTA1

R521

1 2

0_0402_5%

0_0402_5%

R159

R159

1 2

0_0402_5%

0_0402_5%

R522
56_0402_1%

56_0402_1%

1 2

R160

R160
56_0402_1%

56_0402_1%

1 2

ODTA1_1

U20

U20

M8

VREFCA

H1

VREFDQ

MAA0

N3

A0

MAA1

P7

A1

MAA2

P3

A2

N2

A3

MAA4

P8

A4

MAA5

P2

A5

MAA6

R8

A6

MAA7

R2

A7

MAA8

T8

A8

MAA9 MAA9

R3

MAA10
MAA11
MAA12
MAA13 MAA13 MAA13 MAA13

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

+1.5VSDGPU +1.5VSDGPU +1.5VSDGPU+1.5VSDGPU +1.5VSDGPU+1.5VSDGPU

R60

R60

R49

R49

4

R549

R549

R102

R102

4.99K_0402_1%

4.99K_0402_1%

R103

R103

4.99K_0402_1%

4.99K_0402_1%

VREFCA_A2
VREFDA_Q2

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA0
CLKA0#
CKEA0

ODTA0_1
CSA0#_0
RASA0#
CASA0#
WEA0#

QSA3
QSA1

DQMA#3
DQMA#1

QSA#3
QSA#1

VRAM_RST#

12

MDA22

E3

MDA19

F7

MDA21

F2

MDA18

F8

MDA23

H3

MDA16

H8

MDA20

G2

MDA17

H7

MDA0

D7

MDA5

C3

MDA1

C8

MDA7

C2

MDA3

A7

MDA4

A2

MDA2

B8

MDA6

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

QSA3<24>
QSA1<24>

DQMA#3<24>
DQMA#1<24>

QSA#3<24>
QSA#1<24>

240_0402_1%

240_0402_1%

REF137_06

12

VREFCA_A1 VREFDA_Q1 VREFDA_Q3VRE FCA_A3VREFDA_Q2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

12

C112

C112

2

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

12

1

12

C208

C208

2

U52

U52

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

R547

R547

R555

R555

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

12

12

MDA25
MDA30
MDA24
MDA29
MDA26
MDA31
MDA27
MDA28

MDA15
MDA11
MDA14
MDA10
MDA13

MDA9

MDA12

MDA8

+1.5VSDGPU

VREFCA_A2

C676

C676

+1.5VSDGPU

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

3

DQMA#4<24>
DQMA#5<24>

240_0402_1%

240_0402_1%

8/25 Follow
REF137_06

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

2

MDA35
MDA32
MDA38
MDA34
MDA37
MDA36
MDA39
MDA33

MDA43
MDA44
MDA40
MDA45
MDA42
MDA46
MDA41
MDA47

+1.5VSDGPU

+1.5VSDGPU

QSA6<24>
QSA7<24>

DQMA#6<24>
DQMA#7<24>

QSA#6<24>
QSA#7<24>

240_0402_1%

240_0402_1%

8/25 Follow
REF137_06

R157

R157

4.99K_0402_1%

4.99K_0402_1%

R158

R158

4.99K_0402_1%

4.99K_0402_1%

R632

R632

12

12

VREFCA_A4
VREFDA_Q4

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA1
CLKA1#
CKEA1

ODTA1_1
CSA1#_0
RASA1#
CASA1#
WEA1#

QSA6
QSA7

DQMA#6
DQMA#7

QSA#6
QSA#7

VRAM_RST#

12

1

C284

C284

2

U58

U58

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

R631

R631

4.99K_0402_1%

4.99K_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R633

R633

4.99K_0402_1%

4.99K_0402_1%

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

12

VREFCA_A4 VREFDA_Q4

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

12

C737

C737

2

U21

VREFCA_A3
VREFDA_Q3

MAA0
MAA1
MAA2
MAA3MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA1CLKA0
CLKA1#

CKEA1<24>

ODTA1_1

CSA1#_0<24>
RASA1#<24>
CASA1#<24>
WEA1#<24>

R107

R107

R518

R518

R523

R523

QSA4
QSA5

DQMA#4
DQMA#5

QSA#4
QSA#5

VRAM_RST#

12

12

12

C656

C656

QSA4<24>
QSA5<24>

QSA#4<24>
QSA#5<24>

U21

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

4.99K_0402_1%

4.99K_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

4.99K_0402_1%

4.99K_0402_1%

2

R108

R108

R105

R105

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

12

12

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C198

C198

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA48
MDA51
MDA55
MDA54
MDA50
MDA52
MDA49

MDA53

MDA63
MDA58
MDA60
MDA59
MDA61
MDA56
MDA62
MDA57

+1.5VSDGPU

+1.5VSDGPU

R548

R548

4.99K_0402_1%

4.99K_0402_1%

R556

R556

4.99K_0402_1%

4.99K_0402_1%

1

+1.5VSDGPU+1.5VSDGPU

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

12

C677

C677

2

CLKA0<24>

CLKA0#<24>

CLKA1<24>

CLKA1#<24>

A A

CLKA0

CLKA0#

CLKA1

CLKA1#

CLKA0_R

1 2

R73 56_0402_1%R 73 56_0402_1%

1 2

R64 56_0402_1%R 64 56_0402_1%

CLKA1_R

1 2

R629 56_0402_1%R629 56_0402_1%

1 2

R627 56_0402_1%R627 56_0402_1%

5

+1.5VSDGPU

0.01U_0402_16V7K

0.01U_0402_16V7K

C121

C121

1

2

0.01U_0402_16V7K

0.01U_0402_16V7K

C739

C739

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+1.5VSDGPU

1

2

C117

C117

C329

10U_0603_6.3V6M

C329

10U_0603_6.3V6M

C119

1U_0402_6.3V6K

C119

1U_0402_6.3V6K

C122

1U_0402_6.3V6K

C122

C118

1U_0402_6.3V6K

C118

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

C116

1U_0402_6.3V6K

C116

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C315

C315

1

2

1U_0402_6.3V6K

1

1

2

2

VRAM P/N :
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA)
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V)

C301

10U_0603_6.3V6M

C301

10U_0603_6.3V6M

C309

C309

1

2

+1.5VSDGPU

4

1U_0402_6.3V6K

1U_0402_6.3V6K

C653

1U_0402_6.3V6K

C653

1U_0402_6.3V6K

1

1

2

2

1

+

+

C340

C340

220U_D2_4VY_R15M

220U_D2_4VY_R15M

2

@

@

C652

C652

C654

1U_0402_6.3V6K

C654

1U_0402_6.3V6K

C655

1U_0402_6.3V6K

C655

1U_0402_6.3V6K

1

1

2

2

+1.5VSDGPU

C282

1U_0402_6.3V6K

C282

1U_0402_6.3V6K

C283

1U_0402_6.3V6K

C283

1

2

Issued Date

Issued Date

Issued Date

1U_0402_6.3V6K

1

2

3

C115

1U_0402_6.3V6K

C115

C675

1U_0402_6.3V6K

C675

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1U_0402_6.3V6K

1U_0402_6.3V6K

C213

1U_0402_6.3V6K

C213

1U_0402_6.3V6K

1

1

2

2

+1.5VSDGPU+1.5VSDGPU

C281

C281

+1.5VSDGPU

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

C732

1U_0402_6.3V6K

C732

1U_0402_6.3V6K

C731

1U_0402_6.3V6K

C731

1U_0402_6.3V6K

1

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

C302

C302

1

2

1

2

C310

10U_0603_6.3V6M

C310

10U_0603_6.3V6M

1

2

Deciphered Date

Deciphered Date

Deciphered Date

C733

1U_0402_6.3V6K

C733

1U_0402_6.3V6K

C316

10U_0603_6.3V6M

C316

10U_0603_6.3V6M

C735

1U_0402_6.3V6K

C735

1U_0402_6.3V6K

C734

1U_0402_6.3V6K

C734

1U_0402_6.3V6K

1

1

2

2

C326

10U_0603_6.3V6M

C326

10U_0603_6.3V6M

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

e Document Number Rev

Size Document Number Rev

Size Document Number Rev

Siz

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

VRAM_DDR3 / Channel A

VRAM_DDR3 / Channel A

VRAM_DDR3 / Channel A

LA-6931P

LA-6931P

LA-6931P

1

28 58Wednesday, October 27, 2010

28 58Wednesday, October 27, 2010

28 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

U62

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

+1.5VSDGPU

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

U62

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

+1.5VSDGPU +1.5VSDGPU

12

R707

R707

12

R706

R706

C781

C781

VRAM_RST#<24,28>

MDB[0..63]

B_BA0<24>
B_BA1<24>
B_BA2<24>

CKEB0<24>

CSB0#_0<24>
RASB0#<24>
CASB0#<24>
WEB0#<24>

QSB3<24>
QSB1<24>

DQMB#3<24>
DQMB#1<24>

QSB#3<24>
QSB#1<24>

240_0402_1%

240_0402_1%

VREFCB_A1
VREFDB_Q1

MAB0<24>
MAB1<24>
MAB2<24>
MAB3<24>
MAB4<24>
MAB5<24>
MAB6<24>
MAB7<24>
MAB8<24>
MAB9<24>
MAB10<24>
MAB11<24>
MAB12<24>
MAB13<24>

B_BA0
B_BA1
B_BA2

CLKB0
CLKB0#
CKEB0

ODTB0_1
CSB0#_0
RASB0#
CASB0#
WEB0#

QSB3
QSB1

DQMB#3
DQMB#1

QSB#3
QSB#1

VRAM_RST#

12

R693

R693

MDB[0..63]<24>

D D

C C

8/25 Follow REF137_06

B B

ODTB0

ODTB1

1 2

1 2

ODTB0<24>

ODTB1<24>

R700

R700

0_0402_5%

0_0402_5%

R242

R242

0_0402_5%

0_0402_5%

ODTB0_1

R694

R694
56_0402_1%

56_0402_1%

1 2

R248

R248
56_0402_1%

56_0402_1%

1 2

ODTB1_1

MDB26
MDB28
MDB27
MDB31
MDB25
MDB30
MDB24
MDB29

MDB15
MDB10
MDB12
MDB11
MDB13
MDB9
MDB14
MDB8

+1.5VSDGPU

REF137_06

4.99K_0402_1%

4.99K_0402_1%

VREFCB_A1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

4.99K_0402_1%

4.99K_0402_1%

2

4

+1.5VSDGPU

QSB2<24>
QSB0<24>

DQMB#2<24>
DQMB#0<24>

QSB#2<24>
QSB#0<24>

240_0402_1%

240_0402_1%

R675

R675

R674

R674

U24

VREFCB_A2
VREFDB_Q2

B_BA0
B_BA1
B_BA2 B_BA 2

CLKB0
CLKB0#
CKEB0

ODTB0_1
CSB0#_0
RASB0#
CASB0#
WEB0#

QSB2
QSB0

DQMB#2
DQMB#0

QSB#2
QSB#0

VRAM_RST#

12

R218

R218

12

12

C762

C762

U24

M8

VREFCA

H1

VREFDQ

MAB0

N3

A0

MAB1

P7

A1

MAB2

P3

A2

MAB3

N2

A3

MAB4

P8

A4

MAB5

P2

A5

MAB6

R8

A6

MAB7

R2

A7

MAB8

T8

A8

MAB9

R3

A9

MAB10

L7

A10/AP

MAB11

R7

A11

MAB12

N7

A12

MAB13 MAB13 MAB13

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

4.99K_0402_1%

4.99K_0402_1%

VREFDB_Q1

1

2

4.99K_0402_1%

4.99K_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

+1.5VSDGPU +1.5VSDGPU

12

R227

R227

12

C389

C389

R231

R231

3

MDB22
MDB20
MDB21
MDB18
MDB19
MDB17
MDB23
MDB16

MDB1
MDB6
MDB0
MDB4
MDB3
MDB7
MDB2
MDB5

+1.5VSDGPU

R212

R212

R213

R213

CKEB1<24>

CSB1#_0<24>
RASB1#<24>
CASB1#<24>
WEB1#<24>

QSB4<24>
QSB5<24>

DQMB#4<24>
DQMB#5<24>

QSB#4<24>
QSB#5<24>

240_0402_1%

240_0402_1%

12

12

C350

C350

+1.5VSDGPU

4.99K_0402_1%

4.99K_0402_1%

VREFCB_A2 VREFDB_Q2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

4.99K_0402_1%

4.99K_0402_1%

2

R686

R686

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VREFCB_A3
VREFDB_Q3

B_BA0
B_BA1

CLKB1

ODTB1_1

QSB4
QSB5

DQMB#4
DQMB#5

QSB#4
QSB#5

VRAM_RST#

12

M8
H1

MAB0

N3

MAB1

P7

MAB2

P3

MAB3

N2

MAB4

P8

MAB5

P2

MAB6

R8

MAB7

R2

MAB8

T8

MAB9

R3

MAB10

L7

MAB11

R7

MAB12

N7

T3
T7

M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

R701

R701

4.99K_0402_1%

4.99K_0402_1%

R702

R702

4.99K_0402_1%

4.99K_0402_1%

+1.5VSDGPU

U63

U63

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

12

12

C775

C775

1

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

MDB35

E3

MDB37

F7

MDB34

F2

MDB39

F8

MDB33

H3

MDB38

H8

MDB32

G2

MDB36

H7

MDB44

D7

MDB43

C3

MDB47

C8

MDB41

C2

MDB45

A7

MDB40

A2

MDB46

B8

MDB42

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8

8/25 Follow REF137_068/25 Follow REF137_068/25 Follow

F9
G1
G9

+1.5VSDGPU +1.5VSDGPU+1.5VSDGPU

12

R651

R651

4.99K_0402_1%

4.99K_0402_1%

12

C765

C765

R683

R683

4.99K_0402_1%

4.99K_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

R217

R217

4.99K_0402_1%

4.99K_0402_1%

R201

R201

4.99K_0402_1%

4.99K_0402_1%

MDB55

E3

MDB49

F7

MDB52

F2

MDB50

F8

MDB53

H3

MDB48

H8

MDB54

G2

MDB51

H7

MDB56

D7

MDB59

C3

MDB63

C8

MDB62

C2

MDB57

A7

MDB61

A2

MDB58

B8

MDB60

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

12

1

12

C338

C338

2

U23

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

R236

R236

R237

R237

M8
H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3

L7
R7
N7
T3
T7
M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

12

12

U23

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

H5TQ1G63DFR-12C FBGA 96P

H5TQ1G63DFR-12C FBGA 96P

X76@

X76@

C388

C388

VREFCB_A4
VREFDB_Q4

B_BA0
B_BA1
B_BA2

CLKB1
CLKB1#CLKB1#
CKEB1

ODTB1_1
CSB1#_0
RASB1#
CASB1#
WEB1#

R226

R226

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

QSB6
QSB7

DQMB#6
DQMB#7

QSB#6
QSB#7

VRAM_RST#

12

QSB6<24>
QSB7<24>

DQMB#6<24>
DQMB#7<24>

QSB#6<24>
QSB#7<24>

240_0402_1%

240_0402_1%

VREFDB_Q3VRE FCB_A3 VREFCB_A4 VREFDB_Q4

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CLKB0<24>

CLKB0#<24>

A A

CLKB1<24>

CLKB1#<24>

CLKB0

R642 56_0402_1%R642 56_0402_1%

CLKB0#

R641 56_0402_1%R641 56_0402_1%

CLKB1

R687 56_0402_1%R687 56_0402_1%

CLKB1#

R688 56_0402_1%R688 56_0402_1%

1 2

1 2

1 2

1 2

5

CLKB0_R

CLKB1_R

+1.5VSDGPU

C782

1U_0402_6.3V6K

C782

1U_0402_6.3V6K

C780

1U_0402_6.3V6K

C780

0.01U_0402_16V7K

0.01U_0402_16V7K

C741

C741

1

2

0.01U_0402_16V7K

0.01U_0402_16V7K

C758

C758

1

2

1

2

+1.5VSDGPU

1

2

1U_0402_6.3V6K

1

2

C380

10U_0603_6.3V6M

C380

10U_0603_6.3V6M

C379

10U_0603_6.3V6M

C379

10U_0603_6.3V6M

1

2

C756

1U_0402_6.3V6K

C756

1U_0402_6.3V6K

C767

1U_0402_6.3V6K

C767

1U_0402_6.3V6K

1

1

2

2

C377

10U_0603_6.3V6M

C377

10U_0603_6.3V6M

C378

10U_0603_6.3V6M

C378

10U_0603_6.3V6M

1

1

2

2

4

+1.5VSDGPU

C754

1U_0402_6.3V6K

C754

1U_0402_6.3V6K

1

2

C391

1U_0402_6.3V6K

C391

1U_0402_6.3V6K

1

2

+1.5VSDGPU

1

+

+

C360

C360

220U_D2_4VY_R15M

220U_D2_4VY_R15M

2

@

@

C332

1U_0402_6.3V6K

C332

1U_0402_6.3V6K

1U_0402_6.3V6K

C342

1U_0402_6.3V6K

C342

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

1

2

2

+1.5VSDGPU +1.5VSDGPU +1.5VSDGPU

C761

1U_0402_6.3V6K

C761

1U_0402_6.3V6K

C757

1U_0402_6.3V6K

C757

C783

1U_0402_6.3V6K

C783

C355

1

2

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1U_0402_6.3V6K

C324

1U_0402_6.3V6K

C324

1U_0402_6.3V6K

C355

C764

1U_0402_6.3V6K

C764

1U_0402_6.3V6K

C784

1U_0402_6.3V6K

C784

1U_0402_6.3V6K

1

1

2

2

1U_0402_6.3V6K

1

1

2

2

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

C394

1U_0402_6.3V6K

C394

1U_0402_6.3V6K

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

C383

1U_0402_6.3V6K

C383

1U_0402_6.3V6K

1

1

2

2

Deciphered Date

Deciphered Date

Deciphered Date

C393

1U_0402_6.3V6K

C393

1U_0402_6.3V6K

C321

1U_0402_6.3V6K

C321

1U_0402_6.3V6K

1

2

C395

1U_0402_6.3V6K

C395

1U_0402_6.3V6K

1

2

2

C376

10U_0603_6.3V6M

C376

10U_0603_6.3V6M

C375

10U_0603_6.3V6M

C375

10U_0603_6.3V6M

C374

10U_0603_6.3V6M

C374

10U_0603_6.3V6M

C373

10U_0603_6.3V6M

C373

1

1

2

2

10U_0603_6.3V6M

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

e Document Number Rev

Size Document Number Rev

Size Document Number Rev

Siz

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

VRAM_DDR3 / Channel B

VRAM_DDR3 / Channel B

VRAM_DDR3 / Channel B

LA-6931P

LA-6931P

LA-6931P

1

29 58Wednesday, October 27, 2010

29 58Wednesday, October 27, 2010

29 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

4

3

2

1

LCD POWER CIRCUIT

+LCDVDD

12

R2100

R2100

300_0603_5%

D D

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

ENVDD<22>

PCH_ENVDD<16>

BKOFF#<40>

C C

LED PANEL Conn.

INVT_PWM<40>

300_0603_5%

61

Q2102A

Q2102A

2

ENVDD

R2111

R2111

1 2

0_0402_5%DIS@

PCH_ENVDD

R2118 10K_0402_5%R2118 10K_0402_5%

0_0402_5%DIS@

R2112

R2112

1 2

0_0402_5%SG@

0_0402_5%SG@

100K_0402_5%

100K_0402_5%

1 2

+INVPWR_B+

+LCDVDD

INVT_PWM INVT_PWM_R

+3VS_CAMERA

R2187 0_0402_5%R2187 0_0402_5 %

1 2

10/1

R2120 0_0402_5%R2120 0_0402_5 %

USB20_N10<17>
USB20_P10<17>

+LCDVDD

+3VS

1

C2115

C2115

B B

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

D2101

<ESD>D2101

<ESD>

1

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

+3VS

For EMI's request

USB20_P10 USB20_CMOS_P10

USB20_N10 US B20_CMOS_N10

For EMI's request

+3VALW

A A

ARCADE_ON#

L2100

L2100

1

4

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

1 2

R2129

R2129
10K_0402_5%

10K_0402_5%

D2103

D2103

1

DAN202UT106_SC70-3

DAN202UT106_SC70-3

1 2

R2122 0_0402_5%R2122 0_0402_5 %

1 2

INVT_PWM_R

12

C2111220P_040 2_50V7K C 2111220P_0402_50V7K

BKOFF#

12

C2112220P_040 2_50V7K C 2112220P_0402_50V7K

W=60mils

1

C2113

C2113

10U_0805_10V4Z

10U_0805_10V4Z

2

COLOR_ENG_EN<18>

POWER_SMART#<40>
PWR_SAVE_LED#<40>

ARCADE_ON#

2

POWER_SMART#

3

R21250_0603_5% R21250_0603_5 %

12

1

4

ARCADE_BTN#

2

51ON#

3

5

2

3

@

@

ARCADE_BTN#

DCR<13>

1

C2114

C2114

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+3VS_CAMERA

2

3

+3VS

ARCADE_BTN# <40>

51ON# <41,47>

R2113

R2113

+3VS

12

+3VALW

12

LVDS_OE#

3

5

Q2102B

Q2102B
DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

4

9/02

+3VS_CAMERA

BKOFF#
I2CC_SCL
I2CC_SDA

USB20_CMOS_N10
USB20_CMOS_P10

DCR
TXOUT0­TXOUT0+
TXOUT1­TXOUT1+
TXOUT2­TXOUT2+

TXCLK­TXCLK+

TZOUT0­TZOUT0+
TZOUT1­TZOUT1+
TZOUT2­TZOUT2+

TZCLK-

TZCLK+
COLOR_ENG_EN
ARCADE_ON#

POWER_SMART#
PWR_SAVE_LED#

R2105

R2105
100K_0402_5%

100K_0402_5%

R2107

R2107
1K_0402_5%

1K_0402_5%

12

C2103

C2103

0.047U_0402_16V7K

0.047U_0402_16V7K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

JLVDS1

JLVDS1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

I-PEX_20143-040E-20F

I-PEX_20143-040E-20F

CONN@

CONN@

POWER_SMART#

+3VS

USB20_CMOS_P10 USB20_CMOS_N10

4

+3VS

=6

0mils

W

1

2

S

S

G

G

Q2105

Q2105

2

AO3413_SOT23-3

AO3413_SOT23-3

D

1

2

G1
G2
G3
G4
G5
G6

CM1293A-02SR_SOT143-4

CM1293A-02SR_SOT143-4

D

1 3

+LCDVDD

1

1

C2105

C2105

2

2

41
42
43
44
45
46

R2141 10K_0402_5%R2141 10K_0402_5%

1 2

D2102

<EMI>@D2102

<EMI>@

PWR

IO2

GND

1

2

IO1

4

3

C2100

C2100

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

W=60mils

C2106

C2106

0.1U_0402_16V4Z

0.1U_0402_16V4Z

W=40mils

680P_0402_50V7K

680P_0402_50V7K

INVT_PWM_R

+3VS

B+

C2109

C2109

+INVPWR_B+

1

2

R2188 0_0805_5%R2188 0_0805_5%

1 2

1

C2110

C2110
68P_0402_50V8J

68P_0402_50V8J

2

10/1

R2101 0_0402_5%@R2101 0_0402_5%@

1 2

R2102 0_0402_5%SG@R2102 0_0402_5%SG@

1 2

+3VS

R2123 2.2K_0402_5%@R2123 2.2K_0402_5%@

1 2

R2124 2.2K_0402_5%@R2124 2.2K_0402_5%@

1 2

VGA_LCD_CLK<23>

VGA_LCD_DAT<23>

PCH_LCD_CLK<16>

PCH_LCD_DATA<16>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VGA_PNL_PWM

DPST_PWM

I2CC_SCL
I2CC_SDA

R2131 0_0402_5%DIS@R2131 0_0402_5%DIS@

R2130 0_0402_5%DIS@R2130 0_0402_5%DIS@

R2186 0_0402_5%SG@R2186 0_0402_5%SG@

R2185 0_0402_5%SG@R2185 0_0402_5%SG@

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

3

1 2

1 2

1 2

1 2

VGA_PNL_PWM <22>

DPST_PWM <16>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

I2CC_SCL

I2CC_SDA

TXOUT0­TXOUT0+

TXOUT1­TXOUT1+

TXOUT2­TXOUT2+

TXCLK­TXCLK+

TZOUT0­TZOUT0+

TZOUT1­TZOUT1+

TZOUT2­TZOUT2+

TZCLK­TZCLK+

2

VGA_TXOUT0-

23

VGA_TXOUT0+

14

RP21000_0404_4P2R_5% DIS@ RP21000_0404_4P2R_5% DIS@

PCH_TXOUT0-

23

PCH_TXOUT0+

14

RP21010_0404_4P2R_5% SG@ R P21010_0404_4P2R_5% SG@

VGA_TXOUT1-

23

VGA_TXOUT1+

14

RP21020_0404_4P2R_5% DIS@ RP21020_0404_4P2R_5% DIS@

PCH_TXOUT1-

23

PCH_TXOUT1+

14

RP21030_0404_4P2R_5% SG@ R P21030_0404_4P2R_5% SG@

VGA_TXOUT2-

23

VGA_TXOUT2+

14

RP21040_0404_4P2R_5% DIS@ RP21040_0404_4P2R_5% DIS@

PCH_TXOUT2-

23

PCH_TXOUT2+

14

RP21050_0404_4P2R_5% SG@ R P21050_0404_4P2R_5% SG@

VGA_TXCLK-

23

VGA_TXCLK+

14

RP21060_0404_4P2R_5% DIS@ RP21060_0404_4P2R_5% DIS@

PCH_TXCLK-

23

PCH_TXCLK+

14

RP21070_0404_4P2R_5% SG@ R P21070_0404_4P2R_5% SG@

VGA_TZOUT0-

23

VGA_TZOUT0+

14

RP21080_0404_4P2R_5% DIS@ RP21080_0404_4P2R_5% DIS@

PCH_TZOUT0-

23

PCH_TZOUT0+

14

RP21090_0404_4P2R_5% SG@ R P21090_0404_4P2R_5% SG@

VGA_TZOUT1-

23

VGA_TZOUT1+

14

RP21100_0404_4P2R_5% DIS@ RP21100_0404_4P2R_5% DIS@

PCH_TZOUT1-

23

PCH_TZOUT1+

14

RP21110_0404_4P2R_5% SG@ R P21110_0404_4P2R_5% SG@

VGA_TZOUT2-

23

VGA_TZOUT2+

14

RP21120_0404_4P2R_5% DIS@ RP21120_0404_4P2R_5% DIS@

PCH_TZOUT2-

23

PCH_TZOUT2+

14

RP21130_0404_4P2R_5% SG@ R P21130_0404_4P2R_5% SG@

VGA_TZCLK-

23

VGA_TZCLK+

14

RP21140_0404_4P2R_5% DIS@ RP21140_0404_4P2R_5% DIS@

PCH_TZCLK-

23

PCH_TZCLK+

14

RP21150_0404_4P2R_5% SG@ R P21150_0404_4P2R_5% SG@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

LA-6931P

LA-6931P

LA-6931P

VGA_TXOUT0- <22>
VGA_TXOUT0+ <22>

PCH_TXOUT0- <16>
PCH_TXOUT0+ <16 >

VGA_TXOUT1- <22>
VGA_TXOUT1+ <22>

PCH_TXOUT1- <16>
PCH_TXOUT1+ <16 >

VGA_TXOUT2- <22>
VGA_TXOUT2+ <22>

PCH_TXOUT2- <16>
PCH_TXOUT2+ <16 >

VGA_TXCLK- <22>
VGA_TXCLK+ <22>

PCH_TXCLK- <16>
PCH_TXCLK+ <16>

VGA_TZOUT0- <22>
VGA_TZOUT0+ <22>

PCH_TZOUT0- <16>
PCH_TZOUT0+ <16 >

VGA_TZOUT1- <22>
VGA_TZOUT1+ <22>

PCH_TZOUT1- <16>
PCH_TZOUT1+ <16 >

VGA_TZOUT2- <22>
VGA_TZOUT2+ <22>

PCH_TZOUT2- <16>
PCH_TZOUT2+ <16 >

VGA_TZCLK- <22>
VGA_TZCLK+ <22>

PCH_TZCLK- <16>
PCH_TZCLK+ <16>

LVDS Connector

LVDS Connector

LVDS Connector

1

of

30 58Wednesday, October 27, 2010

30 58Wednesday, October 27, 2010

30 58Wednesday, October 27, 2010

1.0

1.0

1.0

A

www.bufanxiu.com

B

C

D

E

CRT Connector

D2104

D2104

2 1

RB491D_SC59-3

RB491D_SC59-3

1

2

1

2

W=40mils

F2100

F2100

1.1A_6V_SMD1812P110TF

1.1A_6V_SMD1812P110TF

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DSUB_12

DSUB_15

C2134

@C2134

@

68P_0402_50V8J

68P_0402_50V8J

C2119

C2119

1 2

+CRT_VCC

21

1

2

CRT_DET# <18>

R2135

R2135
100K_0402_5%

100K_0402_5%

W=40mils

T56PAD T56PAD

+CRT_VCC

CRT_G_2

+CRT_VCC+R_CRT_VC C

CM1293A-02SR_SOT143-4@

CM1293A-02SR_SOT143-4@

+CRT_VCC

JCRT1

JCRT1

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

16
17

D2108

D2108

4

VIN

3

GND

IO2

D2107

D2107

4

VIN

3

IO2

CM1293A-02SR_SOT143-4@

CM1293A-02SR_SOT143-4@

RGND
ID0
Red
GGND
SDA
Green
BGND
Hsync
Blue
+5V
Vsync
res
SGND
SCL
GND

GND
GND

SUYIN_070546FR015S263ZR

SUYIN_070546FR015S263ZR

CONN@

CONN@

CRT_R_2

2

IO1

1

CRT_B_2

2

IO1

1

GND

+5VS

1 1

10/14 Change to 0 ohm for DIS

1

C2123

C2123

@

@

2

12

CRT_HSYNC_1

CRT_VSYNC_1

CRT_R_1

CRT_G_1

CRT_B_1

1

C2124

C2124

@

@

2

22P_0402_50V8J

22P_0402_50V8J

L2105 FCM2012CF-800T06_2PL2105 FCM2012CF-800T06_2P

1 2

L2106 FCM2012CF-800T06_2PL2106 FCM2012CF-800T06_2P

1 2

L2107 FCM2012CF-800T06_2PL2107 FCM2012CF-800T06_2P

1 2

1

C2125

C2125

@

@

2

22P_0402_50V8J

22P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

1

2

R2190 MBC1608121YZF_0603R2190 MBC1608121YZF_0603

R2189 MBC1608121YZF_0603R2189 MBC1608121YZF_0603

C2126

C2126

1 2

1 2

10P_0402_50V8J

10P_0402_50V8J

C2127

C2127

1

2

CRT_R

CRT_G

CRT_B

12

R2132

R2132

R2133

150_0402_1%

150_0402_1%

2 2

R2133

150_0402_1%

150_0402_1%

12

12

R2134

R2134

150_0402_1%

150_0402_1%

12P_0402_50V8J

12P_0402_50V8J

C2130 0.1U_0402_16V4ZC2130 0.1U_0402_16V4Z

1 2

CRT_HSYNC

1

1

C2121

C2121

C2120

C2120

2

2

12P_0402_50V8J

12P_0402_50V8J

+CRT_VCC

5

1

U2107

U2107

P

4

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

C2135 0.1U_0402_16V4ZC2135 0.1U_0402_16V4Z

1 2

CRT_VSYNC

L2101 0_0603_5%L2101 0_0603_5%

L2102 0_0603_5%L2102 0_0603_5%

L2103 0_0603_5%L2103 0_0603_5%

1

C2122

C2122

2

12P_0402_50V8J

12P_0402_50V8J

+CRT_VCC

22P_0402_50V8J

22P_0402_50V8J

R2136 10K_0402_5%R2136 10K_0402_5%

5

1

U2108

U2108

P

4

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

10P_0402_50V8J

10P_0402_50V8J

1

2

C2132

@C2132

@

10P_0402_50V8J

10P_0402_50V8J

CRT_R_2

CRT_G_2

CRT_B_2

C2128

C2128

1

2

CRT_HSYNC_2

CRT_VSYNC_2

1

C2133
10P_0402_50V8J

10P_0402_50V8J

2

1

C2129

C2129

100P_0402_50V8J

100P_0402_50V8J

2

@C2133

@

C2131

@C2131

@

68P_0402_50V8J

68P_0402_50V8J

VGA_CRT_R<23>

3 3

4 4

PCH_CRT_R<16>

VGA_CRT_G<23>

PCH_CRT_G<16>

VGA_CRT_B<23>

PCH_CRT_B<16>

VGA_CRT_HSYNC<23>

PCH_CRT_HSYNC<16>

VGA_CRT_VSYNC<23>

PCH_CRT_VSYNC<16>

A

VGA_CRT_R CRT_R

PCH_CRT_R

VGA_CRT_G CRT_G

PCH_CRT_G

VGA_CRT_B CRT_B

PCH_CRT_B

VGA_CRT_HSYNC

PCH_CRT_HSYNC

VGA_CRT_VSYNC CRT_VSYNC

PCH_CRT_VSYNC PCH_CRT_CLK

R2173 0_0402_5%DIS@R2173 0_0402_5%DIS@

R2174 0_0402_5%SG@R2174 0_0402_5%SG@

R2175 0_0402_5%DIS@R2175 0_0402_5%DIS@

R2176 0_0402_5%SG@R2176 0_0402_5%SG@

R2177 0_0402_5%DIS@R2177 0_0402_5%DIS@

R2178 0_0402_5%SG@R2178 0_0402_5%SG@

R2179 0_0402_5%DIS@R2179 0_0402_5%DIS@

R2180 0_0402_5%SG@R2180 0_0402_5%SG@

R2181 0_0402_5%DIS@R2181 0_0402_5%DIS@

R2182 0_0402_5%SG@R2182 0_0402_5%SG@

12

12

12

12

12

12

12

12

12

12

CRT_HSYNC

B

VGA_DDC_DATA<23>

PCH_CRT_DATA<16>

VGA_DDC_CLK<23>

PCH_CRT_CLK<16>

VGA_DDC_DATA

PCH_CRT_DATA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R2139

R2183

R2140

R2184

C

DSUB_12_R

DIS@R2139

DIS@

12

0_0402_5%

0_0402_5%

SG@R 2183

SG@

12

0_0402_5%

0_0402_5%

DSUB_15_R

DIS@R2140

DIS@

12

0_0402_5%

0_0402_5%

SG@R 2184

SG@

12

0_0402_5%

0_0402_5%

2009/08/25 2009/08/25

2009/08/25 2009/08/25

2009/08/25 2009/08/25

+3VS

2.2K_0402_5%

2.2K_0402_5%

2

61

Q2103A D MN66D0LDW-7 2N_SOT363-6Q2103A D MN66D0LDW-7 2N_SOT363-6

5

3

4

Q2103B DMN66D0LDW -7 2N_SOT363-6Q2103B DMN66D0LDW-7 2N_SOT363-6

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

R2137

R2137

+CRT_VCC

12

12

R2138

R2138

2.2K_0402_5%

2.2K_0402_5%

DSUB_12

DSUB_15VGA_DDC_CLK

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet

+CRT_VCC

D2106

D2106

4

IO1

CRT_VSYNC_2

LA-6931P

LA-6931P

LA-6931P

VIN

3

GND

IO2

CM1293A-02SR_SOT143-4@

CM1293A-02SR_SOT143-4@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

CRT Connector

CRT Connector

CRT Connector

E

2

1

CRT_HSYNC_2

31 58Wednesday, October 27, 2010

31 58Wednesday, October 27, 2010

31 58Wednesday, October 27, 2010

1.0

1.0

1.0

of

5

www.bufanxiu.com

4

3

2

1

VGA_HDMI_TXD2-<23>
VGA_HDMI_TXD2+<23>

VGA_HDMI_TXD1-<23>

D D

Place closed to JHDMI1

HDMI_TX2­HDMI_TX2+

HDMI_TX1­HDMI_TX1+

HDMI_TX0­HDMI_TX0+

HDMI_CLK­HDMI_CLK+

+HDMI_5V_OUT

C C

HDMI_CLK+ HDMI_R_CK+

HDMI_CLK- HDMI_R_CK-

HDMI_CLK­HDMI_CLK+ HDM I_R_CK+

R2142 499_0402_1%R2142 499_0402_1%

1 2

R2143 499_0402_1%R2143 499_0402_1%

1 2

R2144 499_0402_1%R2144 499_0402_1%

1 2

R2145 499_0402_1%R2145 499_0402_1%

1 2

R2146 499_0402_1%R2146 499_0402_1%

1 2

R2147 499_0402_1%R2147 499_0402_1%

1 2

R2148 499_0402_1%R2148 499_0402_1%

1 2

R2149 499_0402_1%R2149 499_0402_1%

1 2

12

R2150

R2150

100K_0402_5%

100K_0402_5%

L2110

L2110

1

1

2

4

WCM-2012HS-670T _0805

WCM-2012HS-670T _0805

@

@
@ R2152

@

4

1 2
1 2

R2151

R2151
R2152

3

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

2

3

HDMI_R_CK-

2

G

G

Q2108

Q2108
2N7002E_SOT23-3

2N7002E_SOT23-3

HDMI_GND

13

D

D

S

S

VGA_HDMI_TXD1+<23>

VGA_HDMI_TXD0-<23>
VGA_HDMI_TXD0+<23>

VGA_HDMI_TXC-<23>
VGA_HDMI_TXC+<23>

PCH_HDMI_TXD2-<16>
PCH_HDMI_TXD2+<16>

PCH_HDMI_TXD1-<16>
PCH_HDMI_TXD1+<16>

PCH_HDMI_TXD0-<16>
PCH_HDMI_TXD0+<16>

PCH_HDMI_TXC-<16>
PCH_HDMI_TXC+<16>

10/28 Del RP26, Add R772/R781=0 ohm(0402_5%)

L2111

HDMI_TX0+ HDMI_R_D0+

HDMI_TX0- HDMI_R_D 0-

HDMI_TX0­HDMI_TX0+

B B

HDMI_TX1+ HDMI_R_D1+

HDMI_TX1- HDMI_R_D 1-

HDMI_TX1­HDMI_TX1+

HDMI_TX2+ HDMI_R_D2+

HDMI_TX2- HDMI_R_D 2-

HDMI_TX2­HDMI_TX2+

L2111

1

1

2

4

WCM-2012HS-670T _0805

WCM-2012HS-670T _0805

@

@
@ R2158

@

L2112

L2112

1

4

WCM-2012HS-670T _0805

WCM-2012HS-670T _0805

@ R2160

@
@ R2161

@

1

4

WCM-2012HS-670T _0805

WCM-2012HS-670T _0805

4

1 2
1 2

1

4

1 2
1 2

1

4

@

@
@

@

R2157

R2157
R2158

R2160
R2161

L2113

L2113

R2164

R2164

1 2

R2165

R2165

1 2

3

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

2

3

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

2

3

HDMI_R_D0­HDMI_R_D0+

2

3

HDMI_R_D1­HDMI_R_D1+

2

2

3

3

0_0402_5%

0_0402_5%

HDMI_R_D2­HDMI_R_D2+

0_0402_5%

0_0402_5%

VGA_HDMI_DET<23>

PCH_HDMI_DET<16>

VGA_HDMI_TXD2­VGA_HDMI_TXD2+

VGA_HDMI_TXD1­VGA_HDMI_TXD1+

VGA_HDMI_TXD0­VGA_HDMI_TXD0+

VGA_HDMI_TXC­VGA_HDMI_TXC+

PCH_HDMI_TXD2­PCH_HDMI_TXD2+

PCH_HDMI_TXD1­PCH_HDMI_TXD1+

PCH_HDMI_TXD0­PCH_HDMI_TXD0+

PCH_HDMI_TXC­PCH_HDMI_TXC+

+3VS_DELAY

DIS@ R 2153

DIS@

Q2109

DIS@

Q2109

DIS@

MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

R2155

R2155

DIS@

DIS@

1 2

0_0402_5%

0_0402_5%

12

R2153
0_0402_5%

0_0402_5%

C

C

B

B

E

E

3 1

12

DIS@

DIS@

R2156

R2156
10K_0402_5%

10K_0402_5%

SG@

SG@

R2192

R2192

1 2

0_0402_5%

0_0402_5%

2

9/22 EMI

A A

HDMI_HPD_R

SG@

SG@

R2195

R2195
1M_0402_5%

1M_0402_5%

2 3
1 4

RP21180_0404_4P2R_5% DIS@ RP21180_0404_4P2R_5% DIS@

2 3
1 4

RP21220_0404_4P2R_5% DIS@ RP21220_0404_4P2R_5% DIS@

2 3
1 4

RP21170_0404_4P2R_5% DIS@ RP21170_0404_4P2R_5% DIS@

2 3
1 4

RP21200_0404_4P2R_5% DIS@ RP21200_0404_4P2R_5% DIS@

23
14

RP21230_0404_4P2R_5% SG@ R P21230_0404_4P2R_5% SG@

23
14

RP21190_0404_4P2R_5% SG@ R P21190_0404_4P2R_5% SG@

23
14

RP21210_0404_4P2R_5% SG@ R P21210_0404_4P2R_5% SG@

23
14

RP21160_0404_4P2R_5% SG@ R P21160_0404_4P2R_5% SG@

DIS@

DIS@

1 2

R2154 200K_0402_5%

R2154 200K_0402_5%

+3VS

G

G

2

1 2

13

D

S

D

S

Q2110

SG@

Q2110

SG@

2N7002H_SOT23-3

2N7002H_SOT23-3

HDMI_HPD

1 2

12

R2172

R2172
200K_0402_5%

200K_0402_5%

@

@

HDMI_HPD

SG@

SG@

R2194

R2194
100K_0402_5%

100K_0402_5%

HDMI_TX2-_L
HDMI_TX2+_L

HDMI_TX1-_L
HDMI_TX1+_L

HDMI_TX0-_L
HDMI_TX0+_L

HDMI_CLK-_L
HDMI_CLK+_L

VGA_HDMI_SDATA<23>

VGA_HDMI_SCLK<23>

PCH_HDMI_SDATA<16>

PCH_HDMI_SCLK<16>

C2140 .1U_0402_16V7KC2140 .1U_0402_16V7K
C2141 .1U_0402_16V7KC2141 .1U_0402_16V7K

C2142 .1U_0402_16V7KC2142 .1U_0402_16V7K
C2143 .1U_0402_16V7KC2143 .1U_0402_16V7K

C2144 .1U_0402_16V7KC2144 .1U_0402_16V7K
C2145 .1U_0402_16V7KC2145 .1U_0402_16V7K

C2146 .1U_0402_16V7KC2146 .1U_0402_16V7K
C2147 .1U_0402_16V7KC2147 .1U_0402_16V7K

12
12

12
12

12
12

12
12

R2169 0_0402_5%DIS@R2169 0_0402_5%DIS@

R2171 0_0402_5%DIS@R2171 0_0402_5%DIS@

R2193 0_0402_5%SG@R2193 0_0402_5%SG@

R2191 0_0402_5%SG@R2191 0_0402_5%SG@

12

12

12

12

HDMI_TX2­HDMI_TX2+

HDMI_TX1­HDMI_TX1+

HDMI_TX0­HDMI_TX0+

HDMI_CLK­HDMI_CLK+

HDMIDAT_L

HDMICLK_L

+5VS

+HDMI_5V_OUT

5

4

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

D2105

D2105

+HDMI_5V

2 1

RB491D_SC59-3

RB491D_SC59-3

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+3VS

2K_0402_5%

2K_0402_5%

2

Q2104A

Q2104A

61

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

Q2104B

Q2104B

3

@

@

C2148

C2148

12P_0402_50V8J

12P_0402_50V8J

F2101

F2101

1.1A_6V_SMD1812P110TF

1.1A_6V_SMD1812P110TF

HDMI_R_D2+

HDMI_R_D2­HDMI_R_D1+

HDMI_R_D1­HDMI_R_D0+

HDMI_R_D0­HDMI_R_CK+

HDMI_R_CK-

HDMICLK_R
HDMIDAT_R

HDMI_HPD

21

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+HDMI_5V_OUT

21

D1210

D1210

12

R2162

R2162

1

1

2

2

+HDMI_5V_OUT

W=40mils

1

C2150

C2150

2

JHDMI1

JHDMI1

1

D2+

2

D2_shield

3

D2-

4

D1+

5

D1_shield

6

D1-

7

D0+

8

D0_shield

9

D0-

10

CK+

11

CK_shield

12

CK-

13

CEC

14

Reserved

15

SCL

16

SDA

17

DDC/CEC_GND

18

+5V

19

HP_DET

TYCO_2041003-1

TYCO_2041003-1

CONN@

CONN@

21

D1209

D1209
CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

R2163

R2163

2K_0402_5%

2K_0402_5%

HDMIDAT_R

HDMICLK_R

@

@

C2149

C2149
12P_0402_50V8J

12P_0402_50V8J

23

GND

22

GND

21

GND

20

GND

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

HDMI Level Shife & Conn

HDMI Level Shife & Conn

HDMI Level Shife & Conn

LA-6931P

LA-6931P

LA-6931P

1

of

32 58Wednesday, October 27, 2010

32 58Wednesday, October 27, 2010

32 58Wednesday, October 27, 2010

1.0

1.0

1.0

A

www.bufanxiu.com

B

C

D

E

F

G

H

HDD

C2405

C2405

1U_0402_6.3V4Z

1U_0402_6.3V4Z

SATA_PTX_DRX_P0

SATA_DTX_C_PRX_N0
SATA_DTX_C_PRX_P0

10U_0805_10V4Z

10U_0805_10V4Z

1

1

C2406

C2406

2

2

SATA_PTX_DRX_P0<13>

1 1

2 2

SATA_PTX_DRX_N0<13>

SATA_DTX_C_PRX_N0<13>
SATA_DTX_C_PRX_P0<13>

+5VS_HDD

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C2404

C2404

2

1000P_0402_50V7K

1000P_0402_50V7K

1

2

C2400 0.01U_0402_16V7KC2400 0.01U_0402_16V7K
C2401 0.01U_0402_16V7KC2401 0.01U_0402_16V7K

C2402 0.01U_0402_16V7KC2402 0.01U_0402_16V7K
C2403 0.01U_0402_16V7KC2403 0.01U_0402_16V7K

+5VS

C2407

C2407

1 2
1 2

1 2
1 2

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

SATA HDD Conn.

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0SATA_PTX_DRX_N0

SATA_DTX_PRX_N0
SATA_DTX_PRX_P0

@

@

JP10

JP10

10/07

+5VS_HDD

JSATA3

JSATA3

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

OCTEK_SAT-22KH0B

OCTEK_SAT-22KH0B

CONN@

CONN@

GND
GND

23
24

ODD

+5VS_ODD

Placea caps. near ODD CONN.

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

3 3

2

1000P_0402_50V7K

1000P_0402_50V7K

C2412

C2412

1

C2413

C2413

2

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C2414

C2414

1

C2415

C2415

2

10U_0805_10V4Z

10U_0805_10V4Z

1 2

R2495 0_0402_5%@R2495 0_0402_5%@

9/23

SATA_PTX_C_DRX_P2
SATA_PTX_C_DRX_N2

SATA_DTX_PRX_N2
SATA_DTX_PRX_P2

1 2

C2408 0.01U_0402_16V7KC2408 0.01U_0402_16V7K

SATA_PTX_DRX_P2<13>
SATA_PTX_DRX_N2<13>

SATA_DTX_C_PRX_N2<13>
SATA_DTX_C_PRX_P2<13>

ODD_DETECT#<18>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C2521

@ C2521

@

1

2

1 2

C2409 0.01U_0402_16V7KC2409 0.01U_0402_16V7K

1 2

C2410 0.01U_0402_16V7KC2410 0.01U_0402_16V7K

1 2

C2411 0.01U_0402_16V7KC2411 0.01U_0402_16V7K

1 2

R2401 1K_0402_1%@R2401 1K_0402_1%@

+5VS_ODD

ODD_DA#<17>

SATA ODD Conn.

JSATA2

JSATA2

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND
GND13GND

SUYIN_127382FB013S102ZR

SUYIN_127382FB013S102ZR

CONN@

CONN@

GND
GND
GND

17
16
15
14

+5VS

12

R2486

@R2486

@

10K_0402_5%

2

G

G

10K_0402_5%

13

D

D

@

@

Q2403

Q2403
2N7002E_SOT23-3

2N7002E_SOT23-3

S

S

@

@

R2487

R2487

1 2

220K_0402_1%

220K_0402_1%

4 4

ODD_EN<18>

9/25

A

B

1

C2522

C2522

0.1U_0402_16V4Z@

0.1U_0402_16V4Z@

2

2

Q2404

@Q2404

@

SI2305DS-T1-E3_SOT23-3

SI2305DS-T1-E3_SOT23-3

C

31

10/07

12

JP12

JP12
PAD-OPEN 4x4m

PAD-OPEN 4x4m

@

@

+5VS_ODD

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

E

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

HDD & ODD Connector

HDD & ODD Connector

HDD & ODD Connector

LA-6931P

LA-6931P

LA-6931P

G

1.0

1.0

33 58Wednesday, October 27, 2010

33 58Wednesday, October 27, 2010

33 58Wednesday, October 27, 2010

H

1.0

5

www.bufanxiu.com

4

3

2

1

W=60mils

+3VALW

SI2301BDS_SOT23

SI2301BDS_SOT23

12

R1201

D D

13

D

R1223 470K_0402_5%R1223 470K_0402_5%

+3VALW

1 2

10U_0603_6.3V6M

10U_0603_6.3V6M

C1231

C1231

D

Q1200

Q1200

2

G

2N7002E_SOT23-3

G

1

2

2N7002E_SOT23-3

S

S

R1201
47K_0402_5%

47K_0402_5%

@ R1200

@

1 2

0_1206_5%

0_1206_5%

S

S

Q1201

Q1201

R1202

R1202

47K_0402_5%

47K_0402_5%

R1200

G

G

12

+LAN_IO

D

D

13

370mA

2

The +LAN_IO Ris ing time (10%~9 0%) need
>1mS and <100mS

W=60mils

+LAN_IO

C1201

C1201

1.5A

1

2

1

C1202

C1202

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C1203

C1203

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C1204

C1204

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C1205

C1205

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C1206

C1206

2

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

These caps close to U70 : Pin 12,27,39,42,47,48

08/27

+LAN_IO

+LAN_VDD

C1207

C1207

1 2

0_0603_5%

0_0603_5%

LAN_ACTIVITY#

1

1

C1208

C1208

C1209

C1209

2

2

The

R1203

R1203

1000P_1206_2KV7K

1000P_1206_2KV7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

se caps close to U70 : Pin 3,6,9,13,29,41,45

+LAN_VDDREG

1

C1216

C1216

C1215

C1215

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1 2

R1216 510_0402_5%R1216 51 0_0402_5%

1 2

R1218 510_0402_5%R1218 510_0402_5%

220P_0402_50V7K

220P_0402_50V7K

1

C1235

@C1235

@

2

1

1

C1210

C1210

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

2

1

C1226

@C1226

@

1 2

C1227

C1227
1000P_1206_2KV7K

1000P_1206_2KV7K

C1211

C1211

0.1U_0402_16V7K

0.1U_0402_16V7K

C1223

220P_0402_50V7K

220P_0402_50V7K

+LAN_IO

1

2

1

2

@C1223

@

LANLED_LINK#LANLINK_STATUS#

RJ45_MDO0+

RJ45_MDO0-

RJ45_MDO1+

RJ45_MDO2+

RJ45_MDO2-

RJ45_MDO1-

RJ45_MDO3+

RJ45_MDO3-

LANLED_ACT#

+LAN_IO

1

C1212

C1212

2

0.1U_0402_16V7K

0.1U_0402_16V7K

+LAN_SROUT1.05

1

C1232

C1232

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+LAN_VDD

1

C1213

C1213

2

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

L1200

L1200

W=60mils W=6 0mils

JRJ45

JRJ45

9

Green LED-

10

Green LED+

1

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

11

Yellow LED-

12

Yellow LED+

SANTA_130452-D

SANTA_130452-D

CONN@

CONN@

1 2

2.2UH +-5% NLC252018T-2R2J-N

2.2UH +-5% NLC252018T-2R2J-N

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

These components close to U70 : Pin 36

( Should be place within 200 mils )

14

G2

13

G1

40mil

1

C1233

C1233

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

R1225 0_0402_5%R1225 0_0402_5 %

1 2

0_0603_5%

0_0603_5%

C1221

C1221

1 2

R1204

R1204

1

2

3

C1217

C1217

1

223

1

1

3

223

1

+LAN_EVDD10

1

1

C1218

C1218

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

+LAN_VDD

@

2

1

@

1

2

C1222

C1222

C1234

C1234

10U_0805_10V4Z

10U_0805_10V4Z

10/25

0.1U_0402_16V7K

0.1U_0402_16V7K

10/26 EMI

D1201

D1201
AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3

@

@

D1202

D1202
AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3

@

@

U70

C1219 0.1U_0402_16V7KC1219 0.1U_0402_16V7K

PCIE_PRX_DTX_P1<14>

PCIE_PRX_DTX_N1<14>

PCIE_PTX_C_DRX_P1<14>
PCIE_PTX_C_DRX_N1<14>

C C

+LAN_IO

EC_PME#<40>

PCH_PCIE_WAKE#<15,37,39>

1 2

+3VS

R1210 1K_0402_5%

R1210 1K_0402_5%

R1212

R1212

15K_0402_5%

15K_0402_5%

C1224

C1224

27P_0402_50V8J

B B

A A

27P_0402_50V8J

C1225 27P_0402_50V 8JC1225 27P_0402_50V8 J

C1230 0.01U_0402_16V7KC1230 0.01U_0402_16V7K

1 2

1 2

1 2

XTLI_R

1 2

1 2

C1220 0.1U_0402_16V7KC1220 0.1U_0402_16V7K

1 2

PLT_RST#<5,17,37,39,40>

CLK_PCIE_LAN<14>

CLK_PCIE_LAN#<14>

R1224 4.7K_0402_5%R1224 4.7K_0402_5%

1 2

R1209 0_0402_5%@R1209 0_0402_5%@

1 2

ISOLATEB

+LAN_IO

1 2

+LAN_IO

R1214

R1214

3.3V : Enable switching regulator
0V : Disable switching regulator

R1217

R1217
0_0402_5%

0_0402_5%

Y1200

Y1200
25MHZ_12PF_X5H025000FC1H-H

25MHZ_12PF_X5H025000FC1H-H

XTLI

12

XTLO

LAN_MDI3­LAN_MDI3+

LAN_MDI2­LAN_MDI2+
+V_DAC LANGNDRJ45_GND
LAN_MDI1­LAN_MDI1+

LAN_MDI0­LAN_MDI0+

10
11
12

PCIE_PRX_C_DTX_P1

PCIE_PRX_C_DTX_N1 LAN_ACTIVITY#

LAN_CLKREQ#<14>

XTLO

24
23
22
21
20
19
18
17
16
15
14
13

XTLI

RJ45_MDO3­RJ45_MDO3+

RJ45_MDO2­RJ45_MDO2+

RJ45_MDO1­RJ45_MDO1+

RJ45_MDO0­RJ45_MDO0+

10/07

R1211 10K_0402_5%R1211 10K_0402_5%

1 2

R1213 1K_0402_5% R1213 1K_0402_5%

1 2

0_0402_5%

0_0402_5%

12

+LAN_VDDREG

R1215 2.49K_0402_1%

R1215 2.49K_0402_1%

1 2

TS1

TS1

1

TCT1

2
3
4
5
6
7
8
9

MCT1

TD1+

MX1+

TD1-

MX1-

TCT2

MCT2

TD2+

MX2+

TD2-

MX2-

TCT3

MCT3

TD3+

MX3+

TD3-

MX3-

TCT4

MCT4

TD4+

MX4+

TD4-

MX4-

350uH_GSL5009LF

350uH_GSL5009LF

U70

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111E-GR_QFN48_6X6

RTL8111E-GR_QFN48_6X6

R1219 75_0402_5%R1219 75_0402_5%
R1220 75_0402_5%R1220 75_0402_5%
R1221 75_0402_5%R1221 75_0402_5%
R1222 75_0402_5%R1222 75_0402_5%

LED3/EEDO

LED1/EESK

LED0

EECS/SCL

EEDI/SDA

MDIP0

MDIN0

MDIP1

MDIN1

NC/MDIP2

NC/MDIN2

NC/MDIP3

NC/MDIN3

DVDD10
DVDD10
DVDD10

DVDD33
DVDD33

AVDD33
AVDD33
AVDD33
AVDD33

EVDD10

AVDD10
AVDD10
AVDD10
AVDD10

REGOUT

1 2
1 2
1 2
1 2

31

LANLINK_STATUS#

37
40

R1205 10K_0402_5%R1205 10K_0402_5%

1 2

30

R1206 10K_0402_5%R1206 10K_0402_5%

1 2

32

LAN_MDI0+

1

LAN_MDI0-

2

LAN_MDI1+

4

LAN_MDI1-

5

LAN_MDI2+

7

LAN_MDI2-

8

LAN_MDI3+

10

LAN_MDI3-

11

13
29
41

27
39

12
42
47
48

21

3
6
9
45

36

+LAN_EVDD10

+LAN_SROUT1.05

+LAN_VDD

+LAN_VDD

RJ45_GND

+LAN_IO

10/26 EMI

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/3/09 2010/12/10

2010/3/09 2010/12/10

2010/3/09 2010/12/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN Realtek RTL8111E

LAN Realtek RTL8111E

LAN Realtek RTL8111E

LA-6931P

LA-6931P

LA-6931P

1

1.0

1.0

34 58Wednesday, October 27, 2010

34 58Wednesday, October 27, 2010

34 58Wednesday, October 27, 2010

1.0

5

www.bufanxiu.com

4

3

2

1

Lid Switch

+3VALW

D D

12

@

3

@

R2403

R2403
47K_0402_5%

47K_0402_5%

LID_SW#

1

C2418

C2418
10P_0402_50V8J

10P_0402_50V8J

2

LID_SW# <40>

2

1

U2400

U2400

AH180WG-7

AH180WG-7

2

VDD

OUTPUT

GND

1

C2416

C2416

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C C

Touch Pad

+3VS

12

12

R2408

10
9
8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

5

R2408
10K_0402_5%

10K_0402_5%

1 2

R2409 10K_0402_5%R2409 10K_0402_5%

1 2

R2410 10K_0402_5%R2410 10K_0402_5%

1

C2423

C2423

2

0.01U_0402_16V7K

0.01U_0402_16V7K

+5VS

TP_DATA

TP_CLK

VR_A
VR_B

VR_A_R

R2407

R2407

10K_0402_5%

10K_0402_5%

VR_A

VR_B VR_B_R

+5VS

B B

A A

1

C2426

C2426

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

ACES_85201-0805N

ACES_85201-0805N

JTPB1

JTPB1

GND
GND

CONN@

CONN@

+3VS

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C2424

C2424

2

C2420

C2420

5

A2Y

3

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

U2402

U2402

P

NC

4

G

NC7SZ14P5X_NL_SC70-5

NC7SZ14P5X_NL_SC70-5

TP_DATA <40>

TP_CLK <40>

+3VS

12

R2406

R2406
100K_0402_5%

100K_0402_5%

1

2

CD1#

4

C2421

C2421

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

U2403

U2403

1

CD1#

2

D1

3

CP1

4

SD1#

5

Q1

6

Q1#

7

GND

TC74LCX74FT_TSSOP14

TC74LCX74FT_TSSOP14

ENCODER_DIR <40>
ENCODER_PULSE < 40>

10/20 Add D41(ESD request)

TP_DATA +3.3V_CIR

TP_CLK

VCC

CD2#

D2

CP2

SD2#

Q2

Q2#

2

3

D2401

D2401
PJSOT05C_SOT23-3

PJSOT05C_SOT23-3

<ESD>

<ESD>

1

14
13
12
11
10
09

1

08

C2425

C2425

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CIR

+3VALW

R2411

R2411

100_0805_5%

100_0805_5%

CIR@

CIR@

C2428

C2428

4.7U_0805_10V4Z

4.7U_0805_10V4Z

CIR@

CIR@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

12

W=20 mils

1

2

IR1

IR1

CIR@

CIR@

2

Vout

Vcc

4

GND1

GND2

FM-2136SC-5CN(REV)_4P

FM-2136SC-5CN(REV)_4P

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

CIR_RX

1
3

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LID/RTC/CIR

LID/RTC/CIR

LID/RTC/CIR

LA-6931P

LA-6931P

LA-6931P

1

C2427

C2427
1000P_0402_50V7K

1000P_0402_50V7K

2

@

@

1

CIR_RX <40>

35 58Wednesday, October 27, 2010

35 58Wednesday, October 27, 2010

35 58Wednesday, October 27, 2010

1.0

1.0

1.0

A

www.bufanxiu.com

B

C

D

E

220U_6.3 V_M

IO1

<ESD>D2 403

<ESD>

USB20_N 9_1

USB20_P 9_1

1

2

GND

IO1

2

3

220U_6.3 V_M

USB20_N 9_1USB20_P9_1

1

USB20_P 1_1USB20_N1_1

2

2

3

1

+

+

C2429

C2429

2

USB20_N 9_1
USB20_P 9_1

SATA_PT X_C_DRX_P4
SATA_PT X_C_DRX_N4

SATA_DT X_PRX_N4
SATA_DT X_PRX_P4

USB20_N 1_1
USB20_P 1_1

eSATA combine USB Conn

@

R2412 0_ 0402_5%

R2412 0_ 0402_5%

USB20_N 9< 17>

1 1

SATA_PT X_DRX_P4< 13>
SATA_PT X_DRX_N4<13 >

SATA_DT X_C_PRX_N4<13>
SATA_DT X_C_PRX_P4<1 3>

2 2

+5VALW

SYSON#

1

C2437

C2437

4.7U_060 3_6.3V6K

4.7U_060 3_6.3V6K

2

SYSON#<37,43,45 >

3 3

U2404

U2404

1

GND

VOUT

2

VOUT

VIN
VIN3VOUT

4

EN

RT9715B GS_SO8

RT9715B GS_SO8

FLG

8
7
6
5

+USB_VC CD

1 2

R2415

R2415
10K_040 2_5%

10K_040 2_5%

1

C2438

C2438

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

USB_OC# 2 <17>

USB20_P 9<17>

SATA_PT X_DRX_P4
SATA_PT X_DRX_N4

SATA_DT X_C_PRX_N4
SATA_DT X_C_PRX_P4

+USB_VC CD

+USB_VC CD

USB20_N 1< 17>

USB20_P 1<17>

USB20_N 1

USB20_P 1

@

1 2

L2400 W CM-2012-670 T_4PL2400 WCM-2 012-670T_4P

4

4

1

1

1 2

R2413 0 _0402_5%@R2413 0_0402_ 5%@

R2416 0_ 0402_5%

R2416 0_ 0402_5%

3

3

2

2

C2433 0.01U_04 02_16V7KC2433 0 .01U_0402_16V 7K
C2434 0.01U_04 02_16V7KC2434 0 .01U_0402_16V 7K

C2435 0.01U_04 02_16V7KC2435 0 .01U_0402_16V 7K
C2436 0.01U_04 02_16V7KC2436 0 .01U_0402_16V 7K

D2402

<ESD>D2 402

<ESD>

4

PWR

3

IO2

CM1293A -02SR_SOT143-4

CM1293A -02SR_SOT143-4

D2403

4

PWR

3

IO2

CM1293A -02SR_SOT143-4

CM1293A -02SR_SOT143-4

@

@

1 2

L2401 W CM-2012-670 T_4PL2401 WCM-2 012-670T_4P

1

1

4

4

R2417 0 _0402_5%

R2417 0 _0402_5%

1 2

@

@

12
12

12
12

GND

+USB_VC CD

1

C2430

C2430

2

470P_04 02_50V7K

470P_04 02_50V7K

+USB_VC CD

150U_B2 _6.3VM_R35M

150U_B2 _6.3VM_R35M

+USB_VC CD

JSATA1

JSATA1

USB

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

ESATA

7

A-

8

GND

9

B-

10

B+

11

GND

12

GND

13

GND

14

GND

15

GND

FOXCONN -3Q318111-RB10 21-7F

FOXCONN -3Q318111-RB10 21-7F

CONN@

CONN@

1

1

C2432

+

+

C2431

C2431

@

@

2

JUSB2

JUSB2

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020133 GB004M51PZR

SUYIN_020133 GB004M51PZR

CONN@

CONN@

C2432

2

470P_04 02_50V7K

470P_04 02_50V7K

4 4

Security Class ification

Security Class ification

A

B

Security Class ification

2009/08/ 25 2010/08/ 25

2009/08/ 25 2010/08/ 25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 25 2010/08/ 25

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

USB / eSATA

USB / eSATA

USB / eSATA

LA-6931P

LA-6931P

LA-6931P

E

1.0

1.0

1.0

of

36 58Wednesd ay, October 27, 20 10

36 58Wednesd ay, October 27, 20 10

36 58Wednesd ay, October 27, 20 10

A

www.bufanxiu.com

+1.5V+5VALW +1.05V

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0603_10V6K

1U_0603_10V6K

C2524

C2524

C2523

C2523

1

1

+5VALW

2

2

1 1

Vout=0.8(1+10K/32.4K)

1.042 ~ 1.0469 ~ 1.0519V
Spec: 0.9975 ~ 1.05 ~ 1.1025

+1.5V to +1.05V Transfer

+5VALW

+1.5V

SYSON

R2488 5.1K_0402_1%R2488 5.1K_0402_1%

12

U2413

U2413

6

VCNTL

5

VIN

VOUT

9

VIN

VOUT

8

EN

7

POK

GND

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

1

FB

3
4

2

R2489

R2489

1 2

10K_0402_1%

10K_0402_1%

12

R2490

R2490

32.4K_0402_1%

32.4K_0402_1%

+3VALW to +3V Transfer

+3VALW +3V

SYSON<40,45,51>

2 2

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

USB30_CLKREQ#<14>

+3VALW+3VALW

3 3

R2437

10K_0402_5%

R2437

10K_0402_5%

1

C2472

C2472
.1U_0402_16V7K

.1U_0402_16V7K

2

U2408

1 2

SPI_CLK_USB
USB_SO_SPI_SI

12P_0402_50V8J

12P_0402_50V8J

4 4

U2408

8

VCC

7

HOLD#

6

SCK

5

SI

MX25L5121EMC-20G SO8~D

MX25L5121EMC-20G SO8~D

24MHZ_12PF_X5H024000DC1H

24MHZ_12PF_X5H024000DC1H

1

C2474

C2474

2

Pin compare table for support USB remote wakeup or not

Support USB
remote wakeup

Not support USB
remote wakeup

U2414

U2414

3

VIN

SYSON

4

VIN/CE

2

GND

RT9701-PB_SOT23-5

RT9701-PB_SOT23-5

PCIE_PRX_C_DTX_P4<14>
PCIE_PRX_C_DTX_N4<14>

PCIE_PTX_C_DRX_P4<14>
PCIE_PTX_C_DRX_N4<14>

+3VS

G

G

2

Q2405

Q2405

S

S

10K_0402_5%

10K_0402_5%

CS#

SO
WP#
GND

R2440

R2440

100_0402_5%

100_0402_5%

Y2400

Y2400

1 2

AUXDET(Pin J2)

pull high
10k to VDD33

Tied to GND

A

VOUT
VOUT

PCH_PCIE_WAKE#<15,34,39>

SMIB<18>

+3V

13

D

D

R2434

R2434

1
2
3
4

12

USB3_XT2_R

1

C2475

C2475
12P_0402_50V8J

12P_0402_50V8J

2

CSEL(Pin P6)

Tied to GND

pull high
to VDD33

1
5

CLK_PCIE_USB30<14>
CLK_PCIE_USB30#<14>

C2467 .1U_0402_16V7KC2467 .1U_0402_16V7K

1 2

C2468 .1U_0402_16V7KC2468 .1U_0402_16V7K

1 2

PLT_RST#<5,17,34,39,40>

+3V

+3V

R2492 0_0402_5%R2492 0_0402_5 %
R2493 0_0402_5%R2493 0_0402_5 %

R2429 10K_0402_5%R2429 10K_0 402_5%

1 2

1

D2405

D2405

+3V

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

R2491

R2491
10K_0402_5%

10K_0402_5%

1 2

CLKREQ_USB3

+3VALW+3VALW

@

@

R2435

R2435

47K_0402_5%

47K_0402_5%

1 2

1 2

SPI_CS_USB#
USB_SI_SPI_SO

USB3_XT1

USB3_XT2

CLK_48M_USB3_PCH<14>

Place as close as
possibile to
U3.N14 and U3.M14

CLK

Must use 24MHz crystal: mount
Y2400,2440,C2474,C2475

Can use either 48MHz or 24MHz When
use 48MHz clock: mount R2476,R2483

PCIE_PRX_DTX_P4
PCIE_PRX_DTX_N4

R2422 0_0402_5%R2422 0_0402_5%

1 2

R2423 0_0402_5%R2423 0_0402_5%

1 2

1 2
1 2
1 2

1U_0603_10V6K

1U_0603_10V6K

1

2

R2483

R2483
0_0402_5%

0_0402_5%

R2476

0_0402_5%@R2476

0_0402_5%

@

1 2

+3V

CLKREQ_USB3

09/10

SPI_CLK_USB
SPI_CS_USB#

C2471

C2471

USB_SO_SPI_SI
USB_SI_SPI_SO

@

@

12

@

R2438

10K_0402_5%@R2438

10K_0402_5%

1 2

1 2

USB3_XT1
USB3_XT2

R2439

0_0402_5%

R2439

0_0402_5%

R2426 10K_0402_1%R2426 10K_0 402_1%
R2427 100_0402_5%@R2427 100_0402_5%@

R2428 10K_0402_5%R2428 10K_0 402_5%

1 2
1 2

221

B

Close to U2407.D7

10U_0603_6.3V6M

10U_0603_6.3V6M

C2525

C2525

1

2

U2407

U2407

B2

PECLKP

B1

PECLKN

D2

PETXP

D1

PETXN

F2

PERXP

F1

PERXN

H2

PERSTB

K1

PEWAKEB

K2

PECREQB

J2

AUXDET

J1

PSEL

SMIB_R

H1

SMI

P4

SMIB

P5

PONRSTB

M2

SPISCK

N2

SPISCB

N1

SPISI

M1

SPISO

K13

GND

K14

GND

J13

GND

C14

GND

N14

XT1

M14

XT2

P6

CSEL

A1

GND

A2

GND

A3

GND

A4

GND

A5

GND

A7

GND

A9

GND

A11

GND

A13

GND

A14

GND

B3

GND

B4

GND

B5

GND

B7

GND

B9

GND

B11

GND

B13

GND

B14

GND

C1

GND

C2

GND

C3

GND

C10

GND

C11

GND

B

Close to U2407.P13

+3VA

8P_0402_50V8D

8P_0402_50V8D

C2458

0.01U_0402_16V7K

C2458

0.01U_0402_16V7K

C2457

.1U_0402_16V7K

C2457

.1U_0402_16V7K

1

2

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

1

2

+1.05V

L10

L13

1

2

+3V

D10

F13

F14

VDD33

VDD33

VDD33

SPEC Max:+3V---200mA;+1.05V---800mA

Idle mode:0.489W:
+3V

---43mA;+1.05V---328mA

D3

mode:0.066W:

+3V---5.4mA;+1.05V---45mA

PCI Express/ExpressCard select signal
1:others
0:Express Card or Mini card

GND

GND

GNDD3GNDD4GND

GND

GND

GND

GNDE1GNDE2GND

E13

C12

C13

D11

UPD720200AF1-DAP-A

UPD720200AF1-DAP-A

E14

D12

D13

D14

+3VA

.1U_0402_16V7K

@

@

C2459

C2459

L14

VDD33

VDD33

GND

GNDF4GNDF6GNDF7GNDF8GNDF9GND

.1U_0402_16V7K

1

2

R2421

R2421

0_0805_5%

0_0805_5%

1 2

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

F11

F12

C

+1.05VR+3V

C2441 .1U_0402_16V7KC2441 .1U_0402_16V7K

C2443 0.01U_0402_16V7KC2443 0.01U_0402_16V7K

C2442 0.01U_0402_16V7KC2442 0.01U_0402_16V7K

C2445 0.01U_0402_16V7KC2445 0.01U_0402_16V7K

C2444 0.01U_0402_16V7KC2444 0.01U_0402_16V7K

C2446 0.01U_0402_16V7KC2446 0.01U_0402_16V7K

1

1

1

1

1

C2460

@

@

C2462

C2462

1

1

2

2

2

2

7K for customer request, can use other kind
of capacitor, like Y5V.

+1.05VR

E11

E12

VDD10

VDD10H3VDD10H4VDD10L5VDD10

8P_0402_50V8D

8P_0402_50V8D

C2461

0.01U_0402_16V7K

C2461

0.01U_0402_16V7K

C2460

Can be attach to EC, either.

As short as possible

GND

GNDH6GND

GND

GNDH7GNDH8GNDH9GND

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

G9

G11

H12

G13

G12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

J11

1

2

2

2

2

+3VA

P13

D7

H11

K11

K12

L8

VDD10

VDD10

VDD10

U2AVDD10

U3AVDO33

B6

U3TXDP2

A6

U3TXDN2

N8

U2DM2

P8

U2DP2

B8

U3RXDP2

A8

U3RXDN2

G14

OCI2B

H13

OCI1B

H14

PPON2

J14

PPON1

B10

U3TXDP1

A10

U3TXDN1

N10

U2DM1

P10

U2DP1

B12

U3RXDP1

A12

U3RXDN1

P12

RREF

N12

GND

N11

GND

D6

GND

P14

GND

P11

GND

P9

GND

P7

GND

P2

GND

P1

GND

N13

GND

N9

GND

N7

GND

N3

GND

M13

GND

M12

GND

M11

GND

M10

GND

M9

GND

M8

GND

M7

GND

M6

GND

M5

GND

M4

GND

M3

GND

L12

GND

L11

GND

L7

GND

L6

GND

GND

GNDK3GNDK4GNDL1GNDL2GNDL3GND

L4

J12

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

C2450 0.01U_0402_16V7KC2450 0.01U_0402_16V7K

C2449 .1U_0402_16V7KC2449 .1U_0402_16V7K

C2447 .1U_0402_16V7KC2447 .1U_0402_16V7K

1

2

U3TX_C_DP2

U3TX_C_DN2
U2DN2_L

U2DP2_L
U3RXDP2_L

U3RXDN2_L

OC#
USB30_OCI1B

Compal Secret Data

Compal Secret Data

Compal Secret Data

C2451 0.01U_0402_16V7KC2451 0.01U_0402_16V7K

C2448 .1U_0402_16V7KC2448 .1U_0402_16V7K

1

1

1

1

2

2

2

2

C2466 .1U_0402_16V7KC2466 .1U_0402_16V7 K

1 2

1 2

C2469 .1U_0402_16V7KC2469 .1U_0402_16V7K

R2479 10K_0402_5%R2479 10K_0402_5%

1 2

R2480 10K_0402_5%R2480 10K_0402_5%

1 2

R2484 10K_0402_5%R2484 10K_0402_5%

1 2

R2485 10K_0402_5%R2485 10K_0402_5%

1 2

R2432

R2432

1.6K_0402_1%

1.6K_0402_1%

1 2

Deciphered Date

Deciphered Date

Deciphered Date

C2452 0.01U_0402_16V7KC2452 0.01U_0402_16V7K

1

2

C2453 0.01U_0402_16V7KC2453 0.01U_0402_16V7K

C2454 0.01U_0402_16V7KC2454 0.01U_0402_16V7K

1

1

2

2

U3TXDP2_L

U3TXDN2_L

D

C2455 0.01U_0402_16V7KC2455 0.01U_0402_16V7K

1

2

D

For EMI request (need confirm)

R2470 0_0402_5%@R2470 0_0402_5%@

1 2

L2402

U3TXDP2_L

U3TXDN2_L

U3RXDP2_L U3RXDP2

U3RXDN2_L

U2DP2_L

U2DN2_L

USB20_P12<17>

USB20_N12<17>

+USB3_VCCA

U3TXDP2

U3TXDN2
U2DN2

U2DP2
U3RXDP2

U3RXDN2

C2470

C2470

.1U_0402_16V7K

.1U_0402_16V7K

1 2

SYSON#<36,43,45>

L2402

3 4

DLP11TB800UL2L_4P

DLP11TB800UL2L_4P

R2471 0_0402_5%@R2471 0_0402_5%@

1 2

R2472 0_0402_5%@R2472 0_0402_5%@

1 2

L2403

L2403

3 4

DLP11TB800UL2L_4P

DLP11TB800UL2L_4P

R2473 0_0402_5%@R2473 0_0402_5%@

1 2

R2474 0_0402_5%@R2474 0_0402_5%@

1 2

L2404

L2404

1

1

4

4

WCM-2012-670T_4P

WCM-2012-670T_4P

R2475 0_0402_5%@R2475 0_0402_5%@

1 2

+3V

OC#
USB30_OCI1B

U3RXDN2
U3RXDP2
U3TXDN2
U3TXDP2

JUSB1

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7

GND

3

D+

6

SSRX+

4

GND

5

SSRX-

CONN@

CONN@

OCTEK_USB-09EAEB_9P-T

OCTEK_USB-09EAEB_9P-T

+5VALW

SYSON#

Title

Title

Title

USB3.0 PD720200

USB3.0 PD720200

USB3.0 PD720200

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

Date: Sheet of

U3TXDP2

U3TXDN2

12

U3RXDN2

12

U2DP2

2

2

U2DN2

3

3

R2481 0_0402_5%USB2@R2481 0_0402_5%USB2@

1 2

L2407

USB2@L2407

USB2@

2

3

WCM-2012-670T_4P

WCM-2012-670T_4P

R2482 0_0402_5%

R2482 0_0402_5%

BLM18AG601SN1D_2P

BLM18AG601SN1D_2P

1 2

1

2

3

4

USB2@

USB2@

1 2

L2405

L2405

C2465

C2465

10U_0805_6.3V6M

10U_0805_6.3V6M

R2424 10K_0402_5%R2424 10K_0 402_5%

1 2

R2425 10K_0402_5%R2425 10K_0 402_5%

1 2

For ESD request

D2404

D2404

1

R-

2

R+

3

T-

4

T+

LXES4XBAA6_MSOP8

LXES4XBAA6_MSOP8

10

GND

11

GND

12

GND

13

GND

U2409

U2409

1
2

4

RT9715BGS_SO8

RT9715BGS_SO8

GND

VOUT
VOUT

VIN
VIN3VOUT
EN

8
7
6
5

FLG

E

+USB3_VCCA

10U_0805_6.3V6M

10U_0805_6.3V6M

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

1

C2456

C2456

2

+

+

C2463

C2463

2

1

D-case for customer
request
can use B-case,
either.

U2DP2

1

U2DN2

4

+3VA

1

2

+3V

+USB3_VCCA

8

VCC

7

GND

U2DN2

6

D-

U2DP2

5

D+

For customer request

GND_Frame

1 2

R2433 0_0603_5%R 2433 0_0603_5%

1 2

R2436 0_0603_5%R 2436 0_0603_5%

1 2

C2473

C2473

.1U_0402_16V7K

.1U_0402_16V7K

+USB3_VCCA

W=60mils

R2430

R2430

10K_0402_5%

10K_0402_5%

1 2

E

OC#

of

37 58Wednesday, October 27, 2010

37 58Wednesday, October 27, 2010

37 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

4

3

2

1

+3VS

40mil

1

1

10/07

D D

2

1

1

C1303

C1303

C1302

C1300

C1300

1U_0402_6.3V6K

1U_0402_6.3V6K

C1302

C1301

C1301

2

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

These caps close to U2 : Pin 12,37,48

+PCIE_PHY

+3V_MCVCC

2A max

100_0402_5%

100_0402_5%

1

C1322

C1322

2

+PCIE_PHY

+3VS

C1314

C1314

1 2

1U_0402_6.3V6K

1U_0402_6.3V6K

XRSTN

PCIE_PTX_C_DRX_P5
PCIE_PTX_C_DRX_N5

PCIE_PRX_DTX_P5
PCIE_PRX_DTX_N5

UDIO2

XRSTNPLT_RST_BUF#

1

1

C1304

C1304

2

2

10U_0805_10V4Z

10U_0805_10V4Z

1

1

C1305

C1305

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1307

C1307

C1306

C1306

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C1308

C1308

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

These caps close to U2 : Pin 13,19,23,32,47

C C

CLK_PCIE_READER#< 14>
CLK_PCIE_READER<14>

PCIE_PTX_C_DRX_P5<14>
PCIE_PTX_C_DRX_N5<14>

PCIE_PRX_C_DTX_P5<14>
PCIE_PRX_C_DTX_N5<14>

CR_CLKREQ#<14>

B B

PLT_RST_BUF#<17,39>

C1315 0.1U_0402_10V 7KC1315 0.1U_0402_10V7K

1 2

C1317 0.1U_0402_10V 7KC1317 0.1U_0402_10V7K

1 2

C1318 0.022UF_0402_16V7C1318 0.022UF_0402_16V 7
C1319 1500P_0402_50V7KC1319 1500P_0402_50V 7K

8/31

+3VS

12

12

R1305 5.1K_0402_1%R1305 5.1K_0402_1%
R1306 10K_0402_5%R1306 10K_0402_5%

SROM Select: UDIO 2
Pull-Hi: Enable
Pull-Lo: Disable (Current Setting)

12

1 2

R1308 47K_0402_5%R1308 47K_0402_5%

1 2

R1313

R1313

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

MFIO SD8 MS8 XD

D7

BS

WP

00

01 D1

D0

02

D7

03

D6

04

CLK

05

-

06

D5

07

A A

CMD

08

D4

09

D3

10

D2

11

-

12

-

13

-

14

CLK

D6

-

D5

-

D4

D1

D3

D5

D2

-

D1

D0

XDCD0#_SDCD#

D0

D4

WP#

-

WE#

D2

ALE

D6

CLE

-

CE#

D3

RE#

D7

R/B#

XDCD1#_MSCD#

C1324

C1324

270P_0402_50V7K

270P_0402_50V7K

When these pins are both set to Low, the xD
Picture Card is detected.

5

D1300

D1300

2

1

3

DAN202UT106_SC70-3

DAN202UT106_SC70-3

C1325

C1325

270P_0402_50V7K

270P_0402_50V7K

Layout Note:
Place them close to U2

R1303

R1303

1 2

0_0402_5%

0_0402_5%

X1300

R5U232_XI

U2

U2

Power IEEE1394

Power IEEE1394

19

PCIE_VIN

23

PCIE_VIN

13

PCIE_VOUT

32

PCIE_VOUT

47

PCIE_VOUT

12

VCC_3V

37

VCC_3V

48

AVCC_3V

36

MF_VOUT

30

SD18C

PCIe

PCIe

10

PERST#

14

REFCLKP

15

REFCLKN

16

RXP

18

RXN

20

TXP

21

TXN

RXC

17

RXC

CPO

22

CPO

RREF

24

RREF

46

UDIO1

45

UDIO2

44

UDIO3

R5U232-QFN48P_QFN48_6X6

R5U232-QFN48P_QFN48_6X6

GND pad under IC Chip.
5 GND vias required at GND pad.
Pin 21 connect to GND pad on IC-mounted layer.

+3VS

12

R1314

R1314
47K_0402_5%

47K_0402_5%

XD_CD#

C1323

C1323
270P_0402_50V7K

270P_0402_50V7K

X1300

24.576MHZ_16PF_7A24500022~D

24.576MHZ_16PF_7A24500022~D

CardReader

CardReader

GND

GND

XD_ALE_SD_D3_R

4

R5U232_XO_RR5U23 2_XO

TPAP0
TPAN0

TPBP0
TPBN0

TPBIAS0

MFCD0#
MFCD1#

MDIF00
MDIF01
MDIF02
MDIF03
MDIF04
MDIF05
MDIF06
MDIF07
MDIF08
MDIF09
MDIF10
MDIF11
MDIF12
MDIF13
MDIF14

12

TEST

GPAD

2
3

4
5

1

6

XI

7

XO

8
9
25
26
27
28
29
31
33
34
35
38
39
40
41
42
43

11

49

15P_0402_50V8J

15P_0402_50V8J

15P_0402_50V8J

15P_0402_50V8J

C1312

C1312

1 2

C1313

C1313

1 2

R1320

R1320

1 2

30_0402_5%

30_0402_5%

R1321

R1321

1 2

30_0402_5%

30_0402_5%

R1322

R1322

1 2

30_0402_5%

30_0402_5%

R1323

R1323

1 2

30_0402_5%

30_0402_5%

R1324

R1324

1 2

30_0402_5%

30_0402_5%

IEEE1394_TPAP0
IEEE1394_TPAN0

IEEE1394_TPBP0
IEEE1394_TPBN0

IEEE1394_TPBIAS0

R5U232_XO
R5U232_XI

XDCD0#_SDCD#
XDCD1#_MSCD#
XD_D7_MSBS_SDW P
XD_D6_SD_D1_R
XD_D5_SD_D0_R
XD_D4_MS_D1
XD_D3
XD_D2_SDCLK_R
XD_D1_MS_D0
XD_D0
XDWP_SDCMD _R
XDWE#_MS_D2
XD_ALE_SD_D3_R
XD_CLE_SD_D2_R
XDCE_MD_D3
XD_RE
XD_RB_MSCLK_R

Layout Note:
Place them close to U2

XD_D5_SD_D0XD_D5_SD_D0_R

XD_D6_SD_D1XD_D6_SD_D1_R

XD_CLE_SD_D2XD_C LE_SD_D2_R

XD_ALE_SD_D3

XDWP_SDCMDXDWP_SDCMD _R

Memory Card Power

+3V_MCVCC

20mil

1

C1309

C1309

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place them as close as possible to JREAD1
Place C1309 close to U2.36

Layout Note:
Add GND shield for Xtal

GND

GND

Impedance: 50 ohm (Microstrip)

XD_D2_SDCLK

1 2

R1304 30_0402_5%

R1304 30_0402_5%

1 2

C1316 10P_0402_50V8JC1316 10P_0402_50V8J

XD_RB_MSCLK

1 2

R1307 30_0402_5%

R1307 30_0402_5%

1 2

C1320 10P_0402_50V8JC1320 10P_0402_50V8J

Layout Note:
Add GND shield for 1394.

IEEE1394_TPBN0
IEEE1394_TPBP0
IEEE1394_TPAN0
IEEE1394_TPAP0

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Shield GND

Shield GND

Shield GND

Shield GND

IEEE1394_TPBIAS0

@

@

Compal Secret Data

Compal Secret Data

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

2

2

XD_D0
XD_D1_MS_D0
XD_D2_SDCLK
XD_D3
XD_D4_MS_D1
XD_D5_SD_D0
XD_D6_SD_D1
XD_D7_MSBS_SDW P

XDWE#_MS_D2
XDWP_SDCMD
XD_ALE_SD_D3
XD_CD#
XD_RB_MSCLK
XD_RE
XDCE_MD_D3
XD_CLE_SD_D2

C1321

270P_0402_50V7K

C1321

270P_0402_50V7K

5.1K_0402_1%

5.1K_0402_1%

12

1

2

R1310

56_0402_5%

R1310

56_0402_5%

56_0402_5%

56_0402_5%

12

12

56_0402_5%

56_0402_5%

R1318

56_0402_5%

R1318

56_0402_5%

12

12

0.33U_0603_10V7K

0.33U_0603_10V7K

0.01U_0402_16V7K

0.01U_0402_16V7K
C1328

C1328

2

1

1

2

C1310

C1310

2.2U_0402_6.3V6

2.2U_0402_6.3V6

Layout Note:
Place them as close as possible to U2

R1309

R1309

R1311

R1311

R1317

R1317

C1326

C1326

1

1

C1311

C1311

2

2

C1327

C1327

47U_1206_6.3V6M

47U_1206_6.3V6M

0.01U_0402_16V7K

0.01U_0402_16V7K

5 IN 1 CardRead

JREAD1

JREAD1

22

XD-VCC

30

XD10-D0

29

XD11-D1

28

XD12-D2

27

XD13-D3

26

XD14-D4

25

XD15-D5

24

XD16-D6

23

XD17-D7

33

XD07-WE

32

XD08-WP

34

XD06-ALE

39

XD01-CD

38

XD02-R/B

37

XD03-RE

36

XD04-CE

35

XD05-CLE

31

XD GND

40

XD GND

41

SD CD/WP GND

42

SD CD/WP GND

T-SOL_144-1300302600_NR CONN@

T-SOL_144-1300302600_NR CONN@

Layout Note:
Place them as close as possible to JP1394

Reserve them for test
if any EMI issue.

R1312 0_0402_5%R1312 0_0402_5 %

1 2

R1315 0_0402_5%R1315 0_0402_5 %

1 2

R1316 0_0402_5%R1316 0_0402_5 %

1 2

R1319 0_0402_5%R1319 0_0402_5 %

1 2

Layout Note:
Differential pair impedance=110+-6 Ohm
TPAP/N0 and TPBP/N0 mismatch <5mil

2

11

SD4-VDD

18

MS9-VCC

SD5-CLK
SD7-DAT0
SD8-DAT1
SD9-DAT2
SD1-DAT3

SD2-CMD

SD-CD

SD-WP

SD6-VSS

SD3-VSS

MS8-SCLK

MS4-DATA0
MS3-DATA1
MS5-DATA2
MS7-DATA3

MS6-INS

MS2-BS

MS1-VSS
MS10-VSS

IEEE1394_TPBN0_R
IEEE1394_TPBP0_R
IEEE1394_TPAN0_R
IEEE1394_TPAP0_R

Title

Title

Title

R5U232

R5U232

R5U232

e Document Number Rev

Size Document Number Rev

Size Document Number Rev

Siz

Custom

Custom

Custom

LA-6931P

LA-6931P

LA-6931P

Date: Sheet of

Date: Sheet of

Date: Sheet of

XD_D2_SDCLK

9

XD_D5_SD_D0

4

XD_D6_SD_D1

3

XD_CLE_SD_D2

21

XD_ALE_SD_D3

19

XDWP_SDCMD

16

XDCD0#_SDCD#

1

XD_D7_MSBS_SDW P

2

6
13

XD_RB_MSCLK

17

XD_D1_MS_D0

10

XD_D4_MS_D1

8

XDWE#_MS_D2

12

XDCE_MD_D3

15

XDCD1#_MSCD#

14

XD_D7_MSBS_SDW P

7
5
20

Compal Electronics, Inc.

+3V_MCVCC+3V_MCVCC

J1394A

J1394A

4
3
2
1

SUYIN_020015FB004S515ZL

SUYIN_020015FB004S515ZL

CONN@

CONN@

TPB-

TPB+

TPA-

TPA+

GND
GND
GND
GND

8
7
6
5

1

38 58Wednesday, October 27, 2010

38 58Wednesday, October 27, 2010

38 58Wednesday, October 27, 2010

1.0

1.0

1.0

5

www.bufanxiu.com

WLAN

PCH_PCIE_ WAKE#<15,3 4,37>

D D

PCIE_PRX_ DTX_N2<14>
PCIE_PRX_ DTX_P2<14>

C C

MINI1_CLKREQ #<14>

CLK_PCIE_ MINI1#<14>
CLK_PCIE_ MINI1<14>

PLT_RST #<5,17,34 ,37,40>

CLK_PCI_L PC_WLAN<17>

PCIE_PTX_ C_DRX_N2<14 >
PCIE_PTX_ C_DRX_P2< 14>

R2477 0 _0402_5%R2477 0_ 0402_5%
R2478 0 _0402_5%R2478 0_ 0402_5%

+3VS_W LAN

E51TXD_ P80DATA<40>
E51RXD_ P80CLK<40>

4

H=9mm

R2443 0_ 0402_5%

PCH_PCIE_ WAKE# +3VS_W LAN

MINI1_CLKREQ #

CLK_PCIE_ MINI1#
CLK_PCIE_ MINI1

1 2
1 2

PCIE_PTX_ C_DRX_N2
PCIE_PTX_ C_DRX_P2

E51TXD_ P80DATA
E51RXD_ P80CLK

100K_04 02_5%

100K_04 02_5%

1 2

T2400

T2400
T2401

T2401

PCIE_C_RX N2
PCIE_C_RX P2

R2448

R2448

1 2

R2443 0_ 0402_5%

@

@

PAD

PAD
PAD

PAD

JMINI1

JMINI1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

ACES_88 911-5204

ACES_88 911-5204

CONN@

CONN@

GND2

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

3

+3VS_W LAN

LPC_FRA ME#

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

WL_O FF#
PLT_RST _BUF#

D_CK_SC LK
D_CK_SD ATA

USB20_N 4
USB20_P 4

R2444 0 _0402_5%R2444 0_ 0402_5%

1 2

MINI1_LED#

+1.5VS
LPC_FRA ME# <13,4 0>
LPC_AD3 <13 ,40>
LPC_AD2 <13 ,40>
LPC_AD1 <13 ,40>
LPC_AD0 <13 ,40>

D_CK_SC LK <11 ,12,14>
D_CK_SD ATA <11,1 2,14>

USB20_N 4 <17>
USB20_P 4 <1 7>

MINI1_LED#

WL_O FF# <40>
PLT_RST _BUF# <17,38 >

MINI1_LED# <41>

2

R2441 0 _0603_5%R2441 0_ 0603_5%

1 2

R2442 0 _0603_5%

R2442 0 _0603_5%

1 2

@

@

+3VS

(9~16mA)

12

R2445

R2445
10K_040 2_5%

10K_040 2_5%

+3VS
+3VALW

+3VS_W LAN

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C2476

C2476

2

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

+1.5VS

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C2479

C2479

2

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

1

C2477

C2477

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C2480

C2480

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C2478

C2478

C2481

C2481

1

MINI

PCH_PCIE_ WAKE#

B B

+3VS_TV

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C2482

C2482

2

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

E51TXD_ P80DATA
E51RXD_ P80CLK

A A

5

@

@

T2402 PA DT2402 P AD
T2403 PA DT2403 P AD

1

C2483

C2483

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+3VS_TV

R2446

R2446

0_0402_ 5%

0_0402_ 5%

1 2

C2484

C2484

+3VS_TV

R2447 0 _0603_5%R2447 0_ 0603_5%

1 2

H=5.2mm

JMINI2

1

WAKE#

3

RESERVED

5

RESERVED

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

17

RESERVED

19

RESERVED

21

GND

23

PERn0

25

PERp0

27

GND

29

GND

31

PETn0

33

PETp0

35

GND

37

RESERVED

39

RESERVED

41

RESERVED

43

RESERVED

45

RESERVED

47

RESERVED

49

RESERVED

51

RESERVED

53

GND

ACES_88 915-5204

ACES_88 915-5204

4

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

RESERVED

SMB_DATA

LED_WWAN#

LED_WLAN#
LED_WPAN#

CONN@JM INI2

CONN@

3.3V

GND

1.5V

GND

PERST#

+3.3Vaux

GND

+1.5V

SMB_CLK

GND

USB_D-

USB_D+

GND

+1.5V

GND

+3.3V

GND

+3VS

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

+3VS_TV

PLT_RST _BUF#

D_CK_SC LK
D_CK_SD ATA

USB20_N 5
USB20_P 5

USB20_N 5 <17>
USB20_P 5 <1 7>

10/20

08/26

Security Class ification

Security Class ification

Security Class ification

2009/08/ 25 2010/08/ 25

2009/08/ 25 2010/08/ 25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 25 2010/08/ 25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

WLAN&MINI

WLAN&MINI

WLAN&MINI

LA-6931P

LA-6931P

LA-6931P

1

1.0

1.0

1.0

39 58Wednesd ay, October 27, 20 10

39 58Wednesd ay, October 27, 20 10

39 58Wednesd ay, October 27, 20 10

5

www.bufanxiu.com

R2206

@R2206

@

33_0402_5%

33_0402_5%

8/31

1

C2214

C2214

15P_0402_50V8J

15P_0402_50V8J

2

PCH_PWROK

PCH_APWROK

VR_ON

PLT_RST#

CLK_PCI_LPC

12

EC_RST#

KSO1

KSO2

EC_SMI#

EC_SMB_DA1

EC_SMB_CK1

EC_SMB_CK2

EC_SMB_DA2

EC_SCI#

ENCODER_PULSE

+3VALW

KSI[0..7]<41>

KSO[0..17]<41>

SUSCLK<15>

ACIN_BUF<23>

R2237 10K_0402_5%R2237 10K_0 402_5%

1 2

R2232 10K_0402_5%R2232 10K_0 402_5%

1 2

R2207 10K_0402_5%R2207 10K_0 402_5%

1 2

R2227 100K_0402_5%R2227 100K_0402_5%

1 2

D D

+3VALW

+3VALW

C C

C2207

@C2207

@

22P_0402_50V8J

22P_0402_50V8J

12

R2208 47K_0402_5%R2208 47K_0 402_5%

C2208 0.1U_0402_16V4ZC2208 0.1U_0402_16V4Z

12

12

10/1 ENE Recomma nd

R2210 47K_0402_5%R2210 47K_0402_5%

1 2

R2211 47K_0402_5%R2211 47K_0402_5%

1 2

R2213 10K_0402_5%R2213 10K_0402_5%

1 2

R2215 2.2K_0402_5%R2215 2.2K_0402_5%

1 2

R2216 2.2K_0402_5%R2216 2.2K_0402_5%

1 2

R2217

@R2217

12

@

33_0402_5%

33_0402_5%

1 2

C2211

@ C2211

@

22P_0402_50V8J

22P_0402_50V8J

Reserve for EMI please close to U38

+3VS

R2218 2.2K_0402_5%R2218 2.2K_0402_5%

1 2

R2219 2.2K_0402_5%R2219 2.2K_0402_5%

1 2

R2224 10K_0402_5%R2224 10K_0402_5%

1 2

R2238 10K_0402_5%R2238 10K_0402_5%

1 2

B B

15P_0402_50V8J

15P_0402_50V8J

+3VALW

A A

Ra

Rb

EC_XCLK1

1

C2213

C2213

R2230

R2230
100K_0402_5%

100K_0402_5%

1 2

AD_BID0

12

R2231

R2231
33K_0402_5%

33K_0402_5%

1

2

2

Y2200

Y2200

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

Board ID

Analog Board ID definition,
Please see page 3.

1

C2217

C2217

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

EC_XCLK0

OSC4OSC

NC3NC

9/24

5

0_0805_5%

0_0805_5%

1 2

EC_SMB_CK1<50>

EC_SMB_DA1<50>

PWR_SAVE_LED#<30>

E51TXD_P80DATA<39>
E51RXD_P80CLK<39>

PWR_SUSP_LED#<41>

4

R2200

R2200

C2200

0.1U_0402_16V4Z

C2200

0.1U_0402_16V4Z

1

2

GATEA20<18>

EC_KBRST#<18>

SERIRQ<13>

LPC_FRAME#<13,39>

LPC_AD3<13,39>
LPC_AD2<13,39>
LPC_AD1<13,39>
LPC_AD0<13,39>

CLK_PCI_LPC<17>

PLT_RST#<5,17,34,37,39>

EC_SCI#<18>
FP_LED#<44>

KSI[0..7]

KSO[0..17]

EC_SMB_CK2<14,23>
EC_SMB_DA2<14,23>

PM_SLP_S3#<15>
PM_SLP_S5#<15>

EC_SMI#<18>

EC_PME#<34>

WL_OFF#<39>

SUSWARN#<15>
INVT_PWM<30>
FAN_SPEED1<44>
PCH_PWR_EN<45>

ON/OFF<41>

NUM_LED#<41>

1 2

R2229 0_0402_5%

R2229 0_0402_5%

close to U38

4

4

C2201

0.1U_0402_16V4Z

C2201

0.1U_0402_16V4Z

1

1

2

2

GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_LPC
PLT_RST#
EC_RST#
EC_SCI#
FP_LED#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
EC_PME#
PWR_SAVE_LED#
WL_OFF#
SUSWARN#
INVT_PWM
FAN_SPEED1
PCH_PWR_EN
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF

NUM_LED#

@

@

+3VALW

5

U28

U28

2

P

B

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

3

C2202

0.1U_0402_16V4Z

C2202

0.1U_0402_16V4Z

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_XCLK1

C2203

0.1U_0402_16V4Z

C2203

0.1U_0402_16V4Z

1

2

2

1

1
2
3
4
5
7
8

10

12
13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

EC_ACIN

+3VALW_EC

C2205

1000P_0402_50V7K

C2205

1000P_0402_50V7K

C2204

1000P_0402_50V7K

C2204

1000P_0402_50V7K

2

1

U38

U38

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1

LPC & MISC

LPC & MISC

LAD0

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

XCLK1
XCLK0

Int. K/B

Int. K/B
Matrix

Matrix

SM Bus

SM Bus

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

L2200

L2200
FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1 2

9

22

VCC

VCC

PS2 Interface

PS2 Interface

GND

11

Issued Date

Issued Date

Issued Date

+EC_VCCA

67

33

96

111

125

VCC

VCC

VCC

VCC

AVCC

INVT_PWM/PWM 1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

PWM Output

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

DA Output

DA Output

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

GPIO

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

ICH_PWROK/GPXO06

GPO

GPO

GPIO

GPIO

PM_SLP_S4#/GPXID1

GPI

GPI

GND

GND

AGND

GND

GND

KB930QF A1 LQFP 128P

24

KB930QF A1 LQFP 128P

35

69

94

113

20mil

FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

3

ECAGND

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

IREF/DA2/GPIO3E

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SPICLK/GPIO58

CIR_RX/GPIO40

SYSON/GPIO56

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

ENBKL/GPXID2

2

For WLAN S witch

KSI1

4
6

1

C2206

C2206

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

ECAGND

For Back u p Key Swit ch

KSI2

4
6

09/08

FAN_PWM

21

BEEP#

23

PCH_DPWROK

26

ACOFF

27

BATT_TEMP

63

AD_BID0

64

ADP_I

65

ARCADE_BTN#

AD3/GPIO3B

SDIDI/GPXID0

AC_IN/GPIO59

66

ENCODER_PULSE

75

AD4/GPIO42

DA3/GPIO3F

SPIDI/RD#

SPIDO/WR#

SPICS#

GPXO10
GPXO11

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

V18R

L2201

L2201

2009/12/01 2010/12/31

2009/12/01 2010/12/31

2009/12/01 2010/12/31

IMON_R

76

65W/90W#

68
70

IREF

71

CALIBRATE#

72

EC_MUTE#

83

3S/4S#

84

BACKUP_LED#

85

H_PROCHOT#_EC

86

TP_CLK

87

TP_DATA

88

GFX_CORE_PWRGD

97
98

HDA_SDO

99

LID_SW#

109

FRD#_R

119

FWR#_R

120

SPI_CLK_R

126

FSEL#_R

128

EC_RCIRRX

73

EC_PECI

74

FSTCHG

89

BATT_AMB_LED#

90

CAPS_LED#

91

BATT_BLUE_LED#

92

PWR_LED#

93

SYSON

95

VR_ON

121

EC_ACIN

127

PCH_RSMRST#

100

LID_SW_OUT#

101

EC_ON

102

RF_DISABLE#

103

PCH_PWROK

104

BKOFF#

105

CPU1.5V_S3_GATE

106

PCH_APWROK

107

SA_PGOOD

108

PM_SLP_S4#

110

ENBKL

112

EAPDPWR_SUSP_LED#

114

POWER_SMART#

115

SUSP#

116

PBTN_OUT#

117

ENCODER_DIR

118

+V18REC_XCLK0

124

12

C2209 100P_0402_50V8 JC2209 100P_0402_50V8J

R2212 0_0402_5%R2212 0_0402_5 %

R2220 0_0402_5%R2220 0_0402_5%
R2221 33_0402_5%R2221 33_0402_5%
R2223 33_0402_5%R2223 33_0402_5%
R2225 33_0402_5%R2225 33_0402_5%

R2226 43_0402_1%R2226 43_0402_ 1%

1

C2216

C2216

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

BEEP# <42>

PCH_DPWROK <15>

ACOFF <47,48>

12

12

65W/90W# <48,50>

IREF <48>
CALIBRATE# <48>

EC_MUTE# <43>
3S/4S# <48>

BACKUP_LED# <41>

TP_CLK <35>
TP_DATA <35>

GFX_CORE_PWRGD <56>

HDA_SDO <13>
LID_SW# <35 >

1 2
1 2
1 2
1 2

1 2

FSTCHG <48>
BATT_AMB_LED# <41>

CAPS_LED# < 41>

BATT_BLUE_LED# <41>

PWR_LED# <41>

SYSON <37,45,51>
VR_ON <56>

PCH_RSMRST# <15>
LID_SW_OUT# <14>
EC_ON <41,49>
RF_DISABLE# <43>
PCH_PWROK <15>
BKOFF# <30>
CPU1.5V_S3_GATE <9 >
PCH_APWROK <15>
SA_PGOOD <52>

ENBKL <16>

EAPD <42>

SUSP# <9,45,46,51,53>
PBTN_OUT# <15>
ENCODER_DIR <35>

FAN_PWM <44>

PM_SLP_S4# <1 5>

POWER_SMART# <30>

2

SW3

SW3

KSO6

1

221

3

G

G

5

G

G

NTC317-AB1G-C220C_2P

NTC317-AB1G-C220C_2P

SW4

SW4

KSO6

1

221

3

G

G

5

G

G

NTC317-AB1G-C220C_2P

NTC317-AB1G-C220C_2P

ECAGND

BATT_TEMP < 50>

ADP_I <48 ,50>
ARCADE_BTN# <30>
ENCODER_PULSE < 35>

IMVP_IMON <56>

FRD#
FWR#
SPI_CLK
FSEL#

H_PECI <5,18>

1

EC_MUTE#

65W/90W#

3S/4S#

TP_CLK

TP_DATA

R2209 200K_0402_5%R2209 200K_0402_5%

D2200 CH751H-40PT_SOD32 3-2D2200 CH751H-40PT_SOD323-2

EC_ACIN

C2210 100P_0402_50V8JC2210 100P_0402_50V8J

H_PROCHOT#_EC

R2240

R2240

100K_0402_5%

100K_0402_5%

VR_HOT#<56> H_PROCHOT# <5,50>

LID_SW#

CIR_RX<35>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SPI_CLK_R

R2201 10K_0402_5%@R2201 10K_0402_5%@

R2202 100K_0402_5%R2202 100K_0402_5%

R2203 100K_0402_5%R2203 100K_0402_5%

R2204 4.7K_0402_5%R2204 4.7K_0402_5%

R2205 4.7K_0402_5%R2205 4.7K_0402_5%

12

2 1

12

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

U2202

U2202

P

2

Y

A

12

VR_HOT#

G3NC

SN74LVC1G06DCKR_SC70-5

SN74LVC1G06DCKR_SC70-5

1

R2214

R2214

0_0402_5%

0_0402_5%

R2222 100K_0402_5%R2222 100K_0402_5%

08/26

+3VALW

20mils

1

C2212

C2212

2

FSEL#

SPI_CLK

@R2228

@

22_0402_5%

22_0402_5%

1 2

1 2

C2218

C2218

1 2

4

12

R2239

R2239

10K_0402_5%

10K_0402_5%

D2201

D2201

21

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

SPI ROM

U2201

U2201

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

1M W25X10BVSNIG SOP 8P

1M W25X10BVSNIG SOP 8P

R2228

12

12

12

12

+3VALW

ACIN <15,45,48>

10/02
Follow PAW00

12

+3VALW

1 2

EC_RCIRRX

VSS

Q

C2215

@C2215

@

100P_0402_50V8J

100P_0402_50V8J

1 2

+3VALW

4

2

+5VS

+3VALW

FRD#FWR#

Reserve for EMI please close to U2201

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

EC ENE-KB930

EC ENE-KB930

EC ENE-KB930

LA-6931P

LA-6931P

LA-6931P

1

40 58Wednesday, October 27, 2010

40 58Wednesday, October 27, 2010

40 58Wednesday, October 27, 2010

1.0

1.0

1.0

+3VS

www.bufanxiu.com

+3VS

LED

R2451 1K_0402_5%R2451 1K_0402_5%

1 2

CAPS_LED#<40>
NUM_LED#<40>

1 2

R2452 1K_0402_5%R2452 1K_0402_5%

CP2403

@CP2403

KSO10
KSO9
KSO8
KSO7

KSI4
KSI3
KSI2
KSI1

KSO14
KSO13
KSO12
KSO11

@

2
3
4 5

100P_1206_8P4C_50V8K

100P_1206_8P4C_50V8K

CP2402

@CP2402

@

2
3
4 5

100P_1206_8P4C_50V8K

100P_1206_8P4C_50V8K

CP2401

@CP2401

@

2
3
4 5

100P_1206_8P4C_50V8K

100P_1206_8P4C_50V8K

9/08

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

+3VALW

+3VS

+3VALW

81
7
6

81
7
6

81
7
6

+3VS

JKB1

JKB1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

ACES_85202-3005N

ACES_85202-3005N

R2455

R2455

1 2

150_0402_5%

150_0402_5%

R2456

R2456

1 2

220_0402_5%

220_0402_5%

R2457

R2457

1 2

220_0402_5%

220_0402_5%

R2458

R2458

1 2

300_0402_5%

300_0402_5%

R2459

R2459

@

@

1 2

150_0402_5%

150_0402_5%

R2460

R2460

1 2

150_0402_5%

150_0402_5%

31

G1

32

G2

CONN@

CONN@

LED1

LED1

2 1

HT-191UD_Amber_0603

HT-191UD_Amber_0603

LED2

LED2

HT-191NB5-DT_BLUE

HT-191NB5-DT_BLUE

LED3

LED3

HT-191NB5-DT_BLUE

HT-191NB5-DT_BLUE

place close to LED4

LED4

LED4

2 1

B

B

4 3

A

A

HT-297UD5-CB5_AMBER-BLUE

HT-297UD5-CB5_AMBER-BLUE

INT_KBD Conn.

KSI[0..7]

KSO[0..17]

CP2404

@CP2404

KSO6
KSO5
KSO4
KSO3

KSI0
KSO17
KSO16
KSO15

KSO2

KSO1

KSO0

KSI5

KSI6

KSI7

12

12

@

2
3
4 5

100P_1206_8P4C_50V8K

100P_1206_8P4C_50V8K

CP2405

@CP2405

@

2
3
4 5

100P_1206_8P4C_50V8K

100P_1206_8P4C_50V8K

C2501 100P_0402_50V8JC2501 100P_0402_50V8J

1 2

C2503 100P_0402_50V8JC2503 100P_0402_50V8J

1 2

C2505 100P_0402_50V8JC2505 100P_0402_50V8J

1 2

C2507 100P_0402_50V8J@C2507 100P_0402_50V8J@

1 2

C2509 100P_0402_50V8J@C2509 100P_0402_50V8J@

1 2

C2511 100P_0402_50V8J@C2511 100P_0402_50V8J@

1 2

MINI1_LED#

BACKUP_LED#

PCH_SATALED#

PWR_LED#

PWR_SUSP_LED#

KSI[0..7] <40 >

KSO[0..17] <40>

81
7
6

81
7
6

MINI1_LED# <39>

BACKUP_LED# <40>

PCH_SATALED# < 13>

PWR_SUSP_LED# <40>

Power Button

ON/OFF switch

SW1

SW1
EVQPLHA15_4P

EVQPLHA15_4P

3

4

5

Power Conn

PWR_LED#

ON/OFFBTN#

ON/OFFBTN#

EC_ON<40,49>

ON/OFFBTN#

6

1 2

1

2

C2485100P _0402_50V8J C24 85100P_0402_50V8J

12/7 Add C2485=100pF(Avoid noise)

+3VALW

+5VALW

PWR_LED#<40>
BATT_BLUE_LED#<40>
BATT_AMB_LED#<40>

D2407

<ESD>D240 7

<ESD>

2

3

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

1

R2454 0_0402_5%@ R2454 0_0402_5%@

1 2

ON/OFFBTN#

PWR_LED#
BATT_BLUE_LED#
BATT_AMB_LED#

+3VALW

R2449

R2449

100K_0402_5%

100K_0402_5%

1 2

D2406

D2406

2

1

3

13

D

D

2

G

G

S

S

1 2

EC_ON

R2450

R2450

10K_0402_5%

10K_0402_5%

DAN202UT106_SC70-3

DAN202UT106_SC70-3

10/07

JP15

JP15

1

1

G1

2

2

3

3

4

4

5

5

6

6

G2

ACES_88231-06001

ACES_88231-06001

CONN@

CONN@

BATT_AMB_LED# BATT_BLUE_LED#

1

C2486

C2486

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

51ON#

Q2401

Q2401
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

7

8

ON/OFF <40>

51ON# <30,47>

1

2

09/09
For ESD

C2487

C2487

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power OK, I/O Port & K/B Connector

Power OK, I/O Port & K/B Connector

Power OK, I/O Port & K/B Connector

LA-6931P

LA-6931P

LA-6931P

41 58Wednesday, October 27, 2010

41 58Wednesday, October 27, 2010

41 58Wednesday, October 27, 2010

1.0

1.0

1.0

A

www.bufanxiu.com

1 2

R1100 47K_0402_5%R1100 47K_0 402_5%

1 2

R1102 47K_0402_5%R1102 47K_0 402_5%

R1147

R1147

4.7K_0402_5%

4.7K_0402_5%

1 2

HDA_RST#_AUDIO

1

2

MIC_PLUG#<43>

HP_PLUG#<43>

1 1

2 2

3 3

HDA_SPKR<13>

ESD

0.01U_0402_16V7K

0.01U_0402_16V7K

BEEP#<40>

+3VS

C1116

C1116

@

@

LINEIN_PLUG#<43>

Sense Pin Impedance Codec Signals

SENSE A

4 4

SENSE B

A

20K

39.2K

20K

B

1

12

C1105

C1105

R1103

R1103

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10K_0402_5%

10K_0402_5%

2

capacitor close to CODEC as possible

Place close to Codec

R1106 20K_0402_1%R1106 20K_0 402_1%

R1107 39.2K_0402_1%R1107 39.2K_0402_1%

R1108 20K_0402_1%R1108 20K_0 402_1%

12

12

12

PORT-A (PIN 39, 41)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

PORT-E (PIN 32, 34)

T-F (PIN 33, 35)

POR

PORT-H (PIN 37)

B

MONO_INMONO_IN_1

1 2

C1101 0.1U_040 2_16V4ZC1101 0.1U_0402_16V4Z

+VDDA

1 2

R1146 0_0805_5%R1146 0_0805_5%

LINE_L<43>

LINE_R<43>

C1112

C1112

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

MIC1_LFE_L<43>

MIC1_CEN_R<43>

HDA_RST#_AUDIO<13>

HDA_SYNC_AUDIO<13>

HDA_SDOUT_AUDIO<13>

EAPD<40>

SPDIF<43>

C

C1100

C1100

10U_0805_10V4Z

10U_0805_10V4Z

LINE_L

C1110 4.7U_0603_6.3V6KC1110 4.7U_0603_6.3V6K

LINE_R

C1111 4.7U_0603_6.3V6KC1111 4.7U_0603_6.3V6K

1

2

DMIC_DATA<43>

C

MIC1_LFE_L

MIC1_CEN_R

@

@

C1120

C1120

1 2

10P_0402_50V8J

10P_0402_50V8J

HD Audio Codec

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1109

C1109

2

1 2

1 2

C1114

C1114

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1 2

C1115 4.7U_0603_6.3V6KC1115 4.7U_0 603_6.3V6K

1 2

C1117 4.7U_0603_6.3V6KC1117 4.7U_0 603_6.3V6K

DMIC_DATA

FBMA-10-100505-301T_0402

FBMA-10-100505-301T_0402

10P_0402_50V8J

10P_0402_50V8J

1

1

2

2

40mil

1

2

LINE_C_L

LINE_C_R

MIC1_C_L

MONO_IN

HDA_RST#_AUDIO

HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

SENSE_A

<EMI>

<EMI>

L1105

L1105

12

@

@

C1121

C1121

DGND

D

+AVDD_HDA

U67

U67

14

LINE2-IN-L(PORT-E-IN-L)

15

LINE2-IN-R(PORT-E-IN-R)

16

MIC2-IN-L(PORT-F-IN-L)

17

MIC2-IN-R(PORT-F-IN-R)

23

LINE1-L(PORT-C-L)

24

LINE1-R(PORT-C-R)

29

CBP

30

CBN

31

CPVEE

21

MIC1-L(PORT-B-L)

22

MIC1-R(PORT-B-R)

12

PCBEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

SPDIFO2

2

GPIO0_DMIC-1/2

13

SENSE A

36

SENSE B

47

EAPD

48

SPDIFO1

3

GPIO0_DMIC-3/4

4

DVSS

7

DVSS

38

AVDD125AVDD2

ALC669X-GR_LQFP48_7X7

ALC669X-GR_LQFP48_7X7

E

+5VS

15mil

0.1U_0402_16V4Z

0.1U_0402_16V4Z

9

1

DVDD

DVDD_IO

LINE2-OUT-L

LINE2-OUT-R

SURR-L(PORT-A-L)

SURR-R(PORT-A-R)

MIC2-OUT-L

MIC2-OUT-R

MONO-OUT

BITCLK

SDATA_IN

MIC1-VREFO

LINE1_VREFO

LINE2_VREFO

DMIC-CLK1/2

DMIC-CLK3/4

MIC2_VREFO

VREF

JDREF

AVSS1
AVSS2

L1101

L1101

1 2

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

+3VS_DVDD

1

C1107

C1107

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

HP_LEFT-FRONT_LEFT

HP_RIGHT-FRONT_RIGHT

AMP_LEFT

AMP_RIGHT

WOOFER_MONO

For EMI

HDA_SDIN0_R

10mil

DMIC_CLK_IN

CODEC_VREF

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

R1109

R1109

20K_0402_1%

20K_0402_1%

1

2

NC

1

C1106

C1106

2

10U_0805_10V4Z

10U_0805_10V4Z

34

32

39

41

35

33

37

43

6

8

28

18

20

46

44

19

27

JDREF

40

26
42

F

+5VAMP

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1102

C1102

2

L1103

L1103

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603

C1108

C1108

HP_LEFT-FRONT_LEFT <43>

HP_RIGHT-FRONT_RIGHT <43>

AMP_LEFT <43>

AMP_RIGHT <43>

LINE_LEFT-SURR_LEFT_R <43>

LINE_RIGHT-SURR_RIGHT_R <43>

WOOFER_MONO <43>

1 2

R1104 27_0402_5%R1104 27_0402_5%

HDA_BITCLK_AUDIO

1 2

R1105 33_0402_5%R1105 33_0402_5%

MIC1_VREFO

<EMI>

<EMI>

L1104 FBMA-10-100505-301T_0402

L1104 FBMA-10-100505-301T_0402

1 2

10mil

1

2

1

C1119

C1119
10U_0805_10V4Z

10U_0805_10V4Z

2

@

@

C1118

C1118

AGND

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

E

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

F

1

C1103

C1103

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+3VS

1 2

HDA_SDIN0MIC1_C_R

G

@

@

1 2

R1101 0_0805_5%

R1101 0_0805_5%

U66

60mil 40mil

C1113

C1113
33P_0402_50V8K

33P_0402_50V8K

HDA_BITCLK_AUDIO <13>

HDA_SDIN0 <13>

U66

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

G9191-475T1U_SOT23-5

(output = 300 mA)

DMIC_CLK <43>

5

+VDDA

4

<EMI>

<EMI>

1 2

R1110 0_0805_5%

R1110 0_0805_5%

<EMI>

<EMI>

1 2

R1111 0_0805_5%

R1111 0_0805_5%

1 2

R1112 0_0805_5%R1112 0_0805_5%

1 2

R1113 0_0805_5%

R1113 0_0805_5%

1 2

R1114 0_0805_5%R1114 0_0805_5%

1 2

R1115 0_0805_5%

R1115 0_0805_5%

4.75V

@

@

1 2

C1104

C1104

0.01U_0402_16V7K

0.01U_0402_16V7K

@

@

@

@

GND GNDA

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

HD Audio Codec ALC669X

HD Audio Codec ALC669X

HD Audio Codec ALC669X

LA-6931P

LA-6931P

LA-6931P

G

H

42 58Wednesday, October 27, 2010

42 58Wednesday, October 27, 2010

42 58Wednesday, October 27, 2010

H

09/10
For ESD

of

1.0

1.0

1.0

A

www.bufanxiu.com

+5VAMP

R1117

Q1101

Q1101
AO3413_SOT23-3

AO3413_SOT23-3

S

S

G

G

1 1

+5VSPDIF

2

D

D

1 3

20mil

Audio AMP

100K_0402_5%

100K_0402_5%

@ R1120

@

100K_0402_5%

100K_0402_5%

2 2

AMP_LEFT<42>

AMP_RIGHT<42>

R1117
100K_0402_5%

100K_0402_5%

1 2

SPDIF_PLUG#

SPDIF_PLUG#

9/28

10 dB

12

R1118

R1118

12

R1120

1 2

C1124 3300P_0402_50VC1124 3300P_0402_50V

1 2

C1125 3300P_0402_50VC1125 3300P_0402_50V

HPF 600Hz

3/3 Change value of C11 24/C1125 from 3900pF to 3300pF(Audio sug gest)

+5VAMP

R1116

R1116
100K_0402_5%

100K_0402_5%

1 2
61

2

+5VAMP

12

R1119

@ R1119

@

100K_0402_5%

100K_0402_5%

12

R1121

R1121
100K_0402_5%

100K_0402_5%

R1122 0_0603_5%R1122 0_0603_5%

1 2

1 2

R1123 0_0603_5%R1123 0_0603_5%

C1126 0.01U_0402_16V7KC1126 0.01U_0402_16V7K

1 2

C1127 0.01U_0402_16V7KC1127 0.01U_0402_16V7K

1 2

5

Q1100A

Q1100A
DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

GAIN0

GAIN1

AMP_R_LEFTAMP_C_LEFT

AMP_R_RIGHTAMP_C_RIGHT

10/20

HP_PLUG#

3

Q1100B

Q1100B
DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

4

+5VAMP

C1122

C1122

10U_0805_10V4Z

10U_0805_10V4Z

U68

U68

16

VDD

6

PVDD

15

PVDD

GAIN0

2

GAIN0

GAIN1

3

GAIN1

5

LIN-

17

RIN-

9

LIN+

7

RIN+

TPA6017A2PWPR_TSSOP20

TPA6017A2PWPR_TSSOP20

HP_PLUG# <42>

Digital MIC CONN

JMIC1

DMIC_DATA_R
+3VS_DMIC
DMIC_CLK_R

+3VS

3 3

L1108

L1108

MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

12/7 Add C1132=@100pF (Avoid noise)

Subwoofer Conn.

4 4

WOOFER_MONO<42>

3/31 Change value of R1 145 from 4.7K
ohm to 5.62K ohm(Aud io suggest)

JMIC1

1

1

2

2

3

5

3

G1

4

6

4

G2

ACES_88266-04001

ACES_88266-04001

CONN@

CONN@

+3VS_DMIC

@

@

DMIC_CLK_R

C1132100P_0402_50V8J

C1132100P_0402_50V8J

1 2

Fc(high)= 482Hz

R1144

R1144
1K_0402_1%

1K_0402_1%

1 2

1 2

C1141

C1141

1U_0603_10V6K

1U_0603_10V6K

A

C1136

C1136
10U_0805_10V4Z

10U_0805_10V4Z

1 2

C1137

C1137

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

R1145

R1145

1 2

5.62K_0402_1%

5.62K_0402_1%

1

C1144

C1144

0.022U_0603_25V

0.022U_0603_25V

2

1

C1145

C1145

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2

C1135

C1135

<EMI>

<EMI>

1000P_0402_50V7K

1000P_0402_50V7K

WOOFER_IN-

WOOFER_IN+

DMIC_CLK<42>

DMIC_DATA<42>

@

@

R1136

R1136

12

10K_0402_5%

10K_0402_5%

<EMI>

<EMI>

+5VS

Gain = 5.1dB(BTL Mode)

Fc(low)= 2KHz

R1141 1.8K_0402_5%R1141 1.8K_0402_5%

1 2

C1138 0.033U_0603_25VC1138 0.033U_0603_25V

1 2

U1104

U1104

6

VDD

SHUTDOWN#

4

IN-

3

IN+

2

BYPASS

APA3011XA-TRL_MSOP8

APA3011XA-TRL_MSOP8

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C1123

C1123

2

2

SHUTDOWN

R1134 0_0603_5%R1134 0_0603_5%

R1135 0_0603_5%R1135 0_0603_5%

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

@

@

DMIC_CLK

12

Vo+

Vo-

GND
GND

B

12

NC

EC_MUTE#

19

SPKL-

8

LOUT-

ROUT-

LOUT+

ROUT+

BYPASS

1

5

8

7
9

B

GND
GND
GND
GND
GND

SPKR-

14

SPKL+

4

SPKR+

18

1
11
13
20
21

10

DMIC_CLK_R

DMIC_DATA_R

Keep 10 mil width

AMP_BYPASS

2

3

D1103

D1103

@

@

1

3/31 Change value of C1 138 from 0.1uF to

0.033uF(Audio suggest)

EC_MUTE#

WOOFER+
WOOFER-

30mil

SPK_L-

SPK_R-

SPK_R+

EC_MUTE# <40>

2

C1129

C1129

0.47U_0603_10V7K

0.47U_0603_10V7K

1

JP1

JP1

1

1

2

2

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001

CONN@

CONN@

Int. Speaker Conn.

D1101

D1101

2

3

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

D1102

D1102

2

3

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

1

C

20mil

R1124 0_0603_5%R1124 0_0603_5%

SPKL+

1 2

SPKL-

R1125 0_0603_5%R1125 0_0603_5%

1 2

SPKR+SPK_L+

R1126 0_0603_5%R1126 0_0603_5%

1 2

R1127 0_0603_5%R1127 0_0603_5%

SPKR-

1 2

SPK_L+
SPK_L­SPK_R+
SPK_R-

JP11

JP11

1

1

2

2

3

5

3

G1

4

6

4

G2

ACES_88266-04001

ACES_88266-04001

CONN@

CONN@

D

9/17 ESD Suggest

C1128

C1128

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12/11 Change Bom structure of D27 to mount(EMI suggest)

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

SYSON#<36,37,45>

MIC1_CEN_R<42>

MIC1_LFE_L<42>

D

HP_RIGHT-FRONT_RIGHT

1 2

1 2

1K_0603_5%

1K_0603_5%

1 2

1 2

1K_0603_5%

1K_0603_5%

HP_RIGHT-FRONT_RIGHT<42>

HP_LEFT-FRONT_LEFT<42>

LINE_LEFT-SURR_LEFT_R<42>

LINE_RIGHT-SURR_RIGHT_R<42>

LINE_R<42>

LINE_L<42>

For ESD
I/O status:
a. input/output mount 75 ohm
b. input only mo unt 1K ohm

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SPDIF_PLUG#

SPDIF

+5VALW

C2519

C2519

R1130

R1130

75_0402_1%

75_0402_1%

R1131

R1131

75_0402_1%

75_0402_1%
R1132

R1132

R1133

R1133

+5VSPDIF

+BT_VCC

D1100

D1100

2

3

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

USB Switch

1

2

SYSON#

MIC1_VREFO

R1128

R1128

56.2_0603_1%

56.2_0603_1%

1 2

1 2

R1129

R1129

56.2_0603_1%

56.2_0603_1%

LINE_RIGHT-SURR_RIGHT

LINE_LEFT-SURR_LEFT

LINEIN_PLUG#<42>
MIC_PLUG#<42>

RF_DISABLE#<40>

USB20_N13<17>
USB20_P13<17>

USB20_N0<17>
USB20_P0<17>

1

U2410

U2410

1

GND

2

VIN
VIN3VOUT

4

EN

RT9715BGS_SO8

RT9715BGS_SO8

SPDIF<42>

+USB_VCCB

VOUT
VOUT

FLG

HP_RIGHT_R_2
HP_LEFT_R_2

LINE_R_R
LINE_L_R

MIC1_R_R
MIC1_L_R

+USB_VCCB

8
7
6
5

SPDIF

SPDIF_PLUG#
LINEIN_PLUG#
MIC_PLUG#

RF_DISABLE#

USB20_N13
USB20_P13

USB20_N0
USB20_P0

1 2

R2469

R2469
10K_0402_5%

10K_0402_5%

E

1

C2520

C2520

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

JP4

JP4

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

GND1

26

GND2

ACES_85208-24071

ACES_85208-24071

CONN@

CONN@

USB_OC#1 <17>

MIC JACK

12

12

R1138

1

2

R1138

4.7K_0402_5%

4.7K_0402_5%

MIC1_R_R

1

C1140

C1140
220P_0402_50V7K

220P_0402_50V7K

2

4.7K_0402_5%

R1139

R1139
1K_0603_5%

1K_0603_5%

MIC1_R_1

1 2

MIC1_L_1 MIC1_L_R

1 2

1K_0603_5%

1K_0603_5%
R1140

R1140

4.7K_0402_5%

L1111

L1111

FBMA-L11-160808-700LMT_2P

FBMA-L11-160808-700LMT_2P

1 2

1 2

FBMA-L11-160808-700LMT_2P

FBMA-L11-160808-700LMT_2P
L1112

L1112

220P_0402_50V7K

220P_0402_50V7K

R1137

R1137

C1139

C1139

S/PDIF Out JACK

LINE Out/Headphone Out

HP_RIGHT_R_1 HP_RIGHT_R_2

1 2

L1106 FBMA-L11-160808-700LMT_2PL1106 FBMA-L11-160808-700LMT_2P

HP_LEFT_R_1

1 2

L1107 FBMA-L11-160808-700LMT_2PL1107 FBMA-L11-160808-700LMT_2P

330P_0402_50V7K

330P_0402_50V7K

L1109

L1109
FBMA-L11-160808-700LMT_2P

FBMA-L11-160808-700LMT_2P

1 2

1 2

FBMA-L11-160808-700LMT_2P

FBMA-L11-160808-700LMT_2P
L1110

L1110

C1133

C1133

220P_0402_50V7K

220P_0402_50V7K

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Amplifier & Audio Jack&USB

Amplifier & Audio Jack&USB

Amplifier & Audio Jack&USB

LA-6931P

LA-6931P

LA-6931P

E

HP_LEFT_R_2HP_LEFT-FRONT_LEFT

1

1

C1130

C1130

C1131

C1131

330P_0402_50V7K

330P_0402_50V7K

2

2

LINE-IN JACK

LINE_R_R

LINE_L_R

1

1

C1134

C1134
220P_0402_50V7K

220P_0402_50V7K

2

2

43 58Wednesday, October 27, 2010

43 58Wednesday, October 27, 2010

43 58Wednesday, October 27, 2010

1.0

1.0

1.0

FAN1 Conn

www.bufanxiu.com

BT

1

2

+5VS

FAN_PWM<4 0>

1

C2513

C2513

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

3

3

2

2

10/07

FAN_PWM

+5V_FP

USB20_N11_1
USB20_P11_1

FP_LED#<40>

40mil

JFAN1

JFAN1

1

1

2

2

3

3

4

4

5

G5

6

G6

CONN@

CONN@

ACES_85205-04001

ACES_85205-04001

Finger Print board

JP2

JP2

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

ACES_85201-06051

ACES_85201-06051

CONN@

CONN@

+3VS

12

R2466

R2466
10K_0402_5%

10K_0402_5%

FAN_SPEED1<40>

R2461 0_0603_5%R2461 0_0603_5%

+5VS

+5VALW

USB20_N11<17>
USB20_P11<17>

1 2

R2462 0_0603_5%

R2462 0_0603_5%

1 2

@

@

C2512

C2512

1U_0603_10V4Z

1U_0603_10V4Z

R2463 0_0402_5%R2463 0_0402_5 %

1 2

R2464 0_0402_5%R2464 0_0402_5 %

1 2

L2406

@L2406

@

4

4

1

1

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

+3VS

1

2

BT_ON#<17>

Screw

H1

H1

H_3P0

H_3P0

H11

H11

H_3P2

H_3P2

H15

H15

H_4P7

H_4P7

C2515

C2515
1U_0603_10V4Z

1U_0603_10V4Z

H2

H2

H_3P0

H_3P0

@

@

1

1

H12

H12

H_3P2

H_3P2

@

@

1

1

H16

H16

H_4P2X4P7

H_4P2X4P7

@

@

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

R2465

R2465
10K_0402_5%

10K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H3

H3

H_3P0

H_3P0

@

@

H19

H19

H_3P2

H_3P2

@

@

H17

H17

H_4P2X4P7

H_4P2X4P7

@

@

Q2406

Q2406
AO3413_SOT23-3

AO3413_SOT23-3

D

S

D

S

13

G

G

@C2514

@

H5

H5

H_3P0

H_3P0

H13

H13

H_3P8

H_3P8

2

H6

H6

H_3P0

H_3P0

@

@

@

@

1

1

H14

H14

H_3P8

H_3P8

@

@

@

@

1

1

C2514

C2516

C2516

H4

H4

H_3P0

H_3P0

@

@

@

@

1

1

@

@

1

H18

H18

H_4P2

H_4P2

@

@

@

@

1

1

10/20

H7

H7

H_3P0

H_3P0

R2497

R2497
470_0402_5%

470_0402_5%

2N7002_SOT23-3

2N7002_SOT23-3

H8

H8

H_3P0

H_3P0

@

@

1

H23

H23

H_2P3X0P6

H_2P3X0P6

@

@

1

2

Q2407

Q2407

1

G

G

@

@

H9

H9

H_3P0

H_3P0

H24

H24

H_2P3X0P6

H_2P3X0P6

+BT_VCC+3VS

C2526 4.7U_0603_6.3V6KC2526 4.7U_0603_6.3V6K

H10

H10

H_3P0

H_3P0

C2527 0.1U_0402_16V4ZC2527 0.1U_0402_16V 4Z

1

2

@

@

1

12

13

D

D

S

S

@

@

1

@

@

1

NON-PDH

2/25 Change footprint of H22

H21

H21

H_5P1X3P1N

H_5P1X3P1N

@

@

1

FD1

FD3

FD3

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

ZZZ

ZZZ

PCB_LA-6931P

PCB_LA-6931P

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

FD1

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

ZZZ

ZZZ

DC-MB 2DW1022-30011 6 120W

DC-MB 2DW1022-30011 6 120W

45@

45@

H22

H22

H_2P8N

H_2P8N

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

FD2

FD4

FD4

@

@

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet of

Date: Sheet of

FD2

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FAN & Screw Hole

FAN & Screw Hole

FAN & Screw Hole

LA-6931P

LA-6931P

LA-6931P

of

44 58Wednesday, October 27, 2010

44 58Wednesday, October 27, 2010

44 58Wednesday, October 27, 2010

1.0

1.0

1.0

A

www.bufanxiu.com

B

C

D

E

+5VALW TO +5VS

+5VALW

U2300

U2300

SI4800BDY-T1-GE3_SO8

SI4800BDY-T1-GE3_SO8

8
7

5

4

1 1

9/1 Del C574/C562/567

R2309

+VSB

09/10

R2309

150K_0402_5%

150K_0402_5%

SUSP

5VS_GATE

12

61

Q2302A

Q2302A

2

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

+5VS

1
2
36

1U_0603_10V4Z

1U_0603_10V4Z

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

1

C2306

C2306

0.1U_0603_25V7K

0.1U_0603_25V7K

2

For EMI Require 1/21
Put near Right s ide of DIMM

1

C2302

C2302

2

1 2

3

Q2302B

Q2302B

4

R2306

R2306

470_0603_5%

470_0603_5%

SUSP

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C2301

C2301

2

+3VALW TO +3VS

+3VALW

U2302

U2302

SI4800BDY-T1-GE3_SO8

SI4800BDY-T1-GE3_SO8

8
7

5

12

2

2

1

4

3VS_GATE

61

Q2303A

Q2303A

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

9/1 Del C547/C548/C545

2 2

+VSB

R2316

R2316
200K_0402_5%

200K_0402_5%

SUSP

C2310

C2310

100P_0402_50V8J

100P_0402_50V8J

@

@

+1.5V to +1.5VS

+1.5V

AO4430L_SO8

AO4430L_SO8

8
7
6
5

4

3 3

9/1 Del C550/C558/C559

+VSB

R2321

R2321
510K_0402_5%

510K_0402_5%

SUSP

Q2304A

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

Q2304A

ACIN<15,40,48>

12

ACIN

1.5VS_GATE

61

R2326

R2326

@

@

2

2

G

G

+3VS

1
2
36

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

1

C2309

C2309

0.1U_0603_25V7K

0.1U_0603_25V7K

2

U2303

U2303

1
2
3

12

510K_0402_5%

510K_0402_5%

13

D

D

@

@

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

Q2317

Q2317

1

C2308

C2308

2

1U_0603_10V4Z

1U_0603_10V4Z

Q2303B

Q2303B

Optional, if +1.5VS can combine with +1.5V_1

+1.5VS

1

C2311

C2311

2

1U_0603_10V4Z

1U_0603_10V4Z

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

1

C2312

C2312

0.1U_0603_25V7K

0.1U_0603_25V7K

2

R2312

R2312
470_0603_5%

470_0603_5%

1 2
3

4

Q2304B

Q2304B

SUSP

5

R2320

R2320
220_0603_5%

220_0603_5%

1 2

3

4

8/31 Intel

SUSP

5

+3VALW TO +3VALW(PCH AUX Power)

C2305

@C2305

@

10U_0805_10V4Z

10U_0805_10V4Z

20mil 1

R2311 200K_0402_5%@R2311 200K_0402_5%@

+VSB

PCH_PWR_EN#

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

Short J5 for PCH VCCSUS3.3

+3VALW

1

2

Q2306B

@Q2306B

@

J2300

J2300

112

JUMP_43X79

JUMP_43X79

U2301

@U2301

@

SI4800BDY-T1-GE3_SO8

SI4800BDY-T1-GE3_SO8

8
7

5

4

12

3

5

4

PCH_PWR_EN#<20>

2

0

mil

3V_GATE

PCH_PWR_EN<40>

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1
2
36

100K_0402_5%

100K_0402_5%

+3VALW_PCH

1

C2307

@C2307

@

0.1U_0603_25V7K

0.1U_0603_25V7K

2

R2318

R2318

Q2313

Q2313

40mil

@

C2303

10U_0805_10V4Z@C2303

10U_0805_10V4Z

1

2

100K_0402_5%

100K_0402_5%

PCH_PWR_EN#

2

12

R2322

R2322
22_0603_5%

22_0603_5%

13

D

D

2

G

G

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

1

2

R2315

R2315

G

G

+5VALW

@

C2304

1U_0603_10V4Z@C2304

1U_0603_10V4Z

1 2

13

D

D

S

S

1 2
61

2N7002E_SOT23-3

2N7002E_SOT23-3

R2308

@R2308

@

470_0603_5%

470_0603_5%

PCH_PWR_EN#

2

Q2306A

@Q2306A

@

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

Q2312

Q2312

R2323

R2323
470_0603_5%

470_0603_5%

@

@

1 2

13

D

D

2

G

G

S

S

Q2314

Q2314

@

@

R2324

R2324
470_0603_5%

470_0603_5%

@

@

1 2

13

D

D

2

G

G

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

Q2315

Q2315

@

@

SYSON#<36,37,43>

SYSON<37,40,51>

SUSP<5,53>

SUSP#<9,40,46,51,53>

+1.5V+1.8VS+1.05VS_VCCP+0.75VS

R2325

R2325
470_0603_5%

470_0603_5%

@

@

1 2

13

D

D

SYSON#S USPSUSPSUSP

2

G

G

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

Q2316

Q2316

@

@

100K_0402_5%

100K_0402_5%

SUSP

R2319

R2319

10K_0402_5%

10K_0402_5%

SYSON#

SYSON

R2310

R2310

12

+5VALW

2

12

+5VALW

R2313

R2313
100K_0402_5%

100K_0402_5%

1 2

3

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

5

4

R2307

R2307
100K_0402_5%

100K_0402_5%

1 2

61

Q2305A

Q2305A

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

Q2305B

Q2305B

4 4

Security Classification

Security Classification

A

B

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

DC Interface

DC Interface

LA-6931P

LA-6931P

LA-6931P

1.0

1.0

45 58Wednesday, October 27, 2010

45 58Wednesday, October 27, 2010

45 58Wednesday, October 27, 2010

E

1.0

A

www.bufanxiu.com

1 1

B

C

D

E

+1.5VS to +1.5VSDGPU Transfer

+1.5VS

9/1 Del C576/C586

R2333

R2333

470K_0402_5%

470K_0402_5%

1 2

+VSB

+3VS

R2344 10K_0402_5%R2344 10K_0 402_5%

1 2

2 2

VGA_CORE_EN

2

G

G

1.5VSDGPU_GATE

10/02

VGA_CORE_EN#

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

13

D

D

Q2323

Q2323
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

AO4430L_SO8

AO4430L_SO8

8
7
6
5

4

1 2

61

0_0402_5%

0_0402_5%

Q2308A

Q2308A

2

U2304

U2304

R2346

R2346

9/09

+1.5VSDGPU

1
2
3

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

1

C2315

C2315

0.1U_0603_25V7K

0.1U_0603_25V7K

2

250mil(6A)

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

+1.5VS +1 .5VSDGPU

1

C2314

C2314

R2332

R2332
220_0603_5%

220_0603_5%

2

1 2

10/02

3

Q2308B

Q2308B

4

VGA_CORE_EN#

5

@

JP7

JP7

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

R2345 0_0402_5%@R2345 0_0402_5%@

1 2

R2342 0_0402_5%@R2342 0_0402_5%@

1 2

VGA_ON VGA_CORE_EN

R2343 10K_0402_5%R2343 10K_0 402_5%

1 2

PX_EN<26,27>

SUSP# <9,40,45,51,53>

13

D

D

SG@

SG@

2

G

G

S

S

Q2322

Q2322
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

VGA_CORE_EN <55>

@

+1.8VS to +1.8VSDGPU Transfer

+1.8VS

3 3

1 2

+VSB

33K_0402_5%

33K_0402_5%

VGA_ON#

R2341 0_0402_5%R2341 0_0402_5%

4 4

A

9/1 Del C535

R2339

R2339

1.8VSDGPU_GATE

10/02 9/22

1 2

2

U2305

U2305

AO4430L_SO8

AO4430L_SO8

8
7
6
5

4

R2347

R2347

1 2

0_0402_5%

0_0402_5%

61

Q2309A

Q2309A

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

1
2
3

1

2

+1.8VSDGPU

100mil(1.5A)

1

+

+

C2316

C2316

330U_D2_2V_Y

330U_D2_2V_Y

2

C2319

C2319

2.2U_0805_25V6K~D

2.2U_0805_25V6K~D

10/02

1

C2317

C2317

10U_0805_10V4Z

10U_0805_10V4Z

2

DMN66D0LDW-7 2N_SOT363-6

DMN66D0LDW-7 2N_SOT363-6

B

1

C2318

C2318

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.8VS +1.8VSDGPU

R2338

R2338
220_0603_5%

220_0603_5%

1 2

3

Q2309B

Q2309B

4

@

JP8

JP8

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

10/02

5

R2340 0_0402_5%R2340 0_0402_5%

+1.8VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

1

C2320

C2320

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C

VGA_ON#

09/09
For ESD

Compal Secret Data

Compal Secret Data

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

+5VALW

R2335

R2335
100K_0402_5%

100K_0402_5%

1 2

VGA_ON#<23,54,55>

VGA_ON<17,23,54>

22K_0402_5%

22K_0402_5%

VGA_ON#

13

D

D

2

G

Q2321

G

Q2321
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

12

R2337

R2337

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

S

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VGA DC Interface

VGA DC Interface

VGA DC Interface

LA-6931P

LA-6931P

LA-6931P

46 58Wednesday, October 27, 2010

46 58Wednesday, October 27, 2010

46 58Wednesday, October 27, 2010

E

1.0

1.0

1.0

5

www.bufanxiu.com

4

3

2

1

B+

VIN

12

PC4

PC4
1000P_0402_50V7K

1000P_0402_50V7K

VS

PL1

PJP1

PJP1

1

1

2

2

3

3

4

D D

C C

B B

ACOFF<40,48>

+5VALWP

SINGA_2DW-0268-B16

SINGA_2DW-0268-B16

CONN@

CONN@

BATT+

51ON#<30,41>

VIN

4

PD1

PD1
LL4148_LL34-2

LL4148_LL34-2

1 2

22K_0402_5%

22K_0402_5%

2

3

PD4

PD4
RB715F_SOT323-3

RB715F_SOT323-3

12

PR4

PR4

1 2

PR7

PR7

1K_1206_5%

1K_1206_5%

1 2

PR8

PR8

1K_1206_5%

1K_1206_5%

1 2

PR11

PR11

1K_1206_5%

1K_1206_5%

1 2

PR12

PR12

1K_1206_5%

1K_1206_5%

12

PR3

PR3

100K_0402_5%

100K_0402_5%

PreCHG

1

N1

12

PC5

PC5

12

PC1

PC1
1000P_0402_50V7K

1000P_0402_50V7K

PQ1

PQ1
TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

2

0.22U_0603_25V7K

0.22U_0603_25V7K

12

PD3

PD3
LL4148_LL34-2

LL4148_LL34-2

2

13

12

12

PR10

PR10

PR9

PR9

100K_0402_5%

100K_0402_5%

13

PQ3

PQ3
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

VIN

100K_0402_5%

100K_0402_5%

PL1

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC2

PC2
100P_0402_50V8J

100P_0402_50V8J

PD2

PD2
LL4148_LL34-2

LL4148_LL34-2

1 2

12

PR1

PR1
68_1206_5%

68_1206_5%

12

PC6

PC6

0.1U_0603_25V7K

0.1U_0603_25V7K

PQ2

PQ2
TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

2

12

PR13

PR13
100K_0402_5%

100K_0402_5%

13

2

PQ4

PQ4
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

12

PR2

PR2
68_1206_5%

68_1206_5%

13

12

PC3

PC3
100P_0402_50V8J

100P_0402_50V8J

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2010/12/31

2010/01/25 2010/12/31

2010/01/25 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR DCIN / Pre-charge

PWR DCIN / Pre-charge

PWR DCIN / Pre-charge

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

LA-6931P

LA-6931P

LA-6931P

47 10Wednesday, October 27, 2010

47 10Wednesday, October 27, 2010

1

47 10Wednesday, October 27, 2010

0.1

0.1

0.1

A

www.bufanxiu.com

Iada=0~4.74A(90W/19V=4.736A)

PQ101

PQ101
AO4407A_SO8

VIN

1 1

12

PR101

PR101
47K_0402_1%

47K_0402_1%

V1

2

61

D

D

2

G

G

PQ107A

PQ107A

S

S

DMN66D0LDW-7_SOT363-6

2 2

DMN66D0LDW-7_SOT363-6

ACOFF<40,47>

AO4407A_SO8

8
7

5

47K

47K

2

47K

47K

13

PQ104

PQ104

1 3

PDTA144EU_SOT323-3

PDTA144EU_SOT323-3

PQ106

PQ106
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

PACIN

1 2

PR122

PR122

22K_0402_5%

22K_0402_5%

ACOFF

2

4

13

CP mode

3 3

4 4

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=1.502V, Iinput=4.07A

BATT Type

Normal 3S LI-ON Cells

Ki
Vchlim=Iref*(PR374/(PR372+PR374))
=Iref*(100K/(80.6K+100K))
=Iref*0.5537
Ichanrge=(165mV/PR369)*(Vchlim/3.3V)
=(165m/20m)*(1/3.3V)*Iref*0.5537
=1.3842*Iref
Iref=0.7224*Ichanrge =>Ki=0.7224

Kv
Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K
R=514K//31.6K//(15.4K+3k)=11.372K
r=514K//514K//31.6K=28.14K
Vcell=0.175*Vadj+3.99v

4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))

1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899

1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv
A=Vref*(R/(R+514K))=0.052
Kv=9.451

Charging Voltage
(0x15)

12600mV

A

ADP_I = 19.9*Iadapter*Rsense

P2

PQ102

PQ102
SI4483ADY-T1-GE3 1P SO8

SI4483ADY-T1-GE3 1P SO8

1
2
36

12

5

G

G

1
2
3 6

12

PR106

PR106

PC101

PC101

200K_0402_1%

200K_0402_1%

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PR113

PR113
150K_0402_1%

150K_0402_1%

6251VDD

3S/4S# <40>

34

D

D

PQ107B

PQ107B

S

S

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PR124

PR124

80.6K_0402_1%

80.6K_0402_1%

IREF<40>

PR126

PR126

100K_0402_1%

100K_0402_1%

PQ113

PQ113
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

CV mode

12.60V

4

1 2

PR114

PR114

47K_0402_5%

47K_0402_5%

2

12

12

8
7

5

PC102

PC102
5600P_0402_25V7K

5600P_0402_25V7K

1 2

FSTCHG <40>

PR109

PR109

0_0402_5%

0_0402_5%

13

PQ110

PQ110
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

ADP_I<40,50>

12

6251VREF 6251ACLIM

PC118

PC118

0.01U_0402_25V7K

0.01U_0402_25V7K

65W/90W#<40,50>

CALIBRATE#<40>

CC=0.6~4.48A

IREF=0.7224*Icharge

IREF=0.43V~3.24V

CP = 85%*Iada ; CP = 4.07A

P3

12

12

PR110

PR110
100K_0402_1%

100K_0402_1%

PC115

PC115

1 2

0.01U_0402_25V7K

0.01U_0402_25V7K

PC116

PC116

1 2

.1U_0402_16V7K

.1U_0402_16V7K

1 2

PR127

PR127

7.68K_0402_1%

7.68K_0402_1%

2

G

G

ACPRN

1

2

12

PR128

PR128

13

D

D

@2.55K_0402_1%

@2.55K_0402_1%

S

S

1 2

15.4K_0402_1%

15.4K_0402_1%

12

PR134

PR134
47K_0402_5%

47K_0402_5%

2

B

12

PR1020.012_2512_1% PR1020.012_2512_1%

4

CSIN

3

CSIP

6251VDD

ACSETIN

6251_EN CSON

PC113

PC113

1 2

6800P_0402_25V7K

6800P_0402_25V7K

1 2

PR118

PR118

10K_0402_1%

10K_0402_1%

6251ICM

1 2

PR120

PR120

100_0402_1%

100_0402_1%

6251VREF

12

PR130

PR130

3.01K_0402_1%

3.01K_0402_1%

PQ114

PQ114

@2N7002W-T/R7_SOT323-3

@2N7002W-T/R7_SOT323-3

PR131

PR131

6251VDD

12

PR135

PR135
10K_0402_1%

10K_0402_1%

13

PQ115

PQ115
PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

B

B+

12

PC107

PC107

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

PU101

PU101

1

VDD

DCIN

2

ACSET

ACPRN

3

EN

CSON

4

CELLS

CSOP

ICOMP

5

ICOMP

CSIN

6

VCOMP

CSIP

7

PHASE

ICM

8

UGATE

VREF

9

CHLIM

BOOT

10

ACLIM

VDDP

11

VADJ

LGATE

12

PGND

GND

ISL6251AHAZ-T_QSOP24

ISL6251AHAZ-T_QSOP24

PR132

PR132

31.6K_0402_1%

31.6K_0402_1%

1 2

1 2

PR133

PR133

10K_0402_1%

10K_0402_1%

PACIN

12

PR136

PR136

14.3K_0402_1%

14.3K_0402_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC128

PC128

@4.7U_0805_25V6K

@4.7U_0805_25V6K

VIN

1 2

12

PR108

PR108

DCIN

24

0.1U_0603_25V7K

0.1U_0603_25V7K

23

22

PC112

PC112

0.047U_0402_16V7K

0.047U_0402_16V7K

21

1 2

20

PC114

PC114

0.1U_0603_25V7K

0.1U_0603_25V7K

19

1 2

LX_CHG

18

DH_CHG

17

BST_CHG

16

6251VDDP

15

DL_CHG

14

13

ACIN <15,40,45>

PC129

PC129

1 2

@4.7U_0805_25V6K

@4.7U_0805_25V6K

PreCHG

12

PD101

PD101

ACSETIN

RB751V-40_SOD323-2

RB751V-40_SOD323-2

12

12

PC108

PC108

10_1206_5%

10_1206_5%

1000P_0402_25V8J

1000P_0402_25V8J

PC109

PC109

12

ACPRN <49>

1 2

PR125

PR125

0_0603_5%

0_0603_5%

PC122

PC122

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1 2

2010/01/25 2010/12/31

2010/01/25 2010/12/31

2010/01/25 2010/12/31

C

1.2UH_1127AS-1R2N_2.4A_30%

1.2UH_1127AS-1R2N_2.4A_30%

PL103

PL103

12

PR105

PR105
191K_0402_1%

191K_0402_1%

PR112

PR112

14.3K_0402_1%

14.3K_0402_1%

1 2

PR115

PR115

20_0402_5%

20_0402_5%

1 2

PR116

PR116

20_0402_5%

20_0402_5%

1 2

PR117

PR117

20_0402_5%

20_0402_5%

1 2

PR119

PR119

2_0402_5%

2_0402_5%

BST_CHGA

12

PD104

PD104
RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

4.7_0603_5%

4.7_0603_5%

CSOP

PC117

PC117

12

0.1U_0603_25V7K

0.1U_0603_25V7K

6251VDD

PR129

PR129

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

D

B+

CHG_B+

12

PC103

PC103

10U_0805_25V6K

10U_0805_25V6K

12

12

PC104

PC104

10U_0805_25V6K

10U_0805_25V6K

PC106

PC106

PC105

PC105

0.1U_0603_25V7K

0.1U_0603_25V7K
2200P_0402_25V7K

2200P_0402_25V7K

13

578

PQ111

PQ111
MDS1660URH

MDS1660URH

3 6

241

578

PQ112

PQ112
AO4468L_SO8

AO4468L_SO8

3 6

241

PQ103

PQ103
AO4407A_SO8

AO4407A_SO8

1
2
3 6

1 2

PR103

PR103

10K_0402_1%

10K_0402_1%

V1

PR111

PR111

1 2

PQ105

PQ105

PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

13

D

ACPRN

D

2

G

G

S

S

10UH_PCMB104T-100MS_6A_20%

10UH_PCMB104T-100MS_6A_20%

1 2

12

PR123

PR123
@4.7_1206_5%

@4.7_1206_5%

SNB_CHG

12

PC119

PC119
@680P_0402_50V7K

@680P_0402_50V7K

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

8
7

5

4

1 2

PR104

PR104

47K_0402_1%

47K_0402_1%

ACOFF

PD102

PD102
1SS355_SOD323-2

1SS355_SOD323-2

PD103

PD103

1 2

@100K_0402_5%

@100K_0402_5%

1SS355_SOD323-2

1SS355_SOD323-2

1 2

12

PQ108

PQ108

PC111

PC111

@2N7002W-T/R7_SOT323-3

@2N7002W-T/R7_SOT323-3

@1000P_0402_50V8-J

@1000P_0402_50V8-J

PL101

PL101

CHG

1

2

0.02_1206_1%

0.02_1206_1%

TCR=50ppm/C

Compal Electronics, Inc.

PWR-CHARGER

PWR-CHARGER

PWR-CHARGER

LA-6931P

LA-6931P

LA-6931P

12

12

PR121

PR121

PC125

PC125

@10U_0805_25V6K

@10U_0805_25V6K

D

D

PC110

PC110

S

S

0.1U_0603_25V7K

0.1U_0603_25V7K

D

12

12

PC126

PC126

PC127

PC127

@10U_0805_25V6K

@10U_0805_25V6K

VIN

PR107

PR107
200K_0402_1%

200K_0402_1%

1 2

13

PACIN

2

G

G

PQ109

PQ109
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

4

3

12

12

PC120

PC120

10U_0805_25V6K

10U_0805_25V6K

48 10Wednesday, October 27, 2010

48 10Wednesday, October 27, 2010

48 10Wednesday, October 27, 2010

@10U_0805_25V6K

@10U_0805_25V6K

<40,41>

12

PC123

PC123

PC121

PC121

10U_0805_25V6K

10U_0805_25V6K

BATT+

12

10U_0805_25V6K

10U_0805_25V6K

0.1

0.1

0.1

PC124

PC124

@10U_0805_25V6K

@10U_0805_25V6K

5

www.bufanxiu.com

4

3

2

1

2VREF_8205

D D

1 2

PR301

PR301

13K_040 2_1%

13K_040 2_1%

RT8205_B+

Typ: 175mA

12

12

12

PC303

PC303

PC304

PC304

10U_0805_25V6K

10U_0805_25V6K

0.1U_0603_25V7K

0.1U_0603_25V7K

C C

PL302

PL302

4.7UH_SIL1 04R-4R7PF_5.7A_ 30%

4.7UH_SIL1 04R-4R7PF_5.7A_ 30%

1

+

+

PC314

PC314
220U_6.3 VM_R15

220U_6.3 VM_R15

2

12

12

13

5

1 2

13

D

D

2

G

G

PQ308

PQ308
PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

VS

PQ307

PQ307

S

S

2N7002W -T/R7_SOT32 3-3

2N7002W -T/R7_SOT32 3-3

12

PR309

PR309
@4.7_120 6_5%

@4.7_120 6_5%

SNB_3V

12

PC316

PC316
@680P_0 402_50V7K

@680P_0 402_50V7K

1 2

PR317

PR317

100K_04 02_1%

100K_04 02_1%

+3VALWP

B B

MAINPWON <50>

PR314

PR314

0_0402_ 5%

0_0402_ 5%

ACPRN<48 >

A A

EC_ON< 40,41>

PR316

PR316

200K_04 02_5%

200K_04 02_5%

2

578

PC306

PC306

PQ301

PQ301

2200P_0402_50V7K

2200P_0402_50V7K

MDS1660 URH

MDS1660 URH

3 6

241

578

PQ303

PQ303
AO4468L _SO8

AO4468L _SO8

3 6

241

5V_ENTRIP

61

D

D

2

G

G

PQ305A

PQ305A

S

S

DMN66D0 LDW-7_SOT3 63-6

DMN66D0 LDW-7_SOT3 63-6

VL

12

12

PR318

PR318

40.2K_0402_1%

40.2K_0402_1%

0.1U_060 3_25V7K

0.1U_060 3_25V7K

12

PR315

PR315

100K_04 02_1%

100K_04 02_1%

2

PC321

PC321

2.2U_060 3_6.3V6K

2.2U_060 3_6.3V6K

4

+3VLP

12

PC310

PC310

PC312

PC312

3V_BST_ 1

1 2

MAINPW ON

1 2

PR312

PR312

B+

499K_04 02_1%

499K_04 02_1%

13

PQ306

PQ306
PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

4.7U_0805_10V6K

4.7U_0805_10V6K

1 2

PR307

PR307

2.2_0603 _5%

2.2_0603 _5%

PR311

PR311

@0_0402 _5%

@0_0402 _5%

12

PR313

PR313
100K_04 02_1%

100K_04 02_1%

5

G

G

1 2

PR303

PR303

20K_040 2_1%

20K_040 2_1%

1 2

PR305

PR305

137K_04 02_1%

137K_04 02_1%

25

P PAD

7

VO2

8

3V_BST

3V_UG

3V_LX

3V_LG

12

3V_ENTRIP

34

D

D

PQ305B

PQ305B

S

S

DMN66D0 LDW-7_SOT3 63-6

DMN66D0 LDW-7_SOT3 63-6

Security Class ification

Security Class ification

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

12

PC318

PC318
1U_0603 _10V6K

1U_0603 _10V6K

+3.3VALWP

eak=5.78A ; 1.2Ipeak=6.94A; Imax=4.05A

Ip
f=375KHz, L=4.7UH
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.716A
Vlimit=10*10^-6*110Kohm/10=0.14V
Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A
Iocp=7.06A~9.85AA (7.06A>6.94A -> ok) -DVT-

Issued Date

Issued Date

Issued Date

12

3V_ENTRIP

FB2_8205

6

5

FB2

ENTRIP2

VFB=2.0V

PU301

PU301
RT8205E GQW_W QFN24_4X4

RT8205E GQW_W QFN24_4X4

SKIPSEL

EN

14

13

EN_8205

2VREF_8205

TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
(2)SMPS2=375KHZ (+3VALWP)

PC302

PC302

1U_0603_10V6K

1U_0603_10V6K

1 2

PR302

PR302

30K_040 2_1%

30K_040 2_1%

1 2

PR304

PR304

20K_040 2_1%

20K_040 2_1%

RT8205_ B+

FB1_8205

2VREF_8205

5V_ENTRIP

1 2

PR306

PR306

154K_04 02_1%

154K_04 02_1%

1

4

3

2

FB1

REF

TONSEL

ENTRIP1

24

VO1

23

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

15

12

PC319

PC319

4.7U_080 5_10V6K

4.7U_080 5_10V6K

RT8205_ B+

12

PC320

PC320

0.1U_060 3_25V7K

0.1U_060 3_25V7K

2010/01/ 25 2010/12/ 31

2010/01/ 25 2010/12/ 31

2010/01/ 25 2010/12/ 31

3

5V_BST

22

21

20

19

5V_UG

5V_LX

5V_LG

1 2

PR308

PR308

0_0603_ 5%

0_0603_ 5%

+5VLP

Ty

p: 175mA

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

12

PC307

PC307

10U_0805_25V6K

10U_0805_25V6K

SPOK <15,50>

PC313

PC313

5V_BST_ 1

1 2

0.1U_060 3_25V7K

0.1U_060 3_25V7K

+3VALW P +3VALW

+5VALW P +5VALW

2

2

2 1

RT8205_B+

PL301

PL301

HCB4532 KF-800T90_181 2

HCB4532 KF-800T90_181 2

12

12

PC309

PC309

PC311

PC311

2200P_0402_50V7K

2200P_0402_50V7K

PJ301

PJ301

112

JUMP_43 X118

JUMP_43 X118

PJ302

PJ302

112

JUMP_43 X118

JUMP_43 X118
PJP3

PJP3
PAD-OPEN 2x2m

PAD-OPEN 2x2m

+5VALWP
Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A
f=300KHz, L=4.7UH,Rentrip=154k ohm
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A
Vlimit=10*10^-6*154Kohm/10=0.15V
Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A
Iocp=8.44~11.57A (8.44>8.4 -> OK)

2

578

0.1U_0603_25V7K

0.1U_0603_25V7K

PQ302

PQ302
MDS1660 URH

MDS1660 URH

3 6

241

578

PQ304

PQ304
MDS2659 URH

MDS2659 URH

3 6

241

VL+5VL P

Compal Electronics, Inc.

Title

Title

Title

3VALWP/5VALWP

3VALWP/5VALWP

3VALWP/5VALWP

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

B+

12

12

PC301

PC301
@680P_0 402_50V7K

@680P_0 402_50V7K

PL303

PL303

4.7UH_SIL1 04R-4R7PF_5.7A_ 30%

4.7UH_SIL1 04R-4R7PF_5.7A_ 30%

1 2

12

PR310

PR310
@4.7_120 6_5%

@4.7_120 6_5%

SNB_5V

12

PC317

PC317
@680P_0 402_50V7K

@680P_0 402_50V7K

LA-6931P

LA-6931P

LA-6931P

1

1

+

+

PC315

PC315
220U_6.3 VM_R15

220U_6.3 VM_R15

2

49 10Wednesd ay, October 27, 20 10

49 10Wednesd ay, October 27, 20 10

49 10Wednesd ay, October 27, 20 10

+5VALWP

0.1

0.1

0.1

5

www.bufanxiu.com

PJP2

PJP2

SUYIN_200275GR008G13GZR

SUYIN_200275GR008G13GZR

D D

C C

GND
GND

10
9
8

8

7

7

EC_SMDA

6

6

EC_SMCA

5

5

TH

4

4

PI

3

3

2

2

1

1

<40,41>

VMB

PL2

PL2

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC8

PC8
1000P_0402_50V7K

1000P_0402_50V7K

BATT+

<40,41>

12

PC9

PC9

0.01U_0402_25V7K

0.01U_0402_25V7K

12

PR16

PR16
1K_0402_5%

1K_0402_5%

4

12

PR21

PR21
1K_0402_1%

1K_0402_1%

PR15

PR15
100_0402_1%

100_0402_1%

1 2

PR19

PR19

6.49K_0402_1%

6.49K_0402_1%

3

2

1

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

VL

PR14

PR14
100_0402_1%

100_0402_1%

1 2

12

EC_SMB_DA1 <40>

EC_SMB_CK1 <40>

+3VALWP

MAINPWON<49>

H_PROCHOT#<5,40>

BATT_TEMP <40>

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

12

PC7

PC7

0.1U_0603_25V7K

0.1U_0603_25V7K

VL

PQ7

PQ7

PR20

PR20
@100K_0402_1%

@100K_0402_1%

1 2

13

D

D

2

G

G

S

S

PR30

PR30
100K_0402_1%

100K_0402_1%

1 2

Recovery at 56 degree C

PU1

PU1

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

G718TM1U_SOT23-8

TMSNS1

RHYST1

TMSNS2

RHYST2

8

7

6

5

8.87K_0402_1%

8.87K_0402_1%

PR23

PR23

12

PR22

PR22

9.53K_0402_1%

9.53K_0402_1%

PR28

PR28
10K_0402_1%

10K_0402_1%

1 2

12

PR18

PR18
21K_0402_1%

21K_0402_1%

12

12

PH1

PH1
100K_0402_1%_NCP15WF104F0 3RC

100K_0402_1%_NCP15WF104F0 3RC

PR17

PR17
2K_0402_1%

2K_0402_1%

1 2

ADP_I <40,48>

PR29

PR29
@7.15K_0402_1%

@7.15K_0402_1%

1 2

13

D

D

2

G

G

PQ8

PQ8

S

S

@2N7002W-T/R7_SOT323-3

@2N7002W-T/R7_SOT323-3

65W/90W# <40,48>

VL

12

PC50

PC50

@0.1U_0603_25V7K

PQ5

PQ5
TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

B+

VL

B B

SPOK<15,49>

A A

5

PR26

PR26
100K_0402_1%

100K_0402_1%

1 2

1 2

PR27

PR27

1K_0402_5%

1K_0402_5%

12

PC12

PC12
1U_0402_6.3V6K

1U_0402_6.3V6K

13

D

D

2

G

G

S

S

12

PR24

PR24

1 2

PR25

PR25

22K_0402_1%

22K_0402_1%

PQ6

PQ6
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

12

PC10

PC10

100K_0402_1%

100K_0402_1%

0.22U_0603_25V7K

0.22U_0603_25V7K

4

13

12

PC11

PC11

0.1U_0603_25V7K

2

0.1U_0603_25V7K

+VSBP

+VSBP

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Issued Date

Issued Date

PJ3

PJ3
JUMP_43X39

JUMP_43X39

112

3

2

2010/01/25 2010/12/31

2010/01/25 2010/12/31

2010/01/25 2010/12/31

@0.1U_0603_25V7K

+VSB

MAINPWON<49>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PR74

@PR74

@

@100K_0402_1%

@100K_0402_1%

VL

PU3

PU3

1

VCC

2

1 2

2

GND

3

OT1

4

OT2

@G718TM1U_SOT23-8

@G718TM1U_SOT23-8

8

TMSNS1

7

RHYST1

6

TMSNS2

5

RHYST2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

@9.53K_0402_1%

@9.53K_0402_1%

Compal Electronics, Inc.

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

12

PR76

PR76

LA-6931P

LA-6931P

LA-6931P

12

PR72

PR72
@21K_0402_1%

@21K_0402_1%

12

PH2

PH2

@100K_0402_1%_NCP15WF10 4F03RC

@100K_0402_1%_NCP15WF10 4F03RC

50 10Wednesday, October 27, 2010

50 10Wednesday, October 27, 2010

1

50 10Wednesday, October 27, 2010

0.1

0.1

0.1

A

www.bufanxiu.com

B

C

D

1

+

+

PC406

PC406
330U_6.3V_M

330U_6.3V_M

2

B+

12

PC401

PC401
@680P_0402_50V7K

@680P_0402_50V7K

+1.5VP

+1.5VP

PJ401

PJ401

2

JUMP_43X118

JUMP_43X118

PJ402

PJ402

2

JUMP_43X118

JUMP_43X118

112

+1.5V

112

PL401

PL401

HCB4532KF-800T90_1812

12

PC403

PC403

0.1U_0603_25V7K

0.1U_0603_25V7K

HCB4532KF-800T90_1812

1 2

PC416

PC416
2200P_0402_50V7K

2200P_0402_50V7K

1.5_51117_B+

1 1

SYSON<37,40,45>

+5VALW

2 2

1 2

PR407

PR407

100_0603_5%

100_0603_5%

PR403

PR403

0_0402_5%

0_0402_5%

1 2

12

PC409

PC409

4.7U_0603_10V6K

4.7U_0603_10V6K

PR405

PR405

1 2

12

@47K_0402_5%

@47K_0402_5%

PC405

PC405
@.1U_0402_16V7K

@.1U_0402_16V7K

1 2

PR409

PR409

12

10K_0402_1%

10K_0402_1%

PR410

PR410
10K_0402_1%

10K_0402_1%

1 2

267K_0402_1%

267K_0402_1%

TON_1.5V

V5FILT_1.5V

VFB_1.5V

PR402

PR402

PR401

PR404

PR404

0_0603_5%

0_0603_5%

DH_1.5V

LX_1.5V

TRIP_1.5V

DL_1.5V

BST_1.5V-1

1 2

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PR408

PR408
13K_0402_1%

13K_0402_1%

BST_1.5V

1 2

1

14

TON

OUT

VCC

FB

PGOOD

15

TP

EN_SKIP

VFB=0.75V

AGND7PGND

RT8209M

RT8209M

8

BST

13

DH

12

LX

11

ILIM

10

VDD

9

DL

PU401

PU401

2

3

4

5

6

PC404

PC404

PR401

0_0603_5%

0_0603_5%

1 2

+5VALW

12

PC407

PC407

4.7U_0805_10V6K

4.7U_0805_10V6K

578

3 6

241

578

3 6

241

+1.5VP
Ipeak=14.75A;1.2Ipeak=17.7A ;Imax=10.325A
Rton=267K, Fsw=298KHz ,Rdson=4.5~5.6mohm
Rtrip=12K
Iocp=18.17~28.98A

12

PC402

PC402

10U_0805_25V6K

PQ401

PQ401
MDS1660URH

MDS1660URH

PQ402

PQ402
SI4634DY-T1-E3 1N SO 8

SI4634DY-T1-E3 1N SO 8

10U_0805_25V6K

1UH_FDUE1040D-1R0M -P3_21.3A_20%

1UH_FDUE1040D-1R0M -P3_21.3A_20%

1 2

12

PR406

PR406

4.7_1206_5%

4.7_1206_5%

SNB_1.5V

12

PC408

PC408
680P_0402_50V7K

680P_0402_50V7K

12

PL402

PL402

3 3

PJ403

PJ403

+5VALW

4 4

2

112

JUMP_43X118

JUMP_43X118

SUSP#<9,40,45,46,53>

A

12

PC410

PC410
22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

PR413

PR413

100K_0402_5%

100K_0402_5%

PR415

PR415
@1M_0402_5%

@1M_0402_5%

1 2

EN_1.8V

12

PC415

PC415

4

PU402

PU402

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

7

11

0.1U_0402_10V7K

0.1U_0402_10V7K

LX_1.8V

2

LX

3

LX

FB_1.8V

6

FB

FB=0.6Volt

NC

NC

1

SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PL403

PL403

2.2UH_FDVE0630-H- 2R2M=P3_8.3A_20%

2.2UH_FDVE0630-H- 2R2M=P3_8.3A_20%

12

PR411

PR411

4.7_1206_5%

4.7_1206_5%

SNB_1.8V

12

PC414

PC414

1 2

680P_0603_50V7K

680P_0603_50V7K

12

PR412

PR412
20K_0402_1%

20K_0402_1%

FB_1.8V

12

PR414

PR414
10K_0402_1%

10K_0402_1%

2010/01/25 2010/12/31

2010/01/25 2010/12/31

2010/01/25 2010/12/31

12

PC411

PC411
68P_0402_50V8J

68P_0402_50V8J

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

Deciphered Date

Deciphered Date

Deciphered Date

C

PC412

PC412
22U_0805_6.3VAM

22U_0805_6.3VAM

+1.8VSP

12

PC413

PC413
22U_0805_6.3VAM

22U_0805_6.3VAM

PJ404

PJ404

2

JUMP_43X118

JUMP_43X118

1.8VSP
Ipeak=3.35A ; 1.2Ipeak=4.02 ;Imax=2.345A
Vout=0.6*(1+(20K/10K))=1.8V

-DVT-

Compal Electronics, Inc.

Title

Title

Title

PWR-+1.5VP/+1.8VSP

PWR-+1.5VP/+1.8VSP

PWR-+1.5VP/+1.8VSP

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

112

LA-6931P

LA-6931P

LA-6931P

D

+1.8VS+1.8VSP

51 10Wednesday, Oct ober 27, 2010

51 10Wednesday, Oct ober 27, 2010

51 10Wednesday, Oct ober 27, 2010

0.1

0.1

0.1

5

www.bufanxiu.com

D D

1 2

PR502

C C

+5VALW

1 2

PR501

PR501

12

0_0402_5%

0_0402_5%

1 2

PR506

PR506

100_0603_5%

100_0603_5%

VFB=0.75V

VSSSA_SENSE<9>

PR504

PR504

@47K_0402_5%

@47K_0402_5%

12

PR508

PR508

0_0402_5%

0_0402_5%

12

PC501

PC501
@0.1U_0402_16V7K

@0.1U_0402_16V7K

PC511

PC511

PC508

PC508

1 2

4.7U_0603_10V6K

4.7U_0603_10V6K

1000P_0402_50V7K

1000P_0402_50V7K

12

PR516

PR516

30K_0402_1%

30K_0402_1%

12

1.2K_0402_1%

1.2K_0402_1%

1 2

1 2

PR512

PR512

2K_0402_1%

2K_0402_1%

PR521

PR521

12

PR514

PR514
15K_0402_1%

15K_0402_1%

13

D

D

PQ503

PQ503

S

S

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

VCCPPWRGOOD<53>

Layout Note:
Place near V5FILT Pin

B B

PR502

267K_0402_1%

267K_0402_1%

EN_VCCSAP BST_VCCSAP

PU501

PU501

TON_VCCSA

+VCCSAP

V5FILT_VCCSA

VFB_VCCSA

2

G

G

+3VS

1 2

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

PR509

PR509

10K_0402_5%

10K_0402_5%

PR511

PR511

0_0402_5%

0_0402_5%

10K_0402_5%

10K_0402_5%

12

PC509

PC509
@4700P_0402_25V7K

@4700P_0402_25V7K

12

1

PR517

PR517

EN_PSV

15

TP

GND7PGND

+3VS

12

4

14

VBST

DRVH

LL

TRIP

V5DRV

DRVL

RT8209M

RT8209M

8

SA_PGOOD <40>

12

PR515

PR515
10K_0402_5%

10K_0402_5%

12

PR518

PR518
@100K_0402_5%

@100K_0402_5%

13

12

11

10

9

1 2

PR503

PR503

0_0603_5%

0_0603_5%

UG_VCCSAP

LX_VCCSAP

LG_VCCSAP

BST_VCCSAP-1

12

PR510

PR510
14K_0402_1%

14K_0402_1%

PQ504

PQ504
PMBT2222A_SOT23-3

PMBT2222A_SOT23-3

1

2

3

1 2

PC504

PC504

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

12

PR519

PR519

10K_0402_5%

10K_0402_5%

12

PC507

PC507

4.7U_0805_10V6K

4.7U_0805_10V6K

12

PR520

PR520
10K_0402_5%

10K_0402_5%

578

3 6

241

578

3 6

241

VCCSA_SEL <9>

3

PQ501

PQ501
MDS1660URH

MDS1660URH

PQ502

PQ502
MDS2659URH

MDS2659URH

51117_VCCSAP_B+

12

12

PC502

PC502

PC503

PC503

10U_0805_25V6K

10U_0805_25V6K

0.1U_0603_25V7K

0.1U_0603_25V7K

PL501

PL501

2.2UH_PCMC063T-2R2MN_8A_20%

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR505

PR505

4.7_1206_5%

4.7_1206_5%

SNB_VCCSA

12

PC506

PC506

470P_0603_50V8J

470P_0603_50V8J

2

JUMP_43X118

JUMP_43X118

12

PC510

PC510
2200P_0402_50V7K

2200P_0402_50V7K

PC520

PC520

0.1U_0402_25V6

0.1U_0402_25V6

1 2

PJ502

PJ502

112

PR513

PR513

1 2

0_0402_5%

0_0402_5%

B+

1

+

+

2

330U_6.3V_M

330U_6.3V_M

2

+VCCSAP

PC505

PC505

VCCSA_SENSE <9>

1

PJ501

PJ501

2

112

JUMP_43X118

JUMP_43X118

+VCCSAP
Ipeak=6A , Imax=4.2A, 1.2Ipeak=7.2A
DCR= 9 m(typ)~10 m(max)
Rlimit=12K,Rdson=15~18mohm
Ilimit=10uA
Iocp=Rlimit/Rdson*10^(-5)= 7.61~9.13A

VFB=0.75V
Vo=VFB*(1+PR156/PR150)=1.1V
Ton=19E-12*Ron*(((2/3)*Vo+150mV)/Vin)+50ns=2.4E-7
Freq=213KHz

Cesr=15m ohm
Ipeak=7.2A Imax=6.0A
Delta I=((19.5-1.0)*(1.0/19.5))/(L*Freq)=1.48A
Vtrip=Rtrip*10uA=0.0787V

+VCCSA+VCCSAP

Iocp=7.28~7.41A

VID[0] VID[1] VCCSA Vout Require on 2011/2012 Requ ired

0 0 0.9 V Yes/Yes
0 1 0.8 V Yes/Yes
1 0 0.725V No/Yes

A A

5

1 1 0.675V No/Yes

Note:Use VCCSA_SEL to switch High & Low Level for VID[1]
(ie. VCCSA_SEL) due to the VI D[0] is don't care for this set ting.

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/01/25 2010/12/31

2010/01/25 2010/12/31

2010/01/25 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

the resister change
from @ to pop component

Add two jumpers on the HW's output cap of the
+VCCSA's PIN(+) and PIN(-) to sense the
feedback voltage for VCCSA_SENSE & VSSSA_SENSE.

Compal Electronics, Inc.

Title

Title

Title

PWR +VCCSAP

PWR +VCCSAP

PWR +VCCSAP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-6931P

LA-6931P

LA-6931P

1

0.1

0.1

52 10Wednesday, October 27, 2010

52 10Wednesday, October 27, 2010

52 10Wednesday, October 27, 2010

0.1

5

www.bufanxiu.com

4

+1.5V_CPU_VDDQ

+1.5V

3

2

1

14

RT8209M

RT8209M

8

BST

ILIM

VDD

1

1

2

2

PC602

PC602

4.7U_080 5_6.3V6K

4.7U_080 5_6.3V6K

1 2

13

DH

12

LX

11

10

9

DL

PJ601

PJ601
JUMP_43 X118

JUMP_43 X118

BST_1.05 VS_VCCP

DH_1.05V S_VCCP

LX_1.05V S_VCCP

DL_1.05V S_VCCPPGD_1.05 VS_VCCP

12

PR602

PR602
1K_0402 _1%

1K_0402 _1%

12

PR603

PR603
1K_0402 _1%

1K_0402 _1%

1 2

0_0603_ 5%

0_0603_ 5%

12

12

PC604

PC604

PR703

PR703

PR707

PR707

12.1K_04 02_1%

12.1K_04 02_1%

PU601

PU601

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5336 KAI-TRL_SOP8P8

APL5336 KAI-TRL_SOP8P8

+0.75VSP

12

PC605

PC605
10U_060 3_6.3V6M

10U_060 3_6.3V6M

.1U_0402_16V7K

.1U_0402_16V7K

BST_1.05 VS_VCCP_1

0.1U_060 3_25V7K

0.1U_060 3_25V7K

+5VALW

12

PC708

PC708

4.7U_080 5_10V6K

4.7U_080 5_10V6K

PC705

PC705

1 2

4

+3VALW

12

PC603

PC603

1U_0603 _10V6K

1U_0603 _10V6K

PJ602

PJ602

2

112

JUMP_43 X118

JUMP_43 X118

6

578

PQ701

PQ701
MDS1660 URH

MDS1660 URH

123

578

PQ702

PQ702
SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

3 6

241

+0.75VS+0.75VSP

HCB4532 KF-800T90_181 2

12

PL701

PL701

PC703

PC703

0.1U_0603_25V7K

0.1U_0603_25V7K

12

HCB4532 KF-800T90_181 2

1 2

12

PC710

PC710
2200P_0 402_50V7K

2200P_0 402_50V7K

PC720

PC720

0.1U_040 2_25V6

0.1U_040 2_25V6

1 2

1.05VS_5 1117_B+

12

PC702

PC702

10U_0805_25V6K

10U_0805_25V6K

0.68UH_P CMC063T-R68MN _15.5A_20%

0.68UH_P CMC063T-R68MN _15.5A_20%

12

PR704

PR704

4.7_1206 _5%

4.7_1206 _5%

SNB_1.05VS_VCCP

12

PC707

PC707
680P_04 02_50V7K

680P_04 02_50V7K

PL702

PL702

B+

12

PC704

PC704

@680P_0 402_50V7K

@680P_0 402_50V7K

+1.05VS_VCCPP

1

+

+

PC706

PC706
330U_6.3 V_M

330U_6.3 V_M

2

6

5

NC

7

NC

8

NC

9

TP

1

PJ603

PJ603

1

JUMP_43 X118

JUMP_43 X118

2

2

D D

PR601

PR601

30K_040 2_5%

30K_040 2_5%

SUSP<5,45>

C C

PR701

PR701

30K_040 2_5%

30K_040 2_5%

SUSP#

+5VALW

B B

1 2

PR706

PR706

100_060 3_5%

100_060 3_5%

1 2

12

PC701

PC701
1U_0603 _6.3V6M

1U_0603 _6.3V6M

12

PC709

PC709

4.7U_060 3_10V6K

4.7U_060 3_10V6K

PC721

PC721

12

1000P_0 402_25V8J

1000P_0 402_25V8J

1 2

1.2K_040 2_1%

1.2K_040 2_1%

1 2

PR714

PR714

12

PC601

PC601
1U_0402 _6.3V6K

1U_0402 _6.3V6K

267K_04 02_1%

267K_04 02_1%

1 2

TON_1.05 VS_VCCP

+1.05VS_ VCCPP

V5FILT_1.0 5VS_VCCP

VFB_1.05 VS_VCCP

2

G

G

PR702

PR702

13

PU701

PU701

2

3

4

5

6

D

D

PQ602

PQ602

S

S

2N7002W -T/R7_SOT32 3-3

2N7002W -T/R7_SOT32 3-3

1

15

TON

OUT

VCC

FB

PGOOD

TP

EN_SKIP

VFB=0.75V

AGND7PGND

1 2

PR708

PR708

4.02K_04 02_1%

4.02K_04 02_1%

12

PR709

PR709

10K_040 2_1%

10K_040 2_1%

PR713

PR713

0_0402_ 5%

0_0402_ 5%

VSSIO_SEN SE<8 >

A A

1 2

5

1 2

PR711

PR711

10K_040 2_1%

10K_040 2_1%

PR712

PR712
@10K_04 02_1%

@10K_04 02_1%

1 2

+3VALW

4

VCCPPW RGOOD < 52>

Security Class ification

Security Class ification

Security Class ification

2010/01/ 25 2010/12/ 31

2010/01/ 25 2010/12/ 31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/ 25 2010/12/ 31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PR710

PR710

0_0402_ 5%

0_0402_ 5%

12

2

VCCIO_SEN SE <8>

PJ701

PJ701

2

112

JUMP_43 X118

JUMP_43 X118
PJ702

PJ702

2

112

JUMP_43 X118

JUMP_43 X118

+1.05VS_VCCP:
Ipeak=16.92A;Imax=14.1A
Rdson=4.5~5.6m ohm ; Freq=220KHz
Rtrip=12Kohm,Vtrip<200mV
Iocp=17~17.56A

Compal Electronics, Inc.

Title

Title

Title

PWR +1.05VS_VCCPP/+0.75VSP

PWR +1.05VS_VCCPP/+0.75VSP

PWR +1.05VS_VCCPP/+0.75VSP

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-6931P

LA-6931P

LA-6931P

1

+1.05VS_ VCCP+1.05VS_ VCCPP

53 11Wednesd ay, October 27, 20 10

53 11Wednesd ay, October 27, 20 10

53 11Wednesd ay, October 27, 20 10

0.1

0.1

0.1

A

www.bufanxiu.com

1 1

1 2

PR802

PR802

267K_0402_1%

267K_0402_1%

VGA_ON<17,23,46>

VGA_ON#

+5VALW

2 2

Layout Note:
Place near V5FILT Pin

1 2

PR801

PR801

100K_0402_1%

100K_0402_1%

1 2

PR807

PR807

1K_0402_1%

1K_0402_1%

PC815

PC815

0.01U_0402_16V7K

0.01U_0402_16V7K

1 2

PR808

PR808

100_0603_5%

100_0603_5%

2

G

G

12

12

12

PR805

PR805

13

D

D

@47K_0402_5%

@47K_0402_5%

PQ805

PQ805

S

S

2N7002W- T/R7_SOT323-3

2N7002W- T/R7_SOT323-3

PC808

PC808

4.7U_0603_10V6K

4.7U_0603_10V6K

12

PC801

PC801

0.22U_0402_16V7K

0.22U_0402_16V7K

VFB=0.75V

PC809

PC809

1 2

1000P_0402_25V8J

1000P_0402_25V8J

1 2

PR810

PR810

43K_0402_1%

43K_0402_1%

S

S

G

G

12

2

PR813

PR813
124K_0402_1%

124K_0402_1%

EN_VDDCI BST_V DDCI

PU801

PU801

TON_VDDCI

V5FILT_VDDCI

VFB_VDDCI

1.2K_0402_1%

1.2K_0402_1%

1 2

PR820

PR820

D

D

13

PQ803

PQ803
2N7002W- T/R7_SOT323-3

2N7002W- T/R7_SOT323-3

10K_0402_5%

10K_0402_5%

12

PC814

PC814

0.22U_0402_16V7K

0.22U_0402_16V7K

+VDDCIP

12

PR811

PR811

60.4K_0402_1%

60.4K_0402_1%

PR814

PR814

2

3

4

5

6

+3VALW

12

TON

VOUT

V5FILT

VFB

PGOOD

1

EN_PSV

12

PR812

PR812
@10K_0402_5%

@10K_0402_5%

12

PR815

PR815
10K_0402_5%

10K_0402_5%

15

TP

GND7PGND

B

1 2

PR804

PR804

0_0603_5%

0_0603_5%

14

DRVH

TRIP

DRVL

UG_VDDCI

13

LX_VDDCI

12

LL

11

10

LG_VDDCI

9

RT8209M

RT8209M

8

VBST

V5DRV

VDDCI_VID <23>

BST_VDDCI-1

12

PR809

PR809

8.25K_0402_1%

8.25K_0402_1%

PC804

PC804

1 2

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

12

PC807

PC807

4.7U_0805_10V6K

4.7U_0805_10V6K

578

3 6

241

578

3 6

241

GPIO 6

VDDCI_VID

0

1

C

51117_VDDCI_B+

12

PQ801

PQ801
MDS1660URH

MDS1660URH

2.2UH_PCMC063T-2R 2MN_8A_20%

2.2UH_PCMC063T-2R 2MN_8A_20%

12

PQ802

PQ802
MDS2659URH

MDS2659URH

SNB_VDDCI

12

Granville PRO

VDDCI Voltage Level

1.00 V

0.90 V

12

PC802

PC802

10U_0805_25V6K

10U_0805_25V6K

PL801

PL801

1 2

PR806

PR806

4.7_1206_5%

4.7_1206_5%

PC806

PC806
470P_0603_50V8J

470P_0603_50V8J

PC803

PC803

0.1U_0603_25V7K

0.1U_0603_25V7K

2

JUMP_43X118

JUMP_43X118

12

PC813

PC813
2200P_0402_50V7K

2200P_0402_50V7K

12

PC822

PC822

0.1U_0402_25V6

0.1U_0402_25V6

PR803

PR803

0_0402_5%

0_0402_5%

Comment

Default

D

PJ801

PJ801

B+

112

PJ802

PJ802

+VDDCIP

1

+

+

PC805

PC805
330U_6.3V_M

330U_6.3V_M

2

VDDCI_SEN

12

VDDCI_SEN <25>

VFB=0.75V
Vo=VFB*(1+PR156/PR150)=1.1V
Ton=19E-12*Ron*(((2/3)*Vo+150mV)/Vin)+50ns=2.4E-7
Freq=282KHz

Cesr=15m ohm
Ipeak=4.60A Imax=2.70A
Delta I=((19.5-1.0)*(1.0/19.5))/(L*Freq)=1.48A
Vtrip=Rtrip*10uA=0.0787V
Iocp-min=5.96A
Iocp-max=6.01A
Iocp=5.96~6.01A

2

JUMP_43X118

JUMP_43X118

+VDDCI+VDDCIP

112

3 3

+1.5V +3VALW

12

PC820

PC820
1U_0603_10V6K

1

PJ803

PJ803

1

JUMP_43X118

JUMP_43X118

2

2

PC821

PC821

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

1 2

VGA_ON<17,23,46>

4 4

VGA_ON#<23,46,55>

PR817

PR817

47K_0402_5%

47K_0402_5%

A

12

13

D

D

2

G

G

PQ804

PQ804

S

S

2N7002W- T/R7_SOT323-3

2N7002W- T/R7_SOT323-3

12

PC810

PC810

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VCNTL_1.0VGPU
VIN_1.0VGPU

EN_1.0VGPU

12

PR816

PR816
@22K_0402_5%

@22K_0402_5%

1U_0603_10V6K

PU802

PU802

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

3

VOUT

4

VOUT

2

FB

GND

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

1

B

+1.0VSPDGPU

VOUT_1.0VGPU

VFB_1.0VGPU

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PR818

PR818

1.54K_0402_1%

1.54K_0402_1%

12

PR819

PR819

6.04K_0402_1%

6.04K_0402_1%

12

PC811

PC811
220P_0402_25V8J

220P_0402_25V8J

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

12

PC812

PC812
22U_0805_6.3VAM

22U_0805_6.3VAM

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

PJ804

PJ804

2

JUMP_43X118

JUMP_43X118

+1.0VSDGPU+ 1.0VSPDGPU

112

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

VDDCIP/1.0VSDGPU

VDDCIP/1.0VSDGPU

Document Number Rev

VDDCIP/1.0VSDGPU

LA-6931P

D

54 11Wednesday, Oct ober 27, 2010

54 11Wednesday, Oct ober 27, 2010

54 11Wednesday, Oct ober 27, 2010

0.1

0.1

0.1

5

www.bufanxiu.com

4

3

2

1

PL902

PL902

FBMA-L11-322513-201LMA40T_1210

FBMA-L11-322513-201LMA40T_1210

B+

1 2

+3VS

B+_VCORE

VCC_VCORE

12

PC906

PC906

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

EN_VCORE

VGA_PWROK<18,22,27>

PR929

PR929

10K_0402_5%

10K_0402_5%

3

4

5

12

PC909

PC909
22P_0402_50V8J

22P_0402_50V8J

12

8

GND

VIN

VCC

EN

NC6FB7FSET

COMP_VCORE

12

12

PGD_VCORE

DH_VCORE

LX_VCORE

2

1

16

UG

PHASE

PGOOD

PU901

PU901

APW7138NITRL_SSOP16

APW7138NITRL_SSOP16

VFB=0.6V

9

FST_VCORE

VFB_VCORE

49.9K_0402_1%

49.9K_0402_1%

PC911

PC911

2200P_0402_25V7K

2200P_0402_25V7K

12

12

PR913

PR913

PC917

PC917
1000P_0402_25V8J

1000P_0402_25V8J

1 2

1 2

PR911

PR911

5.11K_0402_1%

5.11K_0402_1%

PR914

PR914
10K_0402_1%

10K_0402_1%

PR912

PR912

BST_VCORE

15

BOOT

PVCC

LG

PGND

ISEN

VO

10

VOUT_VCORE

12

PC910

PC910
@0.01U_0402_25V7K

@0.01U_0402_25V7K

36.5K_0402_1%

36.5K_0402_1%

PR908

PR908

1.2K_0402_1%

1.2K_0402_1%

1 2

14

13

12

11

12

PR902

PR902

2.2_0603_5%

2.2_0603_5%

PVCC_VCORE

DL_VCORE

ISEN_VCORE

PR909

PR909

0_0402_5%

0_0402_5%

+5VALW

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PR903

PR903
0_0603_5%

0_0603_5%

1 2

PR904

PR904

4.7_0603_5%

4.7_0603_5%

1 2

PC905

PC905

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1 2

PR907

PR907

5.62K_0402_1%

5.62K_0402_1%

GCORE_SEN

12

1 2

PC904

PC904

VCC_VCORE

GCORE_SEN <25 >

5

4

PQ901 AON64 28LPQ901 AON6428L

123

4

PQ903 AON6784PQ903 AON6784

123 5

12

12

PC915

PR901

PR901

PC915

13

D

D

2

G

G

S

S

2200P_0402_50V7K

2200P_0402_50V7K

+3VS

1 2

12

PQ905

PQ905
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

D D

VGA_CORE_EN<46>

C C

VGA_ON#<23,46,54>

B B

1 2

22K_0402_5%

22K_0402_5%

12

PC914

PC914

PC903

PC903

10U_0805_25V6K

10U_0805_25V6K

0.1U_0603_25V7K

0.1U_0603_25V7K

PR905

PR905
@10K_0402_5%

@10K_0402_5%

PC901

PC901

0.22U_0402_16V7K

0.22U_0402_16V7K

12

PC902

PC902

10U_0805_25V6K

10U_0805_25V6K

VGA_CORE
F=1/(75*e-12*44.2)=300K
Ipeak=47A Imax=32.9A Iocp=56.5A
Iocpmin=(5.11K*26uA)/((5.6mohm/2)*1.2)=56.5A
Iocpmin=56.5A

4

PQ902

PQ902
AON6428L

AON6428L

123 5

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

1 2

12

PR906

PR906

4.7_1206_5%

4.7_1206_5%

4

PQ904

PQ904
AON6784

AON6784

123 5

SNB_VCORE

12

PC908

PC908
680P_0603_50V7K

680P_0603_50V7K

Rds=3.2mOHM

PC918

PC918

1 2

0.1U_0402_25V6

0.1U_0402_25V6

PL901

PL901

1

+

+

PC916

PC916
390U_2.5V_M

390U_2.5V_M

2

+VGA_CORE

1

+

+

PC907

PC907
390U_2.5V_M

390U_2.5V_M

2

ESR=10mohm

12

PR915

PR918

PR918

69.8K_0402_1%

5

G

G

69.8K_0402_1%

PQ906B

PQ906B

34

D

D

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

S

S

4

+3VS_DELAY

PR926

PR926
@10K_0402_5%

@10K_0402_5%

1 2

1 2

PR927

PR927

GPU_VID0<23> GPU_VID1 <23>

A A

12

10K_0402_5%

10K_0402_5%

PR928

PR928
10K_0402_5%

10K_0402_5%

5

34

D

D

5

G

G

S

S

PR920

PR920
10K_0402_5%

10K_0402_5%

1 2

PR921

PR921

12

10K_0402_5%

10K_0402_5%

PR922

PR922
@10K_0402_5%

@10K_0402_5%

PQ907B

PQ907B
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

12

12

PC913

PC913
4700P_0402_25V7K

4700P_0402_25V7K

PR915

30.1K_0402_1%

30.1K_0402_1%

1 2

PQ906A

PQ906A

61

D

D

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

2

G

G

S

S

12

+3VS_DELAY+3VS_DELAY

1 2

PR917

PR917

10K_0402_5%

10K_0402_5%

PC912

PC912
4700P_0402_25V7K

4700P_0402_25V7K

PR916

PR916

10K_0402_5%

10K_0402_5%

1 2

PQ907A

PQ907A

61

D

PR919

PR919
@10K_0402_5%

@10K_0402_5%

1 2

Security Classification

Security Classification

Security Classification

D

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

2

G

G

S

S

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3VS_DELAY

Deciphered Date

Deciphered Date

Deciphered Date

V1

V2

V3

V4

2

PR923

PR923
@10K_0402_5%

@10K_0402_5%

1 2

12

PR924

PR924

10K_0402_5%

10K_0402_5%

12

PR925

PR925
10K_0402_5%

10K_0402_5%

Compal Secret Data

Compal Secret Data

2007/12/18 2010/08/01

2007/12/18 2010/08/01

2007/12/18 2010/08/01

Compal Secret Data

GPU_VID1

0 0 1.05 V

0

1 0

GPU_VID0

1

11

+VGA_CORE

1.00 V

0.95 V

0.9 V

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Siz

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

+VGA_COREP

+VGA_COREP

+VGA_COREP

e Document Number Rev

LA-6931P

55 11Wednesday, October 27, 2010

55 11Wednesday, October 27, 2010

1

55 11Wednesday, October 27, 2010

0.2

0.2

0.2

5

www.bufanxiu.com

4

3

2

1

0_0402_5%

0_0402_5%

12

PR256

PR256

PR223

PR223

12

11K_0402_1%

11K_0402_1%

B+

1

+

+

PC204

PC204

220U_25V_M

220U_25V_M

2

+5VS

12

PR216

PR216

0_0402_5%

0_0402_5%

5

6

2

3

12

PC227

PC227

2.2U_0603_10V6K

2.2U_0603_10V6K

PR242

PR242
0_0402_5%

0_0402_5%

(Ipeak=94A)

VSUM+

12

PR253

PR253

2.61K_0402_1%

2.61K_0402_1%

12

PH204

PH204

VSUM-

10KB_0603_5%_ERTJ1VR103J

10KB_0603_5%_ERTJ1VR103J

12

PC252

PC252

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC265

PC265

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PC215

PC215

1U_0603_10V6K

1U_0603_10V6K

PU202

PU202

BOOT

VCC

FCCM

UGATE

PWM

PHASE

LGATE

GND

ISL6208CRZ-T_QFN8

ISL6208CRZ-T_QFN8

PR228

PR228

1 2

0_0402_5%@

0_0402_5%@

PR230

PR230

1 2

0_0402_5%

0_0402_5%

12

UGATE2

PHASE2

BOOT2

LGATE2

UGATE1

PHASE1

2.2_0603_5%

2.2_0603_5%
PR261

PR261

BOOT1

LGATE1

PC266

PC266

0.1U_0603_25V7K

0.1U_0603_25V7K

09/09

1

8

7

4

2.2_0603_5%

2.2_0603_5%
PR244

PR244

0.22U_0603_10V7K

0.22U_0603_10V7K

0.22U_0603_10V7K

0.22U_0603_10V7K

12

UGATEG

PHASEG

BOOTG

LGATEG

PR215

PR215

2.2_0603_5%

2.2_0603_5%

+5VS

12

PC234

PC234

PC253

PC253

12

PR205

PR205

UMA@2.2_0603_5%

UMA@2.2_0603_5%

12

PC217

PC217

1 2

12

PC207

PC207

12

12

UMA@0.22U_0603_10V7K

UMA@0.22U_0603_10V7K

0.22U_0603_10V7K

0.22U_0603_10V7K

PQ206

PQ206

4

AON6428L

AON6428L

4

PQ210

PQ210

5

PQ214

PQ214

4

AON6428L

AON6428L

4

5

4

AON6428L

AON6428L

4

123

CPU_B+

123

123 5

PQ202

PQ202

CPU_B+

PQ208

PQ208

123 5

5

PC248

PC248

PQ216

PQ216

4

UMA@AON6428L

UMA@AON6428L

12

PC222

PC222

10U_0805_25V6K

10U_0805_25V6K

AON6784

AON6784

123

PQ212

PQ212

123 5

12

PC249

PC249

10U_0805_25V6K

10U_0805_25V6K

12

12

AON6784

AON6784

Alert# PU resister need close CPU,

the PU resister in HW schemat ic.

so
but DAT and CLK need close PWM -IC,
so the PU resister in POWER schematic.

12

D D

PR206

UMA@499K_0402_1%

UMA@499K_0402_1%

Parallel and tune length

VR_SVID_DAT<8>

VR_SVID_ALRT#<8>

VR_SVID_CLK<8>

VSSSENSE

VR_HOT#<40>

680P_0402_50V7K

680P_0402_50V7K

+3VS

12

PR236

PR236

19.1K_0402_1%

19.1K_0402_1%

PR238

PR238

1 2

499_0402_1%

499_0402_1%

@

@

PC228

PC228
47P_0402_50V8J

47P_0402_50V8J

PR249

PR249

1 2

499K_0402_1%

499K_0402_1%

@

@

PC251

PC251

12

C C

IMVP_IMON<40>

+1.05VS_VCCPP

B B

PR202

PR202

12

@PR206

@

VSS_AXG_SENSE

PR226

PR226

1 2

1.91K_0402_1%

1.91K_0402_1%

VGATE <15>

12

PC226

PC226

For shortage changed

0.047U_0603_16V7K

0.047U_0603_16V7K

12

12

PR243

PR243

150P_0402_50V8J

150P_0402_50V8J

PR269

PR269

12

2K_0402_1%

2K_0402_1%

UMA@8.06K_0402_1%

UMA@8.06K_0402_1%

PC210

PC210
UMA@39P_0402_50V7K

UMA@39P_0402_50V7K

PC213

PC213
UMA@150P_0402_50V8J

UMA@150P_0402_50V8J

12

12

PR217

PR217

UMA@18.2K_0402_1%

UMA@18.2K_0402_1%

For shortage changed

PR239

PR239

1 2

3.83K_0402_1%

3.83K_0402_1%

12

PC232

PC232

8.06K_0402_1%

8.06K_0402_1%

PC238

PC238
33P_0402_50V8J

33P_0402_50V8J

12

PC243

PC243

PR254

PR254

12

316K_0402_1%

316K_0402_1%

+CPU_CORE

VCCSENSE<8>

VSSSENSE<8>

12

PC205

PC205

UMA@1000P_0402_50V7K

UMA@1000P_0402_50V7K

12

UMA@422_0402_1%

UMA@422_0402_1%

12

PR211

PR211
UMA@475K_0402_1%

UMA@475K_0402_1%

PC220

@PC220

@

12

.1U_0402_16V7K

.1U_0402_16V7K

PC216

PC216

12

1 2

PR220

130_0402_1%

PR220

130_0402_1%

UMA@0.047U_0603_16V7K

UMA@0.047U_0603_16V7K

GFX_CORE_PWRGD<40>

PR232

PR232

1 2

499_0402_1%

499_0402_1%

12

PH203

PH203

PR240

PR240

12

27.4K_0402_1%

27.4K_0402_1%

PR250

PR250

PR255

PR255

3.48K_0402_1%

3.48K_0402_1%

PR257

PR257

10_0402_1%

10_0402_1%

PR260

PR260

10_0402_1%

10_0402_1%

1 2

0_0402_5%

0_0402_5%

12

12

12

VR_ON<40>

470K_0402_5%_TSM0B474J4702RE

470K_0402_5%_TSM0B474J4702RE

1000P_0402_50V7K

1000P_0402_50V7K

PC211

PC211
UMA@680P_0402_50V7K

UMA@680P_0402_50V7K

PR210

PR210

12

12

PR212

PR212
UMA@2.55K_0402_1%

UMA@2.55K_0402_1%

+1.05VS_VCCPP

12

PR221

PR221

+3VS

PR225

PR225

SVID_SDA

SVID_ALERT#

SVID_SCLK

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

PC241

PC241

12

470P_0402_50V7K

470P_0402_50V7K

12

54.9_0402_1%

54.9_0402_1%

12

VSUM-

12

UMA@1.91K_0402_1%

UMA@1.91K_0402_1%

PR201

PR201

UMA@3.83K_0402_1%

UMA@3.83K_0402_1%

12

1 2

UMA@27.4K_0402_1%

UMA@27.4K_0402_1%

PC208

PC208

48

1

VWG

2

IMONG

3

PGOODG

4

SDA

5

ALERT#

6

SCLK

7

VR_ON

8

PGOOD

9

IMON

10

VR_HOT#

11

NTC

12

VW

PC233

PC233
22P_0402_50V8J@

22P_0402_50V8J@

PC237

PC237

PC240

PC240

PC242

PC242

PC250

PC250

1000P_0402_50V7K

1000P_0402_50V7K

49

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

PC247

PC247

330P_0402_50V7K

330P_0402_50V7K

45

47

46

FBG

GND

VSENG

COMPG

PU201

PU201
ISL95831CRZ-T_TQFN48_6X6

ISL95831CRZ-T_TQFN48_6X6

COMP13FB14ISEN3/ FB215ISEN216ISEN117VSEN18RTN19ISUMN20ISUMP21VDD22VIN23PROG1

12

ISEN2

ISEN1

ISEN3

12

12

12

12

PC246

PC246

12

PH201

PH201

12

UMA@470KB_0402_5%_ERTJ0EV474J

UMA@470KB_0402_5%_ERTJ0EV474J

PR203

PR203

PC206

PC206

1 2

12

UMA@330P_0402_50V7K

UMA@330P_0402_50V7K

UMA@1000P_0402_50V7K

UMA@1000P_0402_50V7K

UMA@330P_0402_50V7K

UMA@330P_0402_50V7K

ISPG

ISNG

12

NTCG

44

42

43

41

ISPG

ISNG

NTCG

RTNG

PROG2

create symbol

12

330P_0402_50V7K

330P_0402_50V7K

PC212

PC212

12

PR259

PR259

@0_0402_5%

@0_0402_5%

UGATEG

BOOTG

40

39

UGG

BOOTG

12

PC235

PC235

1U_0603_10V6K

1U_0603_10V6K

PR258

PR258

1.24K_0402_1%

1.24K_0402_1%

NTCG

UMA@10_0402_1%

UMA@10_0402_1%

LGATEG

PHASEG

38

37

LGG

PHG

BOOT2

UG2

PH2

VSSP2

LG2

VDDP

PWM3

LG1

VSSP1

PH1

UG1

BOOT1

24

PR241

PR241

1 2

0_0603_5%

0_0603_5%

PR245

PR245

1_0603_5%

1_0603_5%

12

0.22U_0603_25V7K

0.22U_0603_25V7K

PC236

PC236

12

PC244

PC244

12

+VGFX_CORE

PR204

PR204

12

VCC_AXG_SENSE <9>

VSS_AXG_SENSE <9>

PR213

PR213

12

UMA@10_0402_1%

UMA@10_0402_1%

BOOT2

36

UGATE2

35

PHASE2

34

33

LGATE2

32

31

30

LGATE1

29

28

PHASE1

27

UGATE1

26

BOOT1

25

CPU_B+

12

+5VS

12

.033U_0402_16V7

.033U_0402_16V7
PC245

PC245

0.33U_0603_10V7K

0.33U_0603_10V7K

*Iccmax in Turbo Mode for SV (35W) is 53A

+CPU_CORE

Icc-max=53A
Rdson=3.6~4.5m ohm

A A

DCR=1.1m ohm
HW output cap:
(1)10U_0805_4V *10
(2)22U_0805_6.3V *15
(3)470U_D2_2V *4(ESR=4.5m ohm)

+VGFX_COREP

Ipeak=26A , Imax=18.2A , 1.2Ipeak=31.2A
Rdson=3.6~4.5m ohm
DCR=1.1m ohm
HW output cap:
(1)22U_0805_6.3V *12
(2)470U_D2_2V *2(ESR=4.5m ohm)

CPU_B+

5

12

PC202

PC202

UMA@10U_0805_25V6K

UMA@10U_0805_25V6K

123

PR207

4

AON6784

AON6784

10U_0805_25V6K

10U_0805_25V6K

PR262

PR262

PR207

UMA@AON6784

UMA@AON6784

123 5

PC214

PC214

PQ204

PQ204

12

12

PC259

PC259

PC223

PC223

10U_0805_25V6K

10U_0805_25V6K

0.1U_0603_25V7K

0.1U_0603_25V7K

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

PR231

PR231

4.7_1206_5%

4.7_1206_5%

12

PC225

PC225

680P_0402_50V7K

680P_0402_50V7K

CPU_B+

12

12

PC231

PC231

PC230

PC230

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

12

PR246

PR246

10K_0402_1%

10K_0402_1%

4.7_1206_5%

4.7_1206_5%

ISEN2

12

3.65K_0402_1%

3.65K_0402_1%

PC239

PC239

VSUM+

680P_0402_50V7K

680P_0402_50V7K

12

12

PC263

PC263

PC264

PC264

0.1U_0603_25V7K

0.1U_0603_25V7K
2200P_0402_50V7K

2200P_0402_50V7K

10K_0402_1%

10K_0402_1%

PR263

PR263

ISEN1

4.7_1206_5%

4.7_1206_5%

3.65K_0402_1%

3.65K_0402_1%
PR265

PR265

VSUM+

PC254

PC254

680P_0402_50V7K

680P_0402_50V7K

12

PC203

PC203

UMA@10U_0805_25V6K

UMA@10U_0805_25V6K

UMA@0.36UH_PCMC104T-R36MN1R17_30A_20%

UMA@0.36UH_PCMC104T-R36MN1R17_30A_20%

12

12

12

UMA@7.5K_0402_1%

UMA@7.5K_0402_1%
PR214

PR214

UMA@4.7_1206_5%

UMA@4.7_1206_5%

UMA@680P_0402_50V7K

UMA@680P_0402_50V7K

ISPG

12

PC260

PC260

2200P_0402_50V7K

2200P_0402_50V7K

ISEN3

10K_0402_1%

10K_0402_1%

VSUM+

12

PC261

PC261

0.1U_0603_25V7K

0.1U_0603_25V7K

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR247

PR247

PR251

PR251

12

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

12

HCB4532KF-800T90_1812

HCB4532KF-800T90_1812

1 2

PL202

PL202

12

12

PC255

PC255

PC256

PC256

UMA@0.1U_0603_25V7K

UMA@0.1U_0603_25V7K

UMA@2200P_0402_50V7K

UMA@2200P_0402_50V7K

PL201

PL201

1

4

3

2

PR208

PR208

PH202

PH202

UMA@10K_0402_5%_TSM0A103J4302RE

UMA@10K_0402_5%_TSM0A103J4302RE

UMA@10K_0402_1%

UMA@10K_0402_1%

1 2

1 2

UMA@11K_0402_1%

UMA@11K_0402_1%

PR218

PR218

1 2

1 2

PC218

PC218

UMA@.1U_0402_16V7K

UMA@.1U_0402_16V7K

1 2

PC221

PC221

UMA@0.01U_0402_16V7K

UMA@0.01U_0402_16V7K

+5VS

PR224

PR224

0_0402_5%

0_0402_5%

12

PL203

PL203

4

PR229

PR229

3

12

PR234

PR234

12

3.65K_0402_1%

3.65K_0402_1%

PR237

PR237

VSUM-

12

1_0402_5%

1_0402_5%

12

PC262

PC262

2200P_0402_50V7K

2200P_0402_50V7K

PL204

PL204

1

4

3

2

12

12

PL205

PL205

1

4

3

2

ISNG

10K_0402_1%

10K_0402_1%

10K_0402_1%

10K_0402_1%

1_0402_5%

1_0402_5%

10K_0402_1%

10K_0402_1%

1

2

B+

12

PC257

PC257

PC258

PC258

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PR209

PR209
UMA@1_0402_5%

UMA@1_0402_5%

UMA@.1U_0402_16V7K

UMA@.1U_0402_16V7K

PC219

PC219

1 2

12

PR227

PR227

@442_0402_1%

@442_0402_1%

PR233

PR233

10K_0402_1%

10K_0402_1%

PR235

PR235

10K_0402_1%

10K_0402_1%

+CPU_CORE

PR248

PR248

ISEN1

12

1_0402_5%

1_0402_5%

PR252

PR252

12

10K_0402_1%

10K_0402_1%

PR267

PR267

12

+CPU_CORE

PR264

PR264

ISEN2

12

PR266

PR266

12

PR268

PR268

ISEN3

12

12

0.1U_0603_25V7K

0.1U_0603_25V7K

+VGFX_CORE

+CPU_CORE

ISEN1

12

ISEN2

12

VSUM-

ISEN3

VSUM-

1

+

+

2

PC209

PC209

UMA@330U_X_2VM_R6M

UMA@330U_X_2VM_R6M

*OCP setting value=71.5A *OCP setting value=37A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/01/25 2010/12/31

2010/01/25 2010/12/31

2010/01/25 2010/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

PWR +CPU_CORE/+VGFX_CORE

PWR +CPU_CORE/+VGFX_CORE

PWR +CPU_CORE/+VGFX_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-6931P

LA-6931P

LA-6931P

1

56 10Wednesday, October 27, 2010

56 10Wednesday, October 27, 2010

56 10Wednesday, October 27, 2010

0.1

0.1

0.1

A

www.bufanxiu.com

B

C

D

E

COMPAL CONFIDENTIAL

MODEL NAME:

PCB NAME:

REVISION:

1 1

DATE:

P5LM0 Power Sequence Block Diagram
LA-6931P

0.1
2010/08/16

J2300

+3VALW_PCH

A1

AC
MODE

VIN

PU101

V

V

BATT
MODE

2 2

3 3

BATT

B1

B3

51ON#

V

A2

B+

PQ1

V

V

B2

PU301

V

V

B4

VS

EC_ON (Lock 51ON#)

A4

ON/OFF

A3

B5

+3/+5VALW

B6

SA_PGOOD

V

A5

B7 1

EC

V

8

1

V
V

V

1

PCH_DPWROK

1

PCH_RSMRST#

PBTN_OUT#

2

PM_SLP_S5#

3

V

V

4

9

6

PM_SLP_S4#

PM_SLP_S3#5

SYSON

VR_ON VGATE

SUSP#,SUSP

PU401

V

+1.5V

V

V

V V

PU201

V

+CPU_CORE

6a

U2300

V

+5VS

U2302

V

+3VS

U2303

V

+1.5VS

PCH

V

11

PM_DRAM_PWRGD

12

13

DGPU_HOLD_RST#

14

13a

(For SW@)

VGA_ON

(For DIS@)

10

H_CPUPWRGD

PLT_RST#

VGA_ON

SYS_PWROK

V

V

V

(For SW@)

10

CPU

(For DIS@)

V V

V

Q10
+3VS_Delay

U2304

V VV

+1.5VSDGPU

U2305
+1.8VSDGPU

U7

15

PLTRST_VGA#

V

GPU

D

PU901

V

+VGA_CORE

PU802

V

+1.0VSDGPU

PU801

V

+VDDCI

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power Sequence Block Diagram

Power Sequence Block Diagram

Power Sequence Block Diagram

LA-6931P

LA-6931P

LA-6931P

57 58Wednesday, October 27, 2010

57 58Wednesday, October 27, 2010

57 58Wednesday, October 27, 2010

E

1.0

1.0

1.0

PU601

V

+0.75V

PU402

VV

+1.8VS

4 4

A

B

+VCCSA

V

7

VCCPPWRGOOD

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PU501

C

PU701
+1.05VS_VCCP

Compal Secret Data

Compal Secret Data

2009/08/25 2010/08/25

2009/08/25 2010/08/25

2009/08/25 2010/08/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

5

www.bufanxiu.com

Version Change List ( P. I. R. List ) for HW Circuit

Version Change List ( P. I. R. List ) for HW Circuit

Version Change List ( P. I. R. List ) for HW CircuitVersion Change List ( P. I. R. List ) for HW Circuit

Request

Request

Item

Item Issue Description

Page#

ItemItem

Page#Page#

37

37

1111

D D

C C

B B

3737

2222 30

30 LVDS

3030

3333 35

35 CIR

3535

4444 34

34

3434
40 KBC

4040

6666 40

40 KBC

4040

7777 38

38 Card Reader

3838

8888

13, 14

13, 1413, 14

9999

18

18

1818

10

10

43

43 Audio

1010

4343

11 33

33 ODD

1111

3333

12

12 0.4

40

40 KBC

1212

4040

13

13

13

1313

1313

14

14

30

30 LVDS

1414

3030

15

15

46

46

1515

4646
46

46

16

16

4646

1616
17

17

46

46

1717

4646

18

18

46

46

1818

4646

19

19

34

34 LAN

1919

3434

14

14 PCH

20

20

1414

2020

21

21 44

44 BT

2121

4444

22

22 AUDIO

43

2222

4343

Title

Title

TitleTitle

USB3.0

USB3.0

USB3.0USB3.0
LVDS

LVDSLVDS

CIR

CIRCIR

LAN

LAN

LANLAN
KBC

KBCKBC

KBC

KBCKBC

Card Reader

Card ReaderCard Reader

PCH

PCH13, 14

PCHPCH
PCH

PCH

PCHPCH
Audio

AudioAudio
ODD

ODDODD
KBC

KBCKBC
PCH13

PCHPCH

LVDS

LVDSLVDS

GPU DC-DC

GPU DC-DC

GPU DC-DCGPU DC-DC
GPU DC-DC

GPU DC-DC 0.4

GPU DC-DCGPU DC-DC
GPU DC-DC

GPU DC-DC

GPU DC-DCGPU DC-DC
GPU DC-DC

GPU DC-DC

GPU DC-DCGPU DC-DC
LAN

LANLAN

PCH

PCHPCH

BT

BTBT
AUDIO

AUDIOAUDIO

Date

DateDate

8/26

8/26

8/268/26
8/26

8/26

8/268/26

8/26

8/26

8/268/26

8/27

8/27

8/278/27
8/28

8/28 Acer

8/288/28

8/30

8/30 Compal

8/308/30

8/31

8/31 Compal

8/318/31

9/06

9/069/06
9/06

9/06 Compal

9/069/06
9/09

9/09 Compal

9/099/09
9/23

9/23

9/239/23
9/24 Change R2231 from 8.2 K to 33K.

9/249/24
9/29

9/299/29

10/1

10/1

10/110/1

10/2

10/210/2
10/2

10/2 Compal

10/210/2
10/2

10/2 Compal

10/210/2
10/2

10/2 Compal

10/210/2
10/7

10/7 Compal

10/710/7

10/11

10/11

10/1110/11

10/20

10/20 Compal

10/2010/20
10/20

10/20 Compal

10/2010/20

RequestRequest
Owner

Owner

OwnerOwner

Compal

Compal

CompalCompal
Compal

Compal

CompalCompal

Compal

Compal

CompalCompal

Compal

Compal Fine tune LAN_IO rising time

CompalCompal
Acer For PWR LED function in low battery mode.

AcerAcer

Compal Leakage for +5VS

CompalCompal

Compal Card reader function fail

CompalCompal

Compal

Compal9/06

CompalCompal
Compal

CompalCompal
Compal

CompalCompal
Compal

Compal Add R2494, R2495

CompalCompal
Compal

Compal9/24

CompalCompal
Compal

Compal9/29

CompalCompal

Compal

Compal

CompalCompal

Compal

Compal10/2

CompalCompal
Compal

CompalCompal
Compal

CompalCompal
Compal

CompalCompal
Compal

CompalCompal

Compal

Compal

CompalCompal

Compal For BT discharge

CompalCompal
Compal

CompalCompal

4

Issue DescriptionDate

Issue DescriptionIssue Description

For USB3.0 wake up function

For USB3.0 wake up function

For USB3.0 wake up functionFor USB3.0 wake up function
For LED panel EDID

For LED panel EDID Change R2130,R2131,R2185,R2186 from 2.2K to 0 Ohm

For LED panel EDIDFor LED panel EDID

For CIR can't work

For CIR can't work Add R2239,D2201 and pull up to +3VALW on EC side

For CIR can't workFor CIR can't work

Fine tune LAN_IO rising time Add C1231 and change R1223 from 47K to 470K Ohm

Fine tune LAN_IO rising timeFine tune LAN_IO rising time
For PWR LED function in low battery mode. Pull up to +3VALW with R2240 (10K Ohm.)

For PWR LED function in low battery mode.For PWR LED function in low battery mode.

Leakage for +5VS Delete net "BT_ON" from KBC side

Leakage for +5VSLeakage for +5VS

Card reader function fail Chang C1318, C1319 to 0.022 uF and 1500 pF

Card reader function failCard reader function fail

Leakage for +3VS

Leakage for +3VS Add R927, D10, D11 to prevent leakage.

Leakage for +3VSLeakage for +3VS
Leakage for +3V

Leakage for +3V Add R928, D12 to prevent leakage.

Leakage for +3VLeakage for +3V
SPDIF jack's LED always on.

SPDIF jack's LED always on.

SPDIF jack's LED always on.SPDIF jack's LED always on.
Don't support ODD zero power

Don't support ODD zero power

Don't support ODD zero power Don't support ODD zero power
Board ID

Board IDBoard ID
HDA_SYNC potential leakage concern.

HDA_SYNC potential leakage concern. Add pull down with 1M Ohm (R930) for HDA_SYNC.

HDA_SYNC potential leakage concern.HDA_SYNC potential leakage concern.
Fn+Left/Right hotKey no function, can not

Fn+Left/Right hotKey no function, can not

Fn+Left/Right hotKey no function, can notFn+Left/Right hotKey no function, can not
adjust brightness

adjust brightness

adjust brightnessadjust brightness
Fine tune 1.5VSDGPU timing

Fine tune 1.5VSDGPU timing

Fine tune 1.5VSDGPU timingFine tune 1.5VSDGPU timing
Fine tune 1.8VSDGPU timing

Fine tune 1.8VSDGPU timing Change R2339 to 33K and C2319 to 2.2u

Fine tune 1.8VSDGPU timingFine tune 1.8VSDGPU timing
For 1.8VSDGPU discharge

For 1.8VSDGPU discharge

For 1.8VSDGPU dischargeFor 1.8VSDGPU discharge
For 1.5VSDGPU discharge

For 1.5VSDGPU discharge

For 1.5VSDGPU dischargeFor 1.5VSDGPU discharge
For EMI's request

For EMI's request Add C1232, C1233

For EMI's requestFor EMI's request
<RTC Accuracy>Add 90% loading,after 24h

<RTC Accuracy>Add 90% loading,after 24h

<RTC Accuracy>Add 90% loading,after 24h<RTC Accuracy>Add 90% loading,after 24h
about 5s gap,can not meet spec +/-2.5s

about 5s gap,can not meet spec +/-2.5s

about 5s gap,can not meet spec +/-2.5sabout 5s gap,can not meet spec +/-2.5s
For BT discharge

For BT dischargeFor BT discharge
Has "po" noise when system enter/resume S3/S4/S5.

Has "po" noise when system enter/resume S3/S4/S5. Change C1126, C1127 to 0.01u

Has "po" noise when system enter/resume S3/S4/S5.Has "po" noise when system enter/resume S3/S4/S5.

3

Solution Description

Solution Description

Solution DescriptionSolution Description

Instal R2423

Instal R2423

Instal R2423Instal R2423
Change R2130,R2131,R2185,R2186 from 2.2K to 0 Ohm

Change R2130,R2131,R2185,R2186 from 2.2K to 0 OhmChange R2130,R2131,R2185,R2186 from 2.2K to 0 Ohm

Add R2239,D2201 and pull up to +3VALW on EC side

Add R2239,D2201 and pull up to +3VALW on EC sideAdd R2239,D2201 and pull up to +3VALW on EC side

Add C1231 and change R1223 from 47K to 470K Ohm

Add C1231 and change R1223 from 47K to 470K OhmAdd C1231 and change R1223 from 47K to 470K Ohm
Pull up to +3VALW with R2240 (10K Ohm.)

Pull up to +3VALW with R2240 (10K Ohm.)Pull up to +3VALW with R2240 (10K Ohm.)

Delete net "BT_ON" from KBC side

Delete net "BT_ON" from KBC sideDelete net "BT_ON" from KBC side

Chang C1318, C1319 to 0.022 uF and 1500 pF

Chang C1318, C1319 to 0.022 uF and 1500 pFChang C1318, C1319 to 0.022 uF and 1500 pF

Add R927, D10, D11 to prevent leakage.

Add R927, D10, D11 to prevent leakage.Add R927, D10, D11 to prevent leakage.
Add R928, D12 to prevent leakage.

Add R928, D12 to prevent leakage.Add R928, D12 to prevent leakage.

Add R1148.

Add R1148.

Add R1148.Add R1148.
Add R2494, R2495

Add R2494, R2495Add R2494, R2495
Change R2231 from 8.2 K to 33K.Board ID

Change R2231 from 8.2 K to 33K.Change R2231 from 8.2 K to 33K.
Add pull down with 1M Ohm (R930) for HDA_SYNC.

Add pull down with 1M Ohm (R930) for HDA_SYNC.Add pull down with 1M Ohm (R930) for HDA_SYNC.

Uninstall R2101 and install R2187

Uninstall R2101 and install R2187

Uninstall R2101 and install R2187Uninstall R2101 and install R2187

Change R2333 from 510K to 470K

Change R2333 from 510K to 470K

Change R2333 from 510K to 470KChange R2333 from 510K to 470K
Change R2339 to 33K and C2319 to 2.2u

Change R2339 to 33K and C2319 to 2.2uChange R2339 to 33K and C2319 to 2.2u

Change R2338 from 470 to 220

Change R2338 from 470 to 220

Change R2338 from 470 to 220Change R2338 from 470 to 220

Change R2332 from 470 to 220

Change R2332 from 470 to 220

Change R2332 from 470 to 220Change R2332 from 470 to 220
Add C1232, C1233

Add C1232, C1233Add C1232, C1233

Change C853, C854 from 18p to 27p

Change C853, C854 from 18p to 27p

Change C853, C854 from 18p to 27pChange C853, C854 from 18p to 27p

Add R2496, R2497 and Q2407

Add R2496, R2497 and Q2407

Add R2496, R2497 and Q2407Add R2496, R2497 and Q2407
Change C1126, C1127 to 0.01u

Change C1126, C1127 to 0.01uChange C1126, C1127 to 0.01u

2

1

Rev.

Rev.Page#

Rev.Rev.

0.3

0.3

0.30.3

0.3

0.3

0.30.3

0.3

0.3

0.30.3

0.3

0.3

0.30.3

0.3

0.35555 40

0.30.3

0.3

0.3

0.30.3

0.3

0.3

0.30.3

0.3

0.3

0.30.3

0.3

0.3

0.30.3

0.3

0.3

0.30.3

0.4

0.411

0.40.4

0.4

0.40.4

0.4

0.4PCH

0.40.4

0.4

0.4

0.40.4

0.4

0.4

0.40.4

0.4

0.4

0.40.4

0.4

0.40.4

0.4

0.4

0.40.4

0.4

0.4

0.40.4

0.4

0.4

0.40.4

0.4

0.4

0.40.4

1.0

1.0

1.01.0

1.0

1.043

1.01.0

A A

Security Classification

Security Classification

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

<Issued_Date> <Deciphered_Date>

<Issued_Date> <Deciphered_Date>

<Issued_Date> <Deciphered_Date>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

<Title>

<Title>

<Title>

LA-6931P

LA-6931P

LA-6931P

1

58 58Wednesday, October 27, 2010

58 58Wednesday, October 27, 2010

58 58Wednesday, October 27, 2010

1.0

1.0

1.0