Compal LA-5151P KAT00 DIS, Inspiron 1745, Studio 1745 Schematic

A

B

C

D

E

Model Name:

PCB NO:

1 1

PCB P/N: DA80000E400

BOM P/N:

KAT00 DIS

LA-5151P

(M92)43169531L01

(M96)43169531L02

Compal Confidential

2 2

Schematic Document

POITIER Montevina M96/M92

2009 / 06/ 12

Rev:1.0 (A00)

3 3

@ : Nopop component

92@ : Use ATI M92 Graphic solution
96@ : Use ATI M96 Graphic solution

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

Cover Sheet

Cover Sheet

LA-5151P

LA-5151P

LA-5151P

1 60Friday, June 12, 2009

1 60Friday, June 12, 2009

1 60Friday, June 12, 2009

E

R10 (A00)

R10 (A00)

R10 (A00)

5

Block Diagram
Compal confidential
Model : KAT00

D D

C C

B B

A A

CRT CONN

+5VS

LVDS CONN

+LCDVDD
+3.3V_ALW

DP CONN

+5VS

HDMI CONN

+5VS

P.35

P.37

P.36

To Card-reader subboard

8 IN 1 CONN

+3VS

IEEE1394

Mini Card 3

TV tuner

+3VS

P.28 P.27 P.27

DC IN

P.45

DC/DC Interface

P.45~52 P.52

5

P.35

BATT IN

ME & LEDPower Sequence

FAN

+5V_ALW
+3V_ALW

VGA

LVDS

DPA

DPB

CardBus

OZ888GS0

+3VS
+1.8VS

Express Card

Mini Card 2

WLAN

+3VS
+1.5VS+1.5VS

USB[4]

P.34

P.7

+3.3V_ALW

AMD M96(M92)

29 x 29 mm

VRAM 64Mx16

(M92x4 / M96x8)

P.32

P.28

PCIE2PCIE3

VCORE (IMVP-6)

CHARGER

GPU/1.1V 1.05V/1.8V

4

Thermal

EMC1402

PCIE-E 16X

P.38,39,40,41,42

P.43,44

PCI Express BUS

Mini Card 1

WWAN

+3VS
+1.5VS

USB[5]USB[6]

1.5V/0.75V

P.51 P.49

3V/5V

4

Pentium-M

Penryn -4MB (Socket P)

P.7

+1.5VS

+1.05V_VCCP

+VCC_CORE

H_A#(3..35) H_D#(0..63)

uFCPGA CPU

478pin

System Bus

FSB 1066 MHz

INTEL

Cantiga

+1.5VS

+1.05V_VCCP

+3.3VS

1329pin BGA

DMI

+1.5VS
100MHz

+5V_ALW

+5VS

+RTC_CELL

+3.3VS

+3.3V_ALW_ICH

+1.5VS

+1.05V_VCCP

GPIO5

FFS

P.20

INTEL

ICH9-M

676pin BGA

P.19,20,21,22,23

LPC BUS

+3VS
33MHz

ENE KBC

KB926QFD3

+RTC_CELL

+3.3V_ALW

Int.KBD &
BL

P.47P.46

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

P.48P.50

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

P.7,8,9

P.10,11,12,13,14,15,16

USB2.0

S-ATA(1)

PCI-E

Azalia I/F

S-ATA(3)

SATA2

E-ODD

+3VS

+5VS

P.31

Touch Pad

P.32P.32

3

2

CPU ITP Port

+1.05VS_CK505

Memory BUS (DDR3)

+1.5V 1066 MHz

S-HDD-2

P.29 P.29 P.29

+5VS

16Mx1sector

Flash ROM

SPI

P.31

Right Front Side.

Right behind side.

SATA0SATA1

S-HDD-1

+5VS

MMB

To MMB subboard

P.32

2

P.7

+3.3V_ALW

Azalia Codec

92HD73C

+3.3VS
+VDDA

AMP

MAX4411x2

P.30

HeadPhone &
MIC Jack

+3.3VS

1

Clock Generator

CK505

ICS9LPRS387AKLFT

+3VS_CK505
+1.05VS_CK505

DDRIII-DIMM X2

BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8

+1.5V

USB Port X1

+5V_ALW

USB Port1 X1

+5V_ALW

Bluetooth

Touch Screen

Camera

P.6

P.17,18

To Card-reader
subboard

To Single USB
subboard

P.30

P.32

P.30

Charge USB/E-SATA

RTL8111DL

P.25

P.25

Ports X1

+5V_ALW

P.24

MAX9736A

B+

MAX9736A

B+

AMP

AMP

P.30

RJ45

Speaker

P.26

Subwoofer

P.26

Dig. MIC

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

LA-5151P

LA-5151P

LA-5151P

2 60Friday, June 12, 2009

2 60Friday, June 12, 2009

2 60Friday, June 12, 2009

1

P.30

P.32

P.30

R10 (A00)

R10 (A00)

R10 (A00)

A

Voltage Rails

O MEANS ON X MEANS OFF

Symbol Note :

power
plane

+B

State

1 1

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

O

O

O

O

O

X

+5VALW

+3VALW

O

O

O

O

X

X X X

+1.5V

O

X X

X

+5VS

+3VS

+1.8VS

+1.5VS

+1.1VS

+VCCP

+0.75VS

+CPU_CORE

OO

OO

X

X

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build
DEBUG@ : means just reserve for debug.

USB Port

0

1

2

3

4

5

6

7

8

9

10

11

Device

USB&ESATA
Reader/BD

USB board
NC

WLAN
WWAN
WPAN
Express

NC
Touch screen
Bluetooth

Camera

SATA Port

0

1

4

5

Device

JSATA1
JSATA2

JESA1
JODD

PCIE Port

1

2

3

4

5

6

Device

JWWAN1
JWLAN1

JWPAN1

Reader/BD (OZ888)

JEXP1
RTL8111DL

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

X

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Note List

Note List

Note List

LA-5151P

LA-5151P

LA-5151P

3 60Friday, June 12, 2009

3 60Friday, June 12, 2009

3 60Friday, June 12, 2009

R10 (A00)

R10 (A00)

R10 (A00)

5

4

3

2

1

D D

VR_ON

ISL6266ACRZ-T
(PU10)

ADAPTER

VGA_ON

ISL6268CAZ-T
(PU9)

SYSON

B+

BATTERY

SUSP#

CHARGER

C C

SUSP#

TPS51117RGYR
(PU8)

TPS51117RGYR
(PU6)

TPS51427

44000mA

20000mA

9794mA

9857mA

+CPU_CORE

+GPU_CORE

+1.5V

+1.05V_VCCPP

SUSP#

0 Ohm

SI4392
(Q45)

RT9025
(PU15)

RT9026
(PU11)

+1.05VS_CK505

8881mA

+1.5VS

913mA

+1.1VS

?mA

+0.75VS

(PU5)

+5VALW

4400mA

+5VS

RUNON

SI4800BDY
(Q51)

2000mA 7377mA 669mA160mA 20mA

USB_EN#

TPS2062ADR
(U17)

+5V_CHGUSB

EN_EOL#

SI3456BDY
(Q3)

+LAN_IO

EN_EOL#

RTL8111DL

B B

FUSE

0 Ohm

0 Ohm

+CRT_VCC

+AVDD_AUDIO

+5VS_KBL

(U9)

+LAN_VDD

+3VALW

SUSP

FBM-11-160808-601-T
(L29)

+EC_AVCC

SUSP

SI4392DY
(Q50)

+3VS

0 Ohm

0 Ohm

0 Ohm

0 Ohm

+3VS_CK505

+DVDD_AUDIO

+3V_WLAN

+3V_WLAN

SUSP#

RT9025
(PU13)

+1.8VS

VDDEN

SI2310BDS-T1-E3

(Q25)

+LCDVDD

EN_EOL#

SI2310BDS

(Q34)

+3VS_DELAY

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power Rail

Power Rail

Power Rail

LA-5151P

LA-5151P

LA-5151P

4 60Friday, June 12, 2009

4 60Friday, June 12, 2009

4 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

D D

G16

A13

ICH9-M

4

ICH_SMBCLK

ICH_SMBDATA

2.2K

2.2K

10K

+3VALW

3

2N7002

2N7002

ICH_SM_DA

ICH_SM_CLK

2.2K

2.2K

+3.3VS

200

202

200

202

2

DIMMA

DIMMB

1

SMBUS Address 0xA0

SMBUS Address 0XA4

10

CLK GEN

2.2K

C C

SCL1

SDA1

77

78

EC_SMB_CK1

EC_SMB_DA1

2.2K

+3VALW

100 ohm

100 ohm

7

6

BATTERY

CONN

9

FFS

SMBUS Address Read D3 (H)
SMBUS Address Write D2 (H)

2.2K

2.2K

KBC

SCL2

SDA2

112

111

EC_SMB_CK2

EC_SMB_DA2

KB926QFD3

17

B B

18

EC_FB_SCLK

EC_FB_DATA

2.2K

2.2K

MMB

+3VS

+3VS

Need make sure EC will disable this SMB port in S5 /AC mode.

32

30

32

30

32

30

32

30

8

7

WLAN

WPAN

WWAN

EXPRESS
CARD

Thermal
Sensor

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address: 100_1100 b

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

HEX

A0

D2

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SMBUS TOPOLOGY

SMBUS TOPOLOGY

SMBUS TOPOLOGY

LA-5151P

LA-5151P

LA-5151P

5 60Friday, June 12, 2009

5 60Friday, June 12, 2009

5 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

Routing the trace at least 10mil

1 2

14.318MHZ_16PF_7A14300083

14.318MHZ_16PF_7A14300083

D D

22P_0402_50V8J~D

22P_0402_50V8J~D

2

C8

C8

1

R10 Moidify (short directly)

CPU_STP

CLK_DEBUG_PORT27

CLK_PCI_EC31

PCI_CLK20

C C

CK_PWRGD21

C1509

@C1509

@

10P_0402_50V8J~D

10P_0402_50V8J~D

CLK_XTAL_OUT

R2
0_0402_5%@R20_0402_5%@

CLK_XTAL_IN

Y1

Y1

12

2

C9

C9

22P_0402_50V8J~D

22P_0402_50V8J~D

1

H_STP_CPU#21

H_STP_PCI#21

R941 33_0402_1%R941 33_0402_1%

1 2

1 2

33_0402_1%

33_0402_1%

1 2

33_0402_1%

33_0402_1%

1

1

C1510

@C1510

@

10P_0402_50V8J~D

10P_0402_50V8J~D

2

2

+3VS_CK505

R548

@R548

@

10K_0402_5%

10K_0402_5%

R20

R20

R24

R24

+3VS_CK505

+1.05VS_CK505

12

12

@R549

@

10K_0402_5%

10K_0402_5%

R549

H_STP_CPU#

H_STP_PCI#

PCI2_TME

R_CLK_PCI_EC

27_SEL

ITP_EN

CLK_XTAL_IN

CLK_XTAL_OUT

Place close U1

CLK_48M_ICH21

CLK_14M_ICH21

C1518

@C1518

@

10P_0402_50V8J~D

10P_0402_50V8J~D

R38 33_0402_1%R38 33_0402_1%

1 2

R41 33_0402_1%R41 33_0402_1%

1 2

1

1

C1511

@ C1511

@

10P_0402_50V8J~D

10P_0402_50V8J~D

2

2

FSA

FSB

FSC

T1PAD T1PAD

(14.318 reference output)

Place clolse U1

B B

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

33.30

FSC FSB REF

CLKSEL2

*

0 1000 133 33.31 14.318 96.0 48.0

U1

U1

6

VDDREF

19

VDD48

72

VDDCPU

12

VDDPCI

27

VDDPLL3

55

VDDSRC

52

VDDSRC_IO

38

VDDSRC_IO

62

VDDSRC_IO

31

VDDPLL3_IO

66

VDDCPU_IO

23

VDD96_IO

53

CPU_STOP#

54

PCI_STOP#

13

PCI1

14

PCI2/TME

15

PCI3

16

PCI4/27_SELECT

17

PCI_F5/ITP_EN

1

CK_PWRGD/PD#

5

X1

4

X2

11

NC

20

USB_48MHz/FSLA

2

FSLB/TEST_MODE

7

FSLC/TEST_SEL/REF0

8

REF1

69

GNDCPU

3

GNDREF

18

GNDPCI

22

GND48

30

GND

26

GND

34

GNDSRC

59

GNDSRC

42

GNDSRC

ICS9LPRS387BKLFT_MLF72_10x10

ICS9LPRS387BKLFT_MLF72_10x10

DOT_96

MHz

MHz

14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

A A

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1

5

Reserved

4

27MHz_NonSS/SRCT1_LPR/SE1

27MHz_SS/SRCC1_LPR/SE2

CPUT2_ITP_LPR/SRCT8_LPR

CPUC2_ITP_LPR/SRCC8_LPR

B version P/N :
SA000020H10

USB
MHz

4

SDATA

SCLK

CPUT0_LPR_F

CPUC0_LPR_F

CPUT1_LPR_F

CPUC1_LPR_F

SRCT0_LPR/DOTT_96_LPR

SRCC0_LPR/DOTC_96_LPR

SRCT2_LPR/SATAT_LPR

SRCC2_LPR/SATAC_LPR

SRCT3_LPR

SRCC3_LPR

SRCT4_LPR

SRCC4_LPR

SRCT6_LPR

SRCC6_LPR

SRCT7_LPR

SRCC7_LPR

SRCT9_LPR

SRCC9_LPR

SRCT10_LPR

SRCC10_LPR

SRCT11_LPR

SRCC11_LPR

CR#3

CR#4

CR#6

CR7#

CR#9

CR10#

CR#11

CR#A

FSA

R48 2.2K_0402_5%R48 2.2K_0402_5%

CPU_BSEL08

FSB

CPU_BSEL18

FSC

R55 10K_0402_5%R55 10K_0402_5%

CPU_BSEL28

CLK_SMBDATA

9

CLK_SMBCLK

10

R_CPU_BCLK

71

R_CPU_BCLK#

70

R_MCH_BCLK

68

R_MCH_BCLK#

67

R_MCH_DREFCLK

24

R_MCH_DREFCLK#

25

R_MCH_SSCDREFCLK

28

R_MCH_SSCDREFCLK#

29

R_CLK_SATA

32

R_CLK_SATA#

33

R_CLK_EXPR

35

R_CLK_EXPR#

36

R_CLK_PCIE_WLAN

39

R_CLK_PCIE_WLAN#

40

R_CLK_VGA

57

R_CLK_VGA#

56

R_CLK_CB

61

R_CLK_CB#

60

R_DMI_ICH

64

R_DMI_ICH#

63

R_CLK_PCIE_GLAN

44

R_CLK_PCIE_GLAN#

45

R_CLK_WPAN

50

R_CLK_WPAN#

51

R_MCH_3GPLL

48

R_MCH_3GPLL#

47

37

41

VGA_CLKREQ#

58

65

43

49

46

21

1 2

R54 0_0402_5%R54 0_0402_5%

1 2

1 2

3

R10 Moidify (short directly)

R4 0_0402_5%@R4 0_0402_5%@

1 2

R3 0_0402_5%@R3 0_0402_5%@

1 2

R5 0_0402_5%@R5 0_0402_5%@

12

R6 0_0402_5%@R6 0_0402_5%@

12

R7 0_0402_5%@R7 0_0402_5%@

1 2

R8 0_0402_5%@R8 0_0402_5%@

1 2

R9 0_0402_5%@R9 0_0402_5%@

1 2

R11 0_0402_5%@R11 0_0402_5%@

1 2

R10 0_0402_5%@R10 0_0402_5%@

1 2

R12 0_0402_5%@R12 0_0402_5%@

1 2

R42 0_0402_5%@R42 0_0402_5%@

1 2

R43 0_0402_5%@R43 0_0402_5%@

1 2

R16 0_0402_5%@R16 0_0402_5%@

1 2

R17 0_0402_5%@R17 0_0402_5%@

1 2

R18 0_0402_5%@R18 0_0402_5%@

1 2

R19 0_0402_5%@R19 0_0402_5%@

1 2

R21 0_0402_5%@R21 0_0402_5%@

1 2

R23 0_0402_5%@R23 0_0402_5%@

1 2

R26 0_0402_5%@R26 0_0402_5%@

1 2

R28 0_0402_5%@R28 0_0402_5%@

1 2

R31 0_0402_5%@R31 0_0402_5%@

1 2

R33 0_0402_5%@R33 0_0402_5%@

1 2

R35 0_0402_5%@R35 0_0402_5%@

1 2

R37 0_0402_5%@R37 0_0402_5%@

1 2

R39 0_0402_5%@R39 0_0402_5%@

1 2

R40 0_0402_5%@R40 0_0402_5%@

1 2

R14 0_0402_5%@R14 0_0402_5%@

1 2

R15 0_0402_5%@R15 0_0402_5%@

1 2

EXP_CLKREQ# 28

WLAN_CLKREQ# 27

R25 10K_0402_5%R25 10K_0402_5%

1 2

CB_CLKREQ# 30

GLAN_CLKREQ# 24

WPAN_CLKREQ# 28

MCH_CLKREQ# 11

CLKSATAREQ# 21

R49 1K_0402_5%R49 1K_0402_5%

1 2

R53 1K_0402_5%R53 1K_0402_5%

1 2

R56 1K_0402_5%R56 1K_0402_5%

1 2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

ICH_SM_DA 17,18,20,21

ICH_SM_CLK 17,18,20,21

CLK_CPU_BCLK 7

CLK_CPU_BCLK# 7

CLK_MCH_BCLK 10

CLK_MCH_BCLK# 10

CLK_MCH_DREFCLK 11

CLK_MCH_DREFCLK# 11

MCH_SSCDREFCLK 11

MCH_SSCDREFCLK# 11

CLK_PCIE_SATA 19

CLK_PCIE_SATA# 19

CLK_PCIE_EXPR 28

CLK_PCIE_EXPR# 28

CLK_PCIE_WLAN 27

CLK_PCIE_WLAN# 27

CLK_PCIE_VGA 38

CLK_PCIE_VGA# 38

CLK_PCIE_CB 30

CLK_PCIE_CB# 30

CLK_DMI_ICH 22

CLK_DMI_ICH# 22

CLK_PCIE_GLAN 24

CLK_PCIE_GLAN# 24

CLK_PCIE_WPAN 28

CLK_PCIE_WPAN# 28

CLK_MCH_3GPLL 11

CLK_MCH_3GPLL# 11

R03 Modify

MCH_CLKSEL0 11

MCH_CLKSEL1 11

MCH_CLKSEL2 11

CPU

MCH

SATA

Express Card

WLAN

VGA

Cardbus

DMI (ICH)

GLAN

WPAN

MCH_3GPLL

2

R1

1 2

+3VS

0_0805_5%R10_0805_5%

+1.05V_VCCP

1 2

R13

R13

0_0805_5%

0_0805_5%

ITP_EN

27_SEL 0 = PIN 24/25 : DOT96 / DOT96#

PCI2_TME

+3VS_CK505 +3VS_CK505 +3VS_CK505

12

R45

@R45

@

10K_0402_5%

10K_0402_5%

ITP_EN 27_SEL PCI2_TME

12

R50

R50
10K_0402_5%

10K_0402_5%

2

+3VS_CK505

C4

0.1U_0402_16V4Z~DC40.1U_0402_16V4Z~D

C3

0.1U_0402_16V4Z~DC30.1U_0402_16V4Z~D

C2

0.1U_0402_16V4Z~DC20.1U_0402_16V4Z~D

C1

1

2

+1.05VS_CK505

1

2

22U_0805_6.3V6M~DC122U_0805_6.3V6M~D

C10

22U_0805_6.3V6M~D

C10

22U_0805_6.3V6M~D

EXP_CLKREQ#

WLAN_CLKREQ#

CB_CLKREQ#

GLAN_CLKREQ#

WPAN_CLKREQ#

MCH_CLKREQ#

CLKSATAREQ#

1

2

C11

0.1U_0402_16V4Z~D

C11

0.1U_0402_16V4Z~D

1

2

1

1

2

2

C12

0.1U_0402_16V4Z~D

C12

0.1U_0402_16V4Z~D

C13

0.1U_0402_16V4Z~D

C13

1

2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

0.1U_0402_16V4Z~D

1

2

R34 10K_0402_5%R34 10K_0402_5%

R32 10K_0402_5%R32 10K_0402_5%

R22 10K_0402_5%R22 10K_0402_5%

R30 10K_0402_5%R30 10K_0402_5%

R27 10K_0402_5%R27 10K_0402_5%

R36 10K_0402_5%R36 10K_0402_5%

R29 10K_0402_5%R29 10K_0402_5%

Port Device REQ#

SRC0

SRC2

PCIE_SATA

SRC3

PCIE_EXPR

SRC4

PCIE_WLAN

SRC6

PCIE_VGA

SRC7

PCIE_CB

SRC8

DMI_ICH

SRC9

PCIE_GLAN

SRC10

PCIE_WPAN WPAN_CLKREQ#

SRC11

MCH_3GPLL

0 = SRC8/SRC8#

*

1 = ITP/ITP#

*

PIN 28/29 : LCDCLK / LCDCLK#
1 = PIN 24/25 : SRC_0 / SRC_0#
PIN 28/29 : 27M / 27M_SS

REQ_A#

REQ#3

REQ#4

REQ#6

REQ#7

REQ#9

REQ#10

REQ#11

0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

*

12

R46

@R46

@

10K_0402_5%

10K_0402_5%

12

R51

R51

10K_0402_5%

10K_0402_5%

R47

R47

10K_0402_5%

10K_0402_5%

1 2

@R52

@

10K_0402_5%

10K_0402_5%

1 2

R52

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LA-5151P

LA-5151P

LA-5151P

1

0.1U_0402_16V4Z~DC70.1U_0402_16V4Z~D

C6

0.1U_0402_16V4Z~DC60.1U_0402_16V4Z~D

C5

0.1U_0402_16V4Z~DC50.1U_0402_16V4Z~D

1

2

C14

0.1U_0402_16V4Z~D

C14

0.1U_0402_16V4Z~D

1

2

+3VS

1

1

2

2

C15

0.1U_0402_16V4Z~D

C15

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

0.1U_0402_16V4Z~D

1

2

REQ#_NAME

CLKSATAREQ#

EXP_CLKREQ#

WLAN_CLKREQ#

CB_CLKREQ#

GLAN_CLKREQ#

MCH_CLKREQ#

Clock Generator CK505

Clock Generator CK505

Clock Generator CK505

6 60Friday, June 12, 2009

6 60Friday, June 12, 2009

6 60Friday, June 12, 2009

1

C7

C16

C16

R10 (A00)

R10 (A00)

R10 (A00)

5

4

3

XDP / ITP

XDP_TRST#

R59 54.9_0402_1%R59 54.9_0402_1%

XDP_TCK

1 2

R60 54.9_0402_1%R60 54.9_0402_1%

1 2

2

XDP_TDI

R57 51_0402_1%R57 51_0402_1%

XDP_TMS

1 2

R58 54.9_0402_1%R58 54.9_0402_1%

1 2

1

+1.05V_VCCP

This shall place near CPU

D D

Control

+1.05V_VCCP

CONN@

H_A#[3..16]10

H_ADSTB#010

H_REQ#010
H_REQ#110
H_REQ#210
H_REQ#310

C C

B B

H_REQ#410

H_A#[17..35]10

H_ADSTB#110

H_A20M#19

H_FERR#19

H_IGNNE#19

H_STPCLK#19

H_INTR19

H_NMI19

H_SMI#19

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

H_A20M#
H_FERR#
H_IGNNE#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

CONN@

JCPU1A

JCPU1A

J4

ADDR GROUP 0 ADDR G ROUP 1

ADDR GROUP 0 ADDR G ROUP 1

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

Penryn

Penryn

DEFER#

DRDY#
DBSY#

IERR#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

THERMAL

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

BCLK[0]
BCLK[1]

RESERVED

RESERVED

ADS#
BNR#
BPRI#

BR0#

INIT#

HIT#

TCK

TDO
TMS

DBR#

H_ADS#

H1

H_BNR#

E2

H_BPRI#

G5

H_DEFER#

H5

H_DRDY#

F21

H_DBSY#

E1

H_BR0#

F1

H_IERR#

D20

H_INIT#

B3

H_LOCK#

H4

H_RESET#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3

H_TRDY#

G2

H_HIT#

G6

H_HITM#

E4

AD4
AD3
AD1
AC4
AC2
AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20

H_PROCHOT#

D21
A24
B25

H_THERMTRIP#

C7

CLK_CPU_BCLK

12

A22

R932

R932

A21

100_0402_1%

100_0402_1%

CLK_CPU_BCLK#

H_ADS# 10
H_BNR# 10
H_BPRI# 10

H_DEFER# 10

H_DRDY# 10
H_DBSY# 10

H_BR0# 10

H_INIT# 19

H_LOCK# 10

H_RESET# 10
H_RS#0 10
H_RS#1 10
H_RS#2 10

H_TRDY# 10

H_HIT# 10
H_HITM# 10

T2T2

XDP_DBRESET# 21

R63 68_0402_5%R63 68_0402_5%

H_THERMDA
H_THERMDC

H_THERMTRIP# 11,19

CLK_CPU_BCLK 6

12

Qual core request

CLK_CPU_BCLK# 6

+1.05V_VCCP

H_THERMDA, H_THERMDC
routing together,Trace width /
Spacing = 10 / 10 mil

Qual core 50 ohm

H_IERR#

C17

C17

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C18 2200P_0402_50V7K~DC18 2200P_0402_50V7K~D

1 2

1 2

+3VS

R64 10K_0402_5%R64 10K_0402_5%

To power

VR_ON31,39,51

FAN Control circuit

1 2

+3VS

1

2

H_THERMDA

H_THERMDC

CPU_THERM_STP#

CPU_THERM_STP#

CPU_THERM_STP#

EN_DFAN131

10K_0402_5%

10K_0402_5%

FAN_SPEED131

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

R62

R62

49.9_0402_1%

49.9_0402_1%

EN_DFAN1

+3VS

12

R65

R65

2

C22

C22

1

Thermal

H_PROCHOT# OCP#

Thermal Sensor EMC1402-1-ACZL-TR

U2

U2

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

EMC1402-1-ACZL-TR_MSOP8

Address:100_1100

S

S

G

G

SMCLK

SMDATA

ALERT#

D

D

13

Q53

Q53
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2

C19

C19

10U_0805_10V4Z~D

10U_0805_10V4Z~D

12

C20

C20

1000P_0402_50V7K~D

1000P_0402_50V7K~D

12

8

7

6

5

GND

R1563

R1563

0_0402_5%

0_0402_5%

1 2

+FAN1_POWER

+1.05V_VCCP

12

R61

@R61

@

56_0402_5%

56_0402_5%

B

B

2

E

E

3 1

C

C

Q1

@

Q1

@

MMBT3904_SOT23-3~D

MMBT3904_SOT23-3~D

EC_SMB_CK2

EC_SMB_DA2

MAINPWON 39,47,52

+5VS

C21 10U_0805_10V4Z~DC21 10U_0805_10V4Z~D

U3

U3

1

VEN

2

VIN

3

VO

4

VSET

RT9027BPS_SO8

RT9027BPS_SO8

40mil

+FAN1_POWER

MOLEX_53261-0371~D

MOLEX_53261-0371~D

1 2

JFAN1

JFAN1

1
2

CONN@

CONN@

1
2
33G

GND
GND
GND
GND

G

OCP# 21

EC_SMB_CK2 27,28,31,39

EC_SMB_DA2 27,28,31,39

8
7
6
5

4
5

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Penryn(1/3)-AGTL+/ITP-XDP

Penryn(1/3)-AGTL+/ITP-XDP

Penryn(1/3)-AGTL+/ITP-XDP

LA-5151P

LA-5151P

LA-5151P

7 60Friday, June 12, 2009

7 60Friday, June 12, 2009

7 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

4

3

2

1

+CPU_CORE +CPU_CORE

CONN@

AD26

AF26

CONN@

JCPU1B

JCPU1B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3
TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Penryn

Penryn

DATA GRP 1

DATA GRP 1

MISC

MISC

DATA GRP 0

DATA GRP 0

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#

COMP[0]
COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#
DPWR#

PWRGOOD

SLP#
PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

COMP0
COMP1
COMP2
COMP3

H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#

H_D#[32..47] 10

H_DSTBN#2 10
H_DSTBP#2 10
H_DINV#2 10
H_D#[48..63] 10

H_DSTBN#3 10
H_DSTBP#3 10
H_DINV#3 10

H_DPRSTP# 11,19,51
H_DPSLP# 19

H_DPWR# 10

H_PWRGOOD 19
H_CPUSLP# 10

H_PSI# 51

R67

24.9_0402_1%

R67

24.9_0402_1%

R68

49.9_0402_1%

R68

49.9_0402_1%

R69

24.9_0402_1%

R69

R66

49.9_0402_1%

R66

49.9_0402_1%

12

12

24.9_0402_1%

12

12

H_D#[0..15]10

D D

H_DSTBN#010
H_DSTBP#010

H_DINV#010

H_D#[16..31]10

C C

H_DSTBN#110
H_DSTBP#110

H_DINV#110

CPU_BSEL06
CPU_BSEL16
CPU_BSEL26

+V_CPU_GTLREF

T3T3
T4T4
T5T5
T6T6
T7T7
T8T8

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

B B

Close to CPU pin AD26
within 500mils. Zo = 55 ohm

+V_CPU_GTLREF

+V_CPU_GTLREF

Cpu Quad Core, R=1.74K_0402_1%

Cpu Dual Core, R=2K_0402_1%

+1.05V_VCCP

12

R72

R72
1K_0402_1%

1K_0402_1%

12

R73

R73

1.74K_0402_1%

1.74K_0402_1%

FSB

533

667

800

1067 266 0 0 0

Qual core value

BCLK BSEL2 BSEL1 BSEL0

133

0 0 1

166

200

110

1 00

CONN@

CONN@

JCPU1C

JCPU1C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Penryn

Penryn

For 8 layer condition.
Length match within 25 mils.
The trace width/space/other
is 20/7/25. Zo = 27.4 ohm.

+CPU_CORE

R70 100_0402_1%R70 100_0402_1%

R71 100_0402_1%R71 100_0402_1%

AB20

VCC[068]

AB7

VCC[069]

AC7

VCC[070]

AC9

VCC[071]

AC12

VCC[072]

AC13

VCC[073]

AC15

VCC[074]

AC17

VCC[075]

AC18

VCC[076]

AD7

VCC[077]

AD9

VCC[078]

AD10

VCC[079]

AD12

VCC[080]

AD14

VCC[081]

AD15

VCC[082]

AD17

VCC[083]

AD18

VCC[084]

AE9

VCC[085]

AE10

VCC[086]

AE12

VCC[087]

AE13

VCC[088]

AE15

VCC[089]

AE17

VCC[090]

AE18

VCC[091]

AE20

VCC[092]

AF9

VCC[093]

AF10

VCC[094]

AF12

VCC[095]

AF14

VCC[096]

AF15

VCC[097]

AF17

VCC[098]

AF18

VCC[099]

AF20

VCC[100]

G21

VCCP[01]

V6

VCCP[02]

J6

VCCP[03]

K6

VCCP[04]

M6

VCCP[05]

J21

VCCP[06]

K21

VCCP[07]

M21

VCCP[08]

N21

VCCP[09]

N6

VCCP[10]

R21

VCCP[11]

R6

VCCP[12]

T21

VCCP[13]

T6

VCCP[14]

V21

VCCP[15]

W21

VCCP[16]

B26

VCCA[01]

C26

VCCA[02]

AD6

VID[0]

AF5

VID[1]

AE5

VID[2]

AF4

VID[3]

AE3

VID[4]

AF3

VID[5]

AE2

VID[6]

VCCSENSE

VSSSENSE

1 2

1 2

Close to CPU pin
within 500mils.

VCCSENSE

AF7

VSSSENSE

AE7

.

.

VCCSENSE

VSSSENSE

+1.05V_VCCP

CPU_VID0 51
CPU_VID1 51
CPU_VID2 51
CPU_VID3 51
CPU_VID4 51
CPU_VID5 51
CPU_VID6 51

VCCSENSE 51

VSSSENSE 51

1

+

+

C23

C23
220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

Near pin B26

+1.5VS

1

1

C25

C25

C24

C24

2

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Penryn(2/3)-AGTL+/ITP-XDP

Penryn(2/3)-AGTL+/ITP-XDP

Penryn(2/3)-AGTL+/ITP-XDP

LA-5151P

LA-5151P

LA-5151P

8 60Friday, June 12, 2009

8 60Friday, June 12, 2009

8 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

High Frequence Decoupling

10uF 0805 X5R -> 85 degree.

4

3

2

1

D D

C C

B B

CONN@

CONN@

JCPU1D

JCPU1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn

Penryn

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

.

+1.05V_VCCP

1

C62

C62

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

C58

C58

+

+

2

1

C63

C63

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

2

C26

C26
10U_0805_4VAM~D

10U_0805_4VAM~D

C36

C36
10U_0805_4VAM~D

10U_0805_4VAM~D

C46

C46
10U_0805_4VAM~D

10U_0805_4VAM~D

C52

C52
10U_0805_4VAM~D

10U_0805_4VAM~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

1

C59

C59

+

+

2

1

C64

C64

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

2

1

C27

C27
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C37

C37
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C47

C47
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C53

C53
10U_0805_4VAM~D

10U_0805_4VAM~D

2

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

1

C60

C60

+

+

2

1

2

1

2

1

2

1

2

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

1

C61

C61

+

+

2

1

C65

C65

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

2

C28

C28
10U_0805_4VAM~D

10U_0805_4VAM~D

C38

C38
10U_0805_4VAM~D

10U_0805_4VAM~D

C48

C48
10U_0805_4VAM~D

10U_0805_4VAM~D

C54

C54
10U_0805_4VAM~D

10U_0805_4VAM~D

1

2

1

C29

C29

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C39

C39

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C49

C49

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C55

C55
10U_0805_4VAM~D

10U_0805_4VAM~D

2

C66

C66

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

C30

C30
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C40

C40
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C50

C50
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C56

C56
10U_0805_4VAM~D

10U_0805_4VAM~D

2

ESR <= 1.5m ohm

Capacitor > 880 uF

1

C67

C67

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

2

1

C31

C31
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C41

C41
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C51

C51
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C57

C57
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C32

C32
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C42

C42
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C33

C33
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C43

C43
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C34

C34
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C44

C44
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C35

C35
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C45

C45
10U_0805_4VAM~D

10U_0805_4VAM~D

2

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Penryn(3/3)-AGTL+/ITP-XDP

Penryn(3/3)-AGTL+/ITP-XDP

Penryn(3/3)-AGTL+/ITP-XDP

LA-5151P

LA-5151P

LA-5151P

9 60Friday, June 12, 2009

9 60Friday, June 12, 2009

9 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

4

3

2

1

U4A

H_D#[0..63]8

D D

C C

Layout Note :
H_RCOMP / H_VREF / H_SWNG
Trace width and spacing is 10 / 20

+1.05V_VCCP

12

R74

R74
221_0402_1%

221_0402_1%

H_SWNG

Near C5 pin

C68

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C68

R76 16.9_0402_1%R76 16.9_0402_1%

1 2

12

1

R75

R75
75_0402_1%

75_0402_1%

2

Qual core

H_RCOMP

Qual core

+1.05V_VCCP

12

R77

R77
1K_0402_1%

1K_0402_1%

+H_VREF

12

1

R78

R78

2K_0402_1%

C69

@C69

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

B B

2K_0402_1%

2

Within 100 mils from NB

H_RCOMP Dual core 24.9 ohm_1% pull down
Qual core 16.9 ohm_1% pull down
H_SWNG Dual core 100 ohm_1% pull down
Qual core 75 ohm_1% pull down

H_RESET#7

H_CPUSLP#8

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWNG
H_RCOMP

H_RESET#
H_CPUSLP#

+H_VREF

U4A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

H_ADSTB#_0
H_ADSTB#_1

H_DEFER#

HOST

HOST

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DBSY#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#
H_TRDY#

H_RS#_0
H_RS#_1
H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_A#[3..35] 7

H_ADS# 7
H_ADSTB#0 7
H_ADSTB#1 7
H_BNR# 7

H_BPRI# 7
H_BR0# 7
H_DEFER# 7

H_DBSY# 7
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

H_DPWR# 8

H_DRDY# 7

H_HIT# 7

H_HITM# 7
H_LOCK# 7
H_TRDY# 7

H_DINV#0 8
H_DINV#1 8
H_DINV#2 8
H_DINV#3 8

H_DSTBN#0 8
H_DSTBN#1 8
H_DSTBN#2 8
H_DSTBN#3 8

H_DSTBP#0 8
H_DSTBP#1 8
H_DSTBP#2 8
H_DSTBP#3 8

H_REQ#0 7
H_REQ#1 7
H_REQ#2 7
H_REQ#3 7
H_REQ#4 7

H_RS#0 7
H_RS#1 7
H_RS#2 7

Poitier
Both DIS & UMA use Cantiga GM45

Note : The difference between GM45 & GM47 is
integrated graphic core freq @ Core voltage
GM45 : 533mHZ@1.05V
GM47 : 640mHZ@1.05V

P/N : SA00002JT3L (S IC AC82GM45 SLB94 B3 FCBGA1329 GM )

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(1 of 7)

Cantiga(1 of 7)

Cantiga(1 of 7)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

10 60Friday, June 12, 2009

10 60Friday, June 12, 2009

10 60Friday, June 12, 2009

1

R10 (A00)

5

CFG

R79 2.21K_0402_1%@R79 2.21K_0402_1%@

D D

R85 2.21K_0402_1%@R85 2.21K_0402_1%@

R80 2.21K_0402_1%@R80 2.21K_0402_1%@

R86 2.21K_0402_1%@R86 2.21K_0402_1%@

R81 2.21K_0402_1%@R81 2.21K_0402_1%@

1 2

1 2

1 2

1 2

1 2

CFG5

CFG6

CFG7

CFG9

CFG16

CFG[5:16] have internal pullup

+3VS

R87 4.02K_0402_1%@ R87 4.02K_0402_1%@

R88 4.02K_0402_1%@ R88 4.02K_0402_1%@

1 2

1 2

CFG19

CFG20

CFG[19:20] have internal pulldown

Strap Pin Table

CFG5

C C

B B

DMI X2 Select

iTPM Host

CFG6

Interface

Management

CFG7

Engine Crypto
Strap

PCI Express

CFG9

Graphic Lane

FSB Dynamic

CFG16

ODT

CFG19

DMI Lane
Reversal

Digital Display

CFG20

Port
Concurrent
Operation

SDVO_CRTL_DATA Low=No SDVO Device Present

DDPC_CTRLDATA

ICH_PWROK21,31

VGATE21,31,51

PLT_RST#20,27,30,31,38

A A

Low = DMI x 2

High = DMI x 4 (Default)

Low = iTPM enable

High = iTPM disable(Defult)

Low = TLS cipher suite with no confidentiality

High = TLS cipher suite with
confidentiality(Default)
Low = Reverse Lane

High = Normal Operation(Default)

Low=Dynamic ODT Disable

High=Dynamic ODT Enable(default)

Low=Normal (default)

High=Lane Reversed

Low=Only digital display port (SDVO/DP/iHDMI) or
PCIe is operational (default)
High = Digital display port (SDVO/DP/iHDMI) and
PCIe are operating simultaneously via the PEG
port

(default)
High=SDVO Device Present

Low=DisplayPort disabled (default)

High=DisplayPort device present

PM

R96 10K_0402_5%R96 10K_0402_5%

+3VS

R97 10K_0402_5%R97 10K_0402_5%

+3VS

R99 0_0402_5%@R99 0_0402_5%@

R100 0_0402_5%@R100 0_0402_5%@

R102 100_0402_5%R102 100_0402_5%

C957 0.1U_0402_16V4Z~D@C957 0.1U_0402_16V4Z~D@

12

12

12

12

12

1 2

Reserve for CPU, reference HPB

5

PM_EXTTS#0

PM_EXTTS#1

R10 Moidify (short directly)

PM_PWROK_R

PLT_RST#_NB

H_DPRSTP#

4

T10T10
T11T11
T12T12
T20T20
T21T21
T22T22
T23T23
T13T13
T24T24
T14T14
T25T25
T15T15
T26T26
T27T27

T28T28
T16T16
T17T17

T18T18

T29T29
T19T19
T30T30
T31T31

MCH_CLKSEL06
MCH_CLKSEL16
MCH_CLKSEL26

PM_SYNC#21

H_DPRSTP#8,19,51
PM_EXTTS#017
PM_EXTTS#118

H_THERMTRIP#7,19

DPRSLPVR21,51

4

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

T32T32
T33T33

T34T34

T35T35
T36T36
T37T37
T38T38
T39T39
T40T40

T41T41
T42T42

PM_SYNC#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_PWROK_R

PLT_RST#_NB

H_THERMTRIP#
DPRSLPVR

MCH_CFG3
MCH_CFG4

MCH_CFG8

MCH_CFG10

MCH_CFG12
MCH_CFG13

MCH_CFG15

MCH_CFG18

CFG5
CFG6
CFG7

CFG9

CFG16

CFG19
CFG20

U4B

U4B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

3

M_CLK_DDR0

AP24

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0

RSVD CFG PM NC

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMIGRAPHICS VIDMEMISC

CLKDMIGRAPHICS VIDMEMISC

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

SB_CS#_1

SA_ODT_0
SA_ODT_1

SB_ODT_O

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK

HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

AT21
AV24
AU20

AR24
AR21
AU24
AV20

BC28
AY28
AY36
BB36

BA17
AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17

DDR3_DRAMRST#

BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

M_ODT0_DIMMA
M_ODT1_DIMMA
M_ODT2_DIMMB
M_ODT3_DIMMB

SMRCOMP
SMRCOMP#

SMRCOMP_VOH
SMRCOMP_VOL

+V_DDR_MCH_REF
SM_PWROK

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N3

DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4

GFX_VR_ON

CL_CLK0
CL_DATA0

M_PWROK
CL_RST#
+CL_VREF

SDVO_CTRLDATA
MCH_CLKREQ#
MCH_ICH_SYNC#

MCH_TSATN#

M_CLK_DDR#0 17
M_CLK_DDR#1 17
M_CLK_DDR#2 18
M_CLK_DDR#3 18

DDR_CKE0_DIMMA 17
DDR_CKE1_DIMMA 17
DDR_CKE2_DIMMB 18
DDR_CKE3_DIMMB 18

DDR_CS0_DIMMA# 17
DDR_CS1_DIMMA# 17
DDR_CS2_DIMMB# 18
DDR_CS3_DIMMB# 18

R90 499_0402_1%R90 499_0402_1%

1 2

DDR3_DRAMRST# 17,18

DMI_MRX_ITX_N0 22
DMI_MRX_ITX_N1 22
DMI_MRX_ITX_N2 22
DMI_MRX_ITX_N3 22

DMI_MRX_ITX_P0 22
DMI_MRX_ITX_P1 22
DMI_MRX_ITX_P2 22
DMI_MRX_ITX_P3 22

DMI_MTX_IRX_N0 22
DMI_MTX_IRX_N1 22
DMI_MTX_IRX_N2 22
DMI_MTX_IRX_N3 22

DMI_MTX_IRX_P0 22
DMI_MTX_IRX_P1 22
DMI_MTX_IRX_P2 22
DMI_MTX_IRX_P3 22

T43T43
T44T44
T45T45
T46T46
T47T47

T48T48

R101 56_0402_5%R101 56_0402_5%

2

M_CLK_DDR0 17
M_CLK_DDR1 17
M_CLK_DDR2 18
M_CLK_DDR3 18

M_ODT0_DIMMA 17
M_ODT1_DIMMA 17
M_ODT2_DIMMB 18
M_ODT3_DIMMB 18

CLK_MCH_DREFCLK 6
CLK_MCH_DREFCLK# 6
MCH_SSCDREFCLK 6
MCH_SSCDREFCLK# 6

CLK_MCH_3GPLL 6

CLK_MCH_3GPLL# 6

CL_CLK0 21

CL_DATA0 21

M_PWROK 21

CL_RST# 21

T49T49

MCH_CLKREQ# 6

MCH_ICH_SYNC# 21

1 2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

Compensation

SMRCOMP

+V_DDR_MCH_REF

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C72

C72

1

2

Use for DDR3 signls,
if support DDR2 need
connect to GND

R92

R92

12K_0402_1%

12K_0402_1%

SM_PWROK

1 2

12

R93

R93
10K_0402_5%

10K_0402_5%

+1.05V_VCCP

12

R95

R95
1K_0402_1%

1K_0402_1%

1

R98

R98

C76

C76

511_0402_1%

511_0402_1%

2

1 2

+1.05V_VCCP

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R83 80.6_0402_1%R83 80.6_0402_1%

SMRCOMP#

R84 80.6_0402_1%R84 80.6_0402_1%

SMRCOMP_VOH

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

C71

C71

SMRCOMP_VOL

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

C73

C73

4

O

1

C70

C70

2

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

1

C74

C74

2

2

+3VALW

C75 0.1U_0402_16V4Z~DC75 0.1U_0402_16V4Z~D

1 2

U5

U5

5

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

1

P

IN1

R94 0_0402_5%@R94 0_0402_5%@

2

IN2

G

3

R10 Moidify (short directly)

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Cantiga(2 of 7)

Cantiga(2 of 7)

Cantiga(2 of 7)

LA-5151P

LA-5151P

LA-5151P

12

12

DDR3

+1.5V

1

12

R82

R82
1K_0402_1%

1K_0402_1%

12

R89

R89

3.01K_0402_1%

3.01K_0402_1%

12

R91

R91

1K_0402_1%

1K_0402_1%

12

1

DDR3

+1.5V

1.5V_PGOOD 49

SLP_S4# 21,31

Follow MiniCooper

11 60Friday, June 12, 2009

11 60Friday, June 12, 2009

11 60Friday, June 12, 2009

R10 (A00)

R10 (A00)

R10 (A00)

5

D D

U4C

U4C

L32
G32
M32
M33

K33

J33
M29

C44

B43

E37

E38

C41
C40

B37

A37

H47

E46
G40

A40

H48
D45

F40

B40

A41
H38
G37

J37

B42
G38

F37

K37

F25
H25

K25

H24

C31

E32

E28

G28

J28

G29

H32

J32

J29

E29

L29

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL

LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TVA_DAC
TVB_DAC
TVC_DAC

TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_IRTN

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF

CRT_VSYNC

T97T97

C C

R1000 75_0402_1%R1000 75_0402_1%

1 2

R1001 75_0402_1%R1001 75_0402_1%

1 2

R1002 75_0402_1%R1002 75_0402_1%

1 2

B B

TVA_DAC
TVB_DAC
TVC_DAC

4

LVDS TV VGA

LVDS TV VGA

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_9

PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

T37
T36

PCIE_MRX_GTX_N0

H44

PCIE_MRX_GTX_N1

J46

PCIE_MRX_GTX_N2

L44

PCIE_MRX_GTX_N3

L40

PCIE_MRX_GTX_N4

N41

PCIE_MRX_GTX_N5

P48

PCIE_MRX_GTX_N6

N44

PCIE_MRX_GTX_N7

T43

PCIE_MRX_GTX_N8

U43

PCIE_MRX_GTX_N9

Y43

PCIE_MRX_GTX_N10

Y48

PCIE_MRX_GTX_N11

Y36

PCIE_MRX_GTX_N12

AA43

PCIE_MRX_GTX_N13

AD37

PCIE_MRX_GTX_N14

AC47

PCIE_MRX_GTX_N15

AD39

PCIE_MRX_GTX_P0

H43

PCIE_MRX_GTX_P1

J44

PCIE_MRX_GTX_P2

L43

PCIE_MRX_GTX_P3

L41

PCIE_MRX_GTX_P4

N40

PCIE_MRX_GTX_P5

P47

PCIE_MRX_GTX_P6

N43

PCIE_MRX_GTX_P7

T42

PCIE_MRX_GTX_P8

U42

PCIE_MRX_GTX_P9

Y42

PCIE_MRX_GTX_P10

W47

PCIE_MRX_GTX_P11

Y37

PCIE_MRX_GTX_P12

AA42

PCIE_MRX_GTX_P13

AD36

PCIE_MRX_GTX_P14

AC48

PCIE_MRX_GTX_P15

AD40

PCIE_MTX_GRX_N0

J41

PCIE_MTX_GRX_N1

M46

PCIE_MTX_GRX_N2

M47

PCIE_MTX_GRX_N3

M40

PCIE_MTX_GRX_N4

M42

PCIE_MTX_GRX_N5

R48

PCIE_MTX_GRX_N6

N38

PCIE_MTX_GRX_N7

T40

PCIE_MTX_GRX_N8

U37

PCIE_MTX_GRX_N9

U40

PCIE_MTX_GRX_N10

Y40

PCIE_MTX_GRX_N11

AA46

PCIE_MTX_GRX_N12

AA37

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AD43

PCIE_MTX_GRX_N15

AC46

PCIE_MTX_GRX_P0

J42

PCIE_MTX_GRX_P1

L46

PCIE_MTX_GRX_P2

M48

PCIE_MTX_GRX_P3

M39

PCIE_MTX_GRX_P4

M43

PCIE_MTX_GRX_P5

R47

PCIE_MTX_GRX_P6

N37

PCIE_MTX_GRX_P7

T39

PCIE_MTX_GRX_P8

U36

PCIE_MTX_GRX_P9

U39

PCIE_MTX_GRX_P10

Y39

PCIE_MTX_GRX_P11

Y46

PCIE_MTX_GRX_P12

AA36

PCIE_MTX_GRX_P13

AA39

PCIE_MTX_GRX_P14

AD42

PCIE_MTX_GRX_P15

AD46

PEGCOMP

+VCC_PEG

1 2

3

Place the resistor within 500mils of the GMCH
PEGCOMP trace widht and spacing is 20/25 mils.

R108

R108

49.9_0402_1%

49.9_0402_1%

PCIE_MRX_GTX_N[0..15] 38

PCIE_MRX_GTX_P[0..15] 38

2

PCE-Express Graphics

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0 PCIE_MTX_C_GRX_N0

PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1

PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2

PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3

PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4

PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5

PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6

PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7

PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8

PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9

PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10

PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11

PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12

PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13

PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14

PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15

C77 0.1U_0402_10V7K~DC77 0.1U_0402_10V7K~D
C78 0.1U_0402_10V7K~DC78 0.1U_0402_10V7K~D

C79 0.1U_0402_10V7K~DC79 0.1U_0402_10V7K~D
C80 0.1U_0402_10V7K~DC80 0.1U_0402_10V7K~D

C81 0.1U_0402_10V7K~DC81 0.1U_0402_10V7K~D
C82 0.1U_0402_10V7K~DC82 0.1U_0402_10V7K~D

C83 0.1U_0402_10V7K~DC83 0.1U_0402_10V7K~D
C84 0.1U_0402_10V7K~DC84 0.1U_0402_10V7K~D

C85 0.1U_0402_10V7K~DC85 0.1U_0402_10V7K~D
C86 0.1U_0402_10V7K~DC86 0.1U_0402_10V7K~D

C87 0.1U_0402_10V7K~DC87 0.1U_0402_10V7K~D
C88 0.1U_0402_10V7K~DC88 0.1U_0402_10V7K~D

C89 0.1U_0402_10V7K~DC89 0.1U_0402_10V7K~D
C90 0.1U_0402_10V7K~DC90 0.1U_0402_10V7K~D

C91 0.1U_0402_10V7K~DC91 0.1U_0402_10V7K~D
C92 0.1U_0402_10V7K~DC92 0.1U_0402_10V7K~D

C93 0.1U_0402_10V7K~DC93 0.1U_0402_10V7K~D
C94 0.1U_0402_10V7K~DC94 0.1U_0402_10V7K~D

C95 0.1U_0402_10V7K~DC95 0.1U_0402_10V7K~D
C96 0.1U_0402_10V7K~DC96 0.1U_0402_10V7K~D

C97 0.1U_0402_10V7K~DC97 0.1U_0402_10V7K~D
C98 0.1U_0402_10V7K~DC98 0.1U_0402_10V7K~D

C99 0.1U_0402_10V7K~DC99 0.1U_0402_10V7K~D
C100 0.1U_0402_10V7K~DC100 0.1U_0402_10V7K~D

C101 0.1U_0402_10V7K~DC101 0.1U_0402_10V7K~D
C102 0.1U_0402_10V7K~DC102 0.1U_0402_10V7K~D

C103 0.1U_0402_10V7K~DC103 0.1U_0402_10V7K~D
C104 0.1U_0402_10V7K~DC104 0.1U_0402_10V7K~D

C105 0.1U_0402_10V7K~DC105 0.1U_0402_10V7K~D
C106 0.1U_0402_10V7K~DC106 0.1U_0402_10V7K~D

C107 0.1U_0402_10V7K~DC107 0.1U_0402_10V7K~D
C108 0.1U_0402_10V7K~DC108 0.1U_0402_10V7K~D

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15] 38

PCIE_MTX_C_GRX_N[0..15] 38

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

1

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(4 of 7)

Cantiga(4 of 7)

Cantiga(4 of 7)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

12 60Friday, June 12, 2009

12 60Friday, June 12, 2009

12 60Friday, June 12, 2009

1

R10 (A00)

5

D D

4

3

2

1

DDR_A_D[0..63]17

C C

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8

DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

U4D

U4D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

DDR_A_BS0

BD21

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7

SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7

AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_BS1
DDR_A_BS2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8

DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_BS0 17
DDR_A_BS1 17
DDR_A_BS2 17

DDR_A_RAS# 17
DDR_A_CAS# 17

DDR_A_WE# 17

DDR_A_DM[0..7] 17

DDR_A_DQS[0..7] 17

DDR_A_DQS#[0..7] 17

DDR_A_MA[0..14] 17

DDR_B_D[0..63]18

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8

DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

U4E

U4E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

DDR_B_BS0

BC16

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7

SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6

AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_BS1
DDR_B_BS2

DDR_B_RAS#
DDR_B_CAS#

DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8

DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_BS0 18
DDR_B_BS1 18
DDR_B_BS2 18

DDR_B_RAS# 18
DDR_B_CAS# 18

DDR_B_WE# 18

DDR_B_DM[0..7] 18

DDR_B_DQS[0..7] 18

DDR_B_DQS#[0..7] 18

DDR_B_MA[0..14] 18

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(3 of 7)

Cantiga(3 of 7)

Cantiga(3 of 7)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

13 60Friday, June 12, 2009

13 60Friday, June 12, 2009

13 60Friday, June 12, 2009

1

R10 (A00)

5

1

+

2

1U_0603_10V6K~D

1U_0603_10V6K~D

1

C121

C121

2

1067M 4140mA
800M 3162mA

C110

22U_0805_6.3V6M~D

C110

22U_0805_6.3V6M~D

C109

330U_D2E_2.5VM_R9~D+C109

330U_D2E_2.5VM_R9~D

1

1

2

2

J1

@J1

@

2

112

JUMP_43X118

JUMP_43X118

J2

@J2

@

2

112

JUMP_43X118

JUMP_43X118

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

1

@

@

C123

C123

2

2

C114

22U_0805_6.3V6M~D

C114

22U_0805_6.3V6M~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

C124

C124

C115

0.01U_0402_16V7K~D

C115

0.01U_0402_16V7K~D

2

1

+AXG_CORE

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

T53PAD T53PAD
T54PAD T54PAD

C125

C125

DDR3

+1.5V

D D

C C

B B

A A

+1.05V_VCCP +AXG_CORE

4

U4F

U4F

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

VCC_AXG_NTCF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC SM

VCC SM

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52

POWER

POWER

VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC GFX

VCC GFX

VCC SM LF

VCC SM LF

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

+AXG_CORE

Layout Note:

Place close to GMCH

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

@

@

C111

C111

2

Layout Note:
Inside GMCH

330U_D2_2.5VY_R15M~D

330U_D2_2.5VY_R15M~D

@

@

1

C1500

C1500

+

+

2

C126 0.1U_0402_16V4Z~DC126 0.1U_0402_16V4Z~D

C127 0.1U_0402_16V4Z~DC127 0.1U_0402_16V4Z~D

1

1

2

2

3

22U_0805_6.3V6M~D

0.47U_0402_10V4Z~D

0.47U_0402_10V4Z~D

1

@

@

C1502

C1502

2

330U_D2_2.5VY_R15M~D

330U_D2_2.5VY_R15M~D

1

+

+

2

C128 0.22U_0402_10V4Z~DC128 0.22U_0402_10V4Z~D

1

2

22U_0805_6.3V6M~D

1U_0603_10V6K~D

1U_0603_10V6K~D

1

1

C1503

C1503

@

@

@

@

C1506

C1506

2

2

@

@

C1501

C1501

C129 0.22U_0402_10V4Z~DC129 0.22U_0402_10V4Z~D

1

2

C132 1U_0402_6.3V4Z~DC132 1U_0402_6.3V4Z~D

C131 1U_0402_6.3V4Z~DC131 1U_0402_6.3V4Z~D

C130 0.47U_0402_10V4Z~DC130 0.47U_0402_10V4Z~D

1

1

1

2

2

2

C117

10U_0805_10V4Z~D

C117

10U_0805_10V4Z~D

C116

220U_D2_4VY_R15M~D+C116

220U_D2_4VY_R15M~D

1

+

2

1

1

2

2

2

Extnal Graphic: 3060mA

+1.05V_VCCP

AG34
AC34
AB34
AA34

Y34
V34

U34
AM33
AK33

AJ33
AG33
AF33

AE33
AC33
AA33

C120

0.1U_0402_16V4Z~D

C120

0.1U_0402_16V4Z~D

C118

0.22U_0402_10V4Z~D

C118

0.22U_0402_10V4Z~D

C119

0.22U_0402_10V4Z~D

C119

0.22U_0402_10V4Z~D

1

1

2

2

W33

AH28
AF28
AC28
AA28

AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24

AJ23
AH23
AF23

Y33

V33
U33

T32

integrated Graphic: 2898mA

U4G

U4G

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

VCC CORE

VCC CORE

POWER

POWER

VCC NCTF

VCC NCTF

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8

VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

1

+1.05V_VCCP

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(6 of 7)

Cantiga(6 of 7)

Cantiga(6 of 7)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

14 60Friday, June 12, 2009

14 60Friday, June 12, 2009

14 60Friday, June 12, 2009

1

R10 (A00)

5

4

3

2

1

Place close to U4.F47

64.8mA Max.

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

+

+

C1504

C1504

+1.05V_M_DPLLA

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C1505

C1505

2

2

+1.05V_VCCP

10UH_LB2012T100MR_20%_0805~D

10UH_LB2012T100MR_20%_0805~D

D D

L1500

L1500

1 2

+1.05V_VCCP

+1.05V_VCCP

R119

R119
0_0603_5%

0_0603_5%

1 2

L2

L2

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

1 2

Place close to U4.L48

64.8mA Max.

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

+

+

C1520

C1520

+1.05V_M_DPLLB

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C1519

C1519

2

2

+1.05V_VCCP

10UH_LB2012T100MR_20%_0805~D

10UH_LB2012T100MR_20%_0805~D

C C

B B

A A

L1503

L1503

1 2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

+1.5VS

+1.05V_VCCP

100U_D2E_6.3VM_R18M~D

100U_D2E_6.3VM_R18M~D

1

+

+

C150

C150

2

+1.05V_VCCP

+1.5VS +1.5VS_QDAC

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1 2

+1.05V_VCCP

+1.05V_VCCP

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

1 2

C171

C171

10U_0805_10V4Z~D

10U_0805_10V4Z~D

12

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C133

C133

C145

C145

R123

R123
0_0603_5%

0_0603_5%

L3

L3

R130

R130
0_0402_5%

0_0402_5%

12

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

L4

L4

R131

R131
1_0402_5%

1_0402_5%

12

+1.05V_M_HPLL

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C134

C134

2

2

+1.05V_M_MPLL

R120

0_0603_5%

R120

0_0603_5%

1

1 2

2

1

2

R121

R121

0_0402_5%

0_0402_5%

12

R126

R126
0_0603_5%

0_0603_5%

12

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

C166

C166

+1.05V_M_PEGPLL

C137

0.1U_0402_16V4Z~D

C137

0.1U_0402_16V4Z~D

12

+1.05V_A_SM

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

2

C160

C160

C161

0.01U_0402_25V7K~D

C161

0.01U_0402_25V7K~D

1

2

1

2

C172

0.1U_0402_16V4Z~D

C172

0.1U_0402_16V4Z~D

1

2

+1.05V_M_DPLLA

+1.05V_M_DPLLB

+VCCA_PEG_BG

1

C147

C147

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

C151

C151

C152

4.7U_0603_6.3V6M~D

C152

4.7U_0603_6.3V6M~D

1

2

+1.05V_A_SM_CK

C156

22U_0805_6.3V6M~D

C156

22U_0805_6.3V6M~D

1

2

C173

0.1U_0402_16V4Z~D

C173

0.1U_0402_16V4Z~D

1

2

+1.05V_M_PEGPLL

747mA

C153

1U_0603_10V4Z~D

C153

1U_0603_10V4Z~D

1

2

C157

0.1U_0402_16V4Z~D

C157

0.1U_0402_16V4Z~D

1

2

TVA_DAC 24.15mA
TVB_DAC 39.48mA
TVC_DAC 24.15mA

HDMI disable
connected to GND

35mA

1mA

157.2mA

50mA

60.31mA

64.8mA

64.8mA

24mA

139.2mA

13.2mA

414uA

50mA

37.95mA

50mA

U4H

U4H

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

POWER

POWER

A SM

A SM

HDA

HDA

LVDS D TV/CRT

LVDS D TV/CRT

CRTPLLA LVDSA PEG

CRTPLLA LVDSA PEG

TV

TV

VTT

VTT

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

A CK

A CK

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

DMI PEG

DMI PEG

VTTLF

VTTLF

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCC_HV_1
VCC_HV_2
VCC_HV_3

VTTLF1
VTTLF2
VTTLF3

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

321.35mA

B22
B21
A21

149mA

BF21
BH20
BG20
BF20

118.8mA

K47

105.3mA

C35
B35
A35

1782mA

V48
U48
V47
U47
U46

456mA

AH48
AF48
AH47
AG47

GMCH_VTTLF1

A8

GMCH_VTTLF2

L1

GMCH_VTTLF3

AB2

+1.05V_VCCP

852mA

+VCC_AXF

+VCC_AXF

+1.5V_SM_CK

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

R129 0_0603_5%R129 0_0603_5%

1

C165

C165

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

1

2

1

2

C158

C158

1 2

C167

0.47U_0402_10V4Z~D

C167

0.47U_0402_10V4Z~D

C138

4.7U_0603_6.3V6M~D

C138

4.7U_0603_6.3V6M~D

1

2

0.47U_0402_10V4Z~D

0.47U_0402_10V4Z~D

1

2

C148

1U_0603_10V4Z~D

C148

1U_0603_10V4Z~D

1

2

+3VS

0.47U_0402_10V4Z~D

0.47U_0402_10V4Z~D

1

2

C142

C142

1 2

C149

C149
10U_0805_10V4Z~D@

10U_0805_10V4Z~D@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

1

2

C168

C168

1

2

1

+

2

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

1

2

R122

R122
0_0603_5%

0_0603_5%

C154

C154

1 2

C169

0.47U_0402_10V4Z~D

C169

0.47U_0402_10V4Z~D

C139

220U_D2_4VY_R15M~D+C139

220U_D2_4VY_R15M~D

C143

C143

12

R125

R125
1_0402_5%

1_0402_5%

10U_0805_10V4Z~D

10U_0805_10V4Z~D

R127

@R127

@

10_0402_5%

10_0402_5%

+VCC_PEG+VCC_DMI

C144

4.7U_0603_6.3V6M~D

C144

4.7U_0603_6.3V6M~D

1

2

R124

R124
0_0805_5%

0_0805_5%

C155

C155

1 2

+VCC_PEG

+1.05V_VCCP

12

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

2

DDR3 connect to 1.5V

+1.5V

CRB schematic
HPB & Avia didn 't reserve

D1

@D1

@

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

C162

220U_D2_4VY_R15M~D+C162

220U_D2_4VY_R15M~D

C164

22U_0805_6.3V6M~D

C164

22U_0805_6.3V6M~D

C163

C163

1

1

+

2

2

+1.05V_VCCP

1 2

JP2@ J P2@

+1.05V_VCCP

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(5 of 7)

Cantiga(5 of 7)

Cantiga(5 of 7)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

15 60Friday, June 12, 2009

15 60Friday, June 12, 2009

15 60Friday, June 12, 2009

1

R10 (A00)

5

D D

C C

B B

A A

4

U4I

U4I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

VSS_12

N47

VSS_13

L47

VSS_14

G47

VSS_15

BD46

VSS_16

BA46

VSS_17

AY46

VSS_18

AV46

VSS_19

AR46

VSS_20

AM46

VSS_21

V46

VSS_22

R46

VSS_23

P46

VSS_24

H46

VSS_25

F46

VSS_26

BF44

VSS_27

AH44

VSS_28

AD44

VSS_29

AA44

VSS_30

Y44

VSS_31

U44

VSS_32

T44

VSS_33

M44

VSS_34

F44

VSS_35

BC43

VSS_36

AV43

VSS_37

AU43

VSS_38

AM43

VSS_39

J43

VSS_40

C43

VSS_41

BG42

VSS_42

AY42

VSS_43

AT42

VSS_44

AN42

VSS_45

AJ42

VSS_46

AE42

VSS_47

N42

VSS_48

L42

VSS_49

BD41

VSS_50

AU41

VSS_51

AM41

VSS_52

AH41

VSS_53

AD41

VSS_54

AA41

VSS_55

Y41

VSS_56

U41

VSS_57

T41

VSS_58

M41

VSS_59

G41

VSS_60

B41

VSS_61

BG40

VSS_62

BB40

VSS_63

AV40

VSS_64

AN40

VSS_65

H40

VSS_66

E40

VSS_67

AT39

VSS_68

AM39

VSS_69

AJ39

VSS_70

AE39

VSS_71

N39

VSS_72

L39

VSS_73

B39

VSS_74

BH38

VSS_75

BC38

VSS_76

BA38

VSS_77

AU38

VSS_78

AH38

VSS_79

AD38

VSS_80

AA38

VSS_81

Y38

VSS_82

U38

VSS_83

T38

VSS_84

J38

VSS_85

F38

VSS_86

C38

VSS_87

BF37

VSS_88

BB37

VSS_89

AW37

VSS_90

AT37

VSS_91

AN37

VSS_92

AJ37

VSS_93

H37

VSS_94

C37

VSS_95

BG36

VSS_96

BD36

VSS_97

AK15

VSS_98

AU36

VSS_99

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

VSS

VSS

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

3

U4J

U4J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17

VSS_233

BA16

VSS_235

AU16

VSS_237

AN16

VSS_238

N16

VSS_239

K16

VSS_240

G16

VSS_241

E16

VSS_242

BG15

VSS_243

AC15

VSS_244

W15

VSS_245

A15

VSS_246

BG14

VSS_247

AA14

VSS_248

C14

VSS_249

BG13

VSS_250

BC13

VSS_251

BA13

VSS_252

AN13

VSS_255

AJ13

VSS_256

AE13

VSS_257

N13

VSS_258

L13

VSS_259

G13

VSS_260

E13

VSS_261

BF12

VSS_262

AV12

VSS_263

AT12

VSS_264

AM12

VSS_265

AA12

VSS_266

J12

VSS_267

A12

VSS_268

BD11

VSS_269

BB11

VSS_270

AY11

VSS_271

AN11

VSS_272

AH11

VSS_273

Y11

VSS_275

N11

VSS_276

G11

VSS_277

C11

VSS_278

BG10

VSS_279

AV10

VSS_280

AT10

VSS_281

AJ10

VSS_282

AE10

VSS_283

AA10

VSS_284

M10

VSS_285

BF9

VSS_286

BC9

VSS_287

AN9

VSS_288

AM9

VSS_289

AD9

VSS_290

G9

VSS_291

B9

VSS_292

BH8

VSS_293

BB8

VSS_294

AV8

VSS_295

AT8

VSS_296

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

VSS

VSS

VSS NCTF

VSS NCTF

VSS SCB

VSS SCB

2

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_351
VSS_352
VSS_353
VSS_354

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5

NC

NC

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(7 of 7)

Cantiga(7 of 7)

Cantiga(7 of 7)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

16 60Friday, June 12, 2009

16 60Friday, June 12, 2009

16 60Friday, June 12, 2009

1

R10 (A00)

5

4

3

2

1

+1.5V

12

R132

R132
1K_0402_1%

1K_0402_1%

D D

12

R133

R133
1K_0402_1%

1K_0402_1%

C C

B B

A A

+V_DDR_MCH_REF

+V_DDR_MCH_REF

+3VS

1

2

+V_DDR_MCH_REF

DDR_CKE0_DIMMA11

DDR_CS1_DIMMA#11

C193

0.1U_0402_16V4Z~D

C193

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1

2

JDIMM1

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1

2

DDR_A_BS213

M_CLK_DDR011
M_CLK_DDR#011

DDR_A_BS013

DDR_A_WE#13
DDR_A_CAS#13

C194

C194

+V_DDR_MCH_REF

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C175

C175

12

DDR_A_D0
DDR_A_D1

C174

C174

1

DDR_A_DM0

DDR_A_D2

2

DDR_A_D3

DDR_A_D8
DDR_A_D9 DDR_A_D13

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2

DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10

DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

T56T56

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

R135

10K_0402_5%

R135

10K_0402_5%

R136

10K_0402_5%

R136

10K_0402_5%

+0.75VS +0.75VS

1 2

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17
VSS1849DQ22

51

DQ18
DQ1953VSS19
VSS2055DQ28

57

DQ24
DQ2559VSS21
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4RN-7F

FOX_AS0A626-U4RN-7F

CONN@

CONN@

VSS3

DQS#0

DQS0

VSS6

VSS8
DQ12
DQ13

VSS10

DQ14
DQ15

DQ20
DQ21

DQ23

DQ29

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

DQ4
DQ5

DQ6
DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA
SCL

DDR3 SO-DIMM/Standard Type

5

4

+1.5V+1.5V

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22
24
26

DDR_A_DM1

28

DDR3_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44

DDR_A_DM2

46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

DDR_CKE1_DIMMA

74
76
78

A15
A14

A11

A7

A6
A4

A2
A0

S0#

G2

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86
88

DDR_A_MA6

90

DDR_A_MA4

92
94

DDR_A_MA2

96

DDR_A_MA0

98
100

M_CLK_DDR1

102

M_CLK_DDR#1

104
106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDR_CS0_DIMMA#

114

M_ODT0_DIMMA

116
118

M_ODT1_DIMMA

120
122
124

+V_DDR_MCH_REF

126
128

DDR_A_D36

130

DDR_A_D37

132
134

DDR_A_DM4

136
138

DDR_A_D38

140

DDR_A_D39

142
144

DDR_A_D44

146

DDR_A_D45

148
150

DDR_A_DQS#5

152

DDR_A_DQS5

154
156

DDR_A_D46

158

DDR_A_D47

160
162

DDR_A_D52

164

DDR_A_D53

166
168

DDR_A_DM6

170
172

DDR_A_D54

174

DDR_A_D55

176
178

DDR_A_D60

180

DDR_A_D61

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D62

192

DDR_A_D63

194
196

PM_EXTTS#0_R

198

ICH_SM_DA

200

ICH_SM_CLK

202
204

206

DDR3_DRAMRST# 11,18

DDR_CKE1_DIMMA 11

T55T55

M_CLK_DDR1 11
M_CLK_DDR#1 11

DDR_A_BS1 13
DDR_A_RAS# 13

DDR_CS0_DIMMA# 11
M_ODT0_DIMMA 11

M_ODT1_DIMMA 11

+V_DDR_MCH_REF

C188

2.2U_0603_6.3V6K~D

C188

2.2U_0603_6.3V6K~D

C187

0.1U_0402_16V4Z~D

C187

0.1U_0402_16V4Z~D

1

1

2

2

R10 Moidify (short directly)

@

@

R134 0_0402_5%

R134 0_0402_5%

1 2

ICH_SM_DA 6,18,20,21
ICH_SM_CLK 6,18,20,21

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

PM_EXTTS#0 11

Note :
DDR3 command & contorl signals need n o termination.
DDR2 command & command signals 56 ohm pull up to VccSus0_9

DDR_A_D[0..63]13

DDR_A_DQS[0..7]13

DDR_A_DQS#[0..7]13

DDR_A_DM[0..7]13

DDR_A_MA[0..14]13

Place close to SO-DIMM

+1.5V

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C179

10U_0603_6.3V6M~D

C179

10U_0603_6.3V6M~D

C180

C180

1

1

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C185

C185

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

C176

C176

C186

C186

+0.75VS

C189

C189

330U_D2_2.5VY_R15M~D

330U_D2_2.5VY_R15M~D

C177

10U_0603_6.3V6M~D

C177

10U_0603_6.3V6M~D

C178

10U_0603_6.3V6M~D

C178

1

+

+

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C190

C190

2

1

10U_0603_6.3V6M~D

1

1

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C183

C183

C184

C184

1

1

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C191

C191

C192

C192

2

2

1

1

Place close to JDIMM pin 203 and 204

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C182

C182

C181

C181

1

1

2

2

+0.75VS

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C216

C216

1

2

Place between 2 DIMMs

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRIII SO-DIMM A SLOT

DDRIII SO-DIMM A SLOT

DDRIII SO-DIMM A SLOT

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

17 60Friday, June 12, 2009

17 60Friday, June 12, 2009

17 60Friday, June 12, 2009

1

R10 (A00)

5

4

3

2

1

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

DM1

DQ14
DQ15

DQ20
DQ21

DM2

DQ23

DQ29

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

RAS#

ODT0

ODT1

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5

DQ46
DQ47

DQ52
DQ53

DM6

DQ54
DQ55

DQ60
DQ61

DQS7

DQ62
DQ63

VTT2

+1.5V+1.5V

2

DDR_B_D4

4

DQ4
DQ5

DQ6
DQ7

A15
A14

A7

A6
A4

A2
A0

CK1

BA1

S0#

NC2

SDA
SCL

G2

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12

DDR_B_DM1
DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB#
M_ODT2_DIMMB

M_ODT3_DIMMB

+V_DDR_MCH_REF

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

PM_EXTTS#1_R
ICH_SM_DA
ICH_SM_CLK

+0.75VS

DDR3_DRAMRST# 11,17

DDR_CKE3_DIMMB 11

T57T57

M_CLK_DDR3 11
M_CLK_DDR#3 11

DDR_B_BS1 13
DDR_B_RAS# 13

DDR_CS2_DIMMB# 11
M_ODT2_DIMMB 11

M_ODT3_DIMMB 11

+V_DDR_MCH_REF

C209

2.2U_0603_6.3V6K~D

C209

2.2U_0603_6.3V6K~D

C208

0.1U_0402_16V4Z~D

C208

0.1U_0402_16V4Z~D

1

1

2

2

R10 Moidify (short directly)

@

@

R137 0_0402_5%

R137 0_0402_5%

1 2

ICH_SM_DA 6,17,20,21
ICH_SM_CLK 6,17,20,21

PM_EXTTS#1 11

DDR_B_D[0..63]13

DDR_B_DQS[0..7]13

DDR_B_DQS#[0..7]13

DDR_B_DM[0..7]13

DDR_B_MA[0..14]13

Place close to SO-DIMM

+1.5V

C198

10U_0603_6.3V6M~D

C198

10U_0603_6.3V6M~D

C199

10U_0603_6.3V6M~D

C199

10U_0603_6.3V6M~D

C197

330U_D2_2.5VY_R15M~D+C197

+0.75VS

330U_D2_2.5VY_R15M~D

1

1

+

2

2

C204

0.1U_0402_16V4Z~D

C204

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

2

2

C211

1U_0402_6.3V6K~D

C211

1U_0402_6.3V6K~D

C212

1U_0402_6.3V6K~D

C212

1U_0402_6.3V6K~D

C210

1U_0402_6.3V6K~D

C210

1U_0402_6.3V6K~D

2

2

1

2

1

1

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

2

2

C205

C205

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C206

0.1U_0402_16V4Z~D

C206

0.1U_0402_16V4Z~D

1

1

2

2

C213

1U_0402_6.3V6K~D

C213

1U_0402_6.3V6K~D

2

1

Place close to JDIMM pin 203 and 204

C201

10U_0603_6.3V6M~D

C201

10U_0603_6.3V6M~D

C202

10U_0603_6.3V6M~D

C202

10U_0603_6.3V6M~D

C203

10U_0603_6.3V6M~D

C203

C200

C200

1

2

C207

C207

10U_0603_6.3V6M~D

1

1

2

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII SO-DIMM B SLOT

DDRIII SO-DIMM B SLOT

DDRIII SO-DIMM B SLOT

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

18 60Friday, June 12, 2009

18 60Friday, June 12, 2009

18 60Friday, June 12, 2009

1

R10 (A00)

+V_DDR_MCH_REF

1

R138

R138

1 2

10K_0402_5%

10K_0402_5%

2

D D

C C

B B

A A

+3VS

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

DDR_CKE2_DIMMB11

DDR_CS3_DIMMB#11

+3VS

C195

C195

DDR_B_BS213

M_CLK_DDR211
M_CLK_DDR#211

DDR_B_BS013

DDR_B_WE#13
DDR_B_CAS#13

1

2

C196

0.1U_0402_16V4Z~D

C196

0.1U_0402_16V4Z~D

1

2

C214

0.1U_0402_16V4Z~D

C214

0.1U_0402_16V4Z~D

+V_DDR_MCH_REF

DDR_B_D0
DDR_B_D1

DDR_B_DM0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9 DDR_B_D13

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2

DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

T58T58

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

+0.75VS

C215

2.2U_0603_6.3V6K~D

C215

2.2U_0603_6.3V6K~D

12

1

R139

R139
10K_0402_5%

10K_0402_5%

2

LINK OK

JDIMM2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9
VSS925VSS10

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17
VSS1849DQ22

51

DQ18
DQ1953VSS19
VSS2055DQ28

57

DQ24
DQ2559VSS21
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3
A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U8RN-7F

FOX_AS0A626-U8RN-7F

CONN@

CONN@

VDD12

VDD14

VDD16

VDD18

VREF_CA

VSS28

VSS30

VSS31

VSS33

VSS35
DQS#5

VSS38

VSS40

VSS42

VSS43

VSS45

VSS47
DQS#7

VSS50

VSS52

EVENT#

DDR3 SO-DIMM/Standard Type

5

4

5

4

3

2

1

12

ICH_RTCRST#
SRTCRST#
INTRUDER#

1 2

R157

R157
332K_0402_1%

332K_0402_1%

HDA_SDIN025

ICH_RTCX1

R140

R140
10M_0402_5%

10M_0402_5%

ICH_RTCX2

ICH_INTVRMEN

R149

R149

24.9_0402_1%

24.9_0402_1%

1 2

SATA_ACT#_R

SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

SATA_ITX_DRX_N1
SATA_ITX_DRX_P1

HDA_BITCLK_ICH
HDA_SYNC_ICH

HDA_RST_ICH#

HDA_SDIN0

HDA_SDOUT_ICH

U6A

U6A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GP IO33

AE8

HDA_DOCK_RST#/G PIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

RTCLAN / GLANIHDASATA

LPCCPU

RTCLAN / GLANIHDASATA

LPCCPU

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO2 3

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#
INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3

J3
J1

GATEA20

N7

H_A20M#

AJ27

H_DPRSTP#

AJ25

H_DPSLP#

AE23

R148

R148

AJ26

AD22

AF25

AE22
AG25
L3

AF23

NMI

AF24

AH27

AG26

AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

AJ7
AH7

12

56_0402_5%

56_0402_5%

H_PWRGOOD

H_IGNNE#

H_INIT#
H_INTR
KB_RST#

H_NMI
H_SMI#

H_STPCLK#

THERMTRIP_ICH#

ICH_TP12

SATA_ITX_DRX_N4
SATA_ITX_DRX_P4

SATA_ITX_DRX_N5
SATA_ITX_DRX_P5

CLK_PCIE_SATA#
CLK_PCIE_SATA

R156 24.9_0402_1%R156 24.9_0402_1%

LPC_AD[0..3] 27,31

LPC_FRAME# 2 7,31

T59T59
T60T60

GATEA20 31
H_A20M# 7

H_DPRSTP# 8,11 ,51
H_DPSLP# 8

H_FERR# 7

H_PWRGOOD 8

H_IGNNE# 7

H_INIT# 7
H_INTR 7
KB_RST# 31

H_NMI 7
H_SMI# 7

H_STPCLK# 7

R154 54.9_0402_1%R154 54.9_0402_ 1%

1 2

T61T61

C220 0.01U_ 0402_16V7K~DC220 0.01U_ 0402_16V7K~D
C221 0.01U_ 0402_16V7K~DC221 0.01U_ 0402_16V7K~D

C222 0.01U_ 0402_16V7K~DC222 0.01U_ 0402_16V7K~D
C223 0.01U_ 0402_16V7K~DC223 0.01U_ 0402_16V7K~D

CLK_PCIE_SATA# 6
CLK_PCIE_SATA 6

12

placed within 2" from
ICH9M

12
12

12
12

GATEA20

R142 10K_04 02_5%R142 10K_0402_5%

KB_RST#

R145 10K_04 02_5%R145 10K_0402_5%

H_FERR#

R147 49.9_0402_ 1%R147 49.9_0402_1%

dual core 56_5%
quad core 50_5%

+1.05V_VCCP

12

R151

R151

49.9_0402_1%

49.9_0402_1%

SATA_IRX_DTX_N4 29

SATA_IRX_DTX_P4 29
SATA_ITX_C_DRX_N4 29
SATA_ITX_C_DRX_P4 2 9

SATA_IRX_DTX_N5 29

SATA_IRX_DTX_P5 29
SATA_ITX_C_DRX_N5 29
SATA_ITX_C_DRX_P5 2 9

dual core 56_5%
quad core 50_5%

H_THERMTRIP# 7,11

+3VS

12

12

+1.05V_VCCP

12

To ESATA

To ODD

Within 500 mils

C864 15P _0402_50V8J~DC864 15P_0402_50V 8J~D

12

Y2

Y2

D D

Shunt

Open

Shunt

Open

C C

CMOS settingCMOS_CLR1

Clear CMOS

Keep CMOS

R143 20K_0402_5%R143 20K_0402_5%

+RTCVCC

1 2

R144 20K _0402_5%R144 20K_04 02_5%

1 2

R146 1M _0402_5%R1 46 1M_0402_5%

1 2

TPM settingME_CLR1

Clear ME RTC Registers

Keep ME RTC Registers

32.768KHZ_12.5PF_1TJS125BJ4A 421P

32.768KHZ_12.5PF_1TJS125BJ4A 421P

C217 15P_0402_50V8J~DC217 15P_0402_50V8J~D

@

ME1@ME1

HDA_BITCLK_AUDIO25
HDA_SYNC_AUDIO25

HDA_RST_AUDIO#25

2

3

12

C218

1U_0603_10V4Z~D

C218

1U_0603_10V4Z~D

2

12

1

Place close U6

HDA_SDOUT_AUDIO25

To JSATA1

B B

To JSATA2

SATA_IRX_DTX_N029
SATA_IRX_DTX_P029
SATA_ITX_C_DRX_N029
SATA_ITX_C_DRX_P029

SATA_IRX_DTX_N129
SATA_IRX_DTX_P129
SATA_ITX_C_DRX_N129
SATA_ITX_C_DRX_P129

1

IN

NC

4

OUT

NC

12

CMOS1@CMOS1@

1

@C1512

@

2

C224 0.01U_ 0402_16V7K~DC224 0.01U_ 0402_16V7K~D
C225 0.01U_ 0402_16V7K~DC225 0.01U_ 0402_16V7K~D

C226 0.01U_ 0402_16V7K~DC226 0.01U_ 0402_16V7K~D
C227 0.01U_ 0402_16V7K~DC227 0.01U_ 0402_16V7K~D

R141

R141
0_0402_5%

0_0402_5%

1 2

+RTCVCC

2

C219

C219
1U_0603_10V4Z~D

1U_0603_10V4Z~D

1

+1.5VS

R150 33_040 2_5%R150 33_0402_5%

1 2

R152 33_040 2_5%R152 33_0402_5%

1 2

R153 33_0402_5%R 153 33_0402_5%

1 2

C1512
10P_0402_50V8J~D

10P_0402_50V8J~D

R155 33_040 2_5%R155 33_0402_5%

1 2

T62 PAD~DT62 PAD~D
T63 PAD~DT63 PAD~D

T84 PAD~DT84 PAD~D

12
12

12
12

P/N : SA00002G12L (S IC AF82801IEM SLB8P A3 PBGA676P ICH9ME )

+3VS

XOR Chain Entrance Strap

DescriptionICH TP3 HDA SDOUT

0 0

0

1

A A

1 1

1

0

RSVD

Enter XOR Chain

Normal Operation (Default)

Set PCIE port config bit 1

12

R158

@R158

@

1K_0402_5%

1K_0402_5%

HDA_SDOUT_ICH

12

R160

@R160

@

1K_0402_5%

1K_0402_5%

ICH_TP3 21

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICH9-M(1/5)

ICH9-M(1/5)

ICH9-M(1/5)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

19 60Friday, June 12, 2009

19 60Friday, June 12, 2009

19 60Friday, June 12, 2009

1

R10 (A00)

5

4

3

2

1

+3VS

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#

PCI_REQ2#

PCI_REQ3#
PCI_GNT3#

PCI_IRDY#

PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCI_PLTRST#
PCI_CLK
PCI_PME#

ACCEL_INT#

PCI_PIRQF#

PCI_PIRQG#

PCI_PIRQH#

1 2

PCI_REQ0#

PCI_REQ1#

PCI_REQ2#

PCI_REQ3#

PCI_IRDY#

PCI_DEVSEL#

PCI_PERR#

PCI_PLOCK#

PCI_SERR#

PCI_STOP#

PCI_TRDY#

PCI_FRAME#

PCI_PME#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

PCI_PIRQF#

PCI_PIRQH#

PCI_PIRQG#

ACCEL_INT#

PCI_CLK

PCI_CLK6

R161 8.2K_04 02_5%R161 8.2K_0402_5%

1 2

R162 8.2K_04 02_5%R162 8.2K_0402_5%

1 2

R163 8.2K_04 02_5%R163 8.2K_0402_5%

1 2

R164 8.2K_04 02_5%R164 8.2K_0402_5%

D D

C C

1 2

R165 8.2K_04 02_5%R165 8.2K_0402_5%

1 2

R166 8.2K_04 02_5%R166 8.2K_0402_5%

1 2

R167 8.2K_04 02_5%R167 8.2K_0402_5%

1 2

R168 8.2K_04 02_5%R168 8.2K_0402_5%

1 2

R169 8.2K_04 02_5%R169 8.2K_0402_5%

1 2

R170 8.2K_04 02_5%R170 8.2K_0402_5%

1 2

R171 8.2K_04 02_5%R171 8.2K_0402_5%

1 2

R173 8.2K_04 02_5%R173 8.2K_0402_5%

1 2

R174 8.2K_04 02_5%R174 8.2K_0402_5%

1 2

R176 8.2K_04 02_5%R176 8.2K_0402_5%

1 2

R177 8.2K_04 02_5%R177 8.2K_0402_5%

1 2

R178 8.2K_04 02_5%R178 8.2K_0402_5%

1 2

R179 8.2K_04 02_5%R179 8.2K_0402_5%

1 2

R181 8.2K_04 02_5%R181 8.2K_0402_5%

1 2

R180 8.2K_0402_5%R180 8.2K_0402_5%

1 2

R182 8.2K_04 02_5%R182 8.2K_0402_5%

1 2

R183 8.2K_04 02_5%R183 8.2K_0402_5%

12

C228

C228

12

@

@

R185 33_0402_5%@R185 33_04 02_5%@

22P_0402_50V8J~D

22P_0402_50V8J~D

Free Fall Sensor

B B

A A

+3VS +3VS_ACL_IO

+3VS_ACL_IO

ICH_SM_DA6,17,18,21

ICH_SM_CLK6,17,18,21

Must be placed in the center of the system.

P/N : SA000039C00 (S IC DE351DLTR LGA 14P MOTION SENSOR)

@

@

1 2

R1004

R1004

0_0603_5%

0_0603_5%

+3VS

+3VS

U6B

U6B

F1

REQ0#

G4

GNT0#

B6

REQ1#/GPIO50

A7

GNT1#/GPIO51

F13

REQ2#/GPIO52

F12

GNT2#/GPIO53

E6

REQ3#/GPIO54

F6

GNT3#/GPIO55

D8

C/BE0#

B4

C/BE1#

D6

C/BE2#

A5

C/BE3#

D3

IRDY#

E3

PAR

R1

PCIRST#

C6

DEVSEL#

E4

PERR#

C2

PLOCK#

J4

SERR#

A4

STOP#

F5

TRDY#

D7

FRAME#

C14

PLTRST#

D4

PCICLK

R2

PME#

Interrupt I/F

Interrupt I/F

H4

PIRQE#/GPIO 2

K6

PIRQF#/GPIO 3

F2

PIRQG#/GPIO 4

G2

PIRQH#/GPIO5

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

ACCEL_INT#

1 2

R1005 10K_04 02_5%R1005 10K_0402_5%

PCI

PCI

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

C961

C961

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

U43

U43

DE351DLTR

DE351DLTR

1

VDD_IO

6

VDD

8

INT 1
INT 29GND

12

SDO

13

SDA / SDI / SD O

14

SCL / SPC

7

CS

DE351DLTR_LGA14_3X5

DE351DLTR_LGA14_3X5

PCI_PIRQA#

PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

GND
GND
GND

RSVD
RSVD

2

1

2
4
5
10

3
11

+3VS

1

C962

C962
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

+3VS

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

0

SPI_CS1#R

PCI_GNT0#

1

2

R184

R184

0_0402_5%

0_0402_5%

C955

R187

R187
0_0402_5%

0_0402_5%

0

1

R172 1K_040 2_5%@ R172 1K_040 2_5%@

1 2

R175 1K_040 2_5%@ R175 1K_040 2_5%@

1 2

+3VALW

5

U7

@U7

@

2

P

B

Y

1

A

G

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

3

12

+3VALW

1

2

5

U8

@U8

@

2

P

B

Y

1

A

G

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

3

12

4

4

1

1

SPI_CS1#R22

GNT0 & SPI_CS#1 have a weak internal pull up

C954

@C954

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

PCI_PCIRST#

@C955

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

PCI_PLTRST#

A16 swap override Strap

Low= A16 swap override Enble

PCI_GNT3#

PCI_GNT3#

High= Default

R186 1K _0402_5%@ R186 1K_0402_5%@

1 2

Boot BIOS Location

SPI1

PCI

LPC

*

+3VALW

PCI_RST# 24,27,28

PLT_RST#

PLT_RST# 11,27,30,31 ,38

*

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICH9-M(2/5)

ICH9-M(2/5)

ICH9-M(2/5)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

20 60Friday, June 12, 2009

20 60Friday, June 12, 2009

20 60Friday, June 12, 2009

1

R10 (A00)

5

4

3

2

1

D D

ICH_SM_DA6,17,18,20

ICH_SM_CLK6,17,18,20

+3VS

C C

B B

R194 10K _0402_5%R194 10K_04 02_5%

R198 8.2K_04 02_5%R198 8.2K_0402_5%

R199 10K _0402_5%R199 10K_04 02_5%

R200 10K _0402_5%R200 10K_04 02_5%

R201 8.2K_04 02_5%@ R201 8.2K_0402_5%@

+3VALW

R206 10K _0402_5%R206 10K_04 02_5%

R211 10K _0402_5%R211 10K_04 02_5%

R213 10K _0402_5%R213 10K_04 02_5%

R209 10K _0402_5%R209 10K_04 02_5%

R210 10K _0402_5%R210 10K_04 02_5%

R214 10K _0402_5%R214 10K_04 02_5%

R208 1K _0402_5%R208 1K _0402_5%

R216 8.2K_04 02_5%R216 8.2K_0402_5%

R218 10K _0402_5%@ R218 10K_0402_5%@

+3VS

+3VS

12

R188

R188

2.2K_0402_5%

2.2K_0402_5%

+3VS

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

low --> default

High -->No reboot

12

R189

R189

2.2K_0402_5%

2.2K_0402_5%

2

ICH_SMBDATA

61

Q2A

Q2A
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

ICH_SMBCLK

3

4

Q2B

Q2B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

5

SERIRQ

EC_THERM#

LAN_CABDT

OCP#

EC_SCI#

R10 Moidify (short directly)

LINKALERT#

ICH_SMLINK0

ICH_SMLINK1

ICH_RI#

XDP_DBRESET#

EC_LID_OUT#

ICH_PCIE_WAKE#

EC_SMI#

SB_SPKR

+3VALW

12

R192

R192

2.2K_0402_5%

2.2K_0402_5%

XDP_DBRESET#7

PM_SYNC#11

EC_LID_OUT#31

H_STP_PCI#6
H_STP_CPU#6

ICH_PCIE_WAKE#24, 27,28,31

SERIRQ31

VGATE11,31,51

R204 100K_0402_5%R204 100K_0 402_5%

EC_THERM#31

1 2

LAN_LOPWEN24

CLKSATAREQ#6

12

R193

R193

2.2K_0402_5%

2.2K_0402_5%

T64T64

PM_SYNC#

EC_LID_OUT#

H_STP_PCI#
H_STP_CPU#

ICH_PCIE_WAKE#
SERIRQ
EC_THERM#

@

@

1 2

R203 0_0402_5%

R203 0_0402_5%

T67

T67

PAD

PAD

OCP#

OCP#7

LAN_LOPWEN

T69PAD T69PAD

T70PAD T70PAD
T71PAD T71PAD

EC_SMI#
EC_SCI#

CLKSATAREQ#

EC_SMI#31
EC_SCI#31

ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1

ICH_RI#

SUS_STAT#
XDP_DBRESET#

VRMPWRGD

GPIO49 has a weak internal pull-up

T72PAD T72PAD
T73PAD T73PAD
T74PAD T74PAD

SB_SPKR
MCH_ICH_SYNC#
ICH_TP3

SB_SPKR25

MCH_ICH_SYNC#11

ICH_TP319

Place closely pin H1Place closely pin AF3

CLK_14M_ICHCLK_48M_ICH

ICH_PWROK

ICH_LOW_BAT#

C231

C231

12

R190

@R190

@

10_0402_5%

10_0402_5%

1

C229

@C229

@

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

2

R195 100_ 0402_5%R195 100_0402_5%

1 2

12

R197

R197
10K_0402_5%

10K_0402_5%

R207 8.2K_0402_5%R207 8.2K_0402_5%

RSMRST circuit

R219

@R219

@

0_0402_5%

0_0402_5%

R_EC_RSMRST#

R212 3.24K_0402_1%R212 3.24K_0402_1%

1 2

12

1

R215

R215
453_0402_1%

453_0402_1%

2

If not used, pull-up t o
Vcc3_3 or pull-down to GND

R996

R996

10K_0402_5%

U6C

U6C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GP IO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

T98T98

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/G PIO35

AE19

SLOAD/GPIO3 8

AG22

SDATAOUT0/GP IO39

AF21

SDATAOUT1/GP IO48

AH24

GPIO49

A8

GPIO57/CLGPI O5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

SATA0GP/GPIO 21
SATA1GP/GPIO 19
SATA4GP/GPIO 36
SATA5GP/GPIO 37

SATA

GPIO

SATA

GPIO

SMBSYS GPIO

SMBSYS GPIO

Clocks

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

Power MGTController Link

Power MGTController Link

GPIO

GPIO

MEM_LED/GPIO24

GPIO10/SUS_PW R_ACK

GPIO14/AC_PRESENT

MISC

MISC

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

WOL_EN /GPIO9

AH23
AF19
AE21
AD20

H1
AF3

P1

C16
E16
G17

C10

G20

M2

B13

R3

D20

D22

R5

R6

B16

F24
B19

F22
C19

C25
A19

F21
D18

A16
C18
C11
C20

GPIO21
GPIO19
GPIO36
GPIO37

CLK_14M_ICH
CLK_48M_ICH

ICH_SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

ICH_PWROK

ICH_LOW_BAT#

PBTN_OUT#

R_EC_RSMRST#

CK_PWRGD

M_PWROK

CL_CLK0

CL_DATA0

CL_VREF0_ICH

CL_RST#

R217 0_040 2_5%@ R217 0_0402_5%@

10K_0402_5%

1 2

CLK_14M_ICH 6
CLK_48M_ICH 6

T65 PADT65 PAD

SLP_S3# 31
SLP_S4# 11,31
SLP_S5# 31

T66 PADT66 PAD

ICH_PWROK 11,31

DPRSLPVR 11,51

PBTN_OUT# 31

R205

R205

10K_0402_5%

10K_0402_5%

1 2

CK_PWRGD 6

M_PWROK 11 EC_RSMRST# 31POK47

T68 PADT68 PAD

CL_CLK0 11

CL_DATA0 11

CL_RST# 11

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

ACIN 25,31,45,46
LAN_CABDT 24

Maybach CL_CLK1/DATA1 connect to WLAN card
to support iAMT

12

R191

@R191

@

10_0402_5%

10_0402_5%

1

C230

@C230

@

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

2

12

@

@

R220

R220
0_0402_5%

0_0402_5%

12

12

R10 Moidify (short directly)

+3VS

M_PWROK 11

+3VALW

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICH9-M(3/5)

ICH9-M(3/5)

ICH9-M(3/5)

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

21 60Friday, June 12, 2009

21 60Friday, June 12, 2009

21 60Friday, June 12, 2009

1

R10 (A00)

5

D D

PCIE_IRX_WLANTX_N227

MiniWLAN (Mini Card 2)--->

MiniWPAN (Mini Card 3)--->

C C

Cardbus--->

Express card--->

10/100/1G LAN --->

+3VALW

R222 10K_0402_5%R222 10K_0402_5%

1 2

R223 10K_0402_5%R223 10K_0402_5%

1 2

R882 10K_0402_5%R882 10K_0402_5%

1 2

R224 10K_0402_5%R224 10K_0402_5%

1 2

R225 10K_0402_5%R225 10K_0402_5%

B B

1 2

R226 10K_0402_5%R226 10K_0402_5%

1 2

R227 10K_0402_5%R227 10K_0402_5%

1 2

R228 10K_0402_5%R228 10K_0402_5%

1 2

R229 10K_0402_5%R229 10K_0402_5%

1 2

R230 10K_0402_5%R230 10K_0402_5%

1 2

R231 10K_0402_5%R231 10K_0402_5%

1 2

R883 10K_0402_5%R883 10K_0402_5%

1 2

PCIE_IRX_WLANTX_P227
PCIE_ITX_C_WLANRX_N227
PCIE_ITX_C_WLANRX_P227

PCIE_IRX_WPANTX_N328

PCIE_IRX_WPANTX_P328
PCIE_ITX_C_WPANRX_N328
PCIE_ITX_C_WPANRX_P328

PCIE_IRX_CBTX_N430
PCIE_IRX_CBTX_P430
PCIE_ITX_C_CBRX_N430
PCIE_ITX_C_CBRX_P430

PCIE_IRX_EXPTX_N528
PCIE_IRX_EXPTX_P528
PCIE_ITX_C_EXPRX_N528
PCIE_ITX_C_EXPRX_P528

PCIE_IRX_GLANTX_N624

PCIE_IRX_GLANTX_P624
PCIE_ITX_C_GLANRX_N624
PCIE_ITX_C_GLANRX_P624

ESATA_USB_OC#

USB_OC1#

USB_OC2#

USB_OC3#

USB_OC4#

USB_OC5#

USB_OC6#

USB_OC7#

USB_OC8#

USB_OC9#

USB_OC10#

USB_OC11#

4

C234 0.1U_0 402_10V7K~DC234 0.1U_0402 _10V7K~D

1 2

C235 0.1U_0 402_10V7K~DC235 0.1U_0402 _10V7K~D

1 2

C236 0.1U_0 402_10V7K~DC236 0.1U_0402 _10V7K~D

1 2

C237 0.1U_0 402_10V7K~DC237 0.1U_0402 _10V7K~D

1 2

C238 0.1U_0 402_10V7K~DC238 0.1U_0402 _10V7K~D

1 2

C239 0.1U_0 402_10V7K~DC239 0.1U_0402 _10V7K~D

1 2

C240 0.1U_0 402_10V7K~DC240 0.1U_0402 _10V7K~D

1 2

C241 0.1U_0 402_10V7K~DC241 0.1U_0402 _10V7K~D

1 2

C242 0.1U_0 402_10V7K~DC242 0.1U_0402 _10V7K~D

1 2

C243 0.1U_0 402_10V7K~DC243 0.1U_0402 _10V7K~D

1 2

SPI_CS1#R20

ESATA_USB_OC#29

USB_OC1#30
USB_OC2#30

R232

R232

22.6_0402_1%

22.6_0402_1%

Within 500 mils

PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2
PCIE_ITX_WLANRX_P2

PCIE_IRX_WPANTX_N3
PCIE_IRX_WPANTX_P3
PCIE_ITX_WPANRX_N3
PCIE_ITX_WPANRX_P3

PCIE_IRX_CBPTX_N4
PCIE_IRX_CBPTX_P4
PCIE_ITX_CBPRX_N4
PCIE_ITX_CBPRX_P4

PCIE_IRX_EXPTX_N5
PCIE_IRX_EXPTX_P5
PCIE_ITX_EXPRX_N5
PCIE_ITX_EXPRX_P5

PCIE_IRX_GLANTX_N6
PCIE_IRX_GLANTX_P6
PCIE_ITX_GLANRX_N6
PCIE_ITX_GLANRX_P6

SPI_CS1#R

ESATA_USB_OC#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC8#
USB_OC9#
USB_OC10#
USB_OC11#

USBRBIAS

12

3

U6D

U6D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58 /CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

USB

USB

DMI0RXN

DMI0RXP
DMI0TXN
DMI0TXP

DMI1RXN

DMI1RXP
DMI1TXN
DMI1TXP

DMI2RXN

DMI2RXP
DMI2TXN
DMI2TXP

DMI3RXN

DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN
DMI_CLKP

PCI-Express

PCI-Express

Direct Media Interface

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USBP10N
USBP10P
USBP11N
USBP11P

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29
AF28

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_MRX_ITX_N0
DMI_MRX_ITX_P0

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_MRX_ITX_N1
DMI_MRX_ITX_P1

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_MRX_ITX_N2
DMI_MRX_ITX_P2

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_MRX_ITX_N3
DMI_MRX_ITX_P3

CLK_DMI_ICH#
CLK_DMI_ICH

DMI_IRCOMP

USBP0­USBP0+
USBP1­USBP1+
USBP2­USBP2+

USBP4­USBP4+
USBP5­USBP5+
USBP6­USBP6+
USBP7­USBP7+

USBP9­USBP9+
USBP10­USBP10+
USBP11­USBP11+

2

DMI_MTX_IRX_N0 11
DMI_MTX_IRX_P0 11
DMI_MRX_ITX_N0 11
DMI_MRX_ITX_P0 11

DMI_MTX_IRX_N1 11
DMI_MTX_IRX_P1 11
DMI_MRX_ITX_N1 11
DMI_MRX_ITX_P1 11

DMI_MTX_IRX_N2 11
DMI_MTX_IRX_P2 11
DMI_MRX_ITX_N2 11
DMI_MRX_ITX_P2 11

DMI_MTX_IRX_N3 11
DMI_MTX_IRX_P3 11
DMI_MRX_ITX_N3 11
DMI_MRX_ITX_P3 11

CLK_DMI_ICH# 6
CLK_DMI_ICH 6

R221 24.9 _0402_1%R221 24.9_0402_1%

1 2

USBP0- 29
USBP0+ 29
USBP1- 30
USBP1+ 30
USBP2- 30
USBP2+ 30

USBP4- 27
USBP4+ 27
USBP5- 27
USBP5+ 27
USBP6- 28
USBP6+ 28
USBP7- 28
USBP7+ 28

USBP9- 32
USBP9+ 32
USBP10- 30
USBP10+ 30
USBP11- 30
USBP11+ 30

Within 500 mils

+1.5VS

USB Port

0

1

2

3

4

5

6

7

8

9

10

11

1

Device

USB&ESATA
Reader board

USB board
NC

WLAN
WWAN
WPAN
Express

NC
Touch screen
Bluetooth

Camera

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICH9-M(4/5)

ICH9-M(4/5)

ICH9-M(4/5)

LA-5151P

LA-5151P

LA-5151P

22 60Friday, June 12, 2009

22 60Friday, June 12, 2009

22 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

+5VS +3VS

12

R233

R233

100_0402_5%

100_0402_5%

D D

R234

R234

100_0402_5%

100_0402_5%

+1.5VS +1.5VS_PCIE_ICH

C C

+1.5VS

B B

A A

D2

D2
SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

1 2

+ICH_V5REF_RUN

20 mils

1

C246

C246
1U_0603_10V6K~D

1U_0603_10V6K~D

2

+3VALW+5VALW

12

D3

D3
SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

1 2

+ICH_V5REF_SUS

20 mils

1

C252

C252
1U_0603_10V6K~D

1U_0603_10V6K~D

2

L7

L7

BLM21PG331SN1D_2P~D

BLM21PG331SN1D_2P~D

1 2

0805

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

10UH_LB2012T100MR_20%_0805~D

10UH_LB2012T100MR_20%_0805~D

L9

L9
1UH_GLF2012T1R0M_20%_0805~D

1UH_GLF2012T1R0M_20%_0805~D

1 2

L8

L8

1 2

5

C256

C256

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+VCCGLANPLL

1

2

+RTCVCC

C244

0.1U_0402_16V4Z~D

C244

0.1U_0402_16V4Z~D

1

2

40 mils

C257

22U_0805_6.3V6M~D

C257

22U_0805_6.3V6M~D

1

1

+

+

2

2

+VCCSATAPLL

C266

1U_0603_10V4Z~D

C266

1U_0603_10V4Z~D

C268

10U_0805_10V4Z~D

C268

10U_0805_10V4Z~D

1

1

2

2

+1.5VS

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+1.5VS

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C279 0.1U_0402_16V4Z~DC279 0.1U_0402_16V4Z~D

1 2

+3VS

1

C280

C280

2

C283

2.2U_0603_6.3V6K~D

C283

2.2U_0603_6.3V6K~D

C282

10U_0805_10V4Z~D

C282

10U_0805_10V4Z~D

1

2

C248

0.1U_0402_16V4Z~D

C248

0.1U_0402_16V4Z~D

1

2

C258

22U_0805_6.3V6M~D

C258

22U_0805_6.3V6M~D

1

1

2

2

+1.5VS

C267

C267

1U_0603_10V4Z~D

1U_0603_10V4Z~D

+1.5VS

C270

C270

1U_0603_10V4Z~D

1U_0603_10V4Z~D

C274

C274

C276

C276

+1.5VS_PCIE_ICH

1

2

20 mils

+ICH_V5REF_RUN

+ICH_V5REF_SUS

C260

2.2U_0603_6.3V6K~D

C260

2.2U_0603_6.3V6K~D

1

2

1

2

1

2

1

2

+VCCLAN1_05_INT_ICH

C281

4.7U_0603_6.3V6M~D

C281

4.7U_0603_6.3V6M~D

646mA

1342mA

11mA

11mA

47mA

+3VS+1.5VS

2mA

2mA

23mA

80mA

4

U6F

U6F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[1]

AA25

VCC1_5_B[2]

AB24

VCC1_5_B[3]

AB25

VCC1_5_B[4]

AC24

VCC1_5_B[5]

AC25

VCC1_5_B[6]

AD24

VCC1_5_B[7]

AD25

VCC1_5_B[8]

AE25

VCC1_5_B[9]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[1]

AD15

VCC1_5_A[2]

AD16

VCC1_5_A[3]

AE15

VCC1_5_A[4]

AF15

VCC1_5_A[5]

AG15

VCC1_5_A[6]

AH15

VCC1_5_A[7]

AJ15

VCC1_5_A[8]

AC11

VCC1_5_A[9]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

1mA

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

4

CORE

CORE

VCCA3GP ATXARX

VCCA3GP ATXARX

VCCP_CORE

VCCP_CORE

PCI

PCI

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]

VCCPSUSVCCPUSB

VCCPSUSVCCPUSB

VCCSUS3_3[5]

VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

USB CORE

USB CORE

GLAN POWER

GLAN POWER

VCC1_05[1]
VCC1_05[2]
VCC1_05[3]
VCC1_05[4]
VCC1_05[5]
VCC1_05[6]
VCC1_05[7]
VCC1_05[8]

VCC1_05[9]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCDMIPLL

VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[1]

VCC3_3[2]

VCC3_3[7]

VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]

VCC3_3[8]

VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

A15

1634mA

B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

+VCCDMIPLL

R29

23mA

+VCC_DMI_ICH

W23
Y23

AB23
AC23

2mA

AG29

AJ6

AC10

AD19
AF20
AG24
AC20

308mA

B9
F9
G3
G6
J2
J7
K7

AJ4

11mA

11mA

AJ3

AC8
F17

+VCCSUS1_5_ICH_1

AD8

+VCCSUS1_5_ICH_2

F18

+3VALW_ICH

A18
D16
D17
E22

212mA

+3VALW_USB_ICH

AF1

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

+VCCCL1_05_ICH

G22

+VCCCL1_5_ICH

G23

19/73/73mA

A24
B24

3

+1.05V_VCCP

C249

0.1U_0402_16V4Z~D

C249

0.1U_0402_16V4Z~D

1

1

C245

C245

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

2

L6

L6

1UH_GLF2012T1R0M_20%_0805~D

1UH_GLF2012T1R0M_20%_0805~D

C247

0.01U_0402_16V7K~D

C247

0.01U_0402_16V7K~D

1

1

2

2

1

C251

C251

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

2

1 2

C250

C250
10U_0805_10V4Z~D

10U_0805_10V4Z~D

L5

L5
BLM18PG600SN1_0603~D

BLM18PG600SN1_0603~D

1 2

+1.5VS

+1.05V_VCCP

48mA

C253

0.1U_0402_16V4Z~D

C253

0.1U_0402_16V4Z~D

1

+3VS

C259

0.1U_0402_16V4Z~D

C259

0.1U_0402_16V4Z~D

1

+3VS

C262

0.1U_0402_16V4Z~D

C262

0.1U_0402_16V4Z~D

1

+3VS

1

C261

C261

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

+3VS

1

C263

C263

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

T75T75
T76T76

1

2

T77T77

1 2

C269 0. 1U_0402_16V4Z~DC2 69 0.1U_0402_16V4Z~D

1 2

R974

R974
0_0603_5%

0_0603_5%

C271

0.022U_0402_16V7K~D

C271

0.022U_0402_16V7K~D

C272

0.022U_0402_16V7K~D

C272

0.022U_0402_16V7K~D

1

1

2

2

C275

C275

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

@

C277

1U_0603_10V4Z~D@C277

1U_0603_10V4Z~D

1

+3VS

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

1 2

R880

R880
0_0402_5%

0_0402_5%

C265

C265

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+3VALW_S5_ICH

R975

R975

0_0603_5%

0_0603_5%

1 2

C273

0.1U_0402_16V4Z~D

C273

0.1U_0402_16V4Z~D

1

2

1

C278

@C278

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

+3VALW_S5_ICH

+3VALW_S5_ICH

Reduce ICH power sumption at S5 mo de.

SYSON#33

2

SYSON#

2

R878

R878
0_0402_5%

0_0402_5%

1 2

1

C264

C264

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

B+_BIAS

1 2

13

D

D

2

G

G

S

S

2

+1.05V_VCCP

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C254

0.1U_0402_16V4Z~D

C254

0.1U_0402_16V4Z~D

1

1

2

2

+3VS

+3VALW

R1022 0_0805_5%@R1022 0_0805_5%@

1U_0603_10V6K~D

1U_0603_10V6K~D

C966

C966

R972

300K_0402_5%

R972

300K_0402_5%

1

2

Q46

Q46
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2

C255

C255

1 2

6

2
1

+3VALW_S5_ICH

D

D

S

S

20mil

45

Q47

Q47

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

G

G

3

R973

R973

2M_0402_5%

2M_0402_5%

1 2

1

U6E

U6E

AA26

VSS[1]

AA27

VSS[2]

AA3

VSS[3]

AA6

VSS[4]

AB1

VSS[5]

AA23

VSS[6]

AB28

VSS[7]

AB29

VSS[8]

AB4

VSS[9]

AB5

VSS[10]

AC17

VSS[11]

AC26

VSS[12]

AC27

VSS[13]

AC3

VSS[14]

AD1

VSS[15]

AD10

VSS[16]

AD12

VSS[17]

AD13

VSS[18]

AD14

VSS[19]

AD17

VSS[20]

AD18

VSS[21]

AD21

VSS[22]

AD28

VSS[23]

AD29

VSS[24]

AD4

VSS[25]

AD5

VSS[26]

AD6

VSS[27]

AD7

VSS[28]

AD9

VSS[29]

AE12

VSS[30]

AE13

VSS[31]

AE14

VSS[32]

AE16

VSS[33]

AE17

VSS[34]

AE2

VSS[35]

AE20

VSS[36]

AE24

VSS[37]

AE3

VSS[38]

AE4

VSS[39]

AE6

VSS[40]

AE9

VSS[41]

AF13

VSS[42]

AF16

VSS[43]

AF18

VSS[44]

AF22

VSS[45]

AH26

VSS[46]

AF26

VSS[47]

AF27

VSS[48]

AF5

VSS[49]

AF7

VSS[50]

AF9

VSS[51]

AG13

VSS[52]

AG16

VSS[53]

AG18

VSS[54]

AG20

VSS[55]

AG23

VSS[56]

AG3

VSS[57]

AG6

VSS[58]

AG9

VSS[59]

AH12

VSS[60]

AH14

VSS[61]

AH17

VSS[62]

AH19

VSS[63]

AH2

VSS[64]

AH22

VSS[65]

AH25

VSS[66]

AH28

VSS[67]

AH5

VSS[68]

AH8

VSS[69]

AJ12

VSS[70]

AJ14

VSS[71]

AJ17

VSS[72]

AJ8

VSS[73]

B11

VSS[74]

B14

VSS[75]

B17

VSS[76]

B2

VSS[77]

B20

VSS[78]

B23

VSS[79]

B5

VSS[80]

B8

VSS[81]

C26

VSS[82]

C27

VSS[83]

E11

VSS[84]

E14

VSS[85]

E18

VSS[86]

E2

VSS[87]

E21

VSS[88]

E24

VSS[89]

E5

VSS[90]

E8

VSS[91]

F16

VSS[92]

F28

VSS[93]

F29

VSS[94]

G12

VSS[95]

G14

VSS[96]

G18

VSS[97]

G21

VSS[98]

G24

VSS[99]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]
VSS_NCTF[9]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICH9M (5/5)

ICH9M (5/5)

ICH9M (5/5)

LA-5151P

LA-5151P

LA-5151P

23 60Friday, June 12, 2009

23 60Friday, June 12, 2009

23 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

A

B

C

D

E

W=60mils

1U_0603_10V6K~D

1U_0603_10V6K~D

R236

1 1

PCIE_IRX_GLANTX_P622

PCIE_IRX_GLANTX_N622

PCIE_ITX_C_GLANRX_P622

PCIE_ITX_C_GLANRX_N622

2 2

LAN_LOPWEN21

C318

C318

33P_0402_50V8J~D

33P_0402_50V8J~D

3 3

C320 0.01U_0402_16V7K~DC320 0.01U_0402_16V7K~D

C321 0.01U_0402_16V7K~DC321 0.01U_0402_16V7K~D

C322 0.01U_0402_16V7K~DC322 0.01U_0402_16V7K~D

C324 0.01U_0402_16V7K~DC324 0.01U_0402_16V7K~D

B+_BIAS

EN_WOL#31

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

ICH_PCIE_WAKE#21,27,28,31

R240 1K_0402_5%R240 1K_0402_5%

+3VS

R241 0_0402_5%@R241 0_0402_5%@

Y3

Y3

1 2

2

25MHZ_20PF_1BX25000CK1A

25MHZ_20PF_1BX25000CK1A

1

1 2

1 2

1 2

1 2

R236

300K_0402_5%

300K_0402_5%

2

G

G

Q4

Q4

C304 .1U_0402_16V7K~DC304 .1U_0402_16V7K~D

12

C305 .1U_0402_16V7K~DC305 .1U_0402_16V7K~D

12

CLK_PCIE_GLAN6
CLK_PCIE_GLAN#6

GLAN_CLKREQ#6

PCI_RST#20,27,28

1 2

1 2

15K_0402_5%

15K_0402_5%

LAN_CKTAL1

LAN_CKTAL2

2

C319

C319
27P_0402_50V8J~D

27P_0402_50V8J~D

1

V_DAC
LAN_MDIN3
LAN_MDIP3

V_DAC
LAN_MDIN2
LAN_MDIP2

V_DAC
LAN_MDIN1
LAN_MDIP1

V_DAC
LAN_MDIN0
LAN_MDIP0

+3VALW

1

C284

C284

2

EN_WOL

12

13

D

D

S

S

R242

R242

2M_0402_5%

2M_0402_5%

12

PCIE_IRX_C_GLANTX_P6

PCIE_IRX_C_GLANTX_N6

PCIE_ITX_C_GLANRX_P6

PCIE_ITX_C_GLANRX_N6

R239 2.49K_0402_1%R239 2.49K_0402_1%

1 2

1 2

TS1

TS1

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

TD2-6MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

12

TD4-

MX4-

BOTH_GST5009-LF

BOTH_GST5009-LF

R1006

R1006

6

2
1

LAN_CABDT21

24
23
22

21
20
19

18
17
16

15
14
13

D

D

G

G

ISOLATEB

LAN_CKTAL1
LAN_CKTAL2

RJ45_TX3­RJ45_TX3+

RJ45_TX2­RJ45_TX2+

RJ45_RX1­RJ45_RX1+

RJ45_TX0­RJ45_TX0+

L10

L10

FBMA-L11-322513-201LMA40T_1210

FBMA-L11-322513-201LMA40T_1210

S

S

45

1 2

Q3

Q3
SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

3

1

C958

C958
2200P_0402_50V7K~D

2200P_0402_50V7K~D

2

U9

U9

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_N

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKTAL1

42

CKTAL2

23

GPO

24

NC

7

GND

14

GND

31

GND

47

GND

22

EGND

RTL8111DL-GR_LQFP48_7X7

RTL8111DL-GR_LQFP48_7X7

RP1

RP1

75_1206_8P4R_5%

75_1206_8P4R_5%

W=60mils

C285

C285

1

@

@

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

2

RTL8111DL

RTL8111DL

45
36
27
18

2

C323

C323
1000P_1206_2KV7~D

1000P_1206_2KV7~D

1

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

1

2

+LAN_IO

C286

C286

1

2

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

EECS

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

SROUT12

EVDD12
DVDD12
DVDD12
DVDD12
AVDD12

AVDD12

VDDSR
VDDSR

VDD33
VDD33

AVDD33
AVDD33

ENSR

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

LED0

FB12

C287

C287

3.6K_0402_5%

3.6K_0402_5%

LAN_LED3

33

LAN_LED2

34

LAN_LED1

35
32

LAN_LED0

38

2
3
5
6
8
9
11
12

4

48

19
30
36
13
10

39

44
45

29
37

1
40
43

+LAN_IO

12

R947

R947

LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3

+LAN_DVDD12

W=60mils

W=40mils

+LAN_IO

LAN_LED2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

LAN_LED3

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

W=60mils

L11

L11

1 2

4.7UH_1008HC-472EJFS-A_5%_1008

4.7UH_1008HC-472EJFS-A_5%_1008

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C306

C306

These components close to U9: Pin 48

( Should be place within 200 mils )

W=30mils W=30mils

A00 Modify

R884 0_0603_5%

R884 0_0603_5%

1 2

C310 1U_0603_10V6K~DC310 1U_0603_10V6K~D

1 2

C311 1U_0603_10V6K~DC311 1U_0603_10V6K~D

These caps close to U9: Pin 19

+LAN_DVDD12

C296

0.1U_0402_10V7K~D

C296

0.1U_0402_10V7K~D

C294

0.1U_0402_10V7K~D

C294

0.1U_0402_10V7K~D

C295

0.1U_0402_10V7K~D

C295

0.1U_0402_10V7K~D

1

1

2

2

These caps close to U9: Pin 10, 13, 30, 36, 39

These caps close to U9: Pin 44.45

( Should be place within 200 mils )

C308

22U_1206_6.3V6M~D

C308

22U_1206_6.3V6M~D

1

2

These caps close to U9: Pin 1.29, 37, 40

C288

0.1U_0402_10V7K~D

C288

0.1U_0402_10V7K~D

1

1

2

2

D4

D4

1 2

D5

D5

1 2

+LAN_VDD

1

1

C307

C307
22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

2

2

@

@

12

+LAN_DVDD12

C293

0.1U_0402_10V7K~D

C293

0.1U_0402_10V7K~D

C292

0.1U_0402_10V7K~D

C292

0.1U_0402_10V7K~D

1

1

2

2

@

@

R942 0_0 805_5%

R942 0_0 805_5%

1

C309

C309

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

C290

0.1U_0402_10V7K~D

C290

0.1U_0402_10V7K~D

C289

0.1U_0402_10V7K~D

C289

0.1U_0402_10V7K~D

1

1

2

2

D6

D6

LAN_LED1

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

D7

D7

LAN_LED3

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

+LAN_VDD

1

2

12

C291

0.1U_0402_10V7K~D

C291

0.1U_0402_10V7K~D

@

@

R235

R235

0_0603_5%

0_0603_5%

A00 Modify

A00 Modify

+LAN_IO

LED1_LED3LED2_LED3

12

+LAN_IO

+LAN_VDD

These caps close to U9: Pin 4

+LAN_DVDD12

1

C302

@C302

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+LAN_IO

2

R246

R246

220_0402_5%

220_0402_5%

LAN_LED0 LAN_ACTIVITY#

1 2

+LAN_IO

R244

R244
220_0402_5%

220_0402_5%

LED1_LED3 LINK_100_1000#

1 2

R245

R245

220_0402_5%

220_0402_5%

LED2_LED3 LINK_10_1000#

1 2

LAN_MDIN3

LAN_MDIP3

LAN_MDIN1

LAN_MDIN2

LAN_MDIP2

LAN_MDIP1

LAN_MDIN0

LAN_MDIP0

2

C303

@C303

@

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

JRJ45

JRJ45

13

Yellow LED-

12

RJ45_TX3-

RJ45_TX3+

RJ45_RX1-

RJ45_TX2-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

C873 6.8P_0402_50V8C~DC873 6.8P_0402_50V8C~D

1 2

C874 6.8P_0402_50V8C~DC874 6.8P_0402_50V8C~D

1 2

C875 6.8P_0402_50V8C~DC875 6.8P_0402_50V8C~D

1 2

C876 6.8P_0402_50V8C~DC876 6.8P_0402_50V8C~D

1 2

C877 6.8P_0402_50V8C~DC877 6.8P_0402_50V8C~D

1 2

C878 6.8P_0402_50V8C~DC878 6.8P_0402_50V8C~D

1 2

C879 6.8P_0402_50V8C~DC879 6.8P_0402_50V8C~D

1 2

C880 6.8P_0402_50V8C~DC880 6.8P_0402_50V8C~D

1 2

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Orange LED-

10

Yellow LED+

9

Green LED-

FOX_JM3611A-R4953B-7F

FOX_JM3611A-R4953B-7F

CONN@

CONN@

GND

GND

14

15

4 4

A

LEDS1-0

LED0

LED1

LED2

LED3

0 0 0 1 1 0 1 1

Tx / Rx

LINK100

LINK10

LINK1000

Tx / Rx

LINK10 /100 / 1000

LINK10 / 100

LINK1000

B

Tx

LINK

Rx

FULL

LINK10 / ACT

LINK100 / ACT

FULL

LINK1000 / ACT

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Gigabit LAN_RTL8111DL

Gigabit LAN_RTL8111DL

Gigabit LAN_RTL8111DL

LA-5151P

LA-5151P

LA-5151P

24 60Friday, June 12, 2009

24 60Friday, June 12, 2009

24 60Friday, June 12, 2009

E

R10 (A00)

R10 (A00)

R10 (A00)

A

R10 Modify

R1549 20K_0402_5%R1549 20K _0402_5%

1 2

+3VS

EC_SPK_HP_MUTE#31

+3VS

1 1

EC_SUB_MUTE#31

EA_EC_SPK_MUTE#

HP_JD

EA_EC_SUB_MUTE#

2 2

HP_JD

HP1_JD

HP2_JD

10K_0402_5%

10K_0402_5%

HP_JD

3 3

SENSE_B

+3VS +3VS

12

MIC_JD

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

4 4

HP1_JD

EAPD#

EC_SPK_HP_MUTE#

1 2

R1550 10K_0402_5%R1550 10K _0402_5%

EAPD#

EC_SUB_MUTE#

1 2

+3VS

R1551 10K_0402_5%R1551 10K_0402_5%

+3VS

C950

C950

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U48

U48

1

P

IN1

O

2

IN2

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

+3VS

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U49

U49

1

P

IN1

2

IN2

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

+3VS

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U108

U108

1

P

INB

2

INA

G

TC7SZ02FU_SSOP5

TC7SZ02FU_SSOP5

3

12

R1552

R1552

13

D

D

Q49

Q49

2

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

G

G

S

S

R547

R547

39.2K_0402_1%

39.2K_0402_1%

12

100K_0402_5%

100K_0402_5%

R978

R978

61

2

Q42A

Q42A

SENSE_A

+3VS

12

39.2K_0402_1%

39.2K_0402_1%

12

100K_0402_5%

100K_0402_5%

R971

R971

13

D

D

2

G

G

S

S

A

C951

C951

O

C965

C965

Y

12

3

4

R544

R544

Q43

Q43
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

+3VS

1

IN1

2

IN2

+3VS

1

IN1

2

IN2

4

SPK_AMP_MUTE# 26

4

SUB_AMP_MUTE# 26

HP_JD

4

EA_EC_SPK_MUTE#

HP_JD#

20K_0402_1%

20K_0402_1%

1

2

R545

R545

5.1K_0402_1%

5.1K_0402_1%

1 2

1000P_0402_50V7K~D

1000P_0402_50V7K~D

R546

R546

C866

C866

1

2

5

Q42B

Q42B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

+AVDD_AUDIO

R543

R543

5.1K_0402_1%

5.1K_0402_1%

1 2

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

C865

C865

2

5

3

5

3

B

C968

C968

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
U46

U46

P

EA_EC_SPK_MUTE#

4

O

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

C978

C978

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

U47

U47

P

EA_EC_SUB_MUTE#

4

O

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

HDA_SDOUT_AUDIO19

DMIC_CLK30

+3VS+3VS

C967

C967

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U50

U50

P

IN1

HP_AMP_MUTE#

4

O

IN2

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

+AVDD_AUDIO

100K_0402_5%

100K_0402_5%

12

R979

R979

HP2_JD

B

HDA_BITCLK_AUDIO19

HDA_SYNC_AUDIO19

HDA_RST_AUDIO#19

DMIC030

SB_SPKR21

HDA_SDIN019

HP2_CD_R

HP2_CD_L

C

R10 Moidify (short directly) R10 Moidify (short directly)

0_0603_5%

0_0603_5%

1 2

R249 33_0402_5%R249 33_0402_5%

100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D

@

@

@

@

C341

C341

1

1

C342

C342

2

2

Int. 60k pull up.

+DVDD_AUDIO+3VS +5VS+A VDD_AUDIO

@

@

R247

R247

HDA_SDIN0_R

SENSE_A
SENSE_B

PC_BEEP

EAPD#

12

1

2

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

C330

1U_0402_6.3V6K~D

C330

1U_0402_6.3V6K~D

C326

0.1U_0402_10V6K~D

C326

0.1U_0402_10V6K~D

1

2

75mA

3

U11

U11

DVDD_IO

6

BITCLK

8

SDI_CODEC

5

SDO

10

SYNC

11

RESET#

2

VOL_UP/DMIC_CLK/GPIO1

4

VOL_DN/DMIC_0/GPIO2

30

DMIC1/GPIO5

13

SENSE_A

34

SENSE_B

32

SENSE_C

12

PCBEEP

47

EAPD/SPDIF IN/GPIO0

18

PORTI_L

19

PORTI_C

20

PORTI_R

7

DVSS

26

AVSS1

42

AVSS2

92HD73C1X5PRGXC1X8_QFP48_7X7

92HD73C1X5PRGXC1X8_QFP48_7X7

Reserved for TEST

R268 0_0805_5%R268 0_0805_5%

1 2

R269 0_0805_5%@R269 0_0805_5%@

1 2

R270 0_0805_5%@R270 0_0805_5%@

1 2

GND AGND

C1529 270P_0402_50V7K~DC1529 270P_0402_50V7K~D

R1548

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

C354

C354

1 2

C355

C355

1 2

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

C945

C945

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

1 2

C946

C946

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

HP2_CD_L1

BEEP_C#

SB_SPKR_C

2K_0402_1%

2K_0402_1%

1 2

1 2

2K_0402_1%

2K_0402_1%

R264

R264

499K_0402_1%

499K_0402_1%

1 2

1 2

R266

R266

499K_0402_1%

499K_0402_1%

C

R1548

R1547

R1547

1 2

HP2_CD_R2HP2_CD_R1

HP2_CD_L2

C1530 270P_0402_50V7K~DC1530 270P_0402_50V7K~D

1 2

C358 1U_0603_10V4Z~DC358 1U_0603_10V4Z~D

1 2

PC_BEEP

R267

R267
10K_0402_5%@

10K_0402_5%@

1 2

1

2

C331

C331

+3VS

1

2

9

DVDD_CORE1DVDD_CORE

PC_BEEP 26BEEP#31

D

C332

10U_0603_6.3V6M~D

C332

10U_0603_6.3V6M~D

132mA

38

AVDD125AVDD2

PORTA_L

PORTA_R

VREFOUT-A

PORTB_L

PORTB_R

VREFOUT-B

PORTC_L

PORTC_R

VREFOUT-C

PORTD_L

PORTD_R

PORTE_L

PORTE_R

VREFOUT-E

PORTF_L

PORTF_R

PORTG_L

PORTG_R

PORTH_L

PORTH_R

SPDIF OUT0

SPDIF OUT1/GPIO3

VREFFILT

U12

U12

14

SHDNR#

18

SHDNL#

15

INR

13

INL

1

C1P

3

C1N

1U_0603_10V4Z~D

1U_0603_10V4Z~D

D

E

+AVDD_AUDIO

C327

0.1U_0402_10V6K~D

C327

0.1U_0402_10V6K~D

C333

1U_0402_6.3V6K~D

C333

1U_0402_6.3V6K~D

1

1

2

2

39
41
37

21
22
28

23
24
29

35
36

14
15
31

16
17

43
44

45
46

48
40

1 2

27
33

CAP2

C347

C347

+3VS

10

19

SVDD

PVDD

PGND

PVss

SVss

2

5

7

17

C360

C360

1

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C335

1U_0402_6.3V6K~D

C335

1U_0402_6.3V6K~D

C334

10U_0603_6.3V6M~D

C334

10U_0603_6.3V6M~D

1

1

2

HP1_CD_L
HP1_CD_R

SPK_CD_L
SPK_CD_R

MIC_CD_L
MIC_CD_R

HP2_CD_L
HP2_CD_R

0_0402_5%

0_0402_5%

1

2

2

C351

C351
1U_0603_10V4Z~D

1U_0603_10V4Z~D

1

SGND

1

2

2

Int. Speaker and
Sub woofer

SPK_CD_L 26
SPK_CD_R 26

R1020

@R1020

@

ACIN 21,31,45,46

1

C348

C348

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

HP2_AMP_R

11

OUTR

HP2_AMP_LHP_AMP_MUTE#

9

OUTL

21

PAD

4

NC-4

6

NC-6

8

NC-8

12

NC-12

16

NC-16

20

NC-20

MAX4411ETP+T_TQFN20_4X4

MAX4411ETP+T_TQFN20_4X4

E

C328

0.1U_0402_10V6K~D

C328

0.1U_0402_10V6K~D

+MIC1_VREFO

@

@

12

R248

R248
0_0603_5%

0_0603_5%

C336

C336

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

HP1_CD_R

HP1_CD_L

HP1_CD_R1

1 2

HP1_CD_L1

1 2

C337

C337

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

R251

D31

D31

1

PACDN042Y3R_SOT23-3~D@

PACDN042Y3R_SOT23-3~D@

+MIC1_VREFO

R251
68_0603_1%

68_0603_1%

1 2

1 2

R252

R252
68_0603_1%

68_0603_1%

3

2

Front

HP1_AMP_L HP1_AMP_L1_JKHP1_AMP _L1

HP1_AMP_R

+MIC1_VREFO W=10 mil

4.7K_0402_5%

Rear or MIC

MIC_CD_R

D32

D32

1

Center

HP2_AMP_L HP2_AMP_L1_JKHP2_AMP_L1

HP2_AMP_R

D33

D33

1

4.7K_0402_5%

C349

C349

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

MIC_CD_L1

1 2

MIC_CD_R1

1 2

C350

C350

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

3

2

PACDN042Y3R_SOT23-3~D@

PACDN042Y3R_SOT23-3~D@

R261

R261

68_0603_1%

68_0603_1%

1 2

1 2

R262

R262

68_0603_1%

68_0603_1%

3

2

PACDN042Y3R_SOT23-3~D

PACDN042Y3R_SOT23-3~D

@

@

F

U10

U10

14

L14

L14

L15

L15

SHDNR#

18

SHDNL#

15

INR

13

INL

1

C1P

3

C1N

C339

C339

12

1U_0603_10V4Z~D

1U_0603_10V4Z~D

HP1_JD

HP_AMP_MUTE#

C1507

C1507
270P_0402_50V7K~D

270P_0402_50V7K~D

R1028

R1028

2K_0402_1%

2K_0402_1%

1 2

1 2

R1029

R1029

2K_0402_1%

2K_0402_1%

C338 1U_0603_10V4Z~DC338 1U_0603_10V4Z~D

1 2

HP1_CD_R2

HP1_CD_L2

C1508

C1508
270P_0402_50V7K~D

270P_0402_50V7K~D

1 2

1 2

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

1 2

HP1_AMP_R1 HP1_AMP_R1_JK

1 2

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

Place close to Jack

HP1_AMP_L1_JK

HP1_AMP_R1_JK

R256

R256

12

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

A00 Modify

1 2

C345 10 00P_0402_50V7K~DC345 1000P_ 0402_50V7K~D

12

R257

R257

4.7K_0402_5%

4.7K_0402_5%

L16

L16

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

1 2

1 2

L17

L17

MIC_CD_L1_JKMIC_CD_L

MIC_CD_R1_JK

Place close to Jack

MIC_CD_L1_JK

MIC_CD_R1_JK

L19

L19

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

1 2

HP2_AMP_R1 HP2_AMP_R1_JK

1 2

L18

L18

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

HP2_JD

Place close to Jack

A00 Modify

HP2_AMP_L1_JK

HP2_AMP_R1_JK

DELL CONFIDENTIAL/PROPRIETARY

F

G

+3VS

2

C325

C325
1U_0603_10V4Z~D

1U_0603_10V4Z~D

1

10

19

HP1_AMP_R

11

OUTR

SVDD

PVDD

OUTL

PAD

NC-4

NC-6

NC-8

NC-12

NC-16

NC-20

PGND

PVss

SVss

SGND

MAX4411ETP+T_TQFN20_4X4

MAX4411ETP+T_TQFN20_4X4

2

5

7

17

C343

1000P_0402_50V7K~D

C343

1000P_0402_50V7K~D

C344

1000P_0402_50V7K~D

C344

1000P_0402_50V7K~D

1

1

2

2

MIC_JD

C352

100P_0402_50V8J~D

C352

100P_0402_50V8J~D

1

1

2

2

1226 Modify

1000P_0402_50V7K~D

1000P_0402_50V7K~D

C356

1000P_0402_50V7K~D

C356

1000P_0402_50V7K~D

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

LA-5151P

LA-5151P

LA-5151P

G

HP1_AMP_L

9

21

4

6

8

12

16

20

JHP1

JHP1

1
2
6
3

4

5

FOX_JA6333L-B5S4-7F

FOX_JA6333L-B5S4-7F

CONN@

CONN@

1
2
6
3

4

C353

100P_0402_50V8J~D

C353

100P_0402_50V8J~D

5

JHP2

JHP2

1
2
6
3

4

5

C357

C357

FOX_JA6333L-B5S4-7F

FOX_JA6333L-B5S4-7F

CONN@

CONN@

Codec IDT 92HD73C

Codec IDT 92HD73C

Codec IDT 92HD73C

H

SHLD1

SHLD1
SHLD2

SHLD2

NPTH1

NPTH1
NPTH2

NPTH2

JMIC1

JMIC1

FOX_JA6333L-B5S4-7F

FOX_JA6333L-B5S4-7F

CONN@

CONN@

25 60Friday, June 12, 2009

25 60Friday, June 12, 2009

25 60Friday, June 12, 2009

H

SHLD1

SHLD1
SHLD2

SHLD2

NPTH1

NPTH1
NPTH2

NPTH2

SHLD1

SHLD1
SHLD2

SHLD2
NPTH1

NPTH1
NPTH2

NPTH2

7
8
9
10

7
8
9
10

7
8
9
10

of

R10 (A00)

R10 (A00)

R10 (A00)

5

R1.0 Modify

19V

B+

1A/40mil

2

C901

C901
22U_1210_25V6K~D

22U_1210_25V6K~D

1

2

C902

C902
22U_1210_25V6K~D

22U_1210_25V6K~D

1

MAX9736A High-Pass Filter, fc = 500Hz, Av = 0.631V/V

D D

SPK_CD_L25

PC_BEEP25

SPK_CD_R25

PC_BEEP25

C C

B B

SPK_AMP_MUTE#25

SPK_CD_R25

SPK_CD_L25

SPK_CD_L

R1.0 Modify

R903

2

C1553

C1553

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

1

B+

1A/40mil

2

C977

C977

22U_1210_25V6K~D

22U_1210_25V6K~D

1

R1016

R1016

R982

R982

1 2

1 2

R1026

R1026

R903

1 2

16.5K_0402_1%

16.5K_0402_1%

R901

R901

1 2

182K_0402_1%

182K_0402_1%

R908

R908

1 2

16.5K_0402_1%

16.5K_0402_1%

R906

R906

1 2

182K_0402_1%

182K_0402_1%

SPK_AMP_MUTE_R#

.047U_0402_16V7K~D

.047U_0402_16V7K~D

2

C918

C918

22U_1210_25V6K~D

22U_1210_25V6K~D

1

SUB_FB_L2

C988

C988

1 2

2

1

SPK_CD_L1

1 2

C911

C911

1U_0603_10V6K~D

1U_0603_10V6K~D

PC_BEEP

SPK_CD_R SPK_CD_R4

PC_BEEP PC_BEEP_2

R1.0 add

PC_BEEP_1

1 2

C908 0.1U_0402_10V6K~DC908 0.1U_0402_10V6K~D

1 2

C915

C915

1U_0603_10V6K~D

1U_0603_10V6K~D

1 2

C912 0. 1U_0402_10V6K~DC912 0.1U_0402_10V6K~D

D51

D51

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

R1567

R1567

1 2

330K_0402_5%

330K_0402_5%

R1.0 Modify

C979

C979

SUB_FB_L SUB_FB_L1

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

SUB_CD_R

1 2

C973 0. 47U_0603_10V7K~DC973 0. 47U_0603_10V7K~D

C972 0.47U_0603_10V7K~DC972 0.47U_0603_10V7K~D

1 2

SUB_CD_L

1 2

10K_0402_1%

10K_0402_1%

9.09K_0402_1%

9.09K_0402_1%

9.09K_0402_1%

9.09K_0402_1%

High-Pass Filiter,fc=100 Hz, 500Hz, Av=1.45V/V

A A

5

4

2

C903

C903
22U_1210_25V6K~D

22U_1210_25V6K~D

1

R900

SPK_CD_L2

1 2

R904 17.8K_0402_1%R904 17.8K_0402_1%

SPK_CD_R2

C913

C913

2200P_0402_25V7K~D

2200P_0402_25V7K~D

1 2

1 2

R909 17.8K_0402_1%R909 17.8 K_0402_1%

R900

1 2

11K_0402_1%

11K_0402_1%

C909

C909

2200P_0402_25V7K~D

2200P_0402_25V7K~D

1 2

R905

R905

1 2

11K_0402_1%

11K_0402_1%

SPK_CD_R3SPK_CD_R1

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

1

C904

C904

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

SPKER_CD_L2_FBL

C910

C910

1 2

SPK_CD_R2_FBL

C914

C914

1 2

+3VS

For filterless
modualation/spread-spectrum mode

1

C905

C905

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

R902

R902

1 2

182K_0402_1%

182K_0402_1%

SPK_CD_L4SPK_CD_L3SPK_CD_L

R907

R907

1 2

182K_0402_1%

182K_0402_1%

SPK_AMP_MUTE#
SPK_AMP_MUTE_R#

R910 0_0402_5%R910 0_0402_5%

1 2

Mono Select. Set MONO high for mono mode.

Internal Regulator Output.
Internal 2V Bias.

C925

1U_0603_25V6-K~D

C925

1U_0603_25V6-K~D

C923

1U_0603_25V6-K~D

C923

1U_0603_25V6-K~D

1

2

2

C916

C916

22U_1210_25V6K~D

22U_1210_25V6K~D

1

R1023

R1023

1 2

11.5K_0402_1%

11.5K_0402_1%

C989

C989

SUB_FB_L3

1 2

.047U_0402_16V7K~D

.047U_0402_16V7K~D

R1017

R1017
20K_0402_1%

20K_0402_1%

1 2

1 2

15.8K_0402_1%

15.8K_0402_1%

C981

C981
.1U_0402_16V7K~D

.1U_0402_16V7K~D

For filterless modualation/spread-spectrum mode

R1027

R1027

1 2

6.49K_0402_1%

6.49K_0402_1%

R1025

R1025

SUB_CD_R2SU B_CD_R1SPK_CD_R

SUB_AMP_MUTE#25

+3VS

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1

1

C975

C975

2

2

4

C926

1U_0603_25V6-K~D

C926

1U_0603_25V6-K~D

1

1

2

2

1

C970

C970

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

SUB_FB_L4

R1024

R1024

1 2

100K_0402_1%

100K_0402_1%

SUB_IN_L

SUB_FB_L

1 2

C976 0.01U_0402_16V7K~ DC976 0.01U_0402_16V7K~D

SUB_IN_R

SUB_AMP_MUTE#

R994 0_0402_5%R994 0_0402_5%

1 2

Internal Regulator Output.

Internal 2V Bias.

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1U_0603_25V6-K~D

C969

C969

1

C971

C971

1

C983

C983

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

2

1

2

1

2

C924

C924

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

C980

C980

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

3

U13

U13

27

PVDD1

30

PVDD2

28

PGND2

29

PGND1

5

FB_L

6

IN_L

19

FB_R

18

IN_R

10

SHDN#

11

REGEN

9

MUTE#

20

MODE

4

MONO

16

VS

15

REG

12

COM

21

C1N

22

C1P

13

AGND

14

AGND

MAX9736AETJ+T_TQFN32_7X7

MAX9736AETJ+T_TQFN32_7X7

U14

U14

27

PVDD1

30

PVDD2

28

PGND2

29

PGND1

5

FB_L

6

IN_L

19

FB_R

18

IN_R

10

SHDN#

11

REGEN

9

MUTE#

20

MODE

4

MONO

16

VS

15

REG

12

COM

21

C1N

22

C1P

13

AGND

14

AGND

MAX9736AETJ+T_TQFN32_7X7

MAX9736AETJ+T_TQFN32_7X7

3

OUTL-1
OUTL-2

OUTL+1
OUTL+2

OUTR+1
OUTR+2

OUTR-1
OUTR-2

BOOT

OUTL-1
OUTL-2

OUTL+1
OUTL+2

OUTR+1
OUTR+2

OUTR-1
OUTR-2

L67

L67
BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1 2

L68

L68
BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1 2

L69

L69

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

AMP_SPKR+

1 2

L70

L70
BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

AMP_SPKR-

1 2

C922

C922

1U_0805_25V4Z~D

1U_0805_25V4Z~D

12

AMP_SW-

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

AMP_SW+ AMP_SW_JK+

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

AMP_SW+

AMP_SW-

C974

C974

12

1U_0805_25V4Z~D

1U_0805_25V4Z~D

NC1
NC2
NC3

BOOT

1
2

31
32

7
8
17

25
26

23
24

3

33

EP

1
2

31
32

7

NC1

8

NC2

17

NC3

25
26

23
24

3

33

EP

2

AMP_SPK_JK_L-AMP_SPKL-

1

C906

C906
330P_0402_50V7K~D

330P_0402_50V7K~D

2

AMP_SPKL+_LAMP_SPK L+

22UH_LQH55PN220MR0L_0.85A_20%~D

22UH_LQH55PN220MR0L_0.85A_20%~D

1

C907

C907
330P_0402_50V7K~D

330P_0402_50V7K~D

2

AMP_SPKR+_R

1

C917

C917
330P_0402_50V7K~D

330P_0402_50V7K~D

2

1 2

22UH_LQH55PN220MR0L_0.85A_20%~D

22UH_LQH55PN220MR0L_0.85A_20%~D

L79

L79

1 2

L80

L80

AMP_SPK_JK_L+

AMP_SPK_JK_R+

Speaker amp impedance of JBL is 4 ohm.

1

Speaker Connector

JSPK1

D21

D21

JSPK1

1

1

2

2

3

3

G5

4

4

G6

MOLEX_53261-0471

MOLEX_53261-0471

CONN@

CONN@

5
6

AMP_SPK_JK_R-

1

C921

C921
330P_0402_50V7K~D

330P_0402_50V7K~D

2

L65

L65

L66

L66

AMP_SW_JK-

1

C892

C892
330P_0402_50V7K~D

330P_0402_50V7K~D

2

1

C894

C894
330P_0402_50V7K~D

330P_0402_50V7K~D

2

AMP_SPK_JK_L­AMP_SPK_JK_L+
AMP_SPK_JK_R­AMP_SPK_JK_R+

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

15 mils trace

3

D20

D20

1

JWFER1

JWFER1

1

1

2

2

3

G1

4

G2

MOLEX_53398-0271~D

MOLEX_53398-0271~D

2

3

2

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

1

SUB WOOFER amp impedance of JBL is 4 ohm.

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Speaker / Subwoofer

Speaker / Subwoofer

Speaker / Subwoofer

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

26 60Friday, June 12, 2009

26 60Friday, June 12, 2009

26 60Friday, June 12, 2009

1

R10 (A00)

A

+3VS

WWAN

1 1

2 2

EC_TX_P80_DATA31

EC_RX_P80_CLK31

1

2

47P_0402_50V8J~D

47P_0402_50V8J~D

@

@

C1513

C1513

C403

0.01U_0402_16V7K~D

C403

0.01U_0402_16V7K~D

1

2

R1.0 Modify

R1010 0_0402_5%@R1010 0_0402_5%@

1 2

R1011 0_0402_5%@R1011 0_0402_5%@

1 2

C404

.1U_0402_16V7K~D

C404

.1U_0402_16V7K~D

C405

4.7U_0805_10V4Z~D

C405

4.7U_0805_10V4Z~D

1

2

1

1

+

2

2

+3VS

C956

330U_D2E_6.3VM_R25~D+C956

330U_D2E_6.3VM_R25~D

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

B

+1.5VS

47P_0402_50V8J~D

47P_0402_50V8J~D

1

@

@

C1514

C1514

2

JWWAN 1

JWWAN 1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

TYCO_1775838-1~D

TYCO_1775838-1~D

C407

0.01U_0402_16V7K~D

C407

0.01U_0402_16V7K~D

1

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1

2

+1.5VS +3VS

C408

C408

C409

4.7U_0805_10V4Z~D

C409

4.7U_0805_10V4Z~D

1

2

+UIM_PWR

UIM_DATA
UIM_CLK
UIM_RST

R285 0_0402_5%@R285 0_0402_5%@

1 2

WWAN_RA DIO_OFF#
PCI_RST#

R911 0_0402_5%R911 0_0402_5%

1 2

R912 0_0402_5%R912 0_0402_5%

1 2

USBP5_D­USBP5_D+

USBP5_D+

USBP5_D-

R1.0 Modify

R1.0 Modify

R913 0_0402_5%@R913 0_0402_5%@

1 2

R914 0_0402_5%@R914 0_0402_5%@

1 2

C

UIM_VPP

WWAN_RA DIO_OFF# 31
PCI_RST# 20,24 ,28

EC_SMB_CK2 7,28,31,39
EC_SMB_DA2 7,28,31,39

R1.0 Modify

USBP5+ 22

USBP5- 22

C410

C410

33P_0402_50V8J~D

33P_0402_50V8J~D

D

D41

D41

1

2

3

SRV05-4.TCT_SOT23-6~D

SRV05-4.TCT_SOT23-6~D

JSIM1

JSIM1

5

GND

6

VPP

7

I/O

8

NC

9

GND

10

GND

MOLEX_475531001

MOLEX_475531001

CONN@

CONN@

Link ok

VCC
RST
CLK

6

5

4

1
2
3
4

NC

Place as close as JSIM1

UIM_RSTUIM_VPP
UIM_CLKUIM_DATA

C411

C411
33P_0402_50V8J~D

33P_0402_50V8J~D

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

+UIM_PWR

C412

C412

E

1

2

1

C413

C413
.1U_0402_16V7K~D

.1U_0402_16V7K~D

2

WLAN

ICH_PCIE_WAKE#21, 24,28,31

R1.0 Modify

COEX2_WLAN_ACTIVE28, 30

CLK_DEBUG_PORT6

PCIE_IRX_WLANTX_N222
PCIE_IRX_WLANTX_P222

PCIE_ITX_C_WLANRX_N222
PCIE_ITX_C_WLANRX_P222

WLAN_CLKREQ#6

CLK_PCIE_WLAN#6
CLK_PCIE_WLAN6

PLT_RST#11,20,30,31 ,38

2

3

BAT54C-7-F_SOT23~D

BAT54C-7-F_SOT23~D

3 3

R1.0 Modify

WPAN_ACTIVE28

BT_ACTIVE30

4 4

WPAN_ACTIVE

BT_ACTIVE

D40

D40

COEX1_WLAN_ACTIVE
WLAN_CLKREQ#

CLK_PCIE_WLAN#
CLK_PCIE_WLAN

PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2

PCIE_ITX_C_WLANRX_N2
PCIE_ITX_C_WLANRX_P2

COEX1_WLAN_ACTIVE

1

R291 0_0402_5%@R291 0_0402 _5%@

1 2

R918 0_0402_5%@R918 0_0402 _5%@

1 2

R921 0_0402_5%@R921 0_0402 _5%@

1 2

12

R997

R997
10K_0402_5%

10K_0402_5%

ICH_PCIE_WAKE#

+3V_WLAN +1.5VS +3V_WLAN

JWLAN1

JWLAN1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

TYCO_1775838-1~D

TYCO_1775838-1~D

GND2

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

WLAN_RADIO_OFF#

USBP4_D­USBP4_D+

USBP4_D+

USBP4_D-

R1.0 Modify

R919 0_040 2_5%@R919 0_0402_5%@

1 2

R920 0_040 2_5%@R920 0_0402_5%@

1 2

R915 0_040 2_5%@R915 0_0402_5%@

1 2

R916 0_040 2_5%@R916 0_0402_5%@

1 2

R917 0_040 2_5%@R917 0_0402_5%@

1 2

WLAN_RADIO_OFF# 31
PCI_RST# 20,24 ,28

R922 0_0402_5%@R922 0_0402 _5%@

1 2

R923 0_0402_5%@R923 0_0402 _5%@

1 2

R924 0_040 2_5%@R924 0_0402_5%@

1 2

R925 0_040 2_5%@R925 0_0402_5%@

1 2

R1.0 Modify

R1.0 Modify

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

EC_SMB_CK2 7,28,31,39
EC_SMB_DA2 7,28,31,39

USBP4+ 22

USBP4- 22

LPC_FRAME# 19,31

LPC_AD[0..3] 19,31

+3V_WLAN

47P_0402_50V8J~D

47P_0402_50V8J~D

1

2

+1.5VS

47P_0402_50V8J~D

47P_0402_50V8J~D

1

2

C414

0.01U_0402_16V7K~D

C414

0.01U_0402_16V7K~D

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1

1

@

@

C1515

C1515

2

2

C417

0.01U_0402_16V7K~D

C417

0.01U_0402_16V7K~D

1

@

@

C1516

C1516

1

2

2

1 2

C415

C415

C416

4.7U_0805_10V4Z~D

C416

4.7U_0805_10V4Z~D

1

2

C418

0.01U_0402_16V7K~D

C418

0.01U_0402_16V7K~D

+3VS

JP1@ JP1@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Mini Card_WLAN/WWAN

Mini Card_WLAN/WWAN

Mini Card_WLAN/WWAN

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

27 60Friday, June 12, 2009

27 60Friday, June 12, 2009

27 60Friday, June 12, 2009

E

R10 (A00)

5

4

3

2

1

+1.5VS

0.047U_0402_16V4Z~D

D D

ICH_PCIE_WAKE#21,24,27,31

COEX2_WLAN_ACTIVE27, 30

WPAN_ACTIVE27

WPAN_CLKREQ#6

CLK_PCIE_WPAN#6
CLK_PCIE_WPAN6

PCIE_IRX_WPANTX _N322
PCIE_IRX_WPANTX_P322

PCIE_ITX_C_WPA NRX_N322
PCIE_ITX_C_WPANRX_P322

C C

R10 Moidify (short directly)

R292 0_0402_5%@R292 0_0402_5%@

1 2

R293 0_0402_5%@R293 0_0402_5%@

1 2

ICH_PCIE_WAKE#

WPAN_ACTIVE_R

CLK_PCIE_WPAN#
CLK_PCIE_WPAN

PCIE_IRX_WPANTX _N3
PCIE_IRX_WPANTX_P3

PCIE_ITX_C_WPA NRX_N3
PCIE_ITX_C_WPANRX_P3

WPAN Card

JWPAN1

JWPAN1

1
3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

TYCO_1775838-1~D

TYCO_1775838-1~D

CONN@

CONN@

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

GND1

GND2

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

+1.5VS

+3VS+3V S

WPAN_RADIO_OFF#
PCI_RST#

USBP6_D­USBP6_D+

R294 0_0402_5%@R294 0_0402_5%@

1 2

R298 0_0402_5%@R298 0_0402_5%@

1 2

R295 0_0402_5%@R295 0_0402_5%@
R296 0_0402_5%@R296 0_0402_5%@

WPAN_RADIO_OFF# 31

PCI_RST# 20,24,27

12
12

EC_SMB_CK2 7,27,31,39
EC_SMB_DA2 7,27,31,39

USBP6- 22

USBP6+ 22

R10 Moidify (short directly)

0.047U_0402_16V4Z~D

1

2

+3VS

C419

C419

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

2

C421

0.047U_0402_16V4Z~D

C421

0.047U_0402_16V4Z~D

C420

C420

1

2

C423

0.1U_0402_16V4Z~D

C423

0.1U_0402_16V4Z~D

C424

0.1U_0402_16V4Z~D

C424

0.1U_0402_16V4Z~D

C425

4.7U_0603_6.3V6M~D

C425

C422

0.047U_0402_16V4Z~D

C422

0.047U_0402_16V4Z~D

1

1

2

2

4.7U_0603_6.3V6M~D

1

1

2

2

Express Card Power
Switch

+3VS

+3VALW

B B

A A

5

+1.5VS

C432

0.1U_0402_16V4Z~D

C432

0.1U_0402_16V4Z~D

C431

0.1U_0402_16V4Z~D

C431

0.1U_0402_16V4Z~D

C433

0.1U_0402_16V4Z~D

C433

0.1U_0402_16V4Z~D

1

2

PCI_RST#20,24,27

SYSON31,33,49

SUSP#31,33,48,49,50

1

1

2

2

PCI_RST#

CPPE#

EXPR_CPUSB#

+1.5V_CARD Max. 650mA , Average 500mA
+3V_CARD Max. 1300mA, Average 1000mA

U16

U16

2

3.3Vin

17

3.3Vin

AUX_IN12AUX_OUT

6

SYSRST#

20

SHDNZ

1

STBYZ

10

CPPE#

9

CPUSB#

18

RCLKEN

P2231NL E2_QFN20_4X4

P2231NL E2_QFN20_4X4

4

3.3Vout

3.3Vout

PERSTZ

GND

3
15

11

19

OCZ

PERST#

8

4

NC

5

NC

13

NC

14

NC

16

NC

7

(1A)

(0.5A)

+3VS_CARD

C429

0.1U_0402_16V4Z~D

C429

0.1U_0402_16V4Z~D

1

2

C434

0.1U_0402_16V4Z~D

C434

0.1U_0402_16V4Z~D

1

2

+1.5VS_CARD

C427

0.1U_0402_16V4Z~D

C427

0.1U_0402_16V4Z~D

1

2

C430

4.7U_0805_10V4Z~D

C430

4.7U_0805_10V4Z~D

1

2

+3VS_CARD_AUX

C435

4.7U_0805_10V4Z~D

C435

4.7U_0805_10V4Z~D

1

2

C428

4.7U_0805_10V4Z~D

C428

4.7U_0805_10V4Z~D

1

2

Express Card

+1.5VS_CARD

+3VS_CARD

USBP7­USBP7+
EXPR_CPUSB#

EC_SMB_CK2
EC_SMB_DA2

PERST#

EXP_CLKREQ#
CPPE#
CLK_PCIE_EXPR#
CLK_PCIE_EXPR

PCIE_IRX_EXPTX_N5
PCIE_IRX_EXPTX_P5

PCIE_ITX_C_EXPRX_N5
PCIE_ITX_C_EXPRX_P5

2

USBP7-22
USBP7+22

EC_SMB_CK27,27,31,39
EC_SMB_DA27,27,31,39

ICH_PCIE_WAKE#21,24,27,31

+3VS_CARD_AUX

EXP_CLKREQ#6

CLK_PCIE_EXPR#6
CLK_PCIE_EXPR6

PCIE_IRX_EXPTX_N522
PCIE_IRX_EXPTX_P522

PCIE_ITX_C_EXPRX_N522
PCIE_ITX_C_EXPRX_P522

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

JEXP1

JEXP1

1

GND

2

USB-

3

USB+

4

CPUSB#

5

REV

6

REV

7

SMBCLK

8

SMBDATE

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

G1

28

G2

29

G3

30

G4

TAITW_PXPXA E-000LBS2ZZ4N0_NR

TAITW_PXPXA E-000LBS2ZZ4N0_NR

CONN@

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

WPAN / Express Card

WPAN / Express Card

WPAN / Express Card

LA-5151P

LA-5151P

LA-5151P

1

R10 (A00)

R10 (A00)

28 60Friday, June 12, 2009

28 60Friday, June 12, 2009

28 60Friday, June 12, 2009

R10 (A00)

A

Output Swing Control

SEL2_ [A:B]

0

* *

1

1 1

SATA_ITX_C_DRX_P419
SATA_ITX_C_DRX_N419

SATA_IRX_DTX_P419

SATA_IRX_DTX_N419

+1.8VS

R965 10K_0402_1%R965 10K_0402_1%
R967 10K_0402_1%R967 10K_0402_1%

+1.8VS

R954 0_0402_5%R954 0_0402_5%
R955 0_0402_5%R955 0_0402_5%

R956 0_0402_5%@R956 0_0402_5%@
R957 0_0402_5%@R957 0_0402_5%@

R958 0_0402_5%R958 0_0402_5%
R959 0_0402_5%R959 0_0402_5%

R961 0_0402_5%R961 0_0402_5%

1 2
1 2

R968 470_0402_5%@ R968 470_0402_5%@

Swing

SATA_ITX_C_DRX_P4
SATA_ITX_C_DRX_N4

SATA_IRX_C_DTX_P4

1 2

C942 0. 01U_0402_16V7K~DC942 0.01U_0402_16V7K~ D

SATA_IRX_C_DTX_N4

1 2

C943 0. 01U_0402_16V7K~DC943 0.01U_0402_16V7K~ D

1 2
1 2

1 2
1 2

1 2
1 2

1 2

R963 0_0402_5%R963 0_0402_5%

1 2

USB_DETECT

1 2

R969 0_0402_5%@R9 69 0_0402_5%@

1 2

R970 0_0402_5%@R9 70 0_0402_5%@

1 2

A00 depop

2 2

USB_DETECT#

2

G

G

A00 change to SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P)

USB_DETECT

13

D

D

Q48

@

Q48

@

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

SATA HDD (On board)

SATA_ITX_C_DRX_P119
SATA_ITX_C_DRX_N119

SATA_IRX_DTX_N119
SATA_IRX_DTX_P119

3 3

C442 0.01U_0402_25V7K~DC442 0.01U_0402_25V7K~ D

12

C443 0.01U_0402_25V7K~DC443 0.01U_0402_25V7K~ D

12

Output De-emphasis Adjustment

1x

1.2x

SEL3_ [A:B]

0

1

U40

U40

2

AI+

3

AI-

7

BO+

8

BO-

34

SEL0_A

13

SEL0_B

33

SEL1_A

14

SEL1_B

32

SEL2_A

15

SEL2_B

31

SEL3_A

16

SEL3_B

30

EN_A

29

EN_B

19

IREF

11

CLKIN+

12

CLKIN-

PI2EQX3201BZFEX_TQFN36_6X5

PI2EQX3201BZFEX_TQFN36_6X5

SEL0_ [A:B] SEL1_ [A:B]

0 0

0 1

*

1
1 1

SATA_ITX_C_DRX_P1
SATA_ITX_C_DRX_N1

SATA_IRX_C_DTX_N1
SATA_IRX_C_DTX_P1

+5VS

De-emphasis

MOLEX_47662-2000

MOLEX_47662-2000

SATA ODD CONN

SATA_ITX_C_DRX_P519
SATA_ITX_C_DRX_N519

SATA_IRX_DTX_N519
SATA_IRX_DTX_P519

4 4

SATA_ITX_C_DRX_P5
SATA_ITX_C_DRX_N5

C437 0.01U_0402_16V7K~DC437 0.01U_0402_16V 7K~D

1 2

C436 0.01U_0402_16V7K~DC436 0.01U_0402_16V 7K~D

1 2

A

SATA_IRX_C_DTX_N5
SATA_IRX_C_DTX_P5

+5VS

B

+1.8VS

0dB

-3.5dB

1

VDD

6

VDD

10

VDD

23

VDD

28

VDD

5

AVDD

27

AO+

26

AO-

21

BI-

22

BI+

17

OUT+

18

OUT-

36

SD_A

35

SD_B

25

GND

20

GND

9

GND

4

GND

24

AGND

37

PAD

Equalizer Selection

Compliance Channel

1

2

ESATA_ITX_DRX_P4
ESATA_ITX_DRX_N4

ESATA_IRX_DTX_N4
ESATA_IRX_DTX_P4

R960 0_0402_5%@R960 0_0402_5%@

1 2

R962 0_0402_5%@R962 0_0402_5%@

1 2

R964 0_0402_5%@R964 0_0402_5%@

1 2

R966 0_0402_5%@R966 0_0402_5%@

1 2

no equalization

[0:2.5dB] @ 1.6 GHz

0

[2.5:4.5dB] @ 1.6 GHz

[4.5:6.5dB] @ 1.6 GHz

JSATA1

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

CONN@

CONN@

JODD1

JODD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

V5

10

V5

11

MD

12

GND

13

GND

MOLEX_47639-3000_13P

MOLEX_47639-3000_13P

CONN@

CONN@

GND
GND
GND

B

23
24
25

14

G1

15

G2

16

G3

C935

10U_0805_10V4Z~D

C935

10U_0805_10V4Z~D

1

2

C936

0.1U_0402_16V4Z~D

C936

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C937

0.1U_0402_16V4Z~D

C937

0.1U_0402_16V4Z~D

1

1

2

2

12

C941 4700P_0402_25V7K~DC941 4700P_0402_25V7K~D

12

R953

R953
390_0402_5%

390_0402_5%

12

C944 4700P_0402_25V7K~ DC944 4700P_0402_25V7K~D

1

2

3

Place close JESA1

+5VS

Close to JSATA1.

C445

10U_0805_10V4Z~D

C445

10U_0805_10V4Z~D

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1

1

2

2

+5VS

C438

10U_0805_10V4Z~D

C438

10U_0805_10V4Z~D

1U_0603_10V4Z~D

1U_0603_10V4Z~D

1

1

2

2

Close to ODD Conn

C938

C938

C939

0.1U_0402_16V4Z~D

C939

0.1U_0402_16V4Z~D

C940

0.1U_0402_16V4Z~D

C940

0.1U_0402_16V4Z~D

1

1

2

2

ESATA_ITX_C_DRX_P4

ESATA_ITX_C_DRX_N4

D34

D34

CH4

CH1

Vp

Vn

CH3

CH2

CM1293-04SO_SOT23-6@

CM1293-04SO_SOT23-6@

C446

C446

C447

.1U_0402_16V7K~D

C447

.1U_0402_16V7K~D

1

2

C439

C439

C440

0.1U_0402_16V4Z~D

C440

0.1U_0402_16V4Z~D

1

1

2

2

C

+5VALW

PWRSHARE_EN#31

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+5V_CHGUSB

R301

R301

43.2K_0402_1%

43.2K_0402_1%

R304

R304

49.9K_0402_1%

49.9K_0402_1%

USBP0_D-

4

5

+5V_CHGUSB

USBP0_D+

6

C448

1000P_0402_50V7K~D

C448

1000P_0402_50V7K~D

1

2

C441

1000P_0402_50V7K~D

C441

1000P_0402_50V7K~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

+5V_CHGUSB

SATA_ITX_C_DRX_P019
SATA_ITX_C_DRX_N019

SATA_IRX_DTX_N019
SATA_IRX_DTX_P019

1

C462

C462

2

R302

75K_0402_1%

R302

75K_0402_1%

1 2

1 2

1 2

1

2

ESATA_IRX_DTX_N4

ESATA_IRX_DTX_P4

USB_CHARGE_D+

USB_CHARGE_D- USBP0_D-

R305

R305

49.9K_0402_1%

49.9K_0402_1%

1 2

+

+

C460

C460
150U_D2_6.3VM~D

150U_D2_6.3VM~D

C464 4700P_0402_25V7K~DC464 4700P_0402_25V7K~D

C465 4700P_0402_25V7K~DC465 4700P_0402_25V7K~D

USB_DETECT#32

SATA HDD

C449 0.01U_0402_25V7K~DC449 0.01U_0402_25V7K~ D
C450 0.01U_0402_25V7K~DC450 0.01U_0402_25V7K~ D

1

C463

C463
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

USBP0+22

USBP0-22

1

2

ESATA_IRX_C_DTX_N4

12

ESATA_IRX_C_DTX_P4

12

12
12

U17

U17

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

TPS2062ADR_SO8~D

C461

C461

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

USBP0_D­USBP0_D+

ESATA_ITX_C_DRX_P4
ESATA_ITX_C_DRX_N4

USB_DETECT#

D

+5V_CHGUSB

8

OC1#

7

OUT1

6

OUT2

5

OC2#

U18

U18

1

2

3

4

TS3USB221RSER_QFN10_2x1P5~D

TS3USB221RSER_QFN10_2x1P5~D

1D+

1D-

2D+

2D-

GND5OE#

VCC

S

D+

D-

ESATA

JESA1

JESA1

USB

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

ESATA

7

A-

8

GND

GND

9

B-

GND

10

B+

GND

11

GND

GND

12

DET1

13

DET2

FOX_3Q3813C-RB1C3B-7F

FOX_3Q3813C-RB1C3B-7F

CONN@

CONN@

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

SATA_IRX_C_DTX_N0
SATA_IRX_C_DTX_P0

+5VS

D

E

ESATA_USB_OC#

10

9

8

7

6

C466

C466

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

+3VALW

PWRSHARE_OE#

USBP0_D+

ESATA_USB_OC# 22

12

PWRSHARE_OE# 31

R303

R303
100K_0402_5%

100K_0402_5%

S Logic"1" Work from BKT

S Function

OE#

H

X

Disconnect

D=1D

L

14
15
16
17

JSATA2

JSATA2

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21

12V

22

12V

TYCO_1770615-3~D

TYCO_1770615-3~D

CONN@

CONN@

GND1
GND2

L
H

23
24

L

+5VS

1

2

D=2D

Close to JSATA2.

C452

10U_0805_10V4Z~D

C452

10U_0805_10V4Z~D

C453

.1U_0402_16V7K~D

C453

.1U_0402_16V7K~D

1

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ODD / SATA CONN

ODD / SATA CONN

ODD / SATA CONN

LA-5151P

LA-5151P

LA-5151P

E

C454

.1U_0402_16V7K~D

C454

.1U_0402_16V7K~D

C455

1000P_0402_50V7K~D

C455

1000P_0402_50V7K~D

1

1

2

2

R10 (A00)

R10 (A00)

29 60Friday, June 12, 2009

29 60Friday, June 12, 2009

29 60Friday, June 12, 2009

R10 (A00)

D35

D35

USBP_P11

1

CH1

2

Vn

USBP_N11

3

CH2

CM1293-04SO_SOT23-6@

CM1293-04SO_SOT23-6@

Place close JCAM1

USBP11+22
USBP11-22

DMIC_CLK25

DMIC025

Layout note: Pin5 thru
individual via to GND layer

DMIC_CLK

4

CH4

5

+3VS

Vp

DMIC0

6

CH3

R10 Moidify (short directly)

R297 0_0402_5%@R297 0_0402_5%@

USBP11-

R299 0_0402_5%@R299 0_0402_5%@
L28 BLM18BB221SN1D_2P~DL28 BL M18BB221SN1D_2P~D

+3VS

Bluetooth

JBT1

JCAM1

JCAM1

USBP_P11USBP11+

12
12
12

DMIC_CLK

DMIC0

@

@

100P_0402_50V8J~D@C459

100P_0402_50V8J~D

C458

100P_0402_50V8J~D@C458

100P_0402_50V8J~D

1

1

2

2

USBP_N11

C459

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

GND

9

GND

MOLEX_48227-0701

MOLEX_48227-0701

CONN@

CONN@

BT_DET#31

COEX2_WLAN_ACTIVE27, 28

BT_OFF#31

BT_RADIO_OFF#31

BT_DET# BT_ACTIVE
COEX2_WLAN_ACTIVE
BT_OFF# USBP10 +
BT_RADIO_OFF# USBP 10-

BT_ACTIVE

R995

R995
10K_0402_5%

10K_0402_5%

@

@

1 2

JBT1

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

GND15GND

HRS_DF12(3.0)-14DP-0.5V(86)~D

HRS_DF12(3.0)-14DP-0.5V(86)~D

CONN@

CONN@

USBP10-

USBP10+

1

2

@

C456

47P_0402_50V8J~D@C456

47P_0402_50V8J~D

BT_ACTIVE 27

+3VS

USBP10+ 22
USBP10- 22

@

C457

47P_0402_50V8J~D@C457

47P_0402_50V8J~D

1

2

Cardreader Connector

USB_EN#31

USB_OC1#22

USBP1+22
USBP1-22

+5VALW

+3VS

PCIE_ITX_C_CBRX_P422
PCIE_ITX_C_CBRX_N422

PCIE_IRX_CBTX_P422
PCIE_IRX_CBTX_N422

CLK_PCIE_CB6
CLK_PCIE_CB#6

CB_CLKREQ#6

PLT_RST#11,20,27,31,38

PCIE_ITX_C_CBRX_P4
PCIE_ITX_C_CBRX_N4

PCIE_IRX_CBTX_P4
PCIE_IRX_CBTX_N4

CLK_PCIE_CB
CLK_PCIE_CB#

CB_CLKREQ#
PLT_RST#

JCARD1

JCARD1

30

34

30

G4

29

33

29

G3

28

32

28

G2

27

31

27

G1

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

FOX_GS12301-1011A-9F~D

FOX_GS12301-1011A-9F~D

CONN@

CONN@

to Single USB board

+5VALW

JSUSB1

JSUSB1

1

1

2

2

3

3

USBP2-22
USBP2+22

USB_EN#31

USB_OC2#22
BATT_CHG_LED#31
BATT_LOW_LED#31

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

G1

12

G2

FCI_10089709-010010-LF

FCI_10089709-010010-LF

CONN@

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

USB / ESATA / BT / CAMARA

USB / ESATA / BT / CAMARA

USB / ESATA / BT / CAMARA

LA-5151P

LA-5151P

LA-5151P

30 60Friday, June 12, 2009

30 60Friday, June 12, 2009

30 60Friday, June 12, 2009

R10 (A00)

R10 (A00)

R10 (A00)

+3VALW

R306 10K_0402_5%R306 10K_0402_5%

R307 470_0402_5%R307 470_0402_5%

1 2

R926 10K_0402_5%R926 10K_0402_5%

R314 2.2K_0402_5%R314 2.2K_0402_5%

R315 2.2K_0402_5%R315 2.2K_0402_5%

R324 10K_0402_5%R324 10K_0402_5%

1 2

R308 470_0402_5%R308 470_0402_5%

1 2

R309 470_0402_5%R309 470_0402_5%

1 2

For ENE strape pin

+3VS

R317 2.2K_0402_5%R317 2.2K_0402_5%

R318 2.2K_0402_5%R318 2.2K_0402_5%

R319 4.7K_0402_5%@R319 4.7K_0402_5%@

R320 4.7K_0402_5%R320 4.7K_0402_5%

R339 4.7K_0402_5%R339 4.7K_0402_5%

R342 4.7K_0402_5%R342 4.7K_0402_5%

+5VS

R325 4.7K_0402_5%R325 4.7K_0402_5%

R326 4.7K_0402_5%R326 4.7K_0402_5%

R948 200K_0402_5%R948 200K_0402_5%

12

12

12

12

1 2

EC Adam_Yang request

ICH_PCIE_WAKE#21,24,27,28

CLK_PCI_EC

12

R327

@ R327

@

10_0402_5%

10_0402_5%

1

C478

@C478

@

15P_0402_50V8J~D

15P_0402_50V8J~D

2

12

12

12

12

12

12

12

12

PCIE_PME#

EC_RST#

C475 0.1U_0402_16V4Z~DC475 0.1U_0402_16V4Z~D

12

EN_KBL#

EC_SMB_DA1

EC_SMB_CK1

MSEN#

KSO2

KSO1

EC_SMB_DA2

EC_SMB_CK2

LCD_TST

BT_RADIO_OFF#

EC_FB_SCLK

EC_FB_SDATA

TP_DATA

TP_CLK

KSO5

R977 0_0402_5%R977 0_0402_5%

C479

22P_0402_50V8J~D

C479

22P_0402_50V8J~D

32.768KHZ_12.5PF_QTFM28-32768K1

32.768KHZ_12.5PF_QTFM28-32768K1

1 2

R328

R328

1 2

20M_0603_5%@

20M_0603_5%@

Y5

Y5

1

2

+3VALW

C472

1000P_0402_50V7K~D

C472

1000P_0402_50V7K~D

C471

1000P_0402_50V7K~D

C471

C467

0.1U_0402_16V4Z~D

C467

0.1U_0402_16V4Z~D

C468

0.1U_0402_16V4Z~D

C468

0.1U_0402_16V4Z~D

C469

0.1U_0402_16V4Z~D

C469

1

2

TOUCHKEY_TINT32

KSI[0..7]32

KSO[0..18]32

EC_SMB_CK152

EC_SMB_DA152

EC_SMB_CK27,27,28,39

EC_SMB_DA27,27,28,39

EC_FB_SCLK32

EC_FB_SDATA32

KB_BL_PWM#32

FAN_SPEED17

WLAN_RADIO_OFF#27

EC_TX_P80_DATA27

EC_RX_P80_CLK27

PWR_BTN_LED#32

XCLKIXCLKO

4

22P_0402_50V8J~D

22P_0402_50V8J~D

3

GG

GG

0.1U_0402_16V4Z~D

1

1

2

2

GATEA2019

KB_RST#19

SERIRQ21

LPC_FRAME#19,27

LPC_AD319,27
LPC_AD219,27
LPC_AD119,27
LPC_AD019,27

CLK_PCI_EC6

PLT_RST#11,20,27,30,38

EC_SCI#21

SLP_S3#21
SLP_S5#21
EC_SMI#21
LID_SW#32

ON_OFF32

EN_KBL#32

C481

C481

GATEA20
KB_RST#
SERIRQ
LPC_FRAME#LP C_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC
PLT_RST#

EC_RST#
EC_SCI#
TOUCHKEY_TINT

KSI[0..7]

KSO[0..18]

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

SLP_S3# EC_RSMRST#
SLP_S5#
EC_SMI# EC_ON
LID_SW# BT_RADIO_OFF#
EC_FB_SCLK

EC_FB_SDATA

PCIE_PME#
KB_BL_PWM#
FAN_SPEED1
WLAN_RADIO_OFF#
EC_TX_P80_DATA
EC_RX_P80_CLK
ON_OFF

PWR_BTN_LED#
EN_KBL#

XCLKI
XCLKO

C470

0.1U_0402_16V4Z~D

C470

0.1U_0402_16V4Z~D

1

2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14

KSO15
KSO16
KSO17
KSO18

1000P_0402_50V7K~D

1

1

2

2

U19

U19

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

KB926QFD3_LQFP128_14X14

KB926QFD3_LQFP128_14X14

Int. K/B

Int. K/B
Matrix

Matrix

9

VCC

PS2 Interface

PS2 Interface

SM Bus

SM Bus

22

33

VCC

GND

11

24

+EC_AVCC

67

96

111

125

VCC

VCC

VCC

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

PWM Ou tput

PWM Ou tput

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

DA Output

DA Output

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

GPIO

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03

EC_LID_OUT#/GPXO04

ICH_PWROK/GPXO06

GPO

GPO

GPIO

GPIO

PM_SLP_S4#/GPXID1

GPI

GPI

GND

GND

AGND

GND

GND

35

69

94

113

ECAGND

1000P_0402_50V7K~D

1000P_0402_50V7K~D

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C

PSDAT2/GPIO4D

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10
GPXO11

ENBKL/GPXID2

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

V18R

1

C473

C473

2

ECAGND

EC_PWM

21

BEEP#

23

PWRSHARE_EN#

26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64

ADP_I

65

AD_BID

66

MSEN#

75
76

EC_SUB_MUTE#

68

EN_DFAN1

70

IREF

71
72

LCD_TST

83

USB_EN#

84

VGA_ON

85

KSO5

86

TP_CLK

87

TP_DATA

88

WPAN_RADIO_OFF#

97

EN_WOL#

98

BT_OFF#

99

VGATE

109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

EC_SPK_HP_MUTE#

73
74

FSTCHG

89

BATT_CHG_LED#

90
91

BATT_LOW_LED#

92

BKLT_KB_DET#

93

SYSON

95

VR_ON

121

ACIN

127

100

EC_LID_OUT#

101
102
103

ICH_PWROK

104

BKOFF#

105

WWA N_RADIO_OFF#

106

LCD_VCC_TEST_EN

107

CP_SEL

108

SLP_S4#

110

EC_ENBKL

112

BT_DET#

114

EC_THERM#

115

SUSP#

116

PBTN_OUT#

117

PS_ID

118

C480 1U_0603_10V4Z~DC480 1U_0603_10V4Z~D

124

1 2

C482 0.1U_0402_16V4Z~DC482 0.1U_0402_16V4Z~D

D3 Version : P/N : SA00001J580

L29

L29
BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

L30

L30

TP_DATA 32

12

12

R333

R333

15_0402_5%

15_0402_5%

1 2

2

C474

C474

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

EC_PWM 35
BEEP# 25
PWRSHARE_EN# 29

ACOFF 46

C522 0.01U_0402_16V7K~DC522 0.01U_0402_16V7K~D

1 2

C476 0.01U_0402_16V7K~DC476 0.01U_0402_16V7K~D

1 2

BATT_TEMP 52
BATT_OVP 52
ADP_I 46

MSEN# 35

POW_MON 51

EC_SUB_MUTE# 25
EN_DFAN1 7
IREF 46
CHGVADJ 46

LCD_TST 35
USB_EN# 30
VGA_ON 50
KSO5 32
TP_CLK 32

WPAN_RADIO_OFF# 28
EN_WOL# 24

BT_OFF# 30
VGATE 11,21,51

EC_SPK_HP_MUTE# 25

USB_DET_DELAY# 32

FSTCHG 46
BATT_CHG_LED# 30
PWRSHARE_OE# 29
BATT_LOW_LED# 30

BKLT_KB_DET# 32
SYSON 28,33,49

VR_ON 7,39,51

ACIN 21,25,45,46

EC_RSMRST# 21
EC_LID_OUT# 21
EC_ON 32

BT_RADIO_OFF# 30
ICH_PWROK 11,21
BKOFF# 35
WWA N_RADIO_OFF# 27
LCD_VCC_TEST_EN 35
CP_SEL 46

SLP_S4# 11,21

BT_DET# 30
EC_THERM# 21
SUSP# 28,33,48,49,50
PBTN_OUT# 21

PS_ID 45

12

+3VALW+EC_AVCC

R10 modify

ECAGND
ECAGND

R10 modify

Place close to U19

SPI_CLK_R

1

C1517

@C1517

@

22P_0402_50V8J~D

22P_0402_50V8J~D

2

SPI_CLK_R

SPI Flash (16Mb*1)

R331

R331
15_0402_5%

FSEL#SPICS#

15_0402_5%

1 2

R332

R332
15_0402_5%

15_0402_5%

12

Board ID

+3VALW

R311

R311
100K_0402_5%

100K_0402_5%

Ra

1 2

AD_BID

1

C477

R312

R312
33K_0402_5%

33K_0402_5%

Rb

1 2

C477

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

VCC 3.3V+/-5% 0.6V~1.6V

Rb

0 +/- 5%

8.2K+/- 5%

18K +/- 5%

33K +/- 5%

56K +/- 1%

100K +/- 1%

EC_ENBKL

@C483

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

12

20mils

+SPI_R

U20

U20

1

CS#

2

SO

3

WP#

4

GND

MX25L1605AM2C-12G_SO8

MX25L1605AM2C-12G_SO8

100K

1 2

12

R383

R383
100K_0402_5%

100K_0402_5%

C483

12

R329

R329
10K_0402_5%

10K_0402_5%

12

VCC

HOLD#

SCLK

SI

R557

R557

0_0402_5%

0_0402_5%

8
7
6
5

0 V

0.250V

0.503V

0.819V

1.185V

1.650V

+3VALW

2

1

SPI_CLK_R

Ra

Board ID

0

1

2

3

*

4

5

Follow the suggestion of EC team to
follow JAT10 setting.

R330

@R330

@

0_0402_5%

0_0402_5%

SPI_CS#
SPI_SOFRD#SPI_SO

VGA_ENBKL 39

C484

C484

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

R334

R334

15_0402_5%

15_0402_5%

FWR#SPI_SISPI_SI

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

BIOS & EC I/O Port

BIOS & EC I/O Port

BIOS & EC I/O Port

LA-5151P

LA-5151P

LA-5151P

31 60Friday, June 12, 2009

31 60Friday, June 12, 2009

31 60Friday, June 12, 2009

R10 (A00)

R10 (A00)

R10 (A00)

A

B

C

D

E

Power Button Circuit INT_KB_Conn.1

To power board

R896

R896

200_0402_5%

200_0402_5%

PWR_LED+

1 2

+5VALW

PWR_BTN_LED#31

1 1

1

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

D30

D30

PWR_BTN_LED#
PWR_ON-OFF_BTN#

PWR_ON-OFF_BTN#

3

2

JPBTN1

JPBTN1

1

1

2

2

3

3

G5

4

4

G6

MOLEX_53261-0471

MOLEX_53261-0471

CONN@

CONN@

EC_ON31

PWR_ON-OFF_BTN#

EC_ON

5
6

BAT54C-7-F_SOT23~D

BAT54C-7-F_SOT23~D

12

R337

R337
10K_0402_5%

10K_0402_5%

1

1 2

0_0402_5%

0_0402_5%

Place close JPBTN1

RTCVREF RTCVRE F RTCVREFRTCVREF

D46

SDMK0340L-7-F_SOD323-2~D

D46

R1007

10K_0402_1%

R1007

10K_0402_1%

12

<BOM Structure>

2 2

USB_DETECT#29

<BOM Structure>

USB_DETECT#

C964

C964

12

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

12

R1008

220K_0402_1%

R1008

220K_0402_1%

TC7SZ14FU_SSOP5~D

TC7SZ14FU_SSOP5~D

SDMK0340L-7-F_SOD323-2~D

12

1

NC

2

A

G

U44

U44

3

D47

D47
SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

1

2

5

P

4

Y

100K_0402_5%

100K_0402_5%

12

C963

@C963

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

12

R1009

R1009

<BOM structure>

<BOM structure>

Power share

3 3

Keyboard back light

+5VS

Q38

Q38

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

1U_0603_10V6K~D

B+_BIAS

EN_KBL#31

4 4

2

G

G

1U_0603_10V6K~D

R928

300K_0402_5%

R928

300K_0402_5%

1 2

EN_KBL

13

D

D

Q40

Q40
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

A

C928

C928

D

D

6

S

1

2

S

2
1

G

G

3

2M_0402_5%

2M_0402_5%

1 2

45

20mil

R931

R931

1 2

0_0805_5%

0_0805_5%

R929

R929

+5VS_KBL

BKLT_KB_DET

12

BKLT_KB_DET

KB_BL_PWM

13

KB_BL_PWM#31

2

G

G

B

+3VALW

D11

D11

2

3

2

G

G

R336

R336

51ON#

13

D

D

Q44

Q44

2

G

G

2N7002_SOT23-3~D

2N7002_SOT23-3~D

S

S

USB_DET_DELAY#

2

G

G

20mil

R930

R930
100K_0402_5%

100K_0402_5%

+5VS_KBL

1
2
3

TYCO_2041084-4

TYCO_2041084-4

CONN@

CONN@

20mil

D

D

Q41

Q41

S

S

MMBF170LT1G_SOT23-3~D

MMBF170LT1G_SOT23-3~D

20mil

R335

R335
100K_0402_5%

100K_0402_5%

1 2

51ON#

13

D

D

Q6

Q6
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

51ON# 45

USB_DET_DELAY# 31

+3VS

12

R927

R927
10K_0402_5%

10K_0402_5%

<BOM Structure>

<BOM Structure>

BKLT_KB_DET#

13

D

D

Q39

Q39
MMBF170LT1G_SOT23-3~D

MMBF170LT1G_SOT23-3~D

S

S

JKBL1

JKBL1

1
2

5

3

GND

6

44GND

ON_OFF 31

51ON# 45

BKLT_KB_DET# 31

JKB1

JKB1

30

KSI7

29

KSI6

28

KSI4

27

KSI2

KSI[0..7]31

KSO[0..18]31

KSI[0..7]

KSO[0..18]

KSI5
KSI1
KSI3
KSI0
KSO5
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
KSO10
KSO17
KSO18

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

32

30

GND

31

29

GND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JAE_FL4S030HB3R3000

JAE_FL4S030HB3R3000

CONN@

CONN@

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

KSO0

KSO1

KSO2

KSO3

KSO4

KSO5

Touch Screen Connector

D36

D36

1

CH1

2

Vn

3

CH2

CM1293-04SO_SOT23-6@

CM1293-04SO_SOT23-6@

USBP9-

4

CH4

5

Vp

CH3

+3VS

USBP9+

6

Place close JTCH1

Touch PAD/B Conn.

+HALL_VCC

+3VALW

C959 33P_0402_50V8J~ DC959 33P_0402_50V 8J~D

C960 33P_0402_50V8J~ DC960 33P_0402_50V 8J~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

1 2

R933 0_0402_5%R933 0_0402_5%

1 2

R934 10K_0402_5%R934 10K_0402_5%

1

C521

C521

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

Cap Sensor

FB_SDATA

1 2

FB_SCLK

1 2

LID_SW#

EC_FB_SDATA31

EC_FB_SCLK31

C512

C512

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

R1.0 Modify

+3VS

R1559 0_0402_5%@R1559 0_0402_5%@

1 2

USBP9-22
USBP9+22

TP_CLK31
LID_SW#31

+5VS

TP_DATA31

1

2

L77 BL M18BD601SN1D_0603~DL77 BL M18BD601SN1D_0603~D

1 2

L78 BL M18BD601SN1D_0603~DL78 BL M18BD601SN1D_0603~D

1 2

TOUCHKEY_TINT31

D

KSO6

C485 100P_0402_50V8J~ D@ C485 100P_0402_50V8J~D@

C487 100P_0402_50V8J~ D@ C487 100P_0402_50V8J~D@

C489 100P_0402_50V8J~ D@ C489 100P_0402_50V8J~D@

C491 100P_0402_50V8J~ D@ C491 100P_0402_50V8J~D@

C493 100P_0402_50V8J~ D@ C493 100P_0402_50V8J~D@

C495 100P_0402_50V8J~ D@ C495 100P_0402_50V8J~D@ C496 100P_0402_50V8J~D@C496 100P_0402_50V8J~D@

C497 100P_0402_50V8J~ D@ C497 100P_0402_50V8J~D@

C499 100P_0402_50V8J~ D@ C499 100P_0402_50V8J~D@

C501 100P_0402_50V8J~ D@ C501 100P_0402_50V8J~D@

C503 100P_0402_50V8J~ D@ C503 100P_0402_50V8J~D@

C505 100P_0402_50V8J~ D@ C505 100P_0402_50V8J~D@

C507 100P_0402_50V8J~ D@ C507 100P_0402_50V8J~D@

C509 100P_0402_50V8J~ D@ C509 100P_0402_50V8J~D@

C511 100P_0402_50V8J~ D@ C511 100P_0402_50V8J~D@

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

KSO16

KSO17

KSO18

C486 100P_0402_50V8J~ D@ C486 100P_0402_50V8J~D@

C488 100P_0402_50V8J~ D@ C488 100P_0402_50V8J~D@

C490 100P_0402_50V8J~ D@ C490 100P_0402_50V8J~D@

C492 100P_0402_50V8J~ D@ C492 100P_0402_50V8J~D@

C494 100P_0402_50V8J~ D@ C494 100P_0402_50V8J~D@

C498 100P_0402_50V8J~ D@ C498 100P_0402_50V8J~D@

C500 100P_0402_50V8J~ D@ C500 100P_0402_50V8J~D@

C502 100P_0402_50V8J~ D@ C502 100P_0402_50V8J~D@

C504 100P_0402_50V8J~ D@ C504 100P_0402_50V8J~D@

C506 100P_0402_50V8J~ D@ C506 100P_0402_50V8J~D@

C508 100P_0402_50V8J~ D@ C508 100P_0402_50V8J~D@

C510 100P_0402_50V8J~ D@ C510 100P_0402_50V8J~D@

For EMI

JTCH1

JTCH1

VBUS

USBP9-

USBP9+

TP_CLK
LID_SW#
TP_DATA
+HALL_VCC

PESD5V2S2UT_SOT23-3~D

PESD5V2S2UT_SOT23-3~D

TOUCHKEY_TINT

PESD5V2S2UT_SOT23-3~D

PESD5V2S2UT_SOT23-3~D

10

1

1

G2

2

2

3

3

4

4

5

5

6

6

7

7

8

8

G1

9

JST_SM08B-SURS-TF(LF)(SN)~D

JST_SM08B-SURS-TF(LF)(SN)~D

CONN@

CONN@

2

3

D48

D48

1

1 2

2

3

D49

D49

1

C513

100P_0402_50V8J~D

C513

100P_0402_50V8J~D

FB_SDATA
FB_SCLK

R1003

R1003
0_0402_5%

0_0402_5%

+5VS

+3VS

1

2

C514

100P_0402_50V8J~D

C514

100P_0402_50V8J~D

1

1

2

2

+3VS

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWROK/BTN/KB/Touch Pad

PWROK/BTN/KB/Touch Pad

PWROK/BTN/KB/Touch Pad

LA-5151P

LA-5151P

LA-5151P

C927

C927

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

JTP1

JTP1

1

1

2

2

3

3

4

4

5

5

6

6

TYCO_2041084-6~D

TYCO_2041084-6~D

CONN@

CONN@

JCAP1

JCAP1

6

6

5

5

4

4

3

3

2

2

1

1

TYCO_2041084-6

TYCO_2041084-6

CONN@

CONN@

32 60Friday, June 12, 2009

32 60Friday, June 12, 2009

32 60Friday, June 12, 2009

E

7

G1

8

G2

8

G2

7

G1

R10 (A00)

R10 (A00)

R10 (A00)

A

B

C

D

E

1 1

300K_0402_5%

300K_0402_5%

SUSP

2 2

3 3

Voltage divider (7/8 VCC) on 3VS_gate

C515

10U_0805_10V4Z~D

C515

10U_0805_10V4Z~D

1

2

12

R340

R340
2M_0402_5%

2M_0402_5%

SYSON#23

SYSON28,31,49

Change from U21 to Q50

8
7

5

3VS_GATE

2

R338

R338

G

G

B+_BIAS

12

13

Q7

SSM3K7002FU_SC70-3~D

Q7

SSM3K7002FU_SC70-3~D

D

D

S

S

Q50

Q50
SI4392DY-T1-E3_SO8~D

SI4392DY-T1-E3_SO8~D

4

1

C524

C524

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

2

+3VALW

SYSON#

SYSON

2

G

G

R355

R355
10K_0402_5%

10K_0402_5%

1 2

+3VS+3VALW

3
2
16

1

2

12

R354

R354
100K_0402_5%

100K_0402_5%

13

D

D

Q16

Q16
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

+5VALW to +5VS Transfer+3VALW to +3VS Transfer

B+_BIAS

10U_0805_10V4Z~D

C516

0.1U_0402_16V4Z~D

C516

0.1U_0402_16V4Z~D

C517

10U_0805_10V4Z~D

C517

10U_0805_10V4Z~D

1

2

300K_0402_5%

300K_0402_5%

SUSP

10U_0805_10V4Z~D

C518

C518

12

R343

R343

Q8

SSM3K7002FU_SC70-3~D

Q8

SSM3K7002FU_SC70-3~D

13

D

D

2

G

G

S

S

Change from U22 to Q51

8
7

1

5

2

5VS_GATE

Q51

Q51
SI4800BDY-T1-E3_SO8~D

SI4800BDY-T1-E3_SO8~D

4

1

C525

C525

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

2

+5VS+5VALW

1
2
36

C519

0.1U_0402_16V4Z~D

C519

0.1U_0402_16V4Z~D

C520

10U_0805_10V4Z~D

C520

10U_0805_10V4Z~D

1

1

2

2

+1.5V to +1.5VS Transfer

B+_BIAS

SUSP

2

G

G

Q10

Q10

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

+1.5V +1.5VS

Q45

12

Q45

8
7

5

R1021

R1021
2M_0402_5%

2M_0402_5%

12

R344

R344
470K_0402_5%

470K_0402_5%

13

D

D

S

S

3
2
16

4

SI4392DY-T1-E3_SO8~D

SI4392DY-T1-E3_SO8~D

1

C532

C532
470P_0402_50V7K~D

470P_0402_50V7K~D

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

R345

20K_0402_5%

R345

20K_0402_5%

12

C531

C531

1

2

Discharge Circuit

SUSP

+1.05V_VCCP

12

13

D

D

2

G

G

S

S

R352

R352
470_0402_5%

470_0402_5%

Q12

Q12
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SUSP

+5VS

12

13

D

D

2

G

G

S

S

R359

R359
470_0402_5%

470_0402_5%

Q20

Q20
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

+5VALW

12

R360

R360
100K_0402_5%

100K_0402_5%

SUSP

13

D

2

G

G

R361

R361
10K_0402_5%

10K_0402_5%

1 2

D

Q21

Q21
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

SUSP#

SUSP#28,31,48,49,50

4 4

SUSP

+0.75VS

12

13

D

D

2

G

G

S

S

R358

R358
470_0402_5%

470_0402_5%

Q19

Q19
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SUSP

+3VS

12

13

D

D

2

G

G

S

S

R356

R356
470_0402_5%

470_0402_5%

Q17

Q17
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SYSON#

+1.5V

12

13

D

D

2

G

G

S

S

R353

R353
470_0402_5%

470_0402_5%

Q15

Q15
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DC/DC Circuits

DC/DC Circuits

DC/DC Circuits

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

33 60Friday, June 12, 2009

33 60Friday, June 12, 2009

33 60Friday, June 12, 2009

E

R10 (A00)

5

D D

C C

4

H_2P2

H_1P6

H_3P0

@

@

H6
HOLEA@H6HOLEA@

1

H2
HOLEA@H2HOLEA@

1

H7
HOLEA@H7HOLEA@

1

H17

H17
HOLEA

HOLEA

1

@

@

H8
HOLEA@H8HOLEA@

1

H18

H18
HOLEA

HOLEA

1

@

@

H9
HOLEA@H9HOLEA@

1

H19

H19
HOLEA

HOLEA

1

FD1

FD1
FIDUCAL

FIDUCAL

@

@

1

@

@

H10

H10
HOLEA@

HOLEA@

1

H21

H21
HOLEA

HOLEA

1

@

@

FD2

FD2
FIDUCAL

FIDUCAL

1

H11

H11
HOLEA@

HOLEA@

1

H23

H23

@

@

HOLEA

HOLEA

1

@

@

@

@

3

FD3

FD3
FIDUCAL

FIDUCAL

1

H12

H12
HOLEA@

HOLEA@

1

H24

H24
HOLEA

HOLEA

1

@

@

FD4

FD4
FIDUCAL

FIDUCAL

@

@

H14

H14
HOLEA@

HOLEA@

1

H35

H35
HOLEA

HOLEA

1

2

ZZZ

ZZZ

1

H15

H15
HOLEA@

HOLEA@

1

H36

H36

@

@

HOLEA

HOLEA

1

PCB

PCB

H5

H16

H16

HOLEA@H5HOLEA@

HOLEA@

HOLEA@

1

1

1

H20

@

@

H4
HOLEA@H4HOLEA@

H26

H26
HOLEA

HOLEA

1

H20
HOLEA@

HOLEA@

1

1

H31

@

@

H27

H27
HOLEA

HOLEA

1

@

@

H28

H28
HOLEA

HOLEA

1

@

@

H30

H30
HOLEA

HOLEA

1

@

@

H31
HOLEA

HOLEA

1

@

@

H32

H32
HOLEA

HOLEA

1

@

@

H33

H33
HOLEA

HOLEA

1

H3

@

@

@

@

HOLEA@H3HOLEA@

1

H25

H25
HOLEA

HOLEA

1

H29

H29
HOLEA

HOLEA

1

H_3P2

B B

H_4P0

H_3P0X4P0

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Screw

Screw

Screw

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

34 60Friday, June 12, 2009

34 60Friday, June 12, 2009

34 60Friday, June 12, 2009

1

R10 (A00)

5

C R T

D D

C C

VGA_CRT_R39

VGA_CRT_G39

VGA_CRT_B39

CRT_DDC_DATA39

CRT_DDC_CLK39

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

+3VS_DELAY +CRT_VCC+3VS_DELAY +CRT_V CC+3VS_DELAY

1 2

R893 0_0603_5%R893 0_0603_5%

1 2

R894 0_0603_5%R894 0_0603_5%

1 2

R895 0_0603_5%R895 0_0603_5%

R369

2.2K_0402_5%

R369

2.2K_0402_5%

1 2

1 2

2.2K_0402_5%

2.2K_0402_5%
R370

R370

G

G

2

D

S

D

S

R367

150_0402_1%

R367

150_0402_1%

R366

150_0402_1%

R366

150_0402_1%

12

12

1 2

G

G

2

13

D

S

D

S

Q22

Q22

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

13

Q23

Q23

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

12

2K_0402_5%

2K_0402_5%

R368

150_0402_1%

R368

150_0402_1%

R371

R371

4

22P_0402_50V8J~D

22P_0402_50V8J~D

@

@

C537

C537

1

1

2

2

R372

2K_0402_5%

R372

2K_0402_5%

1 2

CRT_DDC_DATA_C

CRT_DDC_CLK_C

3

D15

@D15

@

D14

@D14

@

DAN217_SC59-3

1

2

1

2

C540

4.7P_0402_50V8C~D

C540

4.7P_0402_50V8C~D

+CRT_VCC

3

+CRT_VCC

5

P

A2Y

G

3

5

P

A2Y

G

3

DAN217_SC59-3

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

1

2

1

OE#

1

OE#

DAN217_SC59-3

DAN217_SC59-3

+3VS_DELAY

L31

L31

BLM18BA220SN1D_2P~D

BLM18BA220SN1D_2P~D

1 2

BLM18BA220SN1D_2P~D

BLM18BA220SN1D_2P~D

1 2

BLM18BA220SN1D_2P~D

BLM18BA220SN1D_2P~D

1 2

22P_0402_50V8J~D

22P_0402_50V8J~D

22P_0402_50V8J~D

22P_0402_50V8J~D

@

@

@

@

C539

C539

C538

C538

1

2

L32

L32

L33

L33

CRT_R_L

CRT_G_L

CRT_B_L

For EMI

CRT_HSYNC39

CRT_VSYNC39

C545

C545

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

CRT_HSYNC

C546

C546

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

CRT_VSYNC

D16

@D16

@

DAN217_SC59-3

DAN217_SC59-3

1

1

2

3

2

3

C541

C541

U26

U26

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

U27

U27

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

4

4

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

1

2

R373

R373

10K_0402_5%

10K_0402_5%

1 2

C542

C542

D_CRT_HSYNC HSYNC_L

D_CRT_VSYNC

R1018 0_0603_5%R1018 0_0603_5%

1 2

R1019 0_0603_5%R1019 0_0603_5%

1 2

2

MSEN#31

+5VS

MSEN#
CRT_R_L

CRT_DDC_DATA_C
CRT_G_L

HSYNC_L
CRT_B_L

VSYNC_L

CRT_DDC_CLK_C

100P_0402_50V8J~D

100P_0402_50V8J~D

VSYNC_L

C547

15P_0402_50V8J~D

C547

15P_0402_50V8J~D

1

2

W=40mils

D17

D17

2 1
3

NC

NC

BAT1000-7-F_SOT23-3~D

BAT1000-7-F_SOT23-3~D

C544

100P_0402_50V8J~D

C544

100P_0402_50V8J~D

C543

C543

1

1

2

2

C548

15P_0402_50V8J~D

C548

15P_0402_50V8J~D

1

2

+CRT_VCC

1

2

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

C535

C535

1U_0603_10V6K~D

1U_0603_10V6K~D

JCRT1

JCRT1

16

G

G

17

G

G

TYCO_1775763-2

TYCO_1775763-2

CONN@

CONN@

1

+LCDVDD +5VALW

R376

R376
470_0603_5%

470_0603_5%

1 2
13

D

D

Q24

SSM3K7002FU_SC70-3~D

B B

VGA_LVDDEN38

LCD_VCC_TEST_EN31

A A

BKOFF#31

SSM3K7002FU_SC70-3~D

VGA_LVDDEN

LCD_VCC_TEST_EN

BKOFF# DISPOFF#

1 2

5

Q24

S

S

D37

D37

2

1

3

BAT54C-7-F_SOT23~D

BAT54C-7-F_SOT23~D

10K_0402_5%

10K_0402_5%

+3VS

12

R382

R382

4.7K_0402_5%

D19

D19

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

4.7K_0402_5%

R380

R380

R377

R377
47K_0402_5%

47K_0402_5%

1 2

R378

R378
56K_0402_5%

2

G

G

13

D

D

Q26

Q26
BSS138_SOT23~D

BSS138_SOT23~D

S

S

VGA_PWM38

EC_PWM31

56K_0402_5%

12

2

G

G

12

+3VS

G

G

2

C549

0.1U_0402_16V4Z~D

C549

0.1U_0402_16V4Z~D

1

2

1

INA

2

INB

@R944

@

0_0402_5%

0_0402_5%

@R945

@

0_0402_5%

0_0402_5%

4

W=60milsW=60mils

+LCDVDD

S

S

Q25

Q25
SI2301BDS-T1-E3_SOT23-3~D

SI2301BDS-T1-E3_SOT23-3~D

D

D

1 3

+LCDVDD

1

C550

@C550

@

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

2

+3VS +3VS

5

U45

U45

P

O

G

74AHC1G32GW_SOT353-5~D

74AHC1G32GW_SOT353-5~D

3

R944

R945

1

2

4

12

12

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C551

C551

12

R394

@R394

@

10K_0402_5%

10K_0402_5%

INVT_PWM

R03: Add

R381 0_0805_5%@R381 0_0805_5%@

B+ +INV_PW R_SRC

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

2

+LCDVDD

1 2

40mil

B+

C1550

C1550

2

G

G

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

S

S

4 5

R1564

100K_0402_5%

R1564

100K_0402_5%

12

PWR_SRC_ON

12

R1565

R1565
100K_0402_5%

100K_0402_5%

13

D

D

Q55

Q55
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

3

Q54

Q54
SI3457BDV-T1-E3_TSOP6~D

SI3457BDV-T1-E3_TSOP6~D

D

D

6

2
1

G

G

1

3

C1551

C1551

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

40mil

+INV_PWR_SRC

LVDS_DDC_CLK39

LVDS_DDC_DATA39

Reserve for EMI
(Place close to JLVDS1)

@

@

C1546 5P_0402_50V8C

C1546 5P_0402_50V8C

@

@

C1547 5P_0402_50V8C

C1547 5P_0402_50V8C

@

@

C1548 5P_0402_50V8C

C1548 5P_0402_50V8C

@

@

C1549 5P_0402_50V8C

C1549 5P_0402_50V8C

2

R374 0_0402_5%@R3 74 0_0402_5%@
R375 0_0402_5%@R3 75 0_0402_5%@

1 2

1 2

1 2

1 2

12
12

DELL CONFIDENTIAL/PROPRIETARY

EDID_CLK_LCD
EDID_DATA_LCD

+LCDVDD

+3VS

LCD_TST31

LVDS_ACLK-38

LVDS_ACLK+38

LVDS_BCLK-38

LVDS_BCLK+38

+INV_PWR_SRC

LCD_TST
EDID_CLK_LCD
EDID_DATA_LCD
LVDS_A0-

LVDS_A0-38

LVDS_A0+

LVDS_A0+38

LVDS_A1-

LVDS_A1-38

LVDS_A1+

LVDS_A1+38

LVDS_A2-

LVDS_A2-38

LVDS_A2+

LVDS_A2+38

LVDS_ACLK-

LVDS_ACLK-

LVDS_ACLK+

LVDS_B0-LVDS_B0-

LVDS_B0-38

LVDS_B0+LVDS_B0+

LVDS_B0+38

LVDS_B1-

LVDS_B1-38

LVDS_B1+

LVDS_B1+38

LVDS_B2-

LVDS_B2-38

LVDS_B2+

LVDS_B2+38

LVDS_BCLK-

LVDS_BCLK-

LVDS_BCLK+

INVT_PWM
DISPOFF#

W=40mils

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CRT / LVDS CONN

CRT / LVDS CONN

CRT / LVDS CONN

LA-5151P

LA-5151P

LA-5151P

JLVDS1

JLVDS1

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

JAE_FI-G40SB-VF25-DT

JAE_FI-G40SB-VF25-DT

1

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CONN@

CONN@

51

G11

50

G10

49

G9

48

G8

47

G7

46

G6

45

G5

44

G4

43

G3

42

G2

41

G1

35 60Friday, June 12, 2009

35 60Friday, June 12, 2009

35 60Friday, June 12, 2009

R10 (A00)

R10 (A00)

R10 (A00)

5

D D

+5VS

12

R390

R390

100K_0402_5%

100K_0402_5%

C C

DP_AUX PULLUP
POWER RAIL MUST
BE UP BEFORE
CORE POWER RAIL

13

D

D

2

G

G

S

S

HDMI_A3N_VGA39

HDMI_A3P_VGA39

HDMI_A2N_VGA39

HDMI_A2P_VGA39

HDMI_A1N_VGA39

HDMI_A1P_VGA39

HDMI_A0N_VGA39

HDMI_A0P_VGA39

Q27

Q27
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

4

PLACE AC CAP
CLOSE TO CONNECTOR

C552 0.1U_0402_10V6K~DC552 0.1U_0402_10V6K~D

1 2

C553 0.1U_0402_10V6K~DC553 0.1U_0402_10V6K~D

1 2

C554 0.1U_0402_10V6K~DC554 0.1U_0402_10V6K~D

1 2

C555 0.1U_0402_10V6K~DC555 0.1U_0402_10V6K~D

1 2

C557 0.1U_0402_10V6K~DC557 0.1U_0402_10V6K~D

1 2

C558 0.1U_0402_10V6K~DC558 0.1U_0402_10V6K~D

1 2

C559 0.1U_0402_10V6K~DC559 0.1U_0402_10V6K~D

1 2

C560 0.1U_0402_10V6K~DC560 0.1U_0402_10V6K~D

1 2

R385 499_0402_1%R385 499_0402_1%

R386 499_0402_1%R386 499_0402_1%

R387 499_0402_1%R387 499_0402_1%

R388 499_0402_1%R388 499_0402_1%

R389 499_0402_1%R389 499_0402_1%

R391 499_0402_1%R391 499_0402_1%

R392 499_0402_1%R392 499_0402_1%

R393 499_0402_1%R393 499_0402_1%

12

12

12

12

12

12

12

12

3

TMDS_TXCN

TMDS_TXCP

TMDS_TX0N

TMDS_TX0P

TMDS_TX1N

TMDS_TX1P

TMDS_TX2N

TMDS_TX2P

PLACE PULL DOWN RESISTORS CLOSE TO
DIFFERENTIAL PAIRS CONNECTED TO SOLID
GROUND FLOOD WHICH IS CONTROLL ED
BY THE FET
AVOID STUBS TO ALL DIFFERENTIAL TRACES

+5VS

2

F3

@F3

@

1.5A_6V_1206L150PR~D

1.5A_6V_1206L150PR~D

12

R384

R384

0_1206_5%

0_1206_5%

C556

C556

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 2

1

Co-lay

12

HDMI_HPLUG

DDC_DAT_HDMI
DDC_CLK_HDMI

TMDS_L_TXCN

TMDS_L_TXCP
TMDS_L_TX0N

TMDS_L_TX0P
TMDS_L_TX1N

TMDS_L_TX1P
TMDS_L_TX2N

TMDS_L_TX2P

LINK OK

JHDMI1

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

FOX_QJ5119L-NVBT-7F

FOX_QJ5119L-NVBT-7F

CONN@

CONN@

GND
GND
GND
GND

20
21
22
23

+3VS_DELAY

2

HDMI_DDC_CLK39

B B

HDMI_DDC_DATA39

A A

Q28A

@Q28A

@

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

1 2

R399 0_0402_5%R399 0_0402_5%

+3VS_DELAY

5

4

Q28B

Q28B

@

@

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

1 2

R408 0_0402_5%R408 0_0402_5%

+5VS

12

R395

R395
2K_0402_1%

2K_0402_1%

+5VS

12

DDC_CLK_HDMI

R406

R406
2K_0402_1%

2K_0402_1%

DDC_DAT_HDMI

61

3

TMDS_TXCN TMDS_L_TXCN

TMDS_TXCP

TMDS_TX0N

TMDS_TX0P

TMDS_TX1N

TMDS_TX1P

TMDS_TX2N

TMDS_TX2P

Place close JHDMI1

L74

L74

2

2

3

3

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

L75

L75

2

2

3

3

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

L76

L76

2

2

3

3

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

L73

L73

2

2

3

3

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

1

1

4

4

1

1

4

4

1

1

4

4

1

1

4

4

TMDS_L_TXCP

TMDS_L_TX0N

TMDS_L_TX0P

TMDS_L_TX1N

TMDS_L_TX1P

TMDS_L_TX2N

TMDS_L_TX2P

+3VS_DELAY

R400

150K_0402_5%

150K_0402_5%

2

B

B

E

E

Q29

Q29

3 1

MMBT3904_SOT23-3~D

MMBT3904_SOT23-3~D

12

R404

R404
10K_0402_5%

10K_0402_5%

R400

1 2

HDMI_HPLUG

12

R402

@R402

@

365K_0402_1%

365K_0402_1%

C

C

R401 0_0402_5%@R401 0_0402_5%@

HDMI_HPD39

1 2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HDMI CONN

HDMI CONN

HDMI CONN

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

36 60Friday, June 12, 2009

36 60Friday, June 12, 2009

36 60Friday, June 12, 2009

1

R10 (A00)

5

D D

4

3

2

1

Place close JDP1

D38

@8D38

@

1

2

DISP_DDC_EN

C571

C571

4

5

3

8

RCLAMP0524P.TCT~D

RCLAMP0524P.TCT~D

D39

@8D39

@

1

2

4

5

3

8

RCLAMP0524P.TCT~D

RCLAMP0524P.TCT~D

+5VS

1

2

C561 0.1U_0402_10V6K~ DC561 0.1U_0402_10V6K~D

DISP_A0N_VGA39
DISP_A0P_VGA39

DISP_A1N_VGA39
DISP_A1P_VGA39

DISP_A2N_VGA39
DISP_A2P_VGA39

DISP_A3N_VGA39

C C

DISP_A3P_VGA39

12

C562 0.1U_0402_10V6K~ DC562 0.1U_0402_10V6K~D

12

C563 0.1U_0402_10V6K~ DC563 0.1U_0402_10V6K~D

12

C564 0.1U_0402_10V6K~ DC564 0.1U_0402_10V6K~D

12

C566 0.1U_0402_10V6K~ DC566 0.1U_0402_10V6K~D

12

C568 0.1U_0402_10V6K~ DC568 0.1U_0402_10V6K~D

12

C569 0.1U_0402_10V6K~ DC569 0.1U_0402_10V6K~D

12

C570 0.1U_0402_10V6K~ DC570 0.1U_0402_10V6K~D

12

DISP_A0N
DISP_A0P

DISP_A1N
DISP_A1P

DISP_A2N
DISP_A2P

DISP_A3N
DISP_A3P

DISP_A1N DISP_A1N

DISP_A2P DISP_A2P

DISP_A2N DISP_A2N

DISP_A3P DISP_A3P

DISP_A3N DISP_A3N

2

Q31A

Q31A
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

DISP_DDC_EN

R411 0_0402_5%@R411 0_0402_5%@

B B

DP_DDC_CLK39

DP_DDC_DATA39

1 2

R412 0_0402_5%@R412 0_0402_5%@

1 2

DISP_DDC_EN

6 1

3

Q31B

Q31B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

5

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

4

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

2

Q32A

Q32A
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

6 1

3

Q32B

Q32B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

5

C565

C565

C567

C567

12

R410

R410
100K_0402_1%

100K_0402_1%

12

12

DISP_DDC_CLK_C

DISP_DDC_DAT_C

12

R413

R413
100K_0402_1%

100K_0402_1%

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

+3VS_DELAY

4

@

@

R418 0_0402_5%

R418 0_0402_5%

DP_HPD39

A A

1 2

DISP_A0PDISP_A0P

10

DISP_A0NDISP_A0N

9

DISP_A1PDISP_A1P

7

6

10

9

7

6

12

R414

R414
100K_0402_1%

100K_0402_1%

61

2

Q30A

Q30A

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

+5VS

12

R415

R415
100K_0402_1%

100K_0402_1%

3

Close connect

5

Q30B

Q30B

4

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

+3VS_DELAY

C

C

2

B

B

E

E

Q33

Q33

3 1

MMBT3904_SOT23-3~D

MMBT3904_SOT23-3~D

12

R421

R421
10K_0402_5%

10K_0402_5%

R417

R417

150K_0402_5%

150K_0402_5%

1 2

365K_0402_1%

365K_0402_1%

+3VS

R419

@R419

@

Co-lay

F2

F2

1 2

1.5A_6V_1206L150PR~D

1.5A_6V_1206L150PR~D

R409 0_1206_5%@R409 0_1206_5%@

DISP_A0P

DISP_A0N
DISP_A1P

DISP_A1N
DISP_A2P

DISP_A2N
DISP_A3P

DISP_A3N
DISP_EN
DISP_CEC
DISP_DDC_CLK_C

DISP_DDC_DAT_C
DISP_HD

12

+3VS_DP

+3VS_DP

12

C572 0.1U_0402_10V6K~DC572 0.1U_0402_10V6K~D

R416 5.1M_0402_5%R416 5.1M_0402_5%

C573 22U_0805_6.3V6M~DC573 22U_0805_6.3V6M~D

R943 1M_0402_5%R943 1M_0402_5%

12

12

1

1

2

2

C953

0.1U_0402_16V4Z~D

C953

0.1U_0402_16V4Z~D

C952

10U_0805_10V4Z~D

C952

10U_0805_10V4Z~D

1

1

2

2

JDP1

JDP1

1

LANE0_P

LANE0_P

2

GND

GND

3

LANE0_N

LANE0_N

4

LANE1_P

LANE1_P

5

GND

GND

6

LANE1_N

LANE1_N

7

LANE2_P

LANE2_P

8

GND

GND

9

LANE2_N

LANE2_N

10
11
12
13
14
15
16
17
18
19
20

21
22
23
24

LANE3_P

LANE3_P

GND

GND

LANE3_N

LANE3_N

CONFIG1

CONFIG1

CONFIG2

CONFIG2

AUXCH_P

AUXCH_P

GND

GND

AUXCH_N

AUXCH_N

HPD

HPD

RETURN

RETURN

DP_PWR

DP_PWR

GROUND

GROUND

FOX_3V102P1-RB2BT-8F

FOX_3V102P1-RB2BT-8F

CONN@

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Display Port

Display Port

Display Port

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

37 60Friday, June 12, 2009

37 60Friday, June 12, 2009

37 60Friday, June 12, 2009

1

R10 (A00)

5

4

3

2

1

D D

PCIE_MTX_C_GRX_P[0..15]12

PCIE_MTX_C_GRX_N[0..15]12

C C

B B

A A

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

CLK_PCIE_VGA6
CLK_PCIE_VGA#6

PLT_RST#11,20,27,30,31

U28A

U28A

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

CLK_PCIE_VGA
CLK_PCIE_VGA#

M96 P/N : SA00002UQ40 (S IC 216-0729042-00 A13 M96 FCBGA962 0FD)
M92 P/N : SA00002YX20 ( S IC 216-0728014 A12 M92-M2 XT FCBGA 0FD)

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AJ21

NC#1

AK21

NC#2

AH16

NC_PWRGOOD

AA30

PERSTB

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

CALIBRATIO N

CALIBRATIO N

PCIE_CALRP

PCIE_CALRN

PCIE_MRX_C_GTX_P0

Y33

PCIE_MRX_C_GTX_N0

Y32

PCIE_MRX_C_GTX_P1

W33

PCIE_MRX_C_GTX_N1

W32

PCIE_MRX_C_GTX_P2

U33

PCIE_MRX_C_GTX_N2

U32

PCIE_MRX_C_GTX_P3

U30
U29

PCIE_MRX_C_GTX_P4

T33

PCIE_MRX_C_GTX_N4

T32

PCIE_MRX_C_GTX_P5

T30

PCIE_MRX_C_GTX_N5

T29

PCIE_MRX_C_GTX_P6

P33

PCIE_MRX_C_GTX_N6

P32

PCIE_MRX_C_GTX_P7

P30

PCIE_MRX_C_GTX_N7

P29

PCIE_MRX_C_GTX_P8

N33

PCIE_MRX_C_GTX_N8

N32

PCIE_MRX_C_GTX_P9

N30

PCIE_MRX_C_GTX_N9

N29

PCIE_MRX_C_GTX_P10

L33

PCIE_MRX_C_GTX_N10

L32

PCIE_MRX_C_GTX_P11

L30

PCIE_MRX_C_GTX_N11

L29

PCIE_MRX_C_GTX_P12

K33

PCIE_MRX_C_GTX_N12

K32

PCIE_MRX_C_GTX_P13

J33

PCIE_MRX_C_GTX_N13

J32

PCIE_MRX_C_GTX_P14

K30

PCIE_MRX_C_GTX_N14

K29

PCIE_MRX_C_GTX_P15

H33

PCIE_MRX_C_GTX_N15

H32

R424 1.27K_0402_1%R424 1.27K_0402_1%

Y30

1 2

R426 2K_0402_1%R426 2K_0402_1%

Y29

1 2

PCIE_MRX_GTX_P[0..15]

PCIE_MRX_GTX_N[0..15]

C574 .1U_0402_16V7K~DC574 .1U_0402_16V7K~ D

1 2

C575 .1U_0402_16V7K~DC575 .1U_0402_16V7K~ D

1 2

C576 .1U_0402_16V7K~DC576 .1U_0402_16V7K~ D

1 2

C577 .1U_0402_16V7K~DC577 .1U_0402_16V7K~ D

1 2

C578 .1U_0402_16V7K~DC578 .1U_0402_16V7K~ D

1 2

C579 .1U_0402_16V7K~DC579 .1U_0402_16V7K~ D

1 2

C580 .1U_0402_16V7K~DC580 .1U_0402_16V7K~ D

1 2

C581 .1U_0402_16V7K~DC581 .1U_0402_16V7K~ D

1 2

C582 .1U_0402_16V7K~DC582 .1U_0402_16V7K~ D

1 2

C583 .1U_0402_16V7K~DC583 .1U_0402_16V7K~ D

1 2

C584 .1U_0402_16V7K~DC584 .1U_0402_16V7K~ D

1 2

C585 .1U_0402_16V7K~DC585 .1U_0402_16V7K~ D

1 2

C586 .1U_0402_16V7K~DC586 .1U_0402_16V7K~ D

1 2

C587 .1U_0402_16V7K~DC587 .1U_0402_16V7K~ D

1 2

C588 .1U_0402_16V7K~DC588 .1U_0402_16V7K~ D

1 2

C589 .1U_0402_16V7K~DC589 .1U_0402_16V7K~ D

1 2

C590 .1U_0402_16V7K~DC590 .1U_0402_16V7K~ D

1 2

C591 .1U_0402_16V7K~DC591 .1U_0402_16V7K~ D

1 2

C592 .1U_0402_16V7K~DC592 .1U_0402_16V7K~ D

1 2

C593 .1U_0402_16V7K~DC593 .1U_0402_16V7K~ D

1 2

C594 .1U_0402_16V7K~DC594 .1U_0402_16V7K~ D

1 2

C595 .1U_0402_16V7K~DC595 .1U_0402_16V7K~ D

1 2

C596 .1U_0402_16V7K~DC596 .1U_0402_16V7K~ D

1 2

C597 .1U_0402_16V7K~DC597 .1U_0402_16V7K~ D

1 2

C598 .1U_0402_16V7K~DC598 .1U_0402_16V7K~ D

1 2

C599 .1U_0402_16V7K~DC599 .1U_0402_16V7K~ D

1 2

C600 .1U_0402_16V7K~DC600 .1U_0402_16V7K~ D

1 2

C601 .1U_0402_16V7K~DC601 .1U_0402_16V7K~ D

1 2

C602 .1U_0402_16V7K~DC602 .1U_0402_16V7K~ D

1 2

C603 .1U_0402_16V7K~DC603 .1U_0402_16V7K~ D

1 2

C604 .1U_0402_16V7K~DC604 .1U_0402_16V7K~ D

1 2

C605 .1U_0402_16V7K~DC605 .1U_0402_16V7K~ D

1 2

+1.1VS

PCIE_MRX_GTX_P[0..15] 12

PCIE_MRX_GTX_N[0..15] 12

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_N0

PCIE_MRX_GTX_P1
PCIE_MRX_GTX_N1

PCIE_MRX_GTX_P2
PCIE_MRX_GTX_N2

PCIE_MRX_GTX_P3
PCIE_MRX_GTX_N3PCIE_MRX_C_GTX_N3

PCIE_MRX_GTX_P4
PCIE_MRX_GTX_N4

PCIE_MRX_GTX_P5
PCIE_MRX_GTX_N5

PCIE_MRX_GTX_P6
PCIE_MRX_GTX_N6

PCIE_MRX_GTX_P7
PCIE_MRX_GTX_N7

PCIE_MRX_GTX_P8
PCIE_MRX_GTX_N8

PCIE_MRX_GTX_P9
PCIE_MRX_GTX_N9

PCIE_MRX_GTX_P10

PCIE_MRX_GTX_N10

PCIE_MRX_GTX_P11

PCIE_MRX_GTX_N11

PCIE_MRX_GTX_P12

PCIE_MRX_GTX_N12

PCIE_MRX_GTX_P13

PCIE_MRX_GTX_N13

PCIE_MRX_GTX_P14

PCIE_MRX_GTX_N14

PCIE_MRX_GTX_P15

PCIE_MRX_GTX_N15

U28G

U28G

LVDS CONTROL

LVDS CONTROL

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

TXOUT_U3P
TXOUT_U3N

LVTMDP

LVTMDP

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

TXOUT_L3P
TXOUT_L3N

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

VARY_BL

DIGON

AK27
AJ27

AK35
AL36

AJ38
AK37

AH35
AJ36

AG38
AH37

AF35
AG36

AP34
AR34

AW37
AU35

AR37
AU39

AP35
AR35

AN36
AP37

R946

R946

10K_0402_5%

10K_0402_5%

1 2

R423

R423

10K_0402_5%

10K_0402_5%

1 2

LVDS_BCLK+
LVDS_BCLK-

LVDS_B0+
LVDS_B0-

LVDS_B1+
LVDS_B1-

LVDS_B2+
LVDS_B2-

T95T95
T96T96

LVDS_ACLK+
LVDS_ACLK-

LVDS_A0+
LVDS_A0-

LVDS_A1+
LVDS_A1-

LVDS_A2+
LVDS_A2-

T86T86
T87T87

VGA_PWM 35
VGA_LVDDEN 35

LVDS_BCLK+ 35
LVDS_BCLK- 35

LVDS_B0+ 35
LVDS_B0- 35

LVDS_B1+ 35
LVDS_B1- 35

LVDS_B2+ 35
LVDS_B2- 35

LVDS_ACLK+ 35
LVDS_ACLK- 35

LVDS_A0+ 35
LVDS_A0- 35

LVDS_A1+ 35
LVDS_A1- 35

LVDS_A2+ 35
LVDS_A2- 35

U28

U28

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

M92/XT GP U

M92/XT GP U

M92@

M92@

5

4

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

M96 PCIE/ LVDS

M96 PCIE/ LVDS

M96 PCIE/ LVDS

LA-5151P

LA-5151P

LA-5151P

38 60Friday, June 12, 2009

38 60Friday, June 12, 2009

38 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

Strap Name

TX_PWRS_ENB

TX_DEEMPH_EN

BIF_GEN2_EN

STRAP_BIF
_CLK_PM_EN

D D

CONFIG[2]
CONFIG[1]
CONFIG[0]

BIOS_ROM_EN

AUD[1]
AUD(0)

CCBYPASS

SMS_EN_HARD

VIP_DEVICE
_STRAP_DIS

VRAM

Samsung

HYNIX O O O1

+1.8VS

C C

+3VS_DELAY

B B

XTALIN

A A

GPIO0

GPIO1

GPIO2

GPIO22

GPIO13
GPIO12
GPIO11

GPIO22

HSYNC
VSYNC

GENERICC

H2SYNC

V2SYNC

MEM_ID0

MEM_ID1

Location

O

R886

10K_0402_5%@R886

10K_0402_5%

R885

10K_0402_5%

R885

10K_0402_5%

12

10K_0402_5%@R889

10K_0402_5%

12

@

R438 10K_0402_5%@R 438 10K_0402_5%@
R439 10K_0402_5%@R 439 10K_0402_5%@
R440 10K_0402_5%@R 440 10K_0402_5%@

R552 10K_0402_5%@R 552 10K_0402_5%@

R442 10K_0402_5%@R 442 10K_0402_5%@

R443 10K_0402_5%@R 443 10K_0402_5%@

R444 10K_0402_5%R444 10K_0402_5%
R445 10K_0402_5%@R 445 10K_0402_5%@
R446 10K_0402_5%@R 446 10K_0402_5%@

R451 10K_0402_5%@R 451 10K_0402_5%@

R452 10K_0402_5%@R 452 10K_0402_5%@

22P_0402_50V8J~D

22P_0402_50V8J~D

12

@

R890

10K_0402_5%@R890

10K_0402_5%

R889

12

@

1 2
1 2
1 2

1 2

1 2

1 2

1 2
1 2
1 2

1 2

1 2

R1558 22_0402_5%R1558 22_0402_5%

1 2

SSC_OUT

SSC_IN

SSC_OUT

C621

C621

R887

10K_0402_5%@R887

10K_0402_5%

12

12

@

R891

10K_0402_5%@R891

10K_0402_5%

12

12

@

27MHZ_16PF_X7T027000BG1H-V

27MHZ_16PF_X7T027000BG1H-V

10K_0402_5%@R888

10K_0402_5%

10K_0402_5%@R892

10K_0402_5%

1

2

3

5

Pin Straps descri ption

Transmitter Power Saving Enable
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)

0= Advertises the PCI-E device as 2.5 GT/s capable at power-on

5.0 GT/s capability will be controlled by software

Enable CLKREQ# Power Management
0: CLKREQ# power management capability is disabled
1: CLKREQ# power management capability is enabled

GPIO13,12,11 (config 2,1,0) :
a) If BIOS_ROM_EN = 1, then Config[2:0] defines

the ROM type.

b) If BIOS_ROM_EN = 0, then Config[2:0] defines
the primary memory aperture size.

Enable external BIOS ROM device
0: Diable, 1: Enable

00: No audio function; 10: Audio for DisplayPort only;
01: Audio for DisplayPort and HDMI if adapter is detected;
11: Audio for both DisplayPort and HDMI

If VIP_DEVICE_STRAP_EN is set to ?? then this pin is used to sense
whether a VIP slave device is connected to the VIP Host interface.
If VIP_DEVICE_STRAP_EN is set to ?? then this pin is not used as a
strap at all (i.e. its value during reset is unimportant), and it can be
used as a regular GPIO

MEM_ID2

MEM_ID3

O

O

O

R888

@

VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_DEC

R892

@

ROMSE_GPIO22

U109

U109

REFOUT

XOUT

XIN/CLKIN

ASM3P2872AF-06OR_TSOT-23-6

ASM3P2872AF-06OR_TSOT-23-6

1M_0603_5%

1M_0603_5%

Y4

Y4

3

OUT

2

GND

VGA_GPIO0
VGA_GPIO1
VGA_GPIO2

VGA_AC_DET

SOUT_GPIO8

SIN_GPIO9

VGA_GPIO11
VGA_GPIO12
VGA_GPIO13

GENERICC

MODOUT

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

R465

R465

+1.8VS

+3VS_DELAY

C617 100P_0402_50V8J~DC617 100P_0402_50V8J~D

R1555

R1555

6

VSS

33_0402_5%

33_0402_5%

1 2

5

4

VDD

1

C1531

C1531

2

+1.1VS

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

SSC_IN

4

GND

1

IN

C622

C622
18P_0402_50V8J~D

18P_0402_50V8J~D

memory apertures
CONFIG[3:0]
128 MB 000
256 MB 001
64 MB 010

X76@

X76@

R430 10K_0402_5%

R430 10K_0402_5%

1 2

R432 10K_0402_5%@R 432 10K_0402_5%@

1 2

R433 10K_0402_5%@R 433 10K_0402_5%@

1 2

R434 10K_0402_5%@R 434 10K_0402_5%@

1 2

DDR3

VRAM_DEC 1

1 2

R457 10K_0402_5%R457 10K_0402_5%

1 2

R458 10K_0402_5%@ R458 10K_0402_5%@

1 2

R460 10K_0402_5%@ R460 10K_0402_5%@

1 2

1

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

L42

L42

27M_SSC_R

C1532

C1532

+3VS_DELAY

12

CLKREQ_GPIO23

+1.8VS

C618

10U_0603_6.3V6M~D

C618

10U_0603_6.3V6M~D

1

2

+1.8VS

VGA_THERM#

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

Default

0

0

01= Advertises the PCI-E device as 5.0 GT/s capable at power-on

0

001

0

11

0

0

0

+3VS_DELAY

LVDS_DDC_CLK35
LVDS_DDC_DATA35

MEM_ID0

MEM_ID1

MEM_ID2

MEM_ID3

GPU_VID1

R455 499_0402_1%R455 499_0402_1%

+1.8VS

R456 249_0402_1%~DR 456 249_0402_1%~D

L41

L41

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

C614

C614

C619

0.1U_0402_16V4Z~D

C619

0.1U_0402_16V4Z~D

1

1

2

2

L43

L43

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

1

2

4

R428 4.7K_0402_5%R428 4.7K_0402_5%

1 2

R429 4.7K_0402_5%R429 4.7K_0402_5%

1 2

LVDS_DDC_CLK
LVDS_DDC_DATA

VGA_GPIO0
VGA_GPIO1
VGA_GPIO2

VGA_AC_DET

GPU_VID050

DP_HPD37

GPU_VID150

1 2

1 2

1 2

TSVDD

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

T88T88

T90T90
T91T91
T92T92
T93T93
T94T94

T89T89

120mA

C615

0.1U_0402_16V4Z~D

C615

0.1U_0402_16V4Z~D

1

2

GPU_THERM_D+
GPU_THERM_D-

C624

C624

1

2

VGA_ENBKL
SOUT_GPIO8
SIN_GPIO9

VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
HDMI_HPD
GPU_VID0
27M_SSC_R
VGA_THERM#
DP_HPD

GPU_VID1

ROMSE_GPIO22
CLKREQ_GPIO23

GENERICC

C625

0.1U_0402_16V4Z~D

C625

0.1U_0402_16V4Z~D

VGA_ENBKL31

HDMI_HPD36

C613 0.1U_0402_16V4Z~DC613 0.1U_0402_16V4Z~D

1

2

150mA

C620

1U_0402_6.3V4Z~D

C620

1U_0402_6.3V4Z~D

C623

10U_0603_6.3V6M~D

C623

10U_0603_6.3V6M~D

4

BB_EN

1

2

VRAM_DEC
VRAM_ID0
VRAM_ID1
VRAM_ID2

DPLL_PVDD

C616

1U_0402_6.3V4Z~D

C616

1U_0402_6.3V4Z~D

DPLL_VDDC

MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3

VGA_VREF

XTALIN

20mA

U28B

U28B

MUTI GFX

MUTI GFX

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

I2C

I2C

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16_SSIN

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF

AH24

GENERICG

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AJ32

TSVDD

AJ33

TSVSS

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

PLL/CLOCK

PLL/CLOCK

THERMAL

THERMAL

3

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P
TX0M_DPA2N

DPA

DPA

TX1P_DPA1P
TX1M_DPA1N

TX2P_DPA0P
TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P
TX3M_DPB2N

DPB

DPB

TX4P_DPB1P
TX4M_DPB1N

TX5P_DPB0P
TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P
TX0M_DPC2N

DPC

DPC

TX1P_DPC1P
TX1M_DPC1N

TX2P_DPC0P
TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P
TX3M_DPD2N

DPD

DPD

TX4P_DPD1P
TX4M_DPD1N

TX5P_DPD0P
TX5M_DPD0N

DAC1

DAC1

DAC2

DAC2

DDC/AUX

DDC/AUX

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

3

2

AU24

HDMI_A3P_VGA 36

AV23

HDMI_A3N_VGA 36

AT25

HDMI_A2P_VGA 36

AR24

HDMI_A2N_VGA 36

AU26

HDMI_A1P_VGA 36

AV25

HDMI_A1N_VGA 36

AT27

HDMI_A0P_VGA 36

AR26

HDMI_A0N_VGA 36

AR30

DISP_A3P_VGA 37

AT29

DISP_A3N_VGA 37

AV31

DISP_A2P_VGA 37

AU30

DISP_A2N_VGA 37

AR32

DISP_A1P_VGA 37

AT31

DISP_A1N_VGA 37

AT33

DISP_A0P_VGA 37

AU32

DISP_A0N_VGA 37

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

HSYNC
VSYNC

RSET

AVDD

AVSSQ

VDD1DI
VSS1DI

COMP

H2SYNC
V2SYNC

VDD2DI
VSS2DI

A2VDD

A2VDDQ

A2VSSQ

R2SET

AUX1P
AUX1N

AUX2P
AUX2N

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36
AC38

AB34

AD34
AE34

AC33
AC34

AC30

R2

AC31

R2B

AD30

G2

AD31

G2B

AF30

B2

AF31

B2B

AC32

C

AD32

Y

AF32

AD29
AC29

AG31
AG32

AG33

AD33

AF33

AA29

AM26
AN26

AM27
AL27

AM19
AL19

AN20
AM20

AL30
AM30

AL29
AM29

AN21
AM21

AJ30
AJ31

AK30
AK29

VGA_CRT_R 35

VGA_CRT_G 35

VGA_CRT_B 35

CRT_HSYNC 35
CRT_VSYNC 35

R441 499_0402_1%R441 499_0402_1%

1 2

70mA

+AVDD

+VDD1DI

H2SYNC
V2SYNC

VDD2DI

65mA

A2VDD

+A2VDDQ

R459

R459

715_0402_1%

715_0402_1%

1 2

CRT_DDC_CLK
CRT_DDC_DATA

CRT

HDMI_DDC_CLK
HDMI_DDC_DATA

HDMI

42mA

40mA

R984 0_0603_5%R984 0_0603_5%

R985 0_0603_5%R985 0_0603_5%

CRT_DDC_CLK 35
CRT_DDC_DATA 35

C608

0.1U_0402_16V4Z~D

C608

0.1U_0402_16V4Z~D

C607

1U_0402_6.3V4Z~D

C607

1U_0402_6.3V4Z~D

1

1

2

2

C610

1U_0402_6.3V4Z~D

C610

1U_0402_6.3V4Z~D

C611

0.1U_0402_16V4Z~D

C611

0.1U_0402_16V4Z~D

1

1

2

2

12

12

C881

1U_0402_6.3V4Z~D

C881

1U_0402_6.3V4Z~D

1

2

HDMI_DDC_CLK 36
HDMI_DDC_DATA 36

M96 only

DP_DDC_CLK
DP_DDC_DATA

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DP_DDC_CLK 37
DP_DDC_DATA 37

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

2

C882

0.1U_0402_16V4Z~D

C882

0.1U_0402_16V4Z~D

1

2

+3VS

L36

L36
BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C609

C609

L37

L37
BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C612

C612

+1.8VS

+3VS_DELAY

C883

10U_0603_6.3V6M~D

C883

10U_0603_6.3V6M~D

1

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

GPU_THERM_D+

2200P_0402_50V7K~D

2200P_0402_50V7K~D

C868

C868

GPU_THERM_D-

R976

R976

1 2

10K_0402_5%

10K_0402_5%

VGA_THERM_STP#

VR_ON7 ,31,51

12

+1.8VS

12

+1.8VS

L63

L63
BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

+3VS

External VGA Thermal Sensor

2

C867

C867

1 2

VGA_THERM_STP#

1

A00 modify

U38

U38

1

VDD

SCLK

2

D+

SDATA

3

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

ADM1032ARMZ-2REEL_MSOP8

D

S

D

S

13

Q52

Q52

G

G

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2

+3VS_DELAY

1.1VS_RUN_PWRGD50

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

V2SYNC
H2SYNC

CRT_VSYNC
CRT_HSYNC

+1.8VS

HDMI_DDC_CLK
HDMI_DDC_DATA

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

EC_SMB_CK2

8

EC_SMB_DA2

7

6

5

R1560

R1560

0_0402_5%

0_0402_5%

1 2

100K_0402_5%

100K_0402_5%

1 2

R431

R431

100K_0402_5%

100K_0402_5%

C606

C606

MAINPWON 7,47,52

R427

R427

1 2

2

G

G

1

2

PWR Sequence

R449 10K_0402_5%@R 449 10K_0402_5%@

1 2

R450 10K_0402_5%@R 450 10K_0402_5%@

1 2

R447 10K_0402_5%R447 10K_0402_5%

1 2

R448 10K_0402_5%R448 10K_0402_5%

1 2

R463 10K_0402_5%@R 463 10K_0402_5%@

1 2

R464 10K_0402_5%@R 464 10K_0402_5%@

1 2

R553 150_0402_1%R553 150_0402_1%

1 2

R554 150_0402_1%R554 150_0402_1%

1 2

R555 150_0402_1%R555 150_0402_1%

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

M96 GPIO/CRT/DP/HDMI

M96 GPIO/CRT/DP/HDMI

M96 GPIO/CRT/DP/HDMI

LA-5151P

LA-5151P

LA-5151P

1

EC_SMB_CK2 7,27,28,31

EC_SMB_DA2 7,27,28,31

D

S

D

S

13

Q34

Q34

G

G

SI2301BDS-T1-E3_SOT23-3~D

SI2301BDS-T1-E3_SOT23-3~D

2

13

D

D

Q35

Q35
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

1

+3VS_DELAY+3VS

100mA

VGA_CORE (VDDC)

+1.8VS

+3VS_DELAY

+3VS_DELAY

39 60Friday, June 12, 2009

39 60Friday, June 12, 2009

39 60Friday, June 12, 2009

R10 (A00)

R10 (A00)

R10 (A00)

5

4

3

2

1

M92M Use Channel B memory interface only.

U28C

U28C

MVREFDA

1

C626

C626

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

MVREFSA

1

C629

C629

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

MDA[0..63]

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

MVREFDA
MVREFSA

C37

DQA_0

C35

DQA_1

A35

DQA_2

E34

DQA_3

G32

DQA_4

D33

DQA_5

F32

DQA_6

E32

DQA_7

D31

DQA_8

F30

DQA_9

C30

DQA_10

A30

DQA_11

F28

DQA_12

C28

DQA_13

A28

DQA_14

E28

DQA_15

D27

DQA_16

F26

DQA_17

C26

DQA_18

A26

DQA_19

F24

DQA_20

C24

DQA_21

A24

DQA_22

E24

DQA_23

C22

DQA_24

A22

DQA_25

F22

DQA_26

D21

DQA_27

A20

DQA_28

F20

DQA_29

D19

DQA_30

E18

DQA_31

C18

DQA_32

A18

DQA_33

F18

DQA_34

D17

DQA_35

A16

DQA_36

F16

DQA_37

D15

DQA_38

E14

DQA_39

F14

DQA_40

D13

DQA_41

F12

DQA_42

A12

DQA_43

D11

DQA_44

F10

DQA_45

A10

DQA_46

C10

DQA_47

G13

DQA_48

H13

DQA_49

J13

DQA_50

H11

DQA_51

G10

DQA_52

G8

DQA_53

K9

DQA_54

K10

DQA_55

G9

DQA_56

A8

DQA_57

C8

DQA_58

E8

DQA_59

A6

DQA_60

C6

DQA_61

E6

DQA_62

A5

DQA_63

L18

MVREFDA

L20

MVREFSA

L27

NC_MEM_CALRN0

N12

NC_MEM_CALRN1

AG12

NC_MEM_CALRN2

M12

MEM_CALRP1

M27

NC_MEM_CALRP0

AH12

NC_MEM_CALRP2

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11
MAA_12

MAA_13/BA2
MAA_14/BA0
MAA_15/BA1

DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6

MEMORY INTERFACE A

MEMORY INTERFACE A

DQMA_7

QSA_0/RDQSA_0
QSA_1/RDQSA_1
QSA_2/RDQSA_2
QSA_3/RDQSA_3
QSA_4/RDQSA_4
QSA_5/RDQSA_5
QSA_6/RDQSA_6
QSA_7/RDQSA_7

QSA_0B/WDQSA_0
QSA_1B/WDQSA_1
QSA_2B/WDQSA_2
QSA_3B/WDQSA_3
QSA_4B/WDQSA_4
QSA_5B/WDQSA_5
QSA_6B/WDQSA_6
QSA_7B/WDQSA_7

ODTA0

ODTA1

CLKA0B

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0

CKEA1

WEA0B
WEA1B

RSVD#1
RSVD#2
RSVD#3

RSVD#5
RSVD#6

RSVD#9

RSVD#11

CLKA0

CLKA1

MAA0

G24

MAA1

J23

MAA2

H24

MAA3

J24

MAA4

H26

MAA5

J26

MAA6

H21

MAA7

G21
H19
H20
L13

MAA11 MAB11

G16

MAA12

J16

A_BA2

H16

A_BA0

J17

A_BA1

H17

DQMA#0

A32

DQMA#1

C32

DQMA#2

D23

DQMA#3

E22

DQMA#4

C14

DQMA#5

A14

DQMA#6

E10

DQMA#7

D9

QSA0

C34

QSA1

D29

QSA2

D25

QSA3

E20

QSA4

E16

QSA5

E12

QSA6

J10

QSA7

D7

QSA#0

A34

QSA#1

E30

QSA#2

E26

QSA#3

C20

QSA#4

C16

QSA#5

C12

QSA#6

J11

QSA#7

F8

J21
G19

H27
G27

J14
H14

K23
K19

K20
K17

K24
K27

M13
K16

K21
J20

K26
L15

AF28
AG28
AL31

H23
J19

T8
W8

R467

R467

R469

R469

R474

R474

R478

R478

MDA[0..63]43

+1.5VS

12

12

+1.5VS

12

12

D D

C C

100_0402_1%

100_0402_1%

B B

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

ODTA0
ODTA1

CLKA0
CLKA0#

CLKA1
CLKA1#

RASA0#
RASA1#

CASA0#
CASA1#

CSA0#_0

CSA1#_0

CKEA0
CKEA1

WEA0#
WEA1#

MAA[0..12]

A_BA[0..2]

DQMA#[0..7]

QSA[0..7]

QSA#[0..7]

ODTA0 43
ODTA1 43

CLKA0 43
CLKA0# 43

CLKA1 43
CLKA1# 43

RASA0# 43
RASA1# 43

CASA0# 43
CASA1# 43

CSA0#_0 43

CSA1#_0 43

CKEA0 43
CKEA1 43

WEA0# 43
WEA1# 43

MAA[0..12] 43

A_BA[0..2] 43

DQMA#[0..7] 43

QSA[0..7] 43

QSA#[0..7] 43

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

100_0402_1%

R468

R468

R470

R470

R475

R475

R479

R479

+1.5VS

+1.5VS

12

12

12

12

MDB[0..63]44

MVREFDB

1

C627

C627

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

MVREFSB

1

C630

C630

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

MDB[0..63]

1K_0402_5%

1K_0402_5%

1 2

R476

R476

4.7K_0402_5%

4.7K_0402_5%

R471

R471

12

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

MVREFDB
MVREFSB

TESTEN

TEST_MCLK
TEST_YCLK

12

R473

R473

4.7K_0402_5%

4.7K_0402_5%

U28D

U28D

C5

DQB_0

C3

DQB_1

E3

DQB_2

E1

DQB_3

F1

DQB_4

F3

DQB_5

F5

DQB_6

G4

DQB_7

H5

DQB_8

H6

DQB_9

J4

DQB_10

K6

DQB_11

K5

DQB_12

L4

DQB_13

M6

DQB_14

M1

DQB_15

M3

DQB_16

M5

DQB_17

N4

DQB_18

P6

DQB_19

P5

DQB_20

R4

DQB_21

T6

DQB_22

T1

DQB_23

U4

DQB_24

V6

DQB_25

V1

DQB_26

V3

DQB_27

Y6

DQB_28

Y1

DQB_29

Y3

DQB_30

Y5

DQB_31

AA4

DQB_32

AB6

DQB_33

AB1

DQB_34

AB3

DQB_35

AD6

DQB_36

AD1

DQB_37

AD3

DQB_38

AD5

DQB_39

AF1

DQB_40

AF3

DQB_41

AF6

DQB_42

AG4

DQB_43

AH5

DQB_44

AH6

DQB_45

AJ4

DQB_46

AK3

DQB_47

AF8

DQB_48

AF9

DQB_49

AG8

DQB_50

AG7

DQB_51

AK9

DQB_52

AL7

DQB_53

AM8

DQB_54

AM7

DQB_55

AK1

DQB_56

AL4

DQB_57

AM6

DQB_58

AM1

DQB_59

AN4

DQB_60

AP3

DQB_61

AP1

DQB_62

AP5

DQB_63

Y12

MVREFDB

AA12

MVREFSB

AD28

TESTEN

AK10

CLKTESTA

AL10

CLKTESTB

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

MAB_10
MAB_11

MAB_12
MAB_13/BA2
MAB_14/BA0
MAB_15/BA1

DQMB_0
DQMB_1
DQMB_2
DQMB_3
DQMB_4
DQMB_5
DQMB_6

MEMORY INTERFACE B

MEMORY INTERFACE B

DQMB_7

QSB_0/RDQSB_0
QSB_1/RDQSB_1
QSB_2/RDQSB_2
QSB_3/RDQSB_3
QSB_4/RDQSB_4
QSB_5/RDQSB_5
QSB_6/RDQSB_6
QSB_7/RDQSB_7

QSB_0B/WDQSB_0
QSB_1B/WDQSB_1
QSB_2B/WDQSB_2
QSB_3B/WDQSB_3
QSB_4B/WDQSB_4
QSB_5B/WDQSB_5
QSB_6B/WDQSB_6
QSB_7B/WDQSB_7

CLKB0B

CLKB1B

RASB0B

RASB1B

CASB0B

CASB1B

CSB0B_0
CSB0B_1

CSB1B_0
CSB1B_1

WEB0B
WEB1B

DRAM_RST

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9

ODTB0
ODTB1

CLKB0

CLKB1

CKEB0
CKEB1

T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

H3
H1
T3
T5
AE4
AF5
AK6
AK5

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

T7
W7

L9
L8

AD8
AD7

T10
Y10

W10
AA10

P10
L10

AD10
AC10

U10
AA11

N10
AB11

AH11

C628

C628

1

2

MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8MAA8
MAB9MAA9
MAB10MAA10

MAB12
B_BA2
B_BA0
B_BA1

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

ODTB0
ODTB1

MAB0

P8

ref134-0 schematic sug gested

CLKB0
CLKB0#

CLKB1
CLKB1#

RASB0#
RASB1#

CASB0#
CASB1#

CSB0#_0

CSB1#_0

CKEB0
CKEB1

WEB0#
WEB1#

12

R472

R472

4.7K_0402_5%

4.7K_0402_5%

1 2

R477

@R477

@

4.7K_0402_5%

4.7K_0402_5%

MAB[0..12]

B_BA[0..2]

DQMB#[0..7]

QSB[0..7]

QSB#[0..7]

ODTB0 44
ODTB1 44

CLKB0 44
CLKB0# 44

CLKB1 44
CLKB1# 44

RASB0# 44
RASB1# 44

CASB0# 44
CASB1# 44

CSB0#_0 44

CSB1#_0 44

CKEB0 44
CKEB1 44

WEB0# 44
WEB1# 44

MAB[0..12] 44

B_BA[0..2] 44

DQMB#[0..7] 44

QSB[0..7] 44

QSB#[0..7] 44

+1.5VS

VRAM_RST# 43,44

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

M96 MEMORY INTERFACE

M96 MEMORY INTERFACE

M96 MEMORY INTERFACE

LA-5151P

LA-5151P

LA-5151P

1

R10 (A00)

R10 (A00)

40 60Friday, June 12, 2009

40 60Friday, June 12, 2009

40 60Friday, June 12, 2009

R10 (A00)

5

For DDR3 , MVDDQ=1.5V

+1.5VS

D D

C668

10U_0805_6.3V6M~D

C668

10U_0805_6.3V6M~D

1

2

+3VS_DELAY

C C

+1.8VS

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

C663

1U_0402_6.3V4Z~D

C663

1U_0402_6.3V4Z~D

1

1

2

2

C645

1U_0402_6.3V4Z~D

C645

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

1

2

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

C659

10U_0805_6.3V6M~D

C659

10U_0805_6.3V6M~D

1

1

2

2

+1.8VS

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C631

C631

1

2

C646

C646

1

2

C669

C669

1

2

M96 only

+1.5VS

B B

A A

5

+1.8VS

+GPU_CORE

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

+1.5VS

L49

L49

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

L50

L50

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

L55

L55

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

VGA_GPIO21= 0V FOR BACK BIASING DISABLED
N FET A = OFF, P FET B = OFF, N FET C = ON
+BBP = +VGA_CORE

VGA_GPIO21= +3.3V FOR BACK BIASING ENABLED
N FET A = ON, P FET B = ON, N FET C = OFF
+BBP = +1.8VS

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

C632

C632

C647

C647

C660

C660

L45

L45

L46

L46

L47

L47

L48

L48

M96@

M96@

12

4

U28E

C634

1U_0402_6.3V4Z~D

C634

1U_0402_6.3V4Z~D

C633

1U_0402_6.3V4Z~D

C633

1U_0402_6.3V4Z~D

1

1

2

2

C648

1U_0402_6.3V4Z~D

C648

1U_0402_6.3V4Z~D

C649

1U_0402_6.3V4Z~D

C649

1U_0402_6.3V4Z~D

1

1

2

2

C670

10U_0805_6.3V6M~D

C670

10U_0805_6.3V6M~D

C661

1U_0402_6.3V4Z~D

C661

1U_0402_6.3V4Z~D

1

1

2

2

12

12

12

C699

10U_0805_6.3V6M~D

C699

10U_0805_6.3V6M~D

1

2

12

12

C721

1U_0402_6.3V4Z~D

C721

1U_0402_6.3V4Z~D

1

2

12

C723

10U_0603_6.3V6M~D

C723

10U_0603_6.3V6M~D

2

1

1

2

1

2

1

2

1

2

1

2

1

2

1

2

2

1

C635

1U_0402_6.3V4Z~D

C635

1U_0402_6.3V4Z~D

C650

1U_0402_6.3V4Z~D

C650

1U_0402_6.3V4Z~D

C671

1U_0402_6.3V4Z~D

C671

1U_0402_6.3V4Z~D

C673

10U_0805_6.3V6M~D

C673

10U_0805_6.3V6M~D

C686

10U_0805_6.3V6M~D

C686

10U_0805_6.3V6M~D

C700

1U_0402_6.3V4Z~D

C700

1U_0402_6.3V4Z~D

+VDDRHB

C722

0.1U_0402_16V4Z~D

C722

0.1U_0402_16V4Z~D

C724

0.1U_0402_16V4Z~D

C724

0.1U_0402_16V4Z~D

C636

1U_0402_6.3V4Z~D

C636

1U_0402_6.3V4Z~D

C664

1U_0402_6.3V4Z~D

C664

1U_0402_6.3V4Z~D

1

1

2

2

C652

1U_0402_6.3V4Z~D

C652

1U_0402_6.3V4Z~D

C651

1U_0402_6.3V4Z~D

C651

1U_0402_6.3V4Z~D

1

1

2

2

C672

1U_0402_6.3V4Z~D

C672

1U_0402_6.3V4Z~D

C662

1U_0402_6.3V4Z~D

C662

1U_0402_6.3V4Z~D

1

1

2

2

C675

0.1U_0402_16V4Z~D

C675

0.1U_0402_16V4Z~D

C674

1U_0402_6.3V4Z~D

C674

1U_0402_6.3V4Z~D

1

1

2

2

C687

1U_0402_6.3V4Z~D

C687

1U_0402_6.3V4Z~D

C688

1U_0402_6.3V4Z~D

C688

1U_0402_6.3V4Z~D

1

1

2

C701

0.1U_0402_16V4Z~D

C701

0.1U_0402_16V4Z~D

1

2

C712

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

M96@C712

M96@

2

2

+VDDR4_5

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

+VDD_CT

+VDDR3

C713

M96@C713

M96@

+VDDRHA

500mA

C725

1U_0402_6.3V4Z~D

C725

1U_0402_6.3V4Z~D

2

+PCIE_PVDD

1

M97 only

C736

C736

+GPU_CORE

+SPV10

136mA

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

C735

0.1U_0402_16V4Z~D

C735

0.1U_0402_16V4Z~D

C734

10U_0603_6.3V6M~D

C734

10U_0603_6.3V6M~D

2

1

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

2

2

1

1

4000mA

136mA

60mA

170mA

170mA

500mA

68mA

C737

C737

1

2

AC7

AD11

AF7

AG10

AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10

K11
K13

L12
L16
L21
L23
L26

M11

N11

R11
U11

Y11

AF26

AF27
AG26
AG27

AF23

AF24
AG23
AG24

AF13

AF15
AG13
AG15

AD12

AF11

AF12
AG11

M20
M21

V12
U12

AB37

AM10

AN9

AN10

AA13

Y13

C738

0.1U_0402_16V4Z~D

C738

0.1U_0402_16V4Z~D

U28E

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15

J7

VDDR1#16

J9

VDDR1#17
VDDR1#18
VDDR1#19

K8

VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25

L7

VDDR1#26
VDDR1#27
VDDR1#28

P7

VDDR1#29
VDDR1#30
VDDR1#31

U7

VDDR1#32
VDDR1#33

Y7

VDDR1#34

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4

VDDRHA
VSSRHA

VDDRHB
VSSRHB

PCIE_PVDD

H7

NC_MPV18#1

H8

NC_MPV18#2

NC_SPV18

SPV10

SPVSS

BBP#1
BBP#2

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

MEM I/O

MEM I/O

LEVEL

LEVEL
TRANSLATION

TRANSLATION

I/O

I/O

MEM CLK

MEM CLK

PLL

PLL

BACK BIAS

BACK BIAS

3

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9

AA31
AA32
AA33
AA34
V28
W29
W30
Y31

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

AA15
AA17
AA20
AA22
AA24
AA27
AB13
AB16
AB18
AB21
AB23
AB26
AB28
AC12
AC15
AC17
AC20
AC22
AC24
AC27
AD13
AD16
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
M16
M18
M23
M26
N15
N17
N20
N22
N24
N27
R13
R16
R18
R21
R23
R26
T15
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V15
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AH27
AH28

M15
N13
R12
T12

504mA

2000mA

+VDDC1

+PCIE_VDDR

1

2

1

2

1

2

1

2

1

2

1

2

1

2

375mA

1

2

C637

0.1U_0402_16V4Z~D

C637

0.1U_0402_16V4Z~D

1

2

C665

1U_0402_6.3V4Z~D

C665

1U_0402_6.3V4Z~D

1

2

C676

1U_0402_6.3V4Z~D

C676

1U_0402_6.3V4Z~D

C689

1U_0402_6.3V4Z~D

C689

1U_0402_6.3V4Z~D

C702

1U_0402_6.3V4Z~D

C702

1U_0402_6.3V4Z~D

C1533

1U_0402_6.3V4Z~D

C1533

1U_0402_6.3V4Z~D

C714

10U_0805_6.3V6M~D

C714

10U_0805_6.3V6M~D

C731

1U_0402_6.3V4Z~D

C731

1U_0402_6.3V4Z~D

POWER

POWER

PCIE

PCIE

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

CORE

CORE

ISOLATED

ISOLATED
CORE I/O

CORE I/O

VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4

C638

0.1U_0402_16V4Z~D

C638

0.1U_0402_16V4Z~D

C654

1U_0402_6.3V4Z~D

C654

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

1

2

1

2

C639

1U_0402_6.3V4Z~D

C639

1U_0402_6.3V4Z~D

1

2

C655

1U_0402_6.3V4Z~D

C655

1U_0402_6.3V4Z~D

1

2

C677

C677

1

2

C690

C690

1

2

C703

C703

1

2

1

2

C715

C715

1

2

C732

10U_0805_6.3V6M~D

C732

10U_0805_6.3V6M~D

1

2

2

C640

1U_0402_6.3V4Z~D

C640

1U_0402_6.3V4Z~D

C641

1U_0402_6.3V4Z~D

C641

1U_0402_6.3V4Z~D

1

1

2

2

C656

1U_0402_6.3V4Z~D

C656

1U_0402_6.3V4Z~D

C666

1U_0402_6.3V4Z~D

C666

1U_0402_6.3V4Z~D

1

1

2

2

C678

1U_0402_6.3V4Z~D

C678

1U_0402_6.3V4Z~D

C691

1U_0402_6.3V4Z~D

C691

1U_0402_6.3V4Z~D

C705

1U_0402_6.3V4Z~D

C705

1U_0402_6.3V4Z~D

C704

1U_0402_6.3V4Z~D

C704

1U_0402_6.3V4Z~D

1

2

C1535

1U_0402_6.3V4Z~D

C1535

1U_0402_6.3V4Z~D

C1536

1U_0402_6.3V4Z~D

C1536

1U_0402_6.3V4Z~D

1

2

C716

10U_0805_6.3V6M~D

C716

10U_0805_6.3V6M~D

C717

10U_0805_6.3V6M~D

C717

10U_0805_6.3V6M~D

1

2

L54

L54

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

C733

C733

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

1

2

12

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

C642

C642

1

2

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

C657

C657

1

2

1

2

C706

C706

1

2

C1537

C1537

1

2

C718

C718

1

2

A00 Change

+GPU_CORE

L44

L44

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C643

C643

C644

10U_0805_6.3V6M~D

C644

10U_0805_6.3V6M~D

1

2

C658

C658

C667

10U_0805_6.3V6M~D

C667

10U_0805_6.3V6M~D

1

2

C681

1U_0402_6.3V4Z~D

C681

1U_0402_6.3V4Z~D

C695

1U_0402_6.3V4Z~D

C695

1U_0402_6.3V4Z~D

1

2

C708

1U_0402_6.3V4Z~D

C708

1U_0402_6.3V4Z~D

C707

1U_0402_6.3V4Z~D

C707

1U_0402_6.3V4Z~D

1

2

C1539

1U_0402_6.3V4Z~D

C1539

1U_0402_6.3V4Z~D

C1538

1U_0402_6.3V4Z~D

C1538

1U_0402_6.3V4Z~D

1

2

C720

47U_0805_4V6

C720

47U_0805_4V6

C719

47U_0805_4V6

C719

47U_0805_4V6

1

2

12

PCIE_VDDC

C683

1U_0402_6.3V4Z~D

C683

1U_0402_6.3V4Z~D

1

2

C696

1U_0402_6.3V4Z~D

C696

1U_0402_6.3V4Z~D

1

2

C709

1U_0402_6.3V4Z~D

C709

1U_0402_6.3V4Z~D

1

2

C1540

1U_0402_6.3V4Z~D

C1540

1U_0402_6.3V4Z~D

1

2

47U_0805_4V6

47U_0805_4V6

1

2

C1554

C1554

+1.8VS

+1.1VS

1

2

1

2

1

2

1

2

1

2

1

C684

1U_0402_6.3V4Z~D

C684

1U_0402_6.3V4Z~D

C685

1U_0402_6.3V4Z~D

C685

1U_0402_6.3V4Z~D

1

2

C698

1U_0402_6.3V4Z~D

C698

1U_0402_6.3V4Z~D

C697

1U_0402_6.3V4Z~D

C697

1U_0402_6.3V4Z~D

1

2

C711

1U_0402_6.3V4Z~D

C711

1U_0402_6.3V4Z~D

C710

1U_0402_6.3V4Z~D

C710

1U_0402_6.3V4Z~D

1

2

C1541

1U_0402_6.3V4Z~D

C1541

1U_0402_6.3V4Z~D

C1542

1U_0402_6.3V4Z~D

C1542

1U_0402_6.3V4Z~D

1

2

C1545

1U_0402_6.3V4Z~D

C1545

1U_0402_6.3V4Z~D

C1544

1U_0402_6.3V4Z~D

C1544

1U_0402_6.3V4Z~D

1

2

C1555

47U_0805_4V6

C1555

47U_0805_4V6

1

1

2

2

+GPU_CORE

R03 add

A00 add

C1556

47U_0805_4V6

C1556

47U_0805_4V6

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

M96_Power/GND

M96_Power/GND

M96_Power/GND

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

41 60Friday, June 12, 2009

41 60Friday, June 12, 2009

41 60Friday, June 12, 2009

1

R10 (A00)

5

U28F

U28F

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

PCIE_VSS#10

J34

D D

C C

B B

A A

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#101

F17

GND#102

F19

GND#103

F21

GND#104

F23

GND#105

F25

GND#106

F27

GND#107

F29

GND#108

F31

GND#109

F33

GND#110

F7

GND#111

F9

GND#112

G2

GND#113

G6

GND#114

H9

GND#115

J2

GND#116

J27

GND#117

J6

GND#118

J8

GND#119

K14

GND#120

K7

GND#121

L11

GND#122

L17

GND#123

L2

GND#124

L22

GND#125

L24

GND#126

L6

GND#127

M17

GND#128

M22

GND#129

M24

GND#130

N16

GND#131

N18

GND#132

N2

GND#133

N21

GND#134

N23

GND#135

N26

GND#136

N6

GND#137

R15

GND#138

R17

GND#139

R2

GND#140

R20

GND#141

R22

GND#142

R24

GND#143

R27

GND#144

R6

GND#145

T11

GND#146

T13

GND#147

T16

GND#148

T18

GND#149

T21

GND#150

T23

GND#151

T26

GND#152

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#162

V18

GND#163

V21

GND#164

V23

GND#165

V26

GND#166

W2

GND#167

W6

GND#168

Y15

GND#169

Y17

GND#170

Y20

GND#171

Y22

GND#172

Y24

GND#173

Y27

GND#174

U13

GND#175

V13

GND#176

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

5

GND

GND

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99

GND#100

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AH29
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

A39
AW1
AW39

+1.8VS

+1.1VS

4

L62

L62

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

L58

L58

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

4

3

U28H

U28H

+DPC_VDD10

200mA

12

200mA

100mA

200mA

100mA

R493

R493

150_0402_1%

150_0402_1%

AP20

NC_DPC_VDD18#1

AP21

NC_DPC_VDD18#2

AP13

DPC_VDD10#1

AT13

DPC_VDD10#2

AN17

DPC_VSSR#1

AP16

DPC_VSSR#2

AP17

DPC_VSSR#3

AW14

DPC_VSSR#4

AW16

DPC_VSSR#5

AP22

NC_DPD_VDD18#1

AP23

NC_DPD_VDD18#2

AP14

DPD_VDD10#1

AP15

DPD_VDD10#2

AN19

DPD_VSSR#1

AP18

DPD_VSSR#2

AP19

DPD_VSSR#3

AW20

DPD_VSSR#4

AW22

DPD_VSSR#5

AW18

DPCD_CALR

DP E/F POWER

DP E/F POWER

AH34

DPE_VDD18#1

AJ34

DPE_VDD18#2

AL33

DPE_VDD10#1

AM33

DPE_VDD10#2

AN34

DPE_VSSR#1

AP39

DPE_VSSR#2

AR39

DPE_VSSR#3

AU37

DPE_VSSR#4

AW35

DPE_VSSR#5

AF34

DPF_VDD18#1

AG34

DPF_VDD18#2

AK33

DPF_VDD10#1

AK34

DPF_VDD10#2

AF39

DPF_VSSR#1

AH39

DPF_VSSR#2

AK39

DPF_VSSR#3

AL34

DPF_VSSR#4

AM34

DPF_VSSR#5

12

AM39

DPEF_CALR

216-0729002 A12 M96_BGA962

216-0729002 A12 M96_BGA962

M96@

M96@

M97 only

R483 0_0603_5%R483 0_0603_5%

+1.1VS

200mA

12

M97 only M97 only

R485 0_0603_5%R485 0_0603_5%

+1.1VS

12

C871

10U_0603_6.3V6M~D

C871

10U_0603_6.3V6M~D

1

1

2

2

12

C746

10U_0603_6.3V6M~D

C746

10U_0603_6.3V6M~D

1

1

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C870

C870

C747

C747

C869

1U_0402_6.3V4Z~D

C869

1U_0402_6.3V4Z~D

1

2

C748

1U_0402_6.3V4Z~D

C748

1U_0402_6.3V4Z~D

1

2

+DPE_VDD18

+DPE_VDD10

+DPE_VDD18

+DPE_VDD10

12

R486

R486

150_0402_1%

150_0402_1%

+DPE_VDD18

+DPE_VDD10

+DPE_VDD18

+DPE_VDD10

+DPD_VDD10

DP A/B POWERDP C/D POWER

DP A/B POWERDP C/D POWER

NC_DPA_VDD18#1
NC_DPA_VDD18#2

DPA_VDD10#1
DPA_VDD10#2

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

NC_DPB_VDD18#1
NC_DPB_VDD18#2

DPB_VDD10#1
DPB_VDD10#2

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DP PLL POWER

DPA_PVDD
DPA_PVSS

DPB_PVDD
DPB_PVSS

DPC_PVDD

DPC_PVSS

DPD_PVDD

DPD_PVSS

DPE_PVDD
DPE_PVSS

NC_DPF_PVDD

NC_DPF_PVSS

AN24
AP24

AP31
AP32

AN27
AP27
AP28
AW24
AW26

AP25
AP26

AN33
AP33

AN29
AP29
AP30
AW30
AW32

AW28

AU28
AV27

AV29
AR28

AU18
AV17

AV19
AR18

AM37
AN38

AL38
AM35

+DPA_VDD10

20mA

20mA

20mA

20mA

20mA

+DPE_PVDD

2

M97 only

1

2

200mA

+DPB_VDD10

2

1

R487

R487
150_0402_1%

150_0402_1%

1 2

+DPA_PVDD

+DPB_PVDD

+DPC_PVDD

+DPD_PVDD

+DPE_PVDD

+DPE_PVDD

200mA

C739

0.1U_0402_16V4Z~D

C739

0.1U_0402_16V4Z~D

C742

0.1U_0402_16V4Z~D

C742

0.1U_0402_16V4Z~D

1

2

1

L56

L56

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C740

1U_0402_6.3V4Z~D

C740

1U_0402_6.3V4Z~D

1

1

2

2

C743

1U_0402_6.3V4Z~D

C743

1U_0402_6.3V4Z~D

2

1

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C872

C872

12

C741

10U_0603_6.3V6M~D

C741

10U_0603_6.3V6M~D

L57

L57

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C744

10U_0603_6.3V6M~D

C744

10U_0603_6.3V6M~D

1

2

1

2

1

2

12

C745

C745

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C749

C749

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C753

0.1U_0402_16V4Z~D

C753

0.1U_0402_16V4Z~D

For M96/92, DPx_VDD=1.1V

+1.1VS

+1.1VS

C755

0.1U_0402_16V4Z~D

C755

0.1U_0402_16V4Z~D

C756

1U_0402_6.3V4Z~D

C756

1U_0402_6.3V4Z~D

1

2

1

2

2

1

2

1

C757

0.1U_0402_16V4Z~D

C757

0.1U_0402_16V4Z~D

2

1

C884

1U_0402_6.3V4Z~D

C884

1U_0402_6.3V4Z~D

1

2

1

2

C759

1U_0402_6.3V4Z~D

C759

1U_0402_6.3V4Z~D

1

2

L64

L64

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C885

10U_0603_6.3V6M~D

C885

10U_0603_6.3V6M~D

L60

L60
BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C754

10U_0603_6.3V6M~D

C754

10U_0603_6.3V6M~D

L61

L61

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

C758

10U_0603_6.3V6M~D

C758

10U_0603_6.3V6M~D

R488

R488
0_0603_5%

0_0603_5%

12

R489

R489
0_0603_5%

0_0603_5%

12

12

12

12

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

M96_Power/GND

M96_Power/GND

M96_Power/GND

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

42 60Friday, June 12, 2009

42 60Friday, June 12, 2009

42 60Friday, June 12, 2009

1

R10 (A00)

5

VREFCA_A1
VREFDA_Q1

D D

A_BA040
A_BA140
A_BA240

CLKA040
CLKA0#40
CKEA040

ODTA040
CSA0#_040
RASA0#40
CASA0#40
WEA0#40

QSA2
QSA0

DQMA#2
DQMA#0

QSA#2
QSA#0

VRAM_RST#

12

M96@

M96@

R494

R494
243_0402_1%

243_0402_1%

+1.5VS +1.5VS

M96@

M96@

R498

R498

4.99K_0402_1%

4.99K_0402_1%

M96@

M96@

R506

R506

4.99K_0402_1%

4.99K_0402_1%

C768

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

M96@C768

M96@

2

C801

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

M96@C801

M96@

2

MAA[12..0]40

DQMA#[7..0]40

QSA[7..0]40

QSA#[7..0]40

M96@ R514

M96@

1 2

M96@ R515

M96@

1 2

1 2

1 2

MDA[0..63]

VRAM_RST#40,44

R514
56_0402_1%

56_0402_1%

R515
56_0402_1%

56_0402_1%

R516

M96@R516

M96@

56_0402_1%

56_0402_1%

R517

M96@R517

M96@

56_0402_1%

56_0402_1%

5

MDA[0..63]40

C C

B B

CLKA040

CLKA0#40

CLKA140

A A

CLKA1#40

U30

U30

M8

VREFCA

H1

VREFDQ

MAA0

N3

A0

MAA1

P7

A1

MAA2

P3

A2

N2

A3

MAA4

P8

A4

MAA5

P2

A5

MAA6

R8

A6

MAA7

R2

A7

MAA8

T8

A8

MAA9

R3

A9

MAA10

L7

A10/AP

MAA11

R7

A11

MAA12

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

12

VREFCA_A1

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

12

M96@

M96@

C760

C760

2

+1.5VS +1.5VS

C769

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

M96@C769

M96@

2

+1.5VS

C802

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

M96@C802

M96@

2

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

M96@

M96@

R499

R499

4.99K_0402_1%

4.99K_0402_1%

M96@

M96@

R507

R507

4.99K_0402_1%

4.99K_0402_1%

C770

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C770

M96@

2

2

C803

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

M96@C803

M96@

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

12

12

C771

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

M96@C771

M96@

2

C804

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

M96@C804

M96@

2

4

MDA22

E3

MDA19

F7

MDA21

F2

MDA18

F8

MDA23

H3

MDA16

H8

MDA20

G2

MDA17

H7

MDA0

D7

MDA5

C3

MDA1

C8

MDA7

C2

MDA3

A7

MDA4

A2

MDA2

B8

MDA6

A3

+1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFDA_Q1

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

M96@

M96@

C761

C761

2

C773

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C772

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C773

M96@

M96@C772

M96@

2

2

C806

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C805

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

M96@C806

M96@

M96@C805

M96@

2

2

4

VREFCA_A2
VREFDA_Q2

MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA0
CLKA0#
CKEA0

ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#

QSA3
QSA1

DQMA#3
DQMA#1

QSA#3
QSA#1

VRAM_RST#

12

M96@

M96@

R495

R495
243_0402_1%

243_0402_1%

M96@

M96@

R500

R500

4.99K_0402_1%

4.99K_0402_1%

M96@

M96@

R508

R508

4.99K_0402_1%

4.99K_0402_1%

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C774

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C775

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C774

M96@

M96@C775

M96@

2

2

VRAM P/N :
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9

C776

M96@C776

M96@

12

12

U31

U31

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

1

M96@

M96@

C762

C762

2

1

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

+1.5VS+1.5VS

M96@

M96@

R501

R501

4.99K_0402_1%

4.99K_0402_1%

VREFCA_A2 VREFDA_Q2

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

M96@

M96@

R509

R509

4.99K_0402_1%

4.99K_0402_1%

C779

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C778

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C777

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C779

M96@

M96@C778

M96@

M96@C777

M96@

2

2

3

M96@

M96@

R496

R496
243_0402_1%

243_0402_1%

C782

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

M96@C782

M96@

2

ODTA140
CSA1#_040
RASA1#40
CASA1#40
WEA1#40

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

VREFCA_A3
VREFDA_Q3

MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA140
CLKA1#40
CKEA140

QSA4
QSA5

DQMA#4
DQMA#5

QSA#4
QSA#5

VRAM_RST#

12

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

C783

M96@C783

M96@

MDA25

E3

MDA30

F7

MDA24

F2

MDA29

F8

MDA26

H3

MDA31

H8

MDA27

G2

MDA28

H7

MDA15

D7

MDA11

C3

MDA14

C8

MDA10

C2

MDA13

A7

MDA9

A2

MDA12

B8

MDA8

A3

+1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

12

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

12

M96@

M96@

C763

C763

2

C780

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C781

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C780

M96@

M96@C781

M96@

2

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

MAA0
MAA1
MAA2
MAA3MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9

1

2

M96@

M96@

R502

R502

M96@

M96@

R510

R510

+1.5VS

C784

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

M96@C784

M96@

+1.5VS

U32

U32

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

12

VREFCA_A3

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

12

M96@

M96@

C764

C764

2

C785

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C786

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C785

M96@

M96@C786

M96@

2

2

C808

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C807

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

M96@C808

M96@

M96@C807

M96@

2

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

C787

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

M96@C787

M96@

2

C809

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

M96@C809

M96@

2

MDA35

E3

MDA32

F7

MDA38

F2

MDA34

F8

MDA37

H3

MDA36

H8

MDA39

G2

MDA33

H7

MDA43

D7

MDA44

C3

MDA40

C8

MDA45

C2

MDA42

A7

MDA46

A2

MDA41

B8

MDA47

A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5VS+1.5VS

12

M96@

M96@

R503

R503

12

M96@

M96@

R511

R511

C788

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C788

M96@

2

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C810

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

M96@C810

M96@

2

2

C789

M96@C789

M96@

C811

M96@C811

M96@

2

+1.5VS

+1.5VS

M96@

M96@

C765

C765

2

1

2

M96@

M96@

R497

R497
243_0402_1%

243_0402_1%

VREFDA_Q3

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

2

C790

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

M96@C790

M96@

2

1

MDA48
MDA51
MDA55
MDA54
MDA50
MDA52
MDA49

MDA53

MDA63
MDA58
MDA60
MDA59
MDA61
MDA56
MDA62
MDA57

+1.5VS

+1.5VS

+1.5VS+1.5VS

12

M96@

M96@

R505

R505

12

M96@

M96@

R513

R513

C797

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C796

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C797

M96@

M96@C796

M96@

2

2

C791

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

M96@C791

M96@

VREFCA_A4
VREFDA_Q4

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA1
CLKA1#
CKEA1

ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#

QSA6
QSA7

DQMA#6
DQMA#7

QSA#6
QSA#7

VRAM_RST#

12

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

M8

H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

J7
K7
K9

K1
L2

J3
K3
L3

F3
C7

E7
D3

G3

B7

T2

L8

J1
L1

J9
L9

M96@

M96@

R504

R504

M96@

M96@

R512

R512

+1.5VS

C792

M96@C792

M96@

U33

U33

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

12

12

M96@

M96@

C766

C766

C793

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

M96@C793

M96@

2

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

4.99K_0402_1%

4.99K_0402_1%

VREFCA_A4 VREFDA_Q4

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

4.99K_0402_1%

4.99K_0402_1%

2

C795

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C794

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C795

M96@

M96@C794

M96@

2

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

VRAM_DDR3 / Channel A

VRAM_DDR3 / Channel A

VRAM_DDR3 / Channel A

LA-5151P

LA-5151P

LA-5151P

1

M96@

M96@

C767

C767

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

2

C798

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

M96@C798

M96@

2

C800

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C799

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

M96@C800

M96@

M96@C799

M96@

2

2

R10 (A00)

R10 (A00)

43 60Friday, June 12, 2009

43 60Friday, June 12, 2009

43 60Friday, June 12, 2009

R10 (A00)

5

VREFCB_A1
VREFDB_Q1

D D

B_BA040
B_BA140
B_BA240

CLKB040
CLKB0#40
CKEB040

ODTB040
CSB0#_040
RASB0#40
CASB0#40
WEB0#40

QSB3
QSB1

DQMB#3
DQMB#1

QSB#3
QSB#1

VRAM_RST#

12

R518

R518

243_0402_1%

243_0402_1%

+1.5VS +1.5VS

R522

R522

4.99K_0402_1%

4.99K_0402_1%

R530

R530

4.99K_0402_1%

4.99K_0402_1%

C820

0.01U_0402_25V7K~D

C820

0.01U_0402_25V7K~D

1

2

C853

0.01U_0402_25V7K~D

C853

0.01U_0402_25V7K~D

1

2

MAB[12..0]40

DQMB#[7..0]40

QSB[7..0]40

QSB#[7..0]40

1 2

1 2

1 2

1 2

MDB[0..63]

VRAM_RST#40,43

R538

R538
56_0402_1%

56_0402_1%

R539

R539
56_0402_1%

56_0402_1%

R540

R540
56_0402_1%

56_0402_1%

R541

R541
56_0402_1%

56_0402_1%

5

MDB[0..63]40

C C

B B

CLKB040

CLKB0#40

CLKB140

A A

CLKB1#40

U34

U34

M8

VREFCA

H1

VREFDQ

MAB0

N3

A0

MAB1

P7

A1

MAB2

P3

A2

MAB3

N2

A3

MAB4

P8

A4

MAB5

P2

A5

MAB6

R8

A6

MAB7

R2

A7

MAB8

T8

A8

MAB9

R3

A9

MAB10

L7

A10/AP

MAB11

R7

A11

MAB12

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

12

VREFCB_A1

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

12

C812

C812

2

+1.5VS +1.5VS

C821

1U_0402_6.3V6K~D

C821

1U_0402_6.3V6K~D

1

2

+1.5VS

C854

10U_0603_6.3V6M~D

C854

10U_0603_6.3V6M~D

1

2

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

R523

R523

4.99K_0402_1%

4.99K_0402_1%

R531

R531

4.99K_0402_1%

4.99K_0402_1%

C822

1U_0402_6.3V6K~D

C822

1U_0402_6.3V6K~D

1

1

2

2

C855

10U_0603_6.3V6M~D

C855

10U_0603_6.3V6M~D

1

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

12

12

C823

1U_0402_6.3V6K~D

C823

1U_0402_6.3V6K~D

1

2

C856

10U_0603_6.3V6M~D

C856

10U_0603_6.3V6M~D

1

2

4

ODTB040
CSB0#_040
RASB0#40
CASB0#40
WEB0#40

R519

R519

R524

R524

4.99K_0402_1%

4.99K_0402_1%

R532

R532

4.99K_0402_1%

4.99K_0402_1%

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C827

1U_0402_6.3V6K~D

C827

1U_0402_6.3V6K~D

1

2

VREFCB_A2
VREFDB_Q2

B_BA040
B_BA140
B_BA240

CLKB040
CLKB0#40
CKEB040

QSB2
QSB0

DQMB#2
DQMB#0

QSB#2
QSB#0

VRAM_RST#

12

C828

C828

MDB26

E3

MDB28

F7

MDB27

F2

MDB31

F8

MDB25

H3

MDB30

H8

MDB24

G2

MDB29

H7

MDB15

D7

MDB10

C3

MDB12

C8

MDB11

C2

MDB13

A7

MDB9

A2

MDB14

B8

MDB8

A3

+1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

C813

C813

C824

1U_0402_6.3V6K~D

C824

1U_0402_6.3V6K~D

1

2

C857

10U_0603_6.3V6M~D

C857

10U_0603_6.3V6M~D

1

2

VREFDB_Q1

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

2

C825

1U_0402_6.3V6K~D

C825

1U_0402_6.3V6K~D

1

2

C858

10U_0603_6.3V6M~D

C858

10U_0603_6.3V6M~D

1

2

4

C826

1U_0402_6.3V6K~D

C826

1U_0402_6.3V6K~D

243_0402_1%

243_0402_1%

1

2

U35

U35

M8

VREFCA

H1

VREFDQ

MAB0

N3

A0

MAB1

P7

A1

MAB2

P3

A2

MAB3

N2

A3

MAB4

P8

A4

MAB5

P2

A5

MAB6

R8

A6

MAB7

R2

A7

MAB8

T8

A8

MAB9

R3

A9

MAB10

L7

A10/AP

MAB11

R7

A11

MAB12

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

12

VREFCB_A2 VREFDB_Q2

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

12

C814

C814

2

C829

1U_0402_6.3V6K~D

C829

1U_0402_6.3V6K~D

1

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

+1.5VS+1.5VS +1.5VS+1.5VS

R525

R525

4.99K_0402_1%

4.99K_0402_1%

R533

R533

4.99K_0402_1%

4.99K_0402_1%

C830

1U_0402_6.3V6K~D

C830

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

2

2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C831

C831

3

R520

R520

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C835

C835

1

2

C836

C836

ODTB140
CSB1#_040
RASB1#40
CASB1#40
WEB1#40

R526

R526

R534

R534

+1.5VS

+1.5VS

VREFCB_A3
VREFDB_Q3

B_BA040
B_BA140
B_BA240

CLKB140
CLKB1#40
CKEB140

QSB4
QSB5

DQMB#4
DQMB#5

QSB#4
QSB#5

VRAM_RST#

12

MDB22

E3

MDB20

F7

MDB21

F2

MDB18

F8

MDB19

H3

MDB17

H8

MDB23

G2

MDB16

H7

MDB1

D7

MDB6

C3

MDB0

C8

MDB4

C2

MDB3

A7

MDB7

A2

MDB2

B8

MDB5

A3

+1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

12

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

12

C815

C815

2

C833

1U_0402_6.3V6K~D

C833

1U_0402_6.3V6K~D

C832

1U_0402_6.3V6K~D

C832

1U_0402_6.3V6K~D

1

1

2

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

243_0402_1%

243_0402_1%

C834

1U_0402_6.3V6K~D

C834

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

2

2

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

12

12

C816

C816

C837

1U_0402_6.3V6K~D

C837

1U_0402_6.3V6K~D

1

2

C859

10U_0603_6.3V6M~D

C859

10U_0603_6.3V6M~D

1

2

U36

U36

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

4.99K_0402_1%

4.99K_0402_1%

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

4.99K_0402_1%

4.99K_0402_1%

2

C839

1U_0402_6.3V6K~D

C839

1U_0402_6.3V6K~D

C838

1U_0402_6.3V6K~D

C838

1U_0402_6.3V6K~D

1

1

2

2

C860

10U_0603_6.3V6M~D

C860

10U_0603_6.3V6M~D

C861

10U_0603_6.3V6M~D

C861

10U_0603_6.3V6M~D

1

1

2

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

12

R527

R527

12

R535

R535

C841

1U_0402_6.3V6K~D

C841

1U_0402_6.3V6K~D

C840

1U_0402_6.3V6K~D

C840

1U_0402_6.3V6K~D

1

1

2

2

C863

10U_0603_6.3V6M~D

C863

10U_0603_6.3V6M~D

C862

10U_0603_6.3V6M~D

C862

10U_0603_6.3V6M~D

1

1

2

2

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

C817

C817

2

1

2

2

U37

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

R528

R528

R536

R536

+1.5VS

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

U37

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

X76@

X76@

12

12

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

4.99K_0402_1%

4.99K_0402_1%

VREFCB_A4 VREFDB_Q4

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

C818

C818

4.99K_0402_1%

4.99K_0402_1%

2

C845

C845

C846

1U_0402_6.3V6K~D

C846

1U_0402_6.3V6K~D

C847

1U_0402_6.3V6K~D

C847

1U_0402_6.3V6K~D

1

1

2

2

MDB34
MDB37
MDB32
MDB39
MDB35
MDB38
MDB33
MDB36

MDB44
MDB43
MDB47
MDB41
MDB45
MDB40
MDB46
MDB42

+1.5VS

R521

R521
243_0402_1%

243_0402_1%

VREFDB_Q3VREFCB_A3

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

2

C842

1U_0402_6.3V6K~D

C842

1U_0402_6.3V6K~D

1

2

+1.5VS

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C843

C843

VREFCB_A4
VREFDB_Q4

B_BA040
B_BA140
B_BA240

CLKB140
CLKB1#40
CKEB140

ODTB140
CSB1#_040
RASB1#40
CASB1#40
WEB1#40

QSB6
QSB7

DQMB#6
DQMB#7

QSB#6
QSB#7

VRAM_RST#

12

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

C844

1U_0402_6.3V6K~D

C844

1U_0402_6.3V6K~D

1

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

M96 VRAM_DDR3 / Channel A

M96 VRAM_DDR3 / Channel A

M96 VRAM_DDR3 / Channel A

LA-5151P

LA-5151P

LA-5151P

1

MDB52

E3

MDB51

F7

MDB55

F2

MDB48

F8

MDB53

H3

MDB49

H8

MDB54

G2

MDB50

H7

MDB56

D7

MDB59

C3

MDB63

C8

MDB62

C2

MDB57

A7

MDB61

A2

MDB58

B8

MDB60

A3

+1.5VS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5VS+1.5VS

12

R529

R529

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

1

12

C819

C819

R537

R537

C848

1U_0402_6.3V6K~D

C848

1U_0402_6.3V6K~D

1

2

2

C850

1U_0402_6.3V6K~D

C850

1U_0402_6.3V6K~D

C849

1U_0402_6.3V6K~D

C849

1U_0402_6.3V6K~D

1

2

1

C851

1U_0402_6.3V6K~D

C851

1U_0402_6.3V6K~D

C852

1U_0402_6.3V6K~D

C852

1

2

1U_0402_6.3V6K~D

1

1

2

2

R10 (A00)

R10 (A00)

44 60Friday, June 12, 2009

44 60Friday, June 12, 2009

44 60Friday, June 12, 2009

R10 (A00)

5

7

7

6

6

5

D D

C C

5

4

4

3

3

2

2

1

1

MOLEX_87438-0743

MOLEX_87438-0743

PJPDC1

@PJPDC1

@

12

PL2

PL2

BLM18BD102SN1D_0603~D

BLM18BD102SN1D_0603~D

DOCK_PSIDPSID

12

PC2

PC2

100P_0402_50V8J~D

100P_0402_50V8J~D

4

ADPIN

12

PC3

PC3

1000P_0402_50V7K~D

1000P_0402_50V7K~D

12

12

PC4

PC4

100P_0402_50V8J~D

100P_0402_50V8J~D

PC5

PC5

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PL1

PL1

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC6

PC6

100P_0402_50V8J~D

100P_0402_50V8J~D

3

VIN

12

PC7

PC7

1000P_0402_50V7K~D

1000P_0402_50V7K~D

DOCK_PSID

2

1

3

PD5

@PD5

@

SM24_SOT23

SM24_SOT23

PR18

PR18

1 2

100K_0402_1%~D

100K_0402_1%~D

PR20

PR20

1 2

15K_0402_1%~D

15K_0402_1%~D

2

PR15 0_0402_5%~D@ PR15 0_ 0402_5%~D@

1 2

PQ2

PQ2

FDV301N_NL_SOT23-3~D

FDV301N_NL_SOT23-3~D

D

S

D

S

1 3

G

G

2

C

C

PQ3

PQ3

2

B

B

MMST3904-7-F_SOT323~D

MMST3904-7-F_SOT323~D

E

E

3 1

PR17

PR17

33_0402_5%~D

33_0402_5%~D

1 2

1

+3VALW+5VALW

2

3

PD4

PD4

DA204U_SOT323~D

DA204U_SOT323~D

1

+5VALW

12

PR19

PR19

10K_0402_1%~D

10K_0402_1%~D

@PR21

@

1 2

10K_0402_1%~D

10K_0402_1%~D

PR21

PR16

PR16

1 2

2.2K_0402_5%~D

2.2K_0402_5%~D

+5VALW

3

PD6

PD6

@

@

DA204U_SOT323~D

DA204U_SOT323~D

1

PS_ID 31

2

VIN

PD2

PJP1

PJP1
JUMP_43X118

12

PC11

PC11

MAX1615_IN

JUMP_43X118

@

@

112

12

0.22U_1206_25V7K

0.22U_1206_25V7K

1 2

PR14 0_0402_5%~DPR14 0_0402_5%~D

2

2

4

PD3

PD3

BATT+

B B

51ON#32

RTCVREF

12

PC13

A A

PC13

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

5

PU3

PU3

3

OUT

4

5/3+

12

RLS4148_LL34-2

RLS4148_LL34-2

CHGRTCP

PR11

PR11

100K_0402_5%~D

100K_0402_5%~D

PR12

PR12

22K_0402_5%~D

22K_0402_5%~D

1 2

1

IN

MAX1615_#SHDN

5

#SHDN

GND

MAX1615EUK+_SOT23-5~D

MAX1615EUK+_SOT23-5~D

2

PD2

RLS4148_LL34-2

RLS4148_LL34-2

1 2
12

PR10

PR10

68_1206_5%~D

68_1206_5%~D

PQ1

PQ1

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

13

32.8

32.8
12

PC12

PC12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

PC14

PC14
1U_0805_25V4Z~D

1U_0805_25V4Z~D

12

PR13

PR13
200_0805_5%

200_0805_5%

12

PR208

PR208

68_1206_5%~D

68_1206_5%~D

VS

PC194

PC194

@

@

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

VIN

12

PR191

@PR191

@

82.5K_0402_1%~D

82.5K_0402_1%~D

@PR193

@

1 2

12

12

PR206

PR206

@

@

19.6K_0402_1%~D

19.6K_0402_1%~D

.1U_0402_16V7K~D

.1U_0402_16V7K~D

8

PU17B

@ PU17B

@

5

P

+

7

O

6

-

G

LM393DR_SO8

LM393DR_SO8

4

@

@

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PR193
22K_0402_1%~D

22K_0402_1%~D

12

PC191

@PC191

@

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PC193

PC193

1 2

VinDe_IN3N41

VinDe_Ref

@PR204

@

56K_0402_5%~D

56K_0402_5%~D

1 2

PR202

@ PR202

@

1M_0402_1%~D

1M_0402_1%~D

1 2

VS

8

3

P

+

2

-

G

LM393DR_SO8

LM393DR_SO8

4

PR201

@PR201

@

10K_0402_5%~D

10K_0402_5%~D

12

PR204

PC192

PC192

@

@

O

PU17A

@PU17A

@

12

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

RLZ4.3B_LL34

RLZ4.3B_LL34

RTCVREF

@PD1

@

PD1

VIN

12

PR205

@PR205

@

10K_0402_5%~D

10K_0402_5%~D

12

3.3V

Vin Detector

Max. typ. Min.

L-->H 18.234 17.841 17.449
H-->L 17.597 17.210 16.813

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PR192

@PR192

@

1K_0402_5%~D

1K_0402_5%~D

1 2

VinDe_Out

12

401695

401695

401695

ACIN 21,25,31,46

PR203

@PR203

@

10K_0402_5%~D

10K_0402_5%~D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

A

A

45 60Friday, June 12, 2009

45 60Friday, June 12, 2009

45 60Friday, June 12, 2009

1

A

A

PQ4

VIN

12

PR23

PR23

1 1

3.3_1210_5%~D

3.3_1210_5%~D

12

PR27

PR27

3.3_1210_5%~D

3.3_1210_5%~D

1 2

PC19

PC19

2.2U_0805_25V6K

2.2U_0805_25V6K

2 2

1 2

90W adapter

Icharge=(Vsr set/Vvdac)*(0.1/PR29)= 3.3A

PQ4
FDS6675BZ_SO8

FDS6675BZ_SO8

8
7

5

PC16

PC16

0.01U_0603_50V7K~D

0.01U_0603_50V7K~D

PR28

PR28

340K_0402_1%~D

340K_0402_1%~D

1 2

ACDET

PR31

PR31

54.9K_0402_1%

54.9K_0402_1%

1 2

CP_SEL31

PR34

PR34
340K_0402_1%~D

340K_0402_1%~D

1 2

OVPSET

PR35

PR35

54.9K_0402_1%

54.9K_0402_1%

1 2

100K_0402_1%~D

100K_0402_1%~D

1 2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

ACGOOD#

4

CP_SEL

PC190

PC190

@

@

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

PR36

PR36

GATE

PC40

PC40

REGN

Iadapter=(Vacset /Vvdac)*(0.1/PR22) =4.16A

Input OVP : 22.3V

Input UVP : 16.98 V

3 3

Fsw : 300KH z

CHGVADJ31

PR44

PR44

210K_0402_1%~D

210K_0402_1%~D

1 2

65W adap ter(CP_SEL high)

Iadapter=(Vacse t/Vvdac)*(0.1/PR22 )=3A

PR46

PR46

1 2

B+

100_0805_5%~D

100_0805_5%~D

+5VALW

PR48

PR48

1 2

12

470K_0402_5%~D

470K_0402_5%~D

PD8

PD8

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

PR52

PR52

1 2

220K_0402_5%

220K_0402_5%

12

4 4

PC47

PC47

PR54

PR54

1 2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PQ15

PQ15

2

G

G

220K_0402_5%

220K_0402_5%

A

PQ12

PQ12

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

13

32.8

32.8

2

13

D

D

RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

S

PC44

PC44

B+_BIAS

1 2

100K_0402_1%~D

0.1U_0805_25V7M~N

0.1U_0805_25V7M~N

100K_0402_1%~D

ACOFF

1 2

PC45

PC45

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1
2
36

PC25

PC25

1 2

0.022U_0603_50V7~D

0.022U_0603_50V7~D

ACDRV_CHG#

2

G

G

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

12

PR50

PR50

B

PVCC_CHG

PQ5

PQ5
FDS6675BZ_SO8

FDS6675BZ_SO8

1
2
3 6

4

12

PR26

PR26

100K_0402_1%~D

100K_0402_1%~D

PC188 0.022U_0603_50V7~D@PC188 0.022U_0603_50V7~D@

12

PR37 0_0603_5%~D

PR37 0_0603_5%~D

12

CP setting

PR89

PR89

97.6K_0402_1%~D

97.6K_0402_1%~D

1 2

13

D

D

PQ25

PQ25

S

S

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

PQ9

PQ9

1 3

ACSET

12

PR43

PR43
0_0402_5%~D@

0_0402_5%~D@

VADJ

12

PR45

PR45
499K_0402_1%~D

499K_0402_1%~D

VREF

VREF

12

12

13

2

G

G

12

PR53

PR53

340K_0402_1%~D

340K_0402_1%~D

B

8
7

5

12

PC26

PC26

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PC33

@ PC33

@

PR30

PR30

1 2

60.4K_0402_1%

60.4K_0402_1%

+3VALW

1U_0603_10V6K~D

1U_0603_10V6K~D

+3VALW

PR49

PR49
200K_0402_1%~D

200K_0402_1%~D

2

G

G

D

D

PQ14

PQ14
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

0.015_2512_1%

0.015_2512_1%

1

2

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

12

12

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PC39

PC39

1 2

PR87

PR87

0_0402_5%~D

0_0402_5%~D

13

D

D

S

S

PR115 0_1206_5%~DPR115 0_1206_5%~D

PR22

PR22

4

3

PC24

PC24

12

ACN
ACP

ACSET

PR33

PR33
100K_0402_1%~D

100K_0402_1%~D

1 2

PC34

PC34

0.47U_0603_16V7K~D

0.47U_0603_16V7K~D

VREF

12

12

VADJ

/BATDRV

GATE

PQ13

PQ13
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

C

12

PU4

PU4

CHGEN#

1

CHGEN

PC27

PC27

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2

ACN

3

ACP

4

ACDRV

5

ACDET

6

ACSET

7

ACOP

8

OVPSET

9

AGND

10

VREF

PR86

PR86
0_0402_5%~D@

0_0402_5%~D@

11

VDAC

12

VADJ

13

ACGOOD

14

BATDRV

BQ24751ARHDR_QFN28_5X5

BQ24751ARHDR_QFN28_5X5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

LEARN

CELLS

SRP

SRN

BAT

TP

SRSET

IADAPT

ADP_I31

+COINCELL

RTCVREF

2

PD9

PD9

1

BAT54CW_SOT323~D

BAT54CW_SOT323~D

C

28

27

26

25

24

23

22

21

20

19

18

17

29

16

15

B+

PC20

PC20

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

PR25

PR25

2.2_0603_5%~D

2.2_0603_5%~D

1 2

DH_CHG

LX_CHG

PD7

PD7

RLS4148_LL34-2

RLS4148_LL34-2

REGN

12

PC29

PC29
1U_0603_10V6K~D

1U_0603_10V6K~D

DL_CHG

0_0402_5%~D

0_0402_5%~D

CELLS

1 2

SRP

SRN

12

PC41

PC41

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

SRSET

1 2

PR39

PR39

10_0603_5%~D

10_0603_5%~D

PC43

PC43

100P_0402_50V8J~D

100P_0402_50V8J~D

12

PR47

PR47
1K_0402_5%~D

1K_0402_5%~D

Z4012

3

+RTCVCC

1

PC46

PC46
1U_0603_10V4Z~D

1U_0603_10V4Z~D

2

PJP17

PJP17

2

JUMP_43X118@

JUMP_43X118@

FDS8884_SO8

FDS8884_SO8

1 2

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

ACOFF 31

PR88

PR88

ICHG setting

12

PR40

PR40
100K_0402_1%~D

100K_0402_1%~D

12

112

578

PQ6

PQ6

3 6

PC28

PC28

578

PQ8

PQ8

3 6

51.1K_0402_1%~D

51.1K_0402_1%~D

12

IREF Current

3.3V

COIN RTC Battery

+COINCELL

PC189

PC189

2200P_0402_50V7K~D

2200P_0402_50V7K~D

241

241

PR38

PR38

12

PC42

@PC42

@

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

3.3A

PJPRTC

PJPRTC

1

1

2

2

3

G1

4

G2

MOLEX_53261-0271_2P

MOLEX_53261-0271_2P

@

@

D

CHG_B+

12

PR32

PR32

@

@

4.7_1206_5%~D

4.7_1206_5%~D

PC35

PC35

@

@

680P_0603_50V7K~D

680P_0603_50V7K~D

IREF 31

D

PC214.7U_1206_25V6K~D PC214.7U_1206_25V6K~D

12

PC203

PC203

1 2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PL3

PL3

10UH_SIL1045RA-100PF_4.5A_30%

10UH_SIL1045RA-100PF_4.5A_30%

1 2

12

12

E

12

PR24

PR24
100K_0402_1%~D

PC171000P_0402_50V7K~D PC171000P_0402_50V7K~D

12

1 2

PC224.7U_1206_25V6K~D PC224.7U_1206_25V6K~D

1 2

12

PC30

PC30

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PC37

PC37

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR41

PR41

47K_0402_1%~D

47K_0402_1%~D

ACGOOD#

FSTCHG31

PC234.7U_1206_25V6K~D PC234.7U_1206_25V6K~D

PC181000P_0402_50V7K~D PC181000P_0402_50V7K~D

1 2

PR29

PR29

0.02_2512_1%~D

0.02_2512_1%~D

1

2

.1U_0402_16V7K~D.1U_0402_16V7K~D

1 2

RTCVREF

12

PC15

PC15

4

3

2

G

G

2

G

G

1 2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

/BATDRV

VREF

47K_0402_1%~D

47K_0402_1%~D

1 2

13

D

D

S

S

VREF

PR51

PR51
47K_0402_1%~D

47K_0402_1%~D

1 2

13

D

D

S

S

100K_0402_1%~D

12

PC38

PC38

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR42

PR42

ACIN 21,25,31,45

PQ11

PQ11
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

CHGEN#

PQ16

PQ16
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

36

578

12

241

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

46 60Friday, June 12, 2009

46 60Friday, June 12, 2009

46 60Friday, June 12, 2009

E

PQ7

PQ7
FDS6675BZ_SO8

FDS6675BZ_SO8

BATT+

12

PC31

PC31

10U_1206_25V6M~D

10U_1206_25V6M~D

PC32

PC32

10U_1206_25V6M~D

10U_1206_25V6M~D

A

A

A

5

4

3

2

1

TPS51427_B+

12

12

PC51

PC51

PC52

PC52

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

SI4686DY-T1-E3_SO8

SI4686DY-T1-E3_SO8

2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D

2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D

12

PR58

PR58

4.7_1206_5%~D

4.7_1206_5%~D

12

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

PC62

PC62

680P_0603_50V7K~D

680P_0603_50V7K~D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

401695

401695

401695

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

12

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

PL5

PL5

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PC197

PC197

PC53

PC53

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

PR61

PR61

1 2

61.9K_0402_1%~D

61.9K_0402_1%~D

PR63

PR63

1 2

10K_0402_1%~D

10K_0402_1%~D

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

1

47 60Friday, June 12, 2009

47 60Friday, June 12, 2009

47 60Friday, June 12, 2009

PC80

PC80

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+5VALWP

1

12

+

+

2

PC63

PC63

330U_D_6.3VM_R18M~D

330U_D_6.3VM_R18M~D

A

A

A

12

12

4.7_1206_5%~D

4.7_1206_5%~D

12

680P_0603_50V7K~D

680P_0603_50V7K~D

100K_0402_1%~D

100K_0402_1%~D

1 2

MAINPWON7,39,52

2

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

PD11

PD11

4

TPS51427_B+

578

PQ17

PQ17
SI4686DY-T1-E3_SO8

SI4686DY-T1-E3_SO8

3 6

241

8

D6D5D7D

4

G

S

S

S

3

2

1

PR66

PR66

PR67

PR67

200K_0402_5%~D

200K_0402_5%~D

0_0402_5%~D

0_0402_5%~D

PQ21

PQ21

PQ19

PQ19
FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

1 2

PC65

PC65

0.22U_0603_25V7-K

0.22U_0603_25V7-K

1 2

1 2

VL

PR72

PR72

PR73

PR73

1 2

806K_0603_1%

806K_0603_1%

12

PR55

PR55

0_0805_5%

0_0805_5%

1 2

VL

PC54

PC54

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR59

PR59

12

0_0603_5%~D

0_0603_5%~D

PC57

PC57

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

BST3A

LX3

FB3

VL

1 2

PU5

PU5

33

TP

26

DRVH2

24

VBST2

25

LL2

DL3

23

DRVL2

30

VOUT2

32

REFIN2

1 2

PC55

PC55

6

3

VIN

V5FILT

2VREF_TPS51427

TPS51427_EN2

1 2

1 2

12

2VREF_TPS51427

PR71

PR71

20

14

27

1

8

4

0_0402_5%~D

0_0402_5%~D

VREF2

LDOREFIN

NC

EN_LDO

EN1

EN2

PC66

PC66

1U_0603_10V6K~D

1U_0603_10V6K~D

3

TONSE

VREF3

2

5

12

12

0_0402_5%~D

0_0402_5%~D

2VREF_TPS51427

1 2

PC64 0.22U _0603_10V7K~DPC64 0.22U_0603_10V7K~D

EN_LDO

TPS51427_EN1

PR70

@PR70

@

0_0402_5%~D

0_0402_5%~D

PR74

@PR74

@

47K_0402_5%~D

47K_0402_5%~D

1 2

12

PC67

PC67

PC68

PC68

@

@

0.047U_0603_16V7K~D

0.047U_0603_16V7K~D

0.047U_0402_16V7K~N

0.047U_0402_16V7K~N

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

@

@

1U_0603_10V6K~D

1U_0603_10V6K~D

7

SKIPSEL

PGOOD2

PGOOD1

21

PR75

PR75

LDO

V5DRV

DRVH1

VBST1

DRVL1

PGND

VOUT1

VSW

TRIP1

TRIP2

GND

12

PC56

PC56

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

19

1 2

DH5DH3

15

BST5A

17

0_0603_5%~D

0_0603_5%~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

LX5

16

LL1

DL5

18

22

10

FB5

11

FB1

9

29

28

13

ILM1

12

ILIM2

31

TPS51427_QFN32_5X5

TPS51427_QFN32_5X5

PC59

PC59

1U_0603_10V6K~D

1U_0603_10V6K~D

PR60

PR60

PC61

PC61

PR64 0_0402 _5%~D@ PR64 0_0402_5%~D@

PR65 0_0402_5%~DPR65 0_0402_5%~D

1 2

5VALWP
Thermai Design Current=6.88A
Peak Current=8.6A
OCP min=10.32A
Fsw=400K
Output Ripple current=
Rds(on) = 11.5m ohm(max) ; Rds(on) = 9m ohm(typical)

12

1 2

12

PR68

PR68

205K_0402_1%~D

205K_0402_1%~D

PR69

PR69

243K_0402_1%~D

243K_0402_1%~D

578

PQ18

PQ18

3 6

241

8

D6D5D7D

4

PQ20

PQ20

G

S

S

S

3

2

1

VL

POK 21

12

12

DELL CONFIDENTIAL/PROPRIETARY

2

B+

PJP19

PJP19
JUMP_43X118@

JUMP_43X118@

2

D D

+3VALWP

PC60

330U_D_6.3VM_R18M~D

330U_D_6.3VM_R18M~D

C C

B B

PC60

112

12

PC48

PC48

PC84

PC84

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D

2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D

1

2

12

+

+

PC79

PC79

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

PR57

PR57

0_0402_5%~D

0_0402_5%~D

1 2

PR62

PR62

@

@

1 2

10K_0402_1%~D

10K_0402_1%~D

VS

12

PC49

PC49

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

PL4

PL4

1 2

PD10

PD10

RLZ5.1B_LL34

RLZ5.1B_LL34

1 2

12

PC50

PC50

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D
2200P_0402_50V7K~D

2200P_0402_50V7K~D

PR56

PR56

PC58

PC58

3.3VALWP
Thermal Design Current=8.21A
Peak Current=10.27A
OCP min=12.32A
Fsw=300K
Output Ripple current=

Rds(on) = 11.5m ohm(max)
Rds(on) = 9m ohm(typical)

PJP5

PJP5
JUMP_43X118

JUMP_43X118

@

@

+5VALWP

A A

+3VALWP

112

PJP7

PJP7
JUMP_43X118@

JUMP_43X118@

112

PJP11

PJP11
JUMP_43X118@

JUMP_43X118@

112

PJP9

PJP9
JUMP_43X118@

JUMP_43X118@

112

2

+5VALW

2

2

2

+3VALW

5

1 3

1 2

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

A

+1.05V_VCCP
Thermal Desig Current=7.8 8A
Peak Curr ent=9.85A
OCP min=11.82A
Fsw=300KHz

<Vo=1.05V> VFB =0.75V

1 1

Vo=VFB*(1+PR430/PR433)=0.75*(1+8.66K/21.5K)=1.052V

PR77

PR77

0_0402_5%~D

0_0402_5%~D

SUSP#28,31,33,49,50

PR80

PR80
300_0603_5%~D

300_0603_5%~D

1 2

+5VS

2 2

12

PR79

PR79

30.1K_0402_1%~D

30.1K_0402_1%~D

12

PC76

PC76

1U_0603_10V6K~D

1U_0603_10V6K~D

21.5K_0402_1%~D

21.5K_0402_1%~D

12

@PC72

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

12

PR85

PR85

12

PC72

PC78

@PC78

@

47P_0402_50V8J~D

47P_0402_50V8J~D

12

PR84

PR84

8.66K_0402_1%~D

8.66K_0402_1%~D

TON_VCCP

V5FILT_VCCP

FB_VCCP

12

2

3

4

5

6

EN_VCCP

PU6

PU6

TON

VOUT

V5FILT

VFB

PGOOD

B

PR76

PR76

267K_0402_1%~D

267K_0402_1%~D

1 2

15

1

TP

EN_PSV

GND7PGND

PR78

PR78

BST_VCCP

1 2

0_0603_5%~D

0_0603_5%~D

14

UG_VCCP

VBST

13

DRVH

LX_VCCP

12

LL

TRIP_VCCP

11

TRIP

V5DRV_VCCP

10

V5DRV

LG_VCCP

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

TPS51117RGYR_QFN14_3.5x3.5

8

1 2

PC71 0.1U_0603_25V7K~DPC71 0.1U_0603_25V7K~D

PR81

PR81

1 2

13.7K_0402_1%~D

13.7K_0402_1%~D

+5VS

12

PR82

PR82
0_0603_5%~D

0_0603_5%~D

12

PC77

PC77

4.7U_0805_10V6K~D

4.7U_0805_10V6K~D

C

4

578

G

VCCP_B++

3 6

241

D6D5D7D

S

3

2

PQ22

PQ22
SI4686DY-T1-E3_SO8

SI4686DY-T1-E3_SO8

8

4

PQ23

PQ23

S

S

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

1

D

PJP20

@PJP20

@

12

PAD-OPEN 4x4m

PC73

PC73

220U_D2_4VM

220U_D2_4VM

PAD-OPEN 4x4m

1

+

+

PC74

PC74

2

12

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

12

PC86

PC86

2200P_0402_50V7K~D

2200P_0402_50V7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PL6

PL6

PR83

PC75

@PC75

@

680P_0603_50V8J~D

680P_0603_50V8J~D

12

12

D6D5D7D

S

2

12

PC70

PC70

PC85

PC69

PC69

10U_1206_25V6M~D

10U_1206_25V6M~D

8

PQ24

PQ24

@

@

S

S

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

1

PC85

10U_1206_25V6M~D

10U_1206_25V6M~D

2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D

2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D

@PR83

@

4.7_1206_5%~D

4.7_1206_5%~D

1 2

1 2

12

G

3

PC81

PC81

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

B+

+1.05V_VCCPP

12

PJP18

@PJP18

@

JUMP_43X118

3 3

PJP4

@PJP4

@

JUMP_43X118

JUMP_43X118

+1.05V_VCCPP

4 4

+1.8VSP

112

PJP6

@PJP6

@

JUMP_43X118

JUMP_43X118

112

PJP27

@PJP27

@

2 1

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

A

2

+1.05V_VCCP

2

+1.8VS

+3VALW

SUSP#28,31,33,49,50

JUMP_43X118

112

1 2

PR93 0_0402_5%~DPR93 0_0402_5%~D

PC171

@PC171

@

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

+5VALW

12

12

PC172

PC172

10U_1206_25V6M~D

10U_1206_25V6M~D

B

5

PU13 RT9025PU13 RT9025

NC

VIN3VOUT

2

EN

4

VDD

GND

12

PC170

PC170

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

6

7

ADJ

1

PGOOD

GND

8

9

1000P_0402_50V7K~D

1000P_0402_50V7K~D

12

PC87

PC87

+1.8VSP
Imax=0.67A
Vout=0.8*(PR94+PR95)/PR95=0.8*(1k+806)/806=1.79V

C

12

PR94

PR94

1K_0402_1%~D

1K_0402_1%~D

12

PR95

PR95

806_0402_1%~D

806_0402_1%~D

+1.8VSP

12

12

PC88

PC126

PC126

PC88
10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

D

A

A

48 60Friday, June 12, 2009

48 60Friday, June 12, 2009

48 60Friday, June 12, 2009

A

A

1.5V
Thermal Design Current=13.52A
Peak Curre nt=16.91A
OCP min=20A
Fsw=298KHz

<Vo=1.5V> V FB=0.75V

1 1

Vo=VFB*(1+PR104/PR105)=0.75*(1+22.1K/22.1K)=1.5V

PR97

PR97

0_0402_5%~D

0_0402_5%~D

PR99

PR99

30.1K_0402_1%~D

30.1K_0402_1%~D

12

PC96

PC96

1U_0603_10V6K~D

1U_0603_10V6K~D

22.1K_0402_1%~D

22.1K_0402_1%~D

12

12

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PR105

PR105

PC92

@PC92

@

PC98

@PC98

@

47P_0402_50V8J~D

47P_0402_50V8J~D

PR104

PR104

22.1K_0402_1%~D

22.1K_0402_1%~D

12

12

1.5V_PGOOD11

12

12

SYSON28,31,33

PR100

PR100

300_0603_5%~D

300_0603_5%~D

+5VALW

2 2

1 2

TON_1.5

V5FILT_1.5

FB_1.5

B

EN_1.5

PU8

PU8

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

PR207

PR207

100K_0402_1%~D

100K_0402_1%~D

1 2

+5VALW

PR96

PR96

267K_0402_1%~D

267K_0402_1%~D

1 2

15

1

TP

EN_PSV

GND7PGND

8

PR98

PR98

0_0603_5%~D

0_0603_5%~D

0.1U_0603_25V7K~D

1 2

UG_1.5

13

LX_1.6

12

TRIP_1.5

11

V5DRV_1.5

10

LG_1.5

9

0.1U_0603_25V7K~D

1 2

8.87K_0402_1%~D

8.87K_0402_1%~D

BST_1.5

14

VBST

DRVH

LL

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3.5x3.5

TPS51117RGYR_QFN14_3.5x3.5

PR101

PR101

PC91

PC91

1 2

+5VALW

12

PR102

PR102
0_0603_5%~D

0_0603_5%~D

12

PC97

PC97

4.7U_0805_10V6K~D

4.7U_0805_10V6K~D

C

+1.5VSP_B++

4

4

G

12

PQ27

PQ27

FDMS8692_POWER56-8-5

FDMS8692_POWER56-8-5

123 5

8

D6D5D7D

4

PQ28

PQ28

S

S

S

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

3

2

1

12

PC183

PC183

10U_1206_25V6M~D

10U_1206_25V6M~D

D6D5D7D

G

S

3

2

12

PC90

PC90

PC89

PC89

10U_1206_25V6M~D

10U_1206_25V6M~D

1UH_FDUE1040D-1R0M-P3_21.3A_20%

1UH_FDUE1040D-1R0M-P3_21.3A_20%

8

S

S

1

PQ42

PQ42

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

PR103

@PR103

@

4.7_1206_5%~D

4.7_1206_5%~D

1 2

PC95

@PC95

@

680P_0603_50V8J~D

680P_0603_50V8J~D

1 2

PC184

PC184

10U_1206_25V6M~D

10U_1206_25V6M~D

1 2

12

PC185

PC185

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PL8

PL8

D

PJP22

@PJP22

@

12

PAD-OPEN 4x4m

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

+

+

PC93

PC93

2

PC177

PC177

220U_D2_4VM

220U_D2_4VM

PAD-OPEN 4x4m

1

12

+

+

PC94

PC94

2

220U_D2_4VM

220U_D2_4VM

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

B+

+1.5VP

12

PC82

PC82

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

PU11

3 3

PJP24

@PJP24

@

PC157

PC157

10U_0805_10V6K~D

10U_0805_10V6K~D

112

JUMP_43X118

JUMP_43X118

12

12

2

PC158

PC158

10U_0805_10V6K~D

10U_0805_10V6K~D

12

12

PC155

PC155

PC154

PC154

@

@

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

B

+1.5VP

+0.75VSP

PJP15

@PJP15

@

JUMP_43X118

JUMP_43X118

2

4 4

+1.5VP

+0.75VSP

112

PJP16

@PJP16

@

JUMP_43X118

JUMP_43X118

112

PJP29

@PJP29

@

2 1

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

A

+1.5V

2

+0.75VS

RT9026_MSOP10

RT9026_MSOP10

1

VDDQSNS

2

VLDOIN

3

VTT

5

VTTSNS

PU11

10

VIN

8

GND

6

VTTREF

PR174

9

S5

7

S3

PGND

GND

4

11

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PR174

0_0402_5%~D

0_0402_5%~D

12

@PC160

@

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

12

PC160

SUSP# 28,31,33,48,50

PC156

PC156

1U_0603_10V6K~D

1U_0603_10V6K~D

12

PC159

PC159

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

C

12

+3VALW

+0.75VSP
Thermal Design Current:0.7A
Peak current:1A
Vout=VDDQSNS/2=1.5V/2=0.75V

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

D

A

A

49 60Friday, June 12, 2009

49 60Friday, June 12, 2009

49 60Friday, June 12, 2009

A

5

PJP23

@PJP23

@

B+

D D

18.2K_ 0402_1%~ D

18.2K_ 0402_1%~ D

4.42K_ 0402_1%~ D

4.42K_ 0402_1%~ D

220U_X_ 2VM_R7M~D

220U_X_ 2VM_R7M~D

C C

220U_X_ 2VM_R7M~D

220U_X_ 2VM_R7M~D

220U_X_ 2VM_R7M~D

220U_X_ 2VM_R7M~D

B B

4.75K_ 0402_1%~ D

4.75K_ 0402_1%~ D

A A

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PL14

PL14

1 2

FBMA-L18-453215-900LMA90T_1812

FBMA-L18-453215-900LMA90T_1812

PR124

PR124

M92@

M92@

PR122

PR122

M92@

M92@

PC105

PC105

M92@

M92@

PC106

PC106

M92@

M92@

PC107

PC107

M92@

M92@

PR113

PR113

M92@

M92@

VGA_ON31

+3VS

GPU_VID039

+1.5VP

SUSP#28,31,33,48,49

PR111

PR111

22K_0402_1%~D

22K_0402_1%~D

1 2

PR126

PR126

10K_0402_5%~D

10K_0402_5%~D

1 2

PR127

PR127

10K_0402_5%~D

10K_0402_5%~D

PJP26

@PJP26

@

JUMP_43X118

JUMP_43X118

112

1 2

PR194

PR194

0_0402_5%~D

0_0402_5%~D

12

PC187

PC187

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

PC186

PC186

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

PC103

@PC103

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

PC110

PC110

.1U_0402_16V7K~D

.1U_0402_16V7K~D

12

12

PR129

PR129

100K_0402_5%~D

100K_0402_5%~D

2

12

PC180

@ PC180

@

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

PC99

PC99

10U_1206_25VAK~D

10U_1206_25VAK~D

+5VS

12

PC182

PC182

12

PC100

PC100

10U_1206_25VAK~D

10U_1206_25VAK~D

PR109

PR109

0_0603_5%~D

0_0603_5%~D

12

PC104

PC104

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

M96@

M96@

2

G

G

1

PC117

PC117

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

12

10U_1206_25V6M~D

10U_1206_25V6M~D

12

12

PR124

PR124

8.87K_0402_1%~D

8.87K_0402_1%~D

13

D

D

S

S

PQ33

PQ33
BSS138W-7-F_SOT323~D

BSS138W-7-F_SOT323~D

PU15 R T9025PU15 RT9025

VIN3VOUT

2

EN

4

VDD

GND

PC179

PC179
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.1VSP
Imax=0.91A
Vout=0.8*(PR196+PR195)/PR195=0.8*(1k+2.61k)/2.61k=1.107V

5

4

6268_VGA

PR106

PR106

10K_0402_1%~D

10K_0402_1%~D

VGA_PWGOD

12

8

PU9

PU9

VIN_VGA

6268_VGA

EN_VGA

3

VIN

4

VCC

5

EN

GND

ISL6268CAZ-T_SSOP16

ISL6268CAZ-T_SSOP16

COMP6FB7FSET

COMP_VGA

12

12

PC111

PC111

33P_0402_50V8J~D

33P_0402_50V8J~D

5

NC

6

7

ADJ

1

PGOOD

GND

8

9

PR209

PR209

1 2

100K_0402_1%~D

100K_0402_1%~D

+3VS

4

PC113

PC113

2200P_0402_50V7K~D

2200P_0402_50V7K~D

820P_0402_50V7K~D

820P_0402_50V7K~D

12

1.1VS_RUN_PWRGD

PR116

PR116

12.1K_0402_1%~D

12.1K_0402_1%~D

12

PR121

PR121

0_0402_5%~D

0_0402_5%~D

PC115

@PC115

@

PD18

M92@ PD 18

M92@

1 2

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

39

PC181

PC181

1000P_0402_50V7K~D

1000P_0402_50V7K~D

12

PR195

PR195

2.61K_0402_1%~D

2.61K_0402_1%~D

PHASE_VGA

12

BOOT_VGA

1UG16

2

PGOOD

PR117

PR117

45.3K_0402_1%~D

45.3K_0402_1%~D

15

PHASE

9

10

FSET_VGA

12

12

12

M92@

M92@

PR90

PR90

10K_0402_5%~D

10K_0402_5%~D

12

PR91

M92@ PR91

M92@

12

12

PC176

PC176

PR196

PR196

1K_0402_1%~D

1K_0402_1%~D

10U_1206_25V6M~D

10U_1206_25V6M~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PR107

PR107

1 2

2.2_0603_5%~D

2.2_0603_5%~D

BOOT

14

PVCC

13

LG

12

PGND

11

ISEN

VO

PC112

PC112

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

+3VS

18.2K_0402_1%~D

18.2K_0402_1%~D

1 2

1

12

2

100K_0402_5%~D

100K_0402_5%~D

+1.1VSP

12

PC178

PC178

10U_1206_25V6M~D

10U_1206_25V6M~D

3

UG_VGA

1 2

PC101 0.1U_0603_25V7K~DPC101 0.1U_0603_25V7K~ D

+5VALW

12

PR108

PR108
0_0603_5%~D

0_0603_5%~D

PR110

PR110

4.7_0603_5%

4.7_0603_5%

1 2

PC102

PC102

PVCC_VGA

1 2

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

LG_VGA

ISEN_VGA

1 2

PR113

PR113

7.15K_0402_1%~D

7.15K_0402_1%~D

M96@

M96@

12

M92@

M92@

PR92

PR92

13

D

D

2

G

G

BSS138W-7-F_SOT323~D

BSS138W-7-F_SOT323~D

S

S

PC198

M92@ PC198

M92@

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

M92@ PD 17

M92@

3

6268_VGA

PQ47

M92@

PQ47

M92@

PD17

12

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

+1.1VSP

3 5

GPU_VID139

@PJP21

@

2 1

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

VGA_B++

4

PQ30

PQ30

241

+3VS

PR123

PR123

10K_0402_5%~D

10K_0402_5%~D

1 2

10K_0402_5%~D

10K_0402_5%~D

PJP21

S TR FDMS8670S 1N MLP-8

S TR FDMS8670S 1N MLP-8

PR125

PR125

PQ29

PQ29

2

M96@

M96@

PQ48

PQ48

4

123 5

3 5

FDMS8692_POWER56-8-5

FDMS8692_POWER56-8-5

241

FB_VGA

123 5

FDMS8692_POWER56-8-5

FDMS8692_POWER56-8-5

PL9

PL9

0.36UH_FDUE1030D-R36M=P3 32A_20%

0.36UH_FDUE1030D-R36M=P3 32A_20%

1 2

12

PC109

PC109
680P_0603_50V8J~D

680P_0603_50V8J~D

12

PR112

PR112

PQ31

PQ31

4.7_1206_5%~D

4.7_1206_5%~D

S TR FDMS8670S 1N MLP-8

S TR FDMS8670S 1N MLP-8

+VGA_COREP
Thermal Design Current M96=22.8A , M92=12.67A
Peak Current M96=30.7A , M92=15.4A
OCP min M96=31.7A , M92=19.3A
Fsw=300KHz

M96 0.9V 1V 1.1v
GPU_VID_0 0 1 1
GPU_VID_1 0 0 1

M92 0.9V 0.95V 1.1V 1.2V
GPU_VID_0 0 1 0 1
GPU_VID_1 0 0 1 1

1

+

+

PC106

PC106

PC105

PC105

2

12

PR119

PR119
0_0402_5%~D

0_0402_5%~D

12

PR114

PR114
10_0402_1%~D

10_0402_1%~D

1 2

M96@

M96@

330U_D2_2VY_R7M~D

330U_D2_2VY_R7M~D

PR118

PR118

1.5K_0402_1%

1.5K_0402_1%

M96@

M96@

12

12

PC114

@PC114

M96@

M96@

PR122

PR122

8.87K_0402_1%~D

8.87K_0402_1%~D

13

D

D

12

12

PR128

PR128

100K_0402_5%~D

100K_0402_5%~D

+1.1VS

2

G

G

S

S

1

PC116

PC116

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

@

820P_0402_50V7K~D

820P_0402_50V7K~D

PQ32

PQ32
BSS138W-7-F_SOT323~D

BSS138W-7-F_SOT323~D

1

+

+

2

330U_D2_2VY_R7M~D

330U_D2_2VY_R7M~D

1

+GPU_CORE

1

+

+

PC107

PC107

PC108

PC108

2

M96@

M96@

330U_D2_2VY_R7M~D

330U_D2_2VY_R7M~D

1 2

PR120

PR120

3.01K_0402_1%~D

3.01K_0402_1%~D

12

12

PC83

PC83

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

PC196

PC196

PC195

PC195

1 2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

12

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

A

A

50 60Friday, June 12, 2009

50 60Friday, June 12, 2009

50 60Friday, June 12, 2009

1

A

5

@

@

D D

+3VS

DPRSLPVR11,21

H_DPRSTP#8,11,19

+3VS

12

PR145

@PR145

@

499_0402_1%~D

499_0402_1%~D

VGATE11,21,31

POW_MON31

C C

H_PSI#8

VR_TT#

PR153 4.22K_0402_1%@ PR153 4.22K_0402_1%@

1 2

PC1311U_0603_10V 6K~D PC1311U_0603 _10V6K~D

1 2

PR152 147K_0402_1%~DPR152 147K_0402_1%~D

1 2

PH1 100K_0603_1%_TH11-4H104FT@ PH1 100K_0603_1%_TH11-4H104FT@

1 2

PC132 0.015U_04 02_16V7K@ PC132 0.015U_04 02_16V7K@

1 2

PC136 0.022U_06 03_25V7K

PC136 0.022U_06 03_25V7K

PR154 11.5K_0402_1%~DPR154 11.5K_0402_1%~D

1 2

PC138

PC138

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1 2

PR156 11.3K_0402_1%~DPR156 11.3K_0402_1%~D

1 2

PR143

PR143

1 2

PR151 10K_040 2_1%~DPR151 10K_0402_1%~D

1 2

RBIAS_CPU

NTC_CPU

SOFT_CPU

OCSET_CPU

1 2

1 2

PC139 1000P_0402_50V7K~DPC139 1000P_0402_50V7 K~D

PR163 97.6K_0402_1%~DPR163 97.6K_0402_1%~D

1 2

B B

PR210

100K_0402_1%~D

100K_0402_1%~D

@ PR210

@

1 2

VCCSENSE8

PC141 270P_0402_50V7K~DP C141 270P_0402_50V7K~D

PC144 100P_0402_50V8J~DPC 144 100P_0402_50V8J~D

1 2

PR165

PR165

1 2

100_0402_1%~D

100_0402_1%~D

VSSSENSE8

12

PC145 2200P_0402_50V7K~DPC145 2200P_0402_50V7 K~D

1 2

1 2

PR167 1K_0402_1%~DPR167 1K_0402_1%~D

PR168

PR168

1 2

0_0402_5%~D

0_0402_5%~D

PR131 499_040 2_1%~DPR131 499_0402_1%~D

PR132 0_ 0402_5%~DPR132 0_0402_5%~D

PT1

PT1

PAD

PAD

PR141 0_0402 _5%~DPR141 0_0402_5%~D

1 2

12

PC127

PC127

1U_0603_10V6K~D

1U_0603_10V6K~D

1.91K_0402_1%~D

1.91K_0402_1%~D

1

2

PMON_CPU

3

4

5

6

7

8

VW_CPU

COMP_CPU

FB_CPU

9

10

11

12

FB2_CPU

12

PR164

PR164

1K_0402_1%~D

1K_0402_1%~D

PC147 330P_0402_50V7K~DP C147 330P_0402_50V7K~D

1 2

12

PC149

PC149

330P_0402_50V7K~D

330P_0402_50V7K~D

1 2

PR170 0_0402 _5%~DPR170 0_0402_5%~D

PC150 180P_0402_50V8J~DPC 150 180P_0402_50V8J~D

1 2

1 2

VCC_PRM

A A

PR172 1K_0402_1%~DPR 172 1K_0402_1%~D

PC152

PC152

0.22U_0603_16V7K~D

0.22U_0603_16V7K~D

4

PC118

PC118

12

5600P_0402_25V7K

5600P_0402_25V7K

1 2

1 2

3V3_CPU

49

48

3V3

GND

PGOOD

PSI#

CLK_EN#_CPU

47

CLK_EN#

12

VR_ON_CPU

DPRSLPVR_CPU

DPRSTP#_CPU

46

45

44

DPRSTP #

DPRSLP VR

CPU_VID68CPU_VID58CPU_VID48CPU_VID38CPU_VID28CPU_VID18CPU_VID0

VR_ON

12

12

PR1340_0402_5%~DPR134 0_0402_5%~D

PR1420_0402_5%~DPR142 0_0402_5%~D

PR1350_0402_5%~DPR135 0_0402_5%~D

VID5

VID6

43

VR_ON

PMON

RBIAS

VR_TT#

NTC

SOFT

OCSET

VW

ISL6266ACRZ-T_QFN48_7X7

ISL6266ACRZ-T_QFN48_7X7

COMP

FB

FB2

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

VDIFF_CPU

DROOP_CPU

DFB_CPU

VSEN_CPU

RTN_CPU

12

PC148

PC148

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

VSUM

1 2

PR173 3.74K_0402_1%~DPR173 3.74K_0402_1%~D

PC151 0.1U_0603_50V4Z~DPC151 0.1U_0603 _50V4Z~D

1 2

PC153 0.22U_0603_10V7K~DPC153 0.22U_0603_10V 7K~D

12

12

7,31,39

12

12

12

PR1380_0402_5%~DPR138 0_0402_5%~D

PR1370_0402_5%~DPR137 0_0402_5%~D

PR1360_0402_5%~DPR136 0_0402_5%~D

VID2

VID4

VID3

VDD_CPU

12

VIN_CPU

1U_0603_10V6K~D

1U_0603_10V6K~D

10_0603_5%~D

10_0603_5%~D

1 2

12

PC146

PC146

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

12

PR171

PR171

11K_0402_1%~D

11K_0402_1%~D

1 2

8

12

12

PR1390_0402_5%~DPR139 0_0402_5%~D

PR1400_0402_5%~DPR140 0_0402_5%~D

VID1

VID0

VID037VID138VID239VID340VID441VID542VID6

36

BOOT1

35

UGATE1

34

PHASE1

33

PGND1

32

LGATE1

LGATE2

PGND2

PHASE2

UGATE2

BOOT2

1 2

PC142

PC142

PR166

PR166

PR169

PR169

PH2

PH2

10KB_0603_ERTJ1VR103J

10KB_0603_ERTJ1VR103J

PVCC_CPU

31

PVCC

30

29

28

27

26

25

NC

PU10

PU10

24

29.1

29.1

ISEN1
ISEN2

PR162 1_0603_5%~DPR162 1_0603_5%~D

+CPU_B+

2.61K_0402_1%~D

2.61K_0402_1%~D

12

PC119

PC119

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

BOOT_CPU1

UGATE_CPU1

PHASE_CPU1

LGATE_CPU1

PHASE_CPU2

PR155

PR155

BOOT_CPU2

1 2

2.2_0603_5%~D

2.2_0603_5%~D

+5VS

3

12

12

PC120

PC120

PC121

PC121

1U_0603_10V6K~D

1U_0603_10V6K~D

PR144

PR144

1 2

2.2_0603_5%~D

2.2_0603_5%~D

LGATE_CPU2

UGATE_CPU2

PC137

PC137

1 2

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D

+5VS

PR130

PR130
1_0603_5%~D

1_0603_5%~D

1 2

12

PC122

PC122

1U_0603_10V6K~D

1U_0603_10V6K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PC128

PC128

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D

1 2

2

+CPU_B+

12

12

PC199

PC199

PC200

PC200

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2200P_0402_50V7K~D

PQ39

PQ39

3 5

241

3 5

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

2200P_0402_50V7K~D

PQ38

PQ38

@

@

241

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

12

PR146

PR146

4.7_1206_5%~D

4.7_1206_5%~D

12

PQ34

PQ35

PQ35

3 5

241

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

PQ41

PQ41

3 5

241

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

PQ36

PQ36

3 5

241

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

PQ34

PC129

3 5

241

3 5

3 5

241

PC129

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

PQ40

PQ40

@

@

241

PQ37

PQ37

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

680P_0603_50V8J~D

680P_0603_50V8J~D

12

PC202

PC202

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

PR157

PR157

4.7_1206_5%~D

4.7_1206_5%~D

12

PC140

PC140
680P_0603_50V8J~D

680P_0603_50V8J~D

PC124

PC124

PC123

PC123

10U_1206_25VAK~D

10U_1206_25VAK~D

12

PR147

PR147

3.65K_1206_1%

3.65K_1206_1%

VSUM

12

PC201

PC201

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

PR158

PR158

VSUM

12

12

12

PC175

PC175

PC125

PC125

10U_1206_25VAK~D

10U_1206_25VAK~D

0.36UH_FDU1040D-R36M_26A_20%

0.36UH_FDU1040D-R36M_26A_20%

12

PR148

PR148

10K_0402_1%~D

10K_0402_1%~D

ISEN1

0.22U_0603_16V7K~D

0.22U_0603_16V7K~D

12

PC133

PC133

10U_1206_25VAK~D

10U_1206_25VAK~D

0.36UH_FDU1040D-R36M_26A_20%

0.36UH_FDU1040D-R36M_26A_20%

PR159

PR159

3.65K_1206_1%

3.65K_1206_1%

10K_0402_1%~D

10K_0402_1%~D

0.22U_0603_16V7K~D

0.22U_0603_16V7K~D

10U_1206_25VAK~D

10U_1206_25VAK~D

PL11

PL11

4

3

PR150

@PR150

@

0_0402_5%~D

0_0402_5%~D

1 2

PC130

PC130

1 2

12

PC134

PC134

10U_1206_25VAK~D

10U_1206_25VAK~D
PL12

PL12

4

3

12

PR161

@PR161

@

0_0402_5%~D

0_0402_5%~D

1 2

PC143

PC143

1 2

ISEN2

@

@

100U_25V_M~D

100U_25V_M~D

1

2

PC135

PC135

10U_1206_25VAK~D

10U_1206_25VAK~D

1

2

1

FBMA-L18-453215-900LMA90T_1812

FBMA-L18-453215-900LMA90T_1812

1

1

+

+

+

+

PC173

PC173

2

2

100U_25V_M~D

100U_25V_M~D

12

PR149

PR149

1_0402_5%~D

1_0402_5%~D

VCC_PRM

+CPU_B+

12

12

PR160

PR160

1_0402_5%~D

1_0402_5%~D

VCC_PRM

PC174

PC174

100U_25V_M~D

100U_25V_M~D

PL10

PL10

1 2

1

+

+

2

B+

+CPU_CORE

Fsw=290KHz

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATIO N OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

A

A

51 60Friday, June 12, 2009

51 60Friday, June 12, 2009

51 60Friday, June 12, 2009

1

A

5

4

3

2

1

Battery Connect/OTP

+3VALWP

D D

2

3

PD12

PD12

@

PR175

PR175
1K_0402_5%~D

1K_0402_5%~D

1 2

PR179

PR179

100_0402_5%~D

100_0402_5%~D

PR180

PR180

100_0402_5%~D

100_0402_5%~D

@

DA204U_SOT323~D

DA204U_SOT323~D

BATT_B/I

1

BATT_SMD

EC_SMB_DA1 31

EC_SMB_CK1 31

BATT+

PL13

PL13

SMB3025500YA_2P

SMB3025500YA_2P

BATT+

1 2

12

12

PC163

PC163

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PC161

PC161

100P_0402_50V8J~D

100P_0402_50V8J~D

PJPB1 battery connector

SMART

SMART

SMARTSMA RT
Battery:

Battery:

Battery:Battery:

C C

9.BAT+

9.BAT+

9.BAT+9.BAT+

8.BAT+

8.BAT+

8.BAT+8.BAT+

7.ID

7.ID

7.ID7.ID

6.B/I

6.B/I

6.B/I6.B/I

5.TS

5.TS

5.TS5.TS

4.SMD

4.SMD

4.SMD4.SMD

3.SMC

3.SMC

3.SMC3.SMC

2.GND

2.GND

2.GND2. GND

1.GND

1.GND

1.GND1. GND

SUYIN_200275MR009F50PZR~D

SUYIN_200275MR009F50PZR~D

BATT++

12

PC162

PC162
1000P_0402_50V7K~D

1000P_0402_50V7K~D

GND
GND

PJPB1

PJPB1

9
8
7
6
5
4
3
2
1

BATT++

12

PC164

PC164

100P_0402_50V8J~D

100P_0402_50V8J~D

11
10
9
8
7
6
5
4
3
2
1

1 2

1 2

PD13

PD13

@

@

DA204U_SOT323~D

DA204U_SOT323~D

BATT_SMC

PR177

PR177

1K_0402_5%~D

1K_0402_5%~D

2

3

1

12

2

3

PD14

PD14

@

@

DA204U_SOT323~D

DA204U_SOT323~D

1

Place clsoe to EC pin

BATT_TEMP

1 2

PR176

PR176

1K_0402_5%~D

1K_0402_5%~D

1 2

1 2

PR178

PR178

6.49K_0402_1%~D

6.49K_0402_1%~D

3

PD15

PD15

@

@

DA204U_SOT323~D

DA204U_SOT323~D

1

BATT_TEMP 31

PC165

@PC165

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

+3VALWP

1000P_0402_50V7K~D

1000P_0402_50V7K~D

2

CPU

PH3 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C

VL VS

12

CPU

PR182

PR182

10.7K_0402_1%~D

10.7K_0402_1%~D

OTP_IN OTP_IN+

12

PH3

PH3
100K_0603_1%_TH11-4H104FT

100K_0603_1%_TH11-4H104FT

12

PC168

PC168

PR186

PR186

61.9K_0402_1%~D

61.9K_0402_1%~D

1 2

1 2

VL

PR188

PR188

150K_0402_1%~D

150K_0402_1%~D

150K_0402_1%~D

150K_0402_1%~D

PR190

PR190

PR184

PR184

147K_0402_1%~D

147K_0402_1%~D

1 2

OTP_IN-

12

12

3

2

PC169

PC169
1U_0603_10V6K~D

1U_0603_10V6K~D

8

P

+

-

G

4

PC166

PC166

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

OTP_OUT

1

0

PU12A

PU12A
LM358ADR_SO8

LM358ADR_SO8

VL

1 2

PD16

PD16

1 2

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

PR185

PR185
205K_0402_1%~D

205K_0402_1%~D

MAINPWON 7,39,47

BATT+

12

PR181

PR181
453K_0402_1%~D

B B

PR187

PR187

10K_0402_1%~D

10K_0402_1%~D

BATT_OUT

LI-3S :13.5V----BATT_OVP=1.126V

BATT_OVP=0.08338*BATT+

BATT_OVP31

A A

1 2

7

PU12B

PU12B

0

VS

8

LM358ADR_SO8

LM358ADR_SO8

5

P

+

6

-

G

4

12

453K_0402_1%~D

12

PR183

PR183

499K_0402_1%~D

499K_0402_1%~D

PC167

PC167

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

BATT_IN

12

PR189

PR189

86.6K_0402_1%

86.6K_0402_1%

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

A

A

52 60Friday, June 12, 2009

52 60Friday, June 12, 2009

52 60Friday, June 12, 2009

1

A

5

P age# T itle

Ite m

Ite m Iss u e D es c rip t io n

P age#P ag e#

Ite mItem

01

D D

C C

47 +3VALWP/+5VALWP 01/22

02

47 +3VALWP/+5VALWP 01/22

03

48

04

45 DCIN/Precharger 01/22

05

49 +1.5VSP/0.75VSP 01/22

06

50 GPU_COREP/1.1VSP 01/22

07

50 GPU_COREP/1.1VSP 02/09

46

08

09

51 CPU_CORE 02/24 Compal

10

51 CPU_CORE 02/24 Compal

51

11

T it le

T it leT itl e

+1.05V_VCCP/
+1.8VSP

D ate

D ateD at e

01/22

02/09Charger X01

02/24CPU_CORE

GPU_COREP

B B

12

52

13

14

15

02/24+3VALWP/+5VALWP47

02/24BATTERY CONN

02/24Charger46

02/24GPU_COREP/1.1VSP50

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

R eques t

R eques t

R eques tR eques t

O w ne r

O w ne r

O w ne rO w ne r

Compal
Mike

Compal
Mike

Compal
Mike

Setiing +5VALW OCP to 10.32A

Setiing +3VALW OCP to 12.32A

Setiing +1.05V_VCCP OCP to 11.82A

Iss u e D es c rip t io nD ate

Iss u e D es c rip t io nIs sue D es cri p tio n

3

Compal
Mike

Compal
Mike

Compal
Mike

Compal

HW need to use +1.5VSP PGOOD signal,so need
to add a pull high resister.

HW need to use +1.1VSP PGOOD signal,so need
to add a pull high resister.

Change OCP setting from 20A to 25.6A

Mike

Compal
Mike

Mike

Take off Cells selector function.

Change CPU_CORE low-side MOSFET

HW don't need to use VR_TT# signal,so

Mike

Compal
Mike

Compal
Mike

Compal
Mike

Compal
Mike

Compal
Mike

depopulate pull high resister.

Change input cap from X7R(85 ) to X6S(105 )

℃ ℃

Take off Manufacturer:COMPOSTAR from PC64

Take off non-PSL Manufacturer:Panjit

Take off non-Lead Free material.

Change frequence setting from 330KHz to 294KHz.

2

P a ge 1

P a ge 1

P a ge 1P ag e 1

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

Change PR68 from P/N:SD03429438L (294K +-1% 0402) to
SD03424938L (249K +-1% 0402)

Change PR69 from P/N: SD03424938L (249K +-1% 0402) to
SD03429438L (294K +-1% 0402)

Change PR81 from P/N: SD03480618L (8.06K +-1% 0402) to
SD03416228L (16.2K +-1% 0402)

Change PR10 from P/N: SD00103308L (33 +-5% 1206) to
SD011680A8L (68 +-5% 1206)
Add PR208 SD011680A8L (68 +-5% 1206) parallel with PR10

Add PR207 SD03410038L (100K +-1% 0402) between PU8 pin6
and PR97 pin 2.

Add PR209 SD03410038L (100K +-1% 0402) between PU15 pin1
and +3VS.

Change PR113 from P/N:SD03449910L(4.49K +-1% 0402) to
SD03463418L(6.34K +-1% 0402)

Populate PR88,take off PR37 and PQ10,change PR175 from
47K to SD02810018L(1K +-5% 0402)

Change PQ34,PQ35,PQ36,PQ37 from
(SI4430BDY-T1-E3 1N SO-8) to
SB00000DA00(SI4634DY-T1-E3 1N SO8)

Depopulate PR145 SD03449908L(499 +-1% 0402)

Change PC99,PC100,PC123,PC124,PC125,PC133,PC134,PC135
from (10U 25V M X5R1206 H1.6) to
SE153106K8L(10U 25V K X6S 1206 H1.6)

Change PC64 from P/N: SE080224K8L (.22U 10V K X7R 0603)
to SE080224M8L (.22U 10V K X7R 0603)

Change PQ43,PQ44,PQ45,PQ46 from P/N:
SB000006800 (2N7002W T/R7 1N SOT-323)
to SB00000B30L (PMF3800SN 1N SC70-3)

Change PR29 from P/N:
SD021200D0L (S RES 1W .02 +-1% 2512)
to SD000001F0L (S RES 1W .02 +-1% 2512 50PPM/C)

Change PR117 from SD03440228L (40.2K +-1% 0402)
to SD03445328L (45.3K +-1% 0402)

1

R ev.P age#

R ev.Rev.

X01

X01

X01

X01Common circuit design modify

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

16

48 +3VALWP/+5VALWP

A A

+1.05V_VCCP

02/24

Compal
Mike

Change choke reated current from 11A to 14.2A

Change PL4,PL5,PL6 from
SH00000BQ0L (2.2UH +-20% MPLC1040L2R2 11A)
to SH00000CG0L (2.2UH 20% FDVE1040-2R2M=P3 14.2A)

X01

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

A

A

53 60Friday, June 12, 2009

53 60Friday, June 12, 2009

53 60Friday, June 12, 2009

1

A

5

R eques t

R eques t

P age# T itle

Ite m

Ite m Iss ue D esc rip tio n

P age#P ag e#

Ite mItem

17

D D

C C

45 DCIN/Precharger 03/04

18

45 DCIN/Precharger

19

47

20

47

21

48

22

49

23

50

24 50

5025

26 50

27

5050GPU_COREP/1.1VSP

B B

28

29

51

T it le

T it leT itl e

D ate

D ateD at e

03/04 X01

+3VALWP/+5VALWP

+3VALWP/+5VALWP

+1.05V_VCCP/
+1.8VSP

+1.5VSP/0.75VSP Change Rtrip resistance to meet OCP setting

03/04

03/04

03/04

03/04

03/04

GPU_COREP/1.1VSP

GPU_COREP/1.1VSP

GPU_COREP/1.1VSP

03/04

03/04

03/04

03/04

GPU_COREP/1.1VSP

CPU_CORE

03/04

03/04

R eques tR eques t

O w ne r

O w ne r

O w ne rO w ne r

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

Iss u e D es c rip t io nD a te

Iss u e D es c rip t io nIs sue D es cri p tio n

Compal
Antony

Compal
Antony

Compal

Prevent diode breakdown from battery
inrush current

Change part number to L-end

Change Rtrip resistance to meet OCP setting

3

Antony

Compal

Change Rtrip resistance to meet OCP setting

Antony

Compal
Antony

Change Rtrip resistance to meet OCP setting

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Change Rsen resistance to meet OCP settingGPU_COREP/1.1VSP

For better Bandwidth

Change part number to common part

Change output Capacitor

Change VID resistance to meet setting

Change VID resistance to meet setting

To avoid noise

2

P a ge 2

P a ge 2

P a ge 2P ag e 2

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

Change PD3 from SCS00002G00 to SC11N414880

Change PD4 part number from SC1A204U000 to SC1A204U00L

Change PR68 from 249K ohm to 205K ohm

Change PR69 from 294K ohm to 243K ohm

Change PR81 from 16.2K ohm to 13.7K ohm

Change PR101 from 13.7K ohm to 8.87K ohm

M96:Change PR113 from 6.35K ohm to 7.15K ohm
M92:Change PR113 from 4.99K ohm to 4.75K ohm

Change PR116 from 13K ohm to 12.1K ohm

Change PC113 part number from SE075222K8L to
SE074222K8L

Change PC105、PC106、PC107 Capacitor from 220uF to
330uF

M92:Change PR122 from 4.53K ohm to 4.42K ohm

M92:Change PR124 from 17.4K ohm to 18.2K ohm

Add PC199、PC201 0.1uF Cap to +CPU_B+

1

R ev.Page#

R ev.Rev.

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

51

30

31 03/04

32 03/16

A A

CPU_CORE

03/04

51 CPU_CORE

51

CPU_CORE To improve transient response

Compal
Antony

Compal
Antony

Compal
Antony

To avoid noise

Reserve space for load line shift control

Add PC200、PC202 2200pF Cap to +CPU_B+

Reserve PR194 space

Change PC151 from 0.068uF to 0.1uF

X01

X01

X01

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

A

A

54 60Friday, June 12, 2009

54 60Friday, June 12, 2009

54 60Friday, June 12, 2009

1

A

5

R eques t

R eques t

P age# T itle

Ite m

Ite m Iss ue D esc rip tio n

P age#P ag e#

Ite mItem

33

D D

51 CPU_CORE

34

52

50 GPU_COREP/1.1VSP 03/16

35

36

50

50

37

38

C C

46 Charger 03/20

39

40

48

41

48 03/20

424350

50

B B

44

50 GPU_COREP/1.1VSP 04/29

4645Charger

4646 05/06

T it le

T it leT itl e

BATTERY CONN

GPU_COREP/1.1VSP

GPU_COREP/1.1VSP

GPU_COREP/1.1VSP50

1.05V_VCCP/

1.8VSP

1.05V_VCCP/

1.8VSP

GPU_COREP/1.1VSP

GPU_COREP/1.1VSP

Charger

D ate

D ateD at e

03/16

03/16

03/16

03/16

03/16

03/20

03/20

03/20

05/06

R eques tR eques t

O w ne r

O w ne r

O w ne rO w ne r

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

Iss u e D es c rip t io nD a te

Iss u e D es c rip t io nIs sue D es cri p tio n

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Let difference of CPU Load Line and Spec
smaller than 2mV

Disable Hardware CPU、GPU OTP circuit

EMI solution

EMI solution

EMI solution

Solve switching spike problem

Change 65W CP setting from 3.3A to 3A

For phase margin improved

For phase margin improved Add PC126 10uF between PU13 pin6 and PU13 GND

For phase margin improved

For phase margin improved

To promote current sustain rating M96:Add PQ48 for GPU buck circuit

TI FAE request

slove PQ5 design margin issue

3

2

P a ge 3

P a ge 3

P a ge 3P ag e 3

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

Change PR173 from 3.57K ohm to 3.74K ohm

Reserve
PQ43

、

PQ44、PQ45、PQ46、PR197、PR198、PR199、PR200

space

Add PL14 parallel PJP23

Change PR107 from 0 ohm to 2.2 ohm

Connect PC109 series PR112 from Phase node to GND

Change L/S MOS PQ30、PQ31 from SO8 to power-PAK

Change PR89 from 143K ohm to 97.6K ohm

1

Add PC87 1000pF between PU13 pin6 and PU13 pin7

Add PC181 1000pF between PU15 pin6 and PU15 pin7

Add PC176 10uF between PU15 pin6 and GND

Add PR37 0 ohm resistor between PU4 pin4 and PR26

Change PQ4,PQ5,PQ7 from FDS4435 to
FDS6675 (SB966750080)

R ev.Page#

R ev.Rev.

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X02

X02

X02

47

51 CPU_CORE

Charger

46

48

A A

05/06

05/06

Compal
Antony

Compal
Antony

Montavina platform design Change PC136 from 15nF to 22nF

TI FAE request

Add PQ26,PD19,PD20,PC203,PR115,PR133,
reserve PC25 space

X02

X02

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

A

A

55 60Friday, June 12, 2009

55 60Friday, June 12, 2009

55 60Friday, June 12, 2009

1

A

5

P age# T itle

Ite m

Ite m Iss u e D es c rip t io n

P age#P ag e#

Ite mItem

49

D D

46

T it le

T it leT itl e

D ate

D ateD at e

Charger 06/04 Compal

50 46 Charger 06/04 TI request to reserve protection circuit

45

Charger46

06/04

06/04

51

52 DCIN/Precharge

C C

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

R eques t

R eques t

R eques tR eques t

O w ne r

O w ne r

O w ne rO w ne r

Iss u e D es c rip t io nD ate

Iss u e D es c rip t io nIs sue D es cri p tio n

3

TI FAE request

Antony

Compal
Antony

Compal
Antony

Compal
Antony

Recover a correct component

DELL command

2

P a ge 4

P a ge 4

P a ge 4P ag e 4

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

Delete PQ26,PD19,PD20,PC203,PR115,PR133

Reserve PR90 0ohm , PR37 0ohm , PC100 space
,PC25 0.022uF ,PC change to 0603 size

Recover correct component PR89 to 97.6K ohm

Change PQ2 from SB502060000 (RHU002N06_SOT323-3)
to SB50301008L (FDV301N 1N SOT23-3)

1

R ev.P age#

R ev.Rev.

X03

X03

X03

X03

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

SCHEMATIC,MB A5151

401695

401695

401695

A

A

56 60Friday, June 12, 2009

56 60Friday, June 12, 2009

56 60Friday, June 12, 2009

1

A

5

R eques t

R eques t

P age# T itle

Ite m

Ite m Iss u e D es c rip t io n

P age#P ag e#

Ite mItem

1 06 Clock gen 2009/02/03 Adam_Lai Error connection of clock gne I2C. Correct CLK_SMBDATA connect to U1.9 , CLK_SMBCLK connect to U1.10. Rev02 (X01)

D D

2 26 Memo 2009/02/03 Adam_Lai No need to using new part.

3 25 Codec 2009/02/03 Adam_Lai Follow codec reference schematic Correct C866 connect from R545 pin 2 to R545 pin1

4 30 BT connector 2009/02/03 Adam_Lai Update JBT1 conn SP01000SL0L (AP code) symbol. Rev02 (X01)

5 30 CRT RGB EA 2009/02/09 Adam_Lai CRT RGB signals EA failed on Rising / Falling time. Change L31~L33 from SM01000AL00 (S SUPPRE_ CHENG-HANN MBK1608301YZF

6 35 CRT Diode 2009/02/23 Adam_Lai CRT diode forward current is about 1Amp, need to change part to prevent

7 37 Display Port

8 32 Power share 2009/02/24 Adam_Lai Power share didn't work. Add power share schematic. Rev02 (X01)

C C

9 5 Clock gen Error connection of CLK_PCIE_WPAN & CLK_PCIE_WPAN# Correct WPAN CLK +/- signal of U1.

10 4 Power Rail 2009/02/25 Bill_Huang Correct error item. Correct +3VS, +5VS Power consumption. Rev02 (X01)

11 10~16 MCH 2009/02/26 Dell Follow Iris's mail on Feb25. Both DIS & UMA use GM45 MCH. 1. Change MCH from P/N: SA00002JJ2L (S IC AC82PM45 SLB97 B3 FCBGA1329

T it le

T it leT itl e

(DF276959)

D ate

D ateD at e

2009/02/23 Adam_Lai Screen can't output to external monitor with DP under DOS mode Rev02 (X01)

R eques tR eques t

O w ne r

O w ne r

O w ne rO w ne r

Adam_Lai2009/02/24

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

Iss u e D es c rip t io nD ate

Iss u e D es c rip t io nIs sue D es cri p tio n

damage.

3

2

P a ge 1

P a ge 1

P a ge 1P ag e 1

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

Change PN: SE020105Z8L (S CER CAP 1U 50V Z Y5V 0805 H1.25)
[NA code) to SE033105Z8L (S CER CAP 1U 25V Z F(Y5V) 0805 H0.85)
[AP code] Location: C889, C890, C891, C922

Correct C865 connect from R543 pin 2 to R543 pin 1.

0603) to SM01000DT0L (S SUPPRE_ MURATA BLM18BA220SN1D 0603)

Change D17 from SC1B411D010 ( S DIO RB411DT146 SOT23 ) to SCS00002Y0L
(S SCH DIO BAT1000-7-F SOT23-3)

Update Q30B Pin3 & Pin4 connection.

PM A31!) to SA00002JT3L (S IC AC82GM45 SLB94 B3 FCBGA1329 GM)

2. Change Connect U1 pin 24, 25 (CLK_MCH_DREFCLK) & pin 28, 29 (
MCH_SSCDREFCLK) to MCH pin A38,B38 & E41,F41

3. Change U1 pin 56,57 (CLK_PCIE_VGA) to U28 [Delete CLK_PCIE_WAN signals.]

4. Change U1 pin 16 (27_SEL) from 10K pull down to 10K pull high to +3VS_CK505.

5. Change U4 VCC_AXG power plane from connect to GND to +1.05V_VCCP.

6. Change U4 pin F47 (VCCA_DPLLA) & pin L48 (VCCA_DPLLB) from connect
to GND to +1.05V_VCCP power plane.

1

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

R ev.P age#

R ev.Rev.

12 35 DPST

B B

13 19~23 ICH 2009/02/26 Compal Change ICH to consign P/N.

14 32 Keyboard 2009/02/26 Compal Follow latest Keyboard pin define, change connector pin define. modify keyboard connector pin definetion to fit keyboard module. Rev02 (X01)

15 20 FFS 2009/02/26 Compal Add FFS function Add FFS parts in page 20 Rev02 (X01)

16 30 JCARD1 2009/02/26 Compal 1. Change JCARD1 pin 1 location to prevent cable twist.

17 Market / Capacitor 2009/03/02 Compal Due to Janpan produce Y5V no more in the fucture. change C133,C138,C144,C152,C163,C251,C255,C281,C425 from SE000009W0L to

18 ICH 2009/03/06 Compal ICH coneect to ALW power rail have power wastage at S5 mode Add MOSFET control circuit to reduce ICH power wastage at S5 mode. Rev02 (X01)23

19 LAN 2009/03/06 Compal 1. Prevent B+_BIAS damage Q3

A A

2009/03/06 Compal 1. LCD panel need to be turned backlight under this crisis recovery mode.

2. when FN+ D is pressed during POST, the LCD will perform the LCD
BIST test and boot to PSA directly

2. Connect contact current rating is only 0.3 Ampere max.

2. Correct +LAN_DVDD12 power name

3. To pass LAN EMI test.

add a gate to OR VGA_PWM and EC_PWM signals Rev02 (X01)

Change ICH from P/N: SA00002JH50 (S IC AF82801IBM SLB8Q A3 PBGA
676P ICH9M) to SA00002G12L (S IC AF82801IEM SLB8P A3 PBGA 676P)

Add +5VALW pin count from 2 to 7 pins. Rev02 (X01)

SE107475M0L

1. Add R1006 (1.5M_0402)

2. Correct C302 & C303 power source from +LAN_VDD12 to +LAN_DVDD12

3. Pop C873 ~ C880 , SE07168AC8L(S CER CAP 6.8P 50V C NPO 0402)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)24

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR PIR-1

PWR PIR-1

PWR PIR-1

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

57 60Friday, June 12, 2009

57 60Friday, June 12, 2009

57 60Friday, June 12, 2009

1

R10 (A00)

5

R eques t

R eques t

P age# T itle

Ite m

Ite m Iss u e D es c rip t io n

P age#P ag e#

Ite mItem

20 Audio codec 2009/03/06 Compal 1. SPK_MUTE# change to controlled by HP1_JD or HP2_JD. 1. Add U108 OR gate.

D D

21 WWAN 2009/03/06 Compal To supprot EC TX/RX debug card. Change EC_TX_P80_DATA & EC_RX_P80_CLK connect to JWWAN1 pin 49 & 51 Rev02 (X01)27

22 E-SATA 2009/03/06 Compal T o prevent antenna effect at E-SATA re-driver. Delete R949, R950, R951, R952 0 ohm reserve resistors. Rev02 (X01)30

23 Powershare 2009/03/06 Compal Add powershare schematic. Rev02 (X01)32

24 DC/DC 2009/03/06 Compal 1a. Change U21 & U22 from DMN3030LSS-13 to SI4800BDY

25 EMI Compal 1. Reserve 10P_0402 cap for CLK_PCI_EC / PCI_CLK / CLK_48M_ICH /

26 Thermal Sensor Compal 1. Remove U2 pin 6 (CPU_THERM_ALERT#) connect to EC. Rev02 (X01)To save EC GPIO pin count.

27 Crystal Compal Rev02 (X01)After fine tune crystal by vendor 1. Change C217, C864 from 12P_0402 to 15P_0402. (Y2)

C C

28 WWAN Compal Rev02 (X01)Due to clock gne lack of SRC output & support WWAN for USB interface

29 SATA HDD Compal Rev02 (X01)SATA port 0 & Port 1 change. Chagne SATA port 0 connect from JSATA1 to JSATA2.

30 Screw hole Compal Rev02 (X01)ME drawing change 1. Change H1 from H_2P3 to H_3P1 , H2 from H_2P4 to H_1P6. H5 from H_2P2 to

1 Digitizer Compal Rev03 (X02)Digitizer firmware circuit updare. (Set high=enable, low=disable) 1.JTCH1.3 change net name form GND to VBUS

B B

10 2009/04/30 Audio EA resultAudio

12 2009/05/04 original PIRQH is by USB controller usedFFS

A A

13 2009/05/04 VGA Power Transient EA test failVGA power

32

337 2009/04/30

20

41

T it le

T it leT itl e

HDMI Compal Rev03 (X02)HDMI EMI issue. L73~L76 parts change to DLW21SN900HQ2L362

Express card Compal Rev03 (X02)Express card socket type error, change to normail type, not reverse type. JEXP1 change to TAITW_PXPXAE-000LBS2ZZ4N0_NR part.283 2009/04/27

Clock gen Compal Rev03 (X02)VGA_CLKREQ# need to pull down Change VGA_CLKREQ# from pull high to +3VS to GND.64 2009/04/27

MSEN# Compal Rev03 (X02)Support S5 Power on when CRT insert MSEN# change from pull high to +3VS to pull high to +3VALW via R324315 2009/04/27

Sourcer Compal Rev03 (X02)Soucer suggest Change C19, C21, C463, C936 fromm 10U_1206_16V4Z to 10U_0805_10V4Z.316 2009/04/27

DC / DC Compal Rev03 (X02)Voltage divider (7/8 VCC) on 3VS_gate 1. Change R338 to 300K ohm, Change Q50 to SI4392DY.

DC / DC Compal Rev03 (X02)338 2009/04/30 Modify +5VALW to +5VS transfer circuit.

DFx Compal Rev03 (X02)Update JESA1 footprint to FOX_3Q3813C-RB1C3B-7F_13P-T299 2009/04/30 DFx issue.

Power share

D ate

D ateD at e

2009/04/27

2009/04/27

R eques tR eques t

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O w ne r

O w ne rO w ne r

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

Iss u e D es c rip t io nD ate

Iss u e D es c rip t io nIs sue D es cri p tio n

only.

Compal Rev03 (X02)Change C1507, C1508, C1529, C1530 from 270P_0603_50V8J to SE074271K8L

Compal Rev03 (X02)exchange MSEN# & USB_DET_DELAY# GPIO pin3311 2009/04/30 USB Power share schematic for setting resistors to +3.0V and contact to

Compal Rev03 (X02)FFS change int to PIRQ setting from PIRQH to PIRQE

Compal Rev03 (X02)Add C1533~C1545 for +CPU_CORE

GPI42, but voltage will drop to 0.5V, change GPIO pin from GPI42 to
GPIO40 or system power ready (+3VALW is ready), Rb voltage will be
pass for +3.0V.

3

P a ge 1

P a ge 1

P a ge 1P ag e 1

2. Change C336, C337, C349, C350 , C354, C355 from 1U_0603 to 2.2U_0805.

1b. Change U25 SI4800BDY to Q45 SI4329DY

CLK_14M_ICH / HDA_BITCLK_AUDIO /

2. Reserve 22P_0402 cap for SPI_CLK and place close U19.

3. Reserve U109 spread spectrum circuit for U28 graphic.

2. Remove U38 pin6 (VGA_THERM_ALERT#) to EC.

2. Change C318 from 27P_0402 to 33P_0402. (Y3)

3. Change C479 & C481 from 15P_0402 to 22P_0402 (Y5)

Remove CLK singals from clock gen & PCIE signals from ICH.

Chagne SATA port 1 connect from JSATA2 to JSATA1.

H_3P0, H24 from H_3P2 to H_3P0.

2. Delete H13

2. VBUS pull high to +3VS via R1559.

2. Add R340 2M_0402 connect to GND.

1. Change R338 to 300K ohm, Change Q50 to SI4392DY.

2. Add R340 2M_0402 connect to GND.

(S CER CAP 270P 50V +-10% X7R 0402)

2

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

1

R ev.P age#

R ev.Rev.

Rev02 (X01)25

Rev02 (X01)33 1. To fit power budget

Rev02 (X01)For EMI concern

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR PIR-1

PWR PIR-1

PWR PIR-1

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

58 60Friday, June 12, 2009

58 60Friday, June 12, 2009

58 60Friday, June 12, 2009

1

R10 (A00)

5

R eques t

R eques t

P age# T itle

Ite m

Ite m Iss u e D es c rip t io n

P age#P ag e#

Ite mItem

14 OTP 2009/05/04 Compal It may unbootable due to OTP sequence error. Modify CPU_THERM_STP & VGA_THERM_STP# circuit. Rev03 (X02)7 39

D D

15 LVDS 2009/05/04 Compal Noise band on 850M & 900MHz. Reserve C1546~C1549 5P_0402 for LVDS clock Rev03 (X02)35

16 Speak ESD diode 2009/05/04 Compal

C C

27 23 ICH9M(5/5)_POWER&GND 2009/05/06 COMPAL Modify +3VALW_S5_ICH circuit. R972 form 470Kohm change to 300Kohm.

28 VGA / LVDS35 2009/05/06 COMPAL Modify Keyboard back light circuit. R928 form 470Kohm change to 300Kohm.

1 VGA spread spectrum39 2009/06/03 COMPAL Schemaitc design mistake Chagne R1558 from SD028220280 (S RES 1/16W 22K +-5% 0402) to

2 ESD diode32 2009/06/03 COMPAL Be use PSL ESD diode. Chagne D48, D49 from SCA00000A00 (S ZEN ROW PJDLC05 3P C/A SOT23) to

B B

3 Cap ship schedule26 2009/06/03 COMPAL SE00000NZ0L , current shipping schedule is still very bad, will be ETA in

4 Gain setting26 2009/06/03 COMPAL gain setting, Is Sat: 13dB, (Sub:20dB)the final suggestion from JBL

5 E-SATA re-driver29 2009/06/03 COMPAL E-SATA connector not support detect pin. Depop Q48 for E-SATA re-driver power saving. Rev1.0 (A00)

T it le

T it leT itl e

E-SATA conn 2009/05/04 Compal17 ME change Update JESA1 Footprint to FOX_313813C-RB1C3B-7F Rev03 (X02)29

EMI for Cap sensor 2009/05/04 Compal18 cap sensor EMI test result Change L76, L77 from BLM18AG121SN1D_0603 to BLM18AG601SN1D_0603 Rev03 (X02)32

Discharge circuit 2009/05/04 Compal19 double discharge for +3VS (+3V_WLAN) Delete R357, Q18 +3V_WLAN discharge circuit. Rev03 (X02)33

LVDS timing 2009/05/04 Compal to meet LVDS +LCDVDD T1 timing in spec.20 1. Change R378 from 1K to 56K

EMC for VGA 2009/05/04 Compal Follow EMC team's test result21 Pop U109 SS circuit on Rev03 (X02)39

VGA Power Transient 2009/05/04 Compal VGA Power Transient EA test fail22 Follow CRB, more add 13pcs 1U_0402 cap on. Rev03 (X02)41

Audio Codec 2009/05/05 Compal Change EAPD# pull up to +3VALW23 Change R1549, U46.5. U47.5 connect to +3VALW Rev03 (X02)25

E-SATA 2009/05/05 Compal Change E-SATA output swing control to 1.2X24 1.Depop R958, R959,

LVDS 2009/05/05 Compal To prevent flash light when AC or Battery in.25 Add a MOSFET control circuit for LVDS converter power. Rev03 (X02)35

VGA thermal 2009/05/05 Compal Gfx thermal sensor should be ADM1032ARMZ-1(108 degree C)

D ate

D ateD at e

R eques tR eques t

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O w ne r

O w ne rO w ne r

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

Iss u e D es c rip t io nD ate

Iss u e D es c rip t io nIs sue D es cri p tio n

Reverse ESD diode for Speaker connector. (it need high voltage
rating to prevent burning)

July

3

2

P a ge 1

P a ge 1

P a ge 1P ag e 1

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

Reserve D20, D21, change from PACDN042Y34_SOT23 to PESD24VS2UT_SOT23 Rev03 (X02)26

2. Change C549 from 0.047U_0402 to 0.1U_0402.

2. Change R953 from 470 ohm to 390 ohm

Change U38 from ADM1032ARMZ-2REEL to ADM1032ARMZ-1

R973 form 1.5Mohm change to 2M ohm.

R931 form 1.5Mohm change to 2M ohm.

SD028220A80 (S RES 1/16W 22 +-5% 0402)

SCA00000J0L (S ZEN ROW PESD5V2S2UT 3P C/A SOT23 ESD)

Chagne C901, C902, C903, C916, C918, C977 from SE00000NZ0L (S CER CAP
22U 25V K X7R 1210 H2.5) to SE00000GF8L (S CER CAP 22U 25V K X5R 1210
H2.5)

1. Change R901,R902,R906,R907 from 280K_0402 to 182K_0402

2. Change R900 & R905 from 43.2K_0402 to 11K_0402

3. Change R904 & R909 from 16.9K_0402 to 17.8K_0402

4. Change R903 & R908 from 25.5K_0402 to 16.5K_0402

5. Change C908 & C912 from 0.22U_0402_106K to 0.1U_0402_10V6K.

1

Rev03 (X02)35

Rev03 (X02)25

Rev03 (X02)26 39

Rev03 (X02)

Rev03 (X02)

Rev1.0 (A00)

Rev1.0 (A00)

Rev1.0 (A00)

Rev1.0 (A00)

R ev.P age#

R ev.Rev.

6 TV turner 25 2009/06/03 COMPAL in order to pass AVerMedia TV turner S2a testing Change C343, C344, C356, C357 from 100P_0402_50V8J to 1000P_0402_50V7K

7 E-SATA re-driver 29 2009/06/03 COMPAL

A A

5

1. They are P2P part with exactly same setting and function

2. PI2EQX3201BLZFE remove some redundant circuit in PI2EQX3201BLZFE
that will not be used in NB application

3. The OOB signal margin of PI2EQX3201BLZFE is little bit higher than
PI2EQX3201BZFE against different kinds of HD and design

4. 3201B and 3201BL) are qualified on Dell commercial model (Roush,
Roush-refresh) in Compal, and now Roush-refresh project already made
transition to 3201BL.

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

1. Chagne U40 from SA00002D80L (S IC PI2EQX3201BZFEX TQFN 36P) to
SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P)

2. Depop R969, R970

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LA-5151P

LA-5151P

LA-5151P

PWR PIR-1

PWR PIR-1

PWR PIR-1

Rev1.0 (A00)

Rev1.0 (A00)

59 60Friday, June 12, 2009

59 60Friday, June 12, 2009

59 60Friday, June 12, 2009

1

R10 (A00)

R10 (A00)

R10 (A00)

5

R eques t

R eques t

P age# T itle

Ite m

Ite m Iss u e D es c rip t io n

P age#P ag e#

Ite mItem

8 0 ohm resisotrs 2009/06/08 Compal Schematic confirm ready, save 0 ohm resistors and then short the signals

D D

T it le

T it leT itl e

D ate

D ateD at e

R eques tR eques t

O w ne r

O w ne r

O w ne rO w ne r

4

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )

V ersion Ch an ge L is t ( P . I. R . L ist )V ersion Ch an ge L is t ( P . I. R . L ist )

Iss u e D es c rip t io nD ate

Iss u e D es c rip t io nIs sue D es cri p tio n

directly.

3

2

P a ge 1

P a ge 1

P a ge 1P ag e 1

Solu tio n D esc rip tion

Solu tio n D esc rip tion R ev .

Solu tio n D esc rip tionSolu tio n D esc rip tion

"short parts of

1.(Page06)R2, R3, R4, R5, R6, R7 ,R8 ,R9 ,R10 ,R11 ,R12 ,R42 ,R43 ,R16 ,R17
,R18, R19, R21, R23, R26, R28, R31, R33, R35, R37, R39, R40, R14, R15,

2. (Page11) R99, R94,

3. (Page17) R134,

4. (Page18) R137,

5. (Page21) R203, R220

6. (Page20) R1004

6. (Page24) R884,R235,R942,

7. (Page25) R247, R248

8. (Page27) R285, R911, R912, R913, R914, R1010, R1011, , R919, R920, R915,
R916, R917, R922, R923, R924, R925, R291, R918, R921,

9. (Page28) R294, R298, R295, R296, R292, R293,

10. (Page30) R297, R299,

11. (Page32) R1559,

12. (Page35) R374, R375
13, (Page36) R401

14. (Page37) R411, R412, R418

1

Rev10 (A00)

R ev.P age#

R ev.Rev.

9 Beep sound 2009/06/08 Compal T o support unboot beep sound, need add back EAPD# pull high resistor. Rev10 (A00)Pop R1549.

C C

10 po sound noise 2009/06/08 Compal to reduce po sound noise of speaker. Rev10 (A00)Add D51, R1567, and C1553 circuit.

11 VGA thermal sensor 2009/06/08 Compal Both ADM1032ARMZ-1 to ADM1032ARMZ-2REEL could work between 0~120

12 VGA power transient 2009/06/10 Compal M96 VGA Power Transient over -8% spec. Rev10 (A00)1. Add C1554, C1555, C1556 47U_0805 caps.

B B

A A

25

26

degree C, the only difference is the default THERM# temperature. (
ADM1032ARMZ-1 default 108 degree, ADM1032ARMZ-2REEL default 85) ,
but Poitier has programming the thermal table.

41

2. Modify C719, C720 fiom 10U_0805 to 47U_0805

3. Delete C1543, C1534, C694, C693, C692, C679, C680, C682 1u_0402 caps.

Rev10 (A00)Change U38 back from ADM1032ARMZ-1 to ADM1032ARMZ-2REEL39

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPI ED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR PIR-1

PWR PIR-1

PWR PIR-1

LA-5151P

LA-5151P

LA-5151P

R10 (A00)

R10 (A00)

60 60Friday, June 12, 2009

60 60Friday, June 12, 2009

60 60Friday, June 12, 2009

1

R10 (A00)