Compal LA-5091P KIU20, Inspiron Mini 10 Schematic

Page 1
A
B
C
D
E
MODEL AME :
PCB O :
BOM P/ :
1 1
LA-5091P (DA60000BR10)
43169831L02
KIU20
Compal Confidential
2 2
Intel Diamondville Processor with Calistoga(945GSE) + DDRII + ICH7M
Bear Schematics Document
2009-3-31
REV: 1.0
3 3
@ : Nopop Component
1@ : For N280 only
2@ : For N270 only
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-5091P
LA-5091P
LA-5091P
1 39Wednesday, April 22, 2009
1 39Wednesday, April 22, 2009
1 39Wednesday, April 22, 2009
E
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Compal Confidential
B
C
D
E
Model ame : KIU20 File ame : LA-5091P
1 1
CRT Conn
page 14
LCD Conn.
page 13
2 2
RGB
LVDS
Diamondville SC
FCBGA8 437Pins
22x22mm
H_A#(3..31) H_D#(0..63)
FSB
400/533MHz
page 4,5
Calistoga GSE FCBGA998
27x27mm
page 6,7,8,9,10
DMI X2 mode
Memory BUS(DDRII)
1.8V DDRII 400/533
USB
PCI-Express
MII Card
WLA
page 19
3 3
10/100 Ethernet
RTL8103EL
page 24
RJ45
page 24
Power O/OFF
DC I
BATT CO/OTP
page 26 page 30
page 30
page 36
CHARGER
4 4
LED CO
page 31
page 22
A
DC/DC Interface
3VALW/5VALW
page 32
1.5VS/0.9VS/
2.5VS
page 34
1.8V/VCCP
page 33
CPU CORE
page 35
Int.KBD
page 25
B
ICH7M BGA652
31x31mm
page 15,16,17,18
LPC BUS
EE KBC KB926
Touch Pad
page 25
page 26
SATA
HDA
Audio Codec
ALC272-VB-GR
SPI
page 20
SPI ROM
page 26
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Thermal Sensor
EMC1402
Clock Generator CK505
DDRII-SO-DIMM
Deciphered Date
Deciphered Date
Deciphered Date
page 4
page 12
2.5" HDD
page 22
AMP & Speaker
page 21
HeadPhone & MIC Jack
page 21
D
page 11
Port 4
Port 6
Port 0
WWA
page 19
WLA
page 19
USB Port X1
PWR
page 27
USB daughter board
Port 3
Port 7
USB Port X1
page 27
USB Port X1
page 27
Through BT cable
Port 5
BlueTooth
page 19
Through LVDS cable
Port 1
Port 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
CMOS CAM
page 13
Card Reader RTS5159 SD/MMC/MS
page 23
Block Diagrams
Block Diagrams
Block Diagrams
LA-5091P
LA-5091P
LA-5091P
E
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2 39Wednesday, April 22, 2009
2 39Wednesday, April 22, 2009
2 39Wednesday, April 22, 2009
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A
ZZZ
ZZZ
PCB
PCB
DA60000BR10
1 1
DA60000BR10
B
C
D
E
Voltage Rails
S5
Power Plane
VIN
B+
+CPU_CORE
+0.9VS
+VCCP
+1.5VS
+1.8V
+2.5VS
+3VALW
+3VS
+5VALW
2 2
+5VS
+VS
+RTCBATT RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
Description
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
0.9V switched power rail for DDR terminator
VCCP switched power rail
1.5V switched power rail
1.8V power rail for DDR
2.5V switched power rail
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
VS always on power rail
SIGNAL
SLP_S3#
SLP_S4#
HIGH HIGH HIGH
HIGH
LOW
LOW LOW
LOWLOW
SLP_S5#
HIGHHIGHHIGH
HIGH
HIGH
LOW
+VALW
ON
ON
ON
ON
ON
S3S1
N/A N/A N/A
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
N/AN/AN/A
OFF
OFF
OFF
OFF
OFFOFF
OFFOFF
ON
OFF
OFF
OFF
ON ON*
OFF
OFF
ON ON*
OFF
OFF
ON ON*
ON
ON
+V +VS Clock
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
ONON
LOW
OFF
OFF
OFF
External PCI Devices
No PCI Device
EC SM Bus1 address
Device
Smart Battery
EEPROM(24C16/02)
IDSEL #DEVICE REQ/GNT #
EC SM Bus2 address
Address
1010 000X b
Device
EMC1402
PIRQ
Address
1001 100X b0001 011X b
3 3
BOARD ID Table(Page 25)
ID
0
1
2
*
3
4 4
BRD ID
R01 (SSI)
R02 (ST)
R10 (X build)
R10A (MP)
A
Ra
NC 100K 100K 100K
Rb Vab
0
8.2K 18K NC
0.25V
0.50V
3.3V
0V
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICH7M SM Bus address
Device
Clock Generator (SLG8SP556VTR)
DDR DIMMA
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
C
Address
1101 001Xb
1010 000Xb
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-5091P
LA-5091P
LA-5091P
3 39Wednesday, April 22, 2009
3 39Wednesday, April 22, 2009
3 39Wednesday, April 22, 2009
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H_A#[3..16]<6>
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13
D D
H_ADSTB#0<6> H_REQ#[0..4]<6>
H_A#[17..31]<6>
H_ADSTB#1<6>
C C
T7 PADT7 PAD
H_A20M#<16> H_FERR#<16> H_IGNNE#<16> H_STPCLK#<16> H_INTR<16> H_NMI<16> H_SMI#<16>
H_A#14 H_A#15 H_A#16 H_ADSTB#0 H_AP0
T5 PADT5 PAD
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1 H_AP1
H_A20M# H_FERR# H_IGNNE# CLK_CPU_BCLK# H_STPCLK# H_INTR H_NMI H_SMI#
CPU N270 P/N: SA00002O31L
U5A
U5A
P21
A[3]#
H20
A[4]#
N20
A[5]#
R20
A[6]#
J19
A[7]#
N19
A[8]#
G20
A[9]#
M19
A[10]#
H21
A[11]#
L20
A[12]#
M20
A[13]#
K19
A[14]#
J20
A[15]#
L21
A[16]#
K20
ADSTB[0]#
D17
AP0
N21
REQ[0]#
J21
REQ[1]#
G19
REQ[2]#
P20
REQ[3]#
R19
REQ[4]#
C19
A[17]#
F19
A[18]#
E21
A[19]#
A16
A[20]#
D19
A[21]#
C14 C18 C20 E20 D20 B18 C15 B16 B17 C16 A17 B14 B15 A14 B19 M18
U18
T16
J4
R16
T15 R15 U17
D6
G6
H6
K4 K5
M15
L16
ADDR GROUP 1
ADDR GROUP 1
A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# AP1
A20M# FERR# IGNNE# STPCLK# LINT0 LINT1 SMI#
NC1 NC2 NC3 NC4 NC5 NC6 NC7
AU80586GE025D_FCBGA437
AU80586GE025D_FCBGA437
ADDR
GROUP
0
ADDR
GROUP
0
DEFER#
CONTROL
CONTROL
RESET#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PROCHOT#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THRMDA THRMDC
THERM
THERM
THERMTRIP#
H CLK
H CLK
NC
NC
ADS# BNR# BPRI#
DRDY# DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
PRDY# PREQ#
TCK
TDO TMS
TRST#
BR1#
BCLK[0] BCLK[1]
RSVD3 RSVD2 RSVD1
V19 Y19 U21
T21 T19 Y18
T20
F16 V16
W20
D15 W18 Y17 U20 W19
AA17 V20
K17 J18 H15 J15 K18 J16 M17 N16
TDI
M16 L17 K16 V15
G17 E4 E5
H17
V11 V12
C21 C1 A3
.
.
CPU N280 P/N: SA000031F1L
H_A#32 H_A#33 H_A#34 H_A#35
H_A20M# H_IGNNE# H_DPRSTP# H_DPSLP# H_PWRGOOD H_SMI# H_NMI H_INTR
1 2
R103 124_0402_1%~D@ R103 124_0402_1%~D@
CPU_ITP<12> CPU_ITP#<12>
1 2
R105 22.6_0402_1%@ R105 22.6_0402_1%@
+VCCP
This shall place near CPU
R200 56_0402_5%
R200 56_0402_5%
1 2
R198 56_0402_5%
R198 56_0402_5%
1 2
R206 56_0402_5%R206 56_0402_5%
1 2
R199 56_0402_5%
R199 56_0402_5%
1 2
R213 56_0402_5%
R213 56_0402_5%
1 2
R218 56_0402_5%
R218 56_0402_5%
1 2
+VCCP
BR1#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
H_RESET_R#H_RESET# ITP_TCK
ITP_TCK
ITP_TRST# ITP_TMS ITP_TDI
+VCCP
R34 1K_0402_5%R34 1K_0402_5%
1 2
R30 1K_0402_5%R30 1K_0402_5%
1 2
R31 1K_0402_5%R31 1K_0402_5%
1 2
R29 1K_0402_5%R29 1K_0402_5%
B B
A A
+VCCP
1 2
R28 1K_0402_5%R28 1K_0402_5%
1 2
R32 1K_0402_5%R32 1K_0402_5%
1 2
R113 1K_0402_5%@ R113 1K_0402_5%@
1 2
R124 1K_0402_5%@ R124 1K_0402_5%@
1 2
R135 1K_0402_5%@ R135 1K_0402_5%@
1 2
R286 1K_0402_5%@ R286 1K_0402_5%@
1 2
R287 1K_0402_5%@ R287 1K_0402_5%@
1 2
R288 1K_0402_5%@ R288 1K_0402_5%@
1 2
ITP_TDO
5
4
H_ADS# H_BNR# H_BPRI#
H_DEFER# H_DRDY# H_DBSY#
H_BR0#
H_IERR# H_INIT#_R
H_LOCK#
H_RESET# H_RS#0 H_RS#1 H_RS#2 H_TRDY#
H_HIT# H_HITM#
BPM0# BPM1# BPM2# BPM3# PRDY# PREQ# ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# BR1#
H_PROCHOT#_R H_THERMDA H_THERMDC
H_THERMTRIP#
CLK_CPU_BCLK
JITP3
JITP3
28
VTT1
27
VTT0
26
VTAP
25
DBR#
24
DBA#
23
BPM0#
22
GND5
21
BPM1#
20
GND4
19
BPM2#
18
GND3
17
BPM3#
16
GND2
15
BPM4#
14
GND1
13
BPM5#
12
RESET#
11
FBO
10
GND0
9
BCLKP
8
BCLKN
7
TDO
6
NC2
5
TCK
4
NC1
3
TRST#
2
TMS
1
TDI
4
H_ADS# <6>
H_BNR# <6>
H_BPRI# <6>
H_DEFER# <6>
H_DRDY# <6>
H_DBSY# <6>
H_BR0# <6>
R33 1K_0402_5%R33 1K_0402_5%
1 2
H_LOCK# <6>
H_RESET# <6>
H_TRDY# <6>
H_HIT# <6>
H_HITM# <6>
1 2
R202 22_0402_5%R202 22_0402_5%
Close to CPU
H_THERMTRIP# <6,16>
CLK_CPU_BCLK <12> CLK_CPU_BCLK# <12>
ITP_TMS ITP_TDI PREQ# ITP_TDO
ITP_TCK ITP_TRST#
29
GND6
GND7
MOLEX_52435-2891_28P~D@
MOLEX_52435-2891_28P~D@
30
+VCCP +VCCP
12
R201
R201 56_0402_5%
56_0402_5%
Close to CPU
H_RS#[0..2] <6>
H_PROCHOT# <35>
+CPU_GTLREF
C62
C62
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Close to CPU pin within 500mils. Zo=55ohm
3
H_D#[0..15]<6>
12
R27
R27 330_0402_5%
330_0402_5%
H_INIT# <16>
H_DSTBN#0<6> H_DSTBP#0<6>
H_DINV#0<6>
T10 PADT10 PAD
H_D#[16..31]<6>
H_DSTBN#1<6> H_DSTBP#1<6>
T13
T13
PAD
PAD
CPU_BSEL0<12> CPU_BSEL1<12> CPU_BSEL2<12>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Close to CPU pin within 500mils. Zo=55ohm
Deciphered Date
Deciphered Date
Deciphered Date
+VCCP
1
2
12
R47
R47 1K_0402_1%
1K_0402_1%
12
R48
R48 2K_0402_1%
2K_0402_1%
+CPU_GTLREF
+CPU_EXTBGREF
+CPU_EXTBGREF
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
C342
C342
R240 1K_0402_5%@R240 1K_0402_5%@ R239 1K_0402_5%@R239 1K_0402_5%@
+VCCP
12
12
1
2
1 2 1 2
R234
R234 1K_0402_1%
1K_0402_1%
R238
R238 2K_0402_1%
2K_0402_1%
Close to CPU pin within 500mils. Zo=55ohm
+VCCP
12
@
@
R158
R158 1K_0402_1%
1K_0402_1%
H_DPWR#
12
@
@
R136
R136 2K_0402_1%
2K_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2
U5B
Y11
W10
Y12 AA14 AA11
W12
AA16
Y10
Y9
Y13
W15
AA13
Y16
W13
AA9
W9
Y14
Y15
W16
V9
AA5
Y8
W3
U1 W7 W6
Y7 AA6
Y3 W2
V3
U2
T3 AA8
V2 W4
Y4
Y5
Y6
R4
A7
U5
V5 T17
R6
M6
N15
N6
P17
T6
J6
H5
G5
+VCCP
12
R51
R51 1K_0402_1%
1K_0402_1%
12
1
R49
R49 2K_0402_1%
2K_0402_1%
2
+3VS
1
C352
C352
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
H_THERMDA
H_THERMDC
2200P_0402_50V7K
2200P_0402_50V7K
2
U5B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# DP#0
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# DP#1
GTLREF ACLKPH DCLKPH BINIT# EDM EXTBGREF FORCEPR# HFPLL MCERR# RSP# BSEL[0] BSEL[1] BSEL[2]
AU80586GE025D_FCBGA437
AU80586GE025D_FCBGA437
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0 H_DP#0
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBN#3 H_DSTBP#1 H_DINV#1 H_DP#1
ACLKPH DCLKPH
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
+CPU_CMREF
C65
C65
C351
C351
1 2
1
D[32]# D[33]# D[34]#
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]#
DATA GRP 2
DATA GRP 2
D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
DP#2
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
DATA GRP 3
DATA GRP 3
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]#
DP#3
COMP[0] COMP[1] COMP[2] COMP[3]
MISC
MISC
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
CORE_DET
CMREF[1]
Layout note: COMP0,2 connect with Zo=27.4ohm +/-15%, make trace length shorter than 0.5" COMP1,3 connect with Zo=55ohm +/-15%, make trace length shorter than0.5"
H_D#33
R2
H_D#34
P1
H_D#35
N1
H_D#36
M2
H_D#37
P2
H_D#38
J3
H_D#39
N3
H_D#40
G3
H_D#41
H2
H_D#42
N2
H_D#43
L2
H_D#44
M3
H_D#45
J2
H_D#46
H1
H_D#47
J1
H_DSTBN#2
K2
H_DSTBP#2
K3
H_DINV#2
L1
H_DP#2
M4
H_D#48
C2
H_D#49
G2
H_D#50
F1
H_D#51
D3
H_D#52
B4
H_D#53
E1
H_D#54
A5
H_D#55
C3
H_D#56
A6
H_D#57
F2
H_D#58
C6
H_D#59
B6
H_D#60
B3
H_D#61
C4
H_D#62
C7
H_D#63
D2 E2
H_DSTBP#3
F3
H_DINV#3
C5
H_DP#3
D4
COMP0
T1
COMP1
T2
COMP2
F20
COMP3
F21
H_DPRSTP#
R18
H_DPSLP#
R17
H_DPWR#
U4
H_PWRGOOD
V17
H_CPUSLP#
N18 A13 B7
H_THERMDA, H_THERMDC routing together. Trace width / Spacing = 10 / 10 mil
H_D#32
R3
H_D#[32..47] <6>
H_DSTBN#2 <6> H_DSTBP#2 <6> H_DINV#2 <6>
T15PAD T15PAD
H_D#[48..63] <6>
H_DSTBN#3 <6> H_DSTBP#3 <6> H_DINV#3 <6>H_DINV#1<6>
T12PAD T12PAD
R57 27.4_0402_1%
R57 27.4_0402_1%
1 2
R58 54.9_0402_1%
R58 54.9_0402_1%
1 2
R208 27.4_0402_1%
R208 27.4_0402_1%
12
R209 54.9_0402_1%
R209 54.9_0402_1%
12
H_DPRSTP# <16,35> H_DPSLP# <16> H_DPWR# <6> H_PWRGOOD <16> H_CPUSLP# <6>
+CPU_CMREF
CPU THERMAL SENSOR
U17
U17
1
VDD
2
DP
3
DN
4
THERM#
EMC1402-1-ACZL-TR_MSOP8
EMC1402-1-ACZL-TR_MSOP8
Address:100_1100
SMCLK
SMDATA
ALERT#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
EC_SMB_CK2
8
EC_SMB_DA2
7
6
5
GND
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
R304
R304
12
10K_0402_5%
10K_0402_5%
Diamondville(1/2)
Diamondville(1/2)
Diamondville(1/2)
LA-5091P
LA-5091P
LA-5091P
1
EC_SMB_CK2 <25>
EC_SMB_DA2 <25>
+3VS
of
of
of
4 39Wednesday, April 22, 2009
4 39Wednesday, April 22, 2009
4 39Wednesday, April 22, 2009
1.0
1.0
1.0
Page 5
5
4
3
2
1
U5D
U5D
A2
VSS1
A4
VSS2
A8
VSS4
A15
D D
C C
B B
A A
VSS5
A18
VSS6
A19
VSS7
A20
VSS8
B1
VSS9
B2
VSS10
B5
VSS11
B8
VSS12
B13
VSS13
B20
VSS14
B21
VSS15
C8
VSS16
C17
VSS17
D1
VSS18
D5
VSS19
D8
VSS20
D14
VSS21
D18
VSS22
D21
VSS23
E3
VSS24
E6
VSS25
E7
VSS26
E8
VSS27
E15
VSS28
E16
VSS29
E19
VSS30
F4
VSS31
F5
VSS32
F6
VSS33
F7
VSS34
F17
VSS35
F18
VSS36
G1
VSS37
G4
VSS38
G7
VSS39
G9
VSS41
G13
VSS42
G21
VSS45
H3
VSS46
H4
VSS48
H7
VSS49
H9
VSS51
H13
VSS52
H16
VSS53
H18
VSS54
H19
VSS55
J5
VSS56
J7
VSS57
J9
VSS58
J13
VSS59
J17
VSS60
K1
VSS61
K6
VSS62
K7
VSS63
K9
VSS64
K13
VSS65
K15
VSS66
K21
VSS67
L3
VSS68
L4
VSS69
L5
VSS70
L6
VSS71
L7
VSS72
L9
VSS73
L13
VSS74
L15
VSS75
L18
VSS76
L19
VSS77
M1
VSS78
M5
VSS79
M7
VSS80
M9
VSS81
M13
VSS82
M21
VSS83
N4
VSS84
AU80586GE025D_FCBGA437
AU80586GE025D_FCBGA437
VSS162 VSS161 VSS160 VSS159 VSS158 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS140 VSS139 VSS138 VSS137 VSS136 VSS135 VSS134 VSS133 VSS132 VSS131 VSS130 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100
VSS99 VSS98 VSS97 VSS96 VSS95
N5 N7 N9 N13 N17 P3 P4 P5 P6 P7 P9 P13 P15 P16 P18 P19 R1 R5 R7 R9 R13 R21 T4 T5 T7 T9 T10 T11 T12 T13 T18 U3 U6 U7 U15 U16 U19 V1 V4 V6 V7 V8 V13 V14 V18 V21 W1 W5 W8 W11 W14 W17 W21 Y1 Y2 Y20 Y21 AA2 AA3 AA4 AA7 AA10 AA12 AA15 AA18 AA19 AA20
+CPU_CORE
+CPU_CORE
+VCCP
C308
C308
1U_0402_6.3V6K
1U_0402_6.3V6K
C298
C298
10U_0805_10V4Z~D
10U_0805_10V4Z~D
V10
A9 B9
A10 A11 A12 B10 B11 B12 C10 C11 C12 D10 D11 D12 E10 E11 E12 F10 F11
F12 G10 G11 G12
H10
H11
H12
J10
J11
J12
K10
K11
K12
L10
L11
L12 M10 M11 M12 N10 N11 N12 P10 P11 P12 R10 R11 R12
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C309
C309
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
C299
C299
2
U5C
U5C
VTT1 VTT2 VTT3 VTT4 VTT5
C310
C310
1
2
1
2
VTT6 VTT7 VTT8
VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32
VCCPC64 VCCPC63 VCCPC62 VCCPC61
VCCA
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VCCSENSE
VSSSENSE
1U_0402_6.3V6K
1U_0402_6.3V6K
C311
C311
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C301
C301
VCCF
VCCQ1 VCCQ2
VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VCCP27 VCCP28 VCCP29 VCCP30 VCCP31 VCCP32 VCCP33 VCCP34 VCCP35 VCCP36 VCCP37 VCCP38 VCCP39 VCCP40 VCCP41 VCCP42 VCCP43 VCCP44 VCCP45
AU80586GE025D_FCBGA437
AU80586GE025D_FCBGA437
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C300
C300
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C9 D9 E9 F8 F9 G8 G14 H8 H14 J8 J14 K8 K14 L8 L14 M8 M14 N8 N14 P8 P14 R8 R14 T8 T14 U8 U9 U10 U11 U12 U13 U14
F14 F13 E14 E13
D7
F15 D16 E18 G15 G16 E17 G18
C13
D13
PLACE IN CAVITY
1
1
C312
C312
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
C302
C302
2
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6
VCCSENSE
VSSSENSE
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C313
C313
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
C46
C46
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C295
C295
1
2
CPU_VID0 <35> CPU_VID1 <35> CPU_VID2 <35> CPU_VID3 <35> CPU_VID4 <35> CPU_VID5 <35> CPU_VID6 <35>
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C314
C314
C320
C320
2
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
C304
C304
C303
C303
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C307
C307
1
2
1
2
1
2
PLACE IN CORRIDOR AND CLOSE TO CPU
1U_0402_6.3V6K
1U_0402_6.3V6K
C337
C337
1
2
PLACE IN CAVITY
130mA
1
C321
C321
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C335
C335
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
+VCCP
1U_0402_6.3V6K
1U_0402_6.3V6K
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
C341
C341
1
2
+1.5VS
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C323
C323
C322
C322
2
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
C328
C328
C47
C47
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
C57
C57
+
+
2
C338
C338
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+CPU_CORE
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
C324
C324
2
2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
1
C334
C334
2
2
12
R221
R221
100_0402_1%
100_0402_1%
12
R220
R220
100_0402_1%
100_0402_1%
1
C326
C326
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VCCSENSE <35>
VSSSENSE <35>
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C327
C327
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Length match within 25 mils The trace space 7 mils, Zo=27.4ohm
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C325
C325
1
C315
C315
2
2
+CPU_CORE
2 x 330uF(9mohm/2)
1
+
+
C51
C51
330U 2.5V Y
330U 2.5V Y
2
1
+
+
C331
C331
330U 2.5V Y
330U 2.5V Y
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Diamondville(2/2)
Diamondville(2/2)
Diamondville(2/2)
LA-5091P
LA-5091P
LA-5091P
5 39Wednesday, April 22, 2009
5 39Wednesday, April 22, 2009
5 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 6
5
4
3
2
1
H_D#[0..63]<4>
D D
C C
+VCCP
12
12
R6
R6
R175
R175
54.9_0402_1%
54.9_0402_1%
54.9_0402_1%
54.9_0402_1%
B B
12
R7
R7
R182
R182
24.9_0402_1%
24.9_0402_1%
Layout Note: H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 / H_SWNG1 trace width and spacing is 10/20.
+VCCP
12
R176
A A
R176
100_0402_1%
100_0402_1%
+H_VREF
12
1
R174
R174
2
200_0402_1%
200_0402_1%
5
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_XRCOMP H_XSCOMP
+H_SWNG0
H_YRCOMP H_YSCOMP
+H_SWNG1
12
24.9_0402_1%
24.9_0402_1%
C50 be placed <100mils from GMCH pin
C243
C243
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M5
M4 M3
M1
W2 W1
W4 W7 W5
AB4 AB8
W8 AA9 AA8 AB1 AB7 AA2 AB5
A10
C15
C4 F6 H9 H6 F7 E3 C2 C3 K9 F5 J7 K7 H8 E5 K8 J8 J2 J3 N1
K5 J5 H3 J4 N3
N8 N6 K3 N9
V8 V9 R6 T8 R2 N5 N2 R5 U7 R8 T4 T7 R3 T5 V6 V3
V2
V5
A6
J1 K1 H1
U1A
U1A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING
H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_VREF0
H_BNR#
H_BPRI#
H_BREQ0#
H_CPURST#
H_VREF1
HOST
HOST
H_DBSY#
H_DEFER# H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DPWR#
H_DRDY# H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_HITM#
H_LOCK#
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
H_SLPCPU#
H_TRDY#
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
+VCCP
12
R167
R167
12
R166
R166
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9
HCLKN HCLKP
H_HIT#
221_0402_1%~D
221_0402_1%~D
100_0402_1%
100_0402_1%
F8 D12 C13 A8 E13 E12 J12 B13 A13 G13 A12 D14 F14 J13 E17 H15 G15 G14 A15 B18 B15 E14 H13 C14 A17 E15 H17 D17 G17
F10 C12 H16 E2 B9 C7 G8 B10 E1
AA6 AA5 C10 C6 H5 J6 T9 U6 G7 E6 F3 M8 T1 AA3 F4 M7 T2 AB3
C8 B4 C5 G9 E9 G12 B8 F12 A5 B6 G10 E8 E10
+H_SWNG0
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_ADS# H_ADSTB#0 H_ADSTB#1 +H_VREF H_BNR# H_BPRI# H_BR0# H_RESET# +H_VREF
CLK_MCH_BCLK# CLK_MCH_BCLK H_DBSY# H_DEFER# H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DPWR# H_DRDY# H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_HIT# H_HITM# H_LOCK# H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2 H_CPUSLP# H_TRDY#
C240
C240
+VCCP
R180
R180
R178
R178
12
12
H_A#[3..31] <4>
H_ADS# <4> H_ADSTB#0 <4> H_ADSTB#1 <4>
H_BNR# <4> H_BPRI# <4> H_BR0# <4> H_RESET# <4>
CLK_MCH_BCLK# <12> CLK_MCH_BCLK <12> H_DBSY# <4> H_DEFER# <4> H_DINV#0 <4> H_DINV#1 <4> H_DINV#2 <4> H_DINV#3 <4> H_DPWR# <4> H_DRDY# <4>
H_DSTBN#[0..3] <4>
H_DSTBP#[0..3] <4>
H_HIT# <4> H_HITM# <4> H_LOCK# <4>
H_REQ#[0..4] <4>
H_RS#[0..2] <4>
H_CPUSLP# <4> H_TRDY# <4>
+H_SWNG1
221_0402_1%~D
221_0402_1%~D
1
2
100_0402_1%
100_0402_1%
U1B
DMI_ITX_MRX_N0<17> DMI_ITX_MRX_N1<17> DMI_ITX_MRX_P0<17> DMI_ITX_MRX_P1<17>
DMI_MTX_IRX_N0<17> DMI_MTX_IRX_N1<17> DMI_MTX_IRX_P0<17> DMI_MTX_IRX_P1<17>
M_CLK_DDR0<11> M_CLK_DDR1<11>
M_CLK_DDR#0<11> M_CLK_DDR#1<11>
DDR_CKE0<11> DDR_CKE1<11>
DDR_CS0#<11> DDR_CS1#<11>
+1.8V
R232 80.6_0402_1%
R232 80.6_0402_1%
R228 80.6_0402_1%
+DIMM_VREF
C251
C251
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R228 80.6_0402_1%
C53
C53
R41
R41
1K_0402_1%
1K_0402_1%
R43
R43
1K_0402_1%
1K_0402_1%
Issued Date
Issued Date
Issued Date
3
M_ODT0<11> M_ODT1<11>
1 2 1 2
10uA
1
Layout Note: +DIMM_VREF trace
2
width and spacing is 20/20.
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8V
12
+DIMM_VREF
12
Share +DIMM_VREF for
1.DDRII VREF
2.GMCH SM_VREF_0 SM_VREF_1
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_P0 DMI_ITX_MRX_P1
DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1
M_CLK_DDR0 M_CLK_DDR1
M_CLK_DDR#0 M_CLK_DDR#1
DDR_CKE0 DDR_CKE1
DDR_CS0# DDR_CS1#
M_ODT0 M_ODT1
SMRCOMPN SMRCOMPP
U1B
Y29
DMI_RXN_0
Y32
DMI_RXN_1
Y28
DMI_RXP_0
Y31
DMI_RXP_1
V28
DMI_TXN_0
V31
DMI_TXN_1
V29
DMI_TXP_0
V32
DMI_TXP_1
AF33
SM_CK_0
AG1
SM_CK_1
AJ1
SM_CK_2
AM30
SM_CK_3
AG33
SM_CK#_0
AF1
SM_CK#_1
AK1
SM_CK#_2
AN30
SM_CK#_3
AN21
SM_CKE_0
AN22
SM_CKE_1
AF26
SM_CKE_2
AF25
SM_CKE_3
AG14
SM_CS#_0
AF12
SM_CS#_1
AK14
SM_CS#_2
AH12
SM_CS#_3
AJ21
SM_OCDCOMP_0
AF11
SM_OCDCOMP_1
AE12
SM_ODT_0
AF14
SM_ODT_1
AJ14
SM_ODT_2
AJ12
SM_ODT_3
AN12
SM_RCOMPN
AN14
SM_RCOMPP
AA33
SM_VREF_0
AE1
SM_VREF_1
Deciphered Date
Deciphered Date
Deciphered Date
CFG_0 CFG_1 CFG_2 CFG_3 CFG_5 CFG_6
DMI
DMI
RESERVED1 RESERVED2 RESERVED7 RESERVED8 RESERVED9
CFG/RSVD
CFG/RSVD
DDR2 MUXING
DDR2 MUXING
PM_ICHSYNC#
PM_BMBUSY# PM_EXTTS#_0
PM
PM
PM_EXTTS#_1
THRMTRIP#
PWROK
RSTIN#
D_REFCLKN
D_REFCLKP
CLK
CLK
D_REFSSCLKN D_REFSSCLKP
CLKREQ#
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
2
MCH_CLKSEL0
C18 E18 G20 G18 J20 J18
K32 K31 C17 F18 A3
E31 G21 F26 H26 J15 AB29 W27
A27 A26 J33 H33 J22
MCH_CLKSEL1 MCH_CLKSEL2
CFG5
R181 2.2K_0402_5%R181 2.2K_0402_5%
PM_EXTTS#1 H_THERMTRIP# ICH_POK_EC PLTRST_R#
1 2
R203 0_0402_5%R203 0_0402_5%
1 2
R211 100_0402_5%
R211 100_0402_5%
MCH_CLKSEL0 <12> MCH_CLKSEL1 <12> MCH_CLKSEL2 <12>
MCH_ICH_SYNC# <15> PM_BMBUSY# <17>
12
CLK_MCH_DREFCLK# <12> CLK_MCH_DREFCLK <12> MCH_SSCDREFCLK# <12> MCH_SSCDREFCLK <12> MCH_CLKREQ# <12>
PM_EXTTS#0 <11> PM_DPRSLPVR <17,35> H_THERMTRIP# <4,16> ICH_POK_EC <17,25>
PLTRST# <15,17,19,24,25>
Strap Pin Table
CFG5
PM_EXTTS#0
PM_EXTTS#1
Low = DMI x 2
High = DMI x 4
1 2
R187 10K_0402_5%R187 10K_0402_5%
1 2
R188 10K_0402_5%@R188 10K_0402_5%@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Calistoga(1/5)-GTL/DMI/DDR
Calistoga(1/5)-GTL/DMI/DDR
Calistoga(1/5)-GTL/DMI/DDR
*
+3VS
LA-5091P
LA-5091P
LA-5091P
1
1.0
1.0
1.0
of
of
of
6 39Wednesday, April 22, 2009
6 39Wednesday, April 22, 2009
6 39Wednesday, April 22, 2009
Page 7
5
D D
C C
B B
DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>
DDR_A_DM[0..7]<11>
DDR_A_DQS[0..7]<11>
DDR_A_DQS#[0..7]<11>
DDR_A_MA[0..13]<11>
DDR_A_CAS#<11> DDR_A_RAS#<11>
DDR_A_WE#<11>
PADT9PAD
T9 T8 PADT8 PAD
4
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13
DDR_A_CAS#
DDR_A_RAS# SA_RCVENIN# SA_RCVENOUT#
DDR_A_WE#
AK12 AH11 AG17
AB30
AL31
AF30
AK26
AC28
AJ30
AK33
AL25
AC29
AK30
AJ33 AM25
AJ15 AM17 AM15 AH15
AK15 AN15
AJ18
AF19 AN17
AL17 AG16
AL18 AG18
AL14
AJ17
AK18 AN28 AM28 AH17
AH21
AJ20
AE27
AN20
AL21
AK21
AK22
AL22 AH22 AG22
AF21 AM21
AE21
AL20
AE22
AE26
AE20
AG7 AK5 AH3
AN9 AH8 AM2 AE3
AN8
AM3 AE2
AL9
AJ8
U1C
U1C
SA_BS_0 SA_BS_1 SA_BS_2
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7
SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#
SB_BS_0 SB_BS_1 SB_BS_2
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8
SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47
DDR2 SYSTEM MEMORY
DDR2 SYSTEM MEMORY
SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63
SB_CAS#
SB_RAS#
SB_WE#
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
AC31 AB28 AE33 AF32 AC33 AB32 AB31 AE31 AH31 AK31 AL28 AK27 AH30 AL32 AJ28 AJ27 AH32 AF31 AH27 AF28 AJ32 AG31 AG28 AG27 AN27 AM26 AJ26 AJ25 AL27 AN26 AH25 AG26 AM12 AL11 AH9 AK9 AM11 AK11 AM8 AK8 AG9 AF9 AF8 AK6 AF7 AG11 AJ6 AH6 AN6 AM6 AK3 AL2 AM5 AL5 AJ3 AJ2 AG2 AF3 AE7 AF6 AH5 AG3 AG5 AF5
AG19 AG21 AG20
3
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_D[0..63] <11>
2
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Calistoga(2/5)-DDR2
Calistoga(2/5)-DDR2
Calistoga(2/5)-DDR2
LA-5091P
LA-5091P
LA-5091P
7 39Wednesday, April 22, 2009
7 39Wednesday, April 22, 2009
7 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 8
5
D D
R10
R10
150_0402_1%
150_0402_1%
R8
R8
150_0402_1%
150_0402_1%
R9
R9
150_0402_1%
150_0402_1%
C C
+3VS
1 2
R192 10K_0402_5%R192 10K_0402_5%
1 2
R191 10K_0402_5%R191 10K_0402_5%
GMCH_CRT_R
12
GMCH_CRT_G
12
GMCH_CRT_B
12
Close to U1.H25
R183 255_0402_1%
R183 255_0402_1%
LCTLA_CLK
LCTLB_DATA
12
GMCH_CRT_VSYNC<14> GMCH_CRT_HSYNC<14>
R171 100K_0402_5%R171 100K_0402_5%
GMCH_ENBKL<25>
12
R184 1.5K_0402_1%
R184 1.5K_0402_1%
4
U1F
U1F
H27
SDVO_CTRLDATA
J27
SDVO_CTRLCLK
CLK_MCH_3GPLL#<12> CLK_MCH_3GPLL<12>
GMCH_CRT_CLK<14> GMCH_CRT_DATA<14>
GMCH_CRT_B<14>
GMCH_CRT_G<14>
GMCH_CRT_R<14>
12
EDID_CLK_LCD<13> EDID_DAT_LCD<13> GMCH_LVDDEN<13>
LVDSAC-<13> LVDSAC+<13>
LVDSA0-<13> LVDSA1-<13> LVDSA2-<13>
LVDSA0+<13> LVDSA1+<13> LVDSA2+<13>
GMCH_CRT_B
GMCH_CRT_G
GMCH_CRT_R
CRT_IREF
LCTLA_CLK LCTLB_DATA EDID_CLK_LCD EDID_DAT_LCD
L_IBG
LVDSAC­LVDSAC+
LVDSA0­LVDSA1­LVDSA2-
LVDSA0+ LVDSA1+ LVDSA2+
AA26
Y26
H20 H22 A24 A23 E25 F25 C25 D25 F27 D27 H25
H30
G29
F28 E28
G28
H28 K30 K27 J29 J30 K29
D30 C30 A30 A29
G31
F32 D31
H31
G32
C31
F33 D33 F30
E33 D32 F29
G_CLKN G_CLKP
CRT_DDC_CLK CRT_DDC_DATA CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED# CRT_VSYNC CRT_HSYNC CRT_IREF
L_BKLTCTL L_BKLTEN L_CLKCTLA L_CTLBDATA L_DDC_CLK L_DDC_DATA L_VDDEN L_IBG L_VBG L_VREFH L_VREFL
LA_CLKN LA_CLKP LB_CLKN LB_CLKP
LA_DATAN_0 LA_DATAN_1 LA_DATAN_2
LA_DATAP_0 LA_DATAP_1 LA_DATAP_2
LB_DATAN_0 LB_DATAN_1 LB_DATAN_2
LB_DATAP_0 LB_DATAP_1 LB_DATAP_2
MISC
MISC
LVDS VGA
LVDS VGA
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
3
EXP_A_COMPI
EXP_A_ICOMPO
SDVO_TVCLKIN#
SDVO_INT#
SDVO_FLDSTALL#
SDVO_TVCLKIN
SDVO_INT
SDVO_FLDSTALL
SDVO
SDVO
SDVO_RED#
SDVO_GREEN#
SDVO_BLUE#
SDVO_CLKN
SDVO_RED
SDVO_GREEN
SDVO_BLUE SDVO_CLKP
TV_DACA TV_DACB TV_DACC
TV_IREF
TV_IRTNA
TV
TV
TV_IRTNB TV_IRTNC
TV_DCONSEL0 TV_DCONSEL1
2
+1.5VS_PCIE
R190
R190
24.9_0402_1%
PEGCOMP
R28 M28
N30 R30 T29
M30 P30 T30
P28 N32 P32 T32
N28 M32 P33 R32
+1.5VS
A21 C20 E20 G23 B21 C21 D21
G26 J26
24.9_0402_1%
1 2
Disable TV
1
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Calistoga(3/5)-VGA/LVDS
Calistoga(3/5)-VGA/LVDS
Calistoga(3/5)-VGA/LVDS
LA-5091P
LA-5091P
LA-5091P
8 39Wednesday, April 22, 2009
8 39Wednesday, April 22, 2009
8 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 9
5
+VCCP
D D
C C
+VCCP
B B
A A
AB10 AA10
M25
M24
W22
M22
W21
M21
W20
M20
M19
M18
M17
M16
M15
W14
M14
M10
T25 R25 P25 N25
P24 N24
Y22
V22 U22 T22 R22 P22 N22
Y21
V21 U21 T21 R21 P21 N21
Y20
V20 U20 T20 R20 P20 N20
Y19 P19 N19
Y18 P18 N18
Y17 P17 N17
Y16 P16 N16
Y15 P15 N15
Y14
V14 U14 T14 R14 P14 N14
T10 R10 P10 N10 L10
D1
A18
U1H
U1H
VCC_NCTF1 VCC_NCTF2 VCC_NCTF3 VCC_NCTF4 VCC_NCTF5 VCC_NCTF6 VCC_NCTF7 VCC_NCTF8 VCC_NCTF9 VCC_NCTF10 VCC_NCTF11 VCC_NCTF12 VCC_NCTF13 VCC_NCTF14 VCC_NCTF15 VCC_NCTF16 VCC_NCTF17 VCC_NCTF18 VCC_NCTF19 VCC_NCTF20 VCC_NCTF21 VCC_NCTF22 VCC_NCTF23 VCC_NCTF24 VCC_NCTF25 VCC_NCTF26 VCC_NCTF27 VCC_NCTF28 VCC_NCTF29 VCC_NCTF30 VCC_NCTF31 VCC_NCTF32 VCC_NCTF33 VCC_NCTF34 VCC_NCTF35 VCC_NCTF36 VCC_NCTF37 VCC_NCTF38 VCC_NCTF39 VCC_NCTF40 VCC_NCTF41 VCC_NCTF42 VCC_NCTF43 VCC_NCTF44 VCC_NCTF45 VCC_NCTF46 VCC_NCTF47 VCC_NCTF48 VCC_NCTF49 VCC_NCTF50 VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64
VTT_NCTF1 VTT_NCTF2 VTT_NCTF3 VTT_NCTF4 VTT_NCTF5 VTT_NCTF6
RSVD_3 RSVD_4 RSVD_5 RSVD_6
NCTF
NCTF
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
4
VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8
VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38
VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8
VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12 VSS_NCTF13 VSS_NCTF14 VSS_NCTF15 VSS_NCTF16 VSS_NCTF17 VSS_NCTF18 VSS_NCTF19
CFG_19
RESERVED10 RESERVED11 RESERVED12 RESERVED13 RESERVED14 RESERVED15 RESERVED16 RESERVED17 RESERVED18 RESERVED19 RESERVED20 RESERVED21 RESERVED22 RESERVED23 RESERVED24 RESERVED25
AD25 AC25 AB25 AD24 AC24 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 K14 AD13 Y13 W13 V13 U13 T13 R13 P13 N13 M13 AD12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 AD11 AD10 K10 AN33 AA25 V25 U25 AA22 AA21 AA20 AA19 AA18 AA17 AA16 AA15 AA14 AA13 A4 A33 B2 AN1 C1
K28
K25 K26 R24 T24 K21 K19 K20 K24 K22 J17 K23 K17 K12 K13 K16 K15
+1.5VS
3
U1E
U1E
AH33
VSS_1
AK32 AG32 AE32 AC32 AA32
AM31
AJ31
AA31
AL30 AG30 AE30 AC30 AA30
AA29
AK28 AH28 AE28 AA28
AM27
AF27 AB27 AA27
AL26 AH26
W26
AN25 AK25 AG25 AE25
AM22
AJ22
AF22
AM20 AK20 AH20
AF20
W19
AM18 AH18
AF18
AK17
AH16
Y33
VSS_2
V33
VSS_3
R33
VSS_4
G33
VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10
U32
VSS_11
H32
VSS_12
E32
VSS_13
C32
VSS_14 VSS_15 VSS_16 VSS_17
U31
VSS_18
T31
VSS_19
R31
VSS_20
P31
VSS_21
N31
VSS_22
M31
VSS_23
J31
VSS_24
F31
VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30
Y30
VSS_31
V30
VSS_32
U30
VSS_33
G30
VSS_34
E30
VSS_35
B30
VSS_36 VSS_37
U29
VSS_38
R29
VSS_39
P29
VSS_40
N29
VSS_41
M29
VSS_42
H29
VSS_43
E29
VSS_44
B29
VSS_45 VSS_46 VSS_47 VSS_48 VSS_49
U28
VSS_50
T28
VSS_51
J28
VSS_52
D28
VSS_53 VSS_54 VSS_55 VSS_56 VSS_57
Y27
VSS_58
U27
VSS_59
T27
VSS_60
R27
VSS_61
P27
VSS_62
N27
VSS_63
M27
VSS_64
G27
VSS_65
E27
VSS_66
C27
VSS_67
B27
VSS_68 VSS_69 VSS_70 VSS_71
U26
VSS_72 VSS_73 VSS_74 VSS_75 VSS_76
J25
VSS_77
G25
VSS_78
A25
VSS_79
H23
VSS_80
F23
VSS_81
B23
VSS_82 VSS_83 VSS_84 VSS_85
G22
VSS_86
E22
VSS_87
J21
VSS_88
H21
VSS_89
F21
VSS_90 VSS_91 VSS_92 VSS_93 VSS_94
D20
VSS_95 VSS_96
R19
VSS_97 VSS_98 VSS_99 VSS_100
U18
VSS_101
H18
VSS_102
D18
VSS_103 VSS_104
V17
VSS_105
T17
VSS_106
F17
VSS_107
B17
VSS_108 VSS_109
U16
VSS_110
VSS
VSS
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185
J16 AL15 AG15 W15 R15 F15 D15 AM14 AH14 AE14 H14 B14 F13 D13 AL12 AG12 H12 B12 AN11 AJ11 AE11 AM9 AJ9 AB9 W9 R9 M9 J9 F9 C9 A9 AL8 AG8 AE8 U8 AA7 V7 R7 N7 H7 E7 B7 AL6 AG6 AE6 AB6 W6 T6 M6 K6 AN5 AJ5 B5 AA4 V4 R4 N4 K4 H4 E4 AL3 AD3 W3 T3 B3 AK2 AH2 AF2 AB2 M2 K2 H2 F2 V1 R1
2
U1G
U1G
W33
NC1
AM33
NC2
AL33
NC3
C33
NC4
B33
NC5
AN32
NC6
A32
NC7
AN31
NC8
W28
NC9
V27
NC10
W29
NC11
J24
NC12
H24
NC13
W32
NC14
G24
NC15
F24
NC16
E24
NC17
D24
NC18
K33
NC19
A31
NC20
E21
NC21
C23
NC22
AN19
NC23
AM19
NC24
AL19
NC25
AK19
NC26
AJ19
NC27
AH19
NC28
AN3
NC29
Y9
NC30
J19
NC31
H19
NC32
G19
NC33
F19
NC34
E19
NC35
D19
NC36
C19
NC37
B19
NC38
A19
NC39
Y8
NC40
G16
NC41
F16
NC42
E16
NC43
D16
NC44
C16
NC45
B16
NC46
AN2
NC47
A16
NC48
Y7
NC49
AM4
NC50
AF4
NC51
AD4
NC52
AL4
NC53
AK4
NC54
W31
NC55
AJ4
NC56
AH4
NC57
AG4
NC58
AE4
NC59
AM1
NC60
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
NC
NC
RESERVED26 RESERVED27 RESERVED28 RESERVED29 RESERVED30 RESERVED31 RESERVED32 RESERVED33 RESERVED34 RESERVED35 RESERVED36 RESERVED37 RESERVED38 RESERVED39 RESERVED40 RESERVED41 RESERVED42
1
W30
NC61
Y6
NC62
AL1
NC63
Y5
NC64
Y10
NC65
W10
NC66
W25
NC67
V24
NC68
U24
NC69
V10
NC70
U10
NC71
K18
NC72
Y25 Y24 AB22 AB21 AB19 AB16 AB14 AA12 W24 AA24 AB24 AB20 AB18 AB15 AB13 AB12 AB17
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Calistoga(4/5)-PWR/GND
Calistoga(4/5)-PWR/GND
Calistoga(4/5)-PWR/GND
LA-5091P
LA-5091P
LA-5091P
9 39Wednesday, April 22, 2009
9 39Wednesday, April 22, 2009
9 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
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of
Page 10
2940mA
1
+
+
C41
C41
2
10U_0805_10V4Z
10U_0805_10V4Z
+VCCP
D15
D15 RB751V-40_SOD323-2
RB751V-40_SOD323-2
1 2 12
1
2
C39
C39
+2.5VS
5
5
10U_0805_10V4Z
10U_0805_10V4Z
1
C261
C261
2
1
C265
C265
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.47U_0603_16V4Z
0.47U_0603_16V4Z
0.47U_0603_16V4Z
0.47U_0603_16V4Z
1
+
+
C40
C40
2
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
0.47U_0603_16V4Z
0.47U_0603_16V4Z
1
2
C281
C281
C266
C266
C25
C25
1 2
C22
C22
1 2
1
2
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
C283
C283
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1250mA
10mil
0.1U_0402_16V4Z
0.1U_0402_16V4Z
780mA
10mil
C276
C276
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
10mil
2
1
1
2
+1.5VS
C250
C250
+VCCP
1
2
10mil
2
C248
C248
0.47U_0402_10V4Z~D
0.47U_0402_10V4Z~D
1
AD33 AD32 AD31 AD30 AD29 AD28 AD27 AC27 AD26 AC26 AB26 AE19 AE18
AF17
AE17
AF16
AE16
AF15
AE15
M26
W18
W17
W16
AE9 AD9
AD8 AD7 AD6
AA1
T26 R26 P26 N26
V19 U19 T19
V18 T18 R18
U17 R17
V16 T16 R16 V15 U15 T15
J14 J10
H10
U9
A14 D10
P9 L9 D9 P8 L8 D8 P7 L7 D7 A7 P6 L6
G6
D6 U5 P5 L5
G5
D5 Y4 U4 P4 L4
G4
D4 Y3 U3 P3 L3
G3
D3 Y2 U2 P2 L2
G2
D2
F1
+VCCP
C37
C37
220U_B2_2.5VM_R35
D D
C C
B B
A A
220U_B2_2.5VM_R35
R168
R168
10_0402_5%
10_0402_5%
Check power sequence if OK then @ Vccp->1.5V->3.3V
U1D
U1D
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21
VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28
VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT36 VTT35 VTT37 VTT38 VTT39 VTT40
4
VCCATVDACA0 VCCATVDACA1 VCCATVDACB0 VCCATVDACB1 VCCATVDACC0 VCCATVDACC1
VCCATVBG
VSSATVBG
VCCDTVDAC
VCCDQTVDAC
VCCDLVDS0 VCCDLVDS1 VCCDLVDS2
VCCADPLLA VCCADPLLB
POWER
POWER
VCCDHMPLL1 VCCDHMPLL2 VCCTXLVDS0 VCCTXLVDS1
VCCA3GPLL
VCCA3GBG VSSA3GBG
VCCACRTDAC0 VCCACRTDAC1
VSSACRTDAC
VSSALVDS
Calistoga-GSE_FCBGA998
Calistoga-GSE_FCBGA998
4
VCCHV0 VCCHV1 VCCHV2 VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51
VCCAMPLL VCCAHPLL
VCC3G0
VCC3G1
VCCSYNC
VCCALVDS
VTT41 VTT42 VTT43 VTT44 VTT45
B20 A20 B22 A22 D22 C22 D23 E23 F20 F22 C28 B28 A28 E26 D26 C26 AB33 AM32 AN29 AM29 AL29 AK29 AJ29 AH29 AG29 AF29 AE29 AN24 AM24 AL24 AK24 AJ24 AH24 AG24 AF24 AE24 AN18 AN16 AM16 AL16 AK16 AJ16 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AN4 AM10 AL10 AK10 AH1 AH10 AG10 AF10 AE10 AN7 AM7 AL7 AK7 AJ7 AH7 AN10 AJ10 AD1 AD2 B26 J32 AE5 AD5 D29 C29 U33 T33 V26 N33 M33 J23 C24 B24 B25 B31 B32
P1 L1 G1 U1 Y1
+1.5VS
400mA
2mA
10mA
144mA
20mA
40mA
10mil
10mil
10mil
+1.5VS_MPLL +1.5VS_HPLL +1.5VS_DPLLA +1.5VS_DPLLB +1.5VS
+2.5VS
+1.5VS_3GPLL +2.5VS
+2.5VS_CRTDAC
+2.5VS
3
2
Disable TV
+1.5VS
+3VS
1
1
C23
C23
C239
C239
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8V
533 MTS=1720mA
1
1
C288
C288
2
1U_0603_10V6K~D
1U_0603_10V6K~D
1
C330
C330
C293
C293
2
2
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
10mil
C54
C54
150mA
60mA
10mil
1
1
C286
C286
C318
C318
1U_0603_10V6K~D
1U_0603_10V6K~D
2
2
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1
C319
C319 1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
2
1
C329
C329
2
1
1U_0603_10V6K~D
1U_0603_10V6K~D
2
45mA 45mA
50mA 50mA
Route +2.5VS from GMCH pinN33 to decoupling cap <200mil to the edge.
400mA
70mA 70mA
1
1
+VCCP
1
C242
C242
2
2
2
C241
C241
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.022U_0402_16V7K
0.022U_0402_16V7K
Route VSSACRTDAC gnd from GMCH to decoupling cap ground lead and then connect to the gnd plane.
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
R172
R172
12
10_0603_5%
10_0603_5%
C244
C244
10U_0805_10V4Z
10U_0805_10V4Z
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
+2.5VS
CRTDAC: Route FB within 3" of Calistoga
1
1
C24
C24
C235
C235
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
330U_D2E_2.5VM
330U_D2E_2.5VM
1
C249
C249
1
+
+
C257
C257
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+2.5VS
1
C267
C267
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+2.5VS
1
C256
C256
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Deciphered Date
Deciphered Date
Deciphered Date
1 2
L20
L20 FBMA-L10-160808-301LMT_2P
FBMA-L10-160808-301LMT_2P
1
C254
C254
1
2
2
10U_0805_10V4Z
10U_0805_10V4Z
C245
C245
10U_0805_10V4Z
10U_0805_10V4Z
2
PCI-E/MEM/PSB PLL decoupling
R210
R210
1
1
C277
C277
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS_MPLL
+1.5VS_PCIE
C253
C253
45mA Max.
R45
R45 0_0603_5%
0_0603_5%
1
1
C48
C48
C52
C52
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS +1.5VS
0_0805_5%
1
2
10U_0805_10V4Z
10U_0805_10V4Z
0_0805_5%
1
+
+
C259
C259
2
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
C278
C278
2
10U_0805_10V4Z
10U_0805_10V4Z
12
+1.5VS_DPLLA+1.5VS_DPLLB
C236
C236
40mA Max.40mA Max.
1 2
330U_D2E_2.5VM
330U_D2E_2.5VM
1
C27
C27
1
+
+
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R177
R177
12
+1.5VS
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
0_0603_5%
0_0603_5%
+1.5VS
L2
L2 FBMA-L10-160808-301LMT_2P
FBMA-L10-160808-301LMT_2P
+2.5VS
1
C260
C260
2
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
close pin C29/D29
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Calistoga(5/5)-PWR/GND
Calistoga(5/5)-PWR/GND
Calistoga(5/5)-PWR/GND
1
@
@
+1.5VS_HPLL
1
C43
C43
C44
C44
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C247
C247
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
LA-5091P
LA-5091P
LA-5091P
1
+1.5VS+1.5VS_3GPLL
1
C287
C287
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
45mA Max.
R38
R38 0_0603_5%
0_0603_5%
1
2
10U_0805_10V4Z
10U_0805_10V4Z
+2.5VS
1
C237
C237
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.01U_0402_25V7K
0.01U_0402_25V7K
close pin B31
10 39Wednesday, April 22, 2009
10 39Wednesday, April 22, 2009
10 39Wednesday, April 22, 2009
12
+1.5VS
1
C246
C246
2
1.0
1.0
1.0
of
of
of
Page 11
5
DDR_A_DQS#[0..7]<7>
DDR_A_D[0..63]<7>
DDR_A_DM[0..7]<7>
DDR_A_DQS[0..7]<7>
DDR_A_MA[0..13]<7>
D D
+1.8V
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
2
+0.9VS
1
2
C88
C88
C102
C102
1
C70
C70
C71
C71
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
C87
C87
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C83
C83
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RP5
RP5
18 27 36 45
56_0804_8P4R_5%
56_0804_8P4R_5%
RP6
RP6
18 27 36 45
56_0804_8P4R_5%
56_0804_8P4R_5%
RP4
RP4
18 27 36 45
56_0804_8P4R_5%
56_0804_8P4R_5%
1
2
1
1
C91
C91
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
+
+
@
@
C C
+0.9VS
1
C79
C79
B B
A A
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C61
C61
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
1
C84
C84
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_MA13 M_ODT0 DDR_CS0# DDR_A_RAS#
DDR_A_BS0 DDR_A_MA10 DDR_A_MA1 DDR_A_MA3
M_ODT1 DDR_CS1# DDR_A_CAS# DDR_A_WE#
DDR_A_BS2
DDR_CKE0
C69
C69
2
1
C104
C104
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5
C89
C89
C90
C90
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
1
C68
C68
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
1
C81
C81
C103
C103
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RP1
RP1
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
56_0804_8P4R_5%
RP2
RP2
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
56_0804_8P4R_5%
RP3
RP3
1 8 2 7 3 6 4 5
56_0804_8P4R_5%
56_0804_8P4R_5%
R159
R159
1 2
56_0402_5%
56_0402_5% R160
R160
1 2
56_0402_5%
56_0402_5%
1
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
C82
C82
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_BS1 DDR_A_MA0 DDR_A_MA2 DDR_A_MA4
DDR_A_MA6 DDR_A_MA7 DDR_A_MA11 DDR_CKE1
DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12
C101
C101
Layout Note: Place near JDIM1
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4
+DIMM_VREF
20mils
1
C86
C86
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
1
C78
C78
C99
C99
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4
1
1
C80
C80
C100
C100
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place these resistor closely DIMMA,all trace length<750 mil
Layout Note: Place these resistor closely DIMMA,all trace length Max=1.3"
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C92
C92
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2
+3VS
1
C360
@C360
@
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
3
+1.8V +1.8V
+DIMM_VREF
DDR_CKE0<6>
DDR_A_BS2<7>
DDR_A_BS0<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
DDR_CS1#<6>
M_ODT1<6>
CLK_SMBDATA<12>
CLK_SMBCLK<12>
1
C361
C361
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
DDR_A_D0 DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D3
DDR_A_D9 DDR_A_D8
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0
DDR_A_BS2
DDR_A_MA12 DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS# DDR_CS1#
M_ODT1
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_DM7
DDR_A_D58 DDR_A_D59
CLK_SMBDATA CLK_SMBCLK
+3VS
2/10:Change from 5.2mm to 4mm height CPN:SP07000CK00
Deciphered Date
Deciphered Date
Deciphered Date
2
JDIM1
JDIM1
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
TYCO_292526-4
TYCO_292526-4
DIMMA
2
DQ12 DQ13
CK0#
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3
DQ30 DQ31
NC/CKE1
NC/A15 NC/A14
RAS#
ODT0
NC/A13
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5
DQ46 DQ47
DQ52 DQ53
CK1#
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7
DQ62 DQ63
DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS
VSS DM1 VSS CK0
VSS
VSS
VSS
VSS
DM2 VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS DM4 VSS
VSS
VSS
VSS
VSS
VSS CK1
VSS DM6 VSS
VSS
VSS
VSS
VSS
1
2
VSS
NC
A11
A7 A6
A4 A2 A0
BA1
S0#
NC
SA0 SA1
DDR_A_D4
4
DDR_A_D5
6 8
DDR_A_DM0
10 12
DDR_A_D6
14
DDR_A_D7
16 18
DDR_A_D12
20
DDR_A_D13
22 24
DDR_A_DM1
26 28
M_CLK_DDR0
30
M_CLK_DDR#0
32 34
DDR_A_D14
36
DDR_A_D15
38 40
42
DDR_A_D20
44
DDR_A_D21
46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
R54
R54
DDR_A_DM2
DDR_A_D22 DDR_A_D23
DDR_A_D28 DDR_A_D29
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_CKE1
DDR_A_MA11 DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS1 DDR_A_RAS# DDR_CS0#
M_ODT0 DDR_A_MA13
DDR_A_D36 DDR_A_D37
DDR_A_DM4
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
M_CLK_DDR1 M_CLK_DDR#1
DDR_A_DM6
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
R53 10K_0402_5%
R53 10K_0402_5%
1 2
R52 10K_0402_5% R52 10K_0402_5%
1 2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
M_CLK_DDR0 <6> M_CLK_DDR#0 <6>
0_0402_5%
0_0402_5%
1 2
DDR_CKE1 <6>
DDR_CS0# <6>
M_ODT0 <6>
M_CLK_DDR1 <6> M_CLK_DDR#1 <6>
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDRII-SODIMM A
DDRII-SODIMM A
DDRII-SODIMM A
DDR_A_BS1 <7> DDR_A_RAS# <7>
LA-5091P
LA-5091P
LA-5091P
1
PM_EXTTS#0 <6>
1.0
1.0
11 39Wednesday, April 22, 2009
11 39Wednesday, April 22, 2009
11 39Wednesday, April 22, 2009
1.0
of
of
of
Page 12
5
PCI
SRC
CPU
CLKSEL1
0
FSA
CLKSEL0
MHz
266
MHz
1000
MHz
MHz
33.30
14.318 96.0 48.0
DOT_96 MHz
USB MHz
FSC FSB REF
CLKSEL2
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
D D
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
1 1 1
Reserved
4
+3VM_CK505
1 2
+3VS
R78 0_0805_5%R78 0_0805_5%
*
+VCCP
1 2
R131 0_0805_5%R131 0_0805_5%
1
C151
C151
10U_0805_10V4Z
10U_0805_10V4Z
2
+1.05VM_CK505
1
C163
C163
10U_0805_10V4Z
10U_0805_10V4Z
2
1
2
C181
C181
47P_0402_50V8J
47P_0402_50V8J
1
C198
C198
47P_0402_50V8J
47P_0402_50V8J
2
3
1
C175
C175
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C152
C152
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C197
C197
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C153
C153
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C199
C199
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C167
C167
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C155
C155
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C189
C189
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
1
C154
C154
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C200
C200
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
ICH_SMBDATA<17>
ICH_SMBCLK<17>
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
6 1
+3VS
3
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+3VS
R112
R112
2.2K_0402_5%
2.2K_0402_5%
Q10A
Q10A
2
5
4
Q10B
Q10B
1
R108
R108
2.2K_0402_5%
2.2K_0402_5%
CLK_SMBDATA
CLK_SMBCLK
SA000020K00 (Silego : SLG8SP556VTR ) SA000020H10 (ICS : ICS9LPRS387AKLFT)
+3VM_CK505
+VCCP
R140
R138
R138
2.2K_0402_5%
2.2K_0402_5%
C C
B B
A A
FSA
CPU_BSEL0<4>
CPU_BSEL1<4>
CPU_BSEL2<4>
1 2
R147
@R147
@
0_0402_5%
0_0402_5%
1 2
R91
R91 0_0402_5%
0_0402_5%
@
@
R100
R100 10K_0402_5%
10K_0402_5%
FSC
1 2
R95
@R95
@
0_0402_5%
0_0402_5%
R140
56_0402_5%
56_0402_5%
1 2
12
1 2
R142
R142 1K_0402_5%
FSB
1K_0402_5%
12
R141
@R141
@
1K_0402_5%
1K_0402_5%
+VCCP
R81
1@ R81
1@
1K_0402_5%
1K_0402_5%
1 2
1 2
R86
R86 1K_0402_5%
1K_0402_5%
12
R82
2@ R82
2@
0_0402_5%
0_0402_5%
+VCCP
R97
@R97
@
1K_0402_5%
1K_0402_5%
1 2
1 2
12
R99
R99 1K_0402_5%
1K_0402_5%
12
R98
R98
0_0402_5%
0_0402_5%
C169 22P_0402_50V8J
C169 22P_0402_50V8J
14.31818MHZ_16PF_DSX840GA
14.31818MHZ_16PF_DSX840GA
C162 22P_0402_50V8J
C162 22P_0402_50V8J
Routing the trace at least 10mil
5
MCH_CLKSEL0 <6>
MCH_CLKSEL1 <6>
MCH_CLKSEL2 <6>
12
Y2
Y2
CLK_XTAL_IN
CLK_XTAL_OUT
+1.05VM_CK505
1 2
C1244.7P_0402_50VNPO @C1244.7P_0402_50VNPO @
12
C8325P_0402_50V8C @ C8325P_0402_50V8C @
C3924.7P_0402_50VNPO @C3924.7P_0402_50VNPO @
1 2
R289
R289
33_0402_5%
33_0402_5%
R121
R121
1 2
33_0402_5%
33_0402_5%
1 2
1 2
1 2
R295 22_0402_5%R295 22_0402_5%
1 2
R137 22_0402_5%R137 22_0402_5%
1 2
R101 33_0402_5% R101 33_0402_5%
R109
R109
10K_0402_5%
10K_0402_5%
R110
R110
@
@
10K_0402_5%
10K_0402_5%
RTS5159_48M<23>
CLK_ICH_48M<17>
CLK_ICH_14M<17>
H_STP_CPU#<17>
H_STP_PCI#<17>
CLK_PCI_LPC<25>
CLK_PCI_ICH<15>
VGATE<17,25,35>
4.7P_0402_50VNPO
4.7P_0402_50VNPO
C120
@C120
@
1 2
4.7P_0402_50VNPO
4.7P_0402_50VNPO
C123
@C123
@
1 2
1 2
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#
For PCI2_TME:0=Overclocking of CPU and SRC allowed (ICS only) 1=Overclocking of CPU and SRC NOT allowed
1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS
+3VS+3VS +3VS
R119
R129
R129
10K_0402_5%
10K_0402_5%
1 2
ITP_EN PCI4_SEL PCI2_TME
R132
R132
@
@
10K_0402_5%
10K_0402_5%
1 2
4
R119
@
@
10K_0402_5%
10K_0402_5%
1 2
R117
R117
10K_0402_5%
10K_0402_5%
1 2
FSB
FSC
VGATE
H_STP_CPU#
H_STP_PCI#
CLK_XTAL_IN
CLK_XTAL_OUT
PCI_LPC
PCI2_TME
PCI4_SEL
ITP_EN
U11
U11
55
VDD_SRC
6
VDD_REF
12
VDD_PCI
72
VDD_CPU
19
VDD_48
27
VDD_PLL3
66
VDD_CPU_IO
31
VDD_PLL3_IO
62
VDD_SRC_IO
52
VDD_SRC_IO
23
VDD_IO
38
VDD_SRC_IO
FSA
20
USB_0/FS_A
2
FS_B/TEST_MODE
7
REF_0/FS_C/TEST_
8
REF_1
1
CKPWRGD/PD#
11
NC
53
CPU_STOP#
54
PCI_STOP#
5
XTAL_IN
4
XTAL_OUT
13
PCI_1
14
PCI_2
15
PCI_3
16
PCI_4/SEL_LCDCL
17
PCIF_5/ITP_EN
18
VSS_PCI
3
VSS_REF
22
VSS_48
26
VSS_IO
69
VSS_CPU
30
VSS_PLL3
34
VSS_SRC
59
VSS_SRC
42
VSS_SRC
73
VSS
SLG8SP556VTR_QFN72_10X10
SLG8SP556VTR_QFN72_10X10
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
SRC_0/DOT_96
SRC_0#/DOT_96#
LCDCLK/27M
LCDCLK#/27M_SS
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
SRC_10#
SRC_11#
CLKREQ_3#
CLKREQ_4#
CLKREQ_6#
CLKREQ_7#
CLKREQ_9#
SLKREQ_10#
CLKREQ_11#
USB_1/CLKREQ_A#
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
9
SDA
10
SCL
71
CPU_0
70
CPU_0#
68
CPU_1
67
CPU_1#
24
25
28
29
32
SRC_2
33
SRC_2#
35
SRC_3
36
SRC_3#
39
SRC_4
40
SRC_4#
57
SRC_6
56
SRC_6#
61
SRC_7
60
SRC_7#
64
63
44
SRC_9
45
SRC_9#
50
SRC_10
51
48
SRC_11
47
37
41
58
65
43
49
46
21
Compal Secret Data
Compal Secret Data
Compal Secret Data
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
CPU_ITP
CPU_ITP#
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_ICH
CLK_PCIE_ICH#
MCH_CLKREQ#
WLAN_CLKREQ#
CLKREQ_LAN#
Deciphered Date
Deciphered Date
Deciphered Date
CLK_SMBDATA <11>
CLK_SMBCLK <11>
CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>
CLK_MCH_BCLK <6>
CLK_MCH_BCLK# <6>
CLK_MCH_DREFCLK <6>
CLK_MCH_DREFCLK# <6>
MCH_SSCDREFCLK <6>
MCH_SSCDREFCLK# <6>
CLK_PCIE_SATA <16>
CLK_PCIE_SATA# <16>
CLK_MCH_3GPLL <8>
CLK_MCH_3GPLL# <8>
CLK_PCIE_WLAN <19>
CLK_PCIE_WLAN# <19>
CPU_ITP <4>
CPU_ITP# <4>
CLK_PCIE_LAN <24>
CLK_PCIE_LAN# <24>
CLK_PCIE_ICH <17>
CLK_PCIE_ICH# <17>
SRC PORT LIST
PORT
SRC0 SRC2 SRC3 SRC4 SRC6 SRC7 SRC8 SRC9 SRC10 SRC11
MCH_CLKREQ# CLKREQ_LAN# WLAN_CLKREQ#
DEVICE
MCH_DREFCLK PCIE_SATA MCH_3GPLL
PCIE_WLAN
PCIE_LAN PCIE_ICH
R139 10K_0402_5%R139 10K_0402_5% R111 10K_0402_5%R111 10K_0402_5% R84 10K_0402_5%R84 10K_0402_5%
+3VS
12 12 12
REQ PORT LIST
MCH_CLKREQ# <6>
WLAN_CLKREQ# <19>
CLKREQ_LAN# <24>
REQ_3# REQ_4# REQ_6# REQ_7# REQ_9# REQ_10# REQ_11# REQ_A#
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Clock Generator CK505
Clock Generator CK505
Clock Generator CK505
MCH_DREFCLK
PCIE_WLAN
PCIE_LAN
LA-5091P
LA-5091P
LA-5091P
1
DEVICEPORT
1.0
1.0
1.0
of
12 39Wednesday, April 22, 2009
of
12 39Wednesday, April 22, 2009
of
12 39Wednesday, April 22, 2009
Page 13
5
4
3
2
1
+LCDVDD
R70
R70
470_0805_5%
D D
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
C C
470_0805_5%
Q29A
Q29A
GMCH_LVDDEN<8>
R72
R72
100K_0402_5%
100K_0402_5%
1/9: Reversed LVDS cannector pinout, but LVDS cable did not need to change.
+5VALW
12
61
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1 2
R63
R63 1M_0402_5%
1M_0402_5%
1 2
1 2
100K_0402_5%
100K_0402_5%
3
Q29B
Q29B
4
R73
R73
2
C395
C395
1
1000P_0402_50V7K
1000P_0402_50V7K
LVDSA0+<8> LVDSA0-<8>
LVDSA2+<8> LVDSA2-<8>
MIC_DATA<20>
MIC_CLK<20>
BKOFF#<25>
+3VS
W=60mils
Q3
Q3
S
S
G
G
AO3413_SOT23
AO3413_SOT23
2
D
D
1 3
C396
@ C396
@
4.7U_0805_10V4Z
4.7U_0805_10V4Z
R1006 0_0402_5%R1006 0_0402_5% R1007 0_0402_5%R1007 0_0402_5%
BKOFF#
100P_0402_50V8J~D
100P_0402_50V8J~D
W=60mils
1 2 1 2
C229
C229
+LCDVDD
4.7K_0402_5%
4.7K_0402_5%
@
@
1
C394
C394
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
2
12
R60
R60
@
@
1
C230
C230
2
100P_0402_50V8J~D
100P_0402_50V8J~D
LCD POWER CIRCUIT
+LCDVDD +LCDVDD_R +3VS +3VS_LCD +3VS +VMIC
L21
L21
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
+CAM_VDD+3VS +LCDVDD_R
1 2
C398
C398
4.7U_0805_10V4Z
4.7U_0805_10V4Z
LCD/PANEL BD. Conn.
JP24
JP24
42
GMD
GND
40
40
38
38
36
36
34
34
32
32
30
30
28
28
26
26
24
24
22
22
20
20
18
18
16
16
14
14
12
12
10
10
8
8
6
6
4
4
2
2
ACES_87242-4001-09
ACES_87242-4001-09
Change to SP02000MD00
1
2
INVPWR_B+ +3VS_LCD +VMIC
41 39
39
37
37
35
35
33
33
31
31
29
29
27
27
25
25
23
23
21
21
19
19
17
17
15
15
13
13
11
11
9
9
7
7
5
5
3
3
1
1
C397
C397
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+CAM_VDD+5VALW
R35
R35
1 2
0_0603_5%
0_0603_5%
LVDC+
R1027 0_0402_5%R1027 0_0402_5%
LVDC-
1 2
R1026 0_0402_5%R1026 0_0402_5%
W=20mils
1
C45
C45
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+3VS
R69
R69
10K_0402_5%
10K_0402_5%
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
R65
R65
10K_0402_5%
10K_0402_5%
1 2
12
INVT_PWM <25>
L22
L22
1 2
EDID_CLK_LCD <8> EDID_DAT_LCD <8>
LVDSA1+ <8> LVDSA1- <8>
LVDSAC+ <8> LVDSAC- <8>
USBP1
USBN1
1
C399
C399
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
4
1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
R44
R44
1 2
0_0402_5%
0_0402_5%
@
@
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
4
1
L64
L64
R46
R46
1 2
0_0402_5%
0_0402_5%
3
3
2
2
L37
L37
1 2
1
C647
C647
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
USB20_P1 <17>
USB20_N1 <17>
B B
L18
@ L18
@
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
12
1
C85
C85
68P_0402_50V8J
68P_0402_50V8J
SI3457BDV-T1-E3_TSOP6~D
SI3457BDV-T1-E3_TSOP6~D
40mil
1
C829
C829
1000P_0402_50V7K
1000P_0402_50V7K
2
A A
5
12
R1158
R1158
100K_0402_5%~D
100K_0402_5%~D
1 2
R1159 332K_0402_1%R1159 332K_0402_1%
BKOFF#
PWR_SRC_ON
2
S
S
4 5
G
G
3
INVPWR_B+B+
1
C393
C393
0.1U_0603_25V7K
0.1U_0603_25V7K
2
Q80
Q80
D
D
6
2 1
Q81
Q81 RHU002N06_SOT323-3~D
RHU002N06_SOT323-3~D
D
S
D
S
1 3
G
G
2
4
40mil
1
C830
C830
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
2
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
LVDS/INVERTER
LVDS/INVERTER
LVDS/INVERTER
LA-5091P
LA-5091P
LA-5091P
13 39Wednesday, April 22, 2009
13 39Wednesday, April 22, 2009
13 39Wednesday, April 22, 2009
1
of
of
of
1.0
1.0
1.0
Page 14
A
B
C
D
E
Close to CRT CONN for ESD.
2
2
3
@
1
@C29
@
10P_0402_50V8J
10P_0402_50V8J
2
JVGA_HS
JVGA_VS
@
D3
D3
1
C29
1 1
Place closed to chipset
GMCH_CRT_R<8>
GMCH_CRT_G<8>
GMCH_CRT_B<8>
R5
2 2
GMCH_CRT_HSYNC<8>
Place closed to chipset
GMCH_CRT_VSYNC<8>
12
12
R13
R13
R19
R19
150_0402_1%
150_0402_1%
150_0402_1%R5150_0402_1%
1 2
C38 0.1U_0402_16V4Z
C38 0.1U_0402_16V4Z
1 2
R282 39_0402_5%R282 39_0402_5%
C234 0.1U_0402_16V4Z@C234 0.1U_0402_16V4Z@
1 2
R296 39_0402_5%R296 39_0402_5%
150_0402_1%
150_0402_1%
12
1 2
+CRT_VCC
5
1
U15
U15
P
4
OE#
A2Y
G
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
3
+CRT_VCC
1
5
U4
U4
P
4
OE#
A2Y
G
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
3
CRT_HSYNC_1
CRT_VSYNC_1
1
C26
@C26
@
2
22P_0402_50V8J
22P_0402_50V8J
1
C35
@ C35
@
C30
@C30
@
2
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
1 2
L19 BLM18AG121SN1D_0603~D
L19 BLM18AG121SN1D_0603~D
1 2
L5 BLM18AG121SN1D_0603~D
L5 BLM18AG121SN1D_0603~D
L1
L1
1 2
BLM18BB470SN1D_2P~D
BLM18BB470SN1D_2P~D
L3
L3
1 2
BLM18BB470SN1D_2P~D
BLM18BB470SN1D_2P~D
L4
L4
1 2
BLM18BB470SN1D_2P~D
BLM18BB470SN1D_2P~D
1
2
10P_0402_50V8J
10P_0402_50V8J
C1
@ C1
@
10P_0402_50V8J
10P_0402_50V8J
1
C232
@ C232
@
2
1
2
C20
@C20
@
10P_0402_50V8J
10P_0402_50V8J
1
@C31
@
10P_0402_50V8J
10P_0402_50V8J
2
C31
1
2
PSOT24C_SOT23-3
PSOT24C_SOT23-3
3
@
@
D4
D4
PSOT24C_SOT23-3
PSOT24C_SOT23-3
1
RED
GREEN
BLUE
+3VS
12
12
3 3
GMCH_CRT_DATA<8>
GMCH_CRT_CLK<8>
4 4
A
2.2K_0402_5%
2.2K_0402_5%
R165
R165
R163
R163
2.2K_0402_5%
2.2K_0402_5%
+3VS
2.2K_0402_5%
2.2K_0402_5%
5
4
2
Q14B
Q14B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
61
Q14A
Q14A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
B
+CRT_VCC
12
R16
R16
3
C228
C228
100P_0402_50V8J~D
100P_0402_50V8J~D
12
R164
R164
2.2K_0402_5%
2.2K_0402_5%
@
@
VGA_DDC_DAT
VGA_DDC_CLK
1
C33
C33
2
@
@
1
2
68P_0402_50V8K
68P_0402_50V8K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
+5VS
W=40mils
D6
D6
2 1
CH491DPT_SOT-23
CH491DPT_SOT-23
Deciphered Date
Deciphered Date
Deciphered Date
CRT PORT
F1
F1 5A_125V_R451005.MRL~D
5A_125V_R451005.MRL~D
1 2
@
@
1 2
R303 0_0805_5%R303 0_0805_5%
RED
VGA_DDC_DAT GREEN
JVGA_HS BLUE
JVGA_VS
VGA_DDC_CLK
D
+CRT_VCC
1 2
C36 1U_0402_6.3V4Z~D
C36 1U_0402_6.3V4Z~D
JP68
JP68
6
11
1 7
12
2 8
16
13
17 3 9
14
4
10 15
5
FOX_DZ11A91-SB264-7F~D
FOX_DZ11A91-SB264-7F~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
CRT PORT
CRT PORT
CRT PORT
LA-5091P
LA-5091P
LA-5091P
E
1.0
1.0
1.0
of
of
of
14 39Wednesday, April 22, 2009
14 39Wednesday, April 22, 2009
14 39Wednesday, April 22, 2009
Page 15
5
D D
+3VS
R260 8.2K_0402_5%
R260 8.2K_0402_5%
1 2
R263 8.2K_0402_5%
R263 8.2K_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R262 8.2K_0402_5%
R262 8.2K_0402_5%
R264 8.2K_0402_5%
R264 8.2K_0402_5%
R259 8.2K_0402_5%
R259 8.2K_0402_5%
R256 8.2K_0402_5%
R256 8.2K_0402_5%
R258 8.2K_0402_5%
R258 8.2K_0402_5%
R257 8.2K_0402_5%
R257 8.2K_0402_5%
+3VS
R254 8.2K_0402_5%
C C
B B
R254 8.2K_0402_5%
R255 8.2K_0402_5%
R255 8.2K_0402_5%
R271 8.2K_0402_5%
R271 8.2K_0402_5%
R270 8.2K_0402_5%
R270 8.2K_0402_5%
R276 8.2K_0402_5%
R276 8.2K_0402_5%
R272 8.2K_0402_5%
R272 8.2K_0402_5%
R275 8.2K_0402_5%
R275 8.2K_0402_5%
R273 8.2K_0402_5%
R273 8.2K_0402_5%
R274 8.2K_0402_5%
R274 8.2K_0402_5%
R265 8.2K_0402_5%
R265 8.2K_0402_5%
R266 8.2K_0402_5%
R266 8.2K_0402_5%
R261 8.2K_0402_5%
R261 8.2K_0402_5%
R277 8.2K_0402_5%
R277 8.2K_0402_5%
R278 8.2K_0402_5%
R278 8.2K_0402_5%
PCI_DEVSEL#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_REQ#5
4
U6B
U6B
E18
AD0
C18
AD1
A16
F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10
F11
F10
E9 D9 B9 A8 A6 C7 B6 E6 D6
PCI_PIRQA# PCI_PIRQB# PCI_PIRQF# PCI_PIRQC# PCI_PIRQD#
A3 B4 C5 B5
AE5
AD5 AG4 AH4 AD9
PCI
PCI
AD2 AD3 AD4 AD5 AD6 AD7
REQ4# / GPIO22
AD8
GNT4# / GPIO48
AD9
GPIO1 / REQ5#
AD10
GPIO17 / GNT5#
AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
Interrupt I/F
GPIO2 / PIRQE#
PIRQA#
GPIO3 / PIRQF#
PIRQB#
GPIO4 / PIRQG#
PIRQC#
GPIO5 / PIRQH#
PIRQD#
MISC
MISC
RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]
ICH7_BGA652
ICH7_BGA652
REQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3# GNT3#
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PME#
RSVD[6] RSVD[7] RSVD[8] RSVD[9]
MCH_SYNC#
3
D7 E7 C16 D16 C17 D17 E13 F13 A13 A14 C8 D8
B15 C12 D12 C15
A7 E10 B18 A12 C9 E11 B10 F15 F14 F16
C26 A9 B19
G8 F7 F8 G7
AE9 AG8 AH8 F21 AH20
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_REQ#5
PCI_IRDY#
PCI_RST# PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY#
PCI_FRAME#
PLTRST#_ICH CLK_PCI_ICH
PCI_PIRQE#
PCI_PIRQG# PCI_PIRQH#
1 2
For EC request.
+3VS
1 2
C297 0.1U_0402_16V4Z@ C297 0.1U_0402_16V4Z@
R244
R244 100K_0402_5%
100K_0402_5%
CLK_PCI_ICH <12>
MCH_ICH_SYNC# <6>
PCI_RST# <25>
2
1
For EMI, close to ICH7
PCI_RST#
PLTRST#_ICH
2
2
C358
C358
C357
C357
@
@
1
1
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Place closely pin A9
CLK_PCI_ICH
@
@
R246
R246
10_0402_5%
10_0402_5%
1 2
1
@
@
C359
C359
8.2P_0402_50V8D
8.2P_0402_50V8D
2
TC7SH08FUF_SSOP5
TC7SH08FUF_SSOP5
5
U16
@U16
PLTRST#_ICH
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
1
B
2
A
3
1 2
R226
R226 0_0402_5%
0_0402_5%
@
P
4
Y
G
Deciphered Date
Deciphered Date
Deciphered Date
12
R227
R227
100K_0402_5%
100K_0402_5%
2
PLTRST# <6,17,19,24,25>
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
ICH7M(1/4)-HUB/PCI/HOST
ICH7M(1/4)-HUB/PCI/HOST
ICH7M(1/4)-HUB/PCI/HOST
LA-5091P
LA-5091P
LA-5091P
15 39Wednesday, April 22, 2009
15 39Wednesday, April 22, 2009
15 39Wednesday, April 22, 2009
1
of
of
of
1.0
1.0
1.0
Page 16
5
C49
C49
15P_0402_50V8J
15P_0402_50V8J
12
32.768K_1TJS125BJ4A421P
32.768K_1TJS125BJ4A421P
2
3
C50
C50
15P_0402_50V8J
15P_0402_50V8J
12
D D
HDA_SYNC_AUDIO<20>
HDA_BITCLK_AUDIO_R
HDA_RST_AUDIO#<20>
HDA_SDOUT_AUDIO<20>
C C
B B
1 2
R235 39_0402_5%
R235 39_0402_5%
1 2
R230 39_0402_5%R230 39_0402_5%
1 2
R236 39_0402_5%
R236 39_0402_5%
1 2
R233 39_0402_5%R233 39_0402_5%
SATA_IRX_DTX_N0<22> SATA_IRX_DTX_P0<22> SATA_ITX_C_DRX_N0<22> SATA_ITX_C_DRX_P0<22>
+RTCBATT
R214 1M_0402_5%R214 1M_0402_5%
1 2
R216 332K_0402_1%R216 332K_0402_1%
1 2
+RTCBATT
2
C294
C294
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
+RTCBATT
SM_INTRUDER#
ICH_INTVRMEN
R217
R217 20K_0402_5%
20K_0402_5%
1 2
J5
@J5
@
C317
C317
1 2
1U_0603_10V4Z
1U_0603_10V4Z
HDA_SYNC_ICH
HDA_RST_ICH#
HDA_SDOUT_ICH
39P_0402_50V8J
39P_0402_50V8J
21
3MM
3MM
1
C280
C280
@
@
2
SATA_ITX_C_DRX_N0 SATA_ITX_C_DRX_P0
4
Y3
Y3
1
IN
NC
4
OUT
NC
C389
C389
39P_0402_50V8J
39P_0402_50V8J
@
@
C409 0.01U_0402_16V7K
C409 0.01U_0402_16V7K
12C411 0.01U_0402_16V7K
C411 0.01U_0402_16V7K
CLK_PCIE_SATA#<12> CLK_PCIE_SATA<12>
ICH_RTCX1
12
R37
R37
10M_0402_5%
10M_0402_5%
ICH_RTCX2
2
1
HDA_SDIN0<20>
12
R11 24.9_0402_1%R11 24.9_0402_1%
1 2
+3VS
R77 4.7K_0402_5%R77 4.7K_0402_5%
1 2 1 2
R23 8.2K_0402_5%R23 8.2K_0402_5%
ICH_RTCRST#
ICH_INTVRMEN SM_INTRUDER#
HDA_BITCLK_ICH HDA_SYNC_ICH
HDA_RST_ICH#
HDA_SDOUT_ICH
SATA_IRX_DTX_N0 SATA_IRX_DTX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0
AF18
AH10 AG10
AG16 AH16
AF16
AH15
AF15
AB1 AB2
AA3
W4
W1
W3
AF3 AE3 AG2 AH2
AF7 AE7 AG6 AH6
AF1 AE1
U6A
U6A
Y5
Y1 Y2
V3
U3
U5 V4 T5
U7 V6 V7
U1 R6
R5
T2 T3 T1
T4
ICH7_BGA652
ICH7_BGA652
3
RTXC1 RTCX2
RTCRST#
INTVRMEN INTRUDER#
EE_CS EE_SHCLK EE_DOUT EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0 LAN_RXD1 LAN_RXD2
LAN_TXD0 LAN_TXD1 LAN_TXD2
ACZ_BCLK ACZ_SYNC
ACZ_RST#
ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA_CLKN SATA_CLKP
SATARBIASN SATARBIASP
IORDY IDEIRQ DDACK# DIOW# DIOR#
RTC
RTC
GPIO49 / CPUPWRGD
LPCCPU
LPCCPU
LDRQ1# / GPIO23
LFRAME#
LAN
LAN
A20GATE
CPUSLP#
TP1 / DPRSTP#
TP2 / DPSLP#
INIT3_3V#
AC-97/AZALIA
AC-97/AZALIA
STPCLK#
THERMTRIP#
SATA
SATA
IDE
IDE
R309
R309
4.7K_0402_5%
4.7K_0402_5%
LAD0 LAD1 LAD2 LAD3
LDRQ0#
A20M#
FERR#
IGNNE#
INIT#
INTR
RCIN#
SMI#
DCS1# DCS3#
DD10 DD11 DD12 DD13 DD14 DD15
DDREQ
@
@
2
LPC_AD0
AA6
LPC_AD1
AB5
LPC_AD2
AC4
LPC_AD3
Y6
AC3 AA5
LPC_FRAME#_R
AB3
GATEA20
AE22
H_A20M#
AH28
AG27
H_DPRSTP#
AF24
H_DPSLP#
AH25
H_FERR#
AG26
H_PWRGOOD
AG24
H_IGNNE#
AG22 AG21
H_INIT#
AF22
H_INTR
AF25
KB_RST#
AG23
H_SMI#
AF23
H_NMI
AH24
NMI
DA0 DA1 DA2
DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9
12
AH22
AF26
AH17 AE17 AF17
AE16 AD16
AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15
AE15
4.7K_0402_5%
4.7K_0402_5%
H_STPCLK#
THRMTRIP_ICH#
HDA_BITCLK_AUDIO_R
R311
R311
@
@
LPC_AD0 <25> LPC_AD1 <25> LPC_AD2 <25> LPC_AD3 <25>
R900 33_0402_5%
R900 33_0402_5%
1 2
R204 10K_0402_5% R204 10K_0402_5%
12
GATEA20 <25> H_A20M# <4>
56_0402_5%
56_0402_5%
12
H_FERR# <4>
H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4> H_INTR <4>
KB_RST# <25>
H_SMI# <4> H_NMI <4>
H_STPCLK# <4>
1 2
R196
R196
24.9_0402_1%
24.9_0402_1%
1
2
3
12
4
PCS3P73Z11BXG-08-CR_TDFN8_2X2
PCS3P73Z11BXG-08-CR_TDFN8_2X2
R20
R20
U8
U8
CLKIN
PD#/OE
FS
GND
SA00002G800
SA00002G800 @
@
LPC_FRAME# <25>
+3VS
+VCCP
8
VDD
7
SSEXTR
6
DLY_CTRL
5
ModOUT
H_DPRSTP# <4,35> H_DPSLP# <4>
+VCCP
12
R194
R194
56_0402_5%
56_0402_5%
H_THERMTRIP# <4,6>
Layout note: R194 needs to placed within 2" of ICH7, R193 must be placed within 2" of R194 w/o stub.
+3VS+3VS
1 2
C815 0.1U_0402_16V4Z@ C815 0.1U_0402_16V4Z@
1 2
R150 1M_0402_5%
R150 1M_0402_5%
@
@
1 2
R307
R307
22_0402_5%
22_0402_5%
@
@
HDA_BITCLK_AUDIO <20>
1
R312
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
R312
1 2
0_0402_5%
0_0402_5%
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
ICH7M(2/4)-LAN/ATA/LPC/RTC
ICH7M(2/4)-LAN/ATA/LPC/RTC
ICH7M(2/4)-LAN/ATA/LPC/RTC
LA-5091P
LA-5091P
LA-5091P
1
of
of
of
16 39Wednesday, April 22, 2009
16 39Wednesday, April 22, 2009
16 39Wednesday, April 22, 2009
1.0
1.0
1.0
Page 17
5
4
3
2
1
+3VS
SERIRQ
1 2
R21 10K_0402_5%
R21 10K_0402_5%
R22 8.2K_0402_5%
R22 8.2K_0402_5%
+3VALW
D D
C C
B B
A A
1 2
R269 10K_0402_5%
R269 10K_0402_5%
1 2
R267 10K_0402_5%
R267 10K_0402_5%
1 2
R268 10K_0402_5%
R268 10K_0402_5%
1 2
R224 10K_0402_5%@R224 10K_0402_5%@
1 2
R223 10K_0402_5%@R223 10K_0402_5%@
1 2
R241 1K_0402_5%
R241 1K_0402_5%
R250 8.2K_0402_5%
R250 8.2K_0402_5%
1 2
R222 10K_0402_5%@R222 10K_0402_5%@
1/9: De-pop R284 for +3VS back drive issue.
+3VALW
R284 10K_0402_5%@ R284 10K_0402_5%@
some intel ICH7M H_STP_PCI# has the below glitch that let Silego clk. gen enter iAMT mode when power on, but ICS clk. gen has no this issue now.
1 2
12
1 2
PM_CLKRUN#
LINKALERT#
ITP_DBRESET#
OCP#
SPI_MISO
SB_SPI_CS#
ICH_PCIE_WAKE#
ICH_LOW_BAT#
SPI_MOSI
H_STP_PCI#
WLAN
LAN
USB_OC#1 USB_OC#2 USB_OC#4 USB_OC#5 USB_OC#6
USB_OC#0
USB_OC#3 USB_OC#7
R251
R251
10K_0402_5%
10K_0402_5%
PCIE_PTX_IRX_N2<19> PCIE_PTX_IRX_P2<19> PCIE_ITX_C_PRX_N2<19> PCIE_ITX_C_PRX_P2<19>
PCIE_PTX_IRX_N3<24> PCIE_PTX_IRX_P3<24> PCIE_ITX_C_PRX_N3<24> PCIE_ITX_C_PRX_P3<24>
1 2
1 2
R247
R247
1 2
10K_0402_5%
10K_0402_5%
R249
R249
1 2
10K_0402_5%
10K_0402_5%
R248
R248
1 2
10K_0402_5%
10K_0402_5%
R252
R252
10K_0402_5%
10K_0402_5%
+3VALW
ICH_SMBCLK<12>
ICH_SMBDATA<12>
C66 0.1U_0402_10V7K~D
C66 0.1U_0402_10V7K~D C67 0.1U_0402_10V7K~D
C67 0.1U_0402_10V7K~D
C60 0.1U_0402_10V7K~D
C60 0.1U_0402_10V7K~D
1 2
C64 0.1U_0402_10V7K~D
C64 0.1U_0402_10V7K~D
1 2
2.2K_0402_5%
2.2K_0402_5%
+3VALW
PM_BMBUSY#<6>
H_STP_PCI#<12> H_STP_CPU#<12>
ICH_PCIE_WAKE#<19>
EC_THERM#<25>
12 12
+3VALW+3VALW
R55
R55
1 2
8.2K_0402_5%
8.2K_0402_5%
SB_SPKR<20>
SERIRQ<25>
VGATE<12,25,35>
EC_SMI#<25>
USB_OC#0<27>
USB_OC#3<27>
USB_OC#7<27>
12
R59
R59
T4 PADT4 PAD
12
R56
R56
2.2K_0402_5%
2.2K_0402_5%
PCIE_ITX_PRX_N2 PCIE_ITX_PRX_P2
PCIE_ITX_PRX_N3 PCIE_ITX_PRX_P3
SB_SPI_CS#
SPI_MOSI SPI_MISO
ICH_SMBCLK ICH_SMBDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1
ICH_RI#
SB_SPKR SUS_STAT# ITP_DBRESET#
PM_BMBUSY#
OCP#
H_STP_PCI# H_STP_CPU#
PM_CLKRUN#
ICH_PCIE_WAKE#
SERIRQ EC_THERM#
VGATE
EC_SMI#
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7
U6C
U6C
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0 / BM_BUSY#
B23
GPIO11 / SMBALERT#
AC20
GPIO18 / STPPCI#
AF21
GPIO20 / STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32 / CLKRUN#
AC19
GPIO33 / AZ_DOCK_EN#
U2
GPIO34 / AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7_BGA652
ICH7_BGA652
U6D
U6D
F26
PERn1
F25
PERp1
E28
PETn1
E27
PETp1
H26
PERn2
H25
PERp2
G28
PETn2
G27
PETp2
K26
PERn3
K25
PERp3
J28
PETn3
J27
PETp3
M26
PERn4
M25
PERp4
L28
PETn4
L27
PETp4
P26
PERn5
P25
PERp5
N28
PETn5
N27
PETp5
T25
PERn6
T24
PERp6
R28
PETn6
R27
PETp6
R2
SPI_CLK
P6
SPI_CS#
P1
SPI_ARB
P5
SPI_MOSI
P2
SPI_MISO
D3
OC0#
C4
OC1#
D5
OC2#
D4
OC3#
E5
OC4#
C3
OC5# / GPIO29
A2
OC6# / GPIO30
B3
OC7# / GPIO31
ICH7_BGA652
ICH7_BGA652
PCI-EXPRESS
PCI-EXPRESS
SPI
SPI
USB
USB
SMB
SMB
SYS
SYS
GPIO
GPIO
GPIO
GPIO
DIRECT MEDIA INTERFACE
DIRECT MEDIA INTERFACE
DMI_IRCOMP
SATA
GPIO
SATA
GPIO
Clocks
Clocks
POWER MGT
POWER MGT
DMI0RXN DMI0RXP DMI0TXN
DMI0TXP
DMI1RXN DMI1RXP DMI1TXN
DMI1TXP
DMI2RXN DMI2RXP DMI2TXN
DMI2TXP
DMI3RXN DMI3RXP DMI3TXN
DMI3TXP
DMI_CLKN DMI_CLKP
DMI_ZCOMP
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P
USBRBIAS#
USBRBIAS
GPIO21 / SATA0GP GPIO19 / SATA1GP GPIO36 / SATA2GP GPIO37 / SATA3GP
CLK14 CLK48
SUSCLK
SLP_S3# SLP_S4# SLP_S5#
PWROK
GPIO16 / DPRSLPVR
TP0 / BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 GPIO24 GPIO25
GPIO35 / SATAREQ#
GPIO38 GPIO39
V26 V25 U28 U27
Y26 Y25 W28 W27
AB26 AB25 AA28 AA27
AD25 AD24 AC28 AC27
AE28 AE27
C25 D25
F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3
USBRBIAS
D2 D1
AF19 AH18 AH19 AE19
AC1 B2
C20
B24 D23 F22
AA4
AC22
C21
C23
C19
Y4
E20 A20 F19 E19 R4 E22 R3 D20 AD21 AD20 AE20
DMI_MTX_IRX_N0 DMI_MTX_IRX_P0 DMI_ITX_MRX_N0 DMI_ITX_MRX_P0
DMI_MTX_IRX_N1 DMI_MTX_IRX_P1 DMI_ITX_MRX_N1 DMI_ITX_MRX_P1
CLK_PCIE_ICH# CLK_PCIE_ICH
DMI_IRCOMP
USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7
+3VS
R207
R207
8.2K_0402_5%
8.2K_0402_5%
1 2
CLK_ICH_14M CLK_ICH_48M
ICH_SUSCLK
PM_SLP_S3# PM_SLP_S4# PM_SLP_S5#
ICH_POK_EC
PM_DPRSLPVR
ICH_LOW_BAT#
PBTN_OUT#
PLTRST#
EC_RSMRST#
R26 10K_0402_5%
R26 10K_0402_5%
1 2
EC_SCI# ACIN
EC_LID_OUT#
DMI_MTX_IRX_N0 <6> DMI_MTX_IRX_P0 <6> DMI_ITX_MRX_N0 <6> DMI_ITX_MRX_P0 <6>
DMI_MTX_IRX_N1 <6> DMI_MTX_IRX_P1 <6> DMI_ITX_MRX_N1 <6> DMI_ITX_MRX_P1 <6>
CLK_PCIE_ICH# <12> CLK_PCIE_ICH <12>
R243 24.9_0402_1%
R243 24.9_0402_1%
1 2
USB20_N0 <27> USB20_P0 <27> USB20_N1 <13> USB20_P1 <13> USB20_N2 <19,23> USB20_P2 <19,23> USB20_N3 <27> USB20_P3 <27> USB20_N4 <19> USB20_P4 <19> USB20_N5 <19> USB20_P5 <19> USB20_N6 <19,23> USB20_P6 <19,23> USB20_N7 <27> USB20_P7 <27>
R242 22.6_0402_1% R242 22.6_0402_1%
1 2
Within 500 mils
CLK_ICH_14M <12> CLK_ICH_48M <12>
T16 PADT16 PAD
PM_SLP_S3# <25> PM_SLP_S4# <25> PM_SLP_S5# <25>
ICH_POK_EC <6,25>
1 2
PM_DPRSLPVR <6,35>
PBTN_OUT# <25>
PLTRST# <6,15,19,24,25>
EC_RSMRST# <25>
EC_SCI# <25> ACIN <25,30>
EC_LID_OUT# <25>
Within 500 mils
+1.5VS
USB1(Right) CMOS CARD READER USB2(Left) WWAN BT
USB3(Left)
Place closely pin B2 Place closely pin AC1
12
R245
R245
@
@
1
C355
C355
@
@
2
R24
R24 10K_0402_5%
10K_0402_5%
CLK_ICH_48M
10_0402_5%
10_0402_5%
4.7P_0402_50V8C
4.7P_0402_50V8C
CLK_ICH_14M
12
R212
R212
@
@
10_0402_5%
10_0402_5%
1
C275
C275
4.7P_0402_50V8C
4.7P_0402_50V8C
@
@
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
ICH7M(3/4)-USB/GPIO/PCIE
ICH7M(3/4)-USB/GPIO/PCIE
ICH7M(3/4)-USB/GPIO/PCIE
LA-5091P
LA-5091P
LA-5091P
17 39Wednesday, April 22, 2009
17 39Wednesday, April 22, 2009
17 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 18
5
4
3
2
1
1
2
1
C285
C285
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C353
C353
C345
C345
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
+1.5VS
C344
C344
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VCCP
0.94A
1
+
+
C252
C252
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
2
10mA
+3VALW
14mA
0.27A
+3VS
1
C354
C354
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C347
C347
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C339
C339
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
17mA
T11PAD T11PAD
T3PAD T3PAD T14PAD T14PAD
+3VS
+3VALW
+3VALW
U6E
U6E
A4
VSS[0]
A23
VSS[1]
B1
VSS[2]
B8
VSS[3]
B11
VSS[4]
B14
VSS[5]
B17
VSS[6]
B20
VSS[7]
B26
VSS[8]
B28
VSS[9]
C2
VSS[10]
C6
VSS[11]
C27
VSS[12]
D10
VSS[13]
D13
VSS[14]
D18
VSS[15]
D21
VSS[16]
D24
VSS[17]
E1
VSS[18]
E2
VSS[19]
E4
VSS[21]
E8
VSS[22]
56mA
+3VS
1
C296
C296
+VCCP
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
1
C262
C273
C273
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
45mA
C262
C274
C274
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+RTCBATT
1
1
C289
C289
C292
C292
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
E15
F3 F4
F5 F12 F27 F28
G1 G2 G5 G6
G9 G14 G18 G21 G24 G25 G26
H3 H4
H5 H24 H27 H28
J1 J2
J5 J24 J25 J26 K24 K27 K28 L13 L15 L24 L25 L26
M3 M4
M5 M12 M13 M14 M15 M16 M17 M24 M27 M28
N1 N2 N5
N6 N11 N12 N13 N14 N15 N16 N17 N18 N24 N25 N26
P3
P4
P12 P13 P14 P15 P16 P17 P24 P27
VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97]
ICH7_BGA652
ICH7_BGA652
VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194]
P28 R1 R11 R12 R13 R14 R15 R16 R17 R18 T6 T12 T13 T14 T15 T16 T17 U4 U12 U13 U14 U15 U16 U17 U24 U25 U26 V2 V13 V15 V24 V27 V28 W6 W24 W25 W26 Y3 Y24 Y27 Y28 AA1 AA24 AA25 AA26 AB4 AB6 AB11 AB14 AB16 AB19 AB21 AB24 AB27 AB28 AC2 AC5 AC9 AC11 AD1 AD3 AD4 AD7 AD8 AD11 AD15 AD19 AD23 AE2 AE4 AE8 AE11 AE13 AE18 AE21 AE24 AE25 AF2 AF4 AF8 AF11 AF27 AF28 AG1 AG3 AG7 AG11 AG14 AG17 AG20 AG25 AH1 AH3 AH7 AH12 AH23 AH27
U6F
ICH_V5REF_RUN
6mA
+1.5VS
D D
+3VS+5VS
12
D21
R237
R237
100_0402_5%
100_0402_5%
R64
C C
B B
A A
R64
10_0402_5%
10_0402_5%
50mA
+1.5VS
+1.5VS
D21 RB751V-40_SOD323-2
RB751V-40_SOD323-2
1 2
ICH_V5REF_RUN
1
C343
C343 1U_0603_10V4Z
1U_0603_10V4Z
2
+3VALW+5VALW
12
D11
D11 RB751V-40_SOD323-2
RB751V-40_SOD323-2
1 2
ICH_V5REF_SUS
1
C346
C346
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Place closely pin AG28 within 100mlis.
+1.5VS_DMIPLLR
R189
R189
1 2
0.5_0805_1%
0.5_0805_1%
1
2
+3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
C264
C264
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C340
C340
0.77A
1
1
+
+
C279
C279
C93
C93
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
Check power sequence if OK then @ Vccp->1.5V->3.3V
R186
R186
0_0805_5%
0_0805_5%
C272
C272
10U_0805_10V4Z
10U_0805_10V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS_DMIPLL
1
1
C271
C271
2
2
0.01U_0402_25V7K
0.01U_0402_25V7K
2
Place closely pin D28,T28,AD28.
Place closely pin AG5.
C350
C350
1
C263
C263
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10mA
1
2
Place closely pin AG9.
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
+1.5VS
10mA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C305
C305
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
0.64A
C282
C282
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
C269
C269
1U_0603_10V4Z
1U_0603_10V4Z
T2 PADT2 PAD T6 PADT6 PAD
+3VS
ICH_V5REF_SUS
1
C349
C349
2
+3VS
1
C356
C356
2
+1.5VS_DMIPLL
1
2
1
2
ICH_AA2 ICH_Y7
G10
AD17
F6
AA22 AA23 AB22 AB23 AC23 AC24 AC25 AC26 AD26 AD27 AD28
D26 D27 D28 E24 E25 E26 F23
F24 G22 G23
H22
H23
J22
J23 K22 K23
L22
L23
M22 M23
N22 N23 P22 P23 R22 R23 R24 R25 R26 T22 T23 T26 T27 T28 U22 U23 V22 V23
W22 W23
Y22 Y23
B27
AG28
AB7 AC6 AC7 AD6 AE6
AF5 AF6
AG5 AH5
AD2
AH11
AB10
AB9 AC10 AD10 AE10
AF10
AF9 AG9 AH9
E3
C1
AA2
Y7
V5
V1 W2 W7
1
C291
C291
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
U6F
V5REF[1]
V5REF[2]
V5REF_Sus
Vcc1_5_B[1] Vcc1_5_B[2] Vcc1_5_B[3] Vcc1_5_B[4] Vcc1_5_B[5] Vcc1_5_B[6] Vcc1_5_B[7] Vcc1_5_B[8] Vcc1_5_B[9] Vcc1_5_B[10] Vcc1_5_B[11] Vcc1_5_B[12] Vcc1_5_B[13] Vcc1_5_B[14] Vcc1_5_B[15] Vcc1_5_B[16] Vcc1_5_B[17] Vcc1_5_B[18] Vcc1_5_B[19] Vcc1_5_B[20] Vcc1_5_B[21] Vcc1_5_B[22] Vcc1_5_B[23] Vcc1_5_B[24] Vcc1_5_B[25] Vcc1_5_B[26] Vcc1_5_B[27] Vcc1_5_B[28] Vcc1_5_B[29] Vcc1_5_B[30] Vcc1_5_B[31] Vcc1_5_B[32] Vcc1_5_B[33] Vcc1_5_B[34] Vcc1_5_B[35] Vcc1_5_B[36] Vcc1_5_B[37] Vcc1_5_B[38] Vcc1_5_B[39] Vcc1_5_B[40] Vcc1_5_B[41] Vcc1_5_B[42] Vcc1_5_B[43] Vcc1_5_B[44] Vcc1_5_B[45] Vcc1_5_B[46] Vcc1_5_B[47] Vcc1_5_B[48] Vcc1_5_B[49] Vcc1_5_B[50] Vcc1_5_B[51] Vcc1_5_B[52] Vcc1_5_B[53]
Vcc3_3[1]
VccDMIPLL
Vcc1_5_A[1] Vcc1_5_A[2] Vcc1_5_A[3] Vcc1_5_A[4] Vcc1_5_A[5] Vcc1_5_A[6] Vcc1_5_A[7] Vcc1_5_A[8] Vcc1_5_A[9]
VccSATAPLL
Vcc3_3[2]
Vcc1_5_A[10] Vcc1_5_A[11] Vcc1_5_A[12] Vcc1_5_A[13] Vcc1_5_A[14] Vcc1_5_A[15] Vcc1_5_A[16] Vcc1_5_A[17] Vcc1_5_A[18]
VccSus3_3[19]
VccUSBPLL
VccSus1_05/VccLAN1_05[1] VccSus1_05/VccLAN1_05[2]
VccSus3_3/VccLAN3_3[1] VccSus3_3/VccLAN3_3[2] VccSus3_3/VccLAN3_3[3] VccSus3_3/VccLAN3_3[4]
ICH7_BGA652
ICH7_BGA652
Vcc1_05[1] Vcc1_05[2] Vcc1_05[3] Vcc1_05[4] Vcc1_05[5] Vcc1_05[6] Vcc1_05[7] Vcc1_05[8]
Vcc1_05[9] Vcc1_05[10] Vcc1_05[11] Vcc1_05[12] Vcc1_05[13] Vcc1_05[14] Vcc1_05[15] Vcc1_05[16] Vcc1_05[17] Vcc1_05[18] Vcc1_05[19] Vcc1_05[20]
Vcc3_3 / VccHDA
VccSus3_3/VccSusHDA
V_CPU_IO[1] V_CPU_IO[2] V_CPU_IO[3]
Vcc3_3[3] Vcc3_3[4] Vcc3_3[5] Vcc3_3[6] Vcc3_3[7] Vcc3_3[8]
Vcc3_3[9] Vcc3_3[10] Vcc3_3[11]
Vcc3_3[12] Vcc3_3[13] Vcc3_3[14] Vcc3_3[15] Vcc3_3[16] Vcc3_3[17] Vcc3_3[18] Vcc3_3[19] Vcc3_3[20] Vcc3_3[21]
VccRTC
VccSus3_3[1]
VccSus3_3[2] VccSus3_3[3] VccSus3_3[4] VccSus3_3[5] VccSus3_3[6]
VccSus3_3[7] VccSus3_3[8]
VccSus3_3[9] VccSus3_3[10] VccSus3_3[11] VccSus3_3[12] VccSus3_3[13] VccSus3_3[14] VccSus3_3[15] VccSus3_3[16] VccSus3_3[17] VccSus3_3[18]
Vcc1_5_A[19]
Vcc1_5_A[20]
Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]
Vcc1_5_A[24]
Vcc1_5_A[25]
VccSus1_05[1]
VccSus1_05[2] VccSus1_05[3]
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
U6
R7
AE23 AE26 AH26
AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19
A5 B13 B16 B7 C10 D15 F9 G11 G12 G16
W5
P7
A24 C24 D19 D22 G19
K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7
AB17 AC17
T7 F17 G17
AB8 AC8
K7
C28 G20
A1 H6 H7 J6 J7
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C336
C336
C316
C316
2
1U_0603_10V4Z
1U_0603_10V4Z
1
2
1
C332
C332
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C333
C333
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1 2
C284 0.1U_0402_16V4Z
C284 0.1U_0402_16V4Z
ICH_K7
ICH_C28 ICH_G20
1
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
ICH7-M(4/4)-POWER/GND
ICH7-M(4/4)-POWER/GND
ICH7-M(4/4)-POWER/GND
LA-5091P
LA-5091P
LA-5091P
18 39Wednesday, April 22, 2009
18 39Wednesday, April 22, 2009
18 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 19
A
B
C
D
E
+3VS_WLAN
+1.5VS
Mini-Express Card for WLAN
1
C195
4.7U_0805_10V4Z
ICH_PCIE_WAKE#<17>
WLAN_CLKREQ#<12>
+3VS_WWAN
C196
C196
@
@
4.7U_0805_10V4Z
1
C106
C106
2
@
@
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 1
2 2
3 3
4 4
C903
C903
2
2
EC_TX<25> EC_RX<25>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z 47P_0402_50V8J
47P_0402_50V8J
JP54
ICH_PCIE_WAKE# +3VS_WLAN BT_ACTIVE# WLAN_ACTIVE WLAN_CLKREQ#
1
C905
C905
2
@
@
47P_0402_50V8J
47P_0402_50V8J
PCIE_ITX_C_PRX_N2<17> PCIE_ITX_C_PRX_P2<17>
EC_TX EC_RX
CLK_PCIE_WLAN#<12>
CLK_PCIE_WLAN<12>
PCIE_PTX_IRX_N2<17> PCIE_PTX_IRX_P2<17>
EC_TX EC_RX
+3VS_WWAN
R118 0_0402_5%@R118 0_0402_5%@
1 2
R116 0_0402_5%@R116 0_0402_5%@
1 2
+3VS_WLAN
R85 0_0402_5% R85 0_0402_5% R87 0_0402_5% R87 0_0402_5%
R114 0_0402_5%@ R114 0_0402_5%@
1 2
R115 0_0402_5%@ R115 0_0402_5%@
1 2
1 2
C2220.1U_0402_16V4Z C2220.1U_0402_16V4Z
1 2 1 2
Mini-Express Card for WWAN
1 2
C2230.1U_0402_16V4Z @ C2230.1U_0402_16V4Z @
JP54
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
53
BELLW_80003-1021
BELLW_80003-1021
SP07000IE00
SP07000IE00
JP56
JP56
@
@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
BELLW_80003-1021
BELLW_80003-1021
SP07000IE00
SP07000IE00
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
GND1
GND2
2 4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
GND2
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
W=120mils
+3VS_WWAN
R62 0_0805_5%R62 0_0805_5%
USB20_WLAN_N USB20_WLAN_P
+3VS_WWAN
R14
@R14
@
1 2
1 2
WL_OFF# PLTRST#
1 2
R83
R83
1 2
R348
@ R348
@
R1168 0_0402_5%@ R1168 0_0402_5%@ R1169 0_0402_5%@ R1169 0_0402_5%@
112
JUMP_43X39
JUMP_43X39
0_0402_5%
0_0402_5%
1 2 1 2
J3
J3
1
C98
C98
C195
1
C121
C121
C118
C118
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R1166 0_0402_5%R1166 0_0402_5%
1 2
R1167 0_0402_5%R1167 0_0402_5%
1 2
2
+3VS
PLTRST#
1
1
C113
C113
C904
C904
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
+1.5VS
WL_OFF# <25>
PLTRST# <6,15,17,24,25>
+3VS
+3VALW
2
0.01U_0402_25V7K
0.01U_0402_25V7K
USB20_N2 <17,23> USB20_P2 <17,23>
BT_OFF#<25>
WXMIT_OFF# <25>
USB20_N4 <17> USB20_P4 <17>
47P_0402_50V8J
47P_0402_50V8J
USB20_N6 <17,23> USB20_P6 <17,23>
2N7002LT1G_SOT23-3
2N7002LT1G_SOT23-3
2
SB770020010
SB770020010
BlueTooth Interface
+3VS+5VS
R93
R93 1M_0402_5%
1M_0402_5%
1 2
1 2
R94
R94 100K_0402_5%
100K_0402_5%
13
D
D
Q11
Q11
G
G
S
S
Q20
Q20
AO3413_SOT23
AO3413_SOT23
2
2
C171
C171
1000P_0402_50V7K
1000P_0402_50V7K
1
G
G
2
C172
C172
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
S
S
D
D
1 3
+BT_VCC
C185
C185
4.7U_0805_10V4Z
4.7U_0805_10V4Z
(MAX=200mA)
+3VS
USB20_P5<17> USB20_N5<17>
R130
@R130
@
0_0603_5%
0_0603_5%
1 2
USB20_P5 USB20_N5 BT_ACTIVE# WLAN_ACTIVE
+BT_VCC
JP22
JP22
8
8
GND
7
7
6
6
5
5
4
4
3
3
2
2
1
1
GND
ACES_87213-0800G
ACES_87213-0800G
Tiger FW update for S3 issue.
+BT_VCC
1
C186
C186
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
10
9
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Mini-Card/BT CONN
Mini-Card/BT CONN
Mini-Card/BT CONN
LA-5091P
LA-5091P
LA-5091P
19 39Wednesday, April 22, 2009
19 39Wednesday, April 22, 2009
19 39Wednesday, April 22, 2009
E
1.0
1.0
1.0
of
of
of
Page 20
A
+VDDA +VDDA
+3VS
12
R149
R149 10K_0402_5%
10K_0402_5%
C216
2 1
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
C
C
2
B
B
E
E
12
C216
12
12
1U_0603_10V4Z
1U_0603_10V4Z
R152
R152
10K_0402_5%
10K_0402_5%
1 2
R153 20K_0402_5%
R153 20K_0402_5%
1
Q13
Q13
2SC2411KT146_SOT23-3
2SC2411KT146_SOT23-3
3
D13
D13 CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
2 1
MONO_IN1 MONO_IN
12
D1
R1170
@R1170
@
10K_0402_5%
10K_0402_5%
1 1
C218
C218
BEEP#<25>
C226
@ C226
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SB_SPKR<17>
1
1U_0603_10V4Z
1U_0603_10V4Z
2
C219
C219
1U_0603_10V4Z
1U_0603_10V4Z
12
12
R155
R155
560_0402_5%
560_0402_5%
1 2
R156
R156
560_0402_5%
560_0402_5%
1 2
R154
@R154
@
10K_0402_5%
10K_0402_5%
@ D1
@
B
C220
C220
1U_0603_10V4Z
1U_0603_10V4Z
12
20K_0402_5%
20K_0402_5% R151
R151
C
12
R1160
@R1160
@
10K_0402_5%
10K_0402_5%
C213 680P_0402_50V7K
C213 680P_0402_50V7K
C833 680P_0402_50V7K
12
R1161
@R1161
@
10K_0402_5%
12
10K_0402_5%
C833 680P_0402_50V7K
LINE_OUTL
LINE_OUTR
Need to create symbol and footprint for Codec VA2
D
R293
R293 0_0603_5%
0_0603_5%
@ U20
@
IN
GND
SHDN
U20
12
5
OUT
4
BYP
@ C407
@
0.01U_0402_25V7K
0.01U_0402_25V7K
C407
+5VS +5VAMP +VDDA
L15
L15
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1 2
10U_0805_10V4Z
10U_0805_10V4Z
C405
C405
60mil
1
1
C406
C406
2
2
1U_0603_10V6K~D
1U_0603_10V6K~D
1
2
3
APL5151-475BC-TRL_SOT23-5
APL5151-475BC-TRL_SOT23-5
E
(output = 150 mA)
1
1
C408
C408
2
2
1U_0603_10V6K~D
1U_0603_10V6K~D
4.75V for LDO pop
40mil
HD Audio Codec
FBMA-L11-160808-800LMT_0603
FBMA-L11-160808-800LMT_0603
L23
L23
2 2
+MIC1_VREFO
12
12
R535
R535
4.7K_0402_5%
4.7K_0402_5%
3 3
4 4
MIC1_L<21>
MIC1_R<21>
1 2
R79 0_0603_5%
R79 0_0603_5%
1 2
R281 0_0603_5%
R281 0_0603_5%
1 2
R313 0_0603_5%
R313 0_0603_5%
R533
R533
4.7K_0402_5%
4.7K_0402_5%
+VDDA
R290 1K_0402_5%
R290 1K_0402_5%
1 2
R331 1K_0402_5%
R331 1K_0402_5%
1 2
JACK_PLUG_MIC<21> JACK_PLUG_HP<21>
EAPD<25>
1 2
X5R for audio performance considering
C373
C373
12
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K C387
C387
12
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
HDA_RST_AUDIO#<16>
HDA_SYNC_AUDIO<16>
HDA_SDOUT_AUDIO<16>
MIC_DATA<13>
R215 20K_0402_1%
R215 20K_0402_1%
1 2
R310 5.1K_0402_1%
R310 5.1K_0402_1%
1 2
EAPD
R96 0_0402_5%
R96 0_0402_5%
1 2
1
C2584.7U_0805_ 10V4Z C2584.7U_0805_ 10V4Z
C4020.1U_0402_ 16V4Z C4020.1U_0402_ 16V4Z
2
MONO_IN
DGND AGND
+AVDD_AC97
40mil 20mil
1
C1700.1U_0402_ 16V4Z C1700.1U_0402_ 16V4Z
2
38
U23
U23
AVDD125AVDD2
14
LINE2_L
15
LINE2_R
16
MIC2_L
17
MIC2_R
23
LINE1_L
24
LINE1_R
18
LINE1_VREFO
20
LINE2_VREFO
19
MIC2_VREFO
21
MIC1_L
22
MIC1_R
12
PCBEEP_IN
11
RESET#
10
SYNC
5
SDATA_OUT
2
GPIO0/DMIC_DATA1/2
3
GPIO1/DMIC_DATA3/4
13
SENSE A
34
SENSE B
47
EAPD
48
SPDIFO1
4
DVSS1
7
DVSS2
ALC272-GR_LQFP48
ALC272-GR_LQFP48
DMIC_CLK1/2
DMIC_CLK3/4
MONO_OUT
MIC1_VREFO
+VDDC
1
DVDD
LOUT1_L
LOUT_R
LOUT2_L
LOUT2_R
SPDIFO2
BITCLK
SDATA_IN
CPVEE
HPOUT_R
VREF
JDREF
HPOUT_L
AVSS1 AVSS2
NC
CBP
CBN
9
DVDD_IO
35
36
39
41
45
46
43
44
6
8
37
29
31
28
32
30
27
40
33
26 42
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C210
C210
C403
C403
C404
C404
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C_LINE_OUTL LINE_OUTL
1 2
R405 10_0402_5% @ R405 10_0402_5% @
1 2
R133 39_0402_5%
R133 39_0402_5%
C376
C376
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
10mil
ACZ_VREF
ACZ_JDREF
4.7U_0805_10V4Z
2
12
1 2
R15
R15 75_0402_1%
75_0402_1%
1 2
R25
R25 75_0402_1%
75_0402_1%
1 2
L24
L24
FBMA-L11-160808-800LMT_0603
FBMA-L11-160808-800LMT_0603
1 2
C174 1000P_0402_50V7K@ C174 1000P_0402_50V7K@
1 2
C385 1000P_0402_50V7K@ C385 1000P_0402_50V7K@
1 2
C187 1U_0603_10V4Z
C187 1U_0603_10V4Z
1 2
C173 1U_0603_10V4Z
C173 1U_0603_10V4Z
MIC_CLK <13>
HDA_BITCLK_AUDIO <16>
1 2
C400 10P_0402_50V8J @C400 10P_0402_50V8J @
C374
C374
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
12
+MIC1_VREFO
HP_R
HP_L
LINE_OUTRC_LINE_OUTR
HDA_SDIN0 <16>
+3VS
HP_R <21>
HP_L <21>
LINE_OUTL <21>
LINE_OUTR <21>
+MIC1_VREFO
10mil
1
2
ACZ_VREF
ACZ_JDREF
C183
C183
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
10U_0805_10V4Z
10U_0805_10V4Z
R92
R92 20K_0402_1%
20K_0402_1%
1
C188
C188
2
Close to codec
1
C192
@ C192
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
DGND AGND
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
ALC272-VB-GR Codec
ALC272-VB-GR Codec
ALC272-VB-GR Codec
LA-5091P
LA-5091P
LA-5091P
20 39Wednesday, April 22, 2009
20 39Wednesday, April 22, 2009
20 39Wednesday, April 22, 2009
E
1.0
1.0
1.0
of
of
of
Page 21
A
B
C
D
E
APA2031A SPK Amplifier
GAIN0 GAIN1 0 0 6dB 0 1 10dB 1 0 15.6dB
1 1
2 2
3 3
1 1 21.6dB
+5VAMP +5VAMP
R713
@ R713
@
100K_0402_1%
100K_0402_1%
1 2
R715
R715
100K_0402_1%
100K_0402_1%
1 2
R306 0_0402_5%
LINE_OUTL<20>
LINE_OUTR<20>
R306 0_0402_5%
R308 0_0402_5%
R308 0_0402_5%
JACK_PLUG_HP<20>
R714
R714
100K_0402_1%
100K_0402_1%
1 2
R716
R716
100K_0402_1%
100K_0402_1%
@
@
1 2
1 2
1 2
HP_R<20>
HP_L<20>
GAIN1GAIN0
12
12
R712
R712
R711
R711
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
@
@
@
@
W=40mil
C375
C375
0.1U_0603_25V7K
0.1U_0603_25V7K
+5VAMP
1
1
C383
C383
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
GAIN0
GAIN1
INL_A
INR_A
1
1
C813
2
C813
0.1U_0603_25V7K
0.1U_0603_25V7K
2
C814
C814
1 2
L50 BLM15AG121SN1D_0402L50 BLM15AG121SN1D_0402
1 2
L51 BLM15AG121SN1D_0402L51 BLM15AG121SN1D_0402
U19
U19
16
6
15
2
3
5
17
9
7
APA2031RI-TRL_TSSOP20
APA2031RI-TRL_TSSOP20
@C768
@
10P_0402_50V8J
10P_0402_50V8J
12
VDD PVDD PVDD
GAIN0
GAIN1
LIN-
RIN-
LIN+
RIN+
NC
SHUTDOWN#
LOUT-
ROUT-
LOUT+
ROUT+
GND GND GND GND GND
BYPASS
0.47U_0603_16V4Z
0.47U_0603_16V4Z
19
8
14
4
18
1 11 13 20 21 10
HeadPhone JACK
1
C768
10P_0402_50V8J
10P_0402_50V8J
2
C34
C34
C769
@C769
@
SPKL-
SPKR-
SPKL+
SPKR+
1
2
1
2
+3VALW
12
R292
R292 47K_0402_5%
47K_0402_5%
EC_MUTE#
2
3
D45
D45
1
PJDLC05_SOT23-3
PJDLC05_SOT23-3
HPR
HPL
EC_MUTE# <25>
SPKL+ SPK_L1+ SPKL­SPKR+ SPKR-
6 5
4
3
2 1
R225 0_0402_5% R225 0_0402_5%
1 2
R219 0_0402_5% R219 0_0402_5%
1 2
R205 0_0402_5% R205 0_0402_5%
1 2
R195 0_0402_5% R195 0_0402_5%
20mil
JP60
JP60
SUYIN_010030FR006G109ZL
SUYIN_010030FR006G109ZL
JACK-AGND
1
@ J7
@
1
JUMP_43X39
JUMP_43X39
2
2
1 2
Speaker Conn.
1
J7
1
2
2
J8
@J8
@
JUMP_43X39
JUMP_43X39
D17
D17
PJDLC05_SOT23-3
PJDLC05_SOT23-3
SPK_L1­SPK_R1+ SPK_R1-
Close to Speaker CONN for ESD.
2
3
PJDLC05_SOT23-3
PJDLC05_SOT23-3
1
C306 22P_0402_50V8J@ C306 22 P_0402_50V8J@
1
2
3
D18
D18
1
C290 22P_0402_50V8J@ C290 22 P_0402_50V8J@
C270 22P_0402_50V8J@ C270 22 P_0402_50V8J@
1
1
1
2
2
2
12
2
C268 22P_0402_50V8J@ C268 22 P_0402_50V8J@
R197
R197 0_0402_5%
0_0402_5%
@
@
JP55
JP55
1
1
2
2
3
3
GND
4
4
GND
ACES_87213-0400G
ACES_87213-0400G
5 6
Ext.MIC JACK
JACK_PLUG_MIC<20>
2
3
1
C
MIC1_R_1
MIC1_L_1
D46
D46 PJDLC05_SOT23-3
PJDLC05_SOT23-3
MIC1_R<20>
MIC1_L<20>
4 4
A
1 2
L52 BLM15AG121SN1D_0402L52 BLM15AG121SN1D_0402
1 2
L53 BLM15AG121SN1D_0402L53 BLM15AG121SN1D_0402
B
C770
@C770
@
220P_0402_50V8J
220P_0402_50V8J
1
2
220P_0402_50V8J
220P_0402_50V8J
1
C771
@C771
@
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JP61
JP61
6 5
4
3
2 1
SUYIN_010030FR006G109ZL
SUYIN_010030FR006G109ZL
JACK-AGND
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
2009/11/102008/11/10
2009/11/102008/11/10
2009/11/102008/11/10
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
AMP/VR/Audio Jack/MIC
AMP/VR/Audio Jack/MIC
AMP/VR/Audio Jack/MIC
LA-5091P
LA-5091P
LA-5091P
E
of
of
of
21 39Wednesday, April 22, 2009
21 39Wednesday, April 22, 2009
21 39Wednesday, April 22, 2009
1.0
1.0
1.0
Page 22
A
B
C
D
E
F
G
H
For HDD
OCTEK_SAT-22DD1G_NR
OCTEK_SAT-22DD1G_NR
1
SATA_ITX_C_DRX_P0<16>
1 1
SATA_ITX_C_DRX_N0<16>
SATA_IRX_DTX_N0<16> SATA_IRX_DTX_P0<16>
SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0
SATA_IRX_DTX_N0 SATA_IRX_C_DTX_N0 SATA_IRX_DTX_P0
C414 0.01U_0402_16V7K
C414 0.01U_0402_16V7K
12
C415 0.01U_0402_16V7K
C415 0.01U_0402_16V7K
12
+5VS
+3VS
1000P_0402_50V7K
1000P_0402_50V7K
1
C419
C419
2
SATA_IRX_C_DTX_P0
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C410
C410
2
Pleace near HDD CONN
2 2
POWER LED BATT CHARGE LED
+5VALW +5VALW
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
Rsv
19
GND
20
12V
21
12V 12V22GND
JP48
JP48
GND
24
23
DC1 DC2
1 2
R314 820_0402_5%
R883
R883
12
R1103
R1103
100K_0402_5%
100K_0402_5%
3 3
PWR_LED#<25> CHARGE_LED#<25>
4 4
A
B
100K_0402_5%
100K_0402_5%
1 2
61
Q31A
Q31A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2
R90 0_0402_5%@ R90 0_0402_5%@
3
5
4
12
C
R314 820_0402_5%
Q31B
Q31B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+5VALW
12
R1104
R1104
100K_0402_5%
100K_0402_5%
JP62
JP62
1
DC1
DC2
1
2
2
3
5
3
GND
4
6
4
GND
ACES_87213-0400G
ACES_87213-0400G
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
100K_0402_5%
100K_0402_5%
1 2
61
Q75A
Q75A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2
R104 0_0402_5%@ R104 0_0402_5%@
E
R886
R886
3
Q75B
Q75B 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
5
4
12
Deciphered Date
Deciphered Date
Deciphered Date
1 2
R315 300_0402_5%
R315 300_0402_5%
F
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HDD/LED
HDD/LED
HDD/LED
LA-5091P
LA-5091P
G
LA-5091P
of
of
of
22 39Wednesday, April 22, 2009
22 39Wednesday, April 22, 2009
22 39Wednesday, April 22, 2009
H
1.0
1.0
1.0
Page 23
5
4
3
2
1
4 in 1 Card Reader
D D
+VCC_4IN1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
R438
R438 0_0603_5%
0_0603_5%
C580
1
2
C580
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R433
R433
0_0402_5%
0_0402_5%
1 2
1 3 7
9 11 33
8 44 45 47 48
4
5 14
2
12 32
6 46
U30
U30
AV_PLL NC NC CARD_3V3 D3V3 D3V3
3V3_IN RST# MODE_SEL XTLO XTLI
DM DP GPIO0
RREF
DGND DGND
AGND AGND
RTS5159-GR_LQFP48_7X7
RTS5159-GR_LQFP48_7X7
C531
C531
0.1U_0402_16V4Z
R4950_0603_5% @R4950_0603_5% @
R4960_0603_5% R4960_0603_5%
12
C5320.1U_0402_16V4Z C5320.1U_0402_16V4Z
6.19K_0402_1%
6.19K_0402_1%
0.1U_0402_16V4Z
R454
R454 0_0603_5%
0_0603_5%
1 2
+3VS_CARD
12 12
R447
R447
+SDPWR_MSPWR
RST#_R MODE SEL XTLO XTLI
USB20_CARD_N USB20_CARD_P
1 2
12
C526 1U_0402_6.3V4Z~D
C526 1U_0402_6.3V4Z~D
12
C178 4.7U_0603_6.3V6K@C178 4.7U_0603_6.3V6K@
+3VALW
+3VS
R439
R439
USB20_N2<17,19> USB20_P2<17,19>
12
0_0402_5%
0_0402_5%
RST#_R
USB20_N6<17,19> USB20_P6<17,19>
+D3V3
C C
R437
R437
100K_0402_5%
100K_0402_5%
1 2
RST#
1
C514
C514
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
2
B B
Trace width 40 mil
+VCC_4IN1
Trace width 40 mil
1 2
1 2
R1164 0_0402_5%R1164 0_0402_5%
1 2
R1165 0_0402_5%R1165 0_0402_5%
1 2
R1162 0_0402_5%@ R1162 0_0402_5%@ R1163 0_0402_5%@ R1163 0_0402_5%@
1 2
XD_CLE_SP19 XD_CE#_SP18 XD_ALE_SP17
SD_DAT2/XD_RE#_SP16
SD_DAT3/XD_WE#_SP15
SD_DAT4/XD_WP#/MS_D7_SP13
XD_RDY_SP14
SD_DAT5/XD_D0/MS_D6_SP12 SD_CLK/XD_D1/MS_CLK_SP11 SD_DAT6/XD_D7/MS_D3_SP10
MS_INS#_SP9 SD_DAT7/XD_D2/MS_D2_SP8 SD_DAT0/XD_D6/MS_D0_SP7 SD_DAT1/XD_D3/MS_D1_SP6
XD_D5_SP5
XD_D4/SD_DAT1_SP4
SD_CD#_SP3
SD_WP_SP2
XD_CD#_SP1
XTAL_CTR
VREG
MS_D4
EEDI
MS_D5
EEDO EECS EESK
SD_CMD
C523
C523
1 2
10 22 30
1U_0402_6.3V4Z~D
NC
1U_0402_6.3V4Z~D
43 42 41 40 39 38 37 35
SD_MS_CLK
34 31 29 28 27 26 25 23 21 20 19 18
13 24
15 16 17 36
R1032 10_0402_5%@ R1032 10_0402_5%@
R299 0_0402_5%R299 0_0402_5%
1 2
1 2
R460
R460
1 2
R446
R446
1 2
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
1
2
+3VS
C182
C182
C731 10P_0402_50V8J@ C731 10P_0402_50V8J@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
C534
C534
C525
C525
1
1
2
2
SD_DATA2 SD_DATA3
SDCLK
MSCLK MS_DATA3_SD_DATA6 MSCD#
MS_DATA2_SD_DATA7 SD_MS_DATA0 MS_DATA1 MSBS SD_DATA1 SDCD# SDWP#
1 2
The XTAL_CTR can immediacy to +3VS
SDCMD
SDWP# SD_DATA1 SD_MS_DATA0
MSBS SDCLK MS_DATA1 SD_MS_DATA0
MS_DATA2_SD_DATA7
MSCD# MS_DATA3_SD_DATA6 SDCMD MSCLK
SD_DATA3
SD_DATA2 SDCD#
10_0402_5%
10_0402_5%
10P_0402_50V8J
10P_0402_50V8J
R458
@R458
@
C540
@ C540
@
12
12
R461
@R461
@
10_0402_5%
10_0402_5%
2
2
C539
@C539
@
10P_0402_50V8J
10P_0402_50V8J
1
1
JP4
JP4
1
SD-WP
2
SD-DAT1
3
SD-DAT0
4
SD-GND
5
MS-GND
6
MS-BS
7
SD-CLK
8
MS-DAT1
9
MS-DAT0
10
SD-VCC
11
MS-DAT2
12
SD-GND
13
MS-INS
14
MS-DAT3
15
SD-CMD
16
MS-SCLK
17
MS-VCC
18
SD-DAT3
19
MS-GND
20
SD-DAT2
GND1
21
SD-CD
GND2
TAITW_R009-025-LR_NR
TAITW_R009-025-LR_NR
SP07000JC00
SP07000JC00
22 23
MODE SEL
12
R436
@ R436
1
C513
@C513
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A A
5
2
@
0_0402_5%
0_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
C511 22P_0402_50V8J@ C511 22P_0402_50V8J@
@Y4
12MHZ_16P_6X12000012
12MHZ_16P_6X12000012
C515 22P_0402_50V8J@C515 22P_0402_50V8J@
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
@
12
XTLI
12
Y4
XTLO
Deciphered Date
Deciphered Date
Deciphered Date
1 2
R440 0_0402_5%R440 0_0402_5%
2
RTS5159_48M <12>
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Carder RTS5159
Carder RTS5159
Carder RTS5159
LA-5091P
LA-5091P
LA-5091P
1
1.0
1.0
1.0
of
of
of
23 39Wednesday, April 22, 2009
23 39Wednesday, April 22, 2009
23 39Wednesday, April 22, 2009
Page 24
A
C132 0.1U_0402_16V7KC132 0.1U_0402_16V7K
PCIE_PTX_IRX_P3<17>
12
R42
R42 1K_0402_1%
1K_0402_1%
R170
R170 15K_0402_5%
15K_0402_5%
PCIE_PTX_IRX_N3<17>
PCIE_ITX_C_PRX_P3<17>
PCIE_ITX_C_PRX_N3<17>
CLK_PCIE_LAN<12> CLK_PCIE_LAN#<12>
4 4
+3VS
3 3
12
C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K
12
CLKREQ_LAN#<12>
PLTRST#<6,15,17,19,25>
LAN_WAKE#<25>
1 2
C139 30P_0402_50V8JC139 30P_0402_50V8J
1 2
C127 30P_0402_50V8JC127 30P_0402_50V8J
B
PCIE_PTX_C_IRX_N3
PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3
R193 2.49K_0402_1%R193 2.49K_0402_1%
1 2
Y1
Y1
LOM_WAKE# ISOLATEB
12
25MHz_20pF_6X25000017
25MHz_20pF_6X25000017
LAN_X1 LAN_X2
U22
U22
20
HSOP
21
HSON
15
HSIP
16
HSIN
17
REFCLK_P
18
REFCLK_M
25
CLKREQB
27
PERSTB
46
RSET
26
LANWAKEB
28
ISOLATEB
41
CKXTAL1
42
CKXTAL2
23
NC
24
NC
7
GND
14
GND
31
GND
47
GND
22
GNDTX
RTL8103EL-GR_LQFP48_7X7
RTL8103EL-GR_LQFP48_7X7
RTL8103EL-GR
RTL8103EL-GR
C
LED3/EEDO
LED2/EEDI/AUX
LED1/EESK
EECS
LED0
MDIP0 MDIN0 MDIP1 MDIN1
VCTRL12A
VDDTX DVDD12 DVDD12 DVDD12 DVDD12
VCTRL12D
VDD33
VDD33
AVDD33
D
R285
R285
1 2
3.6K_0402_5%
3.6K_0402_5%
33 34 35 32
38
2 3 5 6 8
NC
9
NC
11
NC
12
NC
4
NC
48
19 30 36 13 10
39
NC
44
NC
45
29 37
1 40
NC
43
NC
EEDOPCIE_PTX_C_IRX_P3 LAN_10M#_EEDI LAN_100M#_EESK EECS
LAN_ACTIVITY#
LAN_MDI0+ LAN_MDI0­LAN_MDI1+ LAN_MDI1-
1 2
C140 0.1U_0402_16V4Z
VCTRL12
C140 0.1U_0402_16V4Z
1 2
C131 10U_0805_10V4Z @C131 10U_0805_10V4Z @
Close to Pin10,13,30,36
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+LAN_VDD12
12
C149 0.1U_0402_16V4Z
C149 0.1U_0402_16V4Z
12
C134 0.1U_0402_16V4Z
C134 0.1U_0402_16V4Z
12
C180 0.1U_0402_16V4Z
C180 0.1U_0402_16V4Z
12
C190 0.1U_0402_16V4Z
C190 0.1U_0402_16V4Z C191 10U_0805_10V4Z@ C191 10U_0805_10V4Z@
1 2
C133 0.1U_0402_16V4Z
C133 0.1U_0402_16V4Z
1 2
Close to Pin45
2
1
+3V_LAN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C128
C128
C137
C137
1
U9
4
DO
3
DI
2
SK
1
CS
AT93C46-10SI-2.7_SO8@U9AT93C46-10SI-2.7_SO8@
1 2
R173
R173
1K_0402_1%
1K_0402_1%
2
C168
C168
1
GND
VCC
NC NC
+3V_LAN
5 6 7 8
1
C136
C136
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
2
1
C126
@C126
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+EVDD12
+3V_LAN
1
C141
C141
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
2
E
+3V_LAN
1
C732
C732
470P_0402_50V7K~D
470P_0402_50V7K~D
2
2 2
1 1
LAN_MDI0+ LAN_MDI0-
LAN_MDI1+ LAN_MDI1-
R161 0_0402_5%R161 0_0402_5%
1 2
R231 0_0402_5%R231 0_0402_5%
C143 0.01U_0402_25V7KC143 0.01U_0402_25V7K
C129 0.01U_0402_25V7KC129 0.01U_0402_25V7K
A
1 2
1 2
1 2
R253 0_0402_5%R253 0_0402_5%
1 2
R145 0_0402_5%R145 0_0402_5%
1 2
LAN_MDI0+_R LAN_MDI0-_R LAN_CT0
LAN_CT1 LAN_MDI1+_R LAN_MDI1-_R
U21
U21
1
RD+
2
RD-
3
CT
4
NC
5
NC
6
CT
7
TD+ TD-8TX-
LEF8423A-R
LEF8423A-R
RJ45_MIDI0+
16
RX+
RJ45_MIDI0-
15
RX-
RJ45_CT0
14
CT
13
NC
12
NC
RJ45_CT1
11
CT
RJ45_MIDI1+
10
TX+
RJ45_MIDI1-
9
B
1 2
R229 75_0402_1%
R229 75_0402_1%
1 2
R162 75_0402_1%
R162 75_0402_1%
1
C184
C184 1000P_1206_2KV7K
1000P_1206_2KV7K
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
R148
R148
1 2
0_0603_5%
0_0603_5%
LAN_ACTIVITY#
LAN_100M#_EESK
LAN_10M#_EEDI
1
2
1
@ C125
@
2
1
@C130
@
2
Deciphered Date
Deciphered Date
Deciphered Date
R283 300_0402_5%R283 300_0402_5%
C193
@C193
@
68P_0402_50V8J
68P_0402_50V8J
R144 300_0402_5%R144 300_0402_5%
C125
68P_0402_50V8J
68P_0402_50V8J
R157 300_0402_5%R157 300_0402_5%
C130
68P_0402_50V8J
68P_0402_50V8J
D
RJ45 symbol need update
JP71
JP71
13
Unused
12
12
RJ45_MIDI1-
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
12
+3V_LAN
12
Yellow LED+
14
Yellow LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Orange LED-
10
Green LED+
9
Green LED-
FOX_JM3611A-R5A53-7F-X4
FOX_JM3611A-R5A53-7F-X4
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
15
GND
16
GND
RTL8103EL
RTL8103EL
RTL8103EL
LA-5091P
LA-5091P
LA-5091P
1.0
1.0
1.0
of
of
of
24 39Wednesday, April 22, 2009
24 39Wednesday, April 22, 2009
24 39Wednesday, April 22, 2009
E
Page 25
KB_RST#<16>
+5VALW
R322 4.7K_0402_5%R322 4.7K_0402_5%
+3VS
+3VALW
R324 4.7K_0402_5%R324 4.7K_0402_5%
R323
R323
R320
R320
1 2
R71 47K_0402_1%
R71 47K_0402_1%
1 2
R80 47K_0402_1%
R80 47K_0402_1%
for KB926C/D chip
1 2
1 2
1 2
1 2
+3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
1
1
C147
C147
C148
C148
2
2
R67 10K_0402_5%
R67 10K_0402_5%
1 2
R66 0_0402_5%
R66 0_0402_5%
For ESD.
12
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
KSO1
KSO2
PM_1.8V_PWRGD<33>
PM_SLP_S3#<17> PM_SLP_S5#<17> EC_SMI#<17>
1 2
R291
@R291
@
1 2
R321
R321 47K_0402_5%
47K_0402_5%
VGATE<12,17,35>
EC_TX<19> EC_RX<19>
ON/OFF#<26>
PWR_LED#<22>
PLTRST#<6,15,17,19,24>
GATEA20<16>
SERIRQ<17> LPC_FRAME#<16> LPC_AD3<16> LPC_AD2<16> LPC_AD1<16>
10_0402_5%
10_0402_5%
12
32.768KHZ_12.5P_1TJE125DP1A000M
32.768KHZ_12.5P_1TJE125DP1A000M
1
2
LPC_AD0<16>
CLK_PCI_LPC<12>
PCI_RST#<15>
EC_SCI#<17>
1
C159
C159
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VGATE PM_1.8V_PWRGD
R120 0_0402_5%R120 0_0402_5% R89 0_0402_5%R89 0_0402_5%
EC_TX EC_RX
PLTRST#
C160
C160 27P_0402_50V8J
27P_0402_50V8J
EC_SMB_CK1<36> EC_SMB_DA1<36> EC_SMB_CK2<4> EC_SMB_DA2<4>
1 2 1 2
1 2
R319 0_0402_5%@ R319 0_0402_5%@
R327
R327
1 2
20M_0603_5%
20M_0603_5%
X4
X4
1 2
R301 0_0402_5%@R301 0_0402_5%@ R300 0_0402_5%@R300 0_0402_5%@
XCLKOXCLKI
@
@
1 2 1 2
1
2
LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
EC_RST# EC_SCI#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
EC_SMI#
PLTRST#_R
XCLKI XCLKO
C161
C161 27P_0402_50V8J
27P_0402_50V8J
+3VS
C107 22P_0402_50V8J@C107 22P_0402_50V8J@
+3VALW
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
4.7U_0603_6.3V6K
1
1
C150
C150
C145
C145
2
2
U27
U27
1
GA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ#
4
LFRAME#
5
LAD3
7
LAD2
8
LAD1
10
LPC & MISC
LPC & MISC
LAD0
12
PCICLK
13
PCIRST#/GPIO05
37
ECRST#
20
SCI#/GPIO0E
38
CLKRUN#/GPIO1D
55
KSI0/GPIO30
56
KSI1/GPIO31
57
KSI2/GPIO32
58
KSI3/GPIO33
59
KSI4/GPIO34
60
KSI5/GPIO35
61
KSI6/GPIO36
62
KSI7/GPIO37
39
KSO0/GPIO20
40
KSO1/GPIO21
41
KSO2/GPIO22
42
KSO3/GPIO23
43
KSO4/GPIO24
44
KSO5/GPIO25
45
KSO6/GPIO26
46
KSO7/GPIO27
47
KSO8/GPIO28
48
KSO9/GPIO29
49
KSO10/GPIO2A
50
KSO11/GPIO2B
51
KSO12/GPIO2C
52
KSO13/GPIO2D
53
KSO14/GPIO2E
54
KSO15/GPIO2F
81
KSO16/GPIO48
82
KSO17/GPIO49
77
SCL1/GPIO44
78
SDA1/GPIO45
79
SCL2/GPIO46
80
SDA2/GPIO47
6
PM_SLP_S3#/GPIO04
14
PM_SLP_S5#/GPIO07
15
EC_SMI#/GPIO08
16
LID_SW#/GPIO0A
17
SUSP#/GPIO0B
18
PBTN_OUT#/GPIO0C
19
EC_PME#/GPIO0D
25
EC_THERM#/GPIO11
28
FAN_SPEED1/FANFB1/GPIO14
29
FANFB2/GPIO15
30
EC_TX/GPIO16
31
EC_RX/GPIO17
32
ON_OFF/GPIO18
34
PWR_LED#/GPIO19
36
NUMLED#/GPIO1A
122
XCLK1
123
XCLK0
KB926QFD3_LQFP128_14X14
KB926QFD3_LQFP128_14X14
Int. K/B
Int. K/B Matrix
Matrix
SM Bus
SM Bus
+EC_AVCC +3VALW
1
C176
C176
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
ECAGND
9
22
VCC
VCC
PS2 Interface
PS2 Interface
GND
11
67
33
96
111
125
VCC
VCC
VCC
VCC
AVCC
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
PWM Output
PWM Output
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD Input
AD Input
SELIO2#/AD5/GPIO43
DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D
DA Output
DA Output
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
SPI Device Interface
SPI Device Interface
SPI Flash ROM
SPI Flash ROM
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO
GPIO
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
VR_ON/XCLK32K/GPIO57
EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
GPO
GPIO
GPIO
GND
24
35
GND
GND
GND
94
113
PM_SLP_S4#/GPXID1
GPI
GPI
AGND
69
ECAGND
WL_OFF#/GPXO09
IREF/DA2/GPIO3E
PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D
SDICS#/GPXOA00 SDICLK/GPXOA01
SDIDO/GPXOA02
SPICLK/GPIO58
CIR_RX/GPIO40
SYSON/GPIO56
EC_ON/GPXO05
BKOFF#/GPXO08
ENBKL/GPXID2
AD3/GPIO3B AD4/GPIO42
DA3/GPIO3F
SDIDI/GPXID0
SPIDI/RD#
SPIDO/WR#
SPICS#
AC_IN/GPIO59
GPXO10 GPXO11
GPXID3 GPXID4 GPXID5 GPXID6 GPXID7
V18R
FBMA-L11-160808-601LMT_2P
FBMA-L11-160808-601LMT_2P
1
C166
C166
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
R330
R330
21 23 26 27
63 64 65 66 75 76
68 70 71 72
83 84 85 86 87 88
97 98 99 109
119 120 126 128
73 74 89 90 91 92 93 95 121 127
100 101 102 103 104 105 106 107 108
110 112 114 115 116 117 118
124
L26
L26
12
INVT_PWM BEEP# EN_WOL# ACOFF
BRD_ID
TP_CLK TP_DATA
WL_OFF#
LID_SW#
FRD#SPI_SO FWR#SPI_SI SPI_CLK FSEL#SPICS#
CHARGE_LED#
SYSON
1 2
C831 100P_0402_50V8J
C831 100P_0402_50V8J R123 0_0402_5%R123 0_0402_5%
1 2
EC_ON
SUSP# PBTN_OUT#
V18R
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C146
C146
1
2
12
0_0402_5%
0_0402_5%
INVT_PWM <13> BEEP# <20> EN_WOL# <28> ACOFF <31>
BATT_TEMP <36> BATT_OVP <31>
ADP_I <31>
IREF <31> CHGVADJ <31>
EC_MUTE# <21> USB_EN# <27>
WL_OFF# <19>
LID_SW# <26>
FRD#SPI_SO <26> FWR#SPI_SI <26> SPI_CLK <26> FSEL#SPICS# <26>
FSTCHG <31>
CHARGE_LED# <22>
SYSON <28,33> VR_ON <35> ACIN <17,30>
EC_LID_OUT# <17> EC_ON <26>
BKOFF# <13> BT_OFF# <19> WXMIT_OFF# <19>
PM_SLP_S4# <17> GMCH_ENBKL <8> EAPD <20>
EC_THERM# <17> SUSP# <28,33,34> PBTN_OUT# <17>
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
2
KEYBOARD CONN.
JP13
KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2
+3VALW
Ra
R122
R122 100K_0402_5%
100K_0402_5%
1 2
12
R127
R127 18K_0402_5%
18K_0402_5%
Rb
4.7K_0402_5%
4.7K_0402_5%
EC_RSMRST# <17>
R76
R76
12
10K_0402_5%
10K_0402_5%
D14 RB751V-40_SOD323-2@D14 RB751V-40_SOD323-2@
1 2
1 2
R106 0_0402_5%R106 0_0402_5%
+3VALW
R1153
R1153
100K_0402_5%
100K_0402_5%
1 2
C144
C144
12
R146
R146
D24
D24
RB751V-40_SOD323-2
RB751V-40_SOD323-2
ICH_POK_EC
1 2
R107 10K_0402_5%@ R107 10K_0402_5%@
LAN_WAKE# <24>
+5VS
12
12
R143
R143
4.7K_0402_5%
4.7K_0402_5%
VGATE
TP_CLK <26> TP_DATA <26>
ICH_POK_EC <6,17>
+3VS
KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15
KSO14 KSO11 KSO10 KSO15
KSO6 KSO3 KSO12 KSO13
KSO2 KSO4 KSO7 KSO8
KSI3 KSO5 KSO1 KSI0
KSI4 KSI5 KSO0 KSI2
KSI1 KSI7 KSI6 KSO9
JP13
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
G1
26
G2
ACES_85201-24051
ACES_85201-24051
SP01000FD00
SP01000FD00
For EMI
100P_1206_8P4C_50V8
100P_1206_8P4C_50V8
4 5 3
6
2
7 81
CP1
CP1
100P_1206_8P4C_50V8
100P_1206_8P4C_50V8
4 5 3
6
2
7 81
CP4
CP4
100P_1206_8P4C_50V8
100P_1206_8P4C_50V8
4 5 3
6
2
7 81
CP2
CP2
100P_1206_8P4C_50V8
100P_1206_8P4C_50V8
4 5 3
6
2
7 81
CP3
CP3
100P_1206_8P4C_50V8
100P_1206_8P4C_50V8
4 5 3
6
2
7 81
CP5
CP5
100P_1206_8P4C_50V8
100P_1206_8P4C_50V8
4 5 3
6
2
7 81
CP6
CP6
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
KB926
KB926
KB926
LA-5091P
LA-5091P
LA-5091P
25 39Wednesday, April 22, 2009
25 39Wednesday, April 22, 2009
25 39Wednesday, April 22, 2009
Compal Electronics, Inc.
1.0
1.0
1.0
of
of
of
Page 26
Need to create symbol and footprint for MX SPI ROM
TP_CLK<25> TP_DATA<25>
PJDLC05_SOT23-3
PJDLC05_SOT23-3
Touch/B Connector
+5VS
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
1U_0402_6.3V4Z~D
2
3
D48
D48
1
LID Switch
U18
U18 APX9132ATI-TRL_SOT23-3
APX9132ATI-TRL_SOT23-3
VDD2VOUT
1
C157
C157
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C749
C749
2
3
GND
1
1
2
+3VALW+3VALW
12
1
2
1U_0402_6.3V4Z~D
C750
C750
R102
R102 47K_0402_5%
47K_0402_5%
C156
C156 10P_0402_50V8J
10P_0402_50V8J
System SPI Flash ROM (8Mb)
U28
12
R305
R305 10_0402_5%
10_0402_5%
@
@
1
C119
@C119
@
4.7P_0402_50VNPO
4.7P_0402_50VNPO
2
U28
5
6
1
7
3
8
Q
D
C
S
HOLD
W
VCC
VSS
SST25LF080A_SO8-200mil
SST25LF080A_SO8-200mil
2
4
R1067 0_0402_5%R1067 0_0402_5%
JP20
JP20
1
1
2
2
3
3
4
4
5
G1
2
C177
C177
1
6
G2
ACES_85201-0405N
ACES_85201-0405N
SP01000H300
SP01000H300
SPI_CLK<25>
FSEL#SPICS#<25>
1 2
R1069 33_0402_5%R1069 33_0402_5%
1 2
R1070 0_0402_5%R1070 0_0402_5%
1 2
+3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C179
C179
1
2
22P_0402_50V8J
22P_0402_50V8J
1
C122
@ C122
@
2
MB_Power On/Off SW
LID_SW# <25>
JP42
JP42
ACES_87213-0200
ACES_87213-0200
PUT ON TOP SIDE
TJG-533-V-T/R_6P
TJG-533-V-T/R_6P
@
@
SW2
SW2
1
2
5
6
ON/OFFBTN#
1
1
2
2
3
G1
4
G2
ON/OFFBTN#
3
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C900
C900
1
2
2
3
D50
D50
1
PJDLC05_SOT23-3
PJDLC05_SOT23-3
CHN202UPT SC-70
CHN202UPT SC-70
EC_ON<25>
10K_0402_5%
10K_0402_5%
D22
D22
2
1
3
R126
R126
2N7002LT1G_SOT23-3
2N7002LT1G_SOT23-3
1 2
2
G
G
13
D
D
Q18
Q18
S
S
SB770020010
SB770020010
100K_0402_5%
100K_0402_5%
R125
R125
+3VALW
1000P_0402_50V7K
1000P_0402_50V7K
R1068
R1068
1 2
0_0402_5%
0_0402_5%
12
1
C158
C158
2
ON/OFF# <25>
51_ON# <30>
12
D19
D19
RLZ20A_LL34
RLZ20A_LL34
FRD#SPI_SO <25>FWR#SPI_SI<25>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
LID SW/BIOS/TP
LID SW/BIOS/TP
LID SW/BIOS/TP
LA-5091P
LA-5091P
LA-5091P
26 39Wednesday, April 22, 2009
26 39Wednesday, April 22, 2009
26 39Wednesday, April 22, 2009
of
of
of
1.0
1.0
1.0
Page 27
A
+5VALW
U14
U14
1
GND
2
IN
3
EN1#
1 1
2 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C111
C111
1
2
USB_EN#
4
EN2#
TPS2062ADR_SO8~D
TPS2062ADR_SO8~D
OC1# OUT1 OUT2
OC2#
8 7 6 5
+USB_RIGHT
B
USB_OC#0 <17>
C
R17
R17
On Board USB Connector2A
USB20_N0<17>
USB20_P0<17>
1 2
0_0402_5%
0_0402_5%
@
@
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
2
3
L62
L62
2
3
R36
R36
1 2
0_0402_5%
0_0402_5%
1
4
1
4
D
@
@
1
PJDLC05_SOT23-3
PJDLC05_SOT23-3
USBN0 USBP0
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
D20
D20
C363
C363
E
+USB_RIGHT
2
3
1
1
C21
C21
+
+
470P_0402_50V7K~D
470P_0402_50V7K~D
2
2
JP16
JP16
8
GND
7
GND
6
GND
5
GND
4
VCC
3
USB_N
2
USB_P
1
GND
SUYIN_020173MR004S52KZL
SUYIN_020173MR004S52KZL
D23
@ D23
R39
R39
1 2
0_0402_5%
0_0402_5%
L63
@L63
@
1.5A
C95
C95
A
+5VALW
1
2
USB_EN#
U7
U7
1
GND
VOUT
2
VOUT
VIN VIN3VOUT
4
EN
RT9711PS_SO8
RT9711PS_SO8
3 3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
USB_EN#<25>
4 4
+USB_LEFT
8 7 6 5
FLG
1
C77
@C77
@
1000P_0402_50V7K
1000P_0402_50V7K
2
USB_OC#3 <17>
USB_OC#7 <17>
B
USB20_N3<17>
USB20_P3<17>
USB20_N7<17>
USB20_P7<17>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
3
2
2
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
R40
R40
1 2
0_0402_5%
0_0402_5%
R74
R74
1 2
0_0402_5%
0_0402_5%
L65
@L65
@
3
3
2
2
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
R88
R88
1 2
0_0402_5%
0_0402_5%
C
4
4
1
1
4
4
1
1
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
@
1
PJDLC05_SOT23-3
PJDLC05_SOT23-3
D25
@ D25
@
1
PJDLC05_SOT23-3
PJDLC05_SOT23-3
Deciphered Date
Deciphered Date
Deciphered Date
USBN3
USBP3
USBN7
USBP7
2
3
JP72
JP72
12
+USB_LEFT
2
3
1
1
+
C233
@+C233
@
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
D
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C16
C16
470P_0402_50V7K~D
470P_0402_50V7K~D
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
USB PORTS
USB PORTS
USB PORTS
11
10
9 8 7 6 5 4 3 2 1
LA-5091P
LA-5091P
LA-5091P
E
GND2 GND1
10 9 8 7 6 5 4 3 2 1
ACES_87213-1000G
ACES_87213-1000G
27 39Wednesday, April 22, 2009
27 39Wednesday, April 22, 2009
27 39Wednesday, April 22, 2009
1.0
1.0
1.0
of
of
of
Page 28
A
B
C
D
E
+5VALW
8
C96
C96 10U_0805_10V4Z
10U_0805_10V4Z
5VS_GATE
13
D
D
S
S
7
5
1 1
B+
1
C97
C97
2
10U_0805_10V4Z
10U_0805_10V4Z
1 2
R68
R68
20K_0402_5%
20K_0402_5%
SUSP
2N7002_SOT23
2N7002_SOT23
1
2
2
G
Q8
G
Q8
Q6SI4800BDY-T1-E3_SO8 Q6SI4800BDY-T1-E3_SO8
10U_0805_10V4Z
10U_0805_10V4Z
4
1
C108
C108
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+5VS
1 2 36
C74
C74
1
2
1
C76
C76
1U_0603_10V4Z
1U_0603_10V4Z
2
1 2
13
D
D
S
S
R50
R50 470_0603_5%
470_0603_5%
@
@
SUSP
2
G
G
Q9
Q9 2N7002_SOT23
2N7002_SOT23
@
@
C215
C215
10U_0805_10V4Z
10U_0805_10V4Z
B+
1
2
+3VALW +3VS
8 7
C214
C214
Q17
Q17
5
13
D
D
2
G
G
S
S
1
2
10U_0805_10V4Z
10U_0805_10V4Z
1 2
R185
R185 100K_0402_5%
100K_0402_5%
SUSP
2N7002_SOT23
2N7002_SOT23
Q12SI4800BDY-T1-E3_SO8 Q12SI4800BDY-T1-E3_SO8
1 2 36
4
10U_0805_10V4Z
10U_0805_10V4Z
1
C255
C255
0.1U_0402_25V7K~D
0.1U_0402_25V7K~D
2
C201
C201
1
2
1U_0603_10V4Z
1U_0603_10V4Z
1
2
C202
C202
R179
R179 470_0603_5%
470_0603_5%
@
@
1 2 13
D
D
Q16
Q16
S
S
2N7002_SOT23
2N7002_SOT23
@
@
SUSP
2
G
G
If the +1.8V discharge circuit is pop, R302,
+3VALW TO +3VS+5VALW TO +5VS
Q28 need pop.
R302
Q28
@Q28
@
DTC124EKAT146_SC59-3
DTC124EKAT146_SC59-3
+RTCVREF
+5VALW
@ R302
@
100K_0402_5%
100K_0402_5%
1 2
1
OUT
2
IN
GND
3
+5VALW
2 2
12
R134
@R134
@
47K_0402_5%
47K_0402_5%
R128
@R128
@
1 2
2.2K_0402_5%
2.2K_0402_5%
13
D
D
Q4
@
Q4
@
2N7002_SOT23
2N7002_SOT23
EN_WOL#<25>
3 3
2
G
G
S
S
+3VALW to +3V_LA'
+3VALW +3V_LAN
1
C165
@ C165
@
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
2
J4
J4
2
112
JUMP_43X39
JUMP_43X39
Q19
@
Q19
@
SI3445ADV-T1-E3_TSOP6
SI3445ADV-T1-E3_TSOP6
D
D
S
S
6
4 5
2 1
G
G
3
1
2
C164
@C164
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SYSON#
SYSON<25,33>
SYSON
R298
@R298
@
100K_0402_5%
100K_0402_5%
SUSP
D
SUSP#<25,33,34>
Deciphered Date
Deciphered Date
Deciphered Date
SUSP<34>
+1.5VS +2.5VS +VCCP +1.8V+0.9VS
R61
1 2
13
D
D
S
S
R61 470_0603_5%
470_0603_5%
@
@
SUSPSUSP SYSON#SUSP SUSP
2
G
G
Q7
Q7 2N7002_SOT23
2N7002_SOT23
@
@
R279
R279 470_0603_5%
470_0603_5%
@
@
1 2
13
D
D
2
G
G
Q23
Q23
S
S
2N7002_SOT23
2N7002_SOT23
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
R169
1 2
13
D
D
S
S
R169 470_0603_5%
470_0603_5%
@
@
2
G
G
Q15
Q15 2N7002_SOT23
2N7002_SOT23
@
@
R18
R18 470_0603_5%
470_0603_5%
@
@
1 2
13
D
D
2
G
G
Q2
Q2
S
S
2N7002_SOT23
2N7002_SOT23
@
@
4 4
A
1 2
13
D
D
S
S
R280
R280 470_0603_5%
470_0603_5%
@
@
2
G
G
Q24
Q24 2N7002_SOT23
2N7002_SOT23
@
@
B
1 2
R297
R297 100K_0402_5%
100K_0402_5%
1 2
1
Q27
Q27 DTC124EKAT146_SC59-3
DTC124EKAT146_SC59-3
OUT
2
IN
GND
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DC INTERFACE
DC INTERFACE
DC INTERFACE
LA-5091P
LA-5091P
LA-5091P
E
1.0
1.0
1.0
of
of
of
28 39Wednesday, April 22, 2009
28 39Wednesday, April 22, 2009
28 39Wednesday, April 22, 2009
Page 29
CLIP1
CLIP1 EMI_CLIP
EMI_CLIP
1
GND
CLIP2
CLIP2 EMI_CLIP
EMI_CLIP
1
GND
H32
H32
H33
H33
H34
H34
H35
H35
H36
H23
H23
H15
H15
H24
H24
H29
H29
H30
H30
H31
H31
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
@
@
@
@
@
@
@
1
1
@
1
1
H
@
@
1
@
@
@
@
1
1
H
@
@
@
@
1
1
H36
H
H
H
H
@
@
1
H_2P8
@
@
1
AGND
H37
H37
H38
H38
H39
H7
H7
H
H
H
H
H4
H4 H
H
1
1
@
@
@
@
@
@
1
H_2P8X3P8
H39
H
H
H
H
@
@
1
H_3P2
@
@
1
FM3@FM3
@
@
1
1
@
@
1
FIDUCIAL_C40M80
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Screw
Screw
Screw
LA-5091P
LA-5091P
LA-5091P
29 39Wednesday, April 22, 2009
29 39Wednesday, April 22, 2009
29 39Wednesday, April 22, 2009
of
of
of
1.0
1.0
1.0
FM1@FM1
FM2@FM2
FM4@FM4
Page 30
A
B
C
D
1 1
VIN
PL1
PL1
SMB3025500YA_2P
JP53
JP53
1
1
2
2
3
3
4
4
5
G1
6
SP02000BZ00
SP02000BZ00
PR16
PR16
CHGRTCP
G1
LL4148_LL34-2
LL4148_LL34-2
200_0603_5%
200_0603_5%
1 2
100K_0402_1%
100K_0402_1%
22K_0402_1%
22K_0402_1%
+RTCVREF
PR12
PR12
1 2
3.3V
12
E&T_3802-E04N-01R
E&T_3802-E04N-01R
2 2
+BATT
51_ON#<26>
3 3
0_0402_5%
0_0402_5%
+CHGRTC
1 2
PD3
PD3
12
PR13
PR13
PR14
PR14
PC11
PC11 10U_0805_10V4Z
10U_0805_10V4Z
12
3
APDIN
BIT3021
BIT3021
OUT
12
PC1
PC1 1000P_0402_50V7K
1000P_0402_50V7K
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
N1
PC9
PC9
1 2
0.22U_0603_25V7K
0.22U_0603_25V7K
PU2
PU2
GND
1
SMB3025500YA_2P
1 2
VS
12
PC5
PC5
1000P_0402_50V7K
1000P_0402_50V7K
VIN
12
PR3
PR3
12
12
PR7
PC7
PC7
0.068U_0603_25V7M
0.068U_0603_25V7M
PR7
19.6K_0603_0.1%
19.6K_0603_0.1%
+3VALWP +3VALW
+5VALWP +0.9VS+0.9VSP
+CPU_COREP +CPU_CORE
12
PC2
PC2
100P_0402_50V8J
100P_0402_50V8J
12
PC3
PC3
100P_0402_50V8J
100P_0402_50V8J
VIN
PD2
PD2
LL4148_LL34-2
LL4148_LL34-2
1 2
12
12
PR10
68_1206_5%
68_1206_5%
2
PR15
PR15 200_0603_5%
200_0603_5%
PC12
PC12 1U_0805_25V4Z
1U_0805_25V4Z
PR10
13
PQ1
PQ1
12
N2
2
IN
12
PR11
PR11 68_1206_5%
68_1206_5%
12
PC10
PC10
0.1U_0603_25V7K
0.1U_0603_25V7K
Vin Detector
High 18.059 17.841 17.624 Low 17.418 17.210 16.998
PR1
PR1 10K_0402_1%
10K_0402_1%
@
@
1 2
PR2
PR2 1M_0402_1%
1M_0402_1%
1 2
VS
PR6
PR6
82.5K_0603_0.1%
82.5K_0603_0.1% 22K_0603_1%
22K_0603_1%
1 2
12
PC8
PC8
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
3
+
2
-
PR9
PR9 10K_0402_1%
10K_0402_1%
PJ1
PJ1
112
JUMP_43X118
JUMP_43X118
PJ3
PJ3
112
JUMP_43X118
JUMP_43X118
PJ5
PJ5
112
JUMP_43X118
JUMP_43X118
PC4
PC4
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
1 2
8
P
1
O
G
PU1A
PU1A LM393DG_SO8
LM393DG_SO8
4
12
+RTCVREF
VIN
12
PC6
PC6
0.01U_0402_25V7K
0.01U_0402_25V7K
12
PR4
PR4
10K_0805_5%
10K_0805_5%
12
PD1
PD1
RLZ4.3B_LL34
RLZ4.3B_LL34
12
PR8
PR8
10K_0402_1%
10K_0402_1%
PR5
PR5 10K_0402_1%
10K_0402_1%
1 2
PACIN
ACIN <17,25>
3.3V
PJ2
PJ2
+1.5VSP +1.5VS
+5VALW
+VCCPP +VCCP
2
JUMP_43X118
JUMP_43X118
PJ4
PJ4
2
JUMP_43X79
JUMP_43X79
PJ6
PJ6
2
JUMP_43X118
JUMP_43X118
PJ7
PJ7
2
JUMP_43X118
JUMP_43X118
112
112
112
112
+1.8V+1.8VP
PD16
PD16
+CHGRTC
+RTCBATT
4 4
A
12
RB751V-40TE17_SOD323-2
RB751V-40TE17_SOD323-2
PD4
PD4
1 2
RB751V-40TE17_SOD323-2
RB751V-40TE17_SOD323-2
PR17
PR17 1K_0402_5%
1K_0402_5%
12
JP79 ACES_ 85204-0200N
JP79 ACES_ 85204-0200N
SP02000IA00
SP02000IA00
4
G2
3
G1
2
2
1
1
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
C
+2.5VSP +2.5VS
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PJ8
PJ8
2
112
JUMP_43X118
JUMP_43X118
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DCIN/DECTOR
DCIN/DECTOR
DCIN/DECTOR
LA-5091P
LA-5091P
LA-5091P
D
1.0
1.0
1.0
of
of
of
30 39Wednesday, April 22, 2009
30 39Wednesday, April 22, 2009
30 39Wednesday, April 22, 2009
Page 31
A
B
C
D
PQ3
PQ2
PQ2
FDS4435BZ_SO8
FDS4435BZ_SO8
VIN
PR19
PR19
3.3_1210_5%
3.3_1210_5%
1 1
2.2U_0805_25V6K
2.2U_0805_25V6K
2 2
CP Point Setting
PR22
PR22
3.3_1210_5%
3.3_1210_5%
PC25
PC25
1 2
PC14
PC14
1 2 12
54.9K_0402_1%
54.9K_0402_1%
1 2
0.01U_0402_25V7K
0.01U_0402_25V7K
PR26
PR26
340K_0402_1%
340K_0402_1%
PR31
PR31
CP point=Iadapter*85%
30W adapter Vacset=3.3*(51K/(205K+51K))=0.657V
8 7
5
PD9
PD9
@
@
RLZ24B_LL34
RLZ24B_LL34
PR24
PR24 340K_0402_1%
340K_0402_1%
1 2
ACDET
PR27
PR27
54.9K_0402_1%
54.9K_0402_1%
1 2
1 2
OVPSET
1 2
CP Point=(Vacset/Vvdac)*(0.1/PR19)=1.328A
PR33
Input OVP : 22.3V
ACIN detect : 17.26V
PR33
100K_0402_1%
100K_0402_1%
1 2
3 2 16
4
12
PC19
PC19
1 2
24751_VREF ACSET
CP setting
SI2301BDS-T1-E3_SOT23-3
SI2301BDS-T1-E3_SOT23-3
Fsw : 300KHz
24751_VREF
PR37
PR37
100K_0402_1%
100K_0402_1%
ACOFF
1 2
PC63
3 3
PC63
0.1U_0402_16V7K
0.1U_0402_16V7K
340K_0402_1%
340K_0402_1%
PR40
PR40
24751_VREF
12
PR35
PR35 200K_0402_1%
12
12
200K_0402_1%
13
D
D
2
G
G
S
S
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
PQ23
PQ23
13
D
D
2
G
G
S
S
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
PQ13
PQ13
1 2
PC38
PC38
0.1U_0603_25V7K
0.1U_0603_25V7K
VMB
VS
12
PR65
PR65 10K_0402_1%
10K_0402_1%
BATT_OVP<25>
12
A/D
4 4
A
8
3
P
+
1
0
2
-
G
PU4A
PU4A
4
LM358DR_SO8
LM358DR_SO8
12
PR66
PR66
340K_0402_1%
340K_0402_1%
12
PC61
PC61
PR63
PR63
0.01U_0402_25V7K
0.01U_0402_25V7K 499K_0402_1%
499K_0402_1%
12
PR62
PR62
105K_0402_1%
105K_0402_1%
PQ3
FDS4435BZ_SO8
FDS4435BZ_SO8
3 2 1 6
4
12
PR21
PR21
100K_0402_1%
100K_0402_1%
0.01U_0402_25V7K
0.01U_0402_25V7K
1 2
PR150
PR150 0_0805_5%
0_0805_5%
PR28
PR28
205K_0402_1%
205K_0402_1%
1 2
PC29
PC29
0.01U_0402_25V7K@
0.01U_0402_25V7K@
PQ7
PQ7
2
1 3
ACSET
CHGVADJ<25>
12
PC62
PC62
0.01U_0402_25V7K
0.01U_0402_25V7K
PR18
PR18
8
0.015_1206_1%
0.015_1206_1%
7
5
12
PC22
PC22
0.1U_0603_25V7K
0.1U_0603_25V7K
12
1U_0603_10V6K
1U_0603_10V6K
+RTCVREF
1
2
12
PR30
PR30
51K_0402_1%
51K_0402_1%
12
PR34
PR34
100K_0402_1%
100K_0402_1%
210K_0402_1%
210K_0402_1%
1 2
PC20
PC20
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
1 2
0.47U_0603_16V7K
0.47U_0603_16V7K
24751_VREF
12
PC36
PC36
/BATDRV
REGN
PR43
PR43
VADJ
4
3
12
PC23
PC23
PC31
PC31
12
PR41
PR41
@
@
0_0402_5%
0_0402_5%
VADJ
12
PR64
PR64
CHGEN#
PU3
PU3
1
CHGEN
2
ACN
0.1U_0603_25V7K
0.1U_0603_25V7K
3
ACP
@
@
4
ACDRV
5
ACDET
6
ACSET
7
ACOP
8
OVPSET
9
AGND
10
VREF
11
VDAC
12
VADJ
13
ACGOOD
14
BATDRV
BQ24751ARHDR_QFN28_5X5
BQ24751ARHDR_QFN28_5X5
12
PC59
PC59
499K_0402_1%
499K_0402_1%
1000P_0402_50V7K
1000P_0402_50V7K
"CHGVADJ" connect to EC DA pin
LI-3S :13.5V----BATT-OVP=1.5V BATT-OVP=0.1112*BATT+
8
5
P
+
7
0
6
-
G
PU4B
PU4B
4
LM358DR_SO8
LM358DR_SO8
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PVCC
BTST
HIDRV
REGN
LODRV
PGND
LEARN
CELLS
SRN
SRSET
IADAPT
PH
SRP
BAT
TP
28
27
26
25
24
23
22
21
20
19
18
17
29
16
15
100P_0402_50V8J
100P_0402_50V8J
B+
1 2
PC26
PC26
24751_VREF
CHG_B+
PQ5
PQ5
3 5
241
PQ6
PQ6
3 5
241
1 2
PC15
PC15
4.7U_1206_25V6K
4.7U_1206_25V6K
SIS412
SIS412
12
SIS412
SIS412
12
1 2
FBMA-L11-201209-121LMA50T_0805
FBMA-L11-201209-121LMA50T_0805
PC21
PC21
0.1U_0603_25V6-K~D
0.1U_0603_25V6-K~D
1 2
PR23
PR23
0_0402_5%
0_0402_5%
1 2
12
PD13
PD13
LL4148_LL34-2
LL4148_LL34-2
REGN
12
PC30
PC30 1U_0603_10V6K
1U_0603_10V6K
ACOFF
CELLS
PR32
@ PR32
@
0_0402_5%
0_0402_5%
1 2
PR156
PR156
0_0402_5%
0_0402_5%
1 2
12
PC37
PC37
0.1U_0603_25V7K
0.1U_0603_25V7K
ACOFF <25>
PL2
PL2
0.1U_0603_25V7K
0.1U_0603_25V7K
ICHG setting
PR36
PR36
12
107K_0402_1%
12
PR39
12
PR39 102K_0402_1%
102K_0402_1%
1 2
PR38
PR38
10_0603_5%
10_0603_5%
PC60
PC60
Pre CellCHGVADJ
4.35V3.3V
4V0V
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
12
ADP_I <25>
Deciphered Date
Deciphered Date
Deciphered Date
C
107K_0402_1%
PC39
PC39
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
1 2
PC16
PC16
PC17
PC17
4.7U_1206_25V6K
4.7U_1206_25V6K
PL5
PL5
1 2
PR29
PR29
PC32
PC32
0.1U_0603_25V7K
0.1U_0603_25V7K
IREF <25>
1 2
4.7U_1206_25V6K
4.7U_1206_25V6K
1 2
10UH_MPL73-100_3A_20%
10UH_MPL73-100_3A_20%
4.7_1206_5%
4.7_1206_5%
680P_0603_50V8J
680P_0603_50V8J
1 2
PC24
PC24
PC18
PC18
820P_0402_25V7
820P_0402_25V7
470P_0402_50V8J
PC34
PC34
470P_0402_50V8J
12
PC27
PC27
10U_1206_25V6M
10U_1206_25V6M
12
/BATDRV
PR25
PR25
0.02_1206_1%
0.02_1206_1%
1
2
PC33
PC33
0.1U_0402_16V7K
0.1U_0402_16V7K
1 2
CurrentIREF
1.54A2.1V
2.58V 1.9A 6 Cell
FSTCHG<25>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
PR20
PR20
1 2
PC13
PC13
0.01U_0402_25V7K
0.01U_0402_25V7K
100K_0402_1%
100K_0402_1%
16
243
PQ4
PQ4 FDS4435BZ_SO8
FDS4435BZ_SO8
578
4
3
12
PC35
PC35
0.1U_0603_25V7K
0.1U_0603_25V7K
@
@
12
3 Cell
24751_VREF
PR42
PR42 100K_0402_1%
100K_0402_1%
1 2
CHGEN#
13
D
D
2
G
G
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PQ14
PQ14
S
S
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
CHARGER
CHARGER
CHARGER
LA-5091P
LA-5091P
LA-5091P
D
+BATT
PC28
PC28
10U_1206_25V6M
10U_1206_25V6M
1.0
1.0
1.0
of
of
of
31 39Wednesday, April 22, 2009
31 39Wednesday, April 22, 2009
31 39Wednesday, April 22, 2009
Page 32
5
4
3
2
1
ISL6237_B+
12
SIS412
SIS412
PC48
PC48
12
12
SI7716ADN-T1-GE3_1212-8
SI7716ADN-T1-GE3_1212-8
12
PC49
PC49
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
PL11
PL11
4.7UH_PCMC063T-4R7MN_5.5A_20%
4.7UH_PCMC063T-4R7MN_5.5A_20%
PR51
PR51
4.7_1206_5%
4.7_1206_5%
PC64
PC64
680P_0603_50V8J
680P_0603_50V8J
12
PC50
PC50
2200P_0402_50V7K
2200P_0402_50V7K
+5VALWP
12
PR55
PR55
61.9K_0402_1%
61.9K_0402_1%
1 2
@
@
PR57
PR57
1 2
0_0402_5%
0_0402_5%
1
+
+
2
+5VALWP Imax=4.3A Ipeak=5.7A Iocp(minimum)=6.4A
PC67
PC67
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
12
0_0402_5%
0_0402_5%
SIS412
SIS412
SI7716ADN-T1-GE3_PAK1212-8
SI7716ADN-T1-GE3_PAK1212-8
100K_0402_1%
100K_0402_1%
1 2
PR67
PR67
2
ISL6237_B+
PQ11
PQ11
3 5
241
PQ24
PQ24
3 5
241
PR61
PR61
PR72
PR72
12
1 3
PC68
PC68
0.22U_0603_25V7K
0.22U_0603_25V7K
1 2
1 2
200K_0402_5%
200K_0402_5%
VL
PR144
PR144
1 2
PQ25
PQ25
@
@
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
PR49
PR49
0_0402_5%
0_0402_5%
1 2
PR52
PR52
2.2_0603_5%
2.2_0603_5%
PC56
PC56
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
2VREF_TPS51427
2VREF_TPS51427
1 2
PC70
PC70
0.22U_0603_25V7K
0.22U_0603_25V7K
PR68
PR68
47K_0402_5%
47K_0402_5%
@
@
806K_0603_1%
806K_0603_1%
1 2
12
PC65
PC65
0.047U_0402_16V7K
0.047U_0402_16V7K
PC51
PC51
0.1U_0603_25V7K
0.1U_0603_25V7K
DH3
BST3A
12
LX3
DL3
FB3
VL
1 2
12
2VREF_TPS51427
PC69
PC69
0.047U_0402_16V7K
0.047U_0402_16V7K
@
@
1 2
33
26
24
25
23
30
32
1
8
20
4
14
27
PR143
PR143 0_0402_5%
0_0402_5%
6
TP
UGATE2
BOOT2
PHASE2
LGATE2
OUT2
REFIN2
REF
LDOREFIN
NC
EN_LDO
EN1
EN2
5
12
PC66
PC66
1U_0603_10V6K
1U_0603_10V6K
VL
PQ12
PQ12
1U_0603_10V6K
1U_0603_10V6K
7
LDO
VCC
UGATE1
BOOT1
PHASE1
LGATE1
GND
21
12
PC53
PC53
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
19
PVCC
15
17
16
18
22
PGND
10
OUT1
11
FB1
9
BYP
29
SKIP
28
POK2
13
POK1
12
ILIM1
31
ILIM2
PU6
PU6 TPS51427_QFN32_5X5
TPS51427_QFN32_5X5
PC54
PC54
1U_0603_10V6K
1U_0603_10V6K
1 2
DH5
BST5A
PR53
PR53
2.2_0603_5%
2.2_0603_5%
LX5
DL5
FB5
ILM1
ILIM2
12
1 2
PC58
PC58
0.1U_0603_25V7K
0.1U_0603_25V7K
PR58 0_0402_5%@PR58 0_0402_5%@
12
PR59 0_0402_5%PR59 0_0402_5%
1 2
PR60 0_0402_5%@PR60 0_0402_5%@
1 2
12
PR70
PR70 274K_0402_1%
274K_0402_1%
PR71
PR71 316K_0402_1%
316K_0402_1%
2VREF_TPS51427
12
3 5
241
PQ26
PQ26
3 5
241
VL
1 2
PC52
PC52
3
VIN
TON
NC
2
12
PR69
PR69 0_0402_5%
0_0402_5%
2VREF_TPS51427
B+
D D
+3VALWP
1
+
+
PC55
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
C C
PC55
2
PL4
PL4
FBMA-L11-201209-121LMA50T_0805
FBMA-L11-201209-121LMA50T_0805
1 2
12
PC45
PC45
4.7U_1206_25V6K
4.7U_1206_25V6K
3.3UH_PCMC063T-3R3MN_6A_20%
3.3UH_PCMC063T-3R3MN_6A_20%
1 2
PR54
PR54
0_0402_5%
0_0402_5%
1 2
PR56
PR56
1 2
@
@
680P_0603_50V8J
680P_0603_50V8J
10K_0402_1%
10K_0402_1%
PC46
PC46
PL12
PL12
PR50
PR50
4.7_1206_5%
4.7_1206_5%
PC57
PC57
12
PC47
PC47
4.7U_1206_25V6K
4.7U_1206_25V6K 2200P_0402_50V7K
2200P_0402_50V7K
12
12
+3VALWP Imax=5.5A Ipeak=7.2A Iocp(minimum)=9A
PD8
PD8
RLZ5.1B_LL34
RLZ5.1B_LL34
VS
B B
1 2
MAINPWON<36>
PD7
PD7
RB751V-40TE17_SOD323-2
RB751V-40TE17_SOD323-2
1 2
PD14
PD14
RB751V-40TE17_SOD323-2
RB751V-40TE17_SOD323-2
1 2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
3VALW/5VALW
3VALW/5VALW
3VALW/5VALW
LA-5091P
LA-5091P
LA-5091P
32 39Wednesday, April 22, 2009
32 39Wednesday, April 22, 2009
32 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 33
A
1 1
PR92
PR92
0_0402_5%~D
0_0402_5%~D
PR93
PR93
30.1K_0402_1%
30.1K_0402_1%
21.5K_0402_1%
21.5K_0402_1%
PR81
PR81
0_0402_5%~D
0_0402_5%~D
PR83
PR83
30.1K_0402_1%
30.1K_0402_1%
12
PC87
PC87
1U_0603_10V6K~D
1U_0603_10V6K~D
21.5K_0402_1%
21.5K_0402_1%
12
12
12
PC93
PC93
.1U_0402_16V7K
.1U_0402_16V7K
PR79
PR79
12
PC80
PC80
.1U_0402_16V7K
.1U_0402_16V7K
PR89
PR89
@
@
47P_0402_50V8J
47P_0402_50V8J
12
@
@
47P_0402_50V8J
47P_0402_50V8J
12
12
PC91
PC91
12
@
@
12
PR78
PR78
30.1K_0402_1%
30.1K_0402_1%
12
PC90
PC90
12
@
@
12
PR88
PR88
8.66K_0402_1%
8.66K_0402_1%
TON_1.8
V5FILT_1.8
FB_1.8
TON_VCCP
V5FILT_VCCP
FB_VCCP
2
3
4
5
6
2
3
4
5
6
SYSON<25,28>
PR85
PR85 300_0603_5%
300_0603_5%
+5VALW
2 2
3 3
4 4
1 2
PC97
PC97
1U_0603_10V6K~D
1U_0603_10V6K~D
+5VALW
12
SUSP#<25,28,34>
PR84
PR84 300_0603_5%
300_0603_5%
1 2
PM_1.8V_PWRGD<25>
EN_1.8
PU7
PU7
TON
VOUT
V5FILT
VFB
PGOOD
EN_VCCP
PU10
PU10
TON
VOUT
V5FILT
VFB
PGOOD
B
PR96
PR96
267K_0402_1%
267K_0402_1%
1 2
15
1
TP
EN_PSV
GND7PGND
PR80
PR80
267K_0402_1%
267K_0402_1%
1 2
15
1
TP
EN_PSV
GND7PGND
8
8
PR77
PR77
BST_1.8
1 2
0_0603_5%
0_0603_5%
14
DRVH
TRIP
DRVL
DRVH
TRIP
DRVL
LL
LL
UG_1.8
13
LX_1.8
12
TRIP_1.8
11
V5DRV_1.8
10
LG_1.8
9
PR82
PR82
1 2
0_0603_5%
0_0603_5%
UG_VCCP
13
LX_VCCP
12
TRIP_VCCP
11
V5DRV_VCCP
10
LG_VCCP
9
1 2
7.68K_0402_1%
7.68K_0402_1%
1 2
12.4K_0402_1%
12.4K_0402_1%
VBST
V5DRV
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
BST_VCCP
14
VBST
V5DRV
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
PC82
PC82
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR90
PR90
PC85
PC85
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR91
PR91
+5VALW
12
PR94
PR94 0_0603_5%
0_0603_5%
12
PC89
PC89
4.7U_0805_10V6K
4.7U_0805_10V6K
+5VALW
12
PR86
PR86 0_0603_5%
0_0603_5%
12
PC86
PC86
4.7U_0805_10V6K
4.7U_0805_10V6K
AO4712_SO8
AO4712_SO8
AO4712_SO8
AO4712_SO8
PQ17
PQ17
PQ19
PQ19
C
+1.8VP_B++
578
PJP1
PJP1
12
JUMP_43X118
JUMP_43X118
@
12
12
PC139
PC139
2200P_0402_50V7K
2200P_0402_50V7K
12
PC78
PC78
10U_1206_25V6M
10U_1206_25V6M
@
PC84
PC84
10U_1206_25V6M
10U_1206_25V6M
B+
D
+1.8VP
PQ16
PQ16
AO4466_SO8
AO4466_SO8
3 6
241
8
@
@
D6D5D7D
S
2
241
D6D5D7D
S
2
S
S
1
8
S
S
1
1 2
1 2
PQ18
PQ18
AO4466_SO8
AO4466_SO8
@
@
1 2
1 2
4
G
3
VCCPP_B++
578
3 6
4
G
3
PL7
PL7
2.2UH_PCMC063T-2R2MN_8A_20%
2.2UH_PCMC063T-2R2MN_8A_20%
1 2
PR95
PR95
4.7_1206_5%
4.7_1206_5%
PC96
PC96 680P_0603_50V8J
680P_0603_50V8J
@
@
12
2.2UH_PCMC063T-2R2MN_8A_20%
2.2UH_PCMC063T-2R2MN_8A_20%
PR87
PR87
4.7_1206_5%
4.7_1206_5%
PC88
PC88 680P_0603_50V8J
680P_0603_50V8J
@
@
PC81
PC81
10U_1206_25V6M
10U_1206_25V6M
PL13
PL13
1 2
12
PC83
PC83
10U_1206_25V6M
10U_1206_25V6M
Imax=3.6A Ipeak=4.8A Iocp(minimum)=6A
PC95
PC95
PJP2
PJP2
12
JUMP_43X118
JUMP_43X118
@
@
PC94
PC94
+1.8VP
1
12
PC79
PC79
+
+
2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K 220U_D2_4VM
220U_D2_4VM
B+
+VCCPP
1
PC92
PC92
12
+
+
2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
220U_D2_4VM
220U_D2_4VM
+VCCPP Imax=5.4A Ipeak=7.2A Iocp(minimum)=9A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
1.8V/VCCP
1.8V/VCCP
1.8V/VCCP
LA-5091P
LA-5091P
LA-5091P
D
33 39Wednesday, April 22, 2009
33 39Wednesday, April 22, 2009
33 39Wednesday, April 22, 2009
of
of
of
1.0
1.0
1.0
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5
4
3
2
1
D D
SUSP#<25,28,33>
C C
B B
0_0402_5%
0_0402_5%
SUSP<28>
1 2
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
PJ9
PJ9
@
@
JUMP_43X39
JUMP_43X39
PC130
PC130
10U_0805_6.3V6M
10U_0805_6.3V6M
PR98
PR98 10K_0402_1%
10K_0402_1%
1 2
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PR146
PR146
PC134
PC134
+1.8V +5VALW
1
1
2
2
12
12
PC128
PC128
+1.8V
1
1
@
@
2
2
12
PC136
PC136
13
D
D
2
G
G
12
S
S
PQ27
PQ27
1
PJ10
PJ10
1
JUMP_43X39
JUMP_43X39
2
2
12
PC98
PC98
1U_0603_10V6K
1U_0603_10V6K
PJ11
PJ11 JUMP_43X39
JUMP_43X39
PR148
PR148
1K_0402_1%
1K_0402_1%
PR147
PR147
1K_0402_1%
1K_0402_1%
APL5912-KAC-TRL_SO8
APL5912-KAC-TRL_SO8
6
VCNTL
5
VIN
9
VIN
8
EN
7
POK
12
12
PC138
PC138
0.1U_0402_16V7K
0.1U_0402_16V7K
PU9
PU9
3
VOUT
4
VOUT
2
FB
GND
1
PU12
PU12
2
3
4
APL5331KAC-TRL_SO8
APL5331KAC-TRL_SO8
12
12
PC132
PC132 10U_0805_6.3V6M
10U_0805_6.3V6M
PR145
PR145
2.7K_0402_1%
2.7K_0402_1%
PR97
PR97
3K_0402_1%
3K_0402_1%
VIN1VCNTL
GND
VREF
VOUT
+0.9VSP
12
12
12
6
5
NC
7
NC
8
NC
9
TP
PC129
PC129
0.01U_0402_25V7K
0.01U_0402_25V7K
12
12
+3VALW
PC133
PC133 1U_0603_10V6K
1U_0603_10V6K
+1.5VSP
1
+
+
PC131
PC131
PC99
PC99
2
220U_D2_4VM
220U_D2_4VM
@
@
10U_0805_6.3V6M
10U_0805_6.3V6M
PU14
+3VS
PU14 APL5508-25DC-TRL_SOT89-3
APL5508-25DC-TRL_SOT89-3
2
12
IN
PC137
PC137
1U_0603_10V6K
1U_0603_10V6K
GND
3
OUT
1
12
+2.5VSP
12
PR149
PR149
@
@
150_1206_5%
PC135
PC135
150_1206_5%
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
1.5VS/0.9VS/2.5VS
1.5VS/0.9VS/2.5VS
1.5VS/0.9VS/2.5VS
LA-5091P
LA-5091P
LA-5091P
34 39Wednesday, April 22, 2009
34 39Wednesday, April 22, 2009
34 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 35
5
4
3
2
1
+VCCP
D D
PR99
PR99
68_0402_5%
68_0402_5%
1 2
H_PROCHOT#
VGATE<12,17,25>
C C
H_PROCHOT#<4>
B B
VCCSENSE<5>
VSSSENSE<5>
A A
PWON
1 2
PR117
PR117
@
@
4.22K_0402_1%
4.22K_0402_1%
6.81K_0402_1%
6.81K_0402_1%
120P_0402_50V8J
120P_0402_50V8J
PM_DPRSLPVR<6,17>
H_DPRSTP#<4,16>
CLK_ENABLE#
1 2
0.015U_0402_16V7K
0.015U_0402_16V7K
PR119
PR119
1 2
PC111
PC111
1 2
12
1 2
PC112 82P_0402_50V8JPC112 82P_0402_50V8J
330P_0402_50V7K
330P_0402_50V7K
+3VS
12
PR112
PR112
1 2
147K_0402_1%
147K_0402_1%
PH1
PH1
@
@
100K_0603_1%_TH11-4H104FT
100K_0603_1%_TH11-4H104FT
1 2
PC108
PC108
PR118
PR118
1 2
4.12K_0402_1%
4.12K_0402_1%
PC110
PC110
1000P_0402_50V7K
1000P_0402_50V7K
1 2
PR120
PR120
332K_0402_1%
332K_0402_1%
PR122
PR122
1 2
1.54K_0402_1%
1.54K_0402_1%
1 2
PR125
PR125
0_0402_5%
0_0402_5%
1 2
PR127
PR127
0_0402_5%
0_0402_5%
PC123
PC123
1 2
12
PR103
PR103 10K_0402_1%
10K_0402_1%
0.1U_0402_16V7K
0.1U_0402_16V7K
PC106
PC106
@
@
PR114
PR114
1 2
40.2K_0402_1%
40.2K_0402_1%
@
@
H_PROCHOT#
PC114
PC114 1200P_0402_50V7K
1200P_0402_50V7K
PR124
PR124
1K_0402_1%
1K_0402_1%
1 2
PC116 1000P_0402_50V7KPC116 1000P_0402_50V7K
1 2
12
PC117
PC117 1000P_0402_50V7K
1000P_0402_50V7K
12
1 2
1K_0402_1%
1K_0402_1%
PR100
PR100
0_0402_5%
0_0402_5%
1 2
PR102 0_0402_5%PR102 0_0402_5%
1 2
PR105
PR105
0_0402_5%
0_0402_5%
1
2
3
4
5
6
7
8
9
10
1 2
PC121 330P_0402_50V7KPC121 330P_0402_50V7K
1 2
PR129
PR129
12
1 2
12
PC103
PC103
1U_0603_10V6K
1U_0603_10V6K
41
40
PGOOD
FDE
GND PAD
PMON
RBIAS
VR_TT#
NTC
SOFT
OCSET
VW
COMP
FB
11
1 2
PR130
PR130
1.62K_0402_1%
1.62K_0402_1%
PC122
PC122
0.22U_0603_25V7K
0.22U_0603_25V7K
PR109
PR109 499_0402_1%
499_0402_1%
VR_ON
12
PR104 0_0402_5%PR104 0_0402_5%
39
37
35
36
38
3V3
PU15
PU15 ISL6261ACRZ-T_QFN40_6X6
ISL6261ACRZ-T_QFN40_6X6
VSEN12VDIFF
VR_ON
CLK_EN
DPRSTP#
DPRSLPVR
DFB
VO
DROOP
RTN
15
16
14
13
12
12
PR111 0_0402_5%PR111 0_0402_5%
34
VSUM
17
18
12
PC120
PC120
<25>
12
12
PR106 0_0402_5%PR106 0_0402_5%
PR107 0_0402_5%PR107 0_0402_5%
VID331VID432VID533VID6
VID2
VID1
VID0
VCCP
LGATE
VSSP
PHASE
UGATE
BOOT
VSS
VDD
VIN
19
20
12
1 2
PC115
PC115
0.22U_0603_25V7K
0.22U_0603_25V7K
1 2
PC119
PC119
0.068U_0402_10V6K
0.068U_0402_10V6K
@
@
PR108 0_0402_5%PR108 0_0402_5%
30
29
28
27
26
25
24
23
22
21
NC
1 2
PR121
PR121 10_0603_5%
10_0603_5%
PC113
PC113 1U_0402_6.3V6K
1U_0402_6.3V6K
PR123
PR123 10_0603_5%
10_0603_5%
VSUM
12
0.1U_0402_16V7K
0.1U_0402_16V7K
12
12
PR132 0_0402_5%PR132 0_0402_5%
LGATE_CPU
PHASE_CPU
UGATE_CPU
BOOT_CPU
12
PR128
PR128
1.37K_0402_1%
1.37K_0402_1%
PR110 0_0402_5%PR110 0_0402_5%
+CPU_B+
CPU_VID6 <5>
CPU_VID5 <5>
CPU_VID4 <5>
CPU_VID3 <5>
CPU_VID2 <5>
CPU_VID1 <5>
CPU_VID0 <5>
12
PR131 0_0402_5%PR131 0_0402_5%
PR113
PR113
0_0603_5%
0_0603_5%
1 2
+5VS
12
PR126
PR126
3.57K_0402_1%
3.57K_0402_1%
@
@
PH2
PH2 10KB_0603_5%_ERTJ1VR103J
10KB_0603_5%_ERTJ1VR103J
@
@
1 2
12
PC118
PC118
0.01U_0402_25V7K
0.01U_0402_25V7K
PC107
PC107
0.22U_0603_25V7K
0.22U_0603_25V7K
1 2
+CPU_COREP
+5VS
PR101
PR101 1_0603_5%
1_0603_5%
1 2
12
PC105
PC105
1U_0402_6.3V6K
1U_0402_6.3V6K
578
3 6
578
3 6
241
241
AO4712_SO8
AO4712_SO8
PQ21
PQ21
AO4466_SO8
AO4466_SO8
PQ28
PQ28
12
4700P_0402_25V7K
4700P_0402_25V7K
PC100
PC100
12
12
PC101
PC101
4.7U_0805_25V6M
4.7U_0805_25V6M
PD15
PD15 B340A_SMA2
B340A_SMA2
+CPU_B+
12
12
12
4.7U_0805_25V6M
4.7U_0805_25V6M
FBMA-L11-201209-121LMA50T_0805
FBMA-L11-201209-121LMA50T_0805
1 2
12
PC104
PC104
PC102
PC102
4.7U_0805_25V6M
4.7U_0805_25V6M
1.5UH_PCMC063T-1R5MN_9A_20%
1.5UH_PCMC063T-1R5MN_9A_20%
PR115
PR115
4.7_1206_5%
4.7_1206_5%
PC109
PC109
680P_0603_50V8J
680P_0603_50V8J
12
VSUM
PL9
PL9
PR116
PR116
7.68K_0402_1%
7.68K_0402_1%
PL14
PL14
1 2
B+
+CPU_COREP
+CPU_CORE Imax=3A Ipeak=4A Iocp(minimum)=7A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
+CPU_CORE
+CPU_CORE
+CPU_CORE
LA-5091P
LA-5091P
LA-5091P
35 39Wednesday, April 22, 2009
35 39Wednesday, April 22, 2009
35 39Wednesday, April 22, 2009
1
1.0
1.0
1.0
of
of
of
Page 36
A
1 1
B
C
D
PH3 under CPU botten side :
CPU thermal protection at 85 degree C
JBATT1
JBATT1
1
1
PR154 1K_0402_1%PR154 1K_0402_1%
2
2 3 4 5 6
7 GND GND
SUYIN_200070MR007G101
SUYIN_200070MR007G101
DC040901170
DC040901170
2 2
1 2
PR153 1K_0402_5%PR153 1K_0402_5%
3
1 2
4
EC_SMDA
5
EC_SMCA
6 7 8 9
PD10
PD10
@
@
PJSOT24C_SOT23-3
PJSOT24C_SOT23-3
PR155 47K_0402_1%PR155 47K_0402_1%
1 2
2
3
1
2
3
@
@
1
1 2
PR141
PR141
6.49K_0402_1%
6.49K_0402_1%
1 2
PR142 1K_0402_1%PR142 1K_0402_1%
1 2
PR136 100_0402_1%PR136 100_0402_1%
1 2
PR137 100_0402_1%PR137 100_0402_1%
PD11
PD11
PJSOT24C_SOT23-3
PJSOT24C_SOT23-3
A/D
VMB
+3VALWP
+3VALWP
BATT_TEMP <25>
EC_SMB_DA1 <25>
EC_SMB_CK1 <25>
SMB3025500YA_2P
SMB3025500YA_2P
1 2
12
PC124
PC124 1000P_0402_50V7K
1000P_0402_50V7K
PL10
PL10
+BATT
12
PC125
PC125
0.01U_0402_25V7K
0.01U_0402_25V7K
100K_0603_1%_TH11-4H104FT
100K_0603_1%_TH11-4H104FT
Recovery at 45 degree C
VL
12
PH3
PH3
PR135
PR135
13.7K_0402_1%
13.7K_0402_1%
1 2
12
12
PR138
PC126
PC126
PR138
21.5K_0402_1%
21.5K_0402_1%
0.22U_0603_25V7K
0.22U_0603_25V7K
TM_REF1
12
PC127
PC127
1000P_0402_50V7K
1000P_0402_50V7K
47K_0402_1%
47K_0402_1%
12
PR134
PR134
1 2
8
5
P
+
6
-
G
4
PR139
PR139 100K_0402_1%
100K_0402_1%
PR140
PR140 100K_0402_1%
100K_0402_1%
7
O
PU1B
PU1B
LM393DG_SO8
LM393DG_SO8
12
VL
VL
PR133
PR133 47K_0402_1%
47K_0402_1%
1 2
MAINPWON <32>
13
D
D
2
G
G
S
S
PQ22
PQ22
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
BATTERY CONN/OTP
BATTERY CONN/OTP
BATTERY CONN/OTP
LA-5091P
LA-5091P
LA-5091P
D
36 39Wednesday, April 22, 2009
36 39Wednesday, April 22, 2009
36 39Wednesday, April 22, 2009
of
of
of
1.0
1.0
1.0
Page 37
A
B
C
D
Version change list (P.I.R. List) Page 1 of 1
E
Date
1
1 1
2
3
4
5
6
2009/1/12
2009/1/12
2009/1/12
2009/1/12
2009/1/12
2009/1/12
7 2009/1/12
8 2009/1/12
2 2
9 2009/1/13
10 2009/1/13
11 2009/1/13
12 2009/1/14
13 2009/1/14
14 2009/1/15
15 2009/1/16
Circuit issue
System can't boot to S0
Card reader remove crystal and use 48MHz from CLK generator
WWAN function de-pop
For S5 +3VS back drive issue
Material change
Codec can use 5V level for analog power
LED circuit modify
Change material
Change material
Change material
Change material
Swing is too big for SATA eye's diagram
For double place EMI solution
Board ID function
Rev. PG# Modify ListFixed IssueItem
0.2 13
0.2 12
0.2
0.2 19
0.2 17
0.2 27
0.2 20
0.2 22
0.2 21
0.2 27
0.2 26
0.2 14
0.2 16
0.2 27
0.2 25
12 23
Change JP24 pin definition
MCH_CLKREQ# connection move from U11.21 to U11.37
Pop R295, R137 change from 33 ohm to 22 ohm Pop R440, de-pop C511, C515, Y4
De-pop C106, C196, C223, R75, R114, R115, JP56
De-pop R284
Change C233 and C363 to small package
De-pop U20, C407 and pop R293
1. JP62.11 as NC and JP62.3 connects to +5VALW.
2. Remove R294 and R576, and add serial resistors R314 and R315.
Change Audio jack (JP60,JP61) to DC230005P00
Change USB (JP16) connector to DC233004Q00
Change SPI ROM (U28) to SA00000XT00
Change Bead (L5,L19) to SM01003000L
Delete R12, and tied SATARBIASN & SATARBIASP together and connect to GND through a 24.9 ohm resistor
Delete R39,R40,R74,R88,L63,L65,D23,D25
Pop R122, and change R127 to 8.2k
16 2009/1/17
3 3
17 2009/1/17
18 2009/1/17
19
20 0.2 24
2009/1/19
2009/1/19
21 2009/1/20
22 2009/1/20
23 2009/1/20
24 2009/1/21
4 4
A
Change pin out for LVDS connector
Add control backlight function
Current leakage
RGB EA fail
0.2 13
0.2 13
0.2 28
0.2 14
Change material Change JP71 to DC230901190
add EMI solution
For layout require
For circuit design
LAN LED reversed
B
0.2 27
0.2 13
0.2 13
0.2 24
Swap INVT_PWM from JP24.3 to JP24.7
Change Q80 to SB93457008L, pop Q80, C829, R1158, Q81,R1159, and de-pop L18
De-pop R298, pop R297
Change L1,L3,L4 to SM01000AO0L
Add R39,R40,R74,R88,@D23,@D25,@L63,@L65
change R1006,R1007 to 0402 size
change R1159 to 0402 size
Update JP71 symbol
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Hardware-PIR-I
Hardware-PIR-I
Hardware-PIR-I
LA-5091P
LA-5091P
LA-5091P
37 39Wednesday, April 22, 2009
37 39Wednesday, April 22, 2009
37 39Wednesday, April 22, 2009
E
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B
C
D
Version change list (P.I.R. List) Page 1 of 1
E
Date
25
1 1
2009/1/21 20
26 2009/1/21
27 2009/1/21
28 2009/1/21
29 2009/2/2 0.2 28
30 2009/2/6
2009/2/631 23
32 2009/2/10
33 2009/2/18
2 2
2009/2/2034
35 2009/2/20
36 2009/2/27
37 2009/2/27
38
39
40
2009/3/3
2009/3/3
2009/3/4
Without beep when unplug RAM
Speaker pin out reversed
Update SATA symbol
Remove WWAN signals
De-pop material
Choose 48M function
card reader INF installation issue
Fine tune LPC_FRAME# overshoot
Move cap to USB board
Solve "Zi Zi" noise
Reserve for ESD
Change CPU form N270 to N280
To meet crystal requirement
Modify board ID
remove on board power switch
WWAN concern
Rev. PG# Modify ListFixed IssueItem
0.2
0.2 21
0.2 22
0.2 27
0.2
23
0.2
0.3 16
0.3 27
0.3
20
0.3 26
0.3 4,5,12
0.3 25
1.0 25
1.0 26
1.0
12
Add C217,R1160,R1161,C213,C833
Modify JP55 pin definition
Modify JP48 pin name
Change JP72 to 10 pin connector
De-pop R302 and Q28
Pop R299
De-pop R436
Add R900
De-pop C233
De-pop R1160,R1161 and remove C217
Add C900,D50 but de-pop
Change CPU P/N to N280 and de-pop R82 and pop R81 for FSB frequency to 667MHz
Change C160 and C161 from 15pF to 27pF
Change R127 form 8.2k to 18k
de-pop SW2
Add C903,C904,C905 and change C181,C198 from 0.1uF to 47pF
41
3 3
2009/3/10
42 2009/3/10
43 2009/3/11
44 2009/3/11
45 2009/3/31
4 4
A
USB modem issue
For derating concern
Modify H4 and H23
For beep noise
change X1 part
1.0 23
1.0 19
1.0 29
1.0 20
1.0 10,25
B
Reserve USB port 2 to WLAN and reserve USB port 6 to Card reader and add R1162,R1163,R1164,R1165,R1166,R1167,R1168,R1169
Delete R75 and add J3
Change H4 from H_3P0X4P0 to H_2P8X3P8 and H23 from H_3P0 to H_2P8.
Add D1 and R1170
Change C260,C276,C281,C330 to SE107475M0L, change C831 to SE071101J80
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Hardware-PIR-II
Hardware-PIR-II
Hardware-PIR-II
LA-5091P
LA-5091P
LA-5091P
38 39Wednesday, April 22, 2009
38 39Wednesday, April 22, 2009
38 39Wednesday, April 22, 2009
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D D
Version change list (P.I.R. List) Page 1 of 1 for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1 RTC Battery Pin define
2
3 1/14 B
4
C C
5
6
7
8
9
B B
RTC Battery can not work 0.1
JP79 connection pin1 exchange pin2
1/13 B
JABTT1 footprint change to SUYIN_200070MR007G101ZR_7P-TBattery connect placement from TOP to Bottom
COST
0.1
PQ5,PQ6,PQ11,PQ12 P/N change from SB00000AU00 to SB00000IA00 PQ16,PQ18 P/N change from SB00000920L to SB00000CG00 PQ17,PQ19 P/N change from SB000004T8L to SB00000AJ00
Modify load line setting
0.1
PR116 change from 11.68K to 7.68K
1/14 B
PR128 change from 1.82K to 1.37K
Modify charger current setting
PR36 change from 174K to 107K 
PU5 P/N change from SA00002D200 to SA00002V40L
0.1COST
PU2 P/N change from SA009200010 to SA00002E200
1/14 B0.1
1/17 B
PC24 P/N change from SE071471J80 to SE074471K80
For EMI Add PC139 2200PF0.1 1/17 B
Battery cell setting
0.1 Add PR156 0
1/17 B
Unpop PR32 0 
Modify P/N for unify
0.2
PR81, PR92 P/N change from SD02800008L to SD028000080 PR142, PR154 P/N change from SD03410018L to SD034100180
2/18 C
PR138 P/N change from SD034215280 to SD03421528L PR133, PR134 P/N change from SD034470280 to SD03447028L PC105, PC113 P/N change from SE000000K80 to SE000000K8L PC82, PC85 P/N change from SE042104K8L to SE042104K80 PC11 P/N change from SE053106Z80 to SE053106Z8L PC87, PC97 P/N change from SE080105K8L to SE080105K80
B1/130.1
10 Change P/N for Lead Free 0.3
PR128 P/N change from SD034137100 to SD03413718L
3/18 X build
PR3 P/N change from SD027825200 to SD027825280
11
Change drive IC voltage input resister for suqence
0.3 3/18 X build
PR84 change from 0 to 300   PR85 change from 0 to 300  
12 Change P/N for approve 0.3
13 3/27 X build
Protect Charger IC burn out for Adapter Inrush
0.3
Current
A A
14 Enter windows hang
5
Reduce CPU Switch phase ring for High speed trace
4
0.3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PU5 P/N change from SA00002V40L to SA00002V400
Add NonPop PD9 SC4LZ24B0T1 S ZEN DIO RLZ24B (LL-34) Add PR150 SD00200008L S RES 1/8W 0 +5% 0805
Pop PR115 S RES 1/4W 4.7 +-5% 1206 Pop PC109 S CER CAP 680P 50V J NPO 0603
2008/11/10 2009/11/10
2008/11/10 2009/11/10
2008/11/10 2009/11/10
Deciphered Date
Deciphered Date
Deciphered Date
Date: Sheet
Date: Sheet
2
Date: Sheet
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
3/19 X build
X build
4/17
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PWR-PIR
PWR-PIR
PWR-PIR
LA-5091P
LA-5091P
LA-5091P
39 39Wednesday, April 22, 2009
39 39Wednesday, April 22, 2009
39 39Wednesday, April 22, 2009
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