Page 1
A
Compal confidential
File Name : LA-1341
B
C
D
E
Block Diagram
Mobil e Nort hwood
1 1
CPU B ypass
Fan Cont rol
page 3
& CPUVID
page 5
uFCBGA/ uFC PGA CPU
page 3,4,5
System Bus
400MHz
HD#(0..63)HA#( 3..31)
Therm al Sensor
MAX1617
page 3
Clock Generator
page 12,13
Memory
CRT C onn
page 14
SIS 650
315 Graphics embedded
LCD C onn
page 15
TV-OUT Conn
IDSEL:AD16
(PIRQC#,GNT#0,REQ#0)
2 2
IEEE 1394
VT6306
page 22
page 14
Mini PCI
port
SIS302L V
( LVDS/TVOUT )
page 15
page 26
IDSEL:AD31
(PIRQB#,GNT#1,REQ#1)
VB BUS
MUTIOL
RJ11 Conn
page 26
BGA
page6,7,8,9
PCI BUS
IDSEL:AD17
(PIRQC#,GNT#3,REQ#3)
RTL 8100BL
LAN
page 21
IDSEL:AD20
(PIRQA/B#,GNT#2,REQ#2)
CardBus Controller
ENE C B1420
3.3V 33MHz
SIS 961
page 16,17,18,19
page 23
BUS(DDR)
2.5V DDR 200/266 MHz
3.3V 48MHz
3.3V 24.57 6MHz
3.3V ATA100
DDR-SO-DIMM X2
BANK 0, 1, 2, 3
page 10,11
AC-LINK
USB conn
page 31
AC-LINK
CONN
page 25
3 3
RJ45
page 26
Slot 1
page 24
Slot 0
page 24
Power On/Off
Reset & RTC
page 32
DC/DC Interface
Suspend
page 33
4 4
Power Circuit
DC/DC
page
33,34,35,36,37,38,39
A
14M_5V
Touch Pad
page 28
EC I/O Buffer
page 30
BIOS
page 30 page 32
EC NS87591
page 29
B
Int.KBD
PS/2 conn
page 28
LPC BUS
3.3V 33MHz
SMsC
LPC 47N227
LPC to X-BUS &
Super I/O
page 27
SERIALPARALLEL
page 31 page 27
FDD
page 28
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
HDD IDE
Connector
page 22
CDROM IDE
Connector
page 22
Title
Size Docu ment Number Re v
D
Date: Sheet
Compal E l e c t r onics, Inc.
401210
星期五 十一
?15, 2002
SCHEMATIC, M/B LA-1341
246,
E
2A
of
Page 2
A
HTEST0
HTEST1
HTEST2
HTEST3
HTEST4
HTEST5
HTEST6
HTEST7
HTEST8
HTEST9
HTEST10
HTEST12
HTEST11
PROCHOT#
HDSTBP#[0..3]
HDSTBN#[0..3]
ITP_CLK#
ITP_CLK
TDI
TDO
TMS
STPCLK#
SMI#
CPUSLP#
INIT#
CPUPW RGD
FERR#
IERR#
TRIP#
A20M#
IGNNE#
INTR
NMI
BREQ0#
CPURST#
TCK
TRST#
CPU_COMP0
CPU_COMP1
DBRESET
R3
R4
R5
R6
R7
R9 39
HA[3..31]6
HD[0..63]6
1 1
DBI#[0..3]6
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
DBI#0
DBI#1
DBI#2
DBI#3
U1A
K2
A#3
K4
A#4
L6
A#5
K1
A#6
L3
A#7
M6
A#8
L2
A#9
M3
A#10
M4
A#11
N1
A#12
M1
A#13
N2
A#14
N4
A#15
N5
A#16
T1
A#17
R2
A#18
P3
A#19
P4
A#20
R3
A#21
T2
A#22
U1
A#23
P6
A#24
U3
A#25
T4
A#26
V2
A#27
R6
A#28
W1
A#29
T5
A#30
U4
A#31
V3
A#32
W2
A#33
Y1
A#34
AB1
A#35
B21
D#0
B22
D#1
A23
D#2
A25
D#3
C21
D#4
D22
D#5
B24
D#6
C23
D#7
C24
D#8
B25
D#9
G22
D#10
H21
D#11
C26
D#12
D23
D#13
J21
D#14
D25
D#15
H22
D#16
E24
D#17
G23
D#18
F23
D#19
F24
D#20
E25
D#21
F26
D#22
D26
D#23
L21
D#24
G26
D#25
H24
D#26
M21
D#27
L22
D#28
J24
D#29
K23
D#30
H25
D#31
M23
D#32
N22
D#33
P21
D#34
M24
D#35
N23
D#36
M26
D#37
N26
D#38
N25
D#39
R21
D#40
P24
D#41
R25
D#42
R24
D#43
T26
D#44
T25
D#45
T22
D#46
T23
D#47
U26
D#48
U24
D#49
U23
D#50
V25
D#51
U21
D#52
V22
D#53
V24
D#54
W26
D#55
Y26
D#56
W25
D#57
Y23
D#58
Y24
D#59
Y21
D#60
AA25
D#61
AA22
D#62
AA24
D#63
E21
DBI0
G25
DBI1
P26
DBI2
V21
DBI3
ZIF_SOCKET478_478P
A20M
FERR
INIT
LINT0
LINT1
IGNNE
SMI
SLP
STPCLK
ADS
ADSTB0
ADSTB1
BNR
DBSY
DEFER
DRDY
HITM
TRDY
BPRI
BR0
LOCK
REQ0
REQ1
REQ2
REQ3
REQ4
RS0
RS1
RS2
DSTBP0
DSTBN0
DSTBP1
DSTBN1
DSTBP2
DSTBN2
DSTBP3
DSTBN3
BCLK0
BCLK1
ITP_CLK1
ITP_CLK0
IERR
MCERR
DBRESET
RESET
PWRGOOD
VSS75
COMP0
COMP1
DEP0
DEP1
DEP2
DEP3
THERMDA
THERMDC
THERMTRIP
PROCHOT
TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12
BSEL0
BSEL1
TCK
TDO
TMS
TRST
VID0
VID1
VID2
VID3
VID4
A20M#
C6
FERR#
B6
INIT#
W5
INTR
D1
NMI
E5
IGNNE#
B2
SMI#
B5
CPUSLP#
AB26
STPCLK#
Y4
G1
L5
R5
G2
H5
E2
H2
F3
HIT
E3
J6
D2
BREQ0#
H6
G4
J1
K5
J4
J3
H3
F1
G5
F4
HDSTBP#0
F21
HDSTBN#0
E22
HDSTBP#1
J23
HDSTBN#1
K22
HDSTBP#2
P23
HDSTBN#2
R22
HDSTBP#3
W23
HDSTBN#3
W22
AF22
AF23
AD26
AC26
AC3
V6
AE25
AB25
AB23
CPU_CLK
CPU_CLK#
ITP_CLK#
ITP_CLK
IERR#
DBRESET
CPURST#
CPUPWRGD
A20M# 17
FERR# 17
INIT# 17
INTR 17
NMI 17
IGNNE# 17
SMI# 17
CPUSLP# 17
STPCLK# 17
ADS# 6
HASTB0# 6
HASTB1# 6
BNR# 6
DBSY# 6
DEFER# 6
DRDY# 6
HIT# 6
HITM# 6
HTRDY# 6
BPRI# 6
BREQ0# 6
HLOCK# 6
HREQ0# 6
HREQ1# 6
HREQ2# 6
HREQ3# 6
HREQ4# 6
RS0# 6
RS1# 6
RS2# 6
CPUCLK0 12
CPUCLK0# 12
ITP_DBR#
CPURST# 6
CPUPWRGD 6
AF26
CPU_COMP0
L24
CPU_COMP1
P1
J26
K25
K26
L25
H_THERMDA
B3
H_THERMDC
C4
TRIP#
A2
PROCHOT#
C3
HTEST0
AD24
HTEST1
AA2
HTEST2
AC21
HTEST3
AC20
HTEST4
AC24
HTEST5
AC23
HTEST6
AA20
HTEST7
AB22
HTEST8
U6
HTEST9
W4
HTEST10
Y3
HTEST11
A6
AD25
AD6
AD5
D4
C1
TDI
D5
F7
E6
AE5
AE4
AE3
AE2
AE1
HTEST12
BSEL0
BSEL1
TCK
TDI
TDO
TMS
TRST#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
H_THERMTRIP#
H_PROCHOT# 4
R34 0
TCK
TDI
TDO
TMS
TRST#
CPU_VID0 39
CPU_VID1 39
CPU_VID2 39
CPU_VID3 39
CPU_VID4 39
PM_CPUPERF# 17
H_DPSLP# 17
HDST B P # [0 ..3 ] 6
HDSTBN#[0..3] 6
R512 56
R513 56
R514 56
R515 56
R525 56
+CPU_CORE
62_0603
1K
1K
150
75
+CPU_CORE
R12 56
R13 56
R14 56
R15 56
R16 51
R17 62_0603
R18 1K
R20 62_0603
R21 56
R22 56
R23 56
R24 56
R25 200
R27 51
R28 27
R29 680
R30 51.1_1%_0603
R32 51.1_1%_0603
+CPU_CORE
R538 150
A
C464
C465
C466
C467
C468
C469
C470
C471
C472
C473
R61
10K
+CPU_CORE
+3VS
182736
12
+5VS
0.1UF
12
0.1UF
12
0.1UF
12
0.1UF
12
0.1UF
12
0.1UF
12
0.1UF
12
0.1UF
12
0.1UF
12
0.1UF
12
45
RP5
8P4R_10K_0804
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+5VS
R1
10K
1 2
16
NC
15
14
13
NC
12
11
10
9
NC
R11
1K
1 2
+5VS
1 2
EC_SMC2 29
EC_SMD2 29
R10
10K
Thermal Sensor
MAX1617
12
C2
2200PF
R8 1K
12
H_THERMDA
H_THERMDC
W=15mil
U2
1
2
3
4
5
6
7
8
MAX1617
NC
VCC
DXP
DXN
NC
ADD1
GND
GND
C1
0.1UF
1 2
STBY
SMBCLK
SMBDATA
ALERT
ADD0
Fan1 Control circuit
+12VS
3.48K_1%_0603
FAN1
BSEL0
BSEL1
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
R19
2
1 2
21
D2
1N4148
CB1
2.2UF_16V_0805
31
Q2
2SA1036K
+3VS
R36
@1K
R40
@1K
FMMT619
1 2
R37
@1K
R41
@1K
Q1
@1SS355
2 1
2
D58
3 1
D3
1N4148
+5VS
D1
1SS355
2 1
+5VFAN1
C3
1000PF
2 1
C480
1000PF
12
C483
.1UF
EN_FAN129
Title
Size D o cument Numbe r R e v
Dat e : Sheet
1 2
R561
13K_1%_0603
Com pal Electronics, Inc.
SCHEMATIC, M/B LA-1341
401210
¬P , 15, 2002
期五 十一月
JP1
1
2
3
53398-0310
+5VS
+3VS
1
3
12
VCC
VEE
2 5
R562
R26
10K
.1UF
1 2
C484
4
U42
LMV321_SOT23-5
1 2
7.32K_1%_0603
FANSPEED1 29
3
of
FAN1
2A
46
Page 3
A
B
C
D
E
AB9
VCC_CORE
VCC_CORE
GNDF2GND
F22
AC10
VCC_CORE
GND
F25
AC12
VCC_CORE
GNDF5GND
TP1
VCORE_SENSE BPM1
1
AB2
AC1
V5
VCC_SENSE
GND
W21
RSP
GNDV4GND
V26
V23
AC6
AP0
AP1
GND
GNDV1GNDU5GND
AC14
VCC_CORE
F8
AC16
VCC_CORE
GND
G21
AC18
VCC_CORE
GND
G24
AC8
AD11
AD13
VCC_CORE
VCC_CORE
VCC_CORE
GNDG3GNDG6GND
C22
AD15
AD17
VCC_CORE
VCC_CORE
GNDC9GNDY5GND
AD19
VCC_CORE
Y25
AE10
AE12
VCC_CORE
VCC_CORE
GND
GNDY2GNDW6GNDW3GND
Y22
AD9
AD7
VCC_CORE
VCC_CORE
A5
W24
AB5
BPM0
U25
AC4
BPM1
BPM2
GND
U22
AA5
BPM3Y6BPM4
GNDU2GNDT6GNDT3GND
+CPU_CORE Island >
AF2
VCC_CORE
VCC_CORE
GND
GND
B12
AF19
VCC_CORE
GND
B14
AF17
VCC_CORE
GND
B16
AF15
VCC_CORE
GND
B18
AF13
VCC_CORE
GND
B20
600ml
AE8
AF11
VCC_CORE
GND
B23
B26
AE6
VCC_CORE
VCC_CORE
GND
GNDB4GNDB8GND
AE20
VCC_CORE
AE18
VCC_CORE
C11
AE16
VCC_CORE
GND
C13
AE14
VCC_CORE
GND
C15
A10
VCC_CORE
GND
C17
A12
VCC_CORE
GND
C19
A14
VCC_CORE
GNDC2GND
A16
VCC_CORE
E11
A18
VCC_CORE
GND
E13
A20
VCC_CORE
GND
E15
AA10
VCC_COREA8VCC_CORE
GND
E17
E19
GND
AA12
VCC_CORE
GND
E23
AA14
E26
AA16
AA18
AA8
VCC_CORE
VCC_CORE
VCC_CORE
GND
GNDE4GNDE7GNDE9GND
AB11
VCC_CORE
VCC_CORE
F10
AB13
VCC_CORE
GND
F12
AB15
VCC_CORE
GND
F14
AB17
VCC_CORE
GND
F16
AB19
VCC_CORE
GND
F18
AB7
+CPU_CORE
AF21
AF5
AF7
U1B
4 4
3 3
2 2
1 1
B11
B13
B15
B17
B19
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
E10
E12
E14
E16
E18
E20
F11
F13
F15
F17
F19
D10
K21
K24
L23
L26
M22
M25
N21
N24
P22
P25
R23
R26
D12
D14
D16
D18
D20
D24
D21
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
B7
B9
C8
D7
D9
E8
F9
D8
D6
D3
J2
J22
J25
J5
K3
K6
L1
L4
M2
M5
N3
N6
P2
P5
R1
E1
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AF9
VCC_CORE
VCC_CORE
VCC_CORE
GND
GND
GND
GND
GND
B10
AF6
AF8
AF16
AF18
AF20
AB4
AA3
AF4
AF3
BINIT
BPM5
VCCVIDPRG
VCCIOPLL
VSS_SENSE
GND
GND
ZIF_SOCKET478_478P
R4
T24
T21
BPM4
BPM5
BPM0
VCCVID
GTLREF
GTLREF
GTLREF
GTLREF
VCCA
VSSA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AA21
AA6
F20
F6
AD20
AD22
AE23
A4
C7
C5
H1
H4
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
AE11
AE13
AE15
AE17
AE19
C25
+1.2VPP
CB3
1UF_10V_0603
C5
220PF
VCORE_PLL
VSS_PLL
VIO_PLL
VSS_SENSE
C6
220PF
GTLVREF2_CPU
1UF_10V_0603
PROCHOT#29
C7
220PF
VSS_SENSE
CB8
GTLVREF1_CPU
GTLVREF2_CPU
C8
220PF
L1
1 2
12
CB4
+
33UF_D2_16V
L2
1 2
12
CB6
+
33UF_D2_16V
1
TP2
+CPU_CORE
R43
49.9_1%_0603
2/3VCORE
R46
100_1%_0603
+5VALW
R56
1K
4.7UH_80mA
4.7UH_80mA
1 2
Q8
2
3 1
3904
(D)
+1.2VPP
1UF_10V_0603
R57
470
1 2
Q9
2
3 1
3904
BPM4
BPM5
BPM1
BPM0
+1.2VPP
CB7
10UF_10V_1206
GTLVREF1_CPU
CB9
R59
1 2
470
RP108
8P4R-56_0804
CB5
10UF_10V_1206
+CPU_CORE
R47
49.9_1%_0603
2/3VCORE
R51
100_1%_0603
+CPU_CORE
18
27
36
45
H_PROCHOT# 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
Com pal Electronics, Inc.
期五 十一月
¬P , 15, 2002
446
E
2A
of
Page 4
A
Layout note :
Place close to CPU, Use 2~3 vias per PAD.
Place .22uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.
B
C
D
E
Layout note :
Place close to CPU power and
ground pin as possible
(<1inch)
Please place these cap in the socket cavity area
+CPU_CORE
1 1
12
10UF_6.3V_1206
+CPU_CORE
12
10UF_6.3V_1206
CB10
CB15
12
CB11
10UF_6.3V_1206
12
CB16
10UF_6.3V_1206
12
CB12
10UF_6.3V_1206
12
CB17
10UF_6.3V_1206
12
CB13
10UF_6.3V_1206
12
CB18
10UF_6.3V_1206
12
CB14
10UF_6.3V_1206
12
CB19
10UF_6.3V_1206
Please place these cap on the socket north side
+CPU_CORE
12
CB20
10UF_6.3V_1206
2 2
+CPU_CORE
12
CB25
10UF_6.3V_1206
+CPU_CORE
12
CB30
10UF_6.3V_1206
12
CB21
10UF_6.3V_1206
12
CB26
10UF_6.3V_1206
12
CB31
10UF_6.3V_1206
12
CB22
10UF_6.3V_1206
12
CB27
10UF_6.3V_1206
12
CB32
10UF_6.3V_1206
12
CB23
10UF_6.3V_1206
12
CB28
10UF_6.3V_1206
12
CB33
10UF_6.3V_1206
12
CB24
10UF_6.3V_1206
12
CB29
10UF_6.3V_1206
+CPU_CORE
12
+
+CPU_CORE
12
+
+CPU_CORE
12
CE1
220UF_D2_4V_25m
CE8
220UF_D2_4V_25m
C9
0.22UF
Used ESR 25m ohm cap total ESR=2.5m ohm
12
C10
0.22UF
12
CE2
+
220UF_D2_4V_25m
12
CE9
+
220UF_D2_4V_25m
12
C11
0.22UF
12
+
+
C12
0.22UF
12
CE3
220UF_D2_4V_25m
12
CE6
220UF_D2_4V_25m
12
C13
0.22UF
12
CE5
+
220UF_D2_4V_25m
12
CE7
+
220UF_D2_4V_25m
12
C14
0.22UF
12
C15
0.22UF
12
CE4
+
220UF_D2_4V_25m
12
CE10
+
220UF_D2_4V_25m
12
C16
0.22UF
12
C17
0.22UF
12
C18
0.22UF
Please place these cap on the socket south side
+CPU_CORE
3 3
4 4
12
10UF_6.3V_1206
+CPU_CORE
12
10UF_6.3V_1206
+CPU_CORE
12
10UF_6.3V_1206
CB34
CB39
CB44
12
CB35
10UF_6.3V_1206
12
CB40
10UF_6.3V_1206
12
CB45
10UF_6.3V_1206
12
CB36
10UF_6.3V_1206
12
CB41
10UF_6.3V_1206
12
CB46
10UF_6.3V_1206
12
CB37
10UF_6.3V_1206
12
CB42
10UF_6.3V_1206
12
CB47
10UF_6.3V_1206
12
CB38
10UF_6.3V_1206
12
CB43
10UF_6.3V_1206
EMI Clip PAD for CPU
PAD1
PAD-2.5X3
1
PAD2
1
PAD-2.5X3
A
PAD3
PAD-2.5X3
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
SCHEM AT IC , M/ B LA- 1341
Size Docu ment Number Re v
Date: Sheet
Compal E l e c t r onics, Inc.
401210
星期五 十一
?15, 2002
2A
of
546,
E
Page 5
A
HD[0..63]3
HA[3..31]3
4 4
3 3
+CPU_CORE
R81
HNCOMP
R83
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
HPCOMP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
C26
0.01UF
HNCVREF
C27
0.01UF
20_1%_0603
113_1%_0603
+CPU_CORE
2 2
R84
150_1%_0603
R85
75_1%_0603
HNCVREF_G
HD[0..63]
HA[3..31]
CPUCLK112
CPUCLK1#12
HLOCK#3
DEFER#3
HTRDY#3
CPURST#3
CPUPWRGD3
BREQ0#3
DRDY#3
DBSY#3
HREQ4#3
HREQ3#3
HREQ2#3
HREQ1#3
HREQ0#3
HASTB1#3
HASTB0#3
CPUCLK1
CPUCLK1#
HLOCK#
DEFER#
HTRDY#
CPURST#
CPUPW RGD
BPRI#3
RS2#3
RS1#3
RS0#3
ADS#3
HITM#3
HIT#3
BNR#3
BPRI#
BREQ0#
RS2#
RS1#
RS0#
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ4#
HREQ3#
HREQ2#
HREQ1#
HREQ0#
HASTB1#
HASTB0#
HA31
HA30
HA29
HA28
HA27
HA26
HA25
HA24
HA23
HA22
HA21
HA20
HA19
HA18
HA17
HA16
HA15
HA14
HA13
HA12
HA11
HA10
HA9
HA8
HA7
HA6
HA5
HA4
HA3
AJ26
AH26
U24
U26
V26
C20
D19
T27
U25
T24
T26
U29
V28
T28
U28
W26
V24
V27
W28
W29
W24
W25
Y27
AD24
AA24
AF26
AE25
AH28
AD26
AG29
AE26
AF28
AC24
AG28
AE29
AD28
AC25
AD27
AE28
AF27
AB24
AB26
AC28
AC26
AC29
AA26
AB28
AB27
AA25
AA29
AA28
Y26
Y24
Y28
B
HNCOMP
HNCVREF
HVREF0
HD#54
T21
HVREF1
HD#53
D21
HD53
HPCOMP
VBD6
VBD7
VBD4
VBD3
VBD5
P21
N21
J17
B20
HVREF2
HVREF3
HVREF4
B7
A19
B19
ST0A7ST1F9ST2
HPCOMP
HNCOMP
HNCOMPVREF
VBD7/AAD0M6VBD6/AAD1M5VBD5/AAD2M4VBD4/AAD3L3VBD3/AAD4L6VBD2/AAD5
650-1
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
F22
HD52
D24
HD51
D23
HD50
C24
HD49
B24
HD48
E25
HD47
E23
HD46
D25
HD45
A25
HD44
C26
B26
HD42
HD43
B27
HD41
D26
HD40
B28
HD39
E26
HD38
F28
HD37
HVREF
C4XAVDD
C4XAVSS
AJ25
AJ27
U21
AH25
AH27
CPUCLK
CPUCLK#
HLOCK#
DEFER#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS#2
RS#1
RS#0
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HASTB#1
HASTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
C1XAVSS
C4XAVSS
C1XAVDD
C4XAVDD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HOST
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
F19
B21
A21
E19
B22
B23
A23
D22
D20
C22
HD60
HD59
HD58
HD57
HD56
HD55
HD54
HD63
HD61
HD62
VBD2
L4
HD#36
G25
HD36
VBD1
VBD0
L2
CBD1/AAD6K6CBD0/AAD7
HD#35
HD#34
F27
F26
HD35
HD34
VAD6
VAD5
VAD6/AAD8K3VAD5/AAD9
HD#33
G24
HD33
VAD4
J3
HD#32
H24
HD32
C
VAD7
VAD4/AAD10K4VAD7/AAD11J2VAD8/AAD12J6VAD9/AAD13
HD#31
J26
G29
HD31
HD30
HD#30
VAD8
G26
VAD9
J4
HD#29
J25
HD29
VAD10
HD#28
H26
HD27
HD28
VAD11
H6
VAD10/AAD14J1VAD11/AAD15
HD#27
HD#26
G28
HD26
ADE
F4
VADE/AAD16
HD#25
H28
HD25
AVSYNC
AHSYNC
G6
F1
VAVSYNC/AAD17
VAHSYNC/AAD18
HD#24
HD#23
J24
K28
HD24
HD23
VBD11
VBD10
F5
VBD11/AAD19E3VBD10/AAD20
HD#22
J29
K27
HD21
HD22
VAD3
VAD0
VAD1
VAD2
VBD9
VBD8
VBD8/AAD21E2VBD9/AAD22E4VAD1/AAD23E1VAD0/AAD24D3VAD2/AAD25D4VAD3/AAD26
LVDS
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
J28
L26
L25
K26
M24
HD18
HD20
HD16
HD17
HD19
BDE
F7
C2
HD#15
L28
M26
HD15
VBCTL0
C3
VBDE/AAD27
HD#14
P26
HD14
VBCTL1
E6
VBCTL0AAD28
HD#13
L29
HD13
BHSYNC
B2
VBCTL1/AAD29
HD#12
N24
HD12
BVSYNC
D5
VBHSYNC/AAD30
HD#11
N26
HD10
HD11
VBVSYNCAAD31
HD#10
M27
HD9
SBA7D6SBA6A3SBA5D7SBA4C5SBA3A5SBA2C6SBA1
HD#9
HD#8
HD#7
HD#6
HD#5
HD#4
P27
N28
N29
R24
R28
M28
HD4
HD7
HD8
HD6
HD5
HD3
D
BCLK
C20
@10PF
D8
C7
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
VBCLK/SBA0
VBCAD/AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
VBHCLK/RBF#
VGPIO2/WBF#
VGPIO3/PIPE#
SB_STB
SB_STB#
VAGCLK/AD_STB0
VAGCLKN/AD_STB#0
VBGCLK/AD_STB1
VBGCLKN/AD_STB#1
AGPCLK
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
HD#3
HD#2
HD#1
HD#0
DBI#3
DBI#2
DBI#1
P28
E21
A27
R26
R29
H27
DBI#3
DBI#2
DBI#1
HD1
HD0
HD2
U5A
R25
NC
NC
NC
DBI#0
DBI#0
SIS650
F6
F3
H4
K5
C9
A6
G2
G1
G3
G4
H5
H1
H3
E8
F8
D9
D10
B3
C4
B5
A4
K1
L1
C1
D1
B10
M1
B9
A9
B8
A8
M3
M2
F20
F23
K24
P24
F21
F24
L24
N25
R73 0
R76 0
R77 @0
R78 @0
AGCLK
AGCLKN
BGCLK
BGCLKN
AGPCLK0
AGPRCOMP
A4XAVDD
A4XAVSS
AVREFGC
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
BCLK
BGCLKN
BGCLK
AGCLKN
AGCLK
BVSYNC
BHSYNC
AHSYNC
AVSYNC
BHCLK
BCAD
AGPCLK0 12
R64 10
R65 @10
R66 10
R67 @10
R68 10
R69 10
R70 10
R71 10
R72 10
ADE
R74 10
BDE
R75 10
C21
@10PF
HDSTBN#[0..3] 3
HDST B P # [0 ..3 ] 3
VBCLK
VBGCLK#
VBGCLK
VAGCLK#
VAGCLK
VBVSYNC
VBHSYNC
VAHSYNC
VAVSYNC
C22
@10PF
E
VAD[0..11]
VBD[0..11]
VBCTL[0..1]
VADE
VBDE
VBGCLK
AGPRCOMP
AVREFGC
VBGCLK#
VAGCLK#
VAGCLK
C23
@10PF
AGPCLK0
R79 @10
R82 8.2K
VBCLK 15
VBGCLK# 15
VBGCLK 15
VAGCLK# 15
VAGCLK 15
VBVSYNC 15
VBHSYNC 15
VAHSYNC 15
VAVSYNC 15
VAD[0..11] 15
VBD[0..11] 15
VBCTL[0..1] 15
VADE 15
VBDE 15
C24
@10PF
R80
60_1%_0603
C25
@10PF
+3VS
+CPU_CORE
+3VS
R86
75_1%_0603
1 1
R89
150_1%_0603
C28
0.01UF
C29
0.01UF
HVREF_G
HVREF
C30
0.1UF
place this capacitor
under 650 solder side
A
A4XAVDD
C31
0.1UF
A4XAVSS
L3
1 2
HB-1M2012-121JT
C32
0.01UF
CB48
4.7UF_10V_0805
B
C4XAVDD
C4XAVSS
C33
0.1UF
1 2
C34
0.01UF
+3VS
L4
HB-1M2012-121JT
CB49
4.7UF_10V_0805
+3VS
R87
R88
4.7K
4.7K
BCAD
BHCLK
C
VBCAD 15
VBHCLK 15
D
DBI#[0..3] 3
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
Com pal Electronics, Inc.
期五 十一月
of
646¬P , 15, 2002
E
2A
Page 6
A
B
C
D
E
NOTE:This page is for pure DDR SDRAM PCB
MD[0..63]
RDQM[0..7]
RDQS[0..7]
MAA[0..14]
4 4
MD[0..63] 10,11
RDQM[0..7] 10,11
RDQS[0..7] 10,11
MAA[0..14] 10,11
RP* PLACE CLOSE TO DIMM
MD4
MD5
MD0
MD1
MD6
RDQS0
MD2
MD3
8P4R_10_0804
MD12
MD8
MD7
MD9
MD13
MD14
MD10
RDQS1
8P4R_10_0804
MD11
MD20
MD16
MD15
3 3
2 2
RDQM1
RDQM2
1 1
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
MD17 MA12
RDQS2
MD18
8P4R_10_0804
MD22 MMD22
MD19
MD24
MD28
MD29
MD25
RDQS3
8P4R_10_0804
MD30
MD27
MD31
MD26
MD32 MMD30
MD37
MD36
MD33
8P4R_10_0804
MD34
MD39
MD38 MMD35 CKE3
RDQS4
MD45
MD44
MD40
8P4R_10_0804
MD42
MD46
MD41
RDQS5
MD48
MD43
8P4R_10_0804
MD54
RDQS6
MD53
MD55
MD60
MD50
MD51 MMD52
8P4R_10_0804
MD59
MD62 MMD57
8P4R_10_0804
A
RP10
8P4R_10_0804
1 8
RP11
2 7
3 6
4 5
RP12
8P4R_10_0804
1 8
RP13
2 7
3 6
4 5
RP14
8P4R_10_0804
1 8
2 7
3 6
RP15
4 5
RP16
8P4R_10_0804
1 8
RP18
2 7
3 6
4 5
RP20
8P4R_10_0804
1 8
RP23
2 7
3 6
4 5
RP24
8P4R_10_0804
1 8
RP25
2 7
3 6
4 5
RP26
8P4R_10_0804
1 8
RP27
2 7
3 6
4 5
RP28
8P4R_10_0804
1 8
RP29
2 7
3 6
4 5
RP30
8P4R_10_0804
RP31
1 8
2 7
3 6
4 5
R101 10
R102 10
R103 10
R104 10
R105 10
R106 10
R107 10
R108 10
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
DQM0RDQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
MMD4
MMD5
MMD0
MMD1
MMD6
DQS0
MMD2
MMD3
MMD12
MMD8
MMD7
MMD9
MMD13
MMD14
MMD10
DQS1
MMD11
MMD20
MMD16
MMD15
MMD21MD21
MMD17
DQS2
MMD18
MMD19
MMD23MD23
MMD24
MMD28
MMD29
MMD25
DQS3
MMD30
MMD27
MMD31
MMD26
MMD32
MMD37
MMD36
MMD33
MMD34
MMD39
MMD38
DQS4
MMD35
MMD45
MMD44
MMD40
MMD42
MMD46
MMD41
DQS5
MMD48
MMD47
MMD43
MMD52
MMD49
MMD54
DQS6
MMD53
MMD55
MMD60
MMD50
MMD51
MMD56
MMD61
MMD57
DQS7
MMD58
MMD59
MMD62
MMD63
B
design
MMD0
MMD1
MMD2
MMD3
MMD4
MMD5
MMD6
MMD7
DQM0
DQS0
MMD8 MA1
MMD9 MA2
MMD10 MA3
MMD11 MA4
MMD12
MMD13 MA6
MMD14 MA7
MMD15 MA8
DQM1 MA9
DQS1 MA10
MMD16 MA11
MMD17
MMD18
MMD19
MMD20
MMD21 RAS- SRAS#
MMD22 CAS- SCAS#
MMD23 WE- SWE#
DQM2
DQS2
MMD24
MMD25 CS-0 RCS0#
MMD26 CS-1 RCS1#
MMD27
MMD28
MMD29
MMD31
DQM3
DQS3
MMD32 CKE0
MMD33 CKE1
MMD34 CKE2
MMD36
MMD37MD35
MMD38 S3AUXSW#
MMD39
DQM4
DQS4
MMD40 SDCLK
MMD41
MMD42
MMD43
MMD44MD47
MMD45
MMD46MD52
MMD47MD49
DQM5 SDAVDD
DQS5
MMD48 SDAVSS
MMD49
MMD50
MMD51 DDRAVDD
MMD53 DDRAVSSMD56
MMD54MD61
MMD55MD57
DQM6RDQS7
DQS6 DDRVREFAMD58
MMD56 DDRVREFB
MMD58MD63
MMD59
MMD60
MMD61
MMD62
MMD63
DQM7
DQS7
AJ23
AG22
AH21
AJ21
AD23
AE23
AF22
AF21
AD22
AH22
AD21
AG20
AE19
AF19
AE21
AD20
AD19
AH19
AF20
AH20
AF18
AG18
AH17
AD16
AD18
AD17
AF17
AJ17
AE17
AH18
AD14
AG14
AJ13
AE13
AJ15
AF14
AD13
AF13
AH13
AH14
AD10
AH10
AE9
AD8
AG10
AF10
AH9
AF9
AD9
AH5
AG4
AE5
AH3
AG6
AF6
AF5
AF4
AH4
AE4
AD6
AE2
AC5
AG2
AG1
AF3
AC6
AD4
AF2
AB6
AD3
AA6
AB3
AC4
AE1
AD2
AC1
AB4
AC2
AJ9
AJ3
U5B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB#0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB#2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB#3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB#4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7
SIS650
650-2
S3AUXSW#
FWDSDCLKO
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
MA1 MAA1
MA0 MAA0
MA3
MA2
MA5 MAA5
MA7
MA6
MA9 MAA9
MA8 MAA8
MA14
MA13
MA12 MAA12
RP9 4P2R_10
MA10
RP6
18
8P4R_10_0804
27
36
45
18
RP8
27
8P4R_10_0804
36
45
R93 10
RP* place close to DIMM1
MA0
AH11
MA0
AF12
MA1
AH12
MA2
AG12
MA3
AD12
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
SRAS#
SCAS#
SWE#
CS#0
CS#1
CS#2
CS#3
CS#4
CS#5
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
SDCLK
SDRCLKI
SDAVDD
SDAVSS
AH15
AF15
AH16
AE15
AD15
AF11
AG8
AJ11
AG16
AF16
AH8
AJ7
AH7
AE7
AF7
CS-2
AH6
AJ5
AF8
AD7
AB2
AA4
AB1
Y6
AA5
Y5
Y4
AA3
AD11
AE11
Y1
Y2
AA1
AA2
AJ19
AH2
R100 4.7K
W3
MA5
MA13
MA14
4P2R_10
RP19
R99 10
R516 10
R517 10
R97 10
1 4
2 3
RP214P2R_10
R98 @10
C42 @10PF
+3VALW
RP7
18
27
36
45
8P4R_10_0804
14
23
1 4
2 3
FW DSDCLKO
MAA10
C41 @10PF
D
MAA3
MAA2
MAA4MA4
MAA7
MAA6
MAA14
MAA13
MAA11MA11
RCS2#
RCS3#CS-3
FWDSDCLKO 13
DDRVREFA
DDRVREFB
SRAS# 10,11
SCAS# 10,11
SWE# 10,11
RCS0# 10,11
RCS1# 10,11
RCS2# 10,11
RCS3# 10,11
CKE[0..3] 10
S3AUXSW# 29,32
SDCLK 12
+2.5V
R90
C35
0.01UF
C36
0.01UF
DDRVREFA_G
C37
0.01UF
C38
0.01UF
DDRVREFB_G
SDAVDD
SDAVSS
DDRAVDD
DDRAVSS
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
期五 十一月
150_1%_0603
R91
R92
@0_0603
150_1%_0603
+2.5V
R94
CKE0
CKE1
CKE2
CKE3
150_1%_0603
R96
150_1%_0603
RP22
1 8
2 7
3 6
4 5
8P4R_470_0804
R95
@0_0603
+2.5V
1 2
C39
0.1UF
C40
0.01UF
1 2
C43
0.1UF
C44
0.01UF
Com pal Electronics, Inc.
E
SDREF 10,35
+3VS
L5
HB-1M2012-121JT
+3VS
L6
HB-1M2012-121JT
746¬P , 15, 2002
SDREF 10,35
CB50
4.7UF_10V_0805
CB51
4.7UF_10V_0805
of
2A
Page 7
A
B
C
D
E
ZVREF_G
Z4XAVDD
Z4XAVSS
ZSTB[0..1]
ZSTB[0..1]#
C47
0.1UF
C48
0.1UF
ZAD[0..15]16
ZVREF
R109
C45
10PF
ZCLK012
ZAD[0..15]
PCIRST-16,20,29
PWRGD17,32
RSM_RST17,29
ZCLK0
ZUREQ16
ZDREQ16
ZSTB016
ZSTB0#16
ZSTB116
ZSTB1#16
Z4XAVDD
Z4XAVSS
10
ZUREQ
ZDREQ
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
PCIRSTPWRGD
AUXOK
TRAP1
TRAP0
U5C
SIS650
D11
E10
V3
U6
U1
T3
T1
P1
P3
T4
R3
T5
T6
R2
R6
R1
R4
P4
N3
P5
P6
N1
N6
N2
N4
U3
V5
U4
U2
V6
W1
W2
V2
V1
Y3
W4
W6
ZCLK
ZUREQ
ZDREQ
ZSTB0
ZSTB#0
ZSTB1
ZSTB#1
ZAD0
ZAD1
ZAD2
650-3
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
MuTIOL
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
PCIRST#
PWROK
AUXOK
TRAP1
TRAP0
VGA
VOSCI
ROUT
GOUT
BOUT
HSYNC
VSYNC
VGPIO0
VGPIO1
INT#A
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
ENTEST
DLLEN#
TESTMODE0
TESTMODE1
TESTMODE2
C46 10PF
C15
14.318M INPUT REFERENCE
A12
B13
A13
R115 33
F13
R117 33
E13
R119 100
D13
R120 100
D12
B11
E12
A11
F12
E14
D14
F14
B12
C12
C13
C14
B15
A15
B14
A14
F10
ENTEST
E11
DLLEN#
C11
F11
A10
R110 10
REFCLK0
RED
GREEN
BLUE
HSYNC
VSYNC
DDCCLK
DDCDATA
PIRQA#
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
REFCLK0 12,15
RED 14
GREEN 14
BLUE 14
HSYNC 14
VSYNC 14
DDCCLK 14
DDCDATA 14
PIRQA# 15,16,23
for 650 only
RSYNC
CSYNC
LSYNC
ENTEST
PWRGD
AUXOK
+3VS
R112 4.7K
R532 @4.7K
R533 @4.7K
R123 4.7K
C49 @0.1UF
C51 0.1UF
ZSTB [0 ..1 ]16
ZSTB[0..1]#16
4 4
3 3
+3VS
L7
1 2
HB-1M2012-121JT
CB52
4.7UF_10V_0805
2 2
150_1%_0603
150_1%_0603
C52
0.1UF
+1.8VS
R111
R113
C53
0.01UF
+3VS
DCLKAVDD
C56
DCLKAVSS
+1.8VS
L9
1 2
CB54
10UF_10V_1206
1 1
HB-1M2012-121JT
A
C59
0.1UF
C60
0.01UF
R125 56.2_1%_0603
R126 56.2_1%_0603
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
B
ECLKAVDD
ECLKAVSS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
0.01UF
C63
0.01UF
L8
1 2
HB-1M2012-121JT
C57
0.1UF
L11
1 2
HB-1M2012-121JT
C62
0.1UF
D
CB53
4.7UF_10V_0805
+3VS
CB57
4.7UF_10V_0805
C55
VVBWN
VCOMP
DACAVDD1
DACAVDD2
DACAVSS2
DACAVSS1
VRSET
130_1%_0603
Title
Size D o cument Numbe r R e v
Dat e : Sheet
0.1UF
C58
0.1UF
1 2
CB55
C61
1UF_10V_0603
0.1UF
R127
Com pal Electronics, Inc.
SCHEMATIC, M/B LA-1341
401210
期五 十一月
+1.8VS
L10
HB-1M2012-121JT
E
CB56
10UF_10V_1206
of
846¬P , 15, 2002
2A
Page 8
5
NOTE:This page is for pure DDR SDRAM PCB design
+CPU_CORE
+CPU_CORE
A16
A17
C16
C17
C18
D15
D16
D17
D18
E15
E16
E17
E18
F15
F16
F17
F18
AB5
AD5
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE22
V10
V11
W18
Y10
Y12
Y14
Y16
Y18
Y19
AA8
AA9
AA10
AA13
AA14
AA15
AA16
AA17
AB8
AB9
AB13
AB17
K11
K13
A18
B16
B17
B18
J10
J13
L10
G5
D D
+2.5V
C C
+3VS
B B
N10
+1.8VS
W5
P10
R10
T10
A A
T11
H21
H22
J16
J20
J21
J22
K16
K17
K18
K19
K20
K21
L20
M20
N20
P20
R20
R21
T20
U20
V20
W20
Y20
Y21
AA20
AA21
AA22
AB21
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
650-4
VSS
VSS
VSS
VSS
VSS
P15
P16
P17
P18
R12
VSS
VTT
VSS
R13
R14
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
Y9
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
E5
VDDQ
E7
VDDQ
E9
VDDQ
VDDQ
J5
VDDQ
L5
VDDQ
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
VDDQ
VDDQ
K9
VDDQ
VDDQ
VDDQ
VDDQ
N9
VDDQ
VDDQ
N5
VDDZ
R5
VDDZ
U5
VDDZ
VDDZ
P9
VDDZ
VDDZ
R9
VDDZ
VDDZ
T9
VDDZ
VDDZ
VDDZ
PVDDP
L17
L19
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P12
P13
N19
R19
U19
+1.8VS
5
W19
N12
N13
N14
M12
M13
M14
M15
M16
N15
M17
M18
P14
N16
N17
N18
+1.8VS
AB22
L12
VTT
VTT
IVDD
Power
VSS
VSS
VSS
VSS
R15
R16
R17
L14
R18
L15
IVDD
VSS
T12
4
L16
IVDD
VSS
T13
4
L18
IVDD
VSS
T14
IVDD
VSS
M11
T15
IVDD
VSS
M19
T16
N11
IVDD
VSS
T17
P19
IVDD
VSS
T18
R11
IVDD
VSS
U12
T19
IVDD
VSS
U13
U11
IVDD
VSS
U14
V19
IVDD
VSS
U15
W11
IVDD
VSS
U16
W13
IVDD
VSS
U17
W15
IVDD
VSS
U18
W17
IVDD
VSS
V12
IVDD
VSS
V13
VSS
+3VS
P11
PVDDZ
VSS
V14
V15
VSS
3
+3VALW
+1.8VALW +3VALW
CB59
AF25
VSS
AUX1.8
AUX3.3
VSS
AG24
AG26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3
U5D
U10
+1.8VALW
U9
+3VALW
A20
A22
A24
A26
C19
C21
C23
C25
C27
E20
E22
E24
F25
H25
K25
M25
P25
T25
V25
Y25
AB25
AD25
E27
G27
J27
L27
N27
R27
U27
W27
AA27
AC27
AE27
D29
F29
H29
K29
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2
P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27
VSS
VSS
AH23
AH24
+CPU_CORE
+3VS
SIS650
10UF_10V_1206
CB62
1UF_10V_0603
C65
0.1UF
+1.8VS
CB65
1UF_10V_0603
CB68
1UF_10V_0603
CB64
10UF_10V_1206
CB67
10UF_10V_1206
C72
0.1UF
C74
0.1UF
Place these capacitors under 650 solder side
+CPU_CORE
C78
0.1UF
C82
0.1UF
C85
0.1UF
C91
0.1UF
J14
J15
K15
K10
K12
K14
M10
W10
Y11
Y13
Y15
Y17
PVDD
PVDD
PVDD
OVDD
VSS
V16
PVDD
OVDD
OVDD
VSS
VSS
V17
V18
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B25
E28
E29
C28
C29
D27
D28
AF23
AF24
10UF_10V_1206
C73
0.1UF
C75
0.1UF
C79
0.1UF
C83
0.1UF
C86
0.1UF
C92
0.1UF
2
CB60
CB63
1UF_10V_0603
C66
0.1UF
+2.5V
+2.5V
2
+3VS
10UF_10V_1206
C69
0.1UF
C70
0.1UF
CB70
10UF_10V_1206
CB73
10UF_10V_1206
C80
0.1UF
C84
0.1UF
C87
0.1UF
C93
0.1UF
1
CB58
CB61
1UF_10V_0603
C64
0.1UF
C67
0.1UF
+1.8VS
C68
0.1UF
C71
0.1UF
CB71
1UF_10V_0603
CB74
1UF_10V_0603
+1.8VS
C76
0.1UF
CB76
10UF_10V_1206
C88
0.1UF
C94
0.1UF
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
期五 十一月
CB66
10UF_10V_1206
CB69
1UF_10V_0603
CB72
1UF_10V_0603
CB75
1UF_10V_0603
+3VALW
C77
0.1UF
C81
0.1UF
+3VS+3VS
C89
0.1UF
C90
0.1UF
Com pal Electronics, Inc.
1
946¬P , 15, 2002
2A
of
Page 9
A
B
C
D
E
131
VDDQ
GND
125
143
VDDQ
GND
137
+2.5V
JP5
179
155
157
167
191
VDD
VDD10VDD22VDD34VDD36VDD46VDD58VDD70VDD
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND4GND16GND28GND38GND40GND52GND64GND76GND88GND90GND
149
159
161
173
185
Title
Size D o cument Numbe r R e v
Dat e : Sheet
82
114
VDD92VDD94VDD
104
SCHEMATIC, M/B LA-1341
401210
期五 十一月
192
132
144
156
168
180
VDD
VDD
VDD
VDD
126
GND
138
GND
150
GND
VDD
GND
GND
162
174
VDDQ
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
GND
GND
GND
DDRAM_SODIMM_200P-R
186
201
202
InsightOutsight
5
7
13
17
6
8
14
18
19
23
29
31
20
24
30
32
41
43
49
53
42
44
50
54
55
59
65
67
56
60
66
68
127
129
135
139
128
130
136
140
141
145
151
153
142
146
152
154
163
165
171
175
164
166
172
176
177
181
187
189
178
182
188
190
71
73
79
83
72
74
80
84
Com pal Electronics, Inc.
E
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
2A
of
10 46¬P , 15, 2002
+2.5V
131
125
143
VDDQ
VDDQ
GND
GND
137
155
VDDQ
GND
149
157
VDDQ
GND
159
167
161
179
VDDQ
VDDQ
GND
GND
173
191
VDD
GND
185
82
114
VDD10VDD22VDD34VDD36VDD46VDD58VDD70VDD
VDD92VDD94VDD
GND4GND16GND28GND38GND40GND52GND64GND76GND88GND90GND
104
PC2100 - CL2 = 15 to Data 2-2-2/2.5-3-3
CL2.5 = 18.75 to Data
DDR266 256MB 4Bks Pmax = 8W
Ptyp = 7W
64MB/128MB/256MB - 500MB/s - 1.0W
- 1000MB/s - 1.65W
- 1500MB/s - 2.5W
- 2000MB/s - 3.2W
B
4 4
113
MAA[0..14]7,11
RCS2#7,11
RCS3#7,11
3 3
2 2
1 1
RDQM[0..7]7,11
R563 0
+2.5V +2.5V
R518 @100K
SWE#7,11
SCAS#7,11
SRAS#7,11
CKE27
CKE37
DDRCLK313
DDRCLK3#13
DDRCLK413
DDRCLK4#13
DDRCLK513
DDRCLK5#13
RDQS07,11
RDQS17,11
RDQS27,11
RDQS37,11
RDQS47,11
RDQS57,11
RDQS67,11
RDQS77,11
SMBDAT12,13,17
SMBCLK12,13,17
+2.5V
R128
1K_1%_0603
R130
1K_1%_0603
+3VS
+3VS
C486
0.1UF
C97
0.1UF
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA13
MAA14
MAA11
MAA12
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
SWE#
SCAS#
SRAS#
CKE3
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
SMBDT
SMBCK
MVREF_DIM
C487
1000PF
MVREF_DIM
A
112
111
110
109
108
107
106
105
102
101
115
100
99
97
117
116
98
121
122
12
26
48
62
134
148
170
184
78
119
120
118
96
95
35
37
160
158
89
91
11
25
47
61
133
147
169
183
77
193
195
194
196
198
1
2
199
197
86
85
123
124
200
MVREF_DIM
C98
1000PF
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DU/A13
BA0
BA1
DU/BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
CK2
CK2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VREF
VDDID
VDDSPD
NC//DU/RESET
NC/DU
NC/DU
NC/DU
NC/DU
3
R129
@0_0603
VDDQ9VDDQ21VDDQ33VDDQ45VDDQ57VDDQ69VDDQ81VDDQ93VDDQ
GND15GND27GND39GND51GND63GND75GND87GND
GND
103
-CS/-RAS/-CAS/-WE
R - 0101
W - 0100
SDREF 7,35
132
126
192
144
156
168
180
Lower Upper
VDD
VDD
VDD
VDD
GND
138
GND
VDD
VDDQ
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
GND
GND
GND
GND
GND
150
162
174
186
201
202
MD0
5
D0
MD1
7
D1
MD2
13
D2
MD3
17
D3
MD4
6
D4
MD5
8
D5
MD6
14
D6
MD7
18
D7
MD8
19
D8
MD9
23
D9
MD10
29
MD11
31
MD12
20
MD13
24
MD14
30
MD15
32
MD16
41
MD17
43
MD18
49
MD19
53
MD20
42
MD21
44
MD22
50
MD23
54
MD24
55
MD25
59
MD26
65
MD27
67
MD28
56
MD29
60
MD30
66
MD31
68
MD32
127
MD33
129
MD34
135
MD35
139
MD36
128
MD37
130
MD38
136
MD39
140
MD40
141
MD41
145
MD42
151
MD43
153
MD44
142
MD45
146
MD46
152
MD47
154
MD48
163
MD49
165
MD50
171
MD51
175
MD52
164
MD53
166
MD54
172
MD55
176
MD56
177
MD57
181
MD58
187
MD59
189
MD60
178
MD61
182
MD62
188
MD63
190
71
73
79
83
72
74
80
84
GND
DDRAM_SODIMM_200P-L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MD[0..63] 7,11
MVREF_DIM
C95
0.1UF
C
RCS0#7,11
RCS1#7,11
R519 @100K
R564 0
CKE07
CKE17
DDRCLK013
DDRCLK0#13
DDRCLK113
DDRCLK1#13
DDRCLK213
DDRCLK2#13
+3VS
MVREF_DIM
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA13
MAA14
MAA11
MAA12
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
SWE#
SCAS#
SRAS#
CKE0CKE2
CKE1
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
SMBDT
SMBCK
MVREF_DIM
C96
1000PF
112
111
110
109
108
107
106
105
102
101
115
100
99
97
117
116
98
121
122
12
26
48
62
134
148
170
184
78
119
120
118
96
95
35
37
160
158
89
91
11
25
47
61
133
147
169
183
77
193
195
194
196
198
1
2
199
197
86
85
123
124
200
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DU/A13
BA0
BA1
DU/BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
CK2
CK2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VREF
VDDID
VDDSPD
NC//DU/RESET
NC/DU
NC/DU
NC/DU
NC/DU
3
VDDQ9VDDQ21VDDQ33VDDQ45VDDQ57VDDQ69VDDQ81VDDQ93VDDQ
GND15GND27GND39GND51GND63GND75GND87GND
GND
JP4
113
103
D
Page 10
A
B
C
D
E
Decoupling capacitors
(Place near DDR SODIMM)
+2.5V
CB77 1UF_10V_0603
CB79 1UF_10V_0603
CB81 1UF_10V_0603
4 4
3 3
2 2
CB83 1UF_10V_0603
CB85 1UF_10V_0603
+2.5V
10UF_10V_1206
CB87
10UF_10V_1206CB88
10UF_10V_1206CB89
10UF_10V_1206CB90
Place these decoupling capacitors close to
VTT_MEM termination resistors.
+1.25VS
0.1UFC137
0.1UFC140
0.1UFC143
0.1UFC148
0.1UFC151
0.1UFC154
0.1UFC157
0.1UFC159
+2.5V
0.1UFC99
0.1UFC100
0.1UFC101
0.1UFC104
0.1UFC105
0.1UFC106
0.1UFC107
0.1UFC109
0.1UFC113
0.1UFC117
+1.25VS
C156
C158
1000PFC139
1000PFC142
1000PFC145
1000PFC150
1000PFC153
1000PF
1000PF
1000PFC160
MD0
MD4
MD1
MD5
RDQS07,10
RDQS17,10
RDQS27,10
RDQS37,10
RDQS47,10
RDQS57,10
RDQS67,10
RDQS0
MD6
MD2
MD3
MD7
MD8
MD12
MD9
MD13
RDQS1
MD10
MD14
MD11
MD15
MD16
MD20
MD17
MD21
RDQS2
MD18
MD22
MD19
MD23
MD24
MD28
MD25
MD29
RDQS3
MD26
MD30
MD27
MD31
MD32
MD36
MD33
MD37
RDQS4
MD38
MD34
MD39
MD35
MD44
MD40
MD45
MD41
RDQS5
MD42
MD46
MD43
MD47
MD48
MD52
MD49
MD53
RDQS6
MD54
MAA10
MAA12
Termianation Network place closely to DIMM
RP32
RP33
RP35
RP37
RP39
RP40
RP42
RP44
RP46
RP47
RP49
RP51
RP53
RP55
RP56
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
RP574P2R_33
1 4
2 3
+1.25VS
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
C102
0.1UF
C114
0.1UF
C123
0.1UF
C127
0.1UF
C131
0.1UF
C135
0.1UF
C146
0.1UF
C103
1000PF
C115
1000PF
C124
1000PF
C128
1000PF
C132
1000PF
C136
1000PF
C147
1000PF
+1.25V Island
> 150ml
MD[0..63]7,10
MAA[0..14]7,10
RDQS77,10
RDQM07,10
RDQM17,10
RDQM27,10
RDQM37,10
RDQM47,10
RDQM57,10
RDQM67,10
RDQM77,10
SRAS#7,10
SWE#7,10
SCAS#7,10
RCS2#7,10
RCS3#7,10
RCS0#7,10
RCS1#7,10
MD50
MD55
MD51
MD60
MD56
MD61
MD57
RDQS7
MD62
MD58
MD63
MD59
MAA14
MAA13
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
MAA11
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
SRAS#
SWE#
SCAS#
RCS2#
RCS3#
RCS0#
RCS1#
MD[0 ..6 3 ]
MAA[0..14]
RP34
1 8
2 7
3 6
4 5
RP36
1 8
2 7
3 6
4 5
RP38
1 8
2 7
3 6
4 5
RP41
1 8
2 7
3 6
4 5
RP43
1 8
2 7
3 6
4 5
RP45
1 8
2 7
3 6
4 5
R493 33
R494 33
R495 33
R496 33
R497 33
R498 33
R499 33
R500 33
R501 33
R502 33
R503 33
R504 33
R505 33
R506 33
R507 33
R508 33
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
8P4R-33_0804
+1.25VS
C110
0.1UF
C120
0.1UF
C125
0.1UF
C129
0.1UF
C133
0.1UF
C111
1000PF
C121
1000PF
C126
1000PF
C130
1000PF
C134
1000PF
+1.25VS
C161 0.015UF
C162 0.015UF
1 1
C163 0.015UF
C164 0.015UF
C165 0.015UF
C166 0.015UF
+1.25VS
+
CE11 100UF_D2_6.3V
+
CE12 100UF_D2_6.3V
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
Com pal Electronics, Inc.
期五 十一月
2A
of
11 46¬P , 15, 2002
E
Page 11
A
+3VS
B
Main Clock Generator
C
D
E
1: (ICS:ICS952001)
L12
HB-1M2012-121JT
4 4
C167
0.1UF
CB91
+
10UF_10V_1206
3 3
PM_STPCPU#17,39
VR_POK32,39
C172
0.1UF
A
U6
C168
0.1UF
C171
0.1UF
D23
@RB751V
+3VS
C169
0.1UF
C177
0.1UF
C173
0.1UF
+3VS
21
R154
HB-1M2012-121JT
L13
C170
0.1UF
R143
10K
CPUSTP-
C178
0.1UF
C174
0.1UF
475_1%_0603
B
C179
0.01UF
CLOCK GEN (650)
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
PCI_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
45
CPU_STOP#
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
37
VSSA
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK_F0/FS3
PCICLK_F1/FS4
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
24_48M/MULTISEL
48M
SCLK
SDATA
40
39
44
43
47
31
30
9
10
14
15
16
17
20
21
22
23
2
3
4
27
26
35
34
R_CPUCLK0
R_CPUCLK-0
R_CPUCLK1
R_CPUCLK-1
R_SDCLK
R_AGPCLK0
R_ZCLK0
R_ZCLK1
CLKFS3
CLKFS4
R_PCICLK1
R_PCICLK2
R_PCICLK3
R_PCICLK4
R_PCICLK5
CLKFS0
CLKFS1
CLKFS2
R_UCLK48M
MULTISEL
MULTISEL
Damping Resistors
Place near to the
Clock Outputs
R135
R136
R137
R138
R139
R140
1 2
C175 1000PF
R141
R142
R144
R145
R146
R147
R148
R149
R150
1 2
C176 1000PF
R151
R152
R153
R155
R156
CPUCLK0
33
CPUCLK-0
33
CPUCLK1
33
CPUCLK-1
33
SDCLK
22
AGPCLK0
22
AGPCLK1
ZCLK0
22
ZCLK1
22
96XPCLK
33
EC_PCLK
33
PCICLK1
33
PCICLK2
33
PCICLK3
33
PCICLK4
33
PCICLK5
33
REFCLK0
33
REFCLK1
33
REFCLK2
33
UCLK48M
22
+3VS
10K
CPUCLK0 3
CPUCLK0# 3
CPUCLK1 6
CPUCLK1# 6
SDCLK 7
AGPCLK0 6
ZCLK0 8
ZCLK1 16
96XPCLK 16
EC_PCLK 29
PCLK_MINI 26
PCLK_PCM 23
PCLK_1394 22
PCLK_LAN 21
SIOPCLK 27
REFCLK0 8,15
REFCLK1 17
CLK_14M_SIO 25,27
UCLK48M 18
SMB_CK_CLK 10,13,17
SMB_CK_DAT 10,13,17
Place near to the Clock Outputs
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
R131
R132
R133
R134
49.9_1%_0603
49.9_1%_0603
49.9_1%_0603
49.9_1%_0603
2 2
XIN
6
14.318MHz
C180
10PF
XOUT
7
X1
C181
10PF
+3VS
R157
R159
R161
10K
10K
@10K
CLKFS0
CLKFS1
CLKFS2
CLKFS3
CLKFS4
R565
R164
R166
10K
10K
10K
FS4 FS3 FS2 FS1 FS0 CPU DDR ZCLK AGP PCI
1 1 0 0 0
1 1 0 0 1
0 0 1 1 1
1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
*
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
期五 十一月
100.0 133.0 80.0 66.7 33.3
100.0 100.0 80.0 66.7 33.3
100.0 133.3 80.0 66.7 33.3
Com pal Electronics, Inc.
E
2A
of
12 46¬P , 15, 2002
Page 12
5
4
3
2
1
Clock Buffer (DDR)
1:(ICS:ICS93722)
D D
C C
SMBDAT10,12,17
SMBCLK10,12,17
B B
+2.5VS
L14
HB-1M2012-121JT
1 2
SMB_CK_DAT
SMB_CK_CLK
C
12
+
CB92
10UF_10V_1206
U7
CLOCK BUFFER (DDR48)
3
VDD
FB_IN
12
VDD
23
VDD
10
AVDD
7
SCLK
22
SDATA
8
CLK_IN
20
FB_IN
9
NC
18
NC
21
NC
12
C182
0.1UF
L15
+2.5VS
SMB_CK_CLK10,12,17
SMB_CK_DAT10,12,17
HB-1M2012-121JT
1 2
4.7UF_10V_0805
FW DSDCLKO
CB93
SMB_CK_CLK
SMB_CK_DAT
+2.5VS
12
12
12
12
C184
0.1UF
D
R556
470
R169
@22
C191
@10PF
12
C186
0.01UF
C187
0.1UF
FWDSDCLKO7
R168
@22
C190
@10PF
C188
0.01UF
FW DSDCLKO
12
12
CLK0
CLK#0
CLK1
CLK#1
CLK2
CLK#2
CLK3
CLK#3
CLK4
CLK#4
CLK5
CLK#5
FB_OUT
GND
GND
GND
GND
2
1
4
5
13
14
17
16
24
25
26
27
FB_OUT
19
28
15
11
6
R_DDRCLK0
R_DDRCLK0#
R_DDRCLK1
R_DDRCLK1#
R_DDRCLK2
R_DDRCLK2#
R_DDRCLK3
R_DDRCLK3#
R_DDRCLK4# DDRCLK4#
R_DDRCLK5
R_DDRCLK5#
R167
22
12
C189
@10PF
4P2R_0
4P2R_0
4P2R_0
4P2R_0
4P2R_0
4P2R_0
RP62
RP58
RP59
RP60
RP61
RP63
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
2 3
1 4
1 4
2 3
DDRCLK0
DDRCLK0#
DDRCLK1
DDRCLK1#
DDRCLK2
DDRCLK2#
DDRCLK3
DDRCLK3#
DDRCLK4R_DDRCLK4
DDRCLK5
DDRCLK5#
DDRCLK0 10
DDRCLK0# 10
DDRCLK1 10
DDRCLK1# 10
DDRCLK2 10
DDRCLK2# 10
DDRCLK3 10
DDRCLK3# 10
DDRCLK4 10
DDRCLK4# 10
DDRCLK5 10
DDRCLK5# 10
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
Com pal Electronics, Inc.
期五 十一月
2A
of
13 46¬P , 15, 2002
1
Page 13
A
1 1
RED8
GREEN8
BLUE8
R172
75_1%_0603
HSYNC8
VSYNC8
@10K
CRTVDD
2 2
12
R175
12
75_1%_0603
12
12
R173
R176
@10K
+12VS
@@@
12
R174
75_1%_0603
12
1 2
R178 100K
C193
@22PF
Q10
2N7002
12
C194
@22PF
D
S
G
2
Q12
2N7002
13
S
G
2
L16
1 2
FCM2012C-800_0805
L17
1 2
FCM2012C-800_0805
L18
1 2
FCM2012C-800_0805
12
C195
@22PF
1 2
FBM-11-160808-121
D
1 2
13
FBM-11-160808-121
TV-Out Connector
B
+5VS
D8
DAN217
1
2
R_RED
R_GREEN
R_BLUE
12
C196
18PF
L19
L20
D9
DAN217
1
2
3
12
C199
68PF
3
12
C197
18PF
12
C200
68PF
D11
DAN217
1
CRTVDD
D10
DAN217
1
2
12
C198
18PF
D12
DAN217
1
POLYSWITCH_0.5A
3
C201
100PF
DAN217
D13
DDC_MD2
12
1
220PF
C202
C
D7
F1
2 1
RB411D
12
C192
0.1UF
MSEN#29,30
12
12
C203
220PF
Cable guide
PAD10
+3VS
PAD_3.2X2.2MM
Q13
2N7002
1
1 3
W=40mils
JP6
CRT-15P
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
1 3
D
S
G
2
PAD11
PAD_3.2X2.2MM
Q11
2N7002
D
2
1
R170
1K
S
G
1 2
R177 100K
PAD_3.2X2.2MM
D
R171
1K
CRTVDD
12
12
CRT Connector
DDCDATA 8
DDCCLK 8
+12VS
PAD12
1
E
2
3
2
3
2
3
3 3
1 2
C204 47PF
LUMA15
CRMA15
COMPS15
4 4
LUMA
CRMA
COMPS
R179
75_1%_0603
A
12
12
R180
75_1%_0603
12
R181
75_1%_0603
12
C206
150PF
12
1 2
FBM-11-160808-121
1 2
C205 47PF
1 2
FBM-11-160808-121
C207
150PF
L21
L22
12
C208
150PF
B
R_LUMA
R_CRMA
12
C209
270PF
12
S-Video
JP7
1
2
3
4
5
6
7
S CONN._suyin
C210
270PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
DDR EMI Clip
PAD5
1
PAD-4.5X3.5
H1
HOLEA
1
H11
HOLEA
1
FM1
1
1
1
CF1
CF11
H2
HOLEA
H12
HOLEA
1
1
PAD-4.5X3.5
H3
HOLEA
1
H13
HOLEA
1
1
CF2
CF12
1
FM2
1
PAD6
1
1
H14
HOLEA
CF3
CF13
H4
HOLEA
1
1
1
CF8
CF18
1
H9
HOLEA
H19
HOLEA
1
PAD9
1
PAD-4.5X3.5
H10
HOLEA
1
1
H22
H21
H20
HOLEA
HOLEA
1
FM6
1
1
1
CF9
CF10
1
Title
Size Docu ment Number Re v
Date: Sheet
H23
HOLEA
HOLEA
1
1
Compal E l e c t r onics, Inc.
SCHEM AT IC , M/ B LA- 1341
401210
,
星期五 十一
?15, 2002
E
14 46
of
2A
PAD7
1
PAD-4.5X3.5
H5
H6
HOLEA
HOLEA
1
1
H15
H16
HOLEA
HOLEA
1
FM3
CF4
CF14
1
CF5
1
1
CF15
1
1
1
PAD8
1
PAD-4.5X3.5
H8
H7
HOLEA
HOLEA
1
1
1
H17
H18
HOLEA
HOLEA
1
1
1
FM4
FM5
1
CF6
CF7
1
1
CF17
CF16
1
1
D
Page 14
10
DVDD DVDD+3VS
FB1
HB-1M2012-601JT_0805
H H
G G
10UF_10V_1206
+3VS
R191
@10K
VREF1
F F
E E
+3VS
R193
0
R195
C225
@0.1UF
10K
R196
360K
AS
D D
+3VS
R211
0
VREF2
R215
C232
@10K
0.1UF
C C
+12VS
LCDVDD
12
R220
B B
ENAVDD
13
2
1K
2
Q15
2N7002
22K
R222
100K
13
22K
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
10
+
VBD[0..11]6
VAD[0..11]6
Q17
DTC124EK
9
D_VDD
12
12
C211
0.1UF
C212
0.1UF
CB94
RP* PLACE CLOSE TO U45 PIN OUT
VBD0
RP64
VBD1
VBD2
VBD3
VBD4
RP65
VBD5
VBD6
VBD7
8P4R_33_0804
VBD8
VBD9
RP66
VBD10
VBD11
8P4R_33_0804
VAD0
VAD1
VAD2
VAD3
VAD4
VAD5
VAD6
VAD7
VAD8
VAD9
VAD10
VAD11
XI
RP67
RP68
8P4R_33_0804
RP69
8P4R_33_0804
D_VDD
PCIRST#
R210 5.6K
D1_CLK
D1_CLK#
D_VDD
D1_HSYNC
D1_VSYNC
D1_DE
8P4R_33_0804
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
D2_HSYNC
D2_VSYNC
D2_DE
D2_CLK
D2_CLK#
XTLO
VBCAD
VBHCLK
PID030
PID130
PID230
PID330
VBGCLK6
VBGCLK#6
VBHSYNC6
VBVSYNC6
VBDE6
VBCTL16
VAHSYNC6
VAVSYNC6
VADE6
VAGCLK6
VAGCLK#6
VBCAD6
VBHCLK6
PCIRST#16,21,22,23,24,26,28,29
+12VS
R218
100K
R221
150K
13
Q16
2
2N7002
9
8
8P4R_33_0804
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
R192 0
R194 0
R197 0
R200 0
R207 0
VSWING
D_VDD
R212 0
R213 0
LCDVDD
C238
0.1UF
0.047UF
8
VREF1
R_VAD0
R_VAD1
R_VAD2
R_VAD3
R_VAD4
R_VAD5
R_VAD6
R_VAD7
R_VAD8
R_VAD9
R_VAD10
R_VAD11
AS
R208 @0
C239
PID0
PID1
PID2
PID3
R_VBD0
R_VBD1
R_VBD2
R_VBD3
R_VBD4
R_VBD5
R_VBD6
R_VBD7
R_VBD8
R_VBD9
R_VBD10
R_VBD11
VBCTL_2
VREF2
R522
2K
C474
0.1UF
+
4.7UF_10V_0805
RP70
4 5
3 6
2 7
1 8
8P4R_10K_0804
CB106
68
69
70
71
72
73
77
78
79
80
81
82
76
74
66
65
63
62
61
85
86
87
88
89
90
94
95
96
97
98
99
101
102
104
105
93
91
52
53
107
108
106
121
58
36
110
109
111
2
U8
Q14
SI2302DS
13
7
12
LVDD1
LPLL_VDD
C213 @100P
1
2
D1_0
D1_1
LPLLCAP
LPLL_VDD
D1_2
D1_3
D1_4
D1_5
D1_6
D1_7
D1_8
D1_9
D1_10
D1_11
XCLK1
XCLK1#
H1
V1
DE1
FLD/STL1
VREF1
D2_0
D2_1
D2_2
D2_3
D2_4
D2_5
D2_6
D2_7
D2_8
D2_9
D2_10
D2_11
H2
V2
DE2
FLD/STL2
XCLK2
XCLK2#
XI/FIN
XO
SPD
SPC
AS
HPD
RESET#
VSWING
VsyncIN
HsyncIN
VREF2
+3VS
+
CB107
4.7UF_10V_0805
+3VS
7
LPLL_VDD
LVDD2
LVDD3
TVPLL1_VDD
D_VDD
DACVDD
VDDV
TVPLL_VDD
R183 @0
R182 0
R184 @0
32
54
60
37
LVDD7LVDD13LVDD19LVDD20LVDD26LVDD
LPLL_GND3LGND4LGND10LGND16LGND23LGND29LGND35DGND67DGND75DGND92DGND
VDDV
DAC_VDD
TVPLL_VDD55TVPLL_VCC
DVDD64DVDD83DVDD84DVDD
TVPLL_GND51DAC_GND39DAC_GND
100
R216
R217
@0
0
PID3
PID2
PID1
PID0
V5V
R185 @0
118
103
V5V
C/HSYNC
BCO/VSYNC
VsyncOUT
HsyncOUT
48
VBCTL0 6
6
CB95
1UF_10V_0603
P-OUT
DACA_0
DACA_1
DACA_2
DACA_3
DACB_0
DACB_1
DACB_2
DACB_3
LDC_0
LDC#_0
LDC_1
LDC#_1
LDC_2
LDC#_2
LDC_3
LDC#_3
LL1C
LL1C#
LDC_4
LDC#_4
LDC_5
LDC#_5
LDC_6
LDC#_6
LDC_7
LDC#_7
LL2C
LL2C#
ENAVDD
ENABKL
SDC
SDD
DC1
DD1
DC2
DD2
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
HPINT#
ISET
301LV_LQFP128
SW1
4
3
2
1
SW DIP-4
6
+5VS
+
59
49
50
41
43
45
47
40
42
44
46
33
34
30
31
27
28
21
22
24
25
17
18
14
15
11
12
8
9
5
6
127
128
113
112
115
114
117
116
123
124
125
126
56
57
122
38
120
119
1 2
L24
5
6
7
8
V5V
12
C214
0.1UF
R186 @10
VBCLK
TV_COMP
LUMA
CRMA
R520 0
V2COMP
R187 @75_1%_0603
R188 @75_1%_0603
R189 @75_1%_0603
R190 @75_1%_0603
TX0+
TX0TX1+
TX1TX2+
TX2-
TXACLK+
TXACLK-
TX4+
TX4TX5+
TX5TX6+
TX6-
TXBCLK+
TXBCLKENAVDD
ENABLK
R198 @0
R199 @0
R521 0
R201 @0
R202 @0
R203 @0
R206 0
R209 147_1%
CLOSE TO U38
0_0805
REFCLK08,12
5
+3VS
FB2
HB-1M2012-601JT_0805
C218
+3VS
@10PF
VBCLK 6
COMPS 14
LUMA 14
DACVDD
+3VS
CRMA 14
FB7
HB-1M2012-601JT_0805
CB101
1UF_10V_0603
+3VS
FB9
HB-1M2012-601JT_0805
ENABLK 29
DC2
DD2 DC2
1UF_10V_0603
4
+
CB96
1UF_10V_0603
FB4
HB-1M2012-601JT_0805
1UF_10V_0603
12
+
C479
1 2
CB103
+
12
C226
0.1UF
0.1UF
12
C215
0.1UF
C230
0.1UF
+
12
12
LVDD3
C227
0.1UF
V2COMP
DACVDD
12
C231
0.1UF
LVDD1
C216
0.1UF
CB98
12
C219
0.1UF
LCDVDD_C
3
12
PCIRST# 16,21,22,23,24,26,28,29
INTA#
D_VDD
PIRQA# 8,16,23
XI
R204
@10K
+3VS +3VS
R205
@10K
DC2
DD2
R214
@33
C235
10PF
+3VS
R219
RB751V
@0
10K
DISPOFF#
21
D14
BKOFF#29
R223
ENABLK
DVDD
R229 @0
5
U9
1
XIN/CLK
2
XOUT/MRA/FS0
3
SR1/MRA
4
VSS
R225 0
VDD
MODOUT
SSON
4
SR0
@P2010
8
R228 0
7
R230 0
6
5
R227 0
R231 @0
12
12
3
2
+3VS
LVDD2
C220
0.1UF
FB3
HB-1M2012-601JT_0805
+3VS
FB5
HB-1M2012-601JT_0805
+3VS
FB6
HB-1M2012-601JT_0805
+3VS
FB8
HB-1M2012-601JT_0805
TX0TX0+
TX1TX1+
TX4TX4+
TXBCLK-
TXBCLK+
PID3
PID1
PID0
1UF_10V_0603
1UF_10V_0603
1UF_10V_0603
JP8
1
21
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
14
34
15
35
16
36
17
37
18
38
19
39
20
40
JST B M 4 0B-SRDS
1UF_10V_0603
+
CB97
+
CB99
+
CB100
+
CB102
VDDV
12
C217
0.1UF
TVPLL1_VDD
12
C222
0.1UF
TVPLL_VDD
12
C224
0.1UF
LPLL_VDD
12
C229
0.1UF
DISPOFF#PID2
12
TX2TX2+
TXACLKTXACLK+
TX5TX5+
TX6TX6+
H
FBM-L11-201209-221
C485
68PF
FB10
LCDVDD
C240
0.1UF
FBM-L11-201209-221
10UF_10V_1206
12
+
CB105
CB104
1UF_10V_0603
XI
Compal El ectronics, Inc.
Title
C241
@27PF
SCHEMATIC, M/B LA-1341
Size Docum ent N um b er R e v
Custom
401210
星期五 十一月
Date: Sheet
2002
2
DD2
12
LCDVDD_C
12
C236
0.1UF
15 46, 15,
1
LCDVDD_C
DAC_BRIG 29
INVT_PWM 29
L23
12
of
1
B+
C237
0.1UF
2A
Page 15
A
+3VS
RP71
8P4R_8.2K_0804
PIRQB#
4 5
PIRQA#
3 6
PIRQC#
2 7
PIRQD#
1 8
4 4
3 3
2 2
1 1
8P4R_8.2K_0804
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
GNT#0
GNT#1
GNT#2
GNT#3
GNT#4
PERR#
SERR#
IRD Y#
TRDY#
DEVSEL#
STOP#
PLOCK#
FRAME#
4 5
3 6
2 7
1 8
R233 8.2K
RP74
8P4R_8.2K_0804
4 5
3 6
2 7
1 8
R234 8.2K
8P4R_4.7K_0804
8P4R_4.7K_0804
PERR#21,22,23,26
PAR
96XPCLK
+1.8VS
R238
150_1%_0603
R241
150_1%_0603
Analog Power supplies of Transzip function for 961A Chip.
RP73
RP75
4 5
3 6
2 7
1 8
4 5
3 6
2 7
1 8
RP76
R236 2.2K
R237 10
SZVREF_G
4.7UF_10V_0805
+3VS
+3VS
PERR#
A
+3VS
C247
0.1UF
C248
0.1UF
C246
10PF
CB109
SZVREF
+3VS
+1.8VS
R239
@4.7K
R242
@4.7K
L26
1 2
HB-1M2012-121JT
ZCLK112
ZSTB08
ZSTB0#8
ZSTB18
ZSTB1#8
ZUREQ8
ZDREQ8
C251
0.1UF
R240
@4.7K
R243
@4.7K
ZSTB0
ZSTB1
ZSTB0#
ZSTB1#
GNT# [0 ..4 ]21,22,23,26
CBE#[0..3]21,22,23,26
C252
0.01UF
REQ#[0..4]21,22,23,26
ZAD[0..15]8
PIRQA#8,15,23
PIRQB#21,23,26
PIRQC#22
PIRQD#26
DEVSEL#21,22,23,26
ZCLK1
SZ4XAVDD
SZ4XAVSS
FRAME#21,22,23,26
96XPCLK12
PCIRST-8,20,29
IRDY#21,22,23,26
TRDY#21,22,23,26
STOP#21,22,23,26
SERR#21,23,26
PAR21,22,23,26
B
AD[0..31]21,22,23,26
R235 @10
SZ4XAVDD
SZ4XAVSS
B
REQ#4
REQ#3
REQ#2
REQ#1
REQ#0
GNT#4
GNT#3
GNT#2
GNT#1
GNT#0
CBE#3
CBE#2
CBE#1
CBE#0
PIRQA#
PIRQB#
PIRQC#
PIRQD#
FRAME#
IRD Y#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
96XPCLK
PCIRST-
C245
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZUREQ
ZDREQ
SVDDZCMP
SZCMP_N
SZCMP_P
SVSSZCMP
SZVREF
@10PF
V20
N19
N20
K20
K19
N16
N17
R19
N18
R18
P18
U20
U19
R20
P20
G1
G2
G3
M4
G4
M3
M1
M2
M5
T20
T19
F1
F2
E1
H5
F3
H3
H4
K3
P1
R4
E3
F4
E2
N4
N3
N1
N2
Y2
C3
AD[0..31]
PREQ#4
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PGNT#4
PGNT#3
PGNT#2
PGNT#1
PGNT#0
C/BE#3
C/BE#2
C/BE#1
C/BE#0
INT#A
INT#B
INT#C
INT#D
FRAME#
IRDY#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
PCICLK
PCIRST#
ZCLK
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZUREQ
ZDREQ
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
VZREF
ZVSSREF
C
AD31
AD28
AD30
AD27
AD29
AD31J5AD30J4AD29H2AD28H1AD27J3AD26K4AD25J2AD24J1AD23K5AD22K2AD21L3AD20K1AD19L1AD18L4AD17L5AD16L2AD15N5AD14P2AD13P3AD12P4AD11R2AD10
AD20
AD21
AD23
AD25
AD26
AD24
AD22
AD16
AD19
AD18
AD17
PCI
961-1
MULTIO
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
J20
M18
M19
ZAD1
ZAD0
+1.8VS
CB108
4.7UF_10V_0805
L16
L20
M17
M16
M20
ZAD4
ZAD5
ZAD6
ZAD3
ZAD2
L25
1 2
HB-1M2012-121JT
L18
ZAD7
K18
ZAD8
K17
ZAD9
C
ZAD10
K16
H20
ZAD11
C249
0.1UF
J18
H19
H18
ZAD14
ZAD12
ZAD13
ZAD15
AD10
AD14
AD13
AD11
AD15
AD12
R3
R244 56.2_1%_0603
C250
0.01UF
R245 56.2_1%_0603
AD6
AD1
AD2
AD4
AD3
AD8
AD7
AD5
AD9
V1
AD9R1AD8T1AD7P5AD6T2AD5U1AD4U2AD3T3AD2R5AD1U3AD0
IDEAVDD
IDEAVSS
ICHRDYA
IDREQA
IIRQA
CBLIDA
IIOR#A
IIOW#A
IDACK#A
IDSAA2
IDSAA1
IDSAA0
IDECSA#1
IDECSA#0
ICHRDYB
IDREQB
IIRQB
CBLIDB
IIOR#B
IIOW#B
IDACK#B
IDSAB2
IDSAB1
IDSAB0
IDECSB#1
IDECSB#0
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15
D
U10A
Y3
Y4
W10
V10
Y11
U12
V11
Y9
Y10
T11
U11
W11
T12
V12
W17
Y17
T16
U17
T14
W16
V16
Y18
T15
V17
U16
W18
U10
V9
W8
T9
Y7
V7
Y6
Y5
W6
U8
W7
V8
U9
Y8
T10
W9
Y16
V15
U14
W14
V13
T13
Y13
Y12
W12
W13
U13
Y14
V14
W15
Y15
U15
SIS961
D
IDESAA2
IDESAA1
IDESAA0
IDECS#A1
IDECS#A0
IDESAB2
IDESAB1
IDESAB0
IDECS#B1
IDECS#B0
IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA4
IDEDA5
IDEDA6
IDEDA7
IDEDA8
IDEDA9
IDEDA10
IDEDA11
IDEDA12
IDEDA13
IDEDA14
IDEDA15
IDEDB0
IDEDB1
IDEDB2
IDEDB3
IDEDB4
IDEDB5
IDEDB6
IDEDB7
IDEDB8
IDEDB9
IDED B 1 0
IDED B 1 1
IDED B 1 2
IDED B 1 3
IDED B 1 4
IDED B 1 5
Put near 961A Chip.
PCIRST-
Title
Size D o cument Numbe r R e v
Dat e : Sheet
E
ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIOR-A
IDEIOW-A
IDACK-A
IDESAA[0..2]
IDECS#A[0..1]
ICHRDYB
IDEREQB
IDEIRQB
CBLIDB
IDEIOR-B
IDEIOW-B
IDACK-B
IDESAB[0..2]
IDECS#B[0..1]
+3VALW
1
147
U11A
74LVC125
2 3
Com pal Electronics, Inc.
SCHEMATIC, M/B LA-1341
401210
期五 十一月
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AD0
IDE
SVDDZCMP
SZCMP_N
SZCMP_P
SVSSZCMP
E
C242
0.01UF
IDEDA[0..15] 20
IDEDB[0..15] 20
C243
0.1UF
ICHRDYA 20
IDEREQA 20
IDEIRQA 20
CBLIDA 20
IDEIOR#A 20
IDEIOW#A 20
IDACK#A 20
IDESAA[0..2] 20
IDECS#A[0..1] 20
ICHRDYB 20
IDEREQB 20
IDEIRQB 20
CBLIDB 20
IDEIOR#B 20
IDEIOW#B 20
IDACK#B 20
IDESAB[0..2] 20
IDECS#B[0..1] 20
PCIRST# 15,21,22,23,24,26,28,29
E
+1.8VS
2A
of
16 46¬P , 15, 2002
Page 16
Programable on-die pull-high strength for CPU_S:
( Infinite, 150, 110, 56 Ohm)
4 4
PWRGD8,32
3 3
AC97_SDOUT18,25,26
AC97_SYNC25,26
AC97_RST#25,26
REFCLK112
2 2
1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SPKR18,25
PWRBTN_OUT#29
SBPME#30
PSON#29,32
RSM_RST8,29
A
U10B
LAD027,29
LAD127,29
LAD227,29
LAD327,29
C256
@0.1UF
R256
33
INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERRSTPCLK#
CPUSLP#
LFRAME#
LDRQ#
SIRQ
BATOK
12
SDATI0
SDATI1
AC_RESET#
BIT_CLK
REFCLK1
SENTEST
SPKR
PWRBTN#
PME#
PSON#
AUXOK
ACPILED
LAD0
LAD1
LAD2
LAD3
OSC32KHI
+RTCVCC
C258
@10PF
AC'97 Pull-Down:
OSC32KHO
INIT#3
A20M#3
SMI#3
INTR3
NMI3
IGNNE#3
FERR#3
STPCLK#3
CPUSLP#3
LFRAME#27,29
LDRQ#027,29
SIRQ23,27,29
C257
10PF
BIT_CLK
AC97_SDIN025
AC97_SDIN126
AC97_BCLK25,26
A
R259
@33
SDATI0
SDATI1
12
C259
0.1UF
T18
INIT#
P16
A20M#
R17
SMI#
R16
INTR
Y20
NMI
U18
IGNNE#
T17
FERR#
W20
STPCLK#
V19
CPUSLP#
Y19
APICCK
V18
APICD0
W19
APTCD1
V5
LAD0
T7
LAD1
U6
LAD2
W5
LAD3
W4
LFRAME#
U7
LDRQ#
V6
SIRQ
D3
BATOK
D1
PWROK
C2
OSC32KHI
D2
OSC32KHO
C1
RTCVDD
E4
RTCVSS
A2
AC_SDIN0
D5
AC_SDIN1
W2
AC_SDOUT
T5
AC_SYNC
D6
AC_RESET#
Y1
AC_BIT_CLK
W3
OSCI
G5
ENTEST
V3
SPK
A14
PWRBTN#
B14
PME#
D14
PSON#
A3
AUXOK
A15
ACPILED
/Geyserville
SIS961
R277 100K
R280 100K
B
CPU_S
LPC
MII
RTC
GPIO
AC97
*GPIO12/CPUSTP#
*GPIO13/DPRSLPVR
ACPI
*GPO15/VR_HILO#
*GPO17/VGATEM#
961-2
B
MIICLK25M
MIITXCLK
MIITXEN
MIITXD0
MIITXD1
MIITXD2
MIITXD3
MIIRXCLK
MIIRXDV
MIIRXER
MIIRXD0
MIIRXD1
MIIRXD2
MIIRXD3
MIICOL
MIICRS
MIIMDC
MIIMDIO
MIIAVDD
MIIAVSS
GPIO0
GPIO1/LDRQ1#
GPIO2/THERM#
GPIO3/EXTSMI#
GPIO4/CLKRUN#
GPIO5/PREQ5#
GPIO6/PGNT5#
*GPIO7
GPI8/RING
GPI9/AC_SDIN2
GPI10/AC_SDIN3
*GPIO11
*GPIO14
*GPO16/LO_HI#
*GPO18/PMCLK
*GPIO19
*GPIO20
A8
A6
B6
E8
D7
C6
B4
A7
C7
C8
D8
A5
B5
A4
B7
E9
C5
R542 4.7K
E7
B9
B8
V2
T8
AC_VID2
T4
EXT_SMI#
T6
W1
GPIO5
U5
U4
C4
C14
E6
B3
F5
D4
B1
E5
E13
RB751V D26
A16
D13
B15
GPIO19
A1
2N7002
GPIO20 SMBDAT
B2
Q21
2N7002
1 3
+3VS
R551
10K
MIIAVSS
RING
GPIO14
GPIO18
Q20
2
2
AC_VID0
AC_VID1
2 1
AC_VID3
2 1
AC_VID4
GPIO9
GPIO10
GPIO11
PM_STPCPU#
21
1 3
2
Q49
3904
3 1
PM_STPCPU#
MIIAVDD
2 1
D19
RB751V
D20
RB751V
+5VS
C
D55
RB751V
DPRSLPVR
VR_HILO#
LO_HI#
VGATMBM
SMBCLK
H_DPSLP# 3
C
I
+3VALW
DPRSLPVR
CHGRTC
W=30mils
R247
200_0603
1 2
W=30mils
21
D17
RB751V
EC_THERM# 29
EXTSMI# 29
PM_BATLOW# 29
SCI# 29
SWI# 29
AC_IN 29
LID_OUT# 29
PM_STPCPU# 12,39
FLASH# 30
PM_CPUPERF# 3
IDERST# 20
SMBCLK 10,12,13
SMBDAT 10,12,13
+3VS
1 2
10K
SMBDAT
R274 10K
SMBCLK
R276 10K
VR_HILO#
GPIO19
GPIO20
R282
W=30mils
+RTCVCC
D15
2 1
R250
1 2
12
R283
R566
R567
RB751V
K
470
J
BATT1
LFRAME#
10K
10K
10K
R284
+RTCVCC
RTCBATT
4.7K
12
C253
0.1UF
+3VS
+3VALW
W=30mils
12
+
CB110
22UF_10V_1206
AC_VID3
DPRSLPVR
AC_VID4
VR_HILO#
AC_VID0
AC_VID1
AC_VID4
D
MMBT3906
Q18
R246 10K
2
1 2
+3VALW
3 1
W=30mils
R248
47K
1 2
R251
15K
1 2
SIS AP note
+3VALW
U41
1
5
2
3 4
7SH08
R554
@0
U4
1
2
3 4
@7SH08
R540
0
Put closed to 961A CHIP
OSC32KHO
16
OSC32KHI
C260
15PF
NEED NOT to place
close to 961A
LAD3
4 5
LAD2
3 6
LAD1
2 7
LAD0
1 8
8P4R_10K_0804
LDRQ#
SIRQ
SENTEST
R285
10K
R286
10K
R289
10K
D
E
+RTCVCC
Q19
2
3904
3 1
+3VALW
5
32.768KHZ
RP77
R273 10K
R275 10K
R278
ATE request
J6
1 2
C254
1UF_10V_0603
Decoupling Capacitor
Place close to 961A
+3VALW
PM_DPRSLPVR 39
PM_GMUXSEL 39
R260
10M_0603
X3
C261
20PF
+3VS
47
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
@1N4148
GPIO10
GPIO pins pull HIGH
NEED NOT to place
close to 961A
PM_STPCPU#
GPIO9
Com pal Electronics, Inc.
期五 十一月
D18
R254
@1K
AC_VID3
AC_VID2
GPIO5
EXT_SMI#
GPIO14
GPIO18
GPIO11
RING
PWRBTN#
PME#
VGATMBM
D16
1N4148
R249
10K
C255
0.01UF
21
R258 4.7K
R287
R262 10K
R263 10K
R257 10K
R264 10K
R266
R268 10K
R270 10K
R271 10K
R279 10K
R288 10K
R272
R541
E
21
R255
100K
10K
10K
@10K
10K
CB111
+
10UF_10V_1206
AUXOK
+3VS
+3VALW
17 46¬P , 15, 2002
BATOK
2A
of
Page 17
A
B
C
D
E
UCLK48M
UV0+
UV0UV1+
UV1UV2+
UV2UV3+
UV3UV4+
UV4UV5+
UV5-
C264
0.1UF
OC0OC1OC2OC3OC4OC5-
OC0#31
OC2#31
OC4#31
12
R290
C263
CB113
4.7UF_10V_0805
OC1OC5OC3-
UCLK48M12
@33
@10PF
CB114
1UF_10V_0603
+3VUSB
RP84
4 5
3 6
2 7
1 8
8P4R-10K_0804
UCLK48M
RP78
8P4R-33_0804
1 8
RP80
8P4R-33_0804
18
27
36
45
2 7
3 6
4 5
18
27
36
45
1 8
2 7
3 6
4 5
USB0_D+31
USB0_D-31
USB2_D+31
4 4
3 3
USB2_D-31
8P4R-15K_0804
USB4_D+31
USB4_D-31
USB5_D+28
USB5_D-28
8P4R-15K_0804
8P4R-15K_0804
RP83
RP81
RP79
4 5
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
1 8
CP2
CP1
8P4C-47P
8P4C-47P
UV1+
UV1UV3+
UV3-
UV4+
UV4-
UV0+
UV0-
UV2+
UV2-
UV5+
UV5-
+5VALW
U10C
V4
USBCLK48M
B18
UV0+/RSDP0
C18
UV0-/RSDM0
E14
UV1+/RSDP1
D15
UV1-/RSDM1
E16
UV2+/RSDP2
E15
UV2-/RSDM2
D18
UV3+/RSDP3
D19
UV3-/RSDM3
E18
UV4+/RSDP4
F18
UV4-/RSDM4
G18
UV5+/RSDP5
G19
UV5-/RSDM5
G20
OC0#
J16
OC1#
H17
OC2#
G17
OC3#
H16
OC4#
G16
OC5#
E17
USBVDD
D17
USBVDD
D16
USBVDD
F17
USBVDD
B19
USBVSS
F19
USBVSS
B17
USBVSS
E19
USBVSS
A12
D0
B12
D1
C12
D2
D12
D3
E12
D4
A13
D5
B13
D6
C13
D7
USB
D11
CTL0
C11
CYL1
SIS961
R544
4.7K
961-3
SCLK
LINKON
LREQ
LPS
CPIO21
CPIO22
CPIO23
CPIO24
OSC12MHI
OSC12MHO
USBREF
USBPVDD
USBPVSS
IVDD_AUX
IVDD_AUX
IPBREST#
TDFRAME
RDFRAME
IPB_RDCLK
IPB_TDCLK
IPB_OUT0
IPB_OUT1
IPB_IN0
IPB_IN1
USBREFAVDD
A9
NC
E11
C19
A19
A20
F20
D20
E20
C20
B16
A17
F16
A18
C15
C16
C17
B11
D10
A11
E10
D9
B10
A10
C10
C9
B20
+3VALW+3VUSB
R543
4.7K
USBREF USBREF
USBPVDD
USBPVSS
+1.8VALW
+3VUSB
R534
433_1%_0603
USBPVDD
USBPVSS
C477
0.1UF
L52
1 2
HB-1M2012-121JT
C478
0.01UF
+3VUSB
CB184
4.7UF_10V_0805
2 2
@10k
@10k
@15K
@15K
+3VS
01
SPKR( LPC addr mapping)
SDATO( PCICLK PLL) disable
OC2-( SB debug mode) enable
OC5-( Trap mode)
B
enable
PCI AD ROM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
enabledisable
disable
C
SB Hardware Trap
R292
SPKR17,25
AC97_SDOUT17,25,26
1 1
SPKR
OC2OC5-
R293
R294
R295
SDATO
A
Default
0
0
1
1
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
D
Dat e : Sheet
Com pal Electronics, Inc.
期五 十一月
2A
of
18 46¬P , 15, 2002
E
Page 18
5
4
3
2
1
D D
C C
B B
+3VS
+1.8VS
CB119
10UF_10V_1206
CB122
10UF_10V_1206
C271
0.1UF
C272
0.1UF
C275
0.1UF
C278
0.1UF
C280
0.1UF
CB120
1UF_10V_0603
CB123
1UF_10V_0603
Put under 96X solder side
+3VS
C274
0.1UF
C276
0.1UF
C279
0.1UF
C281
0.1UF
+1.8VS
CB115
10UF_10V_1206
CB121
1UF_10V_0603
C267
0.1UF
+CPU_CORE
+3VALW
+1.8VALW
+1.8VALW
+CPU_CORE
C269
0.1UF
C270
0.1UF
C273
0.1UF
C277
0.1UF
CB125
10UF_10V_1206
C282
0.1UF
CB116
1UF_10V_0603
C266
0.1UF
CB124
1UF_10V_0603
C268
0.1UF
+3VALW
CB117
10UF_10V_1206
CB118
1UF_10V_0603
+3VALW
C265
0.1UF
+1.8VALW
+CPU_CORE
+3VS
+1.8VS
G15
L15
L17
N15
P17
K15
H15
M15
R10
R14
P15
R15
R11
R13
R12
F12
F10
F11
F14
F15
F13
J15
J17
G6
M6
L6
R6
H6
K6
P6
R7
R9
J6
N6
R8
F9
F7
F8
U10D
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
PVDDZ
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VTT
VTT
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
PVDD
PVDD
PVDD
PVDD
IVDD_AUX
IVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
PVDD_AUX
PVDD_AUX
SIS961
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
H8
H9
H10
H11
H12
H13
J8
J9
J10
J11
J12
K8
K9
K10
K11
L8
L9
L10
L11
M8
M9
M10
M11
N8
N9
N10
N11
N12
N13
J13
J19
K12
K13
L12
L13
L19
M12
M13
P19
961-4
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
401210
Dat e : Sheet
Com pal Electronics, Inc.
, 15, 2002
星期五 十一月
2A
of
19
1
46
Page 19
5
D56
IDERST#17
D D
IDESAB[0..2]16
IDECS#B[0..1]16
5
IDEDA[0..15]
IDESAA[0..2]
IDECS-A[0..1]
IDEREQA16
IDEIOW#A16
IDEIOR#A16
ICHRDYA16
IDESAB[0..2]
IDECS-B[0..1]
IDEREQB16
IDEIOW#B16
IDEIOR#B16
ICHRDYB16
IDACK#B16
IDEIRQB16
IDEREQB
IDEIOW-B
IDEIOR-B
ICHRDYB
IDACK-B
IDEIRQB
IDEDA[0..15]16
IDESAA[0..2]16
IDECS#A[0..1]16
C C
B B
A A
RB751V
PCIRST-8,16,29
IDACK#A16
IDEIRQA16
R315 82_1%_0603
R316 22
R317 10
R318 10
R319 22
R320 82_1%_0603
R321
10K
IDEDB[0..15]16
4
+5VS
R548
10K
21
R301
R302
R304
R305
R306
R308 82_1%_0603
R309
10K
IDEDB[0..15]
4
+5VS
147
1
2
4
5
82_1%_0603
22
10
10
22
+3VS
U12A
74HCT08
U12B
74HCT08
R314
4.7K
R322
5.6K
3
6
+3VS
R310
5.6K
SD_DREQ
SD_SIOW#
SD_SIOR#
SD_SIORDY
SD_DACK#
SD_IRQ15
HD_IDERST#
R300
4.7K
PD_DREQ#
PD_IOW#
PD_IOR#
PD_IORDY
PD_DACK#
PD_IRQA
IDEDB5
4 5
IDEDB9
3 6
IDEDB4
2 7
IDEDB11
1 8
8P4R_10_0804
4 5
IDEDB15
3 6
IDEDB1
2 7
IDEDB14 SD_D14
1 8
8P4R_10_0804
IDEDB6
4 5
IDEDB10
3 6
IDEDB8
2 7
IDEDB7
1 8
8P4R_10_0804
IDEDB3
4 5
IDEDB12
3 6
2 7
IDEDB13
1 8
8P4R_10_0804
3
9
10
4 5
3 6
2 7
1 8
8P4R_33_0804
R296
4 5
3 6
2 7
1 8
8P4R_10_0804
4 5
3 6
2 7
1 8
8P4R_10_0804
4 5
3 6
2 7
1 8
8P4R_10_0804
4 5
3 6
2 7
1 8
8P4R_10_0804
HDD_LED#
CDLED#
RP85
RP86
RP87
RP88
RP89
+5VS
IDESAA0 PD_A0
IDESAA1
IDESAA2 PD_A2
IDECS-A1
IDECS-A0
IDEDA1
IDEDA14
IDEDA0
IDEDA15
IDEDA11
IDEDA4
IDEDA10
IDEDA5
IDEDA9 PD_D9
IDEDA6 PD_D6
IDEDA8 PD_D8
IDEDA7 PD_D7
IDEDA3 PD_D3
IDEDA12 PD_D12
IDEDA2 PD_D2
IDEDA13 PD_D13
ACT_LED#25
SD_D5
SD_D9
SD_D4
SD_D11
SD_D0IDEDB0
SD_D15
SD_D1
SD_D6
SD_D10
SD_D8
SD_D7
8P4R_33_0804
R312
3
RP90
4 5
3 6
2 7
1 8
SD_SBA0
SD_SBA1
SD_SCS3#
SD_SCS1#
33
U12C
8
74HCT08
IDESAB0
IDESAB1
IDESAB2 SD_SBA2
IDECS#B1
IDECS#B0
RP91
RP92
RP93
RP94
SD_D3
SD_D12
SD_D2IDEDB2
SD_D13
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
33
PD_A1
PD_CS#3
PD_D1
PD_D14
PD_D0
PD_D15
PD_D11
PD_D4
PD_D10
PD_D5
2
PD_CS#1CD_IDERST#
+5VS
R313 10K
CDLED#
12
R324 10K
2
1 2
R298 10K
1 2
R311 10K
+5V_IDE
+5VS
CB130
+5V_IDE trace to CONN W=80mils
12
10UF_10V_1206
12
INT_CD_L
CD_IDERST#
SD_D7
SD_D6 SD_D10
SD_D5
SD_D4 SD_D12
SD_D3
SD_D2
SD_D1
SD_D0
SD_SIOW#
SD_SIORDY
SD_IRQ15
SD_SBA1
SD_SBA0
SD_SCS1#
R553
+5V_IDE
@0
+5V_IDE
SD_CSEL
R326
470
1 2
1
HDD/CD-ROM Module
12
PD_D8
C285
0.1UF
12
1
12
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
PD_D[0..15]
CB127
1UF_10V_0603
PD_CSEL
1 2
R303 470
1 2
PD_A2
PD_CS#3
+5VS
12
C286
1000PF
CDROM_R 25CDROM_L25
R323
1 2
+5V_IDE
+5V_IDE
+5V_IDE
W=80mils
CBLIDA 16
R307 @100K
+5VS
20 46,
PD_D[0..15]
+5VS
HD_IDERST#
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0
PD_DREQ#
PD_IOW#
PD_IOR#
PD_IORDY
PD_DACK#
PD_IRQA
PD_A1
PD_A0
PD_CS#1
HDD_LED#
+5VS
12
C283
1000PF
12
CB126
10UF_10V_1206
Place component's closely IDE CONN.
JP9
2
112
4
334
6
556
8
778
10
9910
12
111112
14
131314
16
151516
18
171718
20
191920
22
212122
24
232324
26
252526
28
272728
30
292930
32
313132
34
333334
36
353536
38
373738
40
393940
42
414142
44
434344
HDD CONN
W=80mils
12
CB128
10UF_10V_1206
Place component's closely IDE CONN.
JP10
12
CD-ROM CONN.
Title
SCHEM AT IC , M/ B LA- 1341
Size Docu ment Number Re v
Date: Sheet
12
CB129
1UF_10V_0603
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
Compal E l e c t r onics, Inc.
401210
星期五 十一
?15, 2002
AGND
INT_CD_R
SD_D8
SD_D9
SD_D11
SD_D13
SD_D14
SD_D15
SD_DREQ
SD_SIOR#
SD_DACK#
SD_SBA2
SD_SCS3#
W=80mils
C287 0.1UF
1 2
R325 100K
12
C284
0.1UF
CBLIDB 16
@100K
+5VS
of
+5VS
2A
Page 20
5
4
3
2
1
+3VLAN
R327
51
31
Q24
2
2SB1197K
VDD2.5
+VDD2.5
C293
CB131
+
0.1UF
LAN_PME#22,23,26,29,30
12
12
R328
51
12
C305
0.1UF
12
R330
51
PIRQB#16,23,26
PCIRST#15,16,22,23,24,26,28,29
DEV_RST#23,24
PCLK_LAN12
12
R331
LAN_DIS#30
51
12
C308
0.1UF
1 2
1 2
GNT#316
REQ#316
CLK_PCI_LAN
+3VLAN
F
12
C311
AD17
CBE#316,22,23,26
1 2
0.1UF
AD[0..31]16,22,23,26
AD[0..3 1 ]
R338
LAN_TD-
LAN_TD+
R335@0
R3360
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
+3VLAN
LAN_RDLAN_RD+
100
LAN_DIS#
RB751V
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
CBE#216,22,23,26
FRAME#16,22,23,26
IRDY#16,22,23,26
TRDY#16,22,23,26
DEVSEL#16,22,23,26
STOP#16,22,23,26
PERR#16,22,23,26
SERR#16,23,26
CBE#116,22,23,26
R329 4.7K
D57
INTAB
RSTB
CLK
GNTB
REQB
AD31
AD30
GND
AD29
VDD
AD28
AD27
AD26
AD25
AD24
VDD25
VDD
CBE3B
IDSEL
AD23
ACTIVITY#
LED080LED1
12
21
LINK10_100#
78
79
NC
74
72
75
76
77
73
GND
LED2
TXD+
AVDD
AVDD25
ISOLATEB
12
R332
5.6K_1%_0603
68
65
70
69
63
67
66
62
71
TXD-
AVDD
RXIN+
AVDD25
60
X161X2
GND
GND
RTT264RTT3
RXIN-
RTSET
AD221GND2AD213AD204AD195VDD6VDD257AD188AD179AD1610CBE2B11FRAMEB12IRDYB13TRDYB14DEVSELB15GND16STOPB17PERRB18SERRB19PAR20CBE1B21VDD22AD1523AD1424AD1325AD1226AD1127AD1028AD929AD8
AD22
AD18
AD20
AD16
AD17
AD21
AD19
C/BE#2
TRDY#
SERR#
IRDY#
STOP#
PERR#
FRAME#
PAR
DEVSEL#
PAR16,22,23,26
59
58
AVDD
AVDD25
AD15
56
57
GND
PMEB
AD14
AD13
12
12
C294
0.1UF
LAN_X1
LAN_X2
VCTRL
55
VCTRL
AD12
AD11
+3VLAN
C312
0.1UF
F
52
NC54NC53NC
AD9
AD10
51
30
AD8
VDD25
AUX
EECS
EESK
EEDI
EEDO
GND
VDD25
VDD
VDD25
VDD
CBE0B
GND
12
C295
0.1UF
U13
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
RTL8100-L
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
12
C296
0.1UF
AUX
LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
12
C297
0.1UF
+3VLAN
12
R334
5.6K
12
C298
0.1UF
1
2
3
4
CS
SK
DI
DO
12
C299
0.1UF
U14
VCC
NC
NC
GND
9346
+3VLAN
(LAN_100LINK)
(LAN_10LINK)
+3VALW
F
1 2
L27 4.7UH_80mA
4.7UF_10V_0805
LAN_X1 LAN_X2
12
C306
22PF
8
7
6
5
CBE#0 16,22,23,26
CB134
4.7UF_10V_0805
ACTIVITY#
LINK10_100#
R341
R342
+VDD2.5 +3VLAN
CB133
X4
25 MHz
+3VLAN
12
C309
0.1UF
LED2_YELN 26
LED1_GRNN 26
200_0603
12
200_0603
12
G
1 2
L28 4.7UH_80mA
4.7UF_10V_0805
12
C307
22PF
LED2_YELP 26
LED1_GRNP 26
+VDD2.5
12
C288
0.1UF
12
C289
1000PF
12
12
C291
1000PF
12
C292
0.1UF
C290
0.1UF
CB132
+3VLAN
12
12
12
12
C300
0.1UF
C301
1000PF
C302
0.1UF
C303
1000PF
12
C304
0.1UF
+3VALW+3VLAN
RJ45_RX-26
RJ45_RX+26
U15
LAN_RD+
LAN_RD-
LAN_TD+
LAN_TD-
1
RD+
2
RD-
3
CT
6
CT
7
TD+
TD-8TX-
RX+
16
15
RX-
14
CT
11
CT
10
TX+
9
Pulse-H0022
12
C314
12
R340
75 1%_0603
RJ45_GND 26
1 2
RJ45_TX-26
RJ45_TX+26
C313
12
R339
75 1%_0603
0.1UF
@1000PF_1206_2KV
VCTRL
D D
22UF_10V_1206
C C
CLK_PCI_LAN
12
R337
@22
12
C310
@10PF
B B
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
SCHEM AT IC , M/ B LA- 1341
Size Docu ment Number Re v
Date: Sheet
Compal E l e c t r onics, Inc.
401210
星期五 十一
?15, 2002
1
21 46,
2A
of
Page 21
A
B
C
D
E
IEEE1394 Controller/PHY
+3VS
L29
HB-1M2012-121JT
CB135
AD[0..31]16,21,23,26
4.7UF_10V_0805
12
R350
@33
12
C336
@22PF
22UF_10V_1206
AD[0..3 1 ]
6.34K_1%_06003
1 1
2 2
PCLK_1394
3 3
4 4
R348
XTPB0XTPB0+
XTPA0XTPA0+
XTPBIAS0
CB136
PCLK_139412
+3VA
CB137
1UF_10V_0603
12
C323
0.1UF
L30
1
8
2
7
3
6
4 5
IEEE1394-CMF
+3VS
12
C324
0.1UF
C_XTPA0+
C_XTPA0C_XTPB0+
C_XTPB0-
1394_FOX
JP11
4
3
2
1
X5
12
12
12
12
C315
0.1UF
Enable I2C EEPROM
R345 2K
C328
0.1UF
57
56
58
59
61
60
XI
XO
VDDATX0
GNDATX0
PHYRESET
LINKON/TSIJMP
AD25
AD24
CBE3#
IDSEL
AD23
AD22
106
107
108
109
110
111
AD24
AD23
AD22
AD25
55
LREQ/TSOJMP
VSS3
112
C329
0.1UF
49
53
48
51
52
50
D5
PVDD2
PGND2
D7/PC2JMP
D6/CMCJMP
CTL0/PC0JMP54CTL1/PC1JMP
AD21
VDD2
VDDC1
VSSC1
AD20
AD19
AD18
AD17
113
114
115
116
117
118
119
120
AD19
AD17
AD18
AD20
AD21
C330
0.1UF
39
40
43
41
D044D145D246D347D4
SCLK
PVDD1
PGND1
MODE142MODE0
LPS/CMC
PME#
VSSC2
VDDC2
VSS9
VDD6
SCL/EECK
SDA/EEDI
EEDO
EECS
VSS8
RAMVSS
RAMVDD
VDD5
VSS7
CBE0#
AD10
AD11
AD12
VSS6
VDD4
AD13
AD14
AD15
CBE1#
PERR#
VSS5
AD16
VSS4
121
AD16
STOP#
CBE2#
FRAME#
IRDY#
VDD3
TRDY#
DEVSEL#
128
122
123
124
125
126
127
R346 0_0603
U16
38
37
36
35
34
33
32
31
30
29
28
AD0
27
AD1
26
25
24
23
AD2
22
AD3
21
AD4
20
19
AD5
18
AD6
17
AD7
16
15
14
AD8
13
AD9
12
11
10
9
8
7
6
5
4
3
PAR
2
1
VT6306
+3VS
+3VS
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
STOP# 16,21,23,26
DEVSEL# 16,21,23,26
TRDY# 16,21,23,26
IRDY# 16,21,23,26
FRAME# 16,21,23,26
CBE#2 16,21,23,26
10PF
C325
24.576MHz
R343
C326
1M_0603
10PF
C327
0.1UF
62
64
63
XCPS
65
VDDARX0
66
XREXT
67
NC
68
GNDARX1
69
GNDATX1
70
XTPB0M
71
XTPB0P
72
XTPA0M
73
XTPA0P
74
XTPBIAS0
75
VDDARX1
76
VDDATX1
77
XTPB1M
78
XTPB1P
79
XTPA1M
80
XTPA1P
81
XTPBIAS1
82
GNDARX2
83
GNDATX2
84
XTPB2M
85
XTPB2P
86
XTPA2M
87
XTPA2P
88
XTPBIAS2
89
VDDARX2
90
VDDATX2
91
INTA#
92
PCIRST#
93
PCICLK
94
VSS1
95
GNT#
96
REQ#
97
AD31
98
AD30
99
AD29
100
AD28
101
AD27
102
VDD1
CBE#316,21,23,26
AD16
GNDARX0
VSS2
103
1 2
R356 100
AD26
104
105
AD26
+3VS
R344
1K
R347
1K
C334
47PF
PIRQC#16
PCIRST#15,16,21,23,24,26,28,29
GNT#016
REQ#016
+3VA
C331
0.1UF
C332
0.1UF
C333
0.1UF
XTPB0XTPB0+ EECK_LAN
XTPA0- EEDI_LAN
XTPA0+
XTPBIAS0
C335
0.1UF
PCLK_1394
AD31 AD14
AD30 AD15
AD29
AD28
AD27
12
C316
0.1UF
1394_PME# 21,23,26,29,30
CBE#0 16,21,23,26
CBE#1 16,21,23,26
PAR 16,21,23,26
PERR# 16,21,23,26
C317
0.1UF
12
C318
0.1UF
U17
1
A0
2
A1
3
A2
GND4SDA
24C02-27
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-
C319
0.1UF
54.9_1%
VCC
WC#
SCL
270PF
C338
R353
C320
0.1UF
+3VS
8
7
6
5
54.9_1%
12
12
12
EECK_LAN
EEDI_LAN
R351
C321
0.1UF
12
12
R349
510
54.9_1%
R352
12
12
12
C322
0.1UF
12
R354
54.9_1%
R355
5.1K_1%_0603
C337
0.33UF_16V_0805
@X3
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEM AT IC , M/ B LA- 1341
Size Docu ment Number Re v
Date: Sheet
Compal E l e c t r onics, Inc.
401210
星期五 十一
?15, 2002
2A
of
22 46,
E
Page 22
RTCCLKA24
PCLK_PCM12
W10
B_D0/CAD27
U10
B_D1/CAD29
P10
B_D2/RSVD
H2
B_D3/CAD0
J1
B_D4/CAD1
J3
B_D5/CAD3
K1
B_D6/CAD5
K3
B_D7/CAD7
V10
B_D8/CAD28
R10
B_D9/CAD30
W11
B_D10/CAD31
H1
B_D11/CAD2
J2
B_D12/CAD4
J6
B_D13/CAD6
K2
B_D14/RSVD
K5
B_D15/CAD8
R8
B_A0/CAD26
W7
B_A1/CAD25
V7
B_A2/CAD24
W6
B_A3/CAD23
V6
B_A4/CAD22
U6
B_A5/CAD21
V5
B_A6/CAD20
U5
B_A7/CAD18
N1
B_A8/CC/BE1#
M3
B_A9/CAD14
L1
B_A10/CAD9
M1
B_A11/CAD12
T1
B_A12/CC/BE2#
N3
B_A13/CPAR
P1
B_A14/CPERR#
P5
B_A15/CIRDY#
P6
B_A16/CCLK
M6
B_A17/CAD16
N2
B_A18/RSVD
N6
B_A19/CBLOCK#
N5
B_A20/CSTOP#
R1
B_A21/CDEVSEL#
R2
B_A22/CTRDY#
R3
B_A23/CFRAME#
W4
B_A24/CAD17
R6
B_A25/CAD19
V9
B_BVD1/CSTSCHG
W9
B_BVD2/CAUDIO
H3
B_CD1#/CCD1#
R9
B_CD2#/CCD2#
V8
B_READY/CINT#
W8
B_WAIT#/CSERR#
U9
B_WP/CCLKRUN#
R7
B_INPACK/CREQ#
K6
B_CE1#/CC/BE0#
L2
B_CE2#/CAD10
P3
B_WE#/CGNT#
L5
B_IORD#/CAD13
M2
B_IOWR#/CAD15
L6
B_OE#/CAD11
U8
B_VS1#/CVS1
P7
B_VS2#/CVS2
P8
B_REG#/CC/BE3#
W5
B_RESET/CRST#
SLDATA24
GNT#216
REQ#216
CBE#316,21,22,26
CBE#216,21,22,26
CBE#116,21,22,26
CBE#016,21,22,26
FRAME#16,21,22,26
DEVSEL#16,21,22,26
PCIRST#15,16,21,22,24,26,28,29
TRDY#16,21,22,26
IRDY#16,21,22,26
STOP#16,21,22,26
PERR#16,21,22,26
SERR#16,21,26
PAR16,21,22,26
1 2
R357 10
1 2
R358 10
C6
F7
A6
PAR
SERR#B6PERR#
STOP#
A7
IRDY#
B7
A14
TRDY#
12
R359
33
C346
12
10PF
A10
C7
F8
PCLK
RSTIN#
DEVSEL#
C/BE0#E2C/BE1#A5C/BE2#C8C/BE3#
FRAME#
Slot
B
H5
AD0
AD0
G1
AD1
AD2
AD3
F1
AD4
AD4
AD5
AD5G5AD3H6AD2G3AD1
F2
AD7
AD9
AD8
AD6
AD15F6AD14B5AD13E6AD12A4AD11
AD10E3AD9F5AD8G6AD7E1AD6
C12
AD10
AD12
AD11
AD18
AD16
A8
E9
B8
AD15
AD14
AD13
AD17
AD19
AD18
AD16
S1_ D [0 ..1 5 ]24
S1_A[0..25]24
S2_D[0..15]24
S2_A[0..25]24
AD[0..31]16,21,22,26
CBE#[0..3]16,21,22,26
R365 22K
S2_WP
1 2
S2_A23
1 2
R366 22K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
AD[0..31]
C/BE#[0..3]
S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9
S2_D10
S2_D11
S2_D12
S2_D13
S2_D14
S2_D15
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12
S2_A13
S2_A14
R360
S2_A16 S1_A16
1 2
Placement near
to PCMCIA
controller
S2_BVD124
S2_BVD224
S2_CD1#24
S2_CD2#24
S2_RDY#24
S2_WAIT#24
S2_WP24
S2_INPACK#24
S2_CE1#24
S2_CE2#24
S2_WE#24
S2_IORD#24
S2_IOWR#24
S2_OE#24
S2_VS124
S2_VS224
S2_REG#24
S2_RST24
S2_VCC
S2_VCC
S2_A15
SB_A16
S2_A17
S2_A18
47
S2_A19
S2_A20
S2_A21
S2_A22
S2_A23
S2_A24
S2_A25
S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#
S2_VS1
S2_VS2
S2_RST
A15
B13
REQ#
Interface
AD24
AD23
AD22
AD21A9AD20B9AD19F9AD17
F11
F10
E10
AD21
AD25
AD24
AD23
AD22
AD20
SLATCH 24
PCM_SPK# 25
+3V_PCMCIA
L
12
C339
0.1UF
E19
C13
F17
F14
G15
GNT#
DATA
LATCH
CLOCK
E11
D1
F18
VCCI
VCCP
VCCP
SPKOUT
PCI
IRQ/DMA
12
C340
0.1UF
+3V_PCMCIA
W12
L3
U7
F3
VCC
VCC
VCC
VCC
Power
Slot
A
R488
1 2
0_0805
R489
1 2
@0_0805
N15
G19
B14
VCC
VCC
VCC
VCCC9VCC
E7
+3V_PCMCIA
+3VS
S2_VCC_R
S1_VCC_R
M17
M5
VCCA
VCCB
C341
0.1UF
1 2
C347
1 2
0.1UF
A11
A_D0/CAD27
GRST#
A_D1/CAD29
A_D2/RSVD
A_D3/CAD0
A_D4/CAD1
A_D5/CAD3
A_D6/CAD5
A_D7/CAD7
A_D8/CAD28
A_D9/CAD30
A_D10/CAD31
A_D11/CAD2
A_D12/CAD4
A_D13/CAD6
A_D14/RSVD
A_D15/CAD8
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A7/CAD18
A_A8/CC/BE1#
A_A9/CAD14
A_A10/CAD9
A_A11/CAD12
A_A12/CC/BE2#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A17/CAD16
A_A18/RSVD
A_A19/CBLOCK#
A_A20/CSTOP#
A_A21/CDEVSEL#
A_A22/TRDY#
A_A23/CFRAME#
A_A24/CAD17
A_A25/CAD19
A_BVD1/CSTSCHG
A_BVD2/CAUDIO
A_CD1#/CCD1#
A_CD2#/CCD2#
A_READY/CINT#
A_WAIT#/CSERR#
A_WP/CCLKRUN#
A_INPACK/CREQ#
A_CE1#/CC/BE0#
A_CE2#/CAD10
A_WE#/CGNT#
A_IORD#/CAD13
A_IOWR#/CAD15
A_OE#/CAD11
A_VS1#/CVS1
A_VS2#/CVS2
A_REG#/CC/BE3#
A_RESET/CRST#
W=40mils
CBRST#
U40
H14
G18
G14
U11
R11
U12
R12
V13
H15
G17
F19
P11
V12
P12
W13
U13
J19
K14
K15
K19
L15
L17
L19
M15
W16
R14
W14
P14
N18
R17
N14
M14
P18
U15
T19
P15
R18
P17
P19
N17
N19
M18
H19
J15
V11
H17
J17
J14
H18
L14
P13
R13
R19
W15
V15
U14
J18
M19
K17
L18
W=40mils
S1_D0
S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8
S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A8
S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
SA_A16
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25
S1_BVD1
S1_BVD2
S1_CD1#
S1_CD2#
S1_RDY#
S1_WAIT#
S1_WP
S1_INPACK#
S1_VS1
S1_VS2
S1_RST
S2_VCC
GND
AD29
AD28
AD27
AD26
AD25
AD31
AD30
B12
A12
B11
E13
E12
C11
AD28
AD27
AD26
AD29
AD30
INTA#/MFUNC0
IDSEL
INTB#/MFUNC1
SUSPEND#
DMAREQ#/MFUNC2
F15
A13
E17
C10
12
R368
AD31
100
A16
D19
PCM_INTA#
PCM_INTB#
AD20
DMAGNT#/MFUNC5
LOCK#/MFUNC4
IRQSER/MFUNC3
F13
E14
C15
PCM_RI#
1 2
R369 10
CLKRUN#/MFUNC6
B15
RIOUT#/PME#
GND
GND
GND
J5
P2
G2
C14
PCM_PME# 21,22,26,29,30
PM_CLKRUN# 26,27,29
SIRQ 17,27,29
P9
GND
GND
GND
GND
GND
GND
GND
GND
C5
R370 22K
1 2
PCI1420-GHK
PCM_RI#
+3V_PCMCIA
PCM_SUSP# 29
E8
F12
V14
K18
E18
B10
2 1
D29 RB751V
CARDBUS
PCI1420
S1_VCC
DEV_RST# 21,24
+3V_PCMCIA
R361
1 2
47
Placement near
to PCMCIA
controller
S1_BVD1 24
S1_BVD2 24
S1_CD1# 24
S1_CD2# 24
S1_RDY# 24
S1_WAIT# 24
S1_WP 24
S1_INPACK# 24
S1_CE1# 24
S1_CE2# 24
S1_WE# 24
S1_IORD# 24
S1_IOWR# 24
S1_OE# 24
S1_VS1 24
S1_VS2 24
S1_REG# 24
S1_RST 24
PCM_RI# 27
Compal Electronics, Inc.
Title
Size D o cument Numbe r R e v
B
Dat e : Sheet
+3V_PCMCIA
12
C349
1000PF
S1_WP
CB138
4.7UF_10V_0805
S1_A23
12
12
C342
C343
0.1UF
0.1UF
+3V_PCMCIA +3V_PCMCIA
12
C348
1000PF
PCM_INTA#
PCM_INTB#
SCHEM A T I C , M / B L A -1341
401210
期五 十一月
12
C350
1000PF
1 2
1 2
R363 22K
R364
1 2
D27
22K
RB751V
R367 22K
1 2
D28 RB751V
+3V_PCMCIA
12
12
C351
1000PF
R362 22K
21
21
C344
0.1UF
+3VALW+3V_PCMCIA
S1_VCC
S1_VCC
+3V_PCMCIA
PIRQA# 8,15,16
+3V_PCMCIA
23 46¬P , 15, 2002
12
C345
0.1UF
PIRQB# 16,21,26
of
2A
Page 23
SOCKETCARDBUS
JP12
A77
a68
A76
S1_CD2#23
S1_WP23
S1_BVD123
S1_BVD223
S1_REG#23
S1_INPACK#23
S1_WAIT#23
S1_RST23
S1_VS223
S1_VPP S2_VPP
S1_VCC
S1_RDY#23
S1_WE#23
S1_IOWR#23
S1_IORD#23
S1_VS123
S1_OE#23
S1_CE2#23
S1_CE1#23
S1_CD1#23
S1_CD2#
S1_WP
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22
S1_A16
S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6
S1_D12 S2_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
A9
GND
A8
a38
A7
a4
A6
a37
A5
a3
A4
a36
A3
a2
A2
a35
A1
a1
157
157
158
158
159
b68
b34
b67
b33
GND
b66
b32
b65
b31
b64
b30
b63
GND
b29
b62
b28
b61
b27
b60
b26
GND
b59
b25
b58
b24
b57
b23
b56
GND
b22
b55
b21
b54
b20
b53
GND
b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13
GND
b46
b12
b45
b11
b44
GND
b10
b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
159
160
PCMC154PIN
160
B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
S2_CD2#
S2_WP
S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1
S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3
S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25
S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22
S2_A16
S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13
S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#
S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3
S2_CD2# 23
S2_WP 23
S2_BVD1 23
S2_BVD2 23
S2_REG# 23
S2_INPACK# 23
S2_WAIT# 23
S2_RST 23
S2_VS2 23
S2_VCC
S2_RDY# 23
S2_WE# 23
S2_IOWR# 23
S2_IORD# 23
S2_VS1 23
S2_OE# 23
S2_CE2# 23
S2_CE1# 23
S2_CD1# 23
S1_ D [0 ..1 5 ]23
S1_A[0..25]23
S2_ D [0 ..1 5 ]23
S2_A[0..25]23
R568
@47K
S1_RST S2_RST
S1_OE# S2_OE#
S1_VCC
S2_VCC
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
S1_VCC S2_VCC
R569
@47K
C353
0.1UF
C355
0.1UF
C358
S1_CD1#
1 2
1000PF
C360
S1_CD2#
1 2
1000PF
C361
S2_CD1#
1 2
1000PF
C362
S2_CD2#
1 2
1000PF
R570
@47K
R571
@47K
C354
0.01UF
C356
0.01UF
PCMCIA POWER CTRL.
CB140 2.2UF_16V_0805
CB141 4.7UF_10V_0805
CB142
CB143 4.7UF_10V_0805
CB145 4.7UF_10V_0805
CB146 4.7UF_10V_0805
CB147
12
CB148
4.7UF_10V_0805
CB149
4.7UF_10V_0805
4.7UF_10V_0805
4.7UF_10V_0805
+3VALW
+3VALW
SLDATA23
SLATCH23
RTCCLKA23
R371 @100K
+5VALW
R372
8.2K
+12VALW
S1_VPP
S2_VPP
25
7
24
1
2
30
15
16
17
3
5
4
13
19
18
R373
8.2K
+3VALW
C352
0.1UF
+3VALW POWER
U19
NC
12V
12V
5V
5V
5V
3.3V
3.3V
3.3V
DATA
LATCH
CLOCK
NC
STBY#
OC#
TPS2216AI
12
C357
0.01UF
C359
0.01UF
RESET
RESET#
10
9 8
U11C
74LVC125
12
12
8
AVPP
9
AVCC
10
AVCC
11
AVCC
23
BVPP
20
BVCC
21
BVCC
22
BVCC
6
14
26
NC
27
NC
28
NC
29
MODE
12
GND
DEV_RST#
R374
CB150
4.7UF_10V_0805
CB151
4.7UF_10V_0805
S1_VPP
S2_VPP
TPAD1
TP
PCMRST# 29
10K
12
+3VALW
S1_VPP
S1_VCC
CB139
4.7UF_10V_0805
S2_VPP
S2_VCC
12
CB144
4.7UF_10V_0805
MODIFY BY
10/27/2000
DEV_RST# 21,23PCIRST#15,16,21,22,23,26,28,29
DEV_RST# 21,23
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEM A T I C , M / B L A -1341
Size D o cument Numbe r R e v
B
401210
期五 十一月
Dat e : Sheet
2A
of
24 46¬P , 15, 2002
Page 24
A
BEEP#29
U11D
74LVC125
12 11
1 1
2 2
13
+3VALW POWER
PCM_SPK#23
+3VS
12
R375
100K_1%_0603
1 2
10K_1%_0603
SPKR17,18
R377
C363
0.22UF
B
12
+3VS
14
1 2
+3VS
14
3 4
+3VALW POWER
+3VS
14
5 6
U20A
74LVC14
+3VALW POWER
U20B
74LVC14
U20C
74LVC14
+3VALW POWER
14
9 8
CB152
1UF_10V_0603
CB155
1UF_10V_0603
CB156
1UF_10V_0603
U20D
74LVC14
1 2
12
R378 560
12
1 2
R380 560
12
1 2
R382 560
C
MONO_IN
12
R383
10K
2 1
D30
RB751V
D
E
F
G
H
AC97 CODEC ALC202 CONN
MOD_AUDIO_MONR
MOD_AUDIO_MON26
3 3
INT_MIC28
Q27
@2N7002
4 4
A
R384 20K
0
R558
1 2
Q26
@SI2304DS
D
S
G
2
13
D
S
12
13
2
G
12
R385
33K
R386
1 2
@100K
INTMIC
+12VS
MIC_MUTE 29
B
CLK_14M_SIO12,27
AC97_BCLK17,26
HPLUG29
AC97_RST#17,26
AC97_SYNC17,26
AC97_SDOUT17,18,26
AC97_SDIN017
MD_MIC26
MOD_AUDIO_MONR
CDROM_L20
CDROM_R20
PS2_DATA29
PS2_CLK29
EC_MUTE29
FULL_LED#30
ACT_LED#20
CHARGING_LED#30
POWER1_LED#30
POWER2_LED#30
LED229
C
+3VS
+5VS
+5VALW
+3VALW
CLK_14M_SIO
AC97_BCLK
MONO_IN
MOD_AUDIO_MONR
INTMIC
EC_MUTE
J8
GND-MIC AGND
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
JP29
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
CODEC CONN
CLK_14M_SIO AC97_BCLK
R559
@33
1 2
C481
1 2
@22PF
E
R560
@33
1 2
C482
1 2
@22PF
Title
SCHEM AT IC , M/ B LA- 1341
Size Docu ment Number Re v
F
Date: Sheet
Compal E l e c t r onics, Inc.
401210
星期五 十一
G
?15, 2002
25
H
2A
46,
of
Page 25
A
B
C
D
E
KEY KEY
101
103
105
107
109
111
113
115
117
119
121
123
127
Mini-PCI SLOT
JP16
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100
101
103
105
107
109
111
113
115
117
119
121
123
127
102
104
106
108
110
112
114
116
118
120
122
124
129
Mini-PCI Slot
+3.3VAUX
12
12
C370
C372
1000PF
0.1UF
AD[0..3 1 ]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
129
PCIRST#
1 2
AD30
AD28
AD26
AD24
MINI_IDSEL
AD22
AD20
AD18
AD16
AD15
AD13
AD11
AD9
AD6
AD4
AD2
AD0
MD_AUDIO_MON
CB158
4.7UF_10V_0805
AD[0..31] 16,21,22,23
PIRQB#
PCIRST# 15,16,21,22,23,24,28,29
GNT#1
R390
0
1 2
R392 100
PAR 16,21,22,23
FRAME# 16,21,22,23
STOP# 16,21,22,23
DEVSEL# 16,21,22,23
CBE#0 16,21,22,23
AC97_SDOUT 17,18,25
AC97_RST# 17,25
MOD_RING
MOD_TIP
12
C365
220PF_3KV_1808
PIRQB# 16,21,23
GNT#4 16
GNT#1 16
MINI_PME# 21,22,23,29,30
LAN_PME# 21,22,23,29,30
AD27
W=40mils
W=40mils
W=40mils
W=40mils
12
C382
1000PF
12
C366
220PF_3KV_1808
+5VS
+3.3VAUX
+3VS
+3.3VAUX
12
C383
0.01UF
JP15
1
2
HEADER 2
+5VS
12
VH1
DSSA-P3100SB
MOD_RING
CB161
22UF_10V_1206
RJ45_TX+21
RJ45_TX-21
RJ45_RX+21
RJ45_GND21
RJ45_RX-21
MOD_TIP
TX+
TXRX+
R387
75_1%_0603
RX-
R389
75_1%_0603
12
C373
1
1
2
2
220PF_3KV_1808
JP14
8
TX+
7
TX-
6
RX+
5
N/C1
4
N/C2
3
RX-
2
N/C3
1
N/C4
9
N/C5
10
RING
11
TIP
12
N/C6
RJ-45 & RJ-11
GND1
CATHODE1
ANODE1
CATHODE2
ANODE2
GND2
13
16
15
17
18
14
NPTH
NPTH
LED1_GRNN
12
C377
47PF
LED1_GRNP
12
C378
47PF
12
C379
47PF
LED2_YELP
LED2_YELN
12
C380
47PF
LED1_GRNN 21
LED1_GRNP 21
LED2_YELP 21
LED2_YELN 21
+5VS
12
1 1
Wireless_OFF#29
W=40mils
+3VS
2 2
PM_CLKRUN#23,27,29 TRDY# 16,21,22,23
3 3
W=30mils
+5VS
AC97_SYNC17,25
AC97_SDIN117
AC97_BCLK17,25
12
C384 15PF
+5VS
MOD_AUDIO_MON25
MD_MIC25
W=30mils
C367
1000PF
PIRQD#16
REQ#416
PCLK_MINI12
REQ#116
R391
100
1 2
CBE#316,21,22,23
CBE#216,21,22,23
IRDY#16,21,22,23
SERR#16,21,23
PERR#16,21,22,23
CBE#116,21,22,23
R393 22
R394 22
MODEM_RI#27
12
12
C368
0.1UF
C374
1000PF
+3.3VAUX
CB157
4.7UF_10V_0805
+3VS
12
CB160
C376
4.7UF_10V_0805
0.1UF
TIP RING
D33
RB751V
PIRQD#
PCLK_MINI
REQ#1
AD31
AD29
AD27
AD25
LAN_IDSELAD31
AD23
AD21
AD19
AD17
CLKRUN#
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
12
12
21
MD_AUDIO_MON
PCLK_MINI
4 4
12
12
R395
@10
C389
@15PF
A
+3.3VAUX
+3VALW
the channel width 50 mils
B
DIGITAL GND
MINI_GNDA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
SCHEM AT IC , M/ B LA- 1341
Size Docu ment Number Re v
Date: Sheet
Compal E l e c t r onics, Inc.
401210
星期五 十一
?15, 2002
of
26 46,
E
2A
Page 26
5
SUPER I/O SMsC LPC47N227
+3VS
R549
R397
D D
LFRAME#17,29
LDRQ#017,29
SIO_PCIRST#29
PM_CLKRUN#23,26,29
SIOPCLK12
C C
1 2
R403 10K
1 2
R404 10K
+3VS
B B
LAD0
LAD1
LAD2
LAD3
+3VS
SIRQ17,23,29
PCLK_SIO
14.3M_SIO
1 2
1 2
R398 10K
CLKRUN#
CB163
4.7UF_10V_0805
10K
1 2
R399 10K
12
C395
0.1UF
1 2
LAD[0..3]17,29
10K
12
C397
0.1UF
U21
20
LAD0
21
LAD1
22
LAD2
23
LAD3
24
LFRAME#
25
LDRQ#
26
PCIRST#
27
LPCPD#
50
GPIO12/IO_SMI#
17
IO_PME#
30
SIRQ
28
CLKRUN#
29
PCICLK
19
CLK14
48
GPIO10
54
GPIO15
55
GPIO16
56
GPIO17
57
GPIO20
58
GPIO21
59
GPIO22
6
GPIO24
32
GPIO30
33
GPIO31
34
GPIO32
35
GPIO33
36
GPIO34
37
GPIO35
38
GPIO36
39
GPIO37
40
GPIO40
41
GPIO41
42
GPIO42
43
GPIO43
44
GPIO44
45
GPIO45
46
GPIO46
47
GPIO47
51
GPIO13/IRQIN1
52
GPIO14/IRQIN2
64
GPIO23/FDC_PP
18
VTR
53
VCC
65
VCC
93
VCC
7
VSS
31
VSS
60
VSS
76
VSS
SMsC LPC47N227
4
LPD[0 ..7 ]
LAD[0 ..3 ]
LPD[0..7] 31
PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD5
PD6/MTR0#
PD7
BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0#
SLCTIN#/STEP#
DTR2#
CTS2#
RTS2#
DSR2#
TXD2
RXD2
DCD2#
RI2#
DTR1#
CTS1#
RTS1#
DSR1#
TXD1
RXD1
DCD1#
RI1#
IRMODE/IRRX3
IRRX2
IRTX2
RDATA#
WDATA#
WGATE#
HDSEL#
DIR#
STEP#
DS0#
INDEX#
DSKCHG#
WRTPRT#
TRK0#
MTR0#
DRVDEN0
DRVDEN1
GPIO11/SYSOPT
LPD0
68
LPD1
69
LPD2
70
LPD3
71
LPD4
72
LPD5
73
LPD6
74
LPD7
75
LPTBUSY
79
LPTPE
78
LPTSLCT
77
LPTERR#
81
LPTACK#
80
66
82
83
67
DTR#2
100
CTS#2
99
RTS#2
98
DSR#2
97
TXD2
96
RXD2
95
DCD#2
94
RI#2
92
DTRA#
89
CTSA#
88
RTSA#
87
DSRA#
86
TXDA
85
RXDA
84
DCDA#
91
RIA#
90
63
61
62
16
10
11
12
8
9
5
13
4
15
14
3
1
2
49
Base I/O Address
0 = 02Eh
*
1 = 04Eh
IRMODE
IRRX
IRTXOUT
WDATA#
WGATE#
DSKCHG#
TRACK0#
1 2
R401 1K
RDATA#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
WP#
MTR0#
R405 10K
1 2
R406 1K
LPTBUSY 31
LPTPE 31
LPTSLCT 31
LPTERR# 31
LPTACK# 31
LPTINIT# 31
LPTAFD# 31
LPTSTB# 31
LPTSLCTIN# 31CLK_14M_SIO12,25
R400 1K
RDATA# 28
WDATA# 28
WGATE# 28
HDSEL# 28
FDDIR# 28
STEP# 28
DRV0# 28
INDEX# 28
DSKCHG# 28
WP# 28
TRACK0# 28
MTR0# 28
3MODE# 28
12
3
1 2
+5VS
CTS#2
DSR#2
DCD#2
RI#2
IRRX
1 2
R402
1K
RP96
1 8
2 7
3 6
4 5
8P4R-4.7K_0804
DCDA#
RIA#
CTSA#
DSRA#
+3VS
RP95
1 8
2 7
3 6
4 5
8P4R-4.7K_0804
+3VS
2
CP4
RTS#1
1 8
RXD1
2 7
DSR#1
3 6
DCD#1
4 5
8P4C-220PF
CP5
DTR#1
1 8
CTS#1
2 7
TXD1
3 6
RI#1
4 5
8P4C-220PF
JP17
(1)
DCD#1
1
(6)
DSR#1
6
(2)
RXD1
2
(7)
RTS#1
7
(3)
TXD1
3
(8)
CTS#1
8
(4)
DTR#1
4
(9)
RI#1
9
(5)
5
COM-DB9
1
SERIAL PORT
+5VALW
C390
0.1UF
0.47UF_0805
SUSP#29,33,38
C392
0.1UF
C394
DTRA#
RTSA#
TXDA
CTSA#
RIA#
RXDA
DCDA#
DSRA#
25V
RIA1
28
24
1
2
14
13
12
19
18
17
16
15
20
23
22
C1+
C1C2+
C2TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2
FORCEON
FORCEOFF#
U22
MAX3243
26
27
VCC
V+
3
V-
9
TOUT1
10
TOUT2
11
TOUT3
4
RIN1
5
RIN2
6
RIN3
7
RIN4
8
RIN5
21
INVLD#
25
GND
+3VALW+3VALW
C393
0.47UF_0805
DTR#1
RTS#1
TXD1
CTS#1
RI#1
RXD1
DCD#1
DSR#1
C391
0.47UF_0805
25V
25V
+3VS
CLKRUN#
A A
1 2
R409 10K
R410
10
1 2
C398
1 2
15PF
5
PCLK_SIO14.3M_SIO
R411
33
1 2
C399
1 2
22PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
PCM_RI#23
RING#29
MODEM_RI#26
12
R407
10K
Compal Electronics, Inc.
Title
SCH EMATIC, M/B LA-1341
Size Docu ment Number Re v
401210
Date: Sheet
星期五 十一
D34
RB751V
D35
RB751V
2N7002
21
21
Q31
?15, 2002
12
R408
10K
13
RIA1
2
of
27 46,
1
2A
Page 27
+3VALW+3VS
+5VS
JP19
26
26
INDEX#27
DRV0#27
DSKCHG#27
MTR0#27
FDDIR#27
3MODE#27
STEP#27
WDATA#27
WGATE#27
TRACK0#27
WP#27
RDATA#27
HDSEL#27
INDEX#
DRV0#
DSKCHG#
MTR0#
FDDIR#
3MODE#
STEP#
FDD_DET#
WDATA#
WGATE#
TRACK0#
WP#
RDATA#
HDSEL#
+5VS
12
12
C404
C403
0.1UF
0.1UF
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES 85203-2602
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
ON/OFF BUTTON
SW3
3
4
HCH SMT1-02
1
R491
4.7K
1 2
R492
0
2
G
@2N7002
Q47
D53
3
DAN202U
2
DTC124EK
ON/OFF
2
+3VALW
12
EC_ON29
13
D
S
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
22K
B
22K
+3VALW
12
1
2
13
C
+5VS
INDEX#
DRV0#
DSKCHG#
MTR0#
FDDIR#
3MODE#
STEP#
FDD_DET#
WDATA#
WGATE#
TRACK0#
RDATA#
HDSEL#
R490
100K
ON/OFFBTN#
51ON#
Q46
E
WP#
WDATA#
WGATE#
HDSEL#
FDDIR#
+5VS
ON/OFFBTN# 29
51ON# 34
12
C463
1000PF
WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V
DSKCHG#
INDEX#
WP#
TRACK0#
GND-MIC need around INT_MIC
RP98
6
7
8
9
10
10P8R_1K
+5VALW
12
C409
0.1UF
D54
12
RLZ20A
2 1
FDD CONN.
RP97
1 8
2 7
3 6
4 5
8P4R-1K_0804
5
4
3
2
1
ON/OFFBTN#
12
C405
0.1UF
+5VS
STEP#
MTR0#
RDATA#
DRV0#
12
J7
12
C406
0.1UF
SCROLLED#29
CAPSLED#29
+5VS
SWITCH BOARD CONN.
+3VALW
+3VS
1
2
3
NUMLED#29
51ON#34
EC_ACT#29,30
INT_MIC25
4
5
6
7
8
9
10
SW BD CONN
GND-MIC
Place in Closest JP20 Place in Closest JP20
R415
1 2
0
GND-MIC
AGND
4 IN 1 CONN
+5VS +5VS
USB5_D+18
USB5_D-18
PCIRST#15,16,21,22,23,24,26,29
JP20
1
2
3
4
5
6
7
8
9
10
R416
1 2
@0
USB5_D+
USB5_DPCIRST#
11
12
13
14
15
16
17
18
19
20
11
12
13
14
15
16
17
18
19
20
JP30
1
1
2
2
3
3
4
4
5
5
6
6
4 in1 CONN
7
8
9
10
11
12
USER_BTN3#
GND
7
8
9
10
11
12
USB5_D+
USB5_DPCIRST#
USER_BTN0# 30
USER_BTN1# 30
USER_BTN2# 30
USER_BTN3# 30
LED129
USER_BTN3#
+3VALW
12
R555
10K
+3VALW +3VALW
12
R510
100K
ID2
ID1
INT_KBD CONN.
KSO[0..15]29
KSI[0..7]29
+3VALW
31
Q48
E
47K
B
2
10K
C
DTA114YKA
R509
330
1 2
USER_BTN3#
ID229
ID129
12
R511
100K
NEED CLOSEST JP18 ADD BY EMI REQUEST
KSO[0..15]
KSI[0..7]
R552 0
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
LED+
12
ID2
ID1
LED-
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
KSO2
KSO4
KSO7
KSO8
KSO9
KSO0
KSO5
KSO1
JP18
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
INT_KB
CP7
1 8
2 7
3 6
4 5
8P4C-100PF
CP9
1 8
2 7
3 6
4 5
8P4C-100PF
CP6
1 8
2 7
3 6
4 5
8P4C-100PF
CP8
1 8
2 7
3 6
4 5
8P4C-100PF
LID SW
LID_SW#29,30
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LID_SW#
SW4
3
4
HORNG CHIH
1
2
Title
SCHEMATIC, M/B LA-1341
Size Do cumen t Numbe r R e v
401210
Date: Sheet
Compal Electronics, Inc.
星期五 十一月
, 2002
of
28 46, 15
2A
Page 28
A
+3VALW
CB167
4.7UF_10V_0805
1 1
L31
1 2
BLM11A20
L32
1 2
BLM11A20
+3VALW
+3VALW
12
C413
0.1UF
C418
0.1UF
1 2
ECAGND
12
C414
0.1UF
100K
R427
EC_RST#
R425
100K
12
12
C415
1000PF
C419
1000PF
PC7
EC_AVCC+3VALW
2
For REV.A only
ADB[0..7]
KBA[0..18]
RP99
+3VALW
RP100
8P4R-10K_0804
+3VALW
147
U25A
1
10
9
8
7
6
10P8R_4.7K
EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1
FSEL#
SELIO#
FRD#
EC_SMI#
G20
KBRST#
BT_OFF#
570SCI#
PCIRST#
+5VS
PS2_DATA
PS2_CLK
1 8
2 7
3 6
4 5
2 2
3 3
4,26,28
2
74LVC32
3
ADB[0..7] 30
KBA[0 ..1 8 ] 30
KBD_DATA
1
KBD_CLK
2
EXT_DATA
3
EXT_CLK
4
5
+5VS
RP101
1 8
2 7
3 6
4 5
8P4R-4.7K_0804
RP102
1 8
2 7
3 6
4 5
8P4R-10K_0804
PCIRST-8,16,20
R440 10K
1 2
C422
0.1UF
+5VALW
+3VALW
12
+3VALW
+3VS
SIRQ17,23,27
LDRQ#017,27
LFRAME#17,27
LAD017,27
LAD117,27
LAD217,27
LAD317,27
EC_PCLK12
13
Q33
2N7002
KBRST#
R545
0
KSI[0..7]28
KSO [0 ..1 5 ]28
CLK_LPC_EC
12
R428
@10
12
C421
@15PF
KBD_DATA32
PS2_DATA25
MIC_MUTE25
SCI#17
KBD_CLK32
EXT_DATA32
PS2_CLK25
LID_SW#28,30
EXTSMI#17
SWI#17
1 2
4
U11B
74LVC125
5 6
4 4
R546 @0
A
EC_PCIRST#
12
D37
21
SIO_PCIRST#27
RB751V
C423
10PF
Wir e less_O F F#26
R441 20M_0603
1 2
12
32.768KHZ
X6
RSM_RST8,17
PROCHOT#4
12
HPLUG25
EXT_CLK32
PCM_SUSP#23
SYSON33
SUSP#27,33,38
VR_ON39
ENABLK15
BKOFF#15
FSEL#30
C424
10PF
1 2
R422
MSEN#14,30
PCMRST#24
R442
B
0_0603
CB169
4.7UF_10V_0805
CLK_LPC_EC
570SCI#
G20
KBRST#
KSI[0..7]
KSO[0..15]
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
BT_OFF#
CRY1
CRY2
12
120K
B
1 2
R424
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KBD_CLK
KBD_DATA
EXT_CLK
EXT_DATA
PS2_CLK
PS2_DATA
LID_SW#
CRY1
CRY2
EC_SMI#
MSEN#
FSEL#
@0
12
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
C416
0.1UF
105
106
107
108
109
110
111
114
115
116
117
118
119
158
160
148
149
155
156
173
174
EC_3VDD
7
SERIRQ
8
LDRQ
9
LFRAME
15
LAD0
14
LAD1
13
LAD2
10
LAD3
18
LCLK
19
LREST1
22
SMI
23
PWUREQ
31
IOPD3/ECSCI
5
GA20/IOPB5
6
KBRST/IOPB6
71
KBSIN0
72
KBSIN1
73
KBSIN2
74
KBSIN3
77
KBSIN4
78
KBSIN5
79
KBSIN6
80
KBSIN7
49
KBSOUT0
50
KBSOUT1
51
KBSOUT2
52
KBSOUT3
53
KBSOUT4
56
KBSOUT5
57
KBSOUT6
58
KBSOUT7
59
KBSOUT8
60
KBSOUT9
61
KBSOUT10
64
KBSOUT11
65
KBSOUT12
66
KBSOUT13
67
KBSOUT14
68
KBSOUT15
TINT
TCK
TDO
TDI
TMS
PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7
32KX1/32KCLKOUT
32KX2
62
IOPJ2/BST0
63
IOPJ3/BST1
69
IOPJ4/BST2
70
IOPJ5/PFS
75
IOPJ6/PLI
76
IOPJ7/BRKL_RSTO
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13
27
IOPM6/D14
28
IOPM7/D15
SEL0
SEL1
47
CLK
PC87591VPC
16
VDD
VCC134VCC245VCC3
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTJ-2
PORTM
GND117GND235GND346GND4
122
123
GND5
159
EC_AVCC
136
157
166
VCC4
VCC5
VCC6
AD Input
DA output
PWM
or PORTA
PORTB
IOPB7/RING/PFAIL/LRESET2
PORTC
PORTD-1
PORTE
PORTH
PORTJ-1
PORTD-2
PORTK
PORTL
AGND
GND6
GND7
96
167
137
ECAGND
C
1UF_10V_0603
95
AVCC
IOPD2/EXWINT24/LRESET2
IOPE7/CLKRUN/EXWINT46
PORTI
161
VBAT
AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9
DA0
DA1
DA2
DA3
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
U24
SELIO
IOPD4
IOPD5
IOPD6
IOPD7
IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1
NC212NC320NC421NC585NC686NC791NC892NC997NC10
NC1
11
C
98
CB168
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
R423
0_0603
1 2
1 2
81
ADP_I
82
83
84
87
88
89
90
93
94
99
100
101
102
32
33
36
37
38
39
40
43
153
154
162
163
164
165
168
EC_SMC_2
169
EC_SMD_2
170
171
172
175
176
PC7
1
AC_IN
26
29
30
2
44
24
25
124
125
126
127
128
131
132
133
138
139
140
141
144
145
146
147
150
151
152
41
42
54
55
143
142
135
134
130
129
121
120
113
112
104
103
48
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+RTCVCC
BATT_TEMP
BD_ID0
BD_ID1
BD_ID2
EC_SMC_1
EC_SMD_1
EC_PCIRST#
EC_ACT#
LPCPD#
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
FRD#
FWR#
SELIO#
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
FSTCHG 35
D
C417 0.01UF
BATT_TEMP ECAGND
BATT_TEMP 36
BATT_OVP 35
LI/NIMH# 36
ID1 28
ID2 28
DAC_BRIG 15
EN_FAN1 3
IREF 35
INVT_PWM 15
BEEP# 25
LED2 25
ACOFF 35
PM_BATLOW# 17
EC_ON 28
LID_OUT# 17
EC_THERM# 17
SMB_EC_CK1 30,36
SMB_EC_DA1 30,36
PWRBTN_OUT# 17
EC_SMC2 3
EC_SMD2 3
FANSPEED1 3
EC_ACT# 28,30
EC_MUTE 25
PCI_PME# 21,22,23,26,30
RING# 27
SLP_S3# 7,32
ON/OFFBTN# 28
SLP_S5# 17,32
PM_CLKRUN# 23,26,27
FREAD# 30
FWR# 30
SELIO# 30
SCROLLED# 28
NUMLED# 28
CAPSLED# 28
LED1 28
JP23
1
2
3
4
5
6
7
8
9
10
@96212-1011S
1 2
ADP_I
1 2
+3VALW
1
EC_TINIT#
2
EC_TCK
3
EC_TDO
4
EC_TDI
5
EC_TMS
6
7
BD_ID0
8
BD_ID1
9
BD_ID2
10
D
Index Data
4E 4F
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
ADP_I
IRE
OBD
*
*
R426
12
@2M_0603
C420
@0.22UF_0603
BADDR1-0
0 0
0 1
1 0
1 1
DEV
PROG
SHBM=1: Enable shared memory with host BIOS
TRIS=1: While in IRE and OBD, float all the
signals for clip-on ISE use
KBA1
(ENV1)
KBA2
(BADDR0)
KBA3
(BADDR1)
KBA5
(SHBM)
AC_IN
2 1
期五 十一月
R435
R437
R439
12
10K
12
10K
12
10K
R434
BD_ID0
12
10K
R436
BD_ID1
12
10K
R438
BD_ID2
12
10K
+5VALW
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
Custom
401210
Dat e : Sheet
I/O Address
Reserved
ENV0 ENV1
00
0011
11
RB751V
D36
E
2F2E
TRIS
0
0
0
0
+3VALW
R42910K
R43010K
R431@10K
R43210K
ACIN 34,37AC_IN17
2A
of
29 46¬P , 15, 2002
E
Page 29
INPUT OUTPUT
USER_BTN0#28
USER_BTN1#28
USER_BTN2#28
USER_BTN3#28
PID015
PID115
PID215
PID315
U25D
147
KBA1
SELIO#29
SELIO#
74LVC32
12
13
CC
11
R529
CC
1 2
AA
1 2
R530 20K
1A121Y1
1A241Y2
1A361Y3
1A481Y4
2A1112Y1
2A2132Y2
2A3152Y3
2A4172Y4
1
1G
19
2G
20K
+3VALW
+3VALW
C425
1 2
0.1UF
20
U26
VCC
GND
10
18
16
14
12
9
7
5
3
74LVC244
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
+3VALW
RP104
1 8
2 7
3 6
4 5
8P4R-20K_0804
PCM_PME#21,22,23,26,29
MINI_PME#21,22,23,26,29
EC_ACT#
MSEN#
EC_ACT# 28,29
LID_SW# 28,29
MSEN# 14,29
+3VALW
12
R447
20K
PME_51#
C4270.1UF
12
KBA2
SELIO#
+5VALW
PCI_PME# 21,22,23,26,29
+3VALW
9
10
147
74LVC32
1 2
U25C
R446
20K
8
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
AA
LARST#
CB170
1 2
1UF_10V_0603
3
11
1
+5VALW
20
D0
D14Q1
VCC
D27Q2
D38Q3
D413Q4
D514Q5
D617Q6
D718Q7
CLK
CLR
1 2
U27
Q0
GND
74HCT273
10
0.1UF
C426
2
5
6
9
12
15
16
19
1 2
R445 @0
FULL_LED# 25
POWER1_LED# 25
POWER2_LED# 25
CHARGING_LED# 25
LAN_DIS# 21
SBPME# 17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
KBA[0..18]
ADB[0..7]
U32
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
SST39VF040
KBA[0..18]29
ADB[0..7]29
KBA18
KBA16
KBA15 KBA17
KBA12 KBA14
KBA7 KBA13
KBA6 KBA8
KBA5 KBA9
KBA4 KBA11
KBA3
KBA2 KBA10
KBA1
KBA0
ADB0 ADB6
ADB1
ADB2
10UF_10V_1206
C431
1 2
0.1UF
32
VCC
31
WE*
30
A17
29
A14
28
A13
27
A8
26
A9
25
A11
24
OE*
23
A10
22
CE*
21
DQ7
20
DQ6
19
DQ5
18
DQ4
17
DQ3
CB171
12
FWE#
ADB7
ADB5
ADB4
ADB3
+3VALW
FREAD# 29
FSEL# 29
6
U25B
74LVC32
LAN_PME#21,22,23,26,29
1394_PME#21,22,23,26,29
+5VALW
+3VALW
12
R449
20K
147
4
5
R450
1 2
2
100K
1 3
2N7002
Q34
FWR# 29
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+12VS
FLASH# 17
SMB_EC_CK129,36
SMB_EC_DA129,36
Title
Size Do cumen t Numbe r R e v
Date: Sheet
C430
1 2
0.1UF
8
7
6
5
12
R451
1K
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1341
401210
星期五 十一月
, 2002
U31
VCC
WC
SCL
SDA
NM24C164
GND
+5VALW
12
R448
10K
1
A0
2
A1
3
A2
4
12
R452
1K
2A
of
30 46, 15
Page 30
A
B
C
D
E
Printer Port/USB
USB0_DUSB0_D+
JP26
1
VCC
D-
D+
1 1
GND
2551A-04G2T
2
3
4
R_USB0_DR_USB0_D+
USBGND0
C440
0.1UF
12
L42
FBM-11-160808-121
1 2
1 2
L44
FBM-11-160808-121
12
L46
FBM-11-451616-800T
USB0_DUSB0_D+
USB0_D- 18
USB0_D+ 18
USB0_VCC
CE14
+
150UF_10V_E
L40
FBM-11-451616-800T
12
C438
0.1UF
USB_0 +5VALW
12
R456
470K_0603
12
R458
560K_0603
F4
12
POLYSWITCH_0.75A
OC0# 18
12
C442
1000PF
USB4_D-
+5V_PRN
+5V_PRN
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
12
C433
FD7
FD6
FD5
FD4
USB4_D+
0.1UF
LPD[0 ..7 ]
1 2
R460 33
1 2
R462 33
USB_4+5VALW +5VALWUSB_2
F2
POLYSWITCH_0.75A
OC4#18 OC2# 18
+5V_PRN
SLCTIN#
LPT_INIT#
LPTERR#
AFD/3M#
+5V_PRN
12
FD0
FD1
FD2
FD3
C435
1000PF
2 2
3 3
4 4
12
12
RP105
1
2
3
4
5
10P8R_2.7K
RP107
1
2
3
4
5
10P8R_2.7K
FBM-11-451616-800T
L33
1 2
R453
470K_0603
R454
560K_0603
LPD[0..7]27
LPTINIT#27
LPTSLCTIN#27
10
9
8
7
6
10
9
8
7
6
USB4_D- 18
USB4_D+ 18
USB4_VCC
USB4_D- R_USB4_D-
FBM-11-160808-121
CE17
+
150UF_10V_E
FBM-11-451616-800T
Parallel Port
LPT_INIT#
SLCTIN#
10
11
12
13
14
15
16
RP106
16P8R_68
LPD3
LPD2
LPD0
LPD7 FD7
LPD6
LPD5
LPD4
USB Port
12
C434
0.1UF
LPTSTB#
R463 33
JP31
1
VCC
2
D-
3
D+
4
GND
2551A-04G2T
+5VS
R461 33
1 2
LPTERR#27
LPTACK#27
LPTBUSY27
LPTPE27
LPTSLCT27
2 1
1 2
D46
RB420D
AFD/3M#
FD0
LPTERR#
FD1
LPT_INIT#
FD2
SLCTIN#
FD3
FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
+5V_PRN
w=10mils
2551A-04G2T
12
L34
FBM-11-160808-121
12
R_USB4_D+USB4_D+ R_USB2_D+
12
USBGND4
L35
12
L38
LPTSTB#27
LPTAFD#27
FD3
89
FD2
7
FD1
6
FD0
5
4
FD6
3
FD5
2
FD4
1
JP24
VCC
D-
D+
GND
R459
1K
w=10mils
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
1
2
3
USBGND2
4
12
JP27
LPTCN-25-SUYIN
L41 FBM-11-160808-121
L43 FBM-11-160808-121
12
L45
C439
FBM-11-451616-800T
0.1UF
USB2_D+18
12
12
AFD/3M#
LPTERR#
LPT_INIT#
SLCTIN#
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
FD0
FD1
FD2LPD1
FD3
FD4
FD5
FD6
FD7
USB2_D-18
USB2_D-R_USB2_D-
USB2_D+
150UF_10V_E
+5V_PRN
CP10
1 8
2 7
3 6
4 5
8P4C-220PF
CP11
1 8
2 7
3 6
4 5
8P4C-220PF
CP12
1 8
2 7
3 6
4 5
8P4C-220PF
CP13
1 8
2 7
3 6
4 5
8P4C-220PF
USB2_D+
USB2_D-
USB2_VCC
CE13
12
C443
0.1UF
+
L39
FBM-11-451616-800T
12
C437
0.1UF
12
R455
470K_0603
12
R457
560K_0603
F3
POLYSWITCH_0.75A
12
C441
1000PF
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compal Electronics, Inc.
SCHEM AT IC , M/ B LA- 1341
401210
星期五 十一
?15, 2002
E
2A
of
31 46,
Page 31
VGATE12,39 VR_POK 12,39
+3VS
R557
U34
MAX6342
R469
+12VS
14
U20F
74LVC14
13 12
14
U20E
74LVC14
11 10
+3VALW
12
12
PSON#
R476
10K
SLP_S5# 17,29
SLP_S3# 7,29
R475
10K
PSON#17,29
S3AUXSW#7,29
1 2
56K
5
3
R547
8.2K
S3AUXSW#
PSON#
SLP_S3#
SLP_S5#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
MR#
VCC
PFI
GND
2
S1 S3 S5
1 0 1
0 1 1
1 0 0
1 1 0
RST#
PFO#
6
4
D49
DAN217
+5VS
D50
DAN217
+5VS
EXT_CLK29
EXT_DATA29
KB_VCC
W=40mils W=40mils
1 2
CHB4516G750
D51
DAN217
D52
DAN217
L49
4516
KBD_DATA29
KBD_CLK29
2
1
3
2
1
3
+5VS
F5
EVERFUSE_1.1A
+5VS
+5VS
12
13
12
R471
4.7K
2
3
2
3
1 2
CB-1608D-800T
1 2
KB_AS
12
C453
1000PF
L50
1 2
CB-1608D-800T
1 2
L51
CB-1608D-800T
12
0
U12D
74HCT08
1
1
L47
L48
CB-1608D-800T
12
C454
220PF
0603
Title
SCHEMATIC, M/B LA-1341
Size Do cumen t Numbe r R e v
401210
Date: Sheet
星期五 十一月
R550
11
12
@2K
R470
1 2
PS2 CONN.
12
C451
220PF
12
CB173
4.7UF_10V_0805
12
C455
220PF
Compal Electronics, Inc.
, 2002
@3.3K
JP28
KBD/PS2_6
4
2
1
PWRGD 8,17
563
32 46, 15
12
C452
220PF
12
C456
220PF
of
2A
Page 32
A
+1.8VS+1.8VALW
U35
SI4800
8
S
D
7
S
D
6
S
D
5
G
D
1 1
12
CB175
10UF_10V_1206
+1.8VALW to +1.8VS Transfer
1
2
12
12
C458
0.1UF
RUNON
CB174
22UF_10V_1206
3
4
12
0.1UF
C457
12
R479
470
13
+2.5V to +2.5VS Transfer
+2.5V
12
CB176
1UF_10V_0603
13
2 2
+12VALW
12
R484
100K
3 3
SUSP
Q43
2N7002
2
G
13
D
S
R486
1M_0603
12
RUNON
+5VALW to +5VS Transfer
+5VALW
12
C461
0.01UF
CB181
4.7UF_10V_0805
2
G
U36
8
7
6
5
+5VALW
12
D
D
D
D
RUNON
D
Q39
S
12
CB177
1UF_10V_0603
SI4800
S
S
S
G
+5VALW
12
+
SI2306DS
+2.5VS
1
2
3
4
CE15
100UF_D_16V
+5VS
12
0.1UF
C460
Q37
2N7002
SUSP
2
12
CB180
22UF_10V_1206
B
C
D
+12VALW
12
R480
47K
SYSON#38
SYSON29
SYSON#
13
2
Q38
2N7002
E
1.8VALW/+1.5VS Power direct provide
+12VALW
+12VALW TO +12VS
Transfer
2
+12VALW
1 3
12
12
CB178
1UF_25V_0805
Q42
NDS352P
+12VS
CB179
1UF_25V_0805
SUSP
SUSP#27,29,38
+12VALW
12
C459
0.1UF
12
R485
470
Q44
13
2N7002
SUSP
2
SUSP#
12
R481
100K
VON
12
R482
51K
13
Q40
2
2N7002
12
R483
10K
13
Q41
2
2N7002
+3VALW +3VS
U37
SI4800
8
S
D
7
S
D
6
S
D
4 4
12
CE16
+
100UF_D_16V
5
G
D
12
CB183
10UF_10V_1206
A
+3VALW to +3VS Transfer
1
2
12
3
4
CB182
22UF_10V_1206
RUNON
12
0.1UF
C462
12
R487
470
Q45
13
2N7002
SUSP
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compal E l e c t r onics, Inc.
SCHEM AT IC , M/ B LA-1341
401210
星期五 十一
?15, 2002
33
E
2A
46,
of
Page 33
A
B
C
D
Vin Detector
P1
PCN1
3
1
3
2
2DC-S315-B01
PD2
IN4148
1 1
2 2
VIN
P1
1
2
EC10QS04
VIN+
12
PD1
PR8
1K_1206
1 2
PR10
1K_1206
1 2
PR11
1K_1206
1 2
12
1000PF_50V
FBM-L18-453215-900LMA 90T_1812
PC1
B++
PL1
1 2
PC2
100PF_0402_50V
PC3
1000PF_50V
VIN
PC4
100PF_0402_50V
PC6
1000PF_50V
84.5K_0402_1%
12
VIN
PD4
IN4148
1 2
PD5
2 1
PZD3
RLZ4.3B
RB751V
100K_0402
1 2
PR21
22K_0402
12
PR20
12
VS+
TP0610T
12
ON_G
PC12
0.22UF_1206_25V
PQ1
13
2
VMB
3 3
CHGRTCP
51ON#28
VIN_L
PR18
33_1206
1 2
12
0.1UF_50V
VS
PC11
MAINPWON36,37
ACON35
1
2
PD3
3
RB715F
High 18.784 17.901 17.077 V
Low 17.877 17.043 16.195 V
VIN
PR3
DIN
PR6
20K_0402_1%
12
1 2
12
PC7
0.01UF_0402_16V
PR5
22K_0402_1%
0.1UF_50V
12
VS
12
PR13
10K_0402
PRG
(6.0V)
PZD2
RLZ6.2C
2 1
12
ACIN
Precharge detector
16.6 15.9 15.2
13.48 12.93 12.09
BAT ONLY
PC5
PR9
10K_0402
PU1B
LM393M
7
PC9
1000PF_50V
PR1
1M_0402_1%
1 2
VS
PU1A
84
LM393M
3
+
2
-
12
PR12
1M_0402_1%
5
+
6
-
1
RTCVREF
(3.3V)
12
12
PC10
0.01UF _ 0402_16V
RTCVREF
3.3V
PR16
10K_0402
1 2
PQ2
2N7002
VS
12
PR2
10K_0402
12
12
PRG++
13
D
S
PQ3
DTC115EUA
PZD1
RLZ4.3B
PR17
215K_0402_1%
2
G
12
PR7
10K_0402
13
PR4
1K_0402
1 2
B++
12
PR14
499K_0402_1%
12
PR15
499K_0402_1%
100K
100K
PACIN
PRG+
PR19
47K_0402
2
12
ACIN 29,37
PACIN 35
12
PC8
1000PF_50V
PACINPRG+_G
+5VALWP
Precharge detector
(3.3V)
RTCVREF
4 4
CHGRTC
1 2
PR23
200_0805
PC14
10UF_1206_10V
A
S-81233SG(SOT-23)
3
3
PU2
2
2
1
1
CHGRTCP
PR22
200_0805
CHGRTCP+
PC13
1UF_0805_25V
2 1
PZD4
RLZ16B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
8.597 8.247 7.904
6.310 6.101 5.683
C
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
B
Dat e : Sheet
期五 十一月
401210
of
D
34 46¬P , 15, 2002
2A
Page 34
A
B
C
D
1 1
PQ4
SI4835DY
ACOFF#
8
7
5
PD6
1SS355
1 2
PR33
10K_0402
1 2
VIN
12
PR25
10K_0402
2 2
PACIN34
ACON34
IREF=1.31*Icharge
P2 P3
PQ5
SI4835DY
1
1
2
2
3 6
36
2
G
12
PR26
200K_0402
L_1
12
PR30
150K_0402
L_1T
13
D
PQ9
2N7002
S
PC20
0.1UF_0402_16V
4
8
7
5
4
ACY25
12.7K
12
12
PR35
11K_0402_1%
12
(1.73V)
12
PR34
24K_0402_1%
(5.0V)
PC23
0.1UF_0402_16V
IREF =0.73 ~ 3.3V
12
PR53
2.2K_0402
1 2
PR39
162K_0402_1%
PU4A
LM358A
100K_0402_1%
1
VS
PR43
84
+
-
3
2
12
PC30
0.1UF_50V
200K_0402_1%
PR54
12
PC27
0.1UF_0402_16V
VMB
12
PR48
L_7
12
PR49
L_8
12
604K_0402_1%
1M_0402_1%
IREF29
3 3
OVP voltage : LI-MH 8 CELL(4S2P)
VMB : 18.0V--> BATT_OVP : 2.0V
(BAT_OVP voltage = 0.110865 *VMB)
BATT_OVP29
4 4
0.1UF_0402_16V
PC33
12
Iadp=0~3.5A
PR24
0.02_2512_1%
PR32
10K_0402
1 2
PC21
4700PF_0402_25V
1 2
PC24
2200PF_0402_25V
PR41 10K_0402
PC34
0.01UF_50V
12
12
PR36 10K_0402
1 2
PR37 10K_0402
1 2
12
PU3
MB3878
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
(1.25V)
SDREF7,10
B+
FBM-L18-453215-900LMA 90T_1812
1 2
24
+INC2
23
GND
22
CS
21
VCC(o)
20
OUT
VH
19
VH
18
VCC
17
16
15
14
13
PR51
@0_0402
PC32
1 2
PR38 68K_0402
PR42 47K_0402
1 2
CHARGE
RT
-INE3
FB3
CTL
+INC1
@0.1UF_0402_16V
PL2
PR31
0_0402
PC22
0.1UF_50V
1 2
12
12
L_4
1 2
PC26 1500PF_50V
1 2
PR44
1K_0402
PR46
47.5K_0402_1%
PU4B
LM358A
7
12
PC15
10UF_1210_25V
12
PR29
0_0402
L_3
PC18
220PF_0402_50V
1 2
1 2
PC19
0.1UF_50V
PC25
0.1UF_50V
1 2
12
5
+
6
-
SDREF_L
(4.2V)
L_9
12
PC16
4.7UF_1210_25V
L_5
PD7
1SS355
1 2
12
PR45
47K_0402
+2.5VP
12
PR50
@100K_0402_0.5%
12
PR52
@100K_0402_0.5%
12
FSTCHG 29
EC10QS04
12
PR47
143K_0402_1%
PC17
0.1UF_50V
PD8
B++
36
241
PQ7
FDS4435
578
LXCHRG
PL3
22UH_SPC-1205P-220A
1 2
12
L_6
PC31
@0.1UF_0402_16V
ACOFF#
1 2
PR40
0.02_2512_1%
PQ6
SI4835DY
1
2
3 6
1 2
13
100K
100K
4
L_2
PR27
10K_0402
2
PQ8
DTC115EKA
8
7
5
1 2
CC= 0 ( 0 . 5 A) ~ 2.52A
CV=16.84V (8 CELLS)
12
PC28
10UF_1 210_25V
PR28
47K_0402
VIN
ACOFF 29
12
PC29
4.7UF_ 1 210_25V
CHARGE 36
BATT+
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
B
Dat e : Sheet
期五 十一月
401210
of
D
35 46¬P , 15, 2002
2A
Page 35
A
B
C
D
PJP1
3MM
21
+5VALW+5VALWP +12VALW
+12VALWP
PJP4
3MM
+3VALWP
1 1
21
+1.8VALWP +1.25VS
+3VALW
PJP2
2MM
PJP5
2MM
21
+1.8VALW
21
+1.25VP
PJP3
4MM
PJP6
3MM
21
+2.5V+2.5VP
PH1 under CPU botten side :
CPU thermal protection at 90(91)+-3 degree C
21
Recovery at 50(51)+-3 degree C
RTCVREF
PC119
0.1UF_0402_16V
PC39
1000PF_50V
7
PR76
470K_0402
3
2
VS
84
+
-
VS
PR73
10K_0402
1
PU5A
LM393M
PR64
470K_0402
OTP_B
21
PZD6
RLZ3.6B
PR59
10K_0402
OTP_C
21
PZD5
RLZ3.6B
PD13
1SS355
PC43
0.1UF_0402_16V
DTC115EKA
12
PC35
0.1UF_50V
PD9
1SS355
PC40
0.1UF_0402_16V
PQ11
2
OTP
12
100K
OTP
CPU_ON
13
100K
DTC115EKA
PTH1
10K_1%
L_10
PR55
100K_0402_1%
PR60
1K_0402_1%
PR57 47K_0402_1%
rev
PC37
1000PF_50V
VMB
FBM-L18-453215-900LMA 90T_1812
12
PL4
1 2
BATT+
12
PC36
0.1UF_50V
+3VALWP
PR56
@100K_0402_1%
CPU
*
PR58
3.65K_0402_1%
LI/NIMH# 29
PR61
2 2
PR66
1K_0402
1 2
PR67
1K_0402
PCN2
1
2
3
4
5
6
7
8
SUYIN_25037A-08G1-C
3 3
4 4
VMB
ID
AB/I
TS
EEPROMVCC
1 2
PR68
25.5K_0402_1%
12
*
PR69
100_0402
*
1 2
PR70
100_0402
1
PD12
@BAS40-04
@1K_0402_1%
12
PR63
BATT_TEMP
1
3
3
1
3
2
2
2
@1K_0402_1%
PD10
@BAS40-04
PD11
@BAS40-04
SMB_EC_DA1 29,30
SMB_EC_CK1 29,30
+3VALWP
BATT_TEMP 29
+3VALWP
0.1UF_0402_16V
BATTERY
PC42
0.1UF_0402_16V
3.65K_0402_1%
PC38
PR71
L_11T
L_10T
PH2 near main Battery CONN :
BAT. thermal protection at 85(86)+-3 degree C
Recovery at 50(51) degree C
RTCVREF
L_11
19.1K_0402_1%
PTH2
10K_1%
PR75
PR62
18.2K_0402_1%
249K_0402_1%
PR74
1K_0402_1%
PR65
PC41
0.1UF_0402_16V
PR72 47K_0402_1%
rev
84
5
+
6
-
PU5B
LM393M
2
PQ12
100K
100K
2
CHARGE
13
39
MAINPWON
13
100K
100K
PQ10
DTC115EKA
35
34,37
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
SCHEMATIC, M/B LA-1341
Size D o cument Numbe r R e v
B
Dat e : Sheet
期五 十一月
401210
of
D
36 46¬P , 15, 2002
2A
Page 36
A
1 1
B++
12
PC47
0.1UF_50V
12
PC48
PC49
2200PF_50V
10UF_1210_25V
D1
S1
D2
7
S2
8
+3.3V Ipeak = 6.66A ~ 10A
12
12
PL5
SLF12565T_100M
2 2
12
PR82
+3VALWP
12
+
PC59
150UF_D_6.3V_FP
3 3
0.012_2512_1%
12
PD16
+
EP10QY03
2 1
PC60
150UF_D_6.3V_FP
1 2
1 2
PR87
3.57K_0402_1%
PR90
L_BT3
1 2
10K_0402_1%
PC57
47PF_0402_50V
PR83
1M_0402
12
PC61
33PF_0402_50V
FB3_L
PQ13
FDS6982S
45
G1
36
2
G2
1
PC46
0.1UF_50V
1 2
DH3
LX3
DL3
ACIN29,34
B
PR78
0_0402
1 2
CSH3
1 2
PR86
10K_0402
@300K_0402
VS
12
PR94
47K_0402
12
PC67
0.047UF_50V
PR88
L_14
BST31
12
12
12
1SS355
PC55
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
PC65
680PF_50V
PR93
47K_0402
PC68
0.047UF_50V
VS
PD29
PR79
10_1206
12
0.1UF_50V
12
MAINPWON
1 2
L_12 L_13
12
22
V+
PU6
MAX1632
C
DAP202U
PD15
2
3
1
12
PC51
4.7UF_1206_10V
21
4
12OUT
VL
5
VDD
18
BST5
16
DH5
17
LX5
19
DL5
20
PGND
14
CSH5
13
CSL5
12
FB5
15
SEQ
9
REF
6
SYNC
11
RST#
GND
8
VL
VL
BST51
+12VALWP
PC56
4.7UF_1210_25V
12
12
PR92
@0_0402
1 2
PR95
0_0402
BST51+
2.5VREF
PC62
4.7UF_1206_10V
12
PC50
0.1UF_50V
1 2
PR80
0_0402
1 2
L_15
VL
1 2
FB5_L
PC52
PR81
0_0402
2200PF_50V
12
D
PC45
470PF_50V
B++
12
0.1UF_50V
PC53
DH5
LX5
CSH5
33PF_0402_50V
1 2
PC54
DL5
PC66
12VDD
10UF_1210_25V
12
PR77
22_1206
10.5K_0402_1%
FLYBACKSNB
12
D1
4 5
G1
S1
3 6
D2
2
G2
S2
1
PQ14
FDS6982S
PR89
PC44
2.2UF_1206_25V
1 2
12
PD14
EC11FS2
1 4
3 2
PT1
SDT-1205P-100
7
8
12
PC58
47PF_0402_50V
L_BT5
12
PD17
EP10QY03
12
PR91
10K_0402_1%
12
PR84
2M_0402
2 1
12
12
12
+
+
150UF_D_6.3V_FP
PC63
+5V Ipeak = 6.66A ~ 10A
E
PR85
0.012_2512_1%
+5VALWP
47UF_D_6.3V_PC
PC64
MAIN PWON 34,36
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Docu ment Number Re v
Date: Sheet
Compal E l e c t r onics, Inc.
SCHEM AT IC , M/ B LA-1341
401210
星期五 十一
?15, 2002
2A
of
37 46,
E
Page 37
A
D
S
+5VALWP
1 1
PD18
RB751V
PR99
1K_0402
2
1 2
1 2
12
31
HMBT2222A
PD22
RB751V
PR109
1K_0402
2
PQ17
2
HMBT2222A
PU12B
LM393M
A
12
PC71
10UF_1 210_25V
2200PF_0402_25V
2 2
3 3
PC85
4.7UF_1206_16V
2200PF_0402_25V
4 4
PC72
PQ18
2SA1036K
+3VALWP
1 2
12
31
12
PC86
PQ23
2SA1036K
1 2
13
PU7B
LM393M
PQ22
2
LB1
7
12
PR98
10K_0402
*
PU7A
LM393M
LA1
+
7
-
13
5
+
6
-
4 5
G
3
D
S
4 5
G
PQ16
3
SI3445DV
L_16
1
5
6
PQ21
SI3445DV
S
4 5
12
PR108
10K_0402
PU12A
LM393M
1
6
PQ15
2
@SI3445DV
1
6
2
1
12
VL
PC74
0.1UF_0402_16V
84
3
+
2
-
3
4700PF_0402_25V
L_17
D
G
VL
84
+
-
6
2
1
PD23
EC31QS04
3
2
PC87
12
DTC115EUA
PC116
0.1UF_0402_16V
LX2.5
12
PD19
EC31QS04
12
LA3
LA2
PC75
4700PF_0402_25V
PQ19
LX1.8
12
12
12
PL6
4.7UH SPC-1205P-4R7A
PR96
@2M
191K_0402_1%
PC73
@0.1UF_50V
13
100K
100K
PL8
5UH-SPC-06704
1 2
12
PR152
@2M
191K_0402_1%
12
PC117
@0.1UF_50V
LB3
LB2
*
PR153
261K_0402_1%
12
PR97
PR101
47K_0402
1 2
LA2_G
2
PR107
B
12
13
100K
B
12
VL
12
PR154
@47K
100K
PQ24
@DTC115EKA
1 2
2
C
(+2.5V +-5%)
+2.5VP
PC69
12
470PF_0402_50V
12
+
PC70
220UF_D_4V_FP
2.5VREF
SYSON#33
1 2
PR103
0_0402
SYSON#
+2.5VP
(+1.8V+-5%)
+1.8VALWP
PC118
470PF_0402_50V
12
PR111
100K_0402_1%
12
+
PC84
150UF_D_4V_FP
2.5VREF
SYSON#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+2.5VP
PR102
10_0805
12
PC76
0.1UF_0402_16V
12
PC78
4.7UF_1206_16V
1 2
PR105
100K_0402
13
SUSP# 27,29,33
2
PQ20
DTC115EUA
100K
100K
1.5VCC
12
1
VCC1
2
PVDD1
PU8
3
VL1
CM8500IT
4
PGND1
5
AGND1
SD
6
SD
7
VIN/2
12
8
AGSEN
PC83
1000PF_50V
VCC2
PVDD2
VL2
PGND2
AGND2
VFB
VCCQ
AGND
16
15
14
13
12
11
10
9
Layout : "Compensation network close to FB pin"
Title
Size D o cument Numbe r R e v
C
Dat e : Sheet
D
21
PD20
@EP10QY03
1 2
PC77
0.1UF_ 0 402_16V
PL7
LX1.25
12
PC79
4.7UF_1206_16V
+2.5VP
12
PC82
0.1UF_0402_16V
12
1 2
PC81
1000PF_50V
5UH-SPC-06704
PD21
@EP10QY03
PR104
100K_0402
12
PR106
1K_0402
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1341
B
期五 十一月
401210
D
+1.25VP
12
12
+
PC80
220UF_D_4V_FP
12
2A
of
38 46¬P , 15, 2002
Page 38
A
1 1
CPU_VID43
CPU_VID33
CPU_ON36
+3VALWP
PR126
150K_0402_1%
PR128
180K_0402_1%
2 2
CPU_VID23
CPU_VID13
CPU_VID03
VGATE12,32
CPU_ON
PC96
1UF_0805_25V
+2VREF
*
PR136
48.7K_0402_1%
PC101
0.1UF_0402_16V
PR141
200_0402
1 2
PR143
200_0402
3 3
4 4
1 2
1 2
PR144
200_0402
1 2
PR146
200_0402
PR138
20K_0402_1%
PC102
4700PF_0402_25V
PC108
4700PF_0402_25V
B
PR116 100K_0402
PR119 100K_0402
PR120 100K_0402
PR121 100K_0402
PR122 10K_0402
PR124 120K_0402
PC95
47PF_0402_50V
PC97
1UF_0805_25V
100K_0402_1%
53.6K_0402_1%
L_30
L_31
PR114 0_0402
+2VREF
*
PR132
*
PR134
L_26
L_32
B++
FBM-L18-453215-900LMA 90T_1812
CPUVDD
PU9 MAX1718
21
12
22
12
23
12
24
12
12
25
14
3
12
2
17
6
20
11
12
PC99
1000PF_50V
PR137
1K_0402_1%
L_25
PU10MAX1887
1
ILIM
2
TRIG
3
CM+
4
CM-
5
CS-
6
CS+
7
COMP
8
GND
C
PL9
1 2
D4
D3
D2
D1
D0
VGATE
VCC
TIME
SDN/SKIP
POS
VDD
NEG
CC
ZMODE
OVP
SUS
REF
ILIM
GND15TON
L_18
PR135
33K_0402_1%
PC100
470PF_0402_50V
LIMIT
V+
BST
LX
DH
VDD
DL
PGND
10UF_1210_25V
PR112
0_0402
LX
DH
BST
DL
V+
FB
S1
S0
16
15
14
13
12
11
10
9
PC88
27
28
26
16
1
9
4
13
5
19
18
8
7
10
L_19
CPUVDD
20_0805
L_20
L_27
CPU_B+
CPUVCC
CPUFB
POS
PM_DPRSLPVR
L_28L_29
PC103
0.1UF_50V
PC89
4.7UF_1210_25V
+5VALWP
PR113
1 2
PC94
4.7UF_1206_16V
PC98
1000PF_50V
PM_DPRSLPVR 17
L_23
2 1
PC109
1UF_0805_25V
21
PD24
1SS355
PR117 2.2_1%
1 2
L_22
PC93
0.1UF_50V
PR145
2.2_1%
1 2
PD28
1SS355
D
PC90
4.7UF_1210_25V
*
PC91 0.1UF_50V
*
L_LG
E
CPU_B+
L_21
PQ25
IR7811A
578
3 6
241
CPU_B+
IR7811A
PQ26
578
3 6
241
12
+
PC114
@100UF_EC_25V
VTT1LX
578
3 6
3 6
241
241
CPU_B+
SI4362DY
PQ34
IR7811A
PQ28
578
3 6
578
3 6
PR118
68_0805
12
PC92
220PF_50V
241
1 2
PR125
100_0402
241
SI4362DY
PQ33
IR7811A
L_24
PQ27
578
VTT2LX CS+
578
3 6
PQ38
SI4362DY
578
PR142
68_0805
12
241
3 6
PC107
220PF_50V
241
PQ37
SI4362DY
+3VALWP
4.7UF_1206_16V
CPU_ON
VR_ON29
VR_ON
12
+
PC115
@100UF_EC_25V
PL10
SCR-1205-0R5
PD25
EC31QS04
2 1
SCR-1205-0R5
PD27
EC31QS04
2 1
PR147
0_0402
PC110
F
PL11
12
PC112 1000PF_50V
PR150
0_0402
G
+5VALWP
PC120
0.1UF
1 2
PR156
0_0402_5%
PR158
1K_0603_1%
CM+ +CPU_CORE
PR123
2.8K_0402_1%
PR129
49.9K_0402_1%
13
D
S
PR139
0.002_2512_1%
1.2VDD
PU11
4
VIN
2
DELAY
ERROR7CNOISE
8
ON/OFF#
SI91822DH-12-T1
5
+
1
-
PU13
MAX4322EUK-T_SOT23-5
2
12
12
PR130
68K_0402_1%
+5VALWP
PR133
PQ31
100K_0402
2N7002
2
G
13
D
G
S
PQ32
2N7002
+CPU_CORE
12
PC104
10UF_1210_25V
VOUT
SENSE
GND
3
4
PR115
0.002_2512_1%
2
PR151
100K_0402
+CPU_CORE
5
6
1
3
PR155
499_0603_1%
PR157
1K_0603_1%
PQ30
13
D
2N7002
S
PM_STPCPU#12,17
CPU_B+
12
12
12
+CPU_CORE
PD26
EC31QS04
2 1
2
G
PC105
4.7UF_1210_25V
PC113
0.1UF_0402_16V
+CPU_CORE
+5VALWP
13
D
S
+1.2VPP
CM+
PR127
100K
PQ29
2N7002
2
G
PQ36
13
D
2N7002
G
S
PC106
4.7UF_1210_25V
PR148
0_0402
PR149
@10K_0402_1%
H
PR131
100K_0402
PM_GMUXSEL17
13
D
S
2
PR140
100K_0402
12
PQ35
2N7002
2
G
PM_DPRSL PVR
+1.2VPP
PC111
4.7UF_1206_16V
PM
BM D-S
Deeper
A
GMUXSEL
1
1
0
0
X
STPCPU#
1
0
0
0
DPRSLPVRBMVCORE'
1.30V
0
1.20V
01
0
1.0V
1
B
Offset
0%
4.62%0
2.0%
4.62%
0%
VCORE
1.30V
1.239VPM D-S
1.176V
1.144V
1.0V
C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
Compal Electronics, Inc.
Title
SCHEM A T IC, M/B LA-1341
Size Docu ment Number Re v
B
401210
Date: Sheet
星期五 十一
?15, 2002
G
of
39 46,
H
2A
Page 39
5
4
3
2
1
Power ON sequence
Power Off sequence
ACIN
ON/OFFBTN#
D D
EC_ON
51ON#
+3VALW / +5VALW
/+12VALW / +1.8VALW
RSM_RST
PWRBTN_OUT#
94mS(min)
SYSON
+2.5V
C C
PS_ON#
63mS~94mS
S3AUXSW#
Below are Power On and Resume sequence
Power off / Suspend
Power off
Suspend
SLP_S3# / SLP_S5#
SUSP#/LAN_DIS#/PCM_SUSP#
+3VS/+5VS/+12VS
+1.8VS/+2.5VS/+1.25VS
VR_ON
10mS(max)
Power off / Suspend
1mS(max)
+1.2VPP
B B
CPU_ON
50mS(max)
CPU_CORE
VGATE
CLOCK
PWRGD
100mS (min)
PCIRST#
CPUPWRGD
A A
CPURST#
6mS(max)
5mS~15mS
5mS~15mS
2mS~9mS
30nS(min)
Power off / Suspend
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1341
B
401210
星期五 十一月
15, 2002
40 46,
1
of
2A
Page 40
5
4
3
2
1
POWER SOURCE BLOCK DIAGRAM
D D
+12VALW
C C
AC_IN
PU6
MAX1632
SYSON
+5VALW
AC
+3VALW
B B
BATTERY
B+
VR_ON
SI91822DH-12-T1
PU11
+3VALW
SUSP
PU7
LM393
SUSP
SUSP
SUSP
SUSP
Q42
NDS352
CM8500
NDS352
U36
SI4800
U37
SI4800
Q39
PU8
+12VS
+12VALW
+1.25VS
+2.5V
+2.5VS
+5VALW
+5VS
+3VS
U5_NB_SIS650
U2_MAX1617
U5_NB_SIS650
U6_CLOCK_GEN.
JP4_JP5_DDR_SODIMM
JP4_JP5_DDR_SODIMM
U7_DDR_CLOCK_BUFFER
JP9_JP10_HDD_CDROM
U10_SB_SIS961
U8_LVDS_TVOUT
U21_SIO_47N227
U16_1394_VIA6306
+1.2VPP
CPU_ON
PU9/PU10
MAX1718
MAX1887
U1_CPU
+CPU_CORE
U1_CPU
U5_NB_SIS650
A A
5
U10_SB_SIS961
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PU12
LM393
SUSP
U35
SI4800
+3VALW
+1.8VALW
+1.8VS
3
U5_NB_SIS650
U5_NB_SIS650
U5_NB_SIS650
U10_SB_SIS961
U16_1394_VIA6306U40_PCMCIA_ENE1420
U10_SB_SIS961
U10_SB_SIS961
Title
Size Document Number Rev
B
2
Date: Sheet
U24_EC_87591
U13_LAN_RTL8100B
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1341
401210
星期五 十一月
15, 2002
1
2A
41 46,
of
Page 41
5
4
3
2
1
ACY25 RESET MAP DIAGRAM
+3VS/+2.5VS
D D
C C
+5VALW
SYSON
DC/DC
VGATE
POWER FAIL
SUSP#
+2.5V
+3VS
CLOCK
DELAY
DC/DC
DDR
S3AUXSW#
+1.25VS
PSON#
+3VALW/+1.8VALW/+2.5V
+3VS/+1.8VS/+CPU_CORE
RSM_RST
PWRGD
NB
+3VALW/+1.8VALW
+3VS/+1.8VS/+CPU_CORE
RSM_RST
SB
PWRBTN_OUT#
+CPU_CORE/+1.2VP
CPURST#
CPUPWRGD
PCIRST-
BUF
PCIRST#
CPU
EC
+3VS
SIO
GPO
AND
+3VALW/+3VS/+5VS
MINI
PCI
+3VALW/+3VS
1394
LAN_DIS#
+3VALW
LAN
+5VS
IDE
PCM_SUSP#
ON/OFFBTN#
EC_ON
B B
PCMCIA
+3VS
LVDS
RSM_RST#
+3VALW
ON/OFF
BUTTON
A A
5
51ON#
DC/DC
+12VALW
+3VALW/+5VALW/+1.8VALW
+3VALW
EC
SUSP#
SUSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
VR_ON
LAN_DIS#
PCM_SUSP#
+3VS/+5VS/+1.8VS/+12VS
3
+1.2VP
CPUON
CPU_CORE
2
VGATE
+CPU_CORE
+1.2VP
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1341
Size Document Number Rev
B
401210
星期五 十一月
Date: Sheet
15, 2002
42 46,
1
of
2A
Page 42
5
4
3
2
1
Power PIR
Item
1
2
D D
3
4
5
6
7
8
C C
9
10
11
Fixed Issue
Reason for change
NO Improve CPU_CORE voltage regulator.
Page
MB_Ver.Modify item
Phase
39 0.3 C test
12
13
B B
14
15
16
17
18
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
Size Document Number Re v
A
Date: Sheet
Compal Electronics, Inc.
SCHEMA TIC , M/B LA-1341
401210
期五 十一月
2
43 46¬P , 15, 2002
2A
of
1
Page 43
5
UNIT IDSEL IRQ GNT REQ
4
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
1
1394 U16 AD16 PIRQC# GNT#0 REQ#0
MINIPCI JP16 AD31 PIRQB# GNT#1 REQ#1
D D
LAN U13 AD17 PIRQB# GNT#3 REQ#3
CARDBUS U40 AD20 PIRQA/B# GNT#2 REQ#2
SMBUS from EC
EC_SMD2,EC_SMC2 : U2 (MAX1617) AD : 1001 110
SMB_EC_CK1,SMB_EC_DA1: U31( EEPROM ) , PCN2 (BATT CONN)
SMBUS from SIS961
C C
SMBCLK , SMBDAT: JP5 , JP4 , CLK GEN ( U6 ) , CLK BUF( U7 ).
ACY25 A-TEST Modify
Change to 310LV : Add R64,R73,R76. Del R77,R78,Q49,Q50,R539
Add DPSLP# : Add Q49 ,R551
DPRSLPVR : Change to pull Low =Del R536 Add R284 ; Add U41 ,R554.
B B
AUXOK : Del CB112
IDERST# : Add D56 , R548
LAN : VDD2.5 add L27,C294,C297,C299
1394 : +3VA change to +3VS power , R351,R352,R353,R3354 change to 54.9_1% , R355
change to 5.1K_1% , C337 change to .33UF , C338 change to 270PF
KB : Add R552 to disconnect ON/OFF
PSON# : Connect to SLP_S5# directly. Del U33
A A
S3AUXSW# : Connect to SLP_S3# directly
PWRGD : Add R550 transfer 5V to 3V
+2.5V : Q39 using SI2306 to transfer +2.5VS
H_DPSLP# : Add Q49 , R551 to connect with PM_STPCPU#
5
4
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1341
Size Document Number Rev
B
401210
星期五 十一月
3
2
Date: Sheet
15, 2002
44 46,
1
of
2A
Page 44
5
4
3
2
1
CDLED# : Add R553 to disconnect with JP10
USER_BTN3# : Add R552 to disconnect with JP18,R555 pull high to +3VALW
D D
DDR termination : RP32~RP57 , R494~R508 chanage to 33 ohm
PWRGD : Del C42 , C256
SUSP# : R487 change to 75 ohm
FOR C TEST
LED1 : Q48 PIN3 CHANGE TO +3VALW
FWDSDCLKO : Add pull high resistor R556
C C
PWRGD : Add pass through resistor R557
CRTVDD : R170,R171 change from 2.2K to 1K
GPIO19,20 : Add pull high resistor R566,R567 , del R269
EC_ON : Del Q47. R492 change to 0 ohm
EN_FAN1 : Add U42 , C483 , C484 , R561 ,R562
CLKFS2 :Del R161 , Add R565
AUXOK : Del D18 , R254
B B
For MP
+5VFAN1 : Add D58 for reserve
S1_RST# ,S2_OE# , S2_RST# , S2_OE# :Add R568,R569,R570,R571 for reserve
LAN_DIS# : Del R333 , add D57 for reserve
MINI PCI : Change to REQ#4 & GNT#4
For MP 5/3
A A
R248 change to 47K , R251 change to 15K
For MP 6/6
R278 change from 0 to 47 ohm
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
2
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1341
Size Document Number Rev
B
401210
星期五 十一月
Date: Sheet
15, 2002
45 46,
1
of
2A
Page 45
5
D D
C C
4
3
2
1
B B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
A A
5
4
3
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-1341
Size Document Number Rev
B
401210
星期五 十一月
2
Date: Sheet
15, 2002
46 46,
1
of
2A
Page 46
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