Compal C560 Schematic

A

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1 1

B

C

D

E

Compal Confidential

2 2

C560 LA-A061P Schematics Document

INTEL Haswell CPU with DDRIII + PCH Lynx-Point

AIO M/B

September 24, 2013

3 3

REV:1.0

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

ZEA00 LA-A061P M/B

1 59Tuesday, September 24, 2013

E

0.3

A

WWW.AliSaler.Com

L

LVDS Conn.

1 1

LVDS

VDS Converter

R

D2136R

T

B

DP

PCI-Expressx8

D

MI

H

C

Intel CPU Haswell Desktop

L

A1150

G

e

mory BUS(DDRIII)

M

D

al Channel

u

1

5V DDR3 1333/1600 MHz

.

D

2

4pin DDR3/L-SO-DIMM X2

0

E

FDI

DMI

DIS Only

SATA port 0

DDR3 VRAMx4pcs 1GB/2GB

2 2

HDMI OUT conn.

RJ45 conn.

USB2.0 conn.

3 3

USB2.0 conn.

LAN_RTL8111G 10/100/1G

USB2.0 conn.

VGA Chip

N14M-GE2-B-AIO

GeForce 705M,29x29mm

PCIE

USB 2.0 X 4

Intel PCH LynxPoint H81

SATA port 1

USB 3.0 X2

USB 2.0 X2

PCIE or SATA

(By BOM Control)

USB2.0

PCIE USB2.0

PCIE

USB 2.0

3.5" SATA HDD Conn.

SATA ODD Conn.

USB Charger_TPS2546

PCIE Mini Card conn. TV Card or m-SATA SSD

PCIe Mini Card conn. WLAN

Card reader IC_RTS5229

(SD/SDHC/SDXC/MMC/MS/MS-Pro)

Touch conn.

Camera+MIC

USB3.0 conn.

BCAS Card conn.

Card Reader conn. 6 in 1

VGA Conn. (Reserve)

EC

IR(Reserve)

4 4

A

ENE KB9012

B

VGA

LPC BUS

HD Audio

Audio Codec ALC272-VA4

FCBGA-708 23mm x 22mm

SPI

LINEOUT

SPK AMP

ALC109

HPOUT

SPI ROM (8MBx1)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

C

Compal Secret Data

Deciphered Date

3W SPK *2 Conn

D

HP Jack

Date: Sheet of

Title

Size Document Number Rev

Custom

D-Mic/A-Mic

MIC Jack

Compal Electronics, Inc.

Block Diagram

ZEA00 LA-A061P M/B

2 59Tuesday, September 24, 2013

E

0.3

5

WWW.AliSaler.Com

U

13

P

ISL62881C

D D

Bead

NCP5911MNTBG

PU9,10,11,12

+CPU_B+

PU5

TPS51212DSCR

4

+VGA_CORE

+CPU_CORE

+GFX_CORE

+1.05VS_VCCIOP

JUMP

+1.05VS_VCCIO

PU4

APL5610CI

3

+VCCSAP

2

1

+CPU_CORE

+GFX_CORE

Intel Sandy Bridge

+1.8VS

1.5V

+VCCSA

U

MP

J

+VCCSA

+1.05VS_VCCIO

C

U

P

+1.05VS_VPCH

+5VALWP

JDCIN1

C C

B+

Beat

PU6

RT8207MZQW

RT8243_B+ PU2

+1.5VP

RT8243BZQW

JUMP

+3VALWP

+1.5V

+0.75VSP

JUMP

+3VALW

AP4800BGM

+5VALW

Q60

PU3 +1.8VSP

APL5930KAI

JUMP

+5VALW

JUMP

+1.8VS

+3VS

PU7

TPS54331DR

+12VSP

JUMP

B+

LCD

Converter

B B

AMP X 2

ALC109

+5VS

+12VS

MOS

+1.5V

+1.5VS

+3VS

JUMP

+0.75VS

+3VALW_PCH

+5VALW

VALW

+3VALW

+5

Power/B

+USB_VCCA

+3VS

USB3.0 X 2

Conn

A A

Conn

U46

APL3510BKI

+3VALW

MOS

Scaler

RTD2136R

MOS

+3VALW_MINI

Mini Card

WLAN

1.5VS

1.5VS +12VS

Mini Card

(TV)

U11

RT9701

U3

+3VS

+3V

APL5930KAI

+1.05V+3V_SCA

+3VALW

+LCDVDD

+3VS +3VS

EC

KB9012

MOS

LVDS CONN

+5VALW

+3VALW

Q61 +5VS

AP4800BGM

+1.5V

U69

AO4304L

+1.5VS_VGA

MOS

+3VS

+3VALW

+3V_LAN

U33 U34

+USB_VCCA

+5VALW

+12VS

+1.5V

+0.75VS

+3VS

+1.8VS

+1.05VS_VPCH

+3VALW_PCH

+3VS

+5VS

FAN1

DDR3 SODIMM X 2

Intel Shark bay

PCH H81

+RTCVCC

RTC

Battery

+1.05VS_VGA

N14M-GE2

+5VS

SATA ODD

VRAM X 8

VGA

Audio codec

ALC272

Media card controller

+3VS+5VS

+Digital Mic

RTS5229

+3VS

CAM

MOS

+5VS

+USB_VCCB

+1.5VS_VGA

+1.05VS_VGA

+VGA_CORE

+12VS

+3VS_VGA+3VS

+5VS

OS

M

SATA HDD

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Power Tree

ZEA00 LA-A061P M/B

1

3 59Tuesday, September 24, 2013

0.3

A

WWW.AliSaler.Com

B

C

D

E

S

B Port Table

STATE

S0(Full ON)

S1(Power On Suspend)

S3(Suspend to RAM)

1 1

S4(Suspend to Disk)

S5(Soft OFF)

Note:

*1:+VALW power reail include +3VALW,+5VALW,B+,+VSB,+3VALW_PCH

*2:+VS power reail include +3VS,+5VS,+12VS,+1.05VS_VPCH,+1.5VS_VGA,+VGA_CORE,+CPU_CORE

2 2

SIGNAL

SLP_S3# SLP_S4#

HIGH

HIGH HIGH

LOW

HIGH

LOW LOW

SLP_S5#

HIGHHIGHHIGH

HIGH

LOWLOWLOW OFF

PCH SM Bus Address

HEX

Device

+3VS

3 3

DDR(JDDRL2)

DDR(JDDRH1)

Address

1010 000X b

1010 010X b

+VALW

ON

*1 *2

+VS

ON

OFF

+1.5V

+0.75VS

ON

OFF

ON

OFF

+RTCVCC

ON

EC SM Bus1 Address

DevicePower Power

HEX Address

0100_100xbALC106 48H

PCH SML1 Bus Address

HEX

AddressDevicePower

VGA Ext. thermal sensor

(default)

0x9bVGA Int. thermal sensor

U

USB 2.0

RMH1

RMH2

USB 1.1

UHCI0

EHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

Port

SATA Port Table

Port Device

0

6G

3G

HDD

1

m-SATA

2

Disabled on H81

3

Disabled on H81

4

ODD

5

NC

BOARD ID Table

Board ID

0 3 4 5

SKU ID(Project) Table

Project _ID2 (GPIO68)

0

1

1 0

1

PCB Revision

Project _ID1 (GPIO69)

0

1

0

1

0.1

0.2

0.3

Project _ID0 (GPIO70)

0

1

0

1

0

1

Device

0

C

-lay w/USB30 PORT0

o

1

Co-lay w/USB30 PORT1(Debug)

2

ear

IO USB20 Conn

R

3

ear

IO USB20 Conn

R

4

WLAN

5

Touch

6

Disabled on H81

7

Disabled on H81

8

Rear IO USB20 Conn

9

Rear IO USB20 Conn(Debug)

10

TV

11

Camera

12

Disabled on H81

13

Disabled on H81

PCIE Port Table

DevicePort

1

LAN

2

Card Reader

3

WLAN

4

TV

5

NC

6

NC

7

Disabled on H81

8

Disabled on H81

SKU

UMA

4519QH38L04

UMA_W/HDMI

4519QH38L05

DIS-MIC1G

4519QH38L06

DIS-SAM1G_W/HDMI

4519QH38L07

DIS-MIC2G_W/HDMI

4519QH38L08

DIS-MIC2G_W/HDMI

4519QH38L09

TV@

DIS@ TV@ DIS@

DIS@

TV@

NLDO@ HDMIO@

NLDO@

NLDO@ HDMIO@

NLDO@

HDMIO@ NLDO@

EMI@ 8111G@

8111G@

8111G@ NCHG@

O

M Structure Table

B

BTO Item BOM Structure

ME components

CONN@

UMA Only UMA@

DIS@DISCRETE Only

EMI Pop components ESD Pop components EMI Unpop components ESD Unpop components

EMI@

ESD@

@EMI@

@ESD@

HDMI OUT HDMIO@ TV TV@

SSD@SSD

CRT CRT@(EVTonly) Unpop

@

VRAM select X76@ EVT for Reserve

EVT@

components PCB PCB@

GPIO68_H@

GPIO68_L@

SKU IO Select

GPIO69_H@

GPIO69_L@

GPIO70_H@

GPIO70_L@

Touch TOUCH@ Non Charger NCHG@

CHG@Charger

ESD@

GPIO68_L@

CHG@

ESD@EMI@

GPIO68_L@

NCHG@ TOUCH@

ESD@EMI@

GPIO68_L@

TOUCH@

ESD@EMI@ PCB@GPIO70_H@GPIO69_H@

GPIO68_L@ NCHG@

ESD@EMI@ PCB@GPIO70_L@GPIO69_L@

GPIO68_H@

NCHG@

GPIO68_H@

GPIO69_L@ GPIO70_L@

GPIO69_L@ PCB@GPIO70_H@

TOUCH@

GPIO69_L@ GPIO70_L@ PCB@EMI@ ESD@ TOUCH@

PCB@

PCB@DIS@ GPIO69_H@ GPIO70_L@

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

ZEA00 LA-A061P M/B

4 59Tuesday, September 24, 2013

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WWW.AliSaler.Com

1 2

1

24 0 .1U_0402_16V4Z@ESD@

C

1 2

2

112 0.1U_0402_16V4Z@ESD@

C

1 2

C

2 5

1 2

C

3 0

1 2

C

4 0

S

D request Close to CPU as possible

E

D D

PECI 10mil spacing and Max Length < 15"

R11 follow CDB R42PR add 0ohm serial resistor

R12 follow CDB R34PR add 0ohm serial resistor

1 2

Place C6 close to CPU pin J40 as close as possible. No stub

C C

+1.05VS_VPCH

1 2

R18 1K_0402_1%@R18 1K _0402_1%@

For BDW new CPU

1 2

C44 0.1U_0402_16V4Z@ESD@ C44 0.1U_0402_16V4Z@ESD@

C2143 0.1U_0402_16V4Z@ESD@ C2143 0.1U_0402_16V4Z@ESD@

1 2

C

X

H

P_0402_50V@ESD@

H

.1U_0402_16V4Z@ESD@

H

.1U_0402_16V4Z@ESD@

H_PWRG OOD

R1610K_0402_5% R1610K_0402_5%

C60.1U_0402_16V4Z C60.1U_0402_16V4Z

H_THERMTRIP#

H_PWRG OOD_R

P

U_PLTRST#

D

P_DBRESET#_R

PECI

_

PROCHOT#_R

_

PM_SYNC

_

+

.05VS_VCCIO

1

H

PROCHOT#[43]

_ _

THERMTRIP#[17]

H

H_PWRG OOD[17]

H_PM_SYNC[1 4]

100 MHz

HDMI OUT (To Conn.)

R

R 5

5

1 2

CPU_PLTRST#[17]

9

1_0402_5%

H_PM_SYNC H_PWRG OOD

CLK_DPNS_DN[13] CLK_DPNS_DP[13] CLK_DP_DN[13] CLK_DP_DP[13] CLK_CPU_DMI#[ 13] CLK_CPU_DMI[13 ]

v0.2 update

AD

_

PECI[17,43]

H

1 2

R14 0_0402_5%@ R14 0_0402_5%@

PCH_HDMIOUT_TX2-[30] PCH_HDMIOUT_TX2+[30] PCH_HDMIOUT_TX1-[30] PCH_HDMIOUT_TX1+[30] PCH_HDMIOUT_TX0-[30] PCH_HDMIOUT_TX0+[30] PCH_HDMIOUT_CLK-[3 0] PCH_HDMIOUT_CLK+[30]

4

T

1P

2P

T

1 2 1 2

1

1 0_0402_5%@

R

R R12 0_0402_5%@R12 0_0402_5%@

T

_SKTOCC#

P

H

CATERR#

_

H

PECI

_

H

PROCHOT#_R

_

H

THERMTRIP#_R

_

H_PWRG OOD_R PM_DRAM_PW RGD_R CPU_PLTRST#

CLK_DPNS_DN CLK_DPNS_DP CLK_DP_DN CLK_DP_DP CLK_CPU_DMI# CLK_CPU_DMI

T13 PADT13 PAD T14 PADT14 PAD T15 PADT15 PAD T16 PADT16 PAD T17 PADT17 PAD T19 PADT19 PAD T21 PADT21 PAD T23 PADT23 PAD

J

PU1B

C

D38

S

TOCC#

K

M36

C

TERR#

A

N37

E

CI

P

K38

P

OCHOT#

R

F37

H

ERMTRIP#

T

P36

PM_SYNC

AB35

PWRGOOD

AK21

SM_DRAMPWROK

M39

RESET#

W6

DPLL_REF_CLKN

W5

DPLL_REF_CLKP

U5

SSC_DPLL_REF_CLKN

U6

SSC_DPLL_REF_CLKP

V4

BCLKN

V5

BCLKP

FOX_3H993827-4M41-01H _HASWELL

JCPU1I

F17

DDIB_TXBN0

E17

DDIB_TXBP0

G18

DDIB_TXBN1

F18

DDIB_TXBP1

H19

DDIB_TXBN2

G19

DDIB_TXBP2

G20

DDIB_TXBN3

F20

DDIB_TXBP3

E19

DDIC_TXCN0

D19

DDIC_TXCP0

D20

DDIC_TXCN1

C20

DDIC_TXCP1

E21

DDIC_TXCN2

D21

DDIC_TXCP2

D22

DDIC_TXCN3

C22

DDIC_TXCP3

FOX_3H993827-4M41-01H _HASWELL

MISC

THERMAL

PWR

CLK

3

Trace width=12mil, spacing 20mil, max L=500mil

R

100_0402_1%

4

R

75_0402_1%

3

R

100_0402_1%

6

1 2

S

_RCOMP0

M

1 2

S

_RCOMP1

M

1 2

S

_RCOMP2

M

S

_DRAMRST#_R

M

v1.0 update

X

P_PRDY#

D

X

P_PREQ#

D XDP_TCK XDP_TMS XDP_TRST# XDP_TDI XDP_TDO XDP_DBRESET#_R

XDP_OBS0 XDP_OBS1

BPM2# BPM3# BPM4# BPM5# BPM6# BPM7#

R17

24.9_0402_1%

DP_RCOMP

FDI_CTX_PRX_N0 FDI_CTX_PRX_P0 FDI_CTX_PRX_N1 FDI_CTX_PRX_P1

EDP_DISP_UTIL

CPU_EDP_TXN0 CPU_EDP_TXP0 CPU_EDP_TXN1 CPU_EDP_TXP1 CPU_EDP_TXN2 CPU_EDP_TXP2 CPU_EDP_TXN3 CPU_EDP_TXP3

1 2

R

0_0402_5%@

8

T

9

T159

12

C7 0.1U_0402_16V4ZC7 0.1U_0402_16V4Z C8 0.1U_0402_16V4ZC8 0.1U_0402_16V4Z C9 0.1U_0402_16V4ZC9 0.1U_0402_16V4Z C10 0.1U_0402_16V4ZC10 0.1U_0402_16V4Z

DDI

DDR3

JTAG

eDP

S

_RCOMP0

M

S

_RCOMP1

M M

_RCOMP2

S

M

_DRAMRST#

S

R

P PREQ#

TRST#

DBR#

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

DP_RCOMP

FDI0_TX0N0

FDI0_TX0P0

FDI0_TX0N1

FDI0_TX0P1

EDP_DISP_UTIL

DDID_TXDN0 DDID_TXDP0 DDID_TXDN1 DDID_TXDP1 DDID_TXDN2 DDID_TXDP2 DDID_TXDN3 DDID_TXDP3

DY#

TCK

TMS

TDO

R1 P1 R2

AK22

L39 L37 D39 E39 E37 F38

TDI

F39 G40

G39 J39 G38 H37 H38 J38 K39 K37

R4

B14 A14 C13 B13

E16

C15 B15 B16 A16 C17 B17 B18 A18

2

M

_DRAMRST# [10,11]

1 2

AD

P

PAD

T10 PADT10 PAD T11 PADT11 PAD T3 PADT3 PAD T4 PADT4 PAD T5 PADT5 PAD T6 PADT6 PAD T7 PADT7 PAD T8 PADT8 PAD

+VCCIOA

FDI_CTX_PRX_N0 [14] FDI_CTX_PRX_P0 [14] FDI_CTX_PRX_N1 [14] FDI_CTX_PRX_P1 [14]

EDP_DISP_UTIL [29]

1 2 1 2 1 2 1 2

T18 PADT18 PAD T20 PADT20 PAD T22 PADT22 PAD T24 PADT24 PAD

S

C

0.1U_0402_16V4Z@

5

DP_RCOMP trace width=20mil

pacing 25mil length<200mil

s

FDI For VGA

eDP brightness

CPU_EDP_TXN0_C [29] CPU_EDP_TXP0_C [29] CPU_EDP_TXN1_C [29] CPU_EDP_TXP1_C [29]

1

PU/PD for JTAG signals

v0.2 update

X

P_TMS

D

X

P_TDI

D

X

P_PREQ#

D

X

P_TDO

D

X

P_TCK

D

X

P_TRST#

D

XDP_DBRESET#_R

ESD request Close to JCPU1

T

56

1

T

57

1

T

58

1

P

19

R

1 8 2 7 3 6 4 5

51_8P4R_5%

1 2

C2142 0. 1U_0402_16V4Z@E SD@ C2142 0.1U_0402_16V4Z@ESD@

ESD request Close to JCPU1 G40

eDP (To LVDS Converter)

PAD

PAD PAD

PAD

1

.05VS_VCCIO

+

B B

+1.5V

12

R19

1.8K_0402_5%

A A

DRAMPW ROK[14]

12

R21

3.3K_0402_5%

1 2

R20

@R20

@

0_0402_5%

PM_DRAM_PW RGD_R

1

C11

C11 1000P_0402_50V7K

1000P_0402_50V7K

2

@

PDG P132 HSW A0+LPT A0 change R21 to 4.7K, R19 to 3.3K

5

4

v0.2 update

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Haswell_JTAG/XDP/DDI

ZEA00 LA-A061P M/B

5 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

D D

C C

B B

4

JCPU1A

DMI_PTX_CRX_N0[14] DMI_PTX_CRX_N1[14] DMI_PTX_CRX_N2[14] DMI_PTX_CRX_N3[14]

DMI_PTX_CRX_P0[14] DMI_PTX_CRX_P1[14] DMI_PTX_CRX_P2[14] DMI_PTX_CRX_P3[14]

DMI_CTX_PRX_N0[14] DMI_CTX_PRX_N1[14] DMI_CTX_PRX_N2[14] DMI_CTX_PRX_N3[14]

DMI_CTX_PRX_P0[14] DMI_CTX_PRX_P1[14] DMI_CTX_PRX_P2[14] DMI_CTX_PRX_P3[14]

FDI_CSYNC[14] FDI_INT[14]

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CSYNC FDI_INT

T3

DMI_RXN0

V1

DMI_RXN1

V2

DMI_RXN2

W3

DMI_RXN3

U3

DMI_RXP0

U1

DMI_RXP1

W2

DMI_RXP2

Y3

DMI_RXP3

AA5

DMI_TXN0

AB4

DMI_TXN1

AC4

DMI_TXN2

AC2

DMI_TXN3

AA4

DMI_TXP0

AB3

DMI_TXP1

AC5

DMI_TXP2

AC1

DMI_TXP3

D16

FDI_CSYNC

D18

DISP_INT

FOX_3H993827-4M4 1-01H_HASWELL

DMI FDI

3

PEG_RCOMP trace width=12mil spacing 15mil le ngth<400mil

P3 F15

PCIE_GTX_C_CRX_N15

E14

PCIE_GTX_C_CRX_N14

F13

PCIE_GTX_C_CRX_N13

E12

PCIE_GTX_C_CRX_N12

F11

PCIE_GTX_C_CRX_N11

G10

PCIE_GTX_C_CRX_N10

F9

PCIE_GTX_C_CRX_N9

G8

PCIE_GTX_C_CRX_N8

D4

PCIE_GTX_C_CRX_N7

E5

PCIE_GTX_C_CRX_N6

F6

PCIE_GTX_C_CRX_N5

G5

PCIE_GTX_C_CRX_N4

H6

PCIE_GTX_C_CRX_N3

J5

PCIE_GTX_C_CRX_N2

K6

PCIE_GTX_C_CRX_N1

L5

PCIE_GTX_C_CRX_N0

E15

PCIE_GTX_C_CRX_P15

D14

PCIE_GTX_C_CRX_P14

E13

PCIE_GTX_C_CRX_P13

D12

PCIE_GTX_C_CRX_P12

E11

PCIE_GTX_C_CRX_P11

F10

PCIE_GTX_C_CRX_P10

E9

PCIE_GTX_C_CRX_P9

F8

PCIE_GTX_C_CRX_P8

D3

PCIE_GTX_C_CRX_P7

E4

PCIE_GTX_C_CRX_P6

F5

PCIE_GTX_C_CRX_P5

G4

PCIE_GTX_C_CRX_P4

H5

PCIE_GTX_C_CRX_P3

J4

PCIE_GTX_C_CRX_P2

K5

PCIE_GTX_C_CRX_P1

L4

PCIE_GTX_C_CRX_P0

B12

PCIE_CTX_GRX_N15

C11

PCIE_CTX_GRX_N14

D10

PCIE_CTX_GRX_N13

C9

PCIE_CTX_GRX_N12

D8

PCIE_CTX_GRX_N11

C7

PCIE_CTX_GRX_N10

B6

PCIE_CTX_GRX_N9

C5

PCIE_CTX_GRX_N8

E2

PCIE_CTX_GRX_N7

F3

PCIE_CTX_GRX_N6

G2

PCIE_CTX_GRX_N5

H3

PCIE_CTX_GRX_N4

J2

PCIE_CTX_GRX_N3

K3

PCIE_CTX_GRX_N2

M3

PCIE_CTX_GRX_N1

L2

PCIE_CTX_GRX_N0

A12

PCIE_CTX_GRX_P15

B11

PCIE_CTX_GRX_P14

C10

PCIE_CTX_GRX_P13

B9

PCIE_CTX_GRX_P12

C8

PCIE_CTX_GRX_P11

B7

PCIE_CTX_GRX_P10

A6

PCIE_CTX_GRX_P9

B5

PCIE_CTX_GRX_P8

E1

PCIE_CTX_GRX_P7

F2

PCIE_CTX_GRX_P6

G1

PCIE_CTX_GRX_P5

H2

PCIE_CTX_GRX_P4

J1

PCIE_CTX_GRX_P3

K2

PCIE_CTX_GRX_P2

M2

PCIE_CTX_GRX_P1

L1

PCIE_CTX_GRX_P0

PEG_RCOMP

Typ- suggest 220nF. The change in AC capacitor value from 100nF to 220nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)

PEG

PEG_RCOMP

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8

PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15

PEG_RXP0

PEG_RXP1

PEG_RXP2

PEG_RXP3

PEG_RXP4

PEG_RXP5

PEG_RXP6

PEG_RXP7

PEG_RXP8

PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8

PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0

PEG_TXP1

PEG_TXP2

PEG_TXP3

PEG_TXP4

PEG_TXP5

PEG_TXP6

PEG_TXP7

PEG_TXP8

PEG_TXP9

PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

+

V

R

24.9_0402_1%

C2080 0.22U_0402_16V7K@C2080 0.22U_0402_16V7K@ C2081 0.22U_0402_16V7K@C2081 0.22U_0402_16V7K@ C2082 0.22U_0402_16V7K@C2082 0.22U_0402_16V7K@ C2083 0.22U_0402_16V7K@C2083 0.22U_0402_16V7K@ C2084 0.22U_0402_16V7K@C2084 0.22U_0402_16V7K@ C2085 0.22U_0402_16V7K@C2085 0.22U_0402_16V7K@ C2086 0.22U_0402_16V7K@C2086 0.22U_0402_16V7K@ C2087 0.22U_0402_16V7K@C2087 0.22U_0402_16V7K@ C12 0.22U_0402_16V7KDIS@C12 0.22U_0402_16V7KDIS@ C13 0.22U_0402_16V7KDIS@C13 0.22U_0402_16V7KDIS@ C14 0.22U_0402_16V7KDIS@C14 0.22U_0402_16V7KDIS@ C15 0.22U_0402_16V7KDIS@C15 0.22U_0402_16V7KDIS@ C16 0.22U_0402_16V7KDIS@C16 0.22U_0402_16V7KDIS@ C17 0.22U_0402_16V7KDIS@C17 0.22U_0402_16V7KDIS@ C18 0.22U_0402_16V7KDIS@C18 0.22U_0402_16V7KDIS@ C19 0.22U_0402_16V7KDIS@C19 0.22U_0402_16V7KDIS@ C2088 0.22U_0402_16V7K@C2088 0.22U_0402_16V7K@ C2089 0.22U_0402_16V7K@C2089 0.22U_0402_16V7K@ C2090 0.22U_0402_16V7K@C2090 0.22U_0402_16V7K@ C2091 0.22U_0402_16V7K@C2091 0.22U_0402_16V7K@ C2092 0.22U_0402_16V7K@C2092 0.22U_0402_16V7K@ C2093 0.22U_0402_16V7K@C2093 0.22U_0402_16V7K@ C2094 0.22U_0402_16V7K@C2094 0.22U_0402_16V7K@ C2095 0.22U_0402_16V7K@C2095 0.22U_0402_16V7K@ C20 0.22U_0402_16V7KDIS@C20 0.22U_0402_16V7KDIS@ C21 0.22U_0402_16V7KDIS@C21 0.22U_0402_16V7KDIS@ C22 0.22U_0402_16V7KDIS@C22 0.22U_0402_16V7KDIS@ C23 0.22U_0402_16V7KDIS@C23 0.22U_0402_16V7KDIS@ C24 0.22U_0402_16V7KDIS@C24 0.22U_0402_16V7KDIS@ C25 0.22U_0402_16V7KDIS@C25 0.22U_0402_16V7KDIS@ C26 0.22U_0402_16V7KDIS@C26 0.22U_0402_16V7KDIS@ C27 0.22U_0402_16V7KDIS@C27 0.22U_0402_16V7KDIS@

CCIOA

2

12

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

2

Reserve for x16 GPU

PCIE_CTX_C_GRX_N15 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_N10

PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_N6 PCIE_CTX_C_GRX_N5 PCIE_CTX_C_GRX_N4 PCIE_CTX_C_GRX_N3 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_N1

PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_P10

PCIE_CTX_C_GRX_P9

PCIE_CTX_C_GRX_P8

PCIE_CTX_C_GRX_P7

PCIE_CTX_C_GRX_P6

PCIE_CTX_C_GRX_P5

PCIE_CTX_C_GRX_P4

PCIE_CTX_C_GRX_P3

PCIE_CTX_C_GRX_P2

PCIE_CTX_C_GRX_P1

PCIE_CTX_C_GRX_P0

C

IE_GTX_C_CRX_N[0..15]

P

IE_GTX_C_CRX_P[0..15]

C

P

IE_CTX_C_GRX_N[0..15]

C

IE_CTX_C_GRX_P[0..15]

P

Reserve for x16 GPU

1

C

IE_GTX_C_CRX_N[0..15] [21]

P

IE_GTX_C_CRX_P[0..15] [21]

C

P

IE_CTX_C_GRX_N[0..15] [21]

C

IE_CTX_C_GRX_P[0..15] [21]

P

A A

Security Classif ication

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered D ate

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Haswell_DMI/PEG/FDI

ZEA00 LA-A061P M/B

1

6 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

D

R_A_D[0..63][10]

D

J

D

R_A_D0

D

R_A_D1

D

R_A_D2

D

R_A_D3

D

R_A_D4

D

R_A_D5

D

R_A_D6

D

R_A_D7

D D

C C

B B

D

R_A_D8

D

R_A_D9

D

R_A_D10

D

R_A_D11

D DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AD38

A

_DQ0

S

AD39

S

_DQ1

A

AF38

S

_DQ2

A

AF39

S

_DQ3

A

AD37

A

_DQ4

S

AD40

S

_DQ5

A

AF37

A

_DQ6

S

AF40

S

_DQ7

A

AH40

A

_DQ8

S

AH39

S

_DQ9

A

AK38

A

_DQ10

S

AK39

SA_DQ11

AH37

SA_DQ12

AH38

SA_DQ13

AK37

SA_DQ14

AK40

SA_DQ15

AM40

SA_DQ16

AM39

SA_DQ17

AP38

SA_DQ18

AP39

SA_DQ19

AM37

SA_DQ20

AM38

SA_DQ21

AP37

SA_DQ22

AP40

SA_DQ23

AV37

SA_DQ24

AW37

SA_DQ25

AU35

SA_DQ26

AV35

SA_DQ27

AT37

SA_DQ28

AU37

SA_DQ29

AT35

SA_DQ30

AW35

SA_DQ31

AY6

SA_DQ32

AU6

SA_DQ33

AV4

SA_DQ34

AU4

SA_DQ35

AW6

SA_DQ36

AV6

SA_DQ37

AW4

SA_DQ38

AY4

SA_DQ39

AR1

SA_DQ40

AR4

SA_DQ41

AN3

SA_DQ42

AN4

SA_DQ43

AR2

SA_DQ44

AR3

SA_DQ45

AN2

SA_DQ46

AN1

SA_DQ47

AL1

SA_DQ48

AL4

SA_DQ49

AJ3

SA_DQ50

AJ4

SA_DQ51

AL2

SA_DQ52

AL3

SA_DQ53

AJ2

SA_DQ54

AJ1

SA_DQ55

AG1

SA_DQ56

AG4

SA_DQ57

AE3

SA_DQ58

AE4

SA_DQ59

AG2

SA_DQ60

AG3

SA_DQ61

AE2

SA_DQ62

AE1

SA_DQ63

AW33

SA_ECC_CB0

AV33

SA_ECC_CB1

AU31

SA_ECC_CB2

AV31

SA_ECC_CB3

AT33

SA_ECC_CB4

AU33

SA_ECC_CB5

AT31

SA_ECC_CB6

AW31

SA_ECC_CB7

FOX_3H993827-4M41-01H _HASWELL

J

S

_CKN0

A S

A

S

_CKN1

A

S

_CKN2

A

S

_CKN3

A

S

_CKE0

A A

_CKE1

S SA_CKE2 SA_CKE3

SA_CS0# SA_CS1# SA_CS2#

SA_CS3# SA_ODT0 SA_ODT1 SA_ODT2 SA_ODT3

SA_BS0 SA_BS1 SA_BS2

SA_RAS#

SA_WE#

SA_CAS#

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7 SA_DQSN8

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7 SA_DQSP8

SM_VREF

SA_DIMM_VREFDQ

C

A

PU1C

_CK0

_CK1

_CK2

_CK3

4

AY15

D

RA_CLK0

D

AY16

D

RA_CLK0#

D

AW15

D

RA_CLK1

D

AV15

D

RA_CLK1#

D

AV14 AW14 AW13 AY13

AV22

D

RA_CKE0

D

AT23

D

RA_CKE1

D

AU22 AU23

AU14

DDRA_SCS0#

AV9

DDRA_SCS1#

AU10 AW8 AW10

DDRA_ODT0

AY8

DDRA_ODT1

AW9 AU8 AV12

DDR_A_BS0

AY11

DDR_A_BS1

AT21

DDR_A_BS2

AU12

DDR_A_RAS#

AU11

DDR_A_W E#

AU9

DDR_A_CAS#

AU13

DDR_A_MA0

AV16

DDR_A_MA1

AU16

DDR_A_MA2

AW17

DDR_A_MA3

AU17

DDR_A_MA4

AW18

DDR_A_MA5

AV17

DDR_A_MA6

AT18

DDR_A_MA7

AU18

DDR_A_MA8

AT19

DDR_A_MA9

AW11

DDR_A_MA10

AV19

DDR_A_MA11

AU19

DDR_A_MA12

AY10

DDR_A_MA13

AT20

DDR_A_MA14

AU21

DDR_A_MA15

AE38

DDR_A_DQS#0

AJ38

DDR_A_DQS#1

AN38

DDR_A_DQS#2

AU36

DDR_A_DQS#3

AW5

DDR_A_DQS#4

AP2

DDR_A_DQS#5

AK2

DDR_A_DQS#6

AF2

DDR_A_DQS#7

AU32

AE39

DDR_A_DQS0

AJ39

DDR_A_DQS1

AN39

DDR_A_DQS2

AV36

DDR_A_DQS3

AV5

DDR_A_DQS4

AP3

DDR_A_DQS5

AK3

DDR_A_DQS6

AF3

DDR_A_DQS7

AV32

+V_SM_VREF should have 20 mil trace width

AB38

AB39

+VREF_DQA_R

C31 0.1U_0402_16V4Z@C31 0.1U_0402_16V4Z

1

@

2

1 2

R24 2_0402_1%R 24 2_0402_1%

1

C29

0.022U_0402_25V7K

2

12

R27

24.9_0402_1%

D

RA_CLK0 [10]

D

RA_CLK0# [10]

D

RA_CLK1 [10]

D D

RA_CLK1# [10]

D

RA_CKE0 [10]

D D

RA_CKE1 [10]

D

DDRA_SCS0# [10] DDRA_SCS1# [10]

DDRA_ODT0 [10] DDRA_ODT1 [10]

DDR_A_BS0 [10] DDR_A_BS1 [10] DDR_A_BS2 [10]

DDR_A_RAS# [10] DDR_A_W E# [10] DDR_A_CAS# [10] DDR_A_MA[0..15] [10]

DDR_A_DQS#[0..7] [10]

DDR_A_DQS[0..7] [10]

+VREF_DQA

@

0.1U_0402_16V4Z

C28

+V_SM_VREF

1

C30

2

12

R28

0.022U_0402_25V7K

24.9_0402_1%

3

D

R_B_D[0..63][11]

D

1 2

R23 2_0402_1%R 23 2_0402_1%

1 2

R26 2_0402_1%R 26 2_0402_1%

+VREF_CAA

+VREF_CAB

D

R_B_D0

D

R_B_D1

D

R_B_D2

D

R_B_D3

D

R_B_D4

D

R_B_D5

D

R_B_D6

D

R_B_D7

D

R_B_D8

D

R_B_D9

D

R_B_D10

D

R_B_D11

D DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

2

AE34

B

_DQ0

S

AE35

S

_DQ1

B

AG35

S

_DQ2

B

AH35

S

_DQ3

B

AD34

B

_DQ4

S

AD35

S

_DQ5

B

AG34

B

_DQ6

S

AH34

S

_DQ7

B

AL34

B

_DQ8

S

AL35

S

_DQ9

B

AK31

B

_DQ10

S

AL31

SB_DQ11

AK34

SB_DQ12

AK35

SB_DQ13

AK32

SB_DQ14

AL32

SB_DQ15

AN34

SB_DQ16

AP34

SB_DQ17

AN31

SB_DQ18

AP31

SB_DQ19

AN35

SB_DQ20

AP35

SB_DQ21

AN32

SB_DQ22

AP32

SB_DQ23

AM29

SB_DQ24

AM28

SB_DQ25

AR29

SB_DQ26

AR28

SB_DQ27

AL29

SB_DQ28

AL28

SB_DQ29

AP29

SB_DQ30

AP28

SB_DQ31

AR12

SB_DQ32

AP12

SB_DQ33

AL13

SB_DQ34

AL12

SB_DQ35

AR13

SB_DQ36

AP13

SB_DQ37

AM13

SB_DQ38

AM12

SB_DQ39

AR9

SB_DQ40

AP9

SB_DQ41

AR6

SB_DQ42

AP6

SB_DQ43

AR10

SB_DQ44

AP10

SB_DQ45

AR7

SB_DQ46

AP7

SB_DQ47

AM9

SB_DQ48

AL9

SB_DQ49

AL6

SB_DQ50

AL7

SB_DQ51

AM10

SB_DQ52

AL10

SB_DQ53

AM6

SB_DQ54

AM7

SB_DQ55

AH6

SB_DQ56

AH7

SB_DQ57

AE6

SB_DQ58

AE7

SB_DQ59

AJ6

SB_DQ60

AJ7

SB_DQ61

AF6

SB_DQ62

AF7

SB_DQ63

AM26

SB_ECC_CB0

AM25

SB_ECC_CB1

AP25

SB_ECC_CB2

AP26

SB_ECC_CB3

AL26

SB_ECC_CB4

AL25

SB_ECC_CB5

AR26

SB_ECC_CB6

AR25

SB_ECC_CB7

FOX_3H993827-4M41-01H _HASWELL

SB_DIMM_VREFDQ

J

PU1D

C

B

_CK0

S

_CKN0

B S

_CK1

B

S

_CKN1

B

_CK2

S

_CKN2

B

_CK3

S

_CKN3

B

S

_CKE0

B B

_CKE1

S SB_CKE2 SB_CKE3

SB_CS0# SB_CS1# SB_CS2#

SB_CS3# SB_ODT0 SB_ODT1 SB_ODT2 SB_ODT3

SB_BS0 SB_BS1 SB_BS2

SB_RAS#

SB_WE#

SB_CAS#

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7 SB_DQSN8

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7 SB_DQS8

AM20 AM21 AP22 AP21 AN20 AN21 AP19 AP20

AW29 AY29 AU28 AU29

AP17 AN15 AN17 AL15 AM17 AL16 AM16 AK15 AK17 AL18 AW28

AM18 AK16 AP16

AL19 AK23 AM22 AM23 AP23 AL23 AY24 AV25 AU26 AW25 AP18 AY25 AV26 AR15 AV27 AY28

AF34 AK33 AN33 AN29 AN13 AR8 AM8 AG6 AN26

AF35 AL33 AP33 AN28 AN12 AP8 AL8 AG7 AN25

AB40

@

C33 0.1U_0402_16V4Z@C33 0.1U_0402_16V4Z

D

RB_CLK0

D

RB_CLK0#

D

RB_CLK1

D

RB_CLK1#

D

RB_CKE0

D

RB_CKE1

D

DDRB_SCS0# DDRB_SCS1#

DDRB_ODT0 DDRB_ODT1

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_RAS# DDR_B_W E# DDR_B_CAS#

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

+VREF_DQB_R

1

2

12

2

1 2

R25 2_0402_1%R 25 2_0402_1%

C32

0.022U_0402_25V7K

R29

24.9_0402_1%

1

D

RB_CLK0 [11]

D

RB_CLK0# [11]

D

RB_CLK1 [11]

D D

RB_CLK1# [11]

D

RB_CKE0 [11]

D D

RB_CKE1 [11]

D

DDRB_SCS0# [11] DDRB_SCS1# [11]

DDRB_ODT0 [11] DDRB_ODT1 [11]

DDR_B_BS0 [11] DDR_B_BS1 [11] DDR_B_BS2 [11]

DDR_B_RAS# [11] DDR_B_W E# [11] DDR_B_CAS# [11]

DDR_B_MA[0..15] [11]

DDR_B_DQS#[0..7] [11]

DDR_B_DQS[0..7] [11]

+VREF_DQB

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Haswell_DDR3

ZEA00 LA-A061P M/B

7 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

C

PU_CORE

+

D D

C C

B B

4

D27

C

V

D29

C

V

D31

V

C

D33

V

C

D35

V

C

E24

C

V

E25

V

C

E26

C

V

E27

V

C

E28

C

V

E29

V

C

E30

C

V

E31

VCC

E32

VCC

E33

VCC

E34

VCC

E35

VCC

F23

VCC

F25

VCC

F27

VCC

F29

VCC

F31

VCC

F33

VCC

F35

VCC

G22

VCC

G23

VCC

G24

VCC

G25

VCC

G26

VCC

G27

VCC

G28

VCC

G29

VCC

G30

VCC

G31

VCC

G32

VCC

G33

VCC

G34

VCC

G35

VCC

H23

VCC

H25

VCC

H27

VCC

H29

VCC

H31

VCC

H33

VCC

H35

VCC

J21

VCC

J22

VCC

J23

VCC

J24

VCC

J25

VCC

J26

VCC

J27

VCC

J28

VCC

J29

VCC

J30

VCC

J31

VCC

J32

VCC

J33

VCC

J34

VCC

J35

VCC

K19

VCC

K21

VCC

K23

VCC

K25

VCC

K27

VCC

K29

VCC

K31

VCC

K33

VCC

K35

VCC

L15

VCC

L16

VCC

L17

VCC

L18

VCC

L19

VCC

L20

VCC

L21

VCC

L22

VCC

L23

VCC

L24

VCC

L25

VCC

L26

VCC

L27

VCC

L28

VCC

L29

VCC

L30

VCC

L31

VCC

L32

VCC

FOX_3H993827-4M41-01H _HASWELL

C

PU1E

J

D

V

D

V V

D

V

D

V

D D

V V

D D

V V

D D

V V

D D

V VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCCIO_OUT

VCOMP_OUT

VIDSCLK VIDSOUT

VIDALERT#

VSS_SENSE VCC_SENSE

PWR_DEBUG

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

3

+1.5V Decoupling:

AJ12

DQ

AJ13

DQ

AJ15

DQ

AJ17

DQ

AJ20

DQ

AJ21

DQ

AJ24

DQ

AJ25

DQ

AJ28

DQ

AJ29

DQ

AJ9

DQ

AT17

DQ

AT22 AU15 AU20 AU24 AV10 AV11 AV13 AV18 AV23 AV8 AW16 AY12 AY14 AY9

+VCCIO_OUT

L40 P4

C38

VR_SVID_CLK_R

C37

VR_SVID_DAT_R

B37

H_CPU_SVIDALRT#

F40 E40

N40

CPU_PW RDB CPU_PW RDB

A24 A25 A26 A27 A28 A29 A30 B25 B27 B29 B31 B33 B35 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 D25 P8 M8 M33 M29 M27 M25 M23 M21 M19 M17 M15 M13 L34 L33

22U_0805_6.3V6M

1

3

4

C

2

22U_0805_6.3V6M

+1.05VS_VCCIO

R32

R32 110_0402_5%

110_0402_5%

+VCCIOA

R34 0_0402_5%@R34 0_0402_5%@

1 2 1 2

1 2

R35 0_0402_5%@R35 0_0402_5%@ R36 43_0402_1%R36 43_0402_1%

T135 PADT135 PA D

+CPU_CORE

22U_0805_6.3V6M

1

3

5

3

6

7

C

2

22U_0805_6.3V6M

Pull high resistor close to CPU SVID signal 50 ohm impedance spacing >12mil length 3-6"

12

R33

R33 75_0402_5%

75_0402_5%

22U_0805_6.3V6M

1

3

8

C

2

22U_0805_6.3V6M

100_0402_1%

1

3

9

2

VR_SVID_CLK [50] VR_SVID_DAT [50] VR_SVID_ALRT# [50]

12

R37100_0402_1% R37100_0402_1%

12

R39

R37,R39 close to CPU

1X 390U , 9X 22U,5*10U

22U_0805_6.3V6M

1

4

1

0

C

22U_0805_6.3V6M

C

2

+VCCIO_OUT +1.05VS_VCCIO +1.05VS_VPCH

VSS_SENSE [50] VCC_SENSE [50]

+CPU_CORE

2

1

.5V

+

@

R30

R30 0_0603_5%

0_0603_5%

1

+

4

5

C

C 390U 2.5V M ESR1 0

390U 2.5V M ESR1 0

2

v0.2 update

1 2

R31

@R31

@

0_0603_5%

1

4

2

22U_0805_6.3V6M

1 2

+1.05VS_VCCIOA(PEG,FDI RCOMP pull high PWR)

+1.05VS_VPCH

12

R38

R38 150_0402_1%

150_0402_1%

12

@

R40

R40 10K_0402_5%

10K_0402_5%

10U_0603_6.3V6M

1

2

071

C

2

10U_0603_6.3V6M

1

2

072

C

2

10U_0603_6.3V6M

1

10U_0603_6.3V6M

1

2

073

074

C

2

1

2

075

C

2

10U_0603_6.3V6M

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Haswell_POWER

ZEA00 LA-A061P M/B

8 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

C

PU1F

J

AK19

S

V

AK24

S

V

AK25

S

V

AK26

S

V

AK27

V

S

AK28

V

S

AK29

V

S

AK30

S

V

AK36

V

S

AK4

S

V

AK5

D D

C C

B B

V

S

AK6

S

V

AK7

V

S

AK8

S

V

AK9

VSS

AL11

VSS

AL14

VSS

AL17

VSS

AL21

VSS

AL22

VSS

AL24

VSS

AL27

VSS

AL30

VSS

AL36

VSS

AL37

VSS

AL38

VSS

AL39

VSS

AL40

VSS

AL5

VSS

AM1

VSS

AM11

VSS

AM14

VSS

AM15

VSS

AM19

VSS

AM2

VSS

AM24

VSS

AM27

VSS

AM3

VSS

AM30

VSS

AM31

VSS

AM32

VSS

AM33

VSS

AM34

VSS

AM35

VSS

AM36

VSS

AM4

VSS

AM5

VSS

AN10

VSS

AN11

VSS

AN14

VSS

AN16

VSS

AN18

VSS

AN19

VSS

AN22

VSS

AN23

VSS

AN24

VSS

AN27

VSS

AN30

VSS

AN36

VSS

AN37

VSS

AN40

VSS

AN5

VSS

AN6

VSS

AN7

VSS

AN8

VSS

AN9

VSS

AP1

VSS

AP11

VSS

AP14

VSS

AP15

VSS

AP24

VSS

AP27

VSS

AP30

VSS

AP36

VSS

AP4

VSS

AP5

VSS

AR11

VSS

AR14

VSS

AR16

VSS

AR17

VSS

FOX_3H993827-4M41-01H _HASWELL

V V V V V V V V V V V V V V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AB37

S

AB5

S

AB6

S

AB7

S

AC3

S

AC33

S

AC34

S

AC35

S

AC36

S

AC37

S

AC38

S

AC39

S

AC40

S

AC6

S

AC7 AD1 AD2 AD3 AD33 AD36 AD4 AD5 AD6 AD7 AD8 AE33 AE36 AE37 AE40 AE5 AE8 AF1 AF33 AF36 AF4 AF5 AF8 AG33 AG36 AG37 AG38 AG39 AG40 AG5 AG8 AH1 AH2 AH3 AH33 AH36 AH4 AH5 AH8 AJ11 AJ14 AJ16 AJ18 AJ19 AJ22 AJ23 AJ26 AJ27 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 AJ36 AJ37 AJ40 AJ5 AJ8 AK1 AK10 AK11 AK12 AK13 AK14 AK18

B28

S

V

B30

S

V

B32

S

V

B34

S

V

B36

V

S

B4

V

S

B8

V

S

C12

S

V

C14

V

S

C16

S

V

C18

V

S

C19

S

V

C21

V

S

C23

S

V

C3

VSS

C36

VSS

C4

VSS

C6

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D2

VSS

D23

VSS

D24

VSS

D26

VSS

D28

VSS

D30

VSS

D32

VSS

D34

VSS

D36

VSS

D37

VSS

D5

VSS

D6

VSS

D7

VSS

D9

VSS

E10

VSS

E18

VSS

E20

VSS

E22

VSS

E23

VSS

E3

VSS

E36

VSS

E38

VSS

E6

VSS

E7

VSS

E8

VSS

F1

VSS

F12

VSS

F14

VSS

F16

VSS

F19

VSS

F21

VSS

F22

VSS

F24

VSS

F26

VSS

F28

VSS

F30

VSS

F32

VSS

F34

VSS

F36

VSS

F4

VSS

F7

VSS

G11

VSS

G12

VSS

G13

VSS

G14

VSS

G15

VSS

G16

VSS

G17

VSS

G21

VSS

G3

VSS

G36

VSS

G37

VSS

G6

VSS

G7

VSS

G9

VSS

H1

VSS

H10

VSS

H11

VSS

H13

VSS

FOX_3H993827-4M41-01H _HASWELL

J

4

C

PU1G

V V V V V V V V V V V V V V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AR18

S

AR19

S

AR20

S

AR21

S

AR22

S

AR23

S

AR24

S

AR27

S

AR30

S

AR31

S

AR32

S

AR33

S

AR34

S

AR35

S

AR36 AR37 AR38 AR39 AR40 AR5 AT1 AT10 AT11 AT12 AT13 AT14 AT15 AT16 AT2 AT24 AT25 AT26 AT27 AT28 AT29 AT3 AT30 AT32 AT34 AT36 AT38 AT39 AT4 AT5 AT6 AT7 AT8 AT9 AU2 AU25 AU3 AU30 AU34 AU38 AU5 AU7 AV21 AV28 AV3 AV30 AV34 AV38 AV7 AW26 AW3 AW30 AW32 AW34 AW36 AW7 AY17 AY23 AY26 AY27 AY30 AY5 AY7 B10 B23 B24 B26

N34

S

V

N39

S

V

N4

S

V

N6

S

V

N7

V

S

N8

V

S

P2

V

S

P34

S

V

P35

V

S

P38

S

V

P39

V

S

P40

S

V

P5

V

S

P7

S

V

R3

VSS

R35

VSS

R37

VSS

R38

VSS

R39

VSS

R40

VSS

R5

VSS

R6

VSS

R7

VSS

R8

VSS

T1

VSS

T2

VSS

T33

VSS

T36

VSS

T37

VSS

T38

VSS

T39

VSS

T4

VSS

T5

VSS

T6

VSS

T7

VSS

U2

VSS

U33

VSS

U34

VSS

U35

VSS

U36

VSS

U37

VSS

U4

VSS

U7

VSS

V3

VSS

V33

VSS

V34

VSS

V40

VSS

V6

VSS

V7

VSS

V8

VSS

W1

VSS

W33

VSS

W35

VSS

W37

VSS

W4

VSS

W7

VSS

Y33

VSS

Y4

VSS

Y5

VSS

Y6

VSS

A15

VSS

A17

VSS

A23

VSS

A5

VSS

A7

VSS

AA3

VSS

AA33

VSS

AA35

VSS

AA38

VSS

AA6

VSS

AA7

VSS

AA8

VSS

AB34

VSS

AU40

VSS_NCTF

AV39

VSS_NCTF

AW38

VSS_NCTF

AY3

VSS_NCTF

B38

VSS_NCTF

B39

VSS_NCTF

C40

VSS_NCTF

D40

VSS_NCTF

FOX_3H993827-4M41-01H _HASWELL

C

PU1H

J

A11

S

V

A13

S

V

H17

S

V

H18

S

V

H20

V

S

H21

V

S

H22

V

S

H24

S

V

H26

V

S

H28

S

V

H30

V

S

H32

S

V

H34

V

S

H36

S

V

H39

VSS

H4

VSS

H7

VSS

H8

VSS

H9

VSS

J11

VSS

J14

VSS

J18

VSS

J19

VSS

J20

VSS

J3

VSS

J36

VSS

J37

VSS

J6

VSS

J7

VSS

K1

VSS

K10

VSS

K14

VSS

K15

VSS

K16

VSS

K17

VSS

K18

VSS

K20

VSS

K22

VSS

K24

VSS

K26

VSS

K28

VSS

K30

VSS

K32

VSS

K34

VSS

K36

VSS

K4

VSS

K40

VSS

K7

VSS

L11

VSS

L13

VSS

L14

VSS

L3

VSS

L35

VSS

L36

VSS

L38

VSS

L6

VSS

L7

VSS

L8

VSS

L9

VSS

M1

VSS

M12

VSS

M14

VSS

M16

VSS

M18

VSS

M20

VSS

M22

VSS

M24

VSS

M26

VSS

M28

VSS

M30

VSS

M32

VSS

M34

VSS

M35

VSS

M37

VSS

M4

VSS

M40

VSS

M5

VSS

M6

VSS

M7

VSS

M9

VSS

N1

VSS

N2

VSS

N3

VSS

N33

VSS

3

T

5 PAD

2

T

6 PAD

2

T

7 PAD

2

T

8 PAD

2

T

9 PAD

2

2 3

3

0 PAD

T

2 PAD

3

3 3

3

3 PAD

T

4 PAD

3

3 3

3

5 PAD

T

6 PAD

3

3 3

3

7 PAD

T

T38 PADT38 PAD

T39 PADT39 PAD

T40 PADT40 PAD

T41 PADT41 PAD

T42 PADT42 PAD

T43 PADT43 PAD

T44 PADT44 PAD

T45 PADT45 PAD

T46 PADT46 PAD

T136PADT136PAD

T137PADT137PAD

T138PADT138PAD

T140PADT140PAD

T139PADT139PAD

T141PADT141PAD

T142PADT142PAD

T143PADT143PAD

T144PADT144PAD

T145PADT145PAD

T146PADT146PAD

T147PADT147PAD

T148PADT148PAD

T149PADT149PAD

T150PADT150PAD

T151PADT151PAD

T152PADT152PAD

T153PADT153PAD

T154PADT154PAD

T155PADT155PAD

R52

49.9_0402_1%

CPU_A4 CPU_AV1 CPU_AW 2 CPU_B3

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG_RCOMP

12

C

PU1J

J

R36

S

VD_TP

R

P37

S

VD_TP

R

N38

R

VD_TP

S

N36

R

VD_TP

S

K8

R

VD_TP

S

K13

S

VD_TP

R

K12

R

VD_TP

S

K11

S

VD_TP

R

J8

R

VD_TP

S

J16

S

VD_TP

R

J13

R

VD_TP

S

J12

S

VD_TP

R

J10

RSVD_TP

H16

RSVD_TP

D1

RSVD_TP

C39

RSVD_TP

C2

RSVD_TP

A4

RSVD_TP

AV1

RSVD_TP

AW2

RSVD_TP

B3

RSVD_TP

AA37

CFG0

Y38

CFG1

AA36

CFG2

W38

CFG3

V39

CFG4

U39

CFG5

U40

CFG6

V38

CFG7

T40

CFG8

Y35

CFG9

AA34

CFG10

V37

CFG11

Y34

CFG12

U38

CFG13

W34

CFG14

V35

CFG15

Y37

CFG16

Y36

CFG17

W36

CFG18

V36

CFG19

H40

CFG_RCOMP

FOX_3H993827-4M41-01H _HASWELL

0828

S

R

S

R R

S

R

S

R

S S

R R

S S

R R

S S

R R

S S

R RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

FC_AB8

FC_K9 FC_Y7

TESTLO_N5 TESTLO_P6

VD VD VD VD VD VD VD VD VD VD VD VD

2

AB33 AB36 Y8 W8 U8 T8 T35 T34 R34 R33 P33 N35 M38 M11 M10 L12 L10 J9 J40 J17 J15 H15 H14 H12 AY18 AW27 AW24 AW23 AC8 AK20 AL20 AT40 AU1 AU27 AU39 AV2 AV20 AV24 AV29 AW12

AB8

+VCCIO2PCH

K9

+VCCST

Y7

VCCST_PW RGD

N5

TESTLO_N5

P6

TESTLO_P6

F

G Straps for Processor

C

(CFG[19:0] internal pull high to VCCIO)

C C C

C

U_T8

P

1 2

C

U_N35

P

@

0.1U_0402_16V4Z

C46

@

1

2

R47

@R47

@

12

R51

R50

49.9_0402_1%

+

1

R45 0_0603_5%

1 2

12

0828

3

1PAD

T

.05VS_VPCH

4.7U_0603_10V6K

0_0402_5%

12

C

+VCCST +PCH_VPROC

1

C47

2

+VCCST

1 2

R49

R48

2.67K_0402_1%

1

1 2

G2

F

R

1 1K_0402_1%

4

1 2

G3

F

R

2 1K_0402_1%@

4

1 2

G5

F

R

3 1K_0402_1%

4

1 2

G6

F

R

4 1K_0402_1%@

4

R46

@R46

@

0_0603_5%

1 2

0.1U_0402_16V4Z

C48

1

2

PM_PWR OK [14,43]

6.04K_0402_1%

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Haswell_GND/CFG

ZEA00 LA-A061P M/B

1

0.3

9 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

D

R_A_DQS[0..7][7]

D

R_A_DQS#[0..7][7]

D

R_A_D[0..63][7]

D

R_A_MA[0..15][7]

D

R

26

6

1K_0402_1%

1 2

+

.5V

1

1K_0402_1%

D D

C C

B B

1K_0402_1%

SPD setting (SA0, SA1) PU/PD by Channel A/B

->Channel A 00

->Channel B 01

R

27

6

+

V

12

0.1U_0402_16V4Z

Close to JDIMM1

DDRA_CLK0#[7]

DDRA_SCS1#[7]

+3VS

REF_DQA

C2

C2 030

030

DDRA_CKE0[7]

DDR_A_BS2[7]

DDRA_CLK0[7]

DDR_A_BS0[7]

DDR_A_WE#[7]

DDR_A_CAS#[7]

@

+

REF_DQA

V

D

R_A_D0

D

2.2U_0603_6.3V6K

D

R_A_D1

D

C2

1

031

2

2.2U_0603_6.3V6K

D

R_A_D2

D D

R_A_D3

D

R_A_D8

D

DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDRA_CKE0

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDRA_CLK0 DDRA_CLK0#

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13

DDRA_SCS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

0.1U_0402_16V4Z

C2

C2049

1

048

12

R630

@

2

@

2

0_0402_5%

+0.75VS

C

A SO-DIMM 0(A0)

H

+

.5V

1

J

D

1

V

3

V

5

D

7

D

9

V

11

D

13

V

15

D

17

D

19

V

21

D

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U2SN-7F

ONN@

C

IMM1

R S Q Q S M S Q Q S Q

EF_DQ

S2

0 1

S4

0

S5

2 3

S7

8

V

D

Q

D

V

V D DQ13

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

S D D

S

S#0 Q

S D D

S Q

DM1

DM2

A15

A14

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

4

+

.5V

1

2

S1

4

D

R_A_D4

4

Q

5

Q S3

S0 S6

6

Q Q

7

S8

12

A7

A6 A4

A2 A0

G2

D

6

D

R_A_D5

D

8 10

D

R_A_DQS#0

D

12

D

R_A_DQS0

D

14 16

D

R_A_D6

D

18

D

R_A_D7

D

20 22

D

R_A_D12

D

24

DDR_A_D13

26 28 30

SM_DRAMRST#

32 34

DDR_A_D14

36

DDR_A_D15

38 40

DDR_A_D20

42

DDR_A_D21

44 46 48 50

DDR_A_D22

52

DDR_A_D23

54 56

DDR_A_D28

58

DDR_A_D29

60 62

DDR_A_DQS#3

64

DDR_A_DQS3

66 68

DDR_A_D30

70

DDR_A_D31

72

74

DDRA_CKE1

76 78

DDR_A_MA15

80

DDR_A_MA14

82 84

DDR_A_MA11

86

DDR_A_MA7

88 90

DDR_A_MA6

92

DDR_A_MA4

94 96

DDR_A_MA2

98

DDR_A_MA0

100 102

DDRA_CLK1

104

DDRA_CLK1#

106 108

DDR_A_BS1

110

DDR_A_RAS#

112 114

DDRA_SCS0#

116

DDRA_ODT0

118 120

DDRA_ODT1

122 124 126

+VREF_CAA

128 130

DDR_A_D36

132

DDR_A_D37

134 136 138 140

DDR_A_D38

142

DDR_A_D39

144 146

DDR_A_D44

148

DDR_A_D45

150 152

DDR_A_DQS#5

154

DDR_A_DQS5

156 158

DDR_A_D46

160

DDR_A_D47

162 164

DDR_A_D52

166

DDR_A_D53

168 170 172 174

DDR_A_D54

176

DDR_A_D55

178 180

DDR_A_D60

182

DDR_A_D61

184 186

DDR_A_DQS#7

188

DDR_A_DQS7

190 192

DDR_A_D62

194

DDR_A_D63

196 198 200

PM_SMBDATA

202

PM_SMBCLK

204

+0.75VS

206

SM_DRAMRST# [11,5]

DDRA_CKE1 [7]

DDRA_CLK1 [7] DDRA_CLK1# [7]

DDR_A_BS1 [7] DDR_A_RAS# [7]

DDRA_SCS0# [7] DDRA_ODT0 [7]

DDRA_ODT1 [7]

0.1U_0402_16V4Z

2.2U_0603_6.3V6K

C2045

C2044

1

2

close to JDIMM1.126

PM_SMBDATA [11,13,40,5] PM_SMBCLK [11,13,40,5]

Layout Note: Place near JDIMM1

+1.5V

+

1 2

C2032 390U 2.5V M ESR10

1 2

C2033 10U _0805_6.3V6MC2033 10U_0805_6.3V6M

1 2

C2034 10U _0805_6.3V6MC2034 10U_0805_6.3V6M

1 2

C2035 10U _0805_6.3V6MC2035 10U_0805_6.3V6M

+1.5V

1 2

C2036 0. 1U_0402_16V4ZC2036 0.1U_0402_16V4Z

1 2

C2037 0. 1U_0402_16V4ZC2037 0.1U_0402_16V4Z

1 2

C2038 0. 1U_0402_16V4ZC2038 0.1U_0402_16V4Z

1 2

C2039 0. 1U_0402_16V4ZC2039 0.1U_0402_16V4Z

1 2

C2040 0. 1U_0402_16V4ZC2040 0.1U_0402_16V4Z

1 2

C2041 0. 1U_0402_16V4ZC2041 0.1U_0402_16V4Z

1 2

C2042 0. 1U_0402_16V4ZC2042 0.1U_0402_16V4Z

1 2

C2043 0. 1U_0402_16V4ZC2043 0.1U_0402_16V4Z

Layout Note: Place these Caps near +1.5V of JDIMM1

+1.5V

12

R628

R628 1K_0402_1%

1K_0402_1%

+VREF_CAA

12

R629

R629 1K_0402_1%

1K_0402_1%

1

2

Layout Note:

+0.75VS

Place near JDIMM1 Pin203 and 204

1

C2046

C2047

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

2

3

2

1

Standard H:5.2mm

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMMA

ZEA00 LA-A061P M/B

1

10 59Tuesday, September 24, 2013

0.3

A

WWW.AliSaler.Com

D

R_B_DQS#[0..7][7]

D

R_B_DQS[0..7][7]

D

R_B_D[0..63][7]

D

R_B_MA[0..15][7]

1

.5V

+

R

31

6

1K_0402_1%

1 2

1 1

6

32

R

1K_0402_1%

12

Close to JDIMM2

2 2

DDRB_CLK0#[7]

3 3

SPD setting (SA0 , SA1) PU/PD by Channel A/B

->Channel A 00

->Channel B 01

4 4

+3VS

2.2U_0603_6.3V6K

D

+

REF_DQB

V

D

R_B_D0

D

R_B_D1

0.1U_0402_16V4Z

2.2U_0603_6.3V6K

C2

1

051

050

2

DDR_B_BS2[7]

DDRB_CLK0[7]

DDR_B_BS0[7] DDR_B_RAS# [7]

DDR_B_WE#[7]

DDR_B_CAS#[7]

DDRB_SCS1#[7]

1

C2068

@C2068

@

2

D

1

D

R_B_D2

D D

R_B_D3

D

2

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDRB_CLK0 DDRB_CLK0#

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDRB_SCS1#

DDR_B_D32 DDR_B_D33 DDR_B_D37

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D62DDR_B_D62 DDR_B_D59

1 2

R635

1

2

+0.75VS +0.75VS

10K_0402_5%

10K_0402_5% C2069

C2069

0.1U_0402_16V4Z

C

+

.5V

1

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

H

B SO-DIMM

JD

MM2

I

1

V

EF_DQ

R

3

V

S2

S

5

Q

0

D

7

Q

1

D

9

V

S4

S

11

M

0

D

13

V

S5

S

15

D

2

Q

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST

VREF_CA VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0

EVENT# VDDSPD SA1 VTT1

G1

SUYIN_600023HB204G208ZL

CONN@

V

S D D

S

V

D

Q

D

V

S D DQ7

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

DM6

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

SDA

SCL

VTT2

S1

4

Q Q

5

S3

S#0

S0 S6

6

Q

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

Standard H:9.2mm

A

B

1

.5V

+ 2 4

D

R_B_D4DDR_B_D4

D

6

D

R_B_D5DDR_B_D5

D

8 10

D

R_B_DQS#0DDR_B_D QS#0

D

12

D

R_B_DQS0DDR_B_DQS0

D

14 16

D

R_B_D6DDR_B_D6

D

18

D

R_B_D7DDR_B_D7

D

20 22

DDR_B_D12DDR_B_D12

24

DDR_B_D13DDR_B_D13

26 28 30

SM_DRAMRST#SM_DRAMRST#

32 34

DDR_B_D14DDR_B_D14

36

DDR_B_D15DDR_B_D15

38 40

DDR_B_D20DDR_B_D20

42

DDR_B_D21DDR_B_D21

44 46 48 50

DDR_B_D22DDR_B_D22

52

DDR_B_D23DDR_B_D23

54 56

DDR_B_D28DDR_B_D28

58

DDR_B_D29DDR_B_D29

60 62

DDR_B_DQS#3DDR _B_DQS#3

64

DDR_B_DQS3DDR_B_DQS3

66 68

DDR_B_D30DDR_B_D30

70

DDR_B_D31DDR_B_D31

72

74

DDRB_CKE1DDRB_CKE0

76 78

DDR_B_MA15DDR_B_MA15

80

DDR_B_MA14DDR_B_MA14

82 84

DDR_B_MA11DDR_B_MA11

86

DDR_B_MA7DDR_B_MA7

88 90

DDR_B_MA6DDR_B_MA6

92

DDR_B_MA4DDR_B_MA4

94 96

DDR_B_MA2DDR_B_MA2

98

DDR_B_MA0DDR_B_MA0

100 102

DDRB_CLK1

104

DDRB_CLK1#

106 108

DDR_B_BS1D DR_B_BS1

110

DDR_B_RAS#DDR_B_RAS#

112 114

DDRB_SCS0#

116

DDRB_ODT0

118 120

DDRB_ODT1

122 124 126

+VREF_CAB+VRE F_CAB

128 130

DDR_B_D36

132 134 136 138 140

DDR_B_D38DDR_B_D38

142

DDR_B_D39DDR_B_D39

144 146

DDR_B_D44DDR_B_D44

148

DDR_B_D45DDR_B_D45

150 152

DDR_B_DQS#5DDR _B_DQS#5

154

DDR_B_DQS5DDR_B_DQS5

156 158

DDR_B_D46DDR_B_D46

160

DDR_B_D47DDR_B_D47

162 164

DDR_B_D52DDR_B_D52

166

DDR_B_D53DDR_B_D53

168 170 172 174

DDR_B_D54

176

DDR_B_D55

178 180

DDR_B_D60

182

DDR_B_D61

184 186

DDR_B_DQS#7DDR _B_DQS#7

188

DDR_B_DQS7DDR_B_DQS7

190 192 194

DDR_B_D63DDR_B_D63

196 198 200

PM_SMBDATAPM_SMBDATA

202

PM_SMBCLKPM_SMBC LK

204

206

B

SM_DRAMRST# [10,5]

DDRB_CKE1 [7]DDRB_CKE0[7]

DDRB_CLK1 [7] DDRB_CLK1# [7]

DDR_B_BS1 [7]

DDRB_SCS0# [7] DDRB_ODT0 [7]

DDRB_ODT1 [7]

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

C2064

1

2

Close to JDIMM2

PM_SMBDATA [10,13,40,5] PM_SMBCLK [10,13,40,5]

C2065

C2066

1

2

+1.5V

12

+0.75VS

4.7U_0603_6.3V6K

R633

R633 1K_0402_1%

1K_0402_1%

R634

R634 1K_0402_1%

1K_0402_1%

1

2

+1.5V

1

2

C

Layout Note: Place near JDIMM2

@

+

1 2

C2052 390U 2.5V M ESR10

1 2

C2053 10U_0805_6.3V6MC2053 10U_0805_6.3V6M

1 2

C2054 10U_0805_6.3V6MC2054 10U_0805_6.3V6M

1 2

C2055 10U_0805_6.3V6MC2055 10U_0805_6.3V6M

1 2

C2056 0.1U_0402_16V4ZC2056 0.1U_0402_16V4Z

1 2

C2057 0.1U_0402_16V4ZC2057 0.1U_0402_16V4Z

1 2

C2058 0.1U_0402_16V4ZC2058 0.1U_0402_16V4Z

1 2

C2059 0.1U_0402_16V4ZC2059 0.1U_0402_16V4Z

1 2

C2060 0.1U_0402_16V4ZC2060 0.1U_0402_16V4Z

1 2

C2061 0.1U_0402_16V4ZC2061 0.1U_0402_16V4Z

1 2

C2062 0.1U_0402_16V4ZC2062 0.1U_0402_16V4Z

1 2

C2063 0.1U_0402_16V4ZC2063 0.1U_0402_16V4Z

Layout Note: Place these Caps nea r +1.5V of JDIMM2

+VREF_CAB

C2067

0.1U_0402_16V4Z

Layout Note: Place near JDIMM2 Pin203 and 204

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

D

Date: Sheet of

D

Date: Sheet of

E

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

DDRIII-SODIMM B

ZEA00 LA-A061P M/B

E

11 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

C

04

@

C

01

1

1U_0402_6.3V6K

1

03

C

1U_0402_6.3V6K

@

J

OMS1

C

1 2

J

E1@

M

1 2

C

OS Setting, near DDR Door

M

1 2

P

H_RTCRST#

+

R

TCVCC

R

1

7

20K_0402_5%

C

RC Delay 18~25mS

D D

iME Setting.

1 2

7

0

R

R 20K_0402_5%

20K_0402_5%

P

H_SRTCRST#

C

RC Delay 18~25mS

04

1

6P_0402_50V8J

1 2

1

02

C

C 6P_0402_50V8J

6P_0402_50V8J

1 2

v0.3 update

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

R74

+RTCVCC

+3VALW_PC H

C C

PCH_SPKR

i

gh = Enabled (No Reboot)

H Low = Disabled (Default)

*

+3VS

HDA_SYNC

This signal has a weak internal pull down H=>On Die PLL is supplied by 1.5V (mobile)

*

L=>On Die PLL is supplied by 1.8V (DT) Strap: This signal has a weak internal pull-down. Do not pull high.

High - Enable Internal VRs (must be always pulled high)

1 2

390K_0402_5%

1 2

R77

1 2

R80 10K_0402_5%R 80 10K_0402_5%

@

1 2

R82 1K_0402_5%

1M_0402_5%

PCH_INTVRMEN

SM_INTRUDER#

GPIO33-->GPIO only in DT(GPO)

PCH_GPIO13

GPIO13-->GPIO only in DT

Has weak internal pull-down

PCH_SPKR

PCH_SPKR[37]

AZ_SDIN0_HD[37]

4

12

Y

1

R69

10M_0402_5%

2.768KHZ_7PF_Q13FC135000040

3

10M_0402_5%

T131PADT131PAD

T58 PADT58 PAD

T59 PADT59 PAD

P

H_RTCX1

C

P

H_RTCX2

C

P

H_SRTCRST#

C

S

_INTRUDER#

M

P

H_INTVRMEN

C

P

H_RTCRST#

C

AZ_BITCLK

AZ_SYNC

PCH_SPKR

AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

PCH_GPIO33

PCH_GPIO13

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_TP25

PCH_TP22

PCH_TP20

U

A

1

AN40

R

CX1

T

AN39

R

CX2

T

AR39

S

TCRST#

R

AR41

I

TRUDER#

N

AV36

I

TVRMEN

N

AR38

RTCRST#

AV23

HDA_BCLK

AV24

HDA_SYNC

R32

SPKR

AU24

HDA_RST#

AT26

HDA_SDI0

AV22

HDA_SDI1

AT22

HDA_SDI2

AW23

HDA_SDI3

AU22

HDA_SDO

AV26

DOCKEN#/GPIO33

AN22

HDA_DOCK_RST#/GPIO13

Y40

JTAG_TCK

W40

JTAG_TMS

W39

JTAG_TDI

Y38

JTAG_TDO

AM34

TP25

AH24

TP22

W37

TP20

3

L

T_PCH_DT_EDS

P

JTAGRTC AZALIA

SATA

DH82LPDS_FCBGA708

A

TA_RXN0

S

TA_RXP0

A

S

TA_TXN0

A A

TA_TXP0

S

A

TA_RXN1

S

TA_RXP1

A

S

TA_TXN1

A A

TA_TXP1

S

SATA_RXN2

SATA_RXP2

SATA_TXN2 SATA_TXP2

SATA_RXN3

SATA_RXP3

SATA_TXN3 SATA_TXP3

SATA_RXN4/PERN1 SATA_RXP4/PERP1

SATA_TXN4/PETN1

SATA_TXP4/PETP1

SATA_RXN5/PERN2 SATA_RXP5/PERP2

SATA_TXN5/PETN2

SATA_TXP5/PETP2

SATA_RCOMP

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

SATA_IREF

TP9

TP8

B28 A28

F31 H31

D30 C30

B34 C34

A31 B31

B35 D35

B32 C32

G33 F33

A26 B26

L28 K28

C27 B27

G28 F28

D33

J39

M37

J40

A33

K34

K33

2

S

TA_PRX_DTX_N0

A

S

TA_PRX_DTX_P0

A

S

TA_PTX_DRX_N0

A

S

TA_PTX_DRX_P0

A

S

TA_PRX_DTX_N1

A

S

TA_PRX_DTX_P1

A

S

TA_PTX_DRX_N1

A

S

TA_PTX_DRX_P1

A

TA_PRX_DTX_N0 [35]

S

A

TA_PRX_DTX_P0 [35]

S

TA_PTX_DRX_N0 [35]

A A

TA_PTX_DRX_P0 [35]

S

A

TA_PRX_DTX_N1 [40]

S S

TA_PRX_DTX_P1 [40]

A

S

TA_PTX_DRX_N1 [40]

A A

TA_PTX_DRX_P1 [40]

S

SATA Port 2~3 Is Disable For H81

SATA_PRX_DTX_N4 SATA_PRX_DTX_P4

SATA_PTX_DRX_N4 SATA_PTX_DRX_P4

SATA_RCOMP

SATA_LED#

GPIO21

GPIO19

SATA_IREF

PCH_TP9

PCH_TP8

1 2

R81

7.5K_0402_1%

SATA_PRX_DTX_N4 [ 35] SATA_PRX_DTX_P4 [35]

SATA_PTX_DRX_N4 [ 35] SATA_PTX_DRX_P4 [35]

SATA_RCOMP 50ohm length<600mil

+1.5VS

SATA_LED# [42]

T55PAD T55PAD

T57PAD T57PADT56 PADT56 PAD

+1.5VS

HDD

m

SATA

-

SATA_LED# GPIO21 GPIO19

PCH_GPIO51

R75 10K_0402_5%

PCH_GPIO51[15]

R75 10K_0402_5%

ODD

Place R81 within 500 mils of the PCH. Avoid routing next to clock pins.

C2141 0.1U_0402_16V4Z@ESD@ C2141 0.1U_0402_16V4Z@ESD@

SATA_LED#

v0.2 update for ESD

1 2

1

RP1

1 8 2 7 3 6 4 5

10K_8P4R_5%

@

@ 1 2

BOOT Device

Strap (SPI)

+

VS

3

AZ_SYNC_R

B B

HDA_SDO

ME debug mode, this signal has a weak internal pull down Low = Disable (default)

*

High = Enable (flash descriptor security overide)

PWRM E_CTRL#[43]

AZ_SDOUT_HD[3 7] AZ_BITCLK_HD[37 ]

AZ_RST_HD#[37] AZ_SYNC_HD[37 ]

A A

PWRM E_CTRL#

1 2

R92 1K_0402_5%@R92 1K_0402_5%@

12

1M_0402_5%

1 2

R91 0_0402_5%

RP20

1 8 2 7 3 6 4 5

33_8P4R_5%

@

1 2

R96 51_0402_1%

1 2

C2113 0.1U_0402_16V4Z@ESD@ C211 3 0.1U_0402_16V 4Z@ ESD@

1 2

R87 0_0402_5%

R86

@

Remove R129 @ 5/5 for ME update reserve.

AZ_SDOUT AZ_BITCLK AZ_RST# AZ_SYNC_R

PCH_JTAG_TCK

AZ_RST#

ESD request Close to PCH

1 2

C2136 0.1U_0402_16V4Z@ESD@ C213 6 0.1U_0402_16V 4Z@ ESD@

5

AZ_RST_HD#

AZ_SYNC

@

AZ_SDOUT

v0.2 update

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_HDA/JTAG/SATA

ZEA00 LA-A061P M/B

1

0.3

12 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

C

K_CR#[36]

C

rd Reader

a

L

N

A

D D

WLAN

TV Card

+3VS

1 2

R120 10K_0402_5%R120 10K_0402_5%

1 2

R121 10K_0402_5%R121 10K_0402_5%

+3VALW_P CH

1 2

R123 10K_0402_5%R123 10K_0402_5%

+3VS

1 2

R659 10K_0402_5%@R659 10K_0402_5%@

1 2

R660 10K_0402_5%@R660 10K_0402_5%@

1 2

R661 10K_0402_5%@R661 10K_0402_5%@

1 2

R662 10K_0402_5%@R662 10K_0402_5%@

C C

+3VS

1 2

B B

+3VALW_P CH

R133

R133 1K_0402_5%

1K_0402_5%

1 2

PCH_SPI_IO2

1 2

PCH_SPI_IO3

R134

R134 1K_0402_5%

1K_0402_5%

A A

R137

@R137

@

0_0402_5%

PCH_SPICS# PCH_SPISO

1 2 1 2

R138

R138 15_0402_5%

15_0402_5%

EMI@

PCH_SPI_CS#_R

PCH_SPI_SO_L PCH_SPI_IO2_R

CLKREQ_W LAN# TV_CLKREQ#

CLKREQ_LAN#

CLKREQ4 CLKREQ5 CLKREQ6 CLKREQ7

CLK_PCI_EC[41,43]

SERIRQ

R13210K_0402_5% R13210K_0402_5%

Please close to PCH

SPI ROM (8MByte )_SA000039A30

Now is IC Footprint

U2

1

CS#

2

DO(IO1)

HOLD#(IO3)

3

WP#(IO2)

4

GND

W25Q64FV SSIQ_SO8

Socket P/N: SP07000H900

5

L

C

K_CR[36]

L

KREQ_CR#[36]

C

L

K_LAN#[39]

C C

K_LAN[39]

L

C

KREQ_LAN#[39]

L

C

K_WLAN#[40]

L L

K_WLAN[40]

C

L

KREQ_W LAN#[40]

C

CLK_TV#[40] CLK_TV[ 40]

TV_CLKREQ#[40]

v0.2 update

R127 22_0402_5%EMI@R127 22_0402_5%EMI@

CLK_PCILOOP CLK_PCILOOP_R

VCC

CLK

DI(IO0)

1 2

R128 22_0402_5%EMI@R128 22_0402_5%EMI@

LPC_AD0[41,43]

LPC_AD1[41,43]

LPC_AD2[41,43]

LPC_AD3[41,43]

LPC_FRAME#[41,43]

SERIRQ[41,43]

PCH_SPICLK[43]

PCH_SPICS#[43]

PCH_SPISI[43]

PCH_SPISO[43]

+3VALW_PC H

12

0_0402_5%

+3VALW_BIO S

8 7 6 5

0_0402_5%

PCH_SPI_SI_L PCH_SPISI

4

L

K_CR#

C C

K_CR

L

C

KREQ_CR#

L

C

K_LAN#

L

C

K_LAN

L

C

KREQ_LAN#

L

C

K_WLAN#

L

C

K_WLAN

L

C

KREQ_W LAN#

L

CLK_TV# CLK_TV

TV_CLKREQ#

CLKREQ4

CLKREQ5

CLKREQ6

CLKREQ7

CLK_PCI_EC_R

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRAME#

SERIRQ

PCH_SPICLK

PCH_SPICS#

PCH_SPISI

PCH_SPISO

PCH_SPI_IO2

PCH_SPI_IO3

Reserve R658 for C38

1

R658

@ R658

@

C108

0.1U_0402_16V4Z

2

RP7

1 8

PCH_SPI_IO3PCH_SPI_IO3_R

2 7

PCH_SPICLKPCH_SPI_CLK_L

3 6 4 5

PCH_SPI_IO2

15_8P4R_5%

EMI@

4

1

U

AE10

L

KOUT_PCIE_N0

C

AE11

L

KOUT_PCIE_P0

C

W34

C

P

AC6

C

KOUT_PCIE_N1

L

AC7

C

KOUT_PCIE_P1

L

P39

P

C

AC11

C

KOUT_PCIE_N2

L

AC10

L

KOUT_PCIE_P2

C

P37

C

P

W11

CLKOUT_PCIE_N3

W10

CLKOUT_PCIE_P3

AA39

PCIECLKRQ3#/GPIO25

Y4

CLKOUT_PCIE_N4

Y2

CLKOUT_PCIE_P4

W35

PCIECLKRQ4#/GPIO26

W7

CLKOUT_PCIE_N5

W6

CLKOUT_PCIE_P5

AA36

PCIECLKRQ5#/GPIO44

AA7

CLKOUT_PCIE_N6

AA6

CLKOUT_PCIE_P6

W32

PCIECLKRQ6#/GPIO45

R6

CLKOUT_PCIE_N7

R7

CLKOUT_PCIE_P7

AA40

PCIECLKRQ7#/GPIO46

U6

CLKOUT_ITPXDP#

U7

CLKOUT_ITPXDP

AV5

CLKOUT_33MHZ0

AV7

CLKOUT_33MHZ1

AU2

CLKOUT_33MHZ2

AN9

CLKOUT_33MHZ3

AU5

CLKOUT_33MHZ4

AN24

LAD0

AP26

LAD1

AJ24

LAD2

AN26

LAD3

AP24

LFRAME#

AK22

LDRQ0#

AK26

LDRQ1#/GPIO23

G39

SERIRQ

U39

SPI_CLK

R38

SPI_CS0#

R35

SPI_CS1#

R40

SPI_CS2#

P40

SPI_MOSI

R36

SPI_MISO

U40

SPI_IO2

U37

SPI_IO3

for EMI

10P_0402_50V8J

C

IECLKRQ0#/GPIO73

IECLKRQ1#/GPIO18

IECLKRQ2#/GPIO20/SMI#

mibile only

U1D

LPC

SPI

PCH_SPI_CLK_L

12

R139

10_0402_5%

@

1

C109

@

2

3

P

T_PCH_DT_EDS

L

AA3

L

K_PCIE_VGA#

L

KOUT_PEG_A#

C

L

KOUT_PEG_A

C

L

KOUT_PEG_B#

C

KOUT_PEG_B

L

C

KOUT_DMI#

L

KOUT_DMI

C

L

KOUT_DP#

C

KOUT_DP

CLOCK SIGNAL

CLKIN_33MHZLOOPBACK

DH82LPDS_FCBGA708

LPT_PCH_DT_EDS

SMBus

C-Link

Thermal

DH82LPDS_FCBGA708

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

L

C

KOUT_DPNS#

L

KOUT_DPNS

C

CLKIN_DMI#

CLKIN_DMI

CLKIN_GND#

CLKIN_GND

CLKIN_DOT96#

CLKIN_DOT96

CLKIN_SATA#

CLKIN_SATA

REFCLK14IN

XTAL25_IN

XTAL25_OUT

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

ICLK_IREF

TP19 TP18

DIFFCLK_BIASREF

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SML1ALERT#/PCHHOT#/GPIO74

2013/04/01 2014/04/01

3

C

AA2

C

L

AE6 AE7

R2

C

L

T2

C

L

T3

C

L

T5

C

L

W2

C

L

U2

C

L

G22

PCH_CLK_DMI#

F22

PCH_CLK_DMI

G16

CLKIN_GND0#

F16

CLKIN_GND0

AP11

CLK_DOT#

AM11

CLK_DOT

H35

CLK_SATA#

H36

CLK_SATA

AR7

CLK_14M_PCH

AM22

CLK_PCILOOP

N7

PCH_X1

N6

PCH_X2

AV8

AT9

AV9

AU8

N10

U11

PCH_TP19

U10

PCH_TP18

R11

XCLK_RBIAS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK

CL_DATA

CL_RST#

TP1

TP2

TP4

TP3

TD_IREF

K_PCIE_VGA

K_CPU_DMI# K_CPU_DMI

K_DP_DN K_DP_DP

K_DPNS_DN K_DPNS_DP

+1.5VS

1 2

R129 7.5K_0402_1%R129 7.5K_0402_1%

AG31

PCH_GPIO11

AG36

PCH_SMBCLK

AG32

PCH_SMBDATA

AG35

PCH_GPIO60

AE32

PCH_SMLCLK0

AE35

PCH_SMLDATA0

AJ39

PCH_GPIO74

AK36

PCH_SMLCLK1

AK33

PCH_SMLDATA1

U36

CLINK_CLK

U35

CLINK_DATA

U34

CLINK_RST#

A2

PCH_TP1

A3

PCH_TP2

B2

PCH_TP4

B1

PCH_TP3

C3

TD_IREF

Compal Secret Data

Deciphered Date

T66 PADT66 PAD T68 PADT68 PAD

1 2

8.2K_0402_1%

8.2K_0402_1% R135

R135

2

C

K_PCIE_VGA# [21]

L

C

K_PCIE_VGA [21]

L

C

K_CPU_DMI# [5]

L L

K_CPU_DMI [5]

C

L

K_DP_DN [5]

C C

K_DP_DP [5 ]

L

C

K_DPNS_DN [ 5]

L L

K_DPNS_DP [5]

C

+1.5VS

+3VALW_PC H

T69 PADT69 PAD

T70 PADT70 PAD

T71 PADT71 PAD

Control Link only for support Intel IAMT.

T73 PADT73 PAD

T74 PADT74 PAD

T75 PADT75 PAD

T76 PADT76 PAD

2

VGA

RP5

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

PCH_SMBDATA

PCH_SMBCLK

PCH_SMLDATA1

PCH_SMLCLK1

C

H_GPIO11

P

C

H_GPIO74

P C

K_DOT#

L

C

K_DOT

L

P

H_CLK_DMI#

C

P

H_CLK_DMI

C

KIN_GND0#

L

C

KIN_GND0

L

CLK_SATA# CLK_SATA

CLK_14M_PCH

1

Close PCH

P

3

R

1 8 2 7 3 6 4 5

10K_8P4R_5%

R

2

P

1 8 2 7 3 6 4 5

10K_8P4R_5%

1 2

R115 10K_0402_5%R115 10K_0402_5%

1 2

R117 10K_0402_5%R117 10K_0402_5%

1 2

R119 10K_0402_5%R119 10K_0402_5%

+

VALW_PC H

3

For EMI

@EMI@

CLK_PCILOOP

10P_0402_50V8J

25MHZ_10PF_X3G025000DA1H -X

PCH_SMLDATA1 PCH_SMLCLK1

2N7002KDW H_SOT363-6

PCH_SMLCLK0 PCH_SMLDATA0 PCH_GPIO60

Title

Size Document Number Rev

Custom

Date: Sheet of

1 2

R122 10_0402_5%

R124 1M_0402_5%R124 1M_0402_5%

PCH_X1 PCH_X2

1

C106

2

6 1

5

Q2A

Q2A 2N7002KDW H_SOT363-6

3 4

2N7002KDW H_SOT363-6

2N7002KDW H_SOT363-6 Q2B

Q2B

2N7002KDW H_SOT363-6

5

Q3B

Compal Electronics, Inc.

PCH_CLK\LPC\SPI\SMBUS

ZEA00 LA-A061P M/B

Y2

2

34

@EMI@

C105 22P_0402_50V8J

12

3

1

IN

OUT

NC

2

4

R130 4.7K_0402_5%R130 4.7K_0402_5% R131 4.7K_0402_5%R131 4.7K_0402_5%

61

Q3A

RP6

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

1

1 2

1

C107

10P_0402_50V8J

2

PM_SMBDATA [10, 11,40,5]

PM_SMBCLK [ 10,11,40,5]

+3VS

EC_SMB_DA2 [21,43,46]

EC_SMB_CK2 [21,43,46]

13 59Tuesday, September 24, 2013

+3VS

+3VALW_PC H

0.3

5

WWW.AliSaler.Com

D D

+3VALW_PC H

RP8

1 8 2 7 3 6 4 5

10K_8P4R_5%

C C

B B

Stuff R154 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit

R141 10K_0402_5%R141 10K_0402_5%

R142 10K_0402_5%R142 10K_0402_5%

+3VS

R145 10K_0402_5%@R145 10K_0402_5%@

VGATE[43,5,50]

PM_PWR OK[43,9]

12

1

2

@

R154 0_0402_5%

1 2

C2114 0. 1U_0402_16V4Z@ESD@ C2114 0.1U_0402_16V4Z@ESD@

1 2

C2115 0. 1U_0402_16V4Z@ESD@ C2115 0.1U_0402_16V4Z@ESD@

1 2

C2116 0. 1U_0402_16V4Z@ESD@ C2116 0.1U_0402_16V4Z@ESD@

1 2

C2117 0. 1U_0402_16V4Z@ESD@ C2117 0.1U_0402_16V4Z@ESD@

1 2

C2118 0. 1U_0402_16V4Z@ESD@ C2118 0.1U_0402_16V4Z@ESD@

1 2

C2119 0. 1U_0402_16V4Z@ESD@ C2119 0.1U_0402_16V4Z@ESD@

1 2

C2120 0. 1U_0402_16V4Z@ESD@ C2120 0.1U_0402_16V4Z@ESD@

SUSWA RN#_R EC_SWI#_R PCH_GPIO72

PCH_RSMRST#

PM_PWR OK

+3VS

U3

5

MC74VHC1G08DFT2G_S C70-5

IN1

VCC

OUT

IN2

GND

3

12

SUSWA RN#_RSUSACK#

XDP_DBRESET#

SYS_PWR OK

DRAMPW ROK

PWROK _R

PCH_RSMRST#_R

PCH_DPW ROK

PM_PWR OK

4

12

R147

Platform not supporting Intel ME M3 state

10K_0402_5%

APWROK can be connected to PWROK.

DRAMPW ROK[ 5]

PCH_RSMRST#[43]

SUSWA RN#[43]

PBTN_OUT#[4 3,5]

+3VALW_PC H

PM_PWR OK

4

DMI_CTX_PRX_N0[6] DMI_CTX_PRX_N1[6]

DMI_CTX_PRX_N2[6] DMI_CTX_PRX_N3[6]

DMI_CTX_PRX_P0[ 6] DMI_CTX_PRX_P1[ 6]

DMI_CTX_PRX_P2[ 6] DMI_CTX_PRX_P3[ 6]

DMI_PTX_CRX_N0[6] DMI_PTX_CRX_N1[6]

DMI_PTX_CRX_N2[6] DMI_PTX_CRX_N3[6]

DMI_PTX_CRX_P0[ 6] DMI_PTX_CRX_P1[ 6]

DMI_PTX_CRX_P2[ 6] DMI_PTX_CRX_P3[ 6]

+1.5VS

R146 7.5K_0402_1%R146 7.5K_0402_1%

R15 10K_0402_5%R15 10K_04 02_5%

1 2

+3VS

R148 0_0402_5%@R148 0_0402_5%@

R149 0_0402_5%@R149 0_0402_5%@

R151 0_0402_5%@R151 0_0402_5%@

R153 0_0402_5%@R153 0_0402_5%@

R155 10K_0402_5%R155 10K_0402_5%

+1.5VS

1 2

12

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1

DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1

DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1

DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1

DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_RCOMP

SUSACK#

XDP_DBRESET#

SYS_PWR OK

PWROK _R

DRAMPW ROK

PCH_RSMRST#_R

SUSWA RN#_R

PBTN_OUT#_R

PCH_GPIO31

PCH_GPIO72

PCH_GPIO29

U1B

L24

DMI_RXN0

G24

DMI_RXN1

F26

DMI_RXN2

K26

DMI_RXN3

K24

DMI_RXP0

H24

DMI_RXP1

G26

DMI_RXP2

L26

DMI_RXP3

C20

DMI_TXN0

D21

DMI_TXN1

B22

DMI_TXN2

A24

DMI_TXN3

B20

DMI_TXP0

B21

DMI_TXP1

C22

DMI_TXP2

B24

DMI_TXP3

A19

DMI_IREF

L22

TP12

K22

TP7

B19

DMI_RCOMP

AJ37

SUSACK#

N36

SYS_RESET#

W31

SYS_PWROK

AT40

PWROK

AA32

APWROK

AE38

DRAMPWROK

AM40

RSMRST#

AG41

SUSWARN#/SUSPWRNACK/GPIO30

AK41

PWRBTN#

AM36

ACPRESENT/GPIO31

AJ40

GPIO72

AE36

RI#

AC35

TP21

AL39

SLP_WLAN#/GPIO29

3

LPT_PCH_DT_EDS

DMI

System Power

Management

DH82LPDS_FCBGA708

FDI

FDI_CSYNC

FDI_RCOMP

DSWVRMEN

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

FDI_RXN0

FDI_RXN1

FDI_RXP0

FDI_RXP1

TP16

TP5

TP15

TP10

FDI_INT

FDI_IREF

TP17

TP13

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#

N1

FDI_CTX_PRX_N0

P2

FDI_CTX_PRX_N1

N2

FDI_CTX_PRX_P0

P3

FDI_CTX_PRX_P1

R4

K5

P5

L5

L2

L3

N11

R12

N12

K2

FDI_RCOMP

AM41

AV38

AK34

AD37

W36

AA35

AT35

AK40

AN37

AK38

F40

AU36

1 2

R144 7.5K_0402_1%R144 7.5K_0402_1%

DSWVR EN

PCH_DPW ROK

PCIE_WAK E#

SUS_STAT#

RTC_CLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_A#

PM_SLP_SUS#

H_PM_SYNC

1

2

FDI_CTX_PRX_N0 [ 5]

FDI_CTX_PRX_N1 [ 5]

FDI_CTX_PRX_P0 [5]

FDI_CTX_PRX_P1 [5]

FDI_CSYNC [6]

FDI_INT [6]

+1.5VS

T89 PADT89 PAD

T134 PADT134 PAD

T90 PADT90 PAD

T91 PADT91 PAD

C43

0.1U_0402_16V4Z

@ESD@

+1.5VS

PCIE_WAK E# [39,40 ]

PM_SLP_S5# [ 43]

PM_SLP_S4# [ 43]

PM_SLP_S3# [ 43]

H_PM_SYNC [5]

1

1 2

@

R140 0_0402_5%

PCH_RSMRST#PCH_DPWRO K

Stuff R140 if do not support DeepSX state

+RTCVCC

DSWVR EN

DSWVREN - Internal Deep Sleep 1.05V regulator H

：：：：

Enable

*

L

：：：：

Disable

1 2

R143 390K_0402_5%R143 390K_0402_5%

+3VALW_PC H

PCIE_WAK E# PCH_GPIO29

PCH_GPIO29 default GPI PU to +3VALW base on module design.

PCIE_WAK E#

1 2

R150 1K_0402_5%R150 1K_0402_5%

1 2

R152 10K_0402_5%R152 10K_0402_5%

C2158

@C2158

@

0.1U_0402_16V7K

1 2

V1.0 update

Platform not supporting Intel ME M3 state PM_SLP_A# can be left NC

ESD request Close to PCH

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_DMI/FDI/PM

ZEA00 LA-A061P M/B

14 59Tuesday, September 24, 2013

1

0.3

+

WWW.AliSaler.Com

VS

3

D D

C C

Disable use 1K on mobile

C

P

R

1 8 2 7 3 6 4 5

8.2K_8P4R_5%

1 2

R

59 8.2K_0402_5%

1

1 2

R

60 8.2K_0402_5%

1

1 2

R

61 8.2K_0402_5%

1

R

1 8 2 7 3 6 4 5

8.2K_8P4R_5%

1 2

R162 2.2K_0402_5%

1 2

R163 2.2K_0402_5%

RP11

1 8 2 7 3 6 4 5

150_0804_8P4R_1%

CRT@

CRT_IREF Close to PCH <500mils

To Converter

v0.2 update

DGPU_HOLD_RST#[21,43]

DGPU_PWR_EN[23,43]

B B

5

I PU resistor

P

9

P

10

CRT@

PCH_CRT_B[41]

PCH_CRT_G[41]

PCH_CRT_R[41]

PCH_CRT_CLK[41]

PCH_CRT_DATA[41]

PCH_CRT_HSYNC[41]

PCH_CRT_VSYNC[41]

PCH_EDP_PWM[29]

PCH_EDP_BLEN[29]

PCH_GPIO51[12]

C

I_PIRQD#

P

C

I_PIRQB#

P P

H_GPIO5

C

P

I_PIRQC#

C

P

H_GPIO50

C

P

H_GPIO52

C

P

H_GPIO54

C

P

H_GPIO4

C

P

I_PIRQA#

C

P

H_GPIO3

C

P

H_GPIO2

C

PCH_CRT_CLK

PCH_CRT_DATA

PCH_CRT_B PCH_CRT_G PCH_CRT_R

Close to PCH <250mils

PCH_CRT_B

PCH_CRT_G

PCH_CRT_R

PCH_CRT_CLK

PCH_CRT_DATA

PCH_CRT_HSYNC

PCH_CRT_VSYNC

1 2

R165 649_0402_1%R165 649_0402_1%

PCH_EDP_PWM

PCH_EDP_BLEN

T133 PADT 133 PAD

1 2

R167 0_0402_5%@R167 0_0402_5%@

1 2

R170 0_0402_5%@R170 0_0402_5%@

PCH_EDP_VDDEN

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

PCH_GPIO50

PCH_GPIO52

PCH_GPIO54

PCH_GPIO51

PCH_GPIO53

PCH_GPIO55

CRT_IREF

R

Internal pull high

Strap defalut high GPIO53 DMI AC mode if Low GPIO55 A16 SWAP OVERRIDE if Low

NOTE:PCH adds support for panel power sequencing required for embedded DisplayPort support. L_VDDEN, L_BKLTEN and L_BKLTCTL pins are added on the PCH for panel power sequencing. It is important to note that a 6 layer board design may be required to access these pins on the PCH package in a fully featured platform design.

U1E

AC3

VGA_BLUE

AE2

VGA_GREEN

AC2

VGA_RED

AL2

VGA_DDC_CLK

AL3

VGA_DDC_DATA

AH3

VGA_HSYNC

AH2

VGA_VSYNC

AF5

DAC_IREF

AG4

VGA_IRTN

AP2

EDP_BKLTCTL

AT2

EDP_BKLTEN

AP1

EDP_VDDEN

AU29

PIRQA#

AU27

PIRQB#

AW28

PIRQC#

AV27

PIRQD#

AH26

GPIO50

AJ26

GPIO52

AW33

GPIO54

AU31

GPIO51

AV31

GPIO53

R30

GPIO55

4

12

P

H_GPIO53

CRT

LVDS

PCI

C

H_GPIO55

P

Data Need longer than CLK 1 inch

AM1

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPB_AUXN

DDPC_AUXN

DDPD_AUXN

DDPB_AUXP

DISPLAY

DDPC_AUXP

DDPD_AUXP

DDPB_HPD

DDPC_HPD

DDPD_HPD

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

PIRQH#/GPIO5

PLTRST#

DH82LPDS_FCBGA708

PME#

AJ5

AN3

AM2

AN4

AN2

AK6

AG7

AG11

AK8

AG6

AG10

AJ2

AH5

AJ4

AR30

AV29

AV28

AT27

AA31

AA37

PCH_GPIO2

PCH_GPIO3

PCH_GPIO4

PCH_GPIO5

PCI_PME#

PCH_PLT_RST#

PCH_HDMIOUT_CLK

PCH_HDMIOUT_DATA

PCH_HDMI_CLK

PCH_HDMI_DATA

PCH_DPD_CLK

PCH_DPD_DAT

DDPB_AUXN

DDPC_AUXN

PCH_DDPD_AUXN

DDPB_AUXP

DDPC_AUXP

PCH_DDPD_AUXP

PCH_HDMIOUT_HPD

DPD_HPD

DDPD_HPD

1

C2121

0.1U_0402_16V4Z

2

@ESD@

1

57 10K_0402_5%@

12

1

58 10K_0402_5%@

LPT_PCH_DT_EDS

3

PCH_DPD_CLK PCH_DPD_DAT PCH_HDMIOUT_CLK PCH_HDMIOUT_DATA DDPD_HPD

PCH_HDMIOUT_CLK [30]

PCH_HDMIOUT_DATA [30]

T92PAD T92PAD

T93PAD T93PAD

T96PAD T96PAD

T97PAD T97PAD

1 2

C112 0.1U_0402_16V4ZC112 0.1U_0402_16V4Z

T98PAD T98PAD

T99PAD T99PAD

1 2

C113 0.1U_0402_16V4ZC113 0.1U_0402_16V4Z

PCH_HDMIOUT_HPD [30]

T100PA D T100PAD

LVDS Converter

T101PADT101PAD

PCH_DDPD_AUXN_C

PCH_DDPD_AUXP_C

R

17

P

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

HDMI OUT (To Conn.)

eDP (LVDS Converter)

PCH_DDPD_AUXN_C [29]

PCH_DDPD_AUXP_C [29]

HDMI OUT

1 2

R172 100K_0402_5%@R172 100K_0402_5%@

1 2

R173 100K_0402_5%@R173 100K_0402_5%@

CRB Reserve PU/PL

2

3

VS

+

LVDS Converter

+3VS

5

VS

+

G

2

S

1 2

R605 0_0402_5%@R605 0_0402_5%@

Seperate U10, U57 location

R164

@R164

@

0_0402_5%

1 2

+3VS

1

C111

0.1U_0402_16V4Z

2

5

U4

U4 MC74VHC1G08DFT2G_SC70-5

PCH_PLT_RST#

1

2

1

2

IN1

IN2

IN1

IN2

VCC

OUT

GND

3

5

VCC

OUT

GND

3

100K_0402_5%

MC74VHC1G08DFT2G_SC70-5

4

100K_0402_5%

R677 0_0402_5%R 677 0 _0402_5%

1 2 1 2

R678 0_0402_5%@R678 0_0402_5%@

1

C2029

@ C2029

@

0.1U_0402_16V4Z

2

U5

U5 MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

4

R171

1

Q57

Q57 BSS138LT1G_SOT23-3

BSS138LT1G_SOT23-3

13

D

PLT_RST#

12

R166

+3VALW_PCH +3VS

v0.3 update for wake from WL AN(BCM43142)

12

1

2

PCH_DDPD_HPD [29]

12

R606

R606 100K_0402_5%

100K_0402_5%

PLT_RST# [21,41,43]

For GPU/TPM/EC

For Card reader/ LAN/WLAN/TV

PLT_A_RST# [36,39,40]

C2135

ESD@C2135

ESD@

0.1U_0402_16V4Z

v0.2 update

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_CRT/DDC

ZEA00 LA-A061P M/B

1

0.3

15 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

4

3

2

1

D D

Card Reader

TV Card

C C

B B

C117/C118 --> Close to U36 C115/C116 --> Close to U25 C119/C120 --> Close to JMINI2

LAN

WLAN

A

M & Touch Can't in same USB2.0 Controller for C38

l

ose to device side

C

P

IE_PRX_CRTX_N1

P

IE_PRX_CRTX_N1[36]

C

PCIE_PRX_CRTX_P1[36]

PCIE_PTX_C_CRRX_N1[36] PCIE_PTX_C_CRRX_P1[36 ]

PCIE_PRX_LANTX_N2[39]

PCIE_PRX_LANTX_P2[39]

PCIE_PTX_C_LANRX_N2[39] PCIE_PTX_C_LANRX_P2[39]

PCIE_PRX_W LANTX_N3[40] PCIE_PRX_W LANTX_P3[40]

PCIE_PTX_C_W LANRX_N3[40] PCIE_PTX_C_W LANRX_P3[40]

PCIE_PRX_TVTX_N4[40]

PCIE_PRX_TVTX_P4[40]

PCIE_PTX_TVRX_N4[40] PCIE_PTX_TVRX_P4[40]

C115 0.1U_0402_16V7KC115 0.1U_0402_16V7K C116 0.1U_0402_16V7KC116 0.1U_0402_16V7K

C117 0.1U_0402_16V7KC117 0.1U_0402_16V7K C118 0.1U_0402_16V7KC118 0.1U_0402_16V7K

C119 0.1U_0402_16V7KC119 0.1U_0402_16V7K C120 0.1U_0402_16V7KC120 0.1U_0402_16V7K

12 12

0.1U close to JMINI1

PCIE Port 7~8 Is Disable For H81

+1.5VS

C

PCIE_PRX_CRTX_P1

PCIE_PTX_CRRX_N1 PCIE_PTX_CRRX_P1

PCIE_PRX_LANTX_N2 PCIE_PRX_LANTX_P2

PCIE_PTX_LANRX_N2 PCIE_PTX_LANRX_P2

PCIE_PRX_W LANTX_N3 PCIE_PRX_W LANTX_P3

PCIE_PTX_W LANRX_N3 PCIE_PTX_W LANRX_P3

PCIE_PRX_TVTX_N4 PCIE_PRX_TVTX_P4

PCIE_PTX_TVRX_N4 PCIE_PTX_TVRX_P4

T102 PADT102 PAD T103 PADT103 PAD

T104 PADT104 PAD T105 PADT105 PAD

T106 PADT106 PAD T107 PADT107 PAD

T108 PADT108 PAD T109 PADT109 PAD

+1.5VS

T112 PADT112 PAD

T113 PADT113 PAD

R175

1 2

7.5K_0402_1%

PCIE_RCOMP

G14

D11 C11

H11

C13

L14 K14

B12 B11

F14

F11

B9 A9

J11

L11

B8 C8

G9

F9

B7 A7

F7 H7

E1 D2

K6 K8

G3 G5

J2 J3

H2 H1

B13

L16

K16

1

I

U

PERN1/USB3RN3 PERP1/USB3RP3

PETN1/USB3TN3 PETP1/USB3TP3

PERN2/USB3RN4 PERP2/USB3RP4

PETN2/USB3TN4 PETP2/USB3TP4

PERN3 PERP3

PETN3 PETP3

PERN4 PERP4

PETN4 PETP4

PERN5 PERP5

PETN5 PETP5

PERN6 PERP6

PETN6 PETP6

PERN7 PERP7

PETN7 PETP7

PERN8 PERP8

PETN8 PETP8

PCIE_IREF

TP11

TP6

PCIE_RCOMP

L

T_PCH_DT_EDS

P

PCIe

DH82LPDS_FCBGA708

USB

USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7 USB2N8 USB2P8 USB2N9 USB2P9

USB2N10

USB2P10

USB2N11

USB2P11

USB2N12

USB2P12

USB2N13

USB2P13

USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN5 USB3RP5 USB3TN5 USB3TP5 USB3RN6 USB3RP6

USB3TN6 USB3TP6

USBRBIAS#

USBRBIAS

TP24 TP23

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

AV10 AU10 AV11 AW11 AN14 AP14 AJ16 AK16 AU15 AV15 AU12 AT12 AV14 AW14 AU17 AT17 AW16 AV16 AN16 AP16 AJ18 AK18 AP18 AN18 AW18 AV18 AP20 AN20

F20 G20 B18 C18 G18 H18 B15 B16 K20 L20 D15 C15 L18 K18 B14 A14

AV20 AU20

AK14 AJ14

AE40 AF37 AD39 AD40 AF39 AC41 AF40 AG40

C

U

B20_N0

S USB20_P0 USB20_DEBN1 USB20_DEBP1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5

U

B20_N0 [33]

S

USB20_P0 [33]

USB20_DEBN1 [33]

USB20_DEBP1 [33 ] USB20_N2 [34] USB20_P2 [34]

USB20_N3 [34]

USB20_P3 [34] USB20_N4 [40] USB20_P4 [40] USB20_N5 [41] USB20_P5 [41]

WLAN

Touch

USB2.0 Port 6,7,12,13 Is Disable For H81

USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11

USB20_N8 [34] USB20_P8 [34] USB20_DEBN9 [34] USB20_DEBP9 [34 ] USB20_N10 [40] USB20_P10 [40] USB20_N11 [41] USB20_P11 [41]

TV

Int. Camera

USB2.0 Port 6,7,12,13 Is Disable For H81

U3RXDN_A U3RXDP_A U3TXDN_A U3TXDP_A U3RXDN_B U3RXDP_B U3TXDN_B U3TXDP_B

U3RXDN_A [33]

U3RXDP_A [33] U3TXDN_A [33] U3TXDP_A [ 33]

U3RXDN_B [33]

U3RXDP_B [33] U3TXDN_B [33] U3TXDP_B [ 33]

USB3.0 Port 5~6 Is Disable For H81

USBBIAS

USB30_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

1 2

R174 22.6_0402_1%R174 22.6_0402_1%

T110PAD T110PAD T111PAD T111PAD

USB_BIAS trace <500mils

USB30_OC#0 [33]

USB_OC#1 [34]

USB_OC#5 [34]

USB 3.0 side IO

Rear IO USB 2.0 Port 1 & 2

Rear IO USB 2.0 Port 3 & 4

Side IO USB 3.0 Port 2 (Charger)

Side IO USB 3.0 Port 1 (Debug)

Side IO USB 3.0 Port 1 & 2 Rear IO USB 2.0 Port 1 & 2

Rear IO USB 2.0 Port 3 & 4

USB_OC#1 USB_OC#6 USB_OC#4 USB_OC#7

USB_OC#5 USB_OC#2 USB_OC#3 USB30_OC#0

RP12

1 8 2 7 3 6 4 5

10K_8P4R_5%

RP13

1 8 2 7 3 6 4 5

10K_8P4R_5%

+3VALW_PC H

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_PCI-E/USB

ZEA00 LA-A061P M/B

16 59Tuesday, September 24, 2013

1

0.3

+

WWW.AliSaler.Com

VALW_PC H

3

R

5

12

1

76 1K_0402_5%

1 2

79 10K_0402_5%

1

C

P

C

H_GPIO15

H_GPIO57

GPIO8

Integrated Clock Chip Enable (Removed) H: Disable L: Enable

D D

*

3

VALW_PC H

+

12

@

R192

R192 10K_0402_5%

10K_0402_5%

EC_SMI#

GPIO8 no longer a strap,

@

R193

R193 1K_0402_5%

1K_0402_5%

1 2

This signal has a weak internal pull-up but requires an external pull down.

GPIO8 is determined /override by soft strap.

The current default is clock enable

+3VALW_PC H

12

C C

R199 10K_0402_5%R199 10K_0402_5%

In Deep Sleep Power Well. Unmuxed. Defaults to GPI. Not used Weak pull-up 10k

->Check list1.5 P402.

PD to GND for Huron River!!

PCH_GPIO27

Ω to VccDSW3_3

GPIO28

On-Die PLL Voltage Regulator H: Enable

*

L: Disable

+3VALW_PC H

12

R201

R201 1K_0402_5%

1K_0402_5%

PCH_GPIO28

+3VS

B B

1 2

R202 10K_0402_5%@R 202 10K_0402_5%@

1 2

R203 1K_0402_5%@R203 1K_0402_5%@

1 2

R204 10K_0402_5%@R 204 10K_0402_5%@

1 2

R206 10K_0402_5%@R 206 10K_0402_5%@

Clock validation strap ICG is EN when LOW *GPIO36 with internal pull-down

TLS Hi:with confidentiality Low:with no confidentiality *GPIO37 with internal pull-down

PCH_GPIO36

PCH_GPIO37

PCH_GPIO36

PCH_GPIO37

4

+

VS

3

EC_SMI#[43]

1 2

1

77 10K_0402_5%

R

P

14

R

1 8 2 7 3 6 4 5

10K_8P4R_5%

1 2

R

63 10K_0402_5%

6

1 2

R

84 10K_0402_5%

1

1 2

R

85 10K_0402_5%

1

1 2

R186 10K_0402_5%R186 10K_0402_5%

1 2

R191 10K_0402_5%@ R191 10K_0402_5%@

RP15

1 8 2 7 3 6 4 5

10K_8P4R_5%

GPO

T115 PADT 115 PAD

GPO

C

H_GPIO0

P

H_GPIO1

C

P

H_GPIO6

C

E

_SCI#

C

P

H_GPIO17

C

P

H_GPIO24

C

P

H_GPIO38

C

P

H_GPIO39

C

P

H_GPIO48

C

PCH_GPIO32

PCH_GPIO35 PCH_GPIO22 PCH_GPIO34

PCH_GPIO0

EC_SMI#

PCH_GPIO15

PCH_GPIO16

PCH_GPIO22

PCH_GPIO24

PCH_GPIO27

PCH_GPIO28

PCH_GPIO32

PCH_GPIO34

PCH_GPIO35

PCH_GPIO36

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

3

120821

U1F

G38

BMBUSY#/GPIO0

AC40

GPIO8

AL40

LAN_PHY_PWR_CTRL/GPIO12

AC32

GPIO15

M39

SATA4GP/GPIO16

L38

SCLOCK/GPIO22

AE34

GPIO24

AU34

GPIO27

V41

GPIO28

N32

GPIO32

N34

GPIO34

M40

GPIO35/NMI#

H40

SATA2GP/GPIO36

N41

SATA3GP/GPIO37

H41

SLOAD/GPIO38

R31

SDATAOUT0/GPIO39

L40

SDATAOUT1/GPIO48

N40

SATA5GP/GPIO49

AC36

GPIO57

AT1

VSS

AT41

VSS

AU1

VSS

AV1

VSS

AV2

VSS

AV40

VSS

AV41

VSS

AW2

VSS

AW40

VSS

B40

VSS

B41

VSS

C41

VSS

D1

VSS

D41

VSS

AC31

VSS

SKU ID GPIO680GPIO69 SKU1 SKU2 SKU3 SKU4 SKU5 SKU6 SKU7 SKU8

LPT_PCH_DT_EDS

PROCPWRGD

THRMTRIP#

PLTRST_PROC#

CPU/Misc

GPIO

TACH0/GPIO17

TACH1/GPIO1

TACH2/GPIO6

FAN

TACH3/GPIO7

TACH4/GPIO68

TACH5/GPIO69

TACH6/GPIO70

TACH7/GPIO71

Server/Workstation only.

NCTF

DH82LPDS_FCBGA708

2

GPIO69 0 00

0 01 0 1 1 1

1 1 0 0 0

1 1 1 1 1

GATEA20

N30

TP14

G40

K36

D40

C40

F41

V28

AL31

AM31

AP31

AV30

AP28

AT31

AM28

AV34

AT30

AV35

AK28

AT34

AJ31

AF3 AV21 V38 V40 W12 W20 W22 W28 W3

PCH_PECI_R

KB_RST#

H_PWRG OOD

H_THERMTRIP#

PCH_GPIO17

PCH_GPIO1

PCH_GPIO6

EC_SCI#

PCH_GPIO68

PCH_GPIO69

PCH_GPIO70

PCH_GPIO71

PCH_SST

PECI

RCIN#

VSS

PWM0

PWM1

PWM2

PWM3

SST

VSS VSS VSS VSS VSS VSS VSS VSS VSS

0 1

0

C2122 0.1U_0402_16V4Z@ESD@ C2122 0.1U_0402_16V4Z@ESD@

C2123 5P_0402_50V@ ESD@ C2123 5P_0402_50V@ESD@

R195 0_0402_5%@ R195 0_ 0402_5%@

3

+

1 2

R197 0_0402_5%@ R197 0_ 0402_5%@

1

C2124

0.1U_0402_16V4Z

2

@ESD@

1 2

R200 0_0402_5%@R200 0_0402_5%@

SKU ID TABLE

VS

12

GPIO68_H@

1

81

R

R 10K_0402_5%

10K_0402_5%

P

H_GPIO68

C

12

GPIO68_L@

R188

R188 10K_0402_5%

10K_0402_5%

EC_SCI# [43]

T116PADT116PAD

1

3

VS

+

12

GPIO69_H@

1

80

R

R 10K_0402_5%

10K_0402_5%

P

H_GPIO69

C

12

GPIO69_L@

R187

R187 10K_0402_5%

10K_0402_5%

GATEA20 [43]

H_PECI [43,5]

KB_RST# [43]

H_PWRG OOD [5]

H_THERMTRIP# [5] DGPU_THERMTRIP# [ 21]

CPU_PLTRST# [5]

3

VS

+

12

P

12

GATEA20

KB_RST#

H_PWRG OOD

H_THERMTRIP#

GPIO70_H@

1

82

R

R 10K_0402_5%

10K_0402_5%

H_GPIO70

C

GPIO70_L@

R189

R189 10K_0402_5%

10K_0402_5%

R194 10K_0402_5%R 194 10K_0402_5%

R196 10K_0402_5%R 196 10K_0402_5%

V0.3 update for sequence EA

DGPU_PW ROK [23,52,53]

Config

PCHSTRAP 4&9

Set by GPIO16/49

USB X6,PCIEX8,SATAX4 01

+3VS

1 2

R205 10K_0402_5%R 205 10K_0402_5%

1 2

R207 10K_0402_5%R 207 10K_0402_5%

PCH_GPIO16

PCH_GPIO49

1 2

C2125 0.1U_0402_16V4Z@ESD@ C2125 0.1U_0402_16V4Z@ESD@

1 2

C125 0.1U_0402_16V4Z@EMI@ C125 0.1U_0402_16V4Z@EMI@

11

00USB X4,PCIEX8,SATAX6

3

+

12

VS

R

R 10K_0402_5%

10K_0402_5%

P

C

@

R190

R190 10K_0402_5%

10K_0402_5%

1

83

H_GPIO71

+3VS

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_CPU/GPIO

ZEA00 LA-A061P M/B

17 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

3

VALW_PCH

+

0.1U_0402_16V4Z

1 2

0.1U_0402_16V4Z

1

.05VS_VPCH

+

1

CH

CH 1

1

2

close to AP22

+PCH_USB_DCPSUS2

+1.05VS_VPCH

+

VS

3

1U_0402_6.3V6K

1

CH

CH 2

2

1U_0402_6.3V6K

2

1

2

+1.05VS_VPCH

CH6

1U_0402_6.3V6K

1

2

close to M14

1U_0402_6.3V6K

@

Integrated VRMs enabled. DCPSUS1, DCPSUS2 and

1

CH

DCPSUS3 can be left floating.

17

2

1 2

R211 0_0805_5%@ R211 0_0805_5%@

+1.05V_+1.5V_RUN

CH10

10U_0603_6.3V6M

1

2

+PCH_VCCCLK

1

2

+PCH_VCC

CH11

+PCH_VCCCLK3_3

10U_0603_6.3V6M

1U_0402_6.3V6K

@ CH23

@

CH23

1

2

CH24

+PCH_USB_DCPSUS2

+PCH_VCC

+PCH_VCCCLK

D D

+1.05VS_VPCH

RH3 0_0402_5%@ RH3 0_0402_5%@

C C

4

L

T_PCH_DT_EDS

P

U

H

1

AH18

V

CSUS3_3

C

AH20

V

CSUS3_3

C

AH22

C

CSUS3_3

V

AJ20

V

CSUS3_3

C

U8

S

V

AP22

C

CUSBPLL

V

AF26

VCC3_3

AF20

VCCIO

AF22

VCCIO

AF23

VCCIO

M14

VCCIO

AJ22

DCPSUS2

A40

VCCVRM

AB1

VCC

AM7

VCCCLK3_3

AM9

VCCCLK3_3

AP5

VCCCLK3_3

AP7

VCCCLK3_3

AR4

VCCCLK3_3

AT5

VCCCLK3_3

AG12

VCCCLK3_3

AK11

VCCCLK3_3

AV3

VCCCLK3_3

AV4

VCCCLK3_3

AW3

VCCCLK3_3

AW4

VCCCLK3_3

AW9

VCCCLK3_3

U12

VCCCLK

V14

VCCCLK

W14

VCCCLK

AB2

VCCCLK

AA16

VCCCLK

W16

VCCCLK

T16

VCCCLK

V16

VCCCLK

1U_0402_6.3V6K

CH25

1

2

1

2

P

USB

GPIO/LPC

Azalia

RTC

Internal

1U_0402_6.3V6K

CPU

SPI

CH27

VRM

ICC

DH82LPDS_FCBGA708

1U_0402_6.3V6K

CH26

1

2

V

C C

V

CDSW3_3

C C

CDSW3_3

V V

CDSW3_3

C

Internal VRM

VCCSUSHDA

VCCSUS3_3

V_PROC_IO

CSUS3_3 CSUS3_3

DCPSST

VCC3_3 VCC3_3 VCC3_3

VCCIO

VCCRTC

DCPRTC

VCCSPI

VCCASW

VCCVRM

1

2

3

AK20 P20

AW38 AW39 AV39

AH28

AG1 B6 AW21

AC12

AW26

AP35

AP33

AW35

C39

R41

W26

AD25

T14

B4

C1

C2

1U_0402_6.3V6K

CH28

Close to AK20

C

H

+

VALW_PCH

3

1U_0402_6.3V6K

1 2

P

CH_VCCDSW3_3

+

+PCH_VCCSST

CH5 0.1U_0402_16V4ZCH5 0.1U_0402_16V4Z

+1.05VS_VPCH

+PCH_DCPRTC

0.1U_0402_16V4Z

+PCH_VPROC

1 2

@

RH10 0_0402_5%

+1.05VS_VPCH

+1.5VS

0.1U_0402_16V4Z

1

CH19

Close to T14

2

3

1 2

CH14

1 2

+

CH_VCCDSW3_3

P

+3VALW_PCH

1

2

1 2

R

1 0_0402_5%@

H

CH4

Close to AW39

1

2

H

+RTCVCC

0.1U_0402_16V4Z

CH15

+3VALW_PCH

1U_0402_6.3V6K

1

CH16

2

Close to AP33

1

2

0.1U_0402_16V4Z

1

2

1U_0402_6.3V6K

CH18

+3VALW_PCH

1U_0402_6.3V6K

CH13

Close C39

+

0.1U_0402_16V4Z

1

CH12

2

Close to AP35

3

VALW_PCH

+

VS

3

0.1U_0402_16V4Z

1

CH7

2

Close to AG1close to AF26

Close to AW26

+PCH_VPROC+PCH_VPROC

0.1U_0402_16V4Z

1

CH20

2

Close to AW21

1U_0402_6.3V6K

1

CH8

2

+PCH_VPROC

0.1U_0402_16V4Z

1

CH21

2

0.1U_0402_16V4Z

1

CH9

2

Close to B6

1 2

R210 0_0805_5%@ R210 0_0805_5%@

1U_0402_6.3V6K

1

CH22

2

1

+1.05VS_VPCH

AA16, W16 Place near pin W14Place near pin U12 Place near pin AB2 Place near pin V16

B B

A A

+3VS

1 2

R212 0_0805_5%@ R212 0_0805_5%@

+1.05VS_VPCH

1 2

10UH_LQM21FN100M70L _20%

10uH

5

+PCH_VCCCLK3_3

1U_0402_6.3V6K

CH29

1

2

1U_0402_6.3V6K

CH30

1

2

1U_0402_6.3V6K

CH31

1

2

Place near pin AV4 Place near pin AT5Place near pin AR4 Place near pin AP5

LH1

+PCH_VCC+PCH_VCC+PCH_VCC

+PCH_VCC

1U_0402_6.3V6K

10U_0603_6.3V6M

CH34

CH33

1

2

Place near pin AB1

4

R213

1K_0402_5%

1U_0402_6.3V6K

CH32

1

2

@ C127

@

0.1U_0402_16V4Z

+RTCVCC

1

C127

1

2

+RTCVCC

C128

C128 1U_0402_6.3V6K

1U_0402_6.3V6K

D1

1

BAV70W_SOT323-3

2

+RTCBATT_R

3

1K_0402_5%

1 2

+3VSB

+RTCBATT

Close to AP33

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-1

ZEA00 LA-A061P M/B

1

18 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

4

3

2

1

If CRT disable Pin AF2 & Pin AE1 can connect to GND

1 2

H

11 0_0402_5%

R

D D

LPT_PCH_DT_EDS

U1G

AA19 AA20 AB16 AB17 AB19 AB20

AD16

AU41 AU40

AA23 AA25 AA26 AB22 AB23 AB25

AB26 AD17 AD19 AD20 AD22 AD23

AF25

W17 W19 W23 W25

V17 V19 V20 V22 V23 V25

U1G

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

DCPSUSBYP DCPSUSBYP VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW

Internal VRM

+1.05VS_VPCH

10U_0603_6.3V6M

1U_0402_6.3V6K

1

CH

41

37

2

C C

+1.05VS_VPCH

10U_0603_6.3V6M

1

CH

CH 46

46

2

1U_0402_6.3V6K

1

CH

39

38

2

+PCH_VCCDSW +PCH_USB_DCPSUS3

1U_0402_6.3V6K

22

22 U_0805_6.3V6M

U_0805_6.3V6M

1

CH

29

47

C1

2

Close to PIN AD17,AD19

1 2

RH7 5.11_0402_1%RH7 5.11_0402_1%

B B

1U_0402_6.3V6K

CH_VCCDSW_R +P

1

CH

CH 58

58

2

+PCH_VCCDSW

LPT_PCH_DT_EDS

CRT DAC

FDI

HVCMOS

Core

USB3

PCIe/DMI

VCCMPHY

DH82LPDS_FCBGA708

RH8 0_0603_5%

SATA

@

12

VCCADAC1_5

VSS

VCCADACBG3_3

VCCVRM

VCCIO

VCC3_3 VCC3_3

DCPSUS1

VCCSUS3_3 VCCSUS3_3

DCPSUS3

VCCIO VCCVRM VCCVRM VCCVRM

VCCVRM

VCCIO

VCCVRM

VCCIO

+1.05V_+1.5V_RUN+1.5VS

AF2

V26

AE1

B37

P14

P16

U30 W30

AE30

AM33 AN33

P19 P17 A38 K1 A4

B39

P22

A39

P23

P25 P26 P28 T19 T20 AF19

+3VS_AE1

+PCH_USB_DCPSUS1

RH4 0_0402_5%CRT@ RH4 0_0402_5%CRT@

1 2 1 2

RH5 0_0402_5%RH 5 0_0402_5%

+1.05VS_VPCH

1U_0402_6.3V6K

1

CH51

2

+

CCADAC

V

0.01U_0402_16V7K

CRT@ CH35

0.01U_0402_16V7K

CRT@

1

CH35

2

+3VS

1U_0402_6.3V6K

1

CH52

2

Close to P17,P26,P28,AF19

0.1U_0402_16V4Z

CRT@ CH40

0.1U_0402_16V4Z

CRT@

1

CH40

2

1U_0402_6.3V6K

1

CH53

CH54

2

R

L

2

CRT@

2

CRT@

H

1 2

BLM18PG181SN1D_0603

10U_0603_6.3V6M

1

@

CH36

2

As Intel recommend to unpop

+3VALW_PCH

0.1U_0402_16V4Z

1

CH45

1

CH55

2

+1.05V_+1.5V_RUN

1

2

10U_0603_6.3V6M

CH56

10U_0603_6.3V6M

Close to AN33

+1.05VS_VPCH

10U_0603_6.3V6M

1

2

+1.05VS_VPCH

+3VS

0.1U_0402_16V4Z

1

CH44

2

+1.05V_+1.5V_RUN

10U_0603_6.3V6M

1

CH49

2

CH50

+PCH_USB_DCPSUS3

10U_0603_6.3V6M

@CH59

@

1

CH59

2

+

.5VS

1

+1.05V_+1.5V_RUN

1

1U_0402_6.3V6K

1

2

CH43

2

Close to P14, P16

Close to W30

10U_0603_6.3V6M

@

1

CH48

2

+PCH_USB_DCPSUS1

1U_0402_6.3V6K

@CH57

@

1

CH57

2

1U_0402_6.3V6K

@

1

CH60

2

10U_0603_6.3V6M

@CH42

@

CH42

+1.05VS_VPCH

@

12

RH60_0402_5%

Integrated VRMs enabled. DCPSUS1, DCPSUS2 and DCPSUS3 can be left floating.

+1.05VS_VPCH

@

1 2

RH9 0_0603_5%

Voltage Rail

VCCADAC1_5

VCCCLK3_3

VCCVRM

PCH Power Rail Table

S0 Iccmax Current (A)Voltage

1.29 A1.05VVCC

3.629 A1.05VVCCIO

0.070 A1.5V

3.3V 0.0133 AVCCADAC3_3

1.05V 0.306 AVCCCLK

3.3V

1.5V 0.179 A

3.3VVCCSPI

3.3VVCCSUS3_3

1.05VV_PROC_IO

0.055 A

0.133 A3.3VVCC3_3

0.67 A1.05VVCCASW

0.01 A3.3VVCCSUSHDA

0.022 A

0.261 A

0.015 A3.3VVCCDSW3_3

0.004 A

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-2

ZEA00 LA-A061P M/B

1

19 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

P

T_PCH_DT_EDS

L

1

J

U

A12

V

S

A16

S

V

A21

S

V

A35

S

V

B3

S

V

B25

V

S

B30

V

S

B33

V

S

B38

S

V

C6

V

S

C25

S

V

D D

C C

C37

V

S

D4

S

V

D6

V

S

D7

S

V

D8

VSS

D9

VSS

D12

VSS

D13

VSS

D14

VSS

D16

VSS

D18

VSS

D19

VSS

D20

VSS

D22

VSS

D24

VSS

D25

VSS

D26

VSS

D27

VSS

D28

VSS

D31

VSS

D32

VSS

D34

VSS

D37

VSS

E3

VSS

E4

VSS

E5

VSS

E7

VSS

E12

VSS

E31

VSS

E35

VSS

E38

VSS

F18

VSS

F24

VSS

F35

VSS

F37

VSS

F38

VSS

V V V V V V V V V V V V V V V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

S S S S S S S S S S S S S S S

G2

S

H4

S

H6

S

H8

S

H9

S

H14

S

H16

S

H20

S

H22

S

H26

S

H28

S

H33

S

H34

S

H38

S

J5

S

J31 J37 K4 K9 K31 L37 L41 M16 M18 M20 M22 M24 M26 M28 N4 N8 N31 N35 N38 R1 R8 R10 R34 T17 T22 T23 T25 T26 T28 U1 U4 U31

DH82LPDS_FCBGA708

4

3

P

T_PCH_DT_EDS

L

1

K

U

U32

AA5

AA8 AA10 AA11 AA12 AA14 AA17 AA22 AA28 AA30 AA34

AB4 AB14 AB28

AC5

AC8

AC30 AC34 AC38 AD14 AD26 AD28

AE4

AE8 AE12 AE31 AE41 AF14 AF16 AF17 AF28

AG2

AG8 AG30 AG34 AG38 AH14 AH16

AJ28

AK9

S

V

W5

S

V

W8

S

V

Y1

V

S

Y41

V

S

V

S

S S

S

V V

S

S S

S

V V

S

S S

S

V V

S

S S

S

V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ1

VSS VSS VSS

V V V V V V V V V V V V V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

S S S S S S S S S S S S S

2

AK24

S

AK37

S

AL5

S

AL11

S

AL37

S

AM4

S

AM6

S

AM8

S

AM14

S

AM16

S

AM18

S

AM20

S

AM24

S

AM26 AM35 AM38 AN28 AP4 AP9 AR11 AR35 AR37 AT7 AT8 AT10 AT11 AT14 AT15 AT16 AT18 AT20 AT21 AT23 AT24 AT28 AT29 AT33 AT36 AT38 AU3 AU39 AV12 AV17 AV33 AW7 AW30

DH82LPDS_FCBGA708

1

B B

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_GND

ZEA00 LA-A061P M/B

20 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

P

IE_CTX_C_GRX_P[0..15]

P

IE_CTX_C_GRX_P[0..15][6]

C

IE_CTX_C_GRX_N[0..15][6]

P

IE_GTX_C_CRX_P[0..15][6]

C

P

IE_GTX_C_CRX_N[0..15][6]

C

D D

C

IE_CTX_C_GRX_N[0..15]

P

IE_GTX_C_CRX_P[0..15]

C

P

IE_GTX_C_CRX_N[0..15]

C

Reserve for x16 GPU

PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_N0 PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_N1 PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_N2

5

P

4

Y

G

3

+3VS_VGA

5

4

2N7002DW-T/R7_SOT36 3-6

2

61

PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_N3 PCIE_GTX_C_CRX_P4 PCIE_GTX_C_CRX_N4 PCIE_GTX_C_CRX_P5 PCIE_GTX_C_CRX_N5 PCIE_GTX_C_CRX_P6 PCIE_GTX_C_CRX_N6 PCIE_GTX_C_CRX_P7 PCIE_GTX_C_CRX_N7 PCIE_GTX_C_CRX_P8 PCIE_GTX_C_CRX_N8 PCIE_GTX_C_CRX_P9 PCIE_GTX_C_CRX_N9 PCIE_GTX_C_CRX_P10 PCIE_GTX_C_CRX_N10 PCIE_GTX_C_CRX_P11 PCIE_GTX_C_CRX_N11 PCIE_GTX_C_CRX_P12 PCIE_GTX_C_CRX_N12 PCIE_GTX_C_CRX_P13 PCIE_GTX_C_CRX_N13 PCIE_GTX_C_CRX_P14 PCIE_GTX_C_CRX_N14 PCIE_GTX_C_CRX_P15 PCIE_GTX_C_CRX_N15

+3VS_VGA

@

R229

R229 10K_0402_5%

10K_0402_5%

1 2

12

R231

R231 100K_0402_5%

100K_0402_5%

v0.2 update

DIS@

Q5B

3

Differential signal

EC_SMB_CK2 [13,43,46]

EC_SMB_DA2 [13,43,46]

C C

Reserve for x16 GPU

@

R228

R228 0_0402_5%

0_0402_5%

1 2

PLT_RST#

B B

PLT_RST#[15,41,43 ]

DGPU_HOLD_RST#[15,43]

MC74VHC1G08DFT2G SC70 5P

DIS@

R236

2.2K_0402_5%

A A

VGA_SMB_CK2

VGA_SMB_DA2

+3VS_VGA

2

B

1

A

U7

v0.2 update

+3VS_VGA

DIS@

R237

2.2K_0402_5%

1 2

DIS@

Q5A

2N7002DW-T/R7_SOT36 3-6

5

1 2

C131 0.22U_0402_16V7KDIS@ C131 0.22 U_0402_16V7KDIS@ C132 0.22U_0402_16V7KDIS@ C132 0.22 U_0402_16V7KDIS@

1 2 1 2

C133 0.22U_0402_16V7KDIS@ C133 0.22 U_0402_16V7KDIS@ C134 0.22U_0402_16V7KDIS@ C134 0.22 U_0402_16V7KDIS@

1 2

C135 0.22U_0402_16V7KDIS@ C135 0.22 U_0402_16V7KDIS@

1 2 1 2

C136 0.22U_0402_16V7KDIS@ C136 0.22 U_0402_16V7KDIS@ C137 0.22U_0402_16V7KDIS@ C137 0.22 U_0402_16V7KDIS@

1 2 1 2

C138 0.22U_0402_16V7KDIS@ C138 0.22 U_0402_16V7KDIS@ C139 0.22U_0402_16V7KDIS@ C139 0.22 U_0402_16V7KDIS@

1 2

C140 0.22U_0402_16V7KDIS@ C140 0.22 U_0402_16V7KDIS@

1 2 1 2

C141 0.22U_0402_16V7KDIS@ C141 0.22 U_0402_16V7KDIS@ C142 0.22U_0402_16V7KDIS@ C142 0.22 U_0402_16V7KDIS@

1 2 1 2

C143 0.22U_0402_16V7KDIS@ C143 0.22U_0402_ 16V7KDIS@ C144 0.22U_0402_16V7KDIS@ C144 0.22 U_0402_16V7KDIS@

1 2

C145 0.22U_0402_16V7KDIS@ C145 0.22 U_0402_16V7KDIS@

1 2 1 2

C146 0.22U_0402_16V7KDIS@ C146 0.22 U_0402_16V7KDIS@ C2096 0.2 2U_0402_16V7K@ C2096 0.22U_0402_16V7K@

1 2 1 2

C2097 0.2 2U_0402_16V7K@ C2097 0.22U_0402_16V7K@ C2098 0.2 2U_0402_16V7K@ C2098 0.22U_0402_16V7K@

1 2

C2099 0.2 2U_0402_16V7K@ C2099 0.22U_0402_16V7K@

1 2 1 2

C2100 0.2 2U_0402_16V7K@ C2100 0.22U_0402_16V7K@ C2101 0.2 2U_0402_16V7K@ C2101 0.22U_0402_16V7K@

1 2 1 2

C2102 0.2 2U_0402_16V7K@ C2102 0.22U_0402_16V7K@ C2103 0.2 2U_0402_16V7K@ C2103 0.22U_0402_16V7K@

1 2

C2104 0.2 2U_0402_16V7K@ C2104 0.22U_0402_16V7K@

1 2 1 2

C2105 0.2 2U_0402_16V7K@ C2105 0.22U_0402_16V7K@ C2106 0.2 2U_0402_16V7K@ C2106 0.22U_0402_16V7K@

1 2 1 2

C2107 0.2 2U_0402_16V7K@ C2107 0.22U_0402_16V7K@ C2108 0.2 2U_0402_16V7K@ C2108 0.22U_0402_16V7K@

1 2

C2109 0.2 2U_0402_16V7K@ C2109 0.22U_0402_16V7K@

1 2 1 2

C2110 0.2 2U_0402_16V7K@ C2110 0.22U_0402_16V7K@ C2111 0.2 2U_0402_16V7K@ C2111 0.22U_0402_16V7K@

1 2

CLK_PCIE_VGA[1 3]

CLK_PCIE_VGA#[13 ]

4

1 2

@

R230 200_ 0402_1%

4

P

IE_CTX_C_GRX_P0

C

P

IE_CTX_C_GRX_N0

C

P

IE_CTX_C_GRX_P1

C

P

IE_CTX_C_GRX_N1

C

P

IE_CTX_C_GRX_P2

C C

IE_CTX_C_GRX_N2

P P

IE_CTX_C_GRX_P3

C

P

IE_CTX_C_GRX_N3

C

P

IE_CTX_C_GRX_P4

C

P

IE_CTX_C_GRX_N4

C

P

IE_CTX_C_GRX_P5

C

P

IE_CTX_C_GRX_N5

C C

IE_CTX_C_GRX_P6

P

C

IE_CTX_C_GRX_N6

P PCIE_CTX_C_GRX_P7 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_N15

PCIE_GTX_CRX_P0 PCIE_GTX_CRX_N0 PCIE_GTX_CRX_P1 PCIE_GTX_CRX_N1 PCIE_GTX_CRX_P2 PCIE_GTX_CRX_N2 PCIE_GTX_CRX_P3 PCIE_GTX_CRX_N3 PCIE_GTX_CRX_P4 PCIE_GTX_CRX_N4 PCIE_GTX_CRX_P5 PCIE_GTX_CRX_N5 PCIE_GTX_CRX_P6 PCIE_GTX_CRX_N6 PCIE_GTX_CRX_P7 PCIE_GTX_CRX_N7 PCIE_GTX_CRX_P8 PCIE_GTX_CRX_N8 PCIE_GTX_CRX_P9 PCIE_GTX_CRX_N9 PCIE_GTX_CRX_P10 PCIE_GTX_CRX_N10 PCIE_GTX_CRX_P11 PCIE_GTX_CRX_N11 PCIE_GTX_CRX_P12 PCIE_GTX_CRX_N12 PCIE_GTX_CRX_P13 PCIE_GTX_CRX_N13 PCIE_GTX_CRX_P14 PCIE_GTX_CRX_N14 PCIE_GTX_CRX_P15 PCIE_GTX_CRX_N15

CLK_REQ_GPU#

PEX_TSTCLK_OUT PEX_TSTCLK_OUT#

PLT_RST_VGA# PEX_TERMP

1 2

+3VS_VGA

@

R238

R238 10K_0402_5%

10K_0402_5%

1 2

@

R239

10K_0402_5%

1 2

6

U

AN12

P

X_RX0

E

AM12

P

X_RX0_N

E

AN14

P

X_RX1

E

AM14

E

X_RX1_N

P

AP14

E

X_RX2

P

AP15

P

X_RX2_N

E

AN15

E

X_RX3

P

AM15

P

X_RX3_N

E

AN17

P

X_RX4

E

AM17

P

X_RX4_N

E

AP17

E

X_RX5

P

AP18

P

X_RX5_N

E

AN18

P

X_RX6

E

AM18

P

X_RX6_N

E

AN20

PEX_RX7

AM20

PEX_RX7_N

AP20

PEX_RX8

AP21

PEX_RX8_N

AN21

PEX_RX9

AM21

PEX_RX9_N

AN23

PEX_RX10

AM23

PEX_RX10_N

AP23

PEX_RX11

AP24

PEX_RX11_N

AN24

PEX_RX12

AM24

PEX_RX12_N

AN26

PEX_RX13

AM26

PEX_RX13_N

AP26

PEX_RX14

AP27

PEX_RX14_N

AN27

PEX_RX15

AM27

PEX_RX15_N

AK14

PEX_TX0

AJ14

PEX_TX0_N

AH14

PEX_TX1

AG14

PEX_TX1_N

AK15

PEX_TX2

AJ15

PEX_TX2_N

AL16

PEX_TX3

AK16

PEX_TX3_N

AK17

PEX_TX4

AJ17

PEX_TX4_N

AH17

PEX_TX5

AG17

PEX_TX5_N

AK18

PEX_TX6

AJ18

PEX_TX6_N

AL19

PEX_TX7

AK19

PEX_TX7_N

AK20

PEX_TX8

AJ20

PEX_TX8_N

AH20

PEX_TX9

AG20

PEX_TX9_N

AK21

PEX_TX10

AJ21

PEX_TX10_N

AL22

PEX_TX11

AK22

PEX_TX11_N

AK23

PEX_TX12

AJ23

PEX_TX12_N

AH23

PEX_TX13

AG23

PEX_TX13_N

AK24

PEX_TX14

AJ24

PEX_TX14_N

AL25

PEX_TX15

AK25

PEX_TX15_N

AJ11

PEX_WAKE_N

AL13

PEX_REFCLK

AK13

PEX_REFCLK_N

AK12

PEX_CLKREQ_N

AJ26

PEX_TSTCLK_OUT

AK26

PEX_TSTCLK_OUT_N

AJ12

PEX_RST_N

AP29

PEX_TERMP

N14M-GE2-B-AIO-A2

R234

2.49K_0402_1%

DIS@

CLK_REQ_GPU#

N14M-GE2-B-AIO-A2

Reserve pull-up and down. Don’t have to install component for default, NV reply on 5/4. when system no support CLKREQ

3

A

DIS@

A

DIS@

P

rt 1 of 7

a

PCI EXPRESS

P6

G

U_VID4

G

P

G

P P

G

P

G G

P P

G G

P

G

P

G

P P

G

IO10

P

G

IO11

P

G

IO12

P GPIO13 GPIO14

GPIO

GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC

DACA_VSYNC

DACs

DACA_VDD DACA_VREF DACA_RSET

I2CA_SCL I2CA_SDA

I2CB_SCL I2CB_SDA

I2CC_SCL

I2C

I2CC_SDA

I2CS_SCL I2CS_SDA

PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

CLK

XTAL_OUT

XTAL_OUTBUFF

XTAL_SSIN

C170

DIS@ C170

DIS@

10P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

P

IO0

M3

G

U_VID3

P

IO1

L6

IO2

P5

V

A_GPIO3

G

IO3

P7

IO4

L7

G

U_VID1

P

IO5

M7

G

U_VID2

P

IO6

N8

IO7

M1

O

ERT#

V

IO8

M2

E

ENT#_R

V

IO9

L1 M5

P

U_PWM_VID

G

N3

G

A_GPIO12

V

M4

NVVDD_PSI

N4 P2 R8

VGA_GPIO16

M6 R1 P3 P4 P1

AK9 AL10 AL9

AM9 AN9

AG10

+DACA_VDD

AP9 AP8

R4

VGA_CRT_CLK

R5

VGA_CRT_DATA

R7

I2CB_SCL

R6

I2CB_SDA

R2

VGA_EDID_CLK

R3

VGA_EDID_DATA

T4

VGA_SMB_CK2

T3

VGA_SMB_DA2

60mA

+PLLVDD

AD8

R227

1 2

45mA

AE8

45mA

AD7

H3

XTALIN

H2

XTAL_OUT

J4

XTALOUT

H1

XTALSSIN

R232

DIS@ R232

DIS@

10K_0402_5%

1 2

R235 10M_0402_ 5%DIS@ R235 10M_0 402_5%DIS@

Y3

DIS@ Y3

DIS@

4

NC

1

XTALIN

1

2

OSC

27MHZ 10PF +-20PPM X3G027000DA1H

0_0402_5%

T

17

1

1 1

1

18

T

29

1

T

19

1

T

20

1

G

U_PWM_VID [5 2]

P

NVVDD_PSI [52 ]

0327 Update

12

DIS@

R224

R224 10K_0402_5%

10K_0402_5%

@R227

@

+SP_PLLVDD

12

R233

10K_0402_5%

DIS@

3

XTAL_OUT

OSC

2

NC

C171

DIS@ C171

DIS@

10P_0402_50V8J

2013/04/01 2014/04/01

+

0327 Update

T130T130

Under GPU

1

2

v0.3 update

Compal Secret Data

Deciphered Date

2

DIS@

2

14 10K_0402_5%

R

3

VS_VGA

1 2

@

C

DMN66D0LDW-7 2N_SOT363-6

12

30 0.1U_0402_10V6K

1

DIS@

Q

4

2

0327 Update

DIS@

EVENT#_R

VGA_EDID_CLK

VGA_EDID_DATA

VGA_CRT_DATA

VGA_CRT_CLK

I2CB_SCL

I2CB_SDA

OVERT#

VGA_GPIO12

1 2

DIS@

R217 10K_0402_5%

1 2

R218 2.2K_0402_5%

DIS@

1 2

DIS@

R219 2.2K_0402_5%

1 2

R220 2.2K_0402_5%

DIS@

1 2

R221 2.2K_0402_5%

DIS@

1 2

R222 2.2K_0402_5%

DIS@

1 2

DIS@

R223 2.2K_0402_5%

1 2

DIS@

R225 10K_0402_5%

1 2

R226 10K_0402_5%

0327 Update

30 ohms @100MHz (ESR=0.05)

1

C163

2

0.1U_0402_10V6K

DIS@

2

DIS@ L1

DIS@

1 2

SBY100505T-300Y-N_0402

1

C164

Near GPU

2

22U_0805_6.3V6M

+1.05VS_VGA

180ohms (ESR=0.2) Bead

DIS@ L2

DIS@

BLM18PG330SN1D_0603

61

A

+3VS_VGA

L1

1 2

L2

1

G

PU_THERMTRIP# [17]

3

5

4

+1.05VS_VGA

D

Q

B

4

DMN66D0LDW-7 2N_SOT363-6

DIS@

Under GPU(below 150mils) Put C169 close to U65.AE8

150mA

1

C165

2

DIS@

22U_0805_6.3V6M

4.7U_0402_6.3V6M

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

N14M-GE2-PCIE/DAC/GPIO

C167

C166

2

0.1U_0402_10V6K

DIS@

ZEA00 LA-A061P M/B

1

2

DIS@

+SP_PLLVDD

1

C169

C168

2

0.1U_0402_10V6K

DIS@

0.3

21 59Tuesday, September 24, 2013

5

WWW.AliSaler.Com

D D

C C

B B

A A

4

D

DIS@

U6

AM6

F

PA_TXC

I

AN6

I

PA_TXC_ N

F

AP3

I

PA_TXD0

F

AN3

I

PA_TXD0 _N

F

AN5

I

PA_TXD1

F

AM5

I

PA_TXD1 _N

F

AL6

I

PA_TXD2

F

AK6

I

PA_TXD2 _N

F

AJ6

I

PA_TXD3

F

AH6

I

PA_TXD3 _N

F

AJ9

I

PB_TXC

F

AH9

I

PB_TXC_ N

F

AP6

IFPB_TXD4

AP5

IFPB_TXD4 _N

AM7

IFPB_TXD5

AL7

IFPB_TXD5 _N

AN8

IFPB_TXD6

AM8

IFPB_TXD6 _N

AK8

IFPB_TXD7

AL8

IFPB_TXD7 _N

AK1

IFPC_L0

AJ1

IFPC_L0_N

AJ3

IFPC_L1

AJ2

IFPC_L1_N

AH3

IFPC_L2

AH4

IFPC_L2_N

AG5

IFPC_L3

AG4

IFPC_L3_N

AM1

IFPD_L0

AM2

IFPD_L0_N

AM3

IFPD_L1

AM4

IFPD_L1_N

AL3

IFPD_L2

AL4

IFPD_L2_N

AK4

IFPD_L3

AK5

IFPD_L3_N

AD2

IFPE_L0

AD3

IFPE_L0_N

AD1

IFPE_L1

AC1

IFPE_L1_N

AC2

IFPE_L2

AC3

IFPE_L2_N

AC4

IFPE_L3

AC5

IFPE_L3_N

AE3

IFPF_L0

AE4

IFPF_L0_N

AF4

IFPF_L1

AF5

IFPF_L1_N

AD4

IFPF_L2

AD5

IFPF_L2_N

AG1

IFPF_L3

AF1

IFPF_L3_N

AG3

IFPC_AUX_ I2CW _SCL

AG2

IFPC_AUX_ I2CW _SDA_N

AK3

IFPD_AUX_ I2CX_SCL

AK2

IFPD_AUX_ I2CX_SDA _N

AB3

IFPE_AUX_ I2CY_SCL

AB4

IFPE_AUX_ I2CY_SDA_N

AF3

IFPF_AUX_ I2CZ_SCL

AF2

IFPF_AUX_ I2CZ_SDA _N

N1

4M-GE2-B-AIO-A2

a

rt 4 of 7

Part 4 of 7

P

LVDS/TMDS

MULTI_STR AP_REF0_GND

3

NC

VDD_SEN SE

GND_SEN SE

TEST

TESTMOD E

JTAG_TC K

JTAG_TD I JTAG_TD O JTAG_TM S

JTAG_TR ST_N

SERIAL

ROM_CS_ N

ROM_SCL K

ROM_SI

ROM_SO

GENERAL

BUFRST_ N

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

THERMDP THERMDN

CEC

N N N N N N N N N N N N N NC

C C C C C C C C C C C C C

8

P

C6

A

J28

A

J4

A

J5

A

L11

A

15

C

19

D

20

D

23

D

26

D

31

H

8

T V32

L4

VGA_VCC_SENSE

L5

VGA_VSS_SENSE

AK11

AM10 AM11 AP12 AP11 AN11

H6 H4 H5 H7

L2

L3

J1

J2 J7 J6 J5 J3

K3 K4

TESTMODE

1 2

R241 10K_0402_5%

DIS@

ROM_CS ROM_SCLK ROM_SI ROM_SO

R242 10K_0402_5%DIS@R242 10K_0402_5%DIS@

R243 10K_0402_5%DIS@R243 10K_0402_5%DIS@

R244 40.2K_0402_1%@R244 40.2K_0402_1%@

1 2

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

12

V

+

T122T122 T123T123 T124T124 T125T125

ROM_SCLK [28] ROM_SI [28] ROM_SO [28]

STRAP0 [28] STRAP1 [28] STRAP2 [28] STRAP3 [28] STRAP4 [28]

GA_CORE

R623

R623 100_0402_1%

100_0402_1%

DIS@

1 2

DIS@

R624

100_0402_1%

+3VS_VGA

ROM_CS ROM_SO

2

VGA_VCC_SENSE [52]

VGA_VSS_SENSE [52]

12

10K_0402_5%

10K_0402_5% R240

R240

DIS@

Un-pop R244-0415 Update

EVT@

C172

0.1U_0402_16V4Z

12

10K_0402_5%

EVT@

R247 33_0402_5%

1 2 1 2

R248 0_0402_5%

EVT@

10K_0402_5%

ROM_CS_R ROM_SO_R

trace width: 16mils differential voltage sensing. differential signal routing.

Reserve 1MB SPI ROM FOR VBIOS ROM

+3VS_VGA

20mils

12

EVT@

R245

U8

EVT@U8

EVT@

1

CS#

2

DO

3

WP#

4

GND

MX25L1005AMC-12G SOP

VCC

HOLD#

CLK

DIO

8 7 6 5

ROM_HOLD#

ROM_SCLK_R ROM_SI_R

1

12

EVT@

R246

R246 10K_0402_5%

10K_0402_5%

R249 33_0402_5%EVT@ R249 33_0402_5%EVT@

1 2 1 2

R250 33_0402_5%EVT@ R250 33_0402_5%EVT@

ROM_SCLK ROM_SI

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N14M-GE2-LVDS/HDMI/DP/THM

ZEA00 LA-A061P M/B

1

of

22 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

+

.5VS_VGA

1

D D

1

.5VS_VGA

+

92

1

C1

2

DIS@

4.7U_0603_6.3V6K

4.7uF X7R 0402 * 2

uF X7R 0402 * 2

94

93

DIS@

93

1

C1

2

DIS@

1U_0603_10V6K

1

C195

C1

2

DIS@

1U_0603_10V6K

Under GPU(below 150mils)

1

0.1U_0402_10V6K

DIS@

1

C196

2

0.1U_0402_10V6K

DIS@

C198

C197

2

0.1U_0402_10V6K

DIS@

22U_0805_6.3V6M

1

C199

2

rise 1.5v system source voltage to 1.55-1.57V

C C

Follow PUN-05893

CALIBRATION PIN

FB_CAL_x_PD_VDDQ

FB_CAL_x_PU_GND

FB_CAL_xTERM_GND

+1.5V to +1.5VS_VGA

B B

Supply from Power-0411 update.

+1.05VS_VPCH

+5VALW

12

C246

10U_0805_10V6K DIS@

R283 0_0402_5%

0_0402_5%

10U_0805_10V6K DIS@

R279

R279 20K_0402_1%

20K_0402_1%

DIS@

1 2

DIS@

Q14

13

D

2N7002KW_SOT323-3

2

G

S

5

1 2

v0.3 update

A A

@ R283

@

DGPU_PWROK#

1 2

AO4354_SOIC-8

DIS@

R282

2K_0402_1%

2

DIS@ Q10

DIS@

8 7 6 5

J3

JUMP_43X118

Q10

@J3

@

112

1 2 3

4

v0.3 update

DIS@

12

C251

0.1U_0603_25V7K

+1.05VS_VGA

10U_0805_10V6K

Near GPU

1

C173

@

2

I

D

10U_0603_6.3V6M

0.1uF X7R 0402 * 8 1

1

C200

2

0.1U_0402_10V6K

DIS@

DDR3

40.2Ohm

42.2Ohm

51.1Ohm

DIS@

12

C247

1U_0603_10V6K

4

2

C174

1

S@

1

2

0.1U_0402_10V6K

DIS@

+1.5VS_VGA

12

4

2

C175

1

I

S@

D

10U_0603_6.3V6M

1

C201

2

0.1U_0402_10V6K

DIS@

R258 40.2_0402_1%

R261 42.2_0402_1%

R263 51.1_0402_1%

Place near balls

DIS@

C248

1 2

13

D

S

2

C176

1

I

S@

D

10U_0603_6.3V6M

1

C202

2

0.1U_0402_10V6K

DIS@

1 2

DIS@

1 2

DIS@

1 2

DIS@

R277

DIS@R277

DIS@

22_0603_5%

Q13

DIS@

Q13

DIS@

2N7002KW_SOT323-3

2

DGPU_PWROK#

G

C177

C203

v0.3 update

3.5A

AA27 AA30 AB27 AB33 AC27 AD27 AE27

AF27

AG27

W27 W30 W33

U

B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24

H8 H9

L27 M27 N27 P27 R27

T27

T30

T33 V27

Y27

F1

F2

J27

H27

H25

DGPU_PWROK[17,52,53]

E

DIS@

E

DIS@

6

P

Part 5 of 7

B

VDDQ_0

F F

VDDQ_1

B

F

VDDQ_2

B B

VDDQ_3

F

B

VDDQ_4

F F

VDDQ_5

B

F

VDDQ_6

B B

VDDQ_7

F F

VDDQ_8

B

F

VDDQ_9

B B

VDDQ_10

F F

VDDQ_11

B FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43

FB_VDDQ_SENSE

FB_GND_SENSE

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

N14M-GE2-B-AIO-A2

3

rt 5 of 7

a

E

X_IOVDD_0

P P

X_IOVDD_1

E

P

X_IOVDD_2

E E

X_IOVDD_3

P

E

X_IOVDD_4

P P

X_IOVDD_5

E

P

X_IOVDDQ_0

E

P

X_IOVDDQ_1

E E

X_IOVDDQ_2

P P

X_IOVDDQ_3

E PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8 PEX_IOVDDQ_9

PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13

PEX_PLL_HVDD

PEX_SVDD_3V3

POWER

PEX_PLLVDD

IFPAB_PLLVDD

IFPAB_RSET

IFPA_IOVDD IFPB_IOVDD

IFPC_PLLVDD

IFPC_RSET

IFPC_IOVDD

IFPD_PLLVDD

IFPD_RSET

IFPD_IOVDD

IFPEF_PLVDD

IFPEF_RSET

IFPE_IOVDD IFPF_IOVDD

R272

@ R272

@

0_0402_5%

1 2

R273

R273 100K_0402_5%

100K_0402_5%

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2000mA

AG19 AG21 AG22 AG24 AH21 AH25

AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28

AH12

+PEX_PLLHVDD

AG12

AG26

J8

VDD33_0

K8

VDD33_1

L8

VDD33_2

M8

VDD33_3

AH8

+IFPAB_PLLVDD

AJ8

AG8

+IFPAB_IOVDD

AG9

AF7

+IFPC_PLLVDD

AF8

AF6

+IFPC_IOVDD

AG7

+IFPD_PLLVDD

AN2

AG6

+IFPD_IOVDD

AB8

+IFPEF_PLLVDD

AD6

AC7 AC8

+IFPE_IOVDD

4/3 Update: Un-stuff R253, R 256, R259 and R 265.

+5VALW

12

DIS@

R268

R268 100K_0402_5%

100K_0402_5%

DGPU_PWROK#

13

D

DIS@

2

Q8

Q8 2N7002_SOT23

2N7002_SOT23

G

12

S

1

C178

C179

2

D

S@

I

1U_0402_6.3V6K

22U_0805_6.3V6M

DIS@

1U_0402_6.3V6K

1

C188

C189

2

22U_0805_6.3V6M

DIS@

Under GPU(below 150mils)

210mA

+PEX_PLLVDD

+VDD33

1 2 1 2

1 2

1 2 1 2

1 2

1 2 1 2

1 2

DGPU_PWR_EN[15,43]

2013/04/01 2014/04/01

Place near balls Place near GPU

R252 10K_0402_5%@ R252 10K_0402_5%@ R253 1K_0402_1%@ R253 1K_0402_1%@

R254 10K_0402_5%@ R254 10K_0402_5%@

R255 10K_0402_5%@ R255 10K_0402_5%@

12

R256 1K_0402_1%@ R256 1K_0402_1%@

R257 10K_0402_5%@ R257 10K_0402_5%@

R260 10K_0402_5%@ R260 10K_0402_5%@ R259 1K_0402_1%@ R259 1K_0402_1%@

R262 10K_0402_5%@ R262 10K_0402_5%@

R264 10K_0402_5%@ R264 10K_0402_5%@ R265 1K_0402_1%@ R265 1K_0402_1%@

R266 10K_0402_5%@ R266 10K_0402_5%@

R278

Compal Secret Data

1

C180

2

D

S@

I

1U_0402_6.3V6K

1

C190

2

22U_0805_6.3V6M

DIS@

Under GPU(below 150mils)

DIS@

0.1U_0402_10V6K

@

0_0402_5%

Deciphered Date

2

N

ar GPU

e

1

C181

2

D

S@

I

1U_0402_6.3V6K

+

1

C191

2

22U_0805_6.3V6M

DIS@

1

C208

2

DIS@

4.7U_0603_6.3V6K

1

C218

2

0.1U_0402_10V6K

DIS@

Reserve for NV DG

+VDD33

1

C224

2

DIS@ C2 24

DIS@

0.1U_0402_10V6K

R02

D

I

4.7U_0603_6.3V6K

.05VS_VGA

C209

C217

2

S@

C182

+3VS_VGA

DIS@

4.7U_0603_6.3V6K

DIS@

1U_0402_6.3V6K

1

C228

@

2

C183

2

D

S@

I

4.7U_0603_6.3V6K

1

C210

2

1

C219

2

4.7U_0603_6.3V6K

0.1U_0402_10V6K

72mA

1

2

1U_0402_6.3V6K

0.1U_0402_10V6K

4.7U_0603_6.3V6K

C231

@

C232

@

C233

@

Place under GPU

Un-pop update-0415

+5VALW

12

DIS@

R274

R274 100K_0402_5%

100K_0402_5%

DGPU_PWR_EN#

13

D

DIS@

2

12

G

DIS@

R281

R281 100K_0402_5%

100K_0402_5%

2

Q11

Q11 2N7002_SOT23

2N7002_SOT23

S

12

10U_0805_10V6K

D

S@

I

1

C220

2

DIS@

@ L6

@

MBK1608221YZF_2P

0.1U_0402_10V6K

v0.3 update

12

C184

C185

C186

10U_0805_10V6K

D

+PEX_PLLVDD

C186

10U_0805_10V6K

D

S@

I

1

C204

2

1U_0603_10V6K

0.1U_0402_10V6K

DIS@

Place near balls

+IFPC_PLLVDD

+3VS_VGA

R251

12

0_0603_5%

@

+IFPEF_PLLVDD

L6

1 2

1

C234

@

2

1

C235

@

2

4.7U_0603_6.3V6K

+3VS to +3VS_VGA

+3VS +3VS_VGA

J2

112

JUMP_43X79

Q9

DIS@

Q9

DIS@

AO3413L_SOT23-3

DIS@

R276

1 2

100K_0402_5%

1

C249

DIS@

2

DIS@

0.1U_0402_10V6K

Title

Size Document Number Rev

Date: Sheet of

1

.05VS_VGA

+

12

C187

10U_0805_10V6K

D

S@

I

120ohms @100MHz (ESR=0.18)

DIS@

L3

DIS@

4.7U_0805_25V6-K

1

C206

2

L3

BLM18PG121SN1D_0603

12

150mA

1

C205

2

DIS@

110mA

1

2

0.1U_0402_10V6K

C213

C214

@

C211

@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

C212

@

Place near balls

220mA

1

2

1U_0402_6.3V6K

0.1U_0402_10V6K

4.7U_0603_6.3V6K

C225

C221

@

+IFPC_IOVDD+IFPE_IOVDD

4.7U_0603_6.3V6K

C236

@

2

123

DGS

12

R275

R275 470_0603_5%

470_0603_5%

DIS@

13

D

Q12

S

2N7002_SOT23

Compal Electronics, Inc.

C223

C222

@

Place near balls

72mA

1

2

1U_0402_6.3V6K

0.1U_0402_10V6K

C237

C238

@

Place under GPU

DIS@

C245

C245 10U_0603_6.3V6M

10U_0603_6.3V6M

12

2

G

1

C250

DIS@

2

0.1U_0402_10V6K

N14M-GE2-POWER

ZEA00 LA-A061P M/B

1

.05VS_VGA

+

1

C207

2

1U_0603_10V6K

DIS@

Place near to L1 56

+3VS_VGA

L4

@ L4

@

MMZ1608D301BT_0603

1 2

1

C215

@

2

0.1U_0402_10V6K

L5

@ L5

@

MMZ1608D301BT_0603

1 2

1

C226

@

2

0.1U_0402_10V6K

@ L7

@

MBK1608221YZF_2P

1 2

1

C239

@

2

0.1U_0402_10V6K

R280

10K_0402_5%

L7

DIS@R280

DIS@

12

DGPU_PWR_EN#

23 59Tuesday, September 24, 2013

1

@

2

4.7U_0603_6.3V6K

+3VS_VGA

1

@

2

4.7U_0603_6.3V6K

+1.05VS_VGA+1.05VS_VGA

1

@

2

4.7U_0603_6.3V6K

C216

C227

C240

0.3

5

WWW.AliSaler.Com

D D

C C

B B

A A

AA17 AA18 AA20 AA22 AB12 AB14 AB16 AB19

AB21

AB23 AB28 AB30 AB32

AC13 AC15 AC17 AC18 AA13 AC20 AC22

AE28 AE30 AE32 AE33

AH10 AA15 AH13 AH16 AH19

AH2 AH22 AH24 AH28 AH29 AH30 AH32 AH33

AH5

AH7

AK10

AL12 AL14 AL15 AL17 AL18

AL20 AL21 AL23 AL24 AL26 AL28 AL30 AL32 AL33

AM13 AM16 AM19 AM22 AM25

AN1 AN10 AN13 AN16 AN19 AN22 AN25 AN30 AN34

AN4

AN7

AP33

AB2

A33

AB5 AB7

AE2

AE5 AE7

AJ7

AK7

AL2

AL5

AP2

B10 B22 B25 B28 B31 B34

C10 C13 C19 C22 C25 C28

U6

F

A2

N

G

N

G G

N

G

N

G

N

G

N

G

N

G

N

G

N

G

N

G

N

G

N

G

N

G

N

G

N GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83

B1

GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90

B4

GND_91

B7

GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98

C7

GND_99

D_0 D_1 D_2 D_3 D_4 D_5 D_6 D_7 D_8 D_9 D_10 D_11 D_12 D_13 D_14

a

P

rt 6 of 7

GND

4

N

D_100

G

N

D_101

G G

D_102

N

G

D_103

N

G

D_104

N

G

D_105

N

G

D_106

N

G

D_107

N

G

D_108

N

G

D_109

N

G

D_110

N

G

D_111

N

G

D_112

N

G

D_113

N

G

D_114

N GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198 GND_199

GND_OPT GND_OPT

D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16 N19 N2 N21 N23 N28 N30 N32 N33 N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22 AG11 T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23 AH11 C16 W32

3

V

GA_CORE

+

2

U6G

P

rt 7 of 7

a

AA12

V

AA14

V

AA16

V

AA19

V

AA21

V

AA23

V

AB13

V

AB15

V

AB17

VDD_8

AB18

VDD_9

AB20

VDD_10

AB22

VDD_11

AC12

VDD_12

AC14

VDD_13

AC16

VDD_14

AC19

VDD_15

AC21

VDD_16

AC23

VDD_17

M12

VDD_18

M14

VDD_19

M16

VDD_20

M19

VDD_21

M21

VDD_22

M23

VDD_23

N13

VDD_24

N15

VDD_25

N17

VDD_26

N18

VDD_27

N20

VDD_28

N22

VDD_29

P12

VDD_30

P14

VDD_31

P16

VDD_32

P19

VDD_33

P21

VDD_34

P23

VDD_35

R13

VDD_36

R15

VDD_37

R17

VDD_38

R18

VDD_39

R20

VDD_40

R22

VDD_41

T12

VDD_42

T14

VDD_43

T16

VDD_44

T19

VDD_45

T21

VDD_46

T23

VDD_47

U13

VDD_48

U15

VDD_49

U17

VDD_50

U18

VDD_51

U20

VDD_52

U22

VDD_53

V13

VDD_54

V15

VDD_55

N14M-GE2-B-AIO-A2

DIS@

a

D_0

D

D_1

D

D_2

D

D_3

D

D_4

D

D_5

D

D_6

D

D_7

D

POWER

V

D_56

D

V

D_57

D

V

D_58

D

V

D_59

D

V

D_60

D

V

D_61

D

V

D_62

D

V

D_63

D

V

D_64

D VDD_65 VDD_66 VDD_67 VDD_68 VDD_69 VDD_70 VDD_71

XVDD_1 XVDD_2 XVDD_3 XVDD_4 XVDD_5 XVDD_6 XVDD_7 XVDD_8

XVDD_9

XVDD_10 XVDD_11 XVDD_12 XVDD_13 XVDD_14 XVDD_15 XVDD_16

XVDD_17 XVDD_18 XVDD_19 XVDD_20 XVDD_21 XVDD_22

XVDD_23 XVDD_24 XVDD_25 XVDD_26 XVDD_27 XVDD_28 XVDD_29 XVDD_30

XVDD_31 XVDD_32 XVDD_33 XVDD_34 XVDD_35 XVDD_36 XVDD_37 XVDD_38

1

V17 V18 V20 V22 W12 W14 W16 W19 W21 W23 Y13 Y15 Y17 Y18 Y20 Y22

U1 U2 U3 U4 U5 U6 U7 U8

V1 V2 V3 V4 V5 V6 V7 V8

W2 W3 W4 W5 W7 W8

Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8

AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8

0403 Update

+

GA_CORE

V

4M-GE2-B-AIO-A2

N1

DIS@

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N14M-GE2-VGA CORE, GND

ZEA00 LA-A061P M/B

24 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

F

A_D[0..63]

B

A_D[0..63][26, 27]

F

F F F F

D D

C C

B B

A A

F F F F F

F FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS0 FBA_DQS1 FBA_DQS2 FBA_DQS3 FBA_DQS4 FBA_DQS5 FBA_DQS6 FBA_DQS7

FBA_DQS#0 FBA_DQS#1 FBA_DQS#2 FBA_DQS#3 FBA_DQS#4 FBA_DQS#5 FBA_DQS#6 FBA_DQS#7

B

U

B

6

P

rt 2 of 7

a

L28

A_D0

B B

A_D1 A_D2

B

A_D3

B

A_D4

B

A_D5

B

A_D6

B

A_D7

B B

A_D8

B

A_D9

FBA_DQM[7..0][26 ,27]

FBA_DQS[7..0][26,27]

FBA_DQS#[7..0][2 6,27]

F

M29

F

L29

F

M28

F

N31

F

P29

F

R29

F

P28

F

J28

F

H29

F

J29

FBA_D10

H28

FBA_D11

G29

FBA_D12

E31

FBA_D13

E32

FBA_D14

F30

FBA_D15

C34

FBA_D16

D32

FBA_D17

B33

FBA_D18

C33

FBA_D19

F33

FBA_D20

F32

FBA_D21

H33

FBA_D22

H32

FBA_D23

P34

FBA_D24

P32

FBA_D25

P31

FBA_D26

P33

FBA_D27

L31

FBA_D28

L34

FBA_D29

L32

FBA_D30

L33

FBA_D31

AG28

FBA_D32

AF29

FBA_D33

AG29

FBA_D34

AF28

FBA_D35

AD30

FBA_D36

AD29

FBA_D37

AC29

FBA_D38

AD28

FBA_D39

AJ29

FBA_D40

AK29

FBA_D41

AJ30

FBA_D42

AK28

FBA_D43

AM29

FBA_D44

AM31

FBA_D45

AN29

FBA_D46

AM30

FBA_D47

AN31

FBA_D48

AN32

FBA_D49

AP30

FBA_D50

AP32

FBA_D51

AM33

FBA_D52

AL31

FBA_D53

AK33

FBA_D54

AK32

FBA_D55

AD34

FBA_D56

AD32

FBA_D57

AC30

FBA_D58

AD33

FBA_D59

AF31

FBA_D60

AG34

FBA_D61

AG32

FBA_D62

AG33

FBA_D63

P30

FBA_DQM0

F31

FBA_DQM1

F34

FBA_DQM2

M32

FBA_DQM3

AD31

FBA_DQM4

AL29

FBA_DQM5

AM32

FBA_DQM6

AF34

FBA_DQM7

M31

FBA_DQS_WP0

G31

FBA_DQS_WP1

E33

FBA_DQS_WP2

M33

FBA_DQS_WP3

AE31

FBA_DQS_WP4

AK30

FBA_DQS_WP5

AN33

FBA_DQS_WP6

AF33

FBA_DQS_WP7

M30

FBA_DQS_RN0

H30

FBA_DQS_RN1

E34

FBA_DQS_RN2

M34

FBA_DQS_RN3

AF30

FBA_DQS_RN4

AK31

FBA_DQS_RN5

AM34

FBA_DQS_RN6

AF32

FBA_DQS_RN7

N14M-GE2-B-AIO-A2

DIS@

a

B

A_D0 A_D1

B B

A_D2 A_D3

B

A_D4

B

A_D5

B B

A_D6 A_D7

B

A_D8

B

A_D9

B

FBA_CMD_RFU0 FBA_CMD_RFU1

A

MEMORY INTERFACE

FBA_DEBUG0 FBA_DEBUG1

FBA_CLK0_N

FBA_CLK1_N

FBA_WCK01_N

FBA_WCK23_N

FBA_WCK45_N

FBA_WCK67_N

FBA_WCKB01

FBA_WCKB01_N

FBA_WCKB23

FBA_WCKB23_N

FBA_WCKB45

FBA_WCKB45_N

FBA_WCKB67

FBA_WCKB67_N

FB_DLL_AVDD

FBA_PLL_AVDD

B

A_CMD0

F F

A_CMD1

B B

A_CMD2

F F

A_CMD3

B

F

A_CMD4

B

F

A_CMD5

B B

A_CMD6

F F

A_CMD7

B

F

A_CMD8

B

F

A_CMD9

B FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_CLK0

FBA_CLK1

FBA_WCK01

FBA_WCK23

FBA_WCK45

FBA_WCK67

FB_CLAMP

FB_VREF

U30

F

A_CS0#_L

B

T31 U29

F

A_ODT_L

B

R34

F

A_CKE_L

B

R33

F

A_MA14

B

U32

F

A_RST#

B

U33

F

A_MA9

B

U28

F

A_MA7

B

V28

B

A_MA2

F

V29

B

A_MA0

F

V30

FBA_MA4

U34

FBA_MA1

U31

FBA_BA0

V34

FBA_WE#

V33 Y32

FBA_CAS#

AA31

FBA_CS0#_H

AA29 AA28

FBA_ODT_H

AC34

FBA_CKE_H

AC33

FBA_MA13

AA32

FBA_MA8

AA33

FBA_MA6

Y28

FBA_MA11

Y29

FBA_MA5

W31

FBA_MA3

Y30

FBA_BA2

AA34

FBA_BA1

Y31

FBA_MA12

Y34

FBA_MA10

Y33

FBA_RAS#

V31

R32 AC32

R28 AC28

R30 R31 AB31 AC31

K31 L30 H34 J34 AG30 AG31 AJ34 AK34

J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33

E1

K27

U27

H26

1 2

R285 60.4_0402_1 %@R285 60.4_0402_1%@ R287 60.4_0402_1 %@R287 60.4_0402_1%@

1 2

can be unstuff by default

FBA_CLK0 FBA_CLK0# FBA_CLK1 FBA_CLK1#

R288 10K_0402_5%DIS@R288 10K_0402_ 5%DIS@

FB_CLAMP

C252 0. 1U_0402_10V6K

1 2

Place close to ball

DIS@

0.1U_0402_10V6K

Place close to ball Place close to BGA

30ohms (ESR=0.01) Bead P/N;SM010007W00

DIS@

1

2

F

FBA_CLK0 [26] FBA_CLK0# [26] FBA_CLK1 [27] FBA_CLK1# [27]

R02

C254

4

A_MA[14..0] [2 6,27]

B

A_BA[2..0] [26,27]

F

A_CS0#_L [26]

B

F

A_ODT_L [26]

B

F

A_CKE_L [26]

B

F

A_RST# [26 ,27]

B

FBA_WE# [26,27]

FBA_CAS# [26,27] FBA_CS0#_H [27]

FBA_ODT_H [27] FBA_CKE_H [27]

FBA_RAS# [26,27]

12

+FB_PLLAVDD

1

C255

2

1U_0402_6.3V6K

DIS@

0403 Update

+1.05VS_VGA +FB_PLLAVDD

1

C256

2

22U_0805_6.3V6M

DIS@

Place close to BGA

1 2

L8

DIS@ L8

DIS@

BLM18PG330SN1D_0603

+FB_PLLAVDD

200mA

+FB_PLLAVDD

v0.3 update

3

U

C

6

P

rt 3 of 7

a

G9

E9

G8

F9

F11

G11

F12

G12

G6

F5 E6 F6 F4

G4

E2

F3 C2 D4 D3 C1

B3 C4

B5 C5

A11 C11 D11

B11

D8

A8

C8

B8

F24 G23

E24 G24 D21

E21 G21

F21 G27 D27 G26

E27

E29

F29

E30 D30

A32 C31 C32

B32 D29

A29 C29

B29

B21 C23

A21 C21

B24 C24

B26 C26

E11

E3 A3

C9 F23 F27

C30

A24

D10

D5

C3

B9 E23 E28 B30 A23

D9

E4

B2

A9

D22 D28

A30 B23

F F F F F F F F F F F FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63

FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7

FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7

FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7

a

B

B_D0

B

B_D1 B_D2

B B

B_D3 B_D4

B

B_D5

B

B_D6

B B

B_D7 B_D8

B

B_D9

B

B_D10

B

N14M-GE2-B-AIO-A2

DIS@

FBB_CMD_RFU0 FBB_CMD_RFU1

FBB_DEBUG0

MEMORY INTERFACE B

FBB_WCK01_N

FBB_WCK23_N

FBB_WCK45_N

FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

FBB_PLL_AVDD

B

B_CMD0

F

B

B_CMD1

F F

B_CMD2

B B

B_CMD3

F F

B_CMD4

B

F

B_CMD5

B

F

B_CMD6

B B

B_CMD7

F F

B_CMD8

B

F

B_CMD9

B

F

B_CMD10

B FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31

FBB_DEBUG1

FBB_CLK0

FBB_CLK0_N

FBB_CLK1

FBB_CLK1_N

FBB_WCK01

FBB_WCK23

FBB_WCK45

FBB_WCK67

2

D13 E14 F14 A12 B12 C14 B14 G15 F15 E15 D15 A14 D14 A15 B15 C17 D18 E18 F18 A20 B20 C18 B18 G18 G17 F17 D16 A18 D17 A17 B17 E17

C12 C20

G14

R284 60.4_0402_1%@R284 60.4_0402_1%@

1 2

G20

1 2

R286 60.4_0402_1%@R286 60.4_0402_1%@

can be unstuff by default

D12 E12 E20 F20

F8 E8 A5 A6 D24 D25 B27 C27

D6 D7 C6 B6 F26 E26 A26 A27

H17

1

C253

2

DIS@

0.1U_0402_10V6K

Place close to ball

+1.5VS_VGA+1.5VS_VGA

+FB_PLLAVDD

Mode D - Mirror Mode Mapping

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

DATA Bus

0..31

CS0#_L

ODT_L

CKE_L

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

1

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

CS0#_H

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

Must connect to power when partition B unused!

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N14M-GE2-MEM Interface

ZEA00 LA-A061P M/B

1

25 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

e

mory Partition A - Lower 32 bits

M

+

.5VS_VGA

1

12

2

89

DIS@

89

DIS@

R

+

BA_VREF_CA0

1.1K_0402_1 %

D D

DIS@

1.1K_0402_1 %

DIS@ R6 40

DIS@

1.1K_0402_1 %

DIS@ R6 41

DIS@

1.1K_0402_1 %

C C

0403 Update

1 2

B B

+1.5VS_VGA +1.5VS_VGA

2

90

R

+1.5VS_VGA

R640

R641

FBA_CLK0

DIS@

R291

R291 160_0402_1 %

160_0402_1 %

FBA_CLK0#

+

BA_VREF_CA0

F

12

DIS@

0.01U_0402_25V7K

12

+FBA_VREF_DQ0

12

DIS@

0.01U_0402_25V7K

U70 SIDE

1

57

57 C2

C2

2

1

076

076 C2

C2

2

FBA_RST#[25 ,27]

+

BA_VREF_CA0

F

0403 Update

+FBA_VREF_DQ0

FBA_CLK0[25 ] FBA_CLK0#[25] FBA_CKE_L[2 5]

FBA_ODT_L[25] FBA_CS0#_L[25] FBA_RAS#[25,27] FBA_CAS#[25,27] FBA_WE#[25 ,27]

DIS@

R294

10K_0402_5 %

F

+

BA_VREF_DQ0

F

DIS@

12

R295

243_0402_1 %

F

A_MA0

B

F

A_MA1

B

F

A_MA2

B FBA_MA3 FBA_MA4 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK0 FBA_CLK0# FBA_CKE_L

FBA_ODT_L FBA_CS0#_L FBA_RAS# FBA_CAS# FBA_WE#

FBA_DQS0 FBA_DQS3

FBA_DQM0 FBA_DQM3

FBA_DQS#0 FBA_DQS#3

FBA_RST#

12

7

0

U

M8

R

V

H1

V

R

3

N

A

0

7

P

A

1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W2G1646E -BC1A _FBGA96

X76@

EFCA EFDQ

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

4

D D D D D DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

Q Q Q Q Q

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

3

7

1

U

E3

F

A_D4

L0 L1 L2 L3 L4

B

F7

F

A_D1

B

F2

F

A_D6

B

F8

F

A_D2

B

H3

F

A_D7

B B

A_D0

Group0 (IN3)

Group3 (BOT)

0403 Update

H8

F

G2

FBA_D5

H7

FBA_D3

D7

FBA_D31

C3

FBA_D25

C8

FBA_D28

C2

FBA_D24

A7

FBA_D29

A2

FBA_D26

B8

FBA_D30

A3

FBA_D27

+1.5VS_VGA +1.5VS_VGA

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+

BA_VREF_CA0

F

+

BA_VREF_DQ0

F

FBA_RST#

DIS@

R296

243_0402_1 %

M8

R

EFCA

V

H1

V

EFDQ

R

3

A_MA0

B

A_MA1

B

A_MA2

B

N

A

0

7

P

A

1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

12

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W2G1646E -BC1A _FBGA96

X76@

F F F FBA_MA3 FBA_MA4 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK0 FBA_CLK0# FBA_CKE_L

FBA_ODT_L FBA_CS0#_L FBA_RAS# FBA_CAS# FBA_ODT_L FBA_WE#

FBA_DQS2 FBA_DQS1

FBA_DQM2 FBA_DQM1

FBA_DQS#2 FBA_DQS#1

D D D D D DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

U71 SIDE

Q Q Q Q Q

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

2

B

A_MA[14..0] [ 25,27]

F

A_BA[2..0] [25,27]

B

E3

F

A_D19

L0 L1 L2 L3 L4

B

F7

F

A_D20

B

F2

F

A_D17

B

F8

F

A_D22

B

H3

F

A_D16

B

H8

F

A_D23

B

G2

FBA_D18

H7

FBA_D21

D7

FBA_D10

C3

FBA_D15

C8

FBA_D8

C2

FBA_D13

A7

FBA_D9

A2

FBA_D12

B8

FBA_D11

A3

FBA_D14

Group2 (IN1)

Group1 (TOP)

CMD mapping mod Mode D

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

FBA_CKE_L

R292

DIS@ R2 92

DIS@

10K_0402_5 %

DIS@

R293

10K_0402_5 %

1 2

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

1

F

A_D[0..63] [25,27]

B

F

B

F

B

F

B

DATA Bus

0..31

CS0#_L

ODT_L

CKE_L

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

A_DQM[7..0] [25,27]

A_DQS[7..0] [25,2 7]

A_DQS#[7..0] [25, 27]

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

CS0#_H

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

1

58

58 C2

C2

2

DIS@

A A

DIS@

0.1U_0402_10V6K

1

59

59 C2

C2

C260

2

DIS@

1U_0402_6.3V6K

5

1

C261

2

DIS@

1U_0402_6.3V6K

1

C262

C263

@

2

@

2

1U_0402_6.3V6K

DIS@

0.1U_0402_10V6K

1

DIS@

1U_0402_6.3V6K

1

C266

C267

2

DIS@

1U_0402_6.3V6K

1

C265

C264

2

DIS@

0.1U_0402_10V6K

4

1

C269

C268

2

DIS@

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

1

C270

C271

@

2

DIS@

0.1U_0402_10V6K

@

2

DIS@

0.1U_0402_10V6K

0.1U_0402_10V6K 1U_0402_6.3V6K

1U_0402_6.3V6K

2013/04/01 2014/04/01

3

1

2

C273

C272

2

DIS@

1U_0402_6.3V6K

Compal Secret Data

1

C274

2

1U_0402_6.3V6K

Deciphered Date

1

C275

@

2

1

C276

@

2

0.1U_0402_10V6K

1

DIS@

1U_0402_6.3V6K

1

C278

C279

@

2

1U_0402_6.3V6K

1

C277

@

2

0.1U_0402_10V6K

2

1

C281

C280

@

2

DIS@

1U_0402_6.3V6K

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Date: Sheet of

Compal Electronics, Inc.

N14M-GE2-VRAM A Lower

ZEA00 LA-A061P M/B

26 59Tuesday, Septemb er 24, 2013

1

0.3

5

WWW.AliSaler.Com

4

3

2

1

Memory Partition A - Upper 32 bits

B

A_D[0..63] [25,26]

1

.5VS_VGA

+

12

R

97

DIS@

97

DIS@

2

1.1K_0402_1 %

+

BA_VREF_CA1

D D

DIS@

1.1K_0402_1 %

DIS@ R642

DIS@

1.1K_0402_1 %

DIS@ R643

DIS@

1.1K_0402_1 %

C C

R

98

2

+1.5VS_VGA

R642

R643

F

12

1

2

DIS@

0.01U_0402_25V7K

12

+FBA_VREF_DQ1

12

1

2

DIS@

0.01U_0402_25V7K

0403 Update

FBA_CLK1

DIS@

R299

R299 160_0402_1 %

160_0402_1 %

1 2

FBA_CLK1#

FBA_CKE_H

FBA_ODT_H

DIS@

12

R300

10K_0402_5 %

B B

+1.5VS_VGA +1.5VS_VGA

A A

DIS@

0.1U_0402_10V6K

1

2

U72 SIDE

83

83 C2

C2

DIS@

0.1U_0402_10V6K

1

84

84 C2

C2

2

DIS@

1U_0402_6.3V6K

+

BA_VREF_CA1

F

82

82 C2

C2

0403 Update 0403 Update

+FBA_VREF_DQ1

077

077 C2

C2

1

2

12

85

85 C2

C2

1U_0402_6.3V6K

FBA_CLK1[25 ] FBA_CLK1#[25] FBA_CKE_H[2 5]

FBA_ODT_H[25] FBA_CS0#_H[25] FBA_RAS#[25,26] FBA_CAS#[25,26] FBA_WE#[25 ,26]

FBA_RST#[25,2 6]

DIS@

R301

10K_0402_5 %

1

C286

2

DIS@

1U_0402_6.3V6K

DIS@ R302

DIS@

1

C287

2

+

BA_VREF_CA1

F F

BA_VREF_DQ1

+

F

A_MA0

B

F

A_MA1

B

F

A_MA2

B

F

A_MA3

B

F

A_MA4

B

F

A_MA5

B FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK1 FBA_CLK1# FBA_CKE_H

FBA_ODT_H FBA_CS0#_H FBA_RAS# FBA_CAS# FBA_WE#

FBA_DQS4 FBA_DQS5

FBA_DQM4 FBA_DQM5

FBA_DQS#4 FBA_DQS#5 FBA_DQS#6

FBA_RST#

12

R302

243_0402_1 %

1

C288

2

DIS@

1U_0402_6.3V6K

U

2

7

M8

V

EFCA

R

H1

V

EFDQ

R

N

3

0

A

7

P

A

1

3

P

A

2

N

A

3

8

P

A

4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W2G1646E -BC1A _FBGA96

X76@

1

C290

C289

2

DIS@

0.1U_0402_10V6K

0.1U_0402_10V6K 1U_0402_6.3V6K

1U_0402_6.3V6K

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

DIS@

E3

F

A_D36

D

L0

Q

D

L1

Q

D

L2

Q Q

L3

D D

L4

Q

D

L5

Q

D

L6

Q

D

L7

Q

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B

F7

B

A_D33

F

F2

F

A_D38

B

F8

F

A_D34

B

H3

F

A_D37

B

H8

F

A_D32

B

G2

F

A_D39

B

H7

F

A_D35

B

D7

FBA_D45

C3

FBA_D42

C8

FBA_D46

C2

FBA_D41

A7

FBA_D47

A2

FBA_D43

B8

FBA_D44

A3

FBA_D40

+1.5VS_VGA +1.5VS_VGA

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

r

oup4 (IN1)

G

Group5 (TOP)

+

BA_VREF_CA1

F F

BA_VREF_DQ1

+

R303

DIS@ R303

DIS@

243_0402_1 %

F

A_MA0

B

F

A_MA1

B

F

A_MA2

B

F

A_MA3

B

F

A_MA4

B

F

A_MA5

B FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK1 FBA_CLK1# FBA_CKE_H

FBA_ODT_H FBA_CS0#_H FBA_RAS# FBA_CAS# FBA_WE#

FBA_DQS7 FBA_DQS6

FBA_DQM7 FBA_DQM6

FBA_DQS#7

FBA_RST#

12

U73 SIDE

1

C291

C292

2

DIS@

1U_0402_6.3V6K

DIS@

1U_0402_6.3V6K

1

C294

C293

2

DIS@

1U_0402_6.3V6K

DIS@

0.1U_0402_10V6K

1

2

C296

C295

@

2

DIS@

0.1U_0402_10V6K

0.1U_0402_10V6K 1U_0402_6.3V6K

1U_0402_6.3V6K

1

C297

2

DIS@

1U_0402_6.3V6K

1

C298

@

2

@

2

1U_0402_6.3V6K

U

7

M8

V

H1

V

N

3

A

7

P

A

3

P

A

2

N

A

8

P

A

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W2G1646E -BC1A _FBGA96

X76@

1

C299

C300

@

2

1U_0402_6.3V6K

3

EFCA

R

EFDQ

R

0 1 2 3 4

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

0.1U_0402_10V6K

D

Q

D

Q

D

Q Q

D D

Q

D

Q

D

Q

D

Q

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

2

E3

F

A_D63

L0 L1 L2 L3 L4 L5 L6 L7

B

F7

B

A_D59

F

F2

F

A_D61

B

F8

F

A_D56

B

H3

F

A_D60

B

A_D58

B

A_D62

B

A_D57

B

Group7 (IN3)

Group6 (BOT)

CMD mapping mod Mode D

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

H8

F

G2

F

H7

F

D7

FBA_D52

C3

FBA_D51

C8

FBA_D54

C2

FBA_D50

A7

FBA_D53

A2

FBA_D48

B8

FBA_D55

A3

FBA_D49

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

1U_0402_6.3V6K

1

C306

@

2

FBx_CMD30

1

C301

@

2

0.1U_0402_10V6K

C303

C302

@

2

DIS@

1U_0402_6.3V6K

DIS@

1U_0402_6.3V6K

1

2

C305

C304

@

2

1U_0402_6.3V6K

F

B

A_MA[14..0] [25,26]

F

A_BA[2..0] [25,26]

B

F

A_DQM[7..0] [25,26]

B

F

A_DQS[7..0] [25,26]

B

F

A_DQS#[7..0] [25,26 ]

B

DATA Bus

0..31

32..63

CS0#_L

ODT_L

CKE_L

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

CS0#_H

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

5

Security Classification

2013/04/01 2014/04/01

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N14M-GE2-VRAM A Upper

ZEA00 LA-A061P M/B

27 59Tuesday, Septemb er 24, 2013

1

0.3

5

WWW.AliSaler.Com

4

3

+

VS_VGA

3

2

1

[PUN-06026-001]

R3

9

1

10K_0402_1%

X76@

1 2

S

RAP0

T

RAP0[22]

S

T

RAP1[22]

D D

S S

RAP2[22]

T T

RAP3[22]

S

T

RAP4[22]

S

X76 for VRAM Config

T

S

RAP1

T

S

RAP2

T

S

RAP3

T

S

RAP4

T

R324

R324 10K_0402_1%

10K_0402_1%

X76@

1 2

R3

0

2

10K_0402_1%

X76@

1 2

R325

R325 10K_0402_1%

10K_0402_1%

X76@

1 2

R3

1

2

10K_0402_1%

X76@

1 2

R326

10K_0402_1%

X76@

1 2

R3

2

10K_0402_1%

X76@

1 2

R327

R327 10K_0402_1%

10K_0402_1%

X76@

1 2

R3

R3 10K_0402_1%

10K_0402_1%

1 2

R328 10K_0402_1%

10K_0402_1%

1 2

3

@

3

@

2

DIS@R328

DIS@

[VRAM Config-RVL-06366-001]

GPU

+3VS_VGA

C C

R329

@R329

@

10K_0402_1%

1 2

ROM_SI[22]

ROM_SO[22]

ROM_SCLK[22]

ROM_SI ROM_SO ROM_SCLK

R332 10K_0402_1%

10K_0402_1%

1 2

DIS@R332

DIS@

R330 10K_0402_1%

10K_0402_1%

1 2

R333 10K_0402_1%

10K_0402_1%

1 2

@R330

@

DIS@R333

DIS@

R331

4.99K_0402_1%

1 2

R334 10K_0402_1%

10K_0402_1%

1 2

@R331

@

DIS@R334

DIS@

N14M-GE2

Memory Size

900 MHz 128M* 16* 4

1GB

256M* 16* 4

900 MHz

2GB

Memory Config

Hynix (0x6) H5TQ2G63BFR-11C SA00003YO10

Samsung (0x5) K4W2G1646E-BC11 SA00005SH00

Micron (0x1) MT41J128M16JT-107G:K SA00005SM30

Micron (0xD) MT41K256M16HA-107G:E SA000065D20

Samsung (0xB) K4W4G1646B-HC11 SA000068R10

Hynix (0x4) H5TC4G63AFR-11C SA00006E800

strap3Frenq.

0

R327 PD 10K

0 1

R327 PD 10K

1

R322 PU 10K

1

R322 PU 10K

0 01 0

R327 PD 10K

strap2 strap1 strap0

1

R321 PU 10K

0

R326 PD 10K

1

R321 PU 10K

0

R326 PD 10K

R321 PU 10K

1

R320 PU 10K

0

R325 PD 10K

00

R325 PD 10K

0

R325 PD 10K

1

R320 PU 10K

R325 PD 10K

0

R324 PD 10K

1

R319 PU 10K

1

R319 PU 10K

1

R319 PU 10K

1

R319 PU 10K

R324 PD 10K

B B

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N14M-GE2_MISC

ZEA00 LA-A061P M/B

28 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

4

o

wer Consumption:

P

3

2

1

+

VS

3

1 2

@

D D

@

R

37

3

0_0805_5%

+

3

VS_RTD

1

2

C

58

3

1U_0402_6.3V6K

Pin 22 (PVCC) < 50 mA Pin 18 (SWR_VDD) < 200mA (layout trace > 40 mil)

Pin5 (DPV33) < 20mA

Pin 17 (SWR_LX) < 600mA (layout trace > 60 mil)

Pin 15 (SWR_VCCK) < 100mA (layout trace > 60 mil) Pin 43 (VCCK) < 50mA Pin 11 (DPV12) < 100mA

+3VS_DVCCTL

C361

1

10

10 U_0603_6.3V6M

U_0603_6.3V6M

2

C C

+3VS_AVCCTL

C367

C366

1

2

B B

+1.2VS_SW R

0.

10

1U_0402_16V4Z

U_0603_6.3V6M

2

C370

C369

0.

0. 1U_0402_16V4Z

1U_0402_16V4Z

1

2

C362

0.

0. 1U_0402_16V4Z

1U_0402_16V4Z

C371

C363

@C363

@

C364

C365

0.1U_0402_16V4Z

0.1U_0402_16V4Z 22U_0805_6.3V6M

22U_0805_6.3V6M

eDP portD

CPU

PCH

EC_SMB_CK1[32,43] EC_SMB_DA1[32,43]

To EC

1

2

+1.2VS_SW R

PCH_DDPD_AUXP_C[15] PCH_DDPD_AUXN_C[15]

PCH_DDPD_HPD[15]

+3VS_RTD

+3VS_AVCCTL

+3VS_DVCCTL

+3VS_RTD

R340 0_0603_5%@R340 0_0603_5%@

CPU_EDP_TXP0_C[5] CPU_EDP_TXN0_C[5]

CPU_EDP_TXP1_C[5] CPU_EDP_TXN1_C[5]

EDP_DISP_UTIL[5]

PCH_EDP_PW M[15]

EC_SMB_CK1 EC_SMB_DA1

1 2

PCH_DDPD_AUXP_C PCH_DDPD_AUXN_C

PCH_DDPD_HPD

TAI_HCB2012KF-221T30

L9

1 2

TAI_HCB2012KF-221T30

L10

1 2

CPU_EDP_TXP0_C CPU_EDP_TXN0_C

CPU_EDP_TXP1_C CPU_EDP_TXN1_C

1 2

R344 1K_0402_5%R344 1K_0402_5%

1 2

R345 0_0402_5%@ R345 0_0402_5%@

1 2

R347 0_0402_5%@ R347 0_0402_5%@

1 2

R349

12K_0402_1%

MODE_CFG0

R351 0_04 02_5%@ R351 0_0402_5%@

1 2 1 2

R352 0_04 02_5%@ R352 0_0402_5%@

+SW_LX

LVDS_HPD_R

EC_SMB_CK1_R EC_SMB_DA1_R

U20

RTD2136R

22

PVCC

18

SWR_VDD

5

DP_V33

17

SWR_LX

15

SWR_VCCK

43

VCCK

11

DP_V12

7

LANE0P

8

LANE0N

9

LANE1P

10

LANE1N

4

AUX-CH_P

3

AUX-CH_N

1

DP_HPD

21

PWMIN

2

TESTMODE

12

DP_REXT

48

MODE_CFG1

47

MODE_CFG0

13

CIICSCL1

14

CIICSDA1

RTD2136R-CG_QFN48 _6x6

1

0.1U_0402_16V4Z

2

C368

1

0.

0. 1U_0402_16V4Z

1U_0402_16V4Z

2

C372

1

0.1U_0402_16V4Z

2

U_0603_6.3V6M

U_0603_6.3V6M 10

10

v0.2 update

PWR

LVDSGND

DP

MIICSCL1

OTHERS

MIICSDA1

PANEL_VCC

PWMOUT

TXOC+

TXOC-

TXO0+

TXO0-

TXO1+

TXO1-

TXO2+

TXO2-

TXO3+

TXO3-

TXEC+

TXEC-

TXE0+

TXE0-

TXE1+

TXE1-

TXE2+

TXE2-

TXE3+

TXE3-

BL_EN

DP_GND

GND

PAD

35

TXOC+

36

TXOC-

41

TXO0+

42

TXO0-

39

TXO1+

40

TXO1-

37

TXO2+

38

TXO2-

33

TXO3+

34

TXO3-

25

TXEC+

26

TXEC-

31

TXE0+

32

TXE0-

29

TXE1+

30

TXE1-

27

TXE2+

28

TXE2-

23

TXE3+

24

TXE3-

46

EESCL

45

EESDA

20

S_ENVDD

19 44

S_BKOFF#MODE_CFG1

6

16

49

SE070104Z80

S CER CAP .1U 16V Z Y5V 0402

TXOC+ [32] TXOC- [32]

TXO0+ [32 ] TXO0- [32]

TXO1+ [32 ] TXO1- [32]

TXO2+ [32 ] TXO2- [ 32]

TXO3+ [32 ] TXO3- [32]

TXEC+ [32] TXEC- [32]

TXE0+ [32] TXE0- [32]

TXE1+ [32] TXE1- [32]

TXE2+ [32] TXE2- [ 32]

TXE3+ [32] TXE3- [32]

LVDS

S_ENVDD [32, 43]

S_BKOFF# [32,43]

Vendor suggest to reserve for FW/EDID debug

+3VS_DVCCTL

EVT@

U19

EESCL EESDA

8 7 6 5

CAT24C02W I-GT3_SO8

VCC WP SCL SDA

GND

A0 A1 A2

Addr:A8 (1010 100x)

EVT Debug Only, un-pop for DVT

+3VS_DVCCTL +3VS_DVCCTL

12

R343

4.7K_0402_5%

S_INVT_PW M [32]

12

Pin 48

4.7K_0402_5%

@ R346

@

4.7K_0402_5%

MODE_CFG1MODE_CFG0

R346

+3VS_DVCCTL +3VS_DVCCTL

12

R636

4.7K_0402_5%

12

R638

@R638

@

4.7K_0402_5%

0

1

1 2 3 4

ROM

EESDAEE SCL

0

X

v0.2 update

12

@

R341

4.7K_0402_5%

12

R342

4.7K_0402_5%

Pin 47

12

R637

4.7K_0402_5%

12

R639

@R639

@

4.7K_0402_5%

1

EP Mode

EEPROM

A A

R353

@R353

@

1K_0402_5%

12

PreMP

PCH_DDPD_HPD

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LVDS Converter RTD2136S

ZEA00 LA-A061P M/B

29 59Tuesday, September 24, 2013

1

0.3

A

WWW.AliSaler.Com

1 1

B

C

D

HDMIOUT_TX2+_C [31] HDMIOUT_TX2-_C [31]

HDMIOUT_TX1+_C [31] HDMIOUT_TX1-_C [31]

HDMIOUT_CLK+_C [ 31] HDMIOUT_CLK-_C [31]

HDMIOUT_TX0+_C [31] HDMIOUT_TX0-_C [31]

E

F

G

H

UMA & DIS for Optimus

PCH_HDMIOUT_TX2+[5] PCH_HDMIOUT_TX2-[5]

PCH_HDMIOUT_TX1+[5] PCH_HDMIOUT_TX1-[5]

PCH_HDMIOUT_CLK+[5] PCH_HDMIOUT_CLK-[5]

PCH_HDMIOUT_TX0+[5] PCH_HDMIOUT_TX0-[5]

2 2

PCH_HDMIOUT_TX2+ PCH_HDMIOUT_TX2-

PCH_HDMIOUT_TX1+ PCH_HDMIOUT_TX1-

PCH_HDMIOUT_CLK+ PCH_HDMIOUT_CLK-

PCH_HDMIOUT_TX0+ PCH_HDMIOUT_TX0-

1 2

C373 0.1U_0402_10V6KHDMIO@ C373 0.1U_0402_10V6KHDMIO@

1 2

C374 0.1U_0402_10V6KHDMIO@ C374 0.1U_0402_10V6KHDMIO@

1 2

C375 0.1U_0402_10V6KHDMIO@ C375 0.1U_0402_10V6KHDMIO@

1 2

C376 0.1U_0402_10V6KHDMIO@ C376 0.1U_0402_10V6KHDMIO@

1 2

C377 0.1U_0402_10V6KHDMIO@ C377 0.1U_0402_10V6KHDMIO@

1 2

C378 0.1U_0402_10V6KHDMIO@ C378 0.1U_0402_10V6KHDMIO@

1 2

C379 0.1U_0402_10V6KHDMIO@ C379 0.1U_0402_10V6KHDMIO@

1 2

C380 0.1U_0402_10V6KHDMIO@ C380 0.1U_0402_10V6KHDMIO@

Close to HDMI Connector

HDMIOUT_TX2+_C HDMIOUT_TX2-_C

HDMIOUT_TX1+_C HDMIOUT_TX1-_C

HDMIOUT_CLK+_C HDMIOUT_CLK-_C

HDMIOUT_TX0+_C HDMIOUT_TX0-_C

1 2

R607 470_0402_5%HDMIO@R607 470_0402_5%HDMIO@

1 2

R608 470_0402_5%HDMIO@R608 470_0402_5%HDMIO@

1 2

R609 470_0402_5%HDMIO@R609 470_0402_5%HDMIO@

1 2

R610 470_0402_5%HDMIO@R610 470_0402_5%HDMIO@

1 2

R611 470_0402_5%HDMIO@R611 470_0402_5%HDMIO@

1 2

R612 470_0402_5%HDMIO@R612 470_0402_5%HDMIO@

1 2

R613 470_0402_5%HDMIO@R613 470_0402_5%HDMIO@

1 2

R614 470_0402_5%HDMIO@R614 470_0402_5%HDMIO@

+3VS

2

G

HDMI_Term_CON

13

D

HDMIO@

Q58

Q58 2N7002K_SOT23-3

2N7002K_SOT23-3

S

Close to HDMI Connector,<1000mils Length

+3VS

3 3

2.2k 3VS Pull-High on PCH side

PCH_HDMIOUT_DATA[15]

PCH_HDMIOUT_CLK[15]

PCH_HDMIOUT_DATA HDMIOUT_SDATA

PCH_HDMIOUT_CLK

Q56A

2

DMN66D0LDW -7_SOT363-6

Q56B

5

DMN66D0LDW -7_SOT363-6

HDMIO@

34

2.2k 5V Pull-High on Connector side

HDMIO@

61

HDMIOUT_SCLK

HDMIOUT_SDATA [31]

HDMIOUT_SCLK [31]

Close to connector

+3VS

Q59

C

HDMIO@

R168

C

2

B

E

3 1

12

R616

R616 200K_0402_5%

200K_0402_5%

HDMIO@

MMBT3904_NL_SOT23-3

PCH_HDMIOUT_HPD[15]

4 4

20K_0402_5%

R615

10K_0402_5%

1 2

HDMIO@

HDMIOUT_HPD [31]

INTEL HDMI HPD PD 20K

Security Classification

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

D

2013/04/01 2014/04/01

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

HDMI-OUT Level Shift

ZEA00 LA-A061P M/B

G

0.3

30 59Tuesday, September 24, 2013

H

0.3

5

WWW.AliSaler.Com

4

3

2

1

HDMI-OUT Connector

3

8

HDMIO@

8

HDMIO@

L

D

MIOUT_CLK+_C[30]

H

MIOUT_CLK-_C[30]

D

D D

HDMIOUT_TX0+_C[30]

HDMIOUT_TX0-_C[30]

HDMIOUT_TX1+_C[30]

HDMIOUT_TX1-_C[30]

C C

HDMIOUT_TX2+_C[30]

HDMIOUT_TX2-_C[30]

4

1

MURATA DLW 21SN900HQ2L

M

I Reauest

E

L39

1

4

MURATA DLW 21SN900HQ2L

EMI Reauest

L40

1

4

MURATA DLW 21SN900HQ2L

EMI Reauest

L41

4

1

MURATA DLW 21SN900HQ2L

EMI Reauest

HDMIO@L39

HDMIO@

HDMIO@L40

HDMIO@

HDMIO@L41

HDMIO@

3

H

MIOUT_R_CK+

3

2

3

2

3

2

D

H

MIOUT_R_CK-

D

HDMIOUT_R_D0+

HDMIOUT_R_D0-

HDMIOUT_R_D1+

HDMIOUT_R_D1-

HDMIOUT_R_D2+

HDMIOUT_R_D2-

H

DMI_EDID_5V

+

12

R531

2.2K_0402_1%

HDMIO@

HDMIOUT_SCLK[30] HDMIOUT_SDATA[30]

HDMIOUT_SCLK HDMIOUT_SDATA

12

R532

2.2K_0402_1%

HDMIO@

+HDMI_EDID_5V

HDMIOUT_HPD[3 0]

H

MIOUT_R_D2+

D

H

MIOUT_R_D2-

D

H

MIOUT_R_D1+

D

H

MIOUT_R_D1-

D

H

MIOUT_R_D0+

D

HDMIOUT_R_D0HDMIOUT_R_CK+

HDMIOUT_R_CK-

HDMIOUT_HPD

HDMIOUT_R_D1+ HDMIOUT_R_D1+

HDMIOUT_R_D1-

HDMIOUT_R_CK- HDMIOUT _R_CK-

HDMIOUT_R_CK+

J

DMI1

H

1

D

+

2

_shield

D

3

D

-

2

4

1

+

D

5

D

_shield

1

6

1

-

D

7

D0+

8

D0_shield

9

D0-

10 11 12 13 14 15 16 17 18 19

1

2

4

5

3

GND4

CK+

GND3

CK_shield

GND2

CK-

GND1 CEC Reserved SCL SDA DDC/CEC_GND +5V HP_DET

SUYIN_100042GR019M12RZR

CONN@

D20

HDMIO@

1

2

4

3

8

IP4292CZ10-TBR XSON10

ESD Reauest

10

9

7

65

23 22 21 20

9

8

HDMIOUT_R_D1-

7

6

HDMIOUT_R_CK+

D21

HDMIO@

HDMIOUT_R_D0+

HDMIOUT_R_D0- HDMIOUT_R_D0-

HDMIOUT_R_D2-

HDMIOUT_R_D2+ HDMIOUT_R_D2+

OUT

GND

3

2

+HDMI_EDID_5V

1

2

C534

0.1U_0402_16V7K

HDMIO@

U34

1

2

U34

1

IN

AP2330W- 7_SC59-3

B B

C532

0.1U_0402_16V7K

HDMIO@

+5VS

1

2

4

5

3

8

IP4292CZ10-TBR XSON10

ESD Reauest

200mA

2

HDMIO@

PESD5V0U2BT_SOT23-3

3

D22

(Cj=3.5pF)

1

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HDMI-OUT

ZEA00 LA-A061P M/B

9

10

8

9

7

6

65

HDMIOUT_SCLK HDMIOUT_SDATA

HDMIOUT_HPD

2

3

HDMIO@

D23

PESD5V0U2BT_SOT23-3

(Cj=3.5pF)

ESD ReauestESD Reauest

1

HDMIOUT_R_D0+

HDMIOUT_R_D2-

31 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

X

EC+

X

EC+[29]

T

X

EC-[29]

T

E0+[29]

X

T

E0-[29]

X

E1+[29]

T

E1-[29]

D D

C C

X

T

E2+[29]

X

T

E2-[29]

X

T

E3+[29]

X

TXE3-[29]

TXOC+[29]

TXOC-[29]

TXO0+[29]

TXO0-[29]

TXO1+[29]

TXO1-[29]

TXO2+[29]

TXO2-[29]

TXO3+[29]

TXO3-[29]

T

X

EC-

T

X

E0+

T T

E0-

X

T

E1+

X

T

E1-

X

T

E2+

X

T

E2-

X

T

E3+

X X

E3-

T

TXOC+ TXOC-

TXO0+ TXO0-

TXO1+ TXO1-

TXO2+ TXO2-

TXO3+ TXO3-

4

J

VDS1

L

31

G

3

2

9

2

7

T

OC-

X

T

OC+

X

T

O1-

X X

O1+

T TXO3TXO3+ TXE0TXE0+ TXE2TXE2+

1 2

R361 0_0402_5%@R36 1 0_0402_5 %@

+LCDVDD +LCDVDD

100mil 100mil

1

C386

@C38 6

@

680P_0402_50V7K

2

7

5

2

3

2

1

2

1

19

17

15

13

11

9

7

5

3

1

ACES_87216-3016

1

G

CONN@

3

L

DS Conn.

V

32

2

3

0

3

8

2

8

6

2

4

2

20

18

16

14

12

10

8

6

4

2

X

O0-

T

O0+

X

T

O2-

X X

O2+

T

X

EC-

T

TXEC+

TXE1TXE1+ TXE3TXE3+

2

@EMI@

C384

680P_0402_50V7K

LCD_PWM LCD_BKOFF#

C

B

+

12

EMI@

1 2

TAI_HCB2012KF-221T30_0 805

v0.3 update

680P_0402_50V7K

EC_SMB_CK1[29,43] EC_SMB_DA1[29,43]

nverter

o

1

L

@EMI@

680P_0402_50V7K

I

VPWR_B+

N

C385

@C387

@

C387

1

INVPWR_B+: Current Rating: Max=375mA

100mil100mil

1

2

1

2

JCON1

1

2

3

4

5

6

7

8

9

10

11 12

ACES_50228-0127N-001

CONN@

13

11

GND

14

12

GND

+5VALW

100mil

1 2

R362

@R362

@

0_0402_5%

B B

1U_0603_10V6K

Converter

EC

C390

12

S_ENVDD[29,43]

EC_ENVDD[43]

Active High

U21

5

VIN

4

SS

1

APL3512ABI-TRG_SOT23-5

C391

@C39 1

@

2

0.01U_0402_16V7K

R365 0_0402_5%R365 0_0402_5%

1 2

R367 0_0402_5%@ R367 0_0402_5 %@

VOUT

GND

EN

LCDVDD_EN

100mil

1

2

3

12

R368

R368 100K_0402_5%

100K_0402_5%

v0.3 update

A A

5

+LCDVDD Rising Time: 300us~10ms Current Rating: Max=1500mA

+LCDVDD

1

C388

4.7U_0603_10V6K

4

1

2

C389

@C389

@

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Converter

EC

Converter

EC

2

S_BKOFF#[29,43]

BKOFF#[43 ]

S_INVT_PWM[29]

INVT_PWM[43 ]

Title

Size Doc ument Number Rev

B

Date: Sheet of

1 2

R363 0_0402_5%@R363 0_ 0402_5%@

1 2

R364 0_0402_5%R364 0_0402_5%

v0.3 update

1 2

R369 0_0402_5%@ R369 0_0402_5%@

1 2

R370 0_0402_5%@ R370 0_0402_5%@

Compal Electronics, Inc.

LVDS

ZEA00 LA-A061P M/B

1

LCD_BKOFF#

12

R366

R366 100K_0402_5%

100K_0402_5%

LCD_PWM

32 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

W=80mils

5

VSB

+

C

93

@

93

@

3

0.1U_0402_16V7K

12

S

SON#

S

SON#[34,43,44]

Y

D D

Y

2.5A

U

2

1

G

O

D

N

2 3 4

U

I

O

N

U

O

I

U

N

C

N

#

O

E

APL3510BXI-TRG MSO P8

v0.3 update

T T T #

W=80mils

+

8 7 6 5

U

SB3_VCCA

4

U

B20_DEBN1[16]

S

U

B20_DEBP1[16]

U

B30_OC#0 [16]

S

U3RXDN_A[16]

U3RXDP_A[16]

C2015 0. 1U_0402_16V7KC201 5 0.1U_0402_16V7K

U3TXDN_A[16]

U3TXDP_A[16]

1 2

C2016 0. 1U_0402_16V7KC201 6 0.1U_0402_16V7K

1 2

U

B20_DEBN1

S

U

B20_DEBP1

S

U3RXDN_A

U3RXDP_A

3

U3TXDN_A_C

U3TXDP_A_C

3

71 0_0402_5%@

R

1 2

L

2

EMI@

2

EMI@

1

4

MURATA DLW 21HN900SQ2L

R

73 0_0402_5%@

3

1 2

L13

EMI@L13

EMI@

4

1

WCM2012 F2S-900T04_0805

For EMI request

L14

EMI@L14

EMI@

4

1

WCM2012 F2S-900T04_0805

2

U

B20_DEBN1_L

3

2

3

2

S

U

S

U3TXDN_A_L

U3TXDP_A_L

B20_DEBP1_L

U3RXDN_A_L U3RXDP_A_L

JUSB2

5

SSRX-

6

VBUS

SSRX+

7 8 9

12 13

LOTES_ABA-USB-12 4-P01

CONN@

GND1 SSTXSSTX+

GND4 GND5

GND

GND2 GND3

D-

D+

+

U

1 2 3 4

10 11

SB3_VCCA

USB20_DEBN1_L USB20_DEBP1_L

USB20_DEBP1_L

USB20_DEBN1_L

v0.3 update

ESD@

D3

2

3

PESD5V0U2BT_SOT23-3

2

3

2

3

2

S

SON#

Y

1

2

G

+USB3_VCCA

1

+

2

U

+

C394 100U _6.3V_M+C394 100U _6.3V_M

SB3_VCCA

12

R

76

@

76

@

3

470_0603_5%

13

D

@

Q

5

1

2N7002K_SOT23-3

S

C2070 47U _0805_6.3V6MC2070 47U_0805_6.3V6 M

1

12

2

C397 0.1U_0402_16 V7KC397 0.1U_0402_16V7K

C C

+5VALW +USB3_VCCB

C401

@C401

@

0.1U_0402_16V7K

12

SYSON#

USB20_N0

USB20_P0

Charger

B B

USB_ILIM_SEL[43] USB_CHR_EN[43]

USB_CHRMODE1[43] USB_CHRMODE2[43] USB_CHRMODE3[43]

EC GPIO GPXIOA07(pin10 4) GPIO22(pin 41) GPXIOA 11(pin108) G PIO21(pin40)

S3(SDP) 1 1 1 0

S4/S5 (DCP) 0 0 1 1

A A

+5VSB

CHG@

C395 0.1U _0402_16V4Z

1 2

W=80mils

USB30_OC#0

USB20_N0[16] USB20_P0[ 16]

R379 0_0402_5%@ R379 0_0402_5%@

R382 0_0402_5%@ R382 0_0402_5%@ R383 0_0402_5%@ R383 0_0402_5%@ R384 0_0402_5%@ R384 0_0402_5%@

Charger CT CTL1 CTL2 CTL 3 ILIM_SEL

S0(CDP) 1 1 1 1

5

1 2

1 2 1 2 1 2

USB20_N0 USB20_P0

2.5A

U24

NCHG@U24

NCHG@

1

GND

2

IN

3

IN

4

EN#

APL3510BXI-TRG MSO P8

v

0.3 update

1 2

R675 0_0402_5%NCHG@ R675 0_0402_5%NCHG@

1 2

R676 0_0402_5%NCHG@ R676 0_0402_5%NCHG@

U23

CHG@U23

CHG@

1

IN

13

STATUS#

FAULT#

2

DM_OUT

3

DP_OUT

ILIM_SEL EN

CTL1 CTL2 CTL3

DP_IN

ILIM_LO

ILIM_HI

GPAD

4 5

6 7 8

TPS2546RTER_QFN16_3X3

W=80milsW=80mils

8

OUT

7

OUT

6

OUT

5

OC#

OUT

GND

USB30_OC#0

USB20_N0_CHR

USB20_P0_CHR

W=80mils

12

9

11

USB20_N0_CHR

10

USB20_P0_CHR

15 16

R380 80.6K_0402_1%

R380 80.6K_0402_1% R381 30K_0402_1%

R381 30K_0402_1%

14 17

+USB3_VCCB

1 2 1 2

CHG@

CHG@ CHG@

CHG@

v0.3 update

4

R618 0_0402_5%@ R618 0_0402_5%@

1 2

L15

EMI@L15

EMI@

USB20_N0_CHR

USB20_P0_CHR

1

4

MURATA DLW 21HN900SQ2L

MURATA DLW 21HN900SQ2L R619 0_0402_5%@ R619 0_0402_5%@

1 2

2

3

USB20_N0_CHR_L

USB20_P0_CHR_L

2

3

Charge USB Port

For EMI request

L16

EMI@L16

EMI@

1

1 2

U3TXDN_B_C

1 2

U3TXDP_B_C

D5

8

IP4292CZ10-TBR

ESD@

3

U3RXDN_B

U3RXDP_B

10

9

7

6

1

4

WCM2012 F2S-900T04_0805

L17

1

4

WCM2012 F2S-900T04_0805

U3RXDN_B[16]

U3RXDP_B[16]

U3TXDN_B[16]

U3TXDP_B[16]

C2017 0. 1U_0402_16V7KC201 7 0.1U_0402_16V7K

C2018 0. 1U_0402_16V7KC201 8 0.1U_0402_16V7K

For ESD request

U3RXDN_A_L U3RXDN_A_L

U3RXDP_A_L U3RXDP_A_L

U3TXDN_A_L U3TXD N_A_L

U3TXDP_A_L U3TXDP_A_L

1

2

4

5

3

Part Number = SC300002F0 0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2

3

EMI@L17

EMI@

2

3

Compal Secret Data

U3RXDN_B_L U3RXDP_B_L

3

2

U3TXDN_B_L

3

U3TXDP_B_L

D6

Part Number = SC300002F0 0

Deciphered Date

1

2

4

5

3

8

IP4292CZ10-TBR

ESD@

U3RXDN_B_L U3RXDN_B_L

U3RXDP_B_L U3RXDP_B_L

U3TXDN_B_L U3TXD N_B_L

U3TXDP_B_L U3TXDP_B_L

10

9

7

6

2

JUSB1

5

SSRX-

6

VBUS

SSRX+

7 8 9

12 13

LOTES_ABA-USB-12 4-P01

CONN@

GND1 SSTXSSTX+

GND4 GND5

GND

GND2 GND3

D-

D+

+USB3_VCCB

12

R389

@ R389

@

470_0603_5%

13

D

@

2

G

2N7002K_SOT23-3

S

C399 47U_08 05_6.3V6MC399 47U_0805_6.3V6M

C398 100U _6.3V_M+C398 100U _6.3V_M

1

+

2

ESD@

D4

PESD5V0U2BT_SOT23-3

1

12

1

33 59

1

2

Q16

C400 0.1U_0402_16 V7KC400 0.1U_0402_16V7K

1 2 3 4

10 11

+USB3_VCCB

USB20_N0_CHR_L USB20_P0_CHR_L

SYSON#

+USB3_VCCB

v0.3 update

USB20_P0_CHR_L

USB20_N0_CHR_L

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ZEA00 LA-A061P M/B

2

3

USB 3.0 CONN

0.3

Non Changer

5

WWW.AliSaler.Com

D D

4

S

B20_N2[16]

U

B20_P2[16]

S

USB20_N3[16]

USB20_P3[ 16]

U

B20_N2

S

U

B20_P2

S

USB20_N3

USB20_P3

3

L

7

EMI@

7

EMI@

3

2

MURATA DLW 21HN900SQ2L

L36

3

2

MURATA DLW 21HN900SQ2L

EMI@L36

EMI@

4

1

4

1

U

B20_N2_R

S

U

B20_P2_R

S

USB20_N3_R

USB20_P3_R

U

SB_VCCA

+

SB_VCCA

U

2

U

S

1

2

3

4

1

2

3

4

B20

U

SB5

J

C

V

-

D

G

D1

+

N

D

D2

G

TYCO_2041230-1

CONN@

J

SB6

U

VCC

D-

D+

GND1

GND

GND2

TYCO_2041230-1

CONN@

1

U

SB_VCCA

1

C

21

5

2

0.1U_0402_16V7K

+

1

2

C

22

5

0.1U_0402_16V7K

5

6

1

+

C

20

5

220U_6.3V_M

5

6

2

v1.0 update

+USB_VCCB

L35

EMI@L35

EMI@

USB20_N8[16]

USB20_P8[16]

C C

USB20_DEBN9[16]

USB20_DEBP9[16]

USB20_N8

USB20_P8

USB20_DEBN9

USB20_DEBP9

3

2

MURATA DLW 21HN900SQ2L

L34

3

2

MURATA DLW 21HN900SQ2L

EMI@L34

EMI@

4

1

4

1

USB20_N8_R

USB20_P8_R

+USB_VCCB

USB20_DEBN9_R

USB20_DEBP9_R

For USB2.0 ESD diode

W=100mils

+5VALW +USB_VC CA

2.5A

U31

1

GND

2

IN

3

IN

B B

SYSON#[33,43,44]

W=100mils

A A

4

EN#

APL3510BXI-TRG MSO P8

1

C519

0.1U_0402_16V7K

2

+5VALW +USB_VC CB

2.5A

U32

1

GND

2

IN

3

IN

4

EN#

APL3510BXI-TRG MSO P8

1

C525

0.1U_0402_16V7K

2

OUT OUT OUT OC#

W=100mils

8 7 6 5

1

2

W=100mils

8 7 6 5

1

2

USB_OC#1SYSON#

C518

4.7U_0603_10V6K

USB_OC#5SYSON#

C524

4.7U_0603_10V6K

USB_OC#1 [16]

USB_OC#5 [16]

USB20_N2_R

USB20_P2_R

USB20_N3_R

USB20_P3_R

JUSB4

1

VCC

2

D-

3

D+

GND1

4

GND

GND2

TYCO_2041230-1

CONN@

JUSB3

1

VCC

2

D-

3

D+

GND1

4

GND

GND2

TYCO_2041230-1

CONN@

ESD@

D16

2

3

PESD5V0U2BT_SOT23-3

ESD@

D17

2

3

PESD5V0U2BT_SOT23-3

12

@R508

@

470_0603_5%

13

D

2

G

S

5

6

5

6

1

R508

Q22

@

Q22

@

2N7002K_SOT23-3

C514

220U_6.3V_M

v1.0 update

1

+

2

0.1U_0402_16V7K

USB20_N8_R

USB20_P8_R

USB20_DEBN9_R

USB20_DEBP9_R

Near Connector JUSBNear Connector JUSB1

SYSON#SYSON#

C515

2

G

+USB_VCCB

+USB_VCCB+USB_VCCA

1

C516

0.1U_0402_16V7K

2

ESD@

D18

2

1

3

PESD5V0U2BT_SOT23-3

ESD@

D19

2

1

3

PESD5V0U2BT_SOT23-3

12

R509

@R509

@

470_0603_5%

13

D

Q23

@

Q23

@

2N7002K_SOT23-3

S

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

USB20

ZEA00 LA-A061P M/B

1

0.3

34 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

SATA ODD Conn

+

2VS

1

J

DP1

O

1

2

3

4

D D

G

D

N N

D

G

ACES_88290-044G

CONN@

SATA_PTX_DRX_P4[12]

SATA_PTX_DRX_N4[12]

SATA_PRX_DTX_N4[12]

SATA_PRX_DTX_P4[12]

5 6

5

VS

+

100mil

1 2 1 2

C410 0.01U_0402_25 V7KC410 0.01U_0402_25V7K C411 0.01U_0402_25 V7KC411 0.01U_0402_25V7K

1 2

C413 0.01U_0402_16 V7KC413 0.01U_0402_16V7K

1 2

C415 0.01U_0402_16 V7KC415 0.01U_0402_16V7K

10U_0603_6.3V6M

Place CAP close to JODD <100mil

C C

5

VS

+

1

C

05

4

2

100mil

Place close to JODP1.

SATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4

SATA_PRX_C_DTX_N4 SATA_PRX_C_DTX_P4

4

1

C

06

4

0.1U_0402_25V6

2

JODD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

G1

9

G2

TYCO_4-1775058-5

CONN@

3

SATA HDD Conn.

1

2VS

+

H

DP1

J

1

2

3

4

5

GND

6

GND

ACES_88290-044G

CONN@

SATA_PTX_DRX_P0[12]

SATA_PTX_DRX_N0[12]

SATA_PRX_DTX_N0[12]

SATA_PRX_DTX_P0[12]

2

+

VS

5

100mil

1

C

03

4

10U_0603_6.3V6M

5

VS

+

1

2VS

+

2

l

ace close to JHDP1

P

1

00mil

1

C407

C407 10U_0805_25V6K

10U_0805_25V6K

2

Place close to JHDP1

1 2 1 2

C412 0.01U_0402_25 V7KC412 0.01U_0402_25V7K C414 0.01U_0402_25 V7KC414 0.01U_0402_25V7K

1 2

C416 0.01U_0402_16 V7KC416 0.01U_0402_16V7K

1 2

C417 0.01U_0402_16 V7KC417 0.01U_0402_16V7K

Place CAP close to JHDD <100mil

1

C

04

4

0.1U_0402_25V6

2

1

C408

0.1U_0402_25V6

2

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0

A

TA_PTX_C_DRX_P0

S

A

TA_PTX_C_DRX_N0

S

TA_PRX_C_DTX_N0

A

S

TA_PRX_C_DTX_P0

A

12

C409

@C409

@

1U_0603_25V6K

1

D

9

2

ESD@

1

2

4

5

3

8

IP4292CZ10-TBR XSON10

ESD Reauest

JHDD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

G1

9

G2

TYCO_4-1775058-7

CONN@

9

10

8

9

7

6

65

A

TA_PTX_C_DRX_P0

S

A

TA_PTX_C_DRX_N0

S

TA_PRX_C_DTX_N0

A

S

TA_PRX_C_DTX_P0

A

v0.3 update

FAN Control Circuit

+12VS+3VS

v0.3 update

12

R395

R395 10K_0402_5%

R396 1K_0402_ 5%R396 1K_0402_5%

FAN_SPEED[43]

FAN_PW M[43]

B B

1 2 1 2

R397 100_0402_5 %R397 100_0402_5%

10K_0402_5%

1

C420

C420 1000P_0402_50V7K

1000P_0402_50V7K

2

1

2

3

60mil

D7

D7 BAV70W_S OT323-3

BAV70W_S OT323-3

FAN_CPU_SPEED_R FAN_CPU_PW M_R

C418 470P_0805_100VEMI@ C418 470P_0805_100VEMI@

1 2

C419 1000P_0402_50V7KC419 1000P_0402_50V7K

1 2

JFAN1

1

2

3

5

3

5

4

6

4

6

ACES_85205-0400N

CONN@

v1.0 update

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SATA-HDD/ODD/USB

ZEA00 LA-A061P M/B

1

0.3

35 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

4

3

2

1

.2VS_CR_DV

+

20mil 20mil

1

C

21

4

4.7U_0603_6.3V6K

D D

4.7U_0603_6.3V6K

2

C

22

4

0.1U_0402_16V4Z

2

1

.2VS_CR_AV

+

1

C

23

4

2

4.7U_0603_6.3V6K

1

C

24

4

0.1U_0402_16V4Z

2

3

VS

+

40mil

1

C

25

4

2

10U_0603_6.3V6M

1

C

26

4

0.1U_0402_16V4Z

2

Place close to Pin9

+3VS

U25

C427

C427 1U_0402_6.3V6K

1U_0402_6.3V6K

W=12mil, L<200mil

PCIE_PTX_C_CRRX_P1[16]

PCIE_PTX_C_CRRX_N1[16]

PCIE_PRX_CRTX_P1[16] PCIE_PRX_CRTX_N1[16]

C C

PLT_A_RST#[15,39,40]

1 2

R406

@ R406

@

0_0402_5%

1

@EMI@

C432

0.1U_0402_16V4Z

2

CLKREQ_CR#[13]

1 2

C429 0.1U_0402_16V7KC429 0.1U_0402_16V7K

1 2

C430 0.1U_0402_16V7KC430 0.1U_0402_16V7K

CLK_CR[13]

CLK_CR#[13]

1 2

R408

@ R408

@

10K_0402_5%

20mil

12

+DV33_18

+1.2VS_CR_AV +1.2VS_CR_DV

+3VS_CR

1 2

R400 6.2K_0402_1%R400 6.2K_0402_1%

PCIE_PTX_C_CRRX_P1 PCIE_PTX_C_CRRX_N1 PCIE_PRX_C_CRTX_P1 PCIE_PRX_C_CRTX_N1

CLKREQ_CR#

1 2

+3VS+3VS

R409 10K_0402_5%R409 10K_0402_5%

PLT_RST#_CR

GPIO_CR

40mil

RREF

U25

9

3V3_IN

15

SP3

7

AV12

11

DV12_S

10

Card_3V3

8

RREF

1

HSIP

2

HSIN

5

HSOP

6

HSON

3

REFCLKP

4

REFCLKN

23

PERST#

24

CLK_REQ #

19

GPIO

RTS5229-GR_QFN24_4X4

GND

SP1 SP2 SP3 SP4 SP5 SP6

SD_W P

SD_CD#

MS_INS#

25

12 13 14 16 17 18

20

21

22

SD_D1 SD_D0_MS_D1 SD_CLK_MS_D0 SD_CMD_MS_D2 SD_D3_MS_D3 SD_D2_MS_CLK

SD_WP_MS_BS

SD_CD#

MS_CD#

Length of per trace 2inch no more 2 via mismatch trace length <100mil 50ohm +-15% impedance.

SD_D1

SD_D0_MS_D1

SD_CLK_MS_D0

SD_CMD_MS_D2

SD_D3_MS_D3

1 2

R399 0_0402_5%@ R399 0_0402_5%@

1 2

R401 0_0402_5%@ R401 0_0402_5%@

1 2

R402 0_0402_5%@ R402 0_0402_5%@

1 2

R403 0_0402_5%@ R403 0_0402_5%@

1 2

R404 0_0402_5%@ R404 0_0402_5%@

1 2

R405 33_0402_5%EMI@ R405 33_0402_5%EMI@

v0.3 update

SD_D1_R

SD_D0_MS_D1_R

SD_CLK_MS_D0_R

SD_CMD_MS_D2_R

SD_D3_MS_D3_R

SD_D2_MS_CLK_RSD_D2_MS_CLK

1 2

EMI@

C428

C428 5P_0402_50V

5P_0402_50V

EMI@

C431

C431 5P_0402_50V

5P_0402_50V

Place close to JCR1 pin 12,21

+3VS_CR

40mil

1

+3VS_CR

Issued Date

40mil

JCR1

1

SD-DAT2

2

MS-VSS

3

SD-DAT3/M MC-RSV

4

MS-VCC

5

MS-SCLK

6

SD-CMD/MM C-CMD

7

MS-DAT3

8

MS-INS

9

SD-VSS/MM C-VSSI

10

MS-DAT2

11

SD-VDD/MM C-VDD

12

MS-DAT0

13

MS-DAT1

14

SD-CLK/MM C-CLK

15

MS-BS

16

MS-VSS

17

SD-VSS/MM C-VSS2

18

SD-DAT0/M MC-DAT

19

SD-DAT1

20

SD-CD SD-GND21GND1

22

SD-WP

T-SOL_143-2300302603

CONN@

2013/04/01 2014/04/01

3

GND2

23 24

Compal Secret Data

Deciphered Date

2

B B

+3VS_CR

R412

@R412

@

47_0603_5%

1 2

Q17

@

Q17

@

13

D

SD_CD#

2N7002K_SOT23-3

D

2

G

S

SD_D2_MS_CLK_R

SD_D3_MS_D3_R

SD_D2_MS_CLK_R SD_CMD_MS_D2_R SD_D3_MS_D3_R MS_CD#

SD_CMD_MS_D2_R

SD_CLK_MS_D0_R SD_D0_MS_D1_R SD_CLK_MS_D0_R SD_WP_MS_BS

SD_D0_MS_D1_R SD_D1_R SD_CD#

SD_WP_MS_BS

Reserve card power discharge circuit

A A

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_0603_6.3V6M

2

Title

Size Document Number Rev

Custom

Date: Sheet of

1

C433

10U_0603_6.3V6M

C434

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

RTS5229 Media Card Controller

ZEA00 LA-A061P M/B

36 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

5

VS

+

1

C

37

4

4.7U_0603_10V6K

C

DEC_PW REN[ 43]

D D

C C

B B

O

+5V_VDDA_HD

FCM1608KF-800T07_0603

For ESD and EMI

R431

@EMI@R431

@EMI@

100K_0402_5%

AZ_RST_HD#[12]

+

5

47U_0805_6.3V6M

@EMI@

4.7K_0402_5%

C455

0.01U_0402_25V7K@EMI@

MIC_DET# HP_DET#_CODEC

DGND To AGND Bypass

0.1U_0402_16V4Z

2

1 2

VS

R

21 10K_040 2_5%

4

L18

1 2

C2019

+3VS

12

R427

1 2

R436 0_0603_5%@ R436 0_06 03_5%@

1 2

R437 0_0603_5%@ R437 0_06 03_5%@

1 2

R438 0_0603_5%@ R438 0_06 03_5%@

1 2

R439 0_0603_5%@ R439 0_06 03_5%@

C

38

4

LDO@

Close to U7

INT_DMIC_DATA[ 41] CODEC_MUTE#[ 43]

DGND

o

dec Regulator

C

R

16 0_0603_5%@

4

1 2

U

6

2

1

I

N

2

G

D

N

3

S

DN

H

APL5320-475BI-TRG_SOT2 3-5

12

1

C445

C444

2

10U_0805_10V6K

R433 20K_0402_1%R433 20K_0402_1% R434 5.1K_0402_1%R434 5. 1K_0402_1%

1 2

0.1U_0402_16V4Z

MIC1_L

MIC1_R

AZ_SYNC_HD[12]

AZ_SDOUT_HD[12]

12

v0.3 update

AGND

v1.0 update

5

U

T

4

B

P

0.1U_0402_16V4Z

1

C446

2

1 2

MONO_IN

R432 0_0402_5%@ R432 0_0402_5%@

CODEC_MUTE_R SENSE_A SENSE_B

+

L

0.22U_0402_6.3V6K

@EMI@

100P_0402_50V8J

LDO@

O

1

2

C452 4. 7U_0603_10V6KC452 4.7U_0603_10V6K C453 4. 7U_0603_10V6KC453 4.7U_0603_10V6K

1 2

EAPD_CODEC[43]

V_VDDA_HD

5

O_BP

D

LDO@

C449

MIC1_L_C

MIC1_R_C

1

2

Sense Pin Impedance Codec Signals

39.2K

SENSE A

20K

10K

A A

5.1K

39.2K

SENSE B

20K

10K

5.1K

5

LOUT2 (PIN 39, 41)

MIC1 (PIN 21, 22)

LINE1 (PIN 23, 24)

LOUT1 (PIN 35,36)

LINE2 (PIN 14, 15)

MIC2 (PIN 16, 17)

HP-OUT (PIN 32,33)

4

5

V_VDDA_HD

+

1

C

39

4

4.7U_0603_10V6K

2

1 2

4

40

C

+HD_AVDD

38

U27

AVDD125AVDD2

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

LINE1_VREFO

20

LINE2_VREFO

19

MIC2_VREFO

21

MIC1_L

22

MIC1_R

12

PCBEEP_IN

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

48

SPDIFO1

4

DVSS1

7

DVSS2

ALC272-VA4-CG_LQF P48_7X7

3

1

D10

ESD@ D10

ESD@

PESD5V0U2BT_SOT23-3

4

Output:4.75v Max I:350mA

3

VS_VDD

+

0.1U_0402_16V4Z

1

DVDD

LOUT1_L

LOUT_R

LOUT2_L

LOUT2_R

SPDIFO2

DMIC_CLK1/2

NC

DMIC_CLK3/4

BITCLK

SDATA_IN

MONO_OUT

CBP

CPVEE

MIC1_VREFO

HPOUT_R

CBN

VREF

JDREF

HPOUT_L

AVSS1 AVSS2

HP_DET#

MIC_DET#

2

D11

ESD@ D11

ESD@

PESD5V0U2BT_SOT23-3

C

0.1U_0402_16V4Z

9

DVDD_IO

35

36

39

41

45

46

43

44

6

8

37

29

10 mil

31

28

32

30

27

40

33

26 42

PR

2

3

1

41

4

HDA_SDIN0_AUDIO

HP_RIGHT

10 mil

HP_LEFT

3

VS

+

12

1

C

42

4

10U_0603_6.3V6M

2

1

C447

INT_DMIC_CLK_R

10_0402_5%

1 2

CBP

1 2

C454 2.2U_0603_10V6KC454 2.2U_0603_10V6K

CBN

+VREF

272JDREF

3

1

2

@EMI@

R424

10P_0402_50V8J

1 2

33_0402_5%

+MIC1_VREFO

1 2

C458 2.2U_0603_10V6KC458 2.2U_0603_10V6K

R435

20K_0402_1%

MIC1_R_R

MIC1_L_RPL

2

1

D12

ESD@ D12

ESD@

PESD5V0U2BT_SOT23-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

3

R

18

@

18

@

4

0_0603_5%

H

P

Close to Pin1

C448

C448 10U_0603_6.3V6M

10U_0603_6.3V6M

AMP_FRONT_LEFT [38]

AMP_FRONT_RIGHT [ 38]

MURATA_BLM15BB221SN 1D_0402

C451

EMI@

R428

12

EMI@ L45

EMI@

1

C460

10U_0603_6.3V6M

2

Close to Pin9

L45

AZ_SDIN0_HD [12]

1

C461

0.1U_0402_16V4Z

2

3

Internal Speaker

AZ_BITCLK_HD [12]

2

3

VS

+

12

R

17

@

17

@

4

10K_0402_5%

R

20

@

20

@

4

0_0402_5%

_DET#[37,43]

1

@EMI@

C450

27P_0402_50V8J

2

H

_DET#

P

INT_DMIC_CLK [41]

MIC1_R

MIC1_L

1 2

H

P

+MIC1_VREFO

R429

1K_0402_5%

1 2

R430

1K_0402_5%

_DET#_CODEC

D8D8

12

D9D9

12

R425

4.7K_0402_5%

MIC1_R_R1

MIC1_L_R1

12

R426

4.7K_0402_5%

L19

FBM-11-160808-601-T_ 0603

1 2

L20

FBM-11-160808-601-T_ 0603

Change to AGND for high frequency noise issue

Need 600 Ohm 500 mA

EMI@L19

EMI@

1 2

EMI@L20

EMI@

330P_0402_50V7K

Close to Pin27

Need 600 Ohm 500 mA

EMI@

HP_RIGHT PR

HP_LEFT PL

2013/04/01 2014/04/01

1 2

R440 75_0603_1%R440 75_0603_1%

1 2

R441 75_0603_1%R441 75_0603_1%

Compal Secret Data

HP_RIGHT_R

HP_LEFT_R

Deciphered Date

EMI@

1 2

EMI@

L21 FBM-11-160808-601-T_0603

1 2

L22 FBM-11-160808-601-T_0603

330P_0402_50V7K

2

EMI@

C462

HP_DET#[37,43]

1

2

1

M

O

12

4

22

R

Beep sound

C

36

4

1 2

NO_IN_1

0.1U_0402_16V4Z

1

C443

0.1U_0402_16V4Z

2

M

NO_IN

O

EC Beep

E

_BEEP#[43]

C

PCI Beep

P

H_SPKR[12]

C

R

13

4

1 2

47K_0402_5%

R

19

4

1 2

47K_0402_5%

4.7K_0402_5%

EXT MIC IN

EMI@

C456

MIC_DET#

MIC1_R_R

MIC1_L_R

1

EMI@

2

C457

C457 330P_0402_50V7K

330P_0402_50V7K

JMIC1

5

4

3 6 2 1

7

8

SINGATRON 2SJ- B351-S39

1

ESD@

C459

0.1U_0402_16V7K

2

CONN@JMIC1

CONN@

HP OUT

JHP1

5

HP_DET#

1

EMI@

C463

C463 330P_0402_50V7K

330P_0402_50V7K

2

Title

ize D ocument Number Rev

Size Document Number Rev

S

Tuesday, September 24, 2013

Date: Sheet of

4

3 6 2 1

7

8

SINGATRON 2SJ- B351-S39

1

ESD@

C464

2

0.1U_0402_16V7K

HDA-ALC272/HP/MIC

ZEA00 LA-A061P M/B

CONN@JHP1

CONN@

37 59

1

0.3

A

WWW.AliSaler.Com

1 2

2

154 0. 1U_0402_16V4Z@ESD@

C

1 2

2

155 0. 1U_0402_16V4Z@ESD@

C

+

2VS

1

1 1

12

C

67

68

4

1 2

L23

L23 HCB2012KF-221T30_2P

HCB2012KF-221T30_2P

1 2

L24 HCB2012KF-221T30_2P

HCB2012KF-221T30_2P

+5VS

7U_0805_10V6K

4.

120 mil

4

578

7U_0805_10V6K

4.

3 6

241

@

@L24

@

0

.3 update

v

Q

8

1

FDS8884_SO8

5

VS

+

4.7U_0805_25V6K

4.7U_0805_25V6K C

C

65

4

1 2

R

45

4

10K_0402_5%

1 2

+3VS

R447

@R447

@

1 2

0_0402_5%

C470 22U _0805_6.3V6MC470 22U_0805_6.3V6M

1 2

120 mil

U28

6

N

C

E

V

5

N

R

D

V

G

D

4

B

O

K

F

P

A

L5610CI-TRG_SOT23-6

P

R448

12K_0402_1%

1 2

C469

1 2

47P_0402_50V8J

10U_0805_10V6K

Close to Pin12

R453

R452

@ R 452

@

0_0402_5%

AMP_FRONT_LEFT[37]

2 2

AMP_PD#[43]

R458

R458 10K_0402_5%

10K_0402_5%

12

AMP_FRONT_RIGHT[37]

1 2

R456

@ R 456

@

0_0402_5%

1 2

R453

1.1K_0402_1%

1 2

R457

1.1K_0402_1%

1 2

5.6K_0402_1%

v0.2 update

3 3

4 4

L25

EMI@L25

EMI@

MURATA BLM18PG1 21SN1D 0603

1 2

3A/120ohm/100MHz

12

C478

C478 470P_0603_50V8J

470P_0603_50V8J

EMI@

12

R465

R465 22_1206_5%

22_1206_5%

EMI@

L27

EMI@L27

EMI@

MURATA BLM18PG1 21SN1D 0603

1 2

3A/120ohm/100MHz

12

C482

C482 470P_0603_50V8J

470P_0603_50V8J

EMI@

12

R467

R467 22_1206_5%

22_1206_5%

EMI@

SPKR-

1

C479

C479 1000P_0603_50V7K

1000P_0603_50V7K

2

EMI@

SPKR+OUTPR

1

C483

C483 1000P_0603_50V7K

1000P_0603_50V7K

2

EMI@

OUTPL

C471

1

2

3

R459

1

C472

2

12

10U_0805_10V6K

B

Vo=0.8(1+R606/R607) Output:4.8V M

x I:7.5A

a

10K_0402_5%

1 2

1

C

4

1U_0402_6.3V6K

2

12

R449

2.4K_0402_1%

0.1U_0402_16V4Z

1

C474

C473

2

0.1U_0402_16V4Z

Close to Pin4,5

R451

5.6K_0402_1%

1 2

C475 1U_0402_6.3V6KC475 1U_0402_6.3V6K

12

3A/120ohm/100MHz

C480

C480 470P_0603_50V8J

470P_0603_50V8J

EMI@

R466

R466 22_1206_5%

22_1206_5%

EMI@

3A/120ohm/100MHz

C484

C484 470P_0603_50V8J

470P_0603_50V8J

EMI@

R468

R468 22_1206_5%

22_1206_5%

EMI@

C476 1U_0402_6.3V6KC476 1U_0402_6.3V6K

1 2

+PVDD

20K_0402_5%

L26

EMI@L26

EMI@

MURATA BLM18PG1 21SN1D 0603

1 2

L28

EMI@L28

EMI@

MURATA BLM18PG1 21SN1D 0603

1 2

R

4

66

+PVDD

1 2

R462

R464

44

MODE1

MODE2

1 2

AMP_R_C

AMP_PD#

AMP_L_C

1

2

1

2

+

VS

5

@

R617

0_0402_5%

12

1

C477

2

2.2U_0805_25V6K

SPKL+

C481

C481 1000P_0603_50V7K

1000P_0603_50V7K

EMI@

SPKL-OUTNL

C485

C485 1000P_0603_50V7K

1000P_0603_50V7K

EMI@

U29

4

PVDDL

5

PVDDR

12

AVDD

14

INPUT-L

9

SDb

13

INPUT-R

1

MODE1

8

MODE2

10

BYPASS

ALC109-CGT_EPAD- SOP16

PESD5V0U2BT_SOT23-3

HOLD/SDA/G2

SPKL+ SPKL-OUTNR SPKR+ SPKR-

D13

ESD@

C

OUT-RN

OUT-RP

OUT-LN

OUT-LP

VOL/SCL/G1

AGND

EPAD

2

3

1

7

6

2

3

16

15

11

17

2

3

1

OUTNR

OUTPR

OUTNL

OUTPL

AMP_G2

AMP_G1

R463

@ R 463

@

0_0402_5%

1 2

ACES_87212-04G0

JSPK1

1

2

3

4

5

GND

6

GND

CONN@

D14

D14 PESD5V0U2BT_SOT23-3

PESD5V0U2BT_SOT23-3

ESD@

D

Mode selet: Fix Gain

+PVDD

12

@R454

@

0_0402_5%

12

@R460

@

0_0402_5%

R454

R460

12

@R455

@

0_0402_5%

MODE2M ODE1

12

@R461

@

0_0402_5%

R455

R461

Gain Select

+PVDD

12

@

0_0402_5%

AMP_G1 AMP _G2

12

@R669

@

0_0402_5%

R667

R669

12

@

R668

0_0402_5%

12

R670

@R670

@

0_0402_5%

v1.0 update

Mode1 Mode2

0 0

0

1

01

1 1

AMP_G2AMP_G1

0

1 0

1 1

E

Option Pin15 Pin16

Fixed Gain

I2C

PWM

DC

Gain

11dB

14dB

(Default)

00

1

19dB

25dB

G1 G2

SCL SDA

PWM Hold

DC Hold

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

AMP

ZEA00 LA-A061P M/B

E

0.3

38 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

WOL circuit

Short J5 for WOL support (Enable/Disable by BIOS setup)

v0.2 update

3

VALW_PC H

+

AO3413_SOT23-3

D D

WOL_EN #[43]

R573

@

100K_0402_5%

2

G

5

+

VALW

12

13

D

Q27

@

Q27

@

SSM3K7002FU_SC70-3

S

AO3413_SOT23-3

@R574

@

200K_0402_5%

1 2

R574

J

JUMP_43X79@

5

2

112

D

S

D

S

Q

6

@

6

@

2

G

2

1

2

13

C562

@C562

@

0.1U_0402_16V4Z

60mil60mil

4

3

2

1

Power ( Decoupling Cap. )

40 mils

+

V_LAN

3

V_LAN

+

1 2

C

52 0.1U_0402_16V4Z

5

1 2

C

56 0.1U_0402_16V4Z

5

1 2

5

59 10U_0805_10V6K@

C

1 2

2

128 10U_0805_10V6K@

C

v1.0 update

C552, C556, C559, C2128 close to Pin 11,32

60 mils

+

AN_VDD10

L

1 2

C

53 0.1U_0402_16V4Z

5

1 2

C

57 0.1U_0402_16V4Z

5

1 2

5

58 0.1U_0402_16V4Z

C

1 2

5

60 0.1U_0402_16V4Z

C

1 2

C

61 1U_0402_6.3V6K

5

C553, C557, C558, C560, close to Pin 3,8,22,30 C561(1uF) close to Pin22

+

V_LAN

3

R

72 0_0603_5%@

5

1 2

0.1U_0402_16V4Z

40 mils

+

AN_VDDREG

L

1

5

54

C

1

5

55

C

4.7U_0603_10V6K

2

<

C554, C555 close to U26

in22

P

C555 is X5R

N

ote>

+3V_LAN rising time (10%~90%) need > 0.5ms and <100ms.

U36

Close to Pin 17,18

C C

+3VS

PCIE_PRX_LANTX_P2[16]

PCIE_PRX_LANTX_N2[16]

PCIE_PTX_C_LANRX_P2[16] PCIE_PTX_C_LANRX_N2[16]

1 2

R578 1K_0402_ 5%R578 1K_0402_5%

R579

15K_0402_5%

CLKREQ_LAN#[13]

+3VS

PLT_A_RST#[15,36,40]

ESD@ C2134

ESD@

0.1U_0402_16V4Z

1 2

R577 10K_0402 _5%

v0.2 update

+3V_LAN

B B

Q28

@

Q28

@

2N7002K_SOT23-3

PCIE_WAKE #[14,40]

1 3

1 2

R585 0_04 02_5%@ R585 0_0402_5%@

12

C563 .1U_0402_16V 7KC563 .1 U_0402_16V7K

12

C564 .1U_0402_16V 7KC564 .1 U_0402_16V7K

CLK_LAN[13] CLK_LAN#[13]

@

PLT_A_RST#

40 mils

12

C2134

2

D

+LAN_VDDREG

12

R584

@R584

@

10K_0402_5%

G

LAN_WAK E#_R

S

PCIE_PRX_C_LANTX_P2 PCIE_PRX_C_LANTX_N2

PCIE_PTX_C_LANRX_P2 PCIE_PTX_C_LANRX_N2

CLK_LAN CLK_LAN#

CLKREQ_LAN#

LAN_WAK E#_R

ISOLATE#

+LAN_VDDREG

1 2

R580 2.49K_0402_1%R580 2.49K_0402_1%

LAN_X2 LAN_X1

U36

17

HSOP

18

HSON

13

HSIP

14

HSIN

15

REFCLK_P

16

REFCLK_N

12

CLKREQB

21

LANWAKEB

20

ISOLATEB

19

PERSTB

23

VDDREG

31

RSET

29

CKXTAL2

28

CKXTAL1

RTL8111G-CG_QFN32_4X 4

Crystal

2

3

4

LAN_X1

LAN_X2

1

C570

C570 10P_0402_50V8J

10P_0402_50V8J

2

A A

C569

10P_0402_50V8J

5

Y4

1

OSC

NC

4

NC

25MHZ_10PF_X3G025000DA1H -X

1

2

OSC

+3V_LAN +LAN_VDD10+LAN_VDD10

3

8

11

30

32

22

1

AVDD10

MDIP0

AVDD33

DVDD10

MDIN0

MDIP1

MDIN1

MDIP2

MDIN2

MDIP3

MDIN3

LED2

LED1/GPIO

LED0

REGOUT

GND

LAN_MIDI0+

2

LAN_MIDI0-

4

LAN_MIDI1+

5

LAN_MIDI1-

6

LAN_MIDI2+

7

LAN_MIDI2-

9

LAN_MIDI3+

10

LAN_MIDI3-

25

LAN_LED_ORG#

26

LAN_LED_YEL#

27

LAN_LED_GRN#

+LAN_REGOUT

60 mils 60 mils

24

33

Part Number = SC300001J 00

LAN_MIDI1-

LAN_MIDI1+

Part Number = SC300001J 00

LAN_MIDI3-

LAN_MIDI3+

TCLAMP3304N.TCT_SLP 2626P10-10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

8111G@

R581

R581 0_0603_5%

0_0603_5%

1 2

1

8111G@

C566

0.1U_0402_16V4Z

2

8111G (LDO Mode)

D24

ESD@ D24

ESD@

1 2 3 4

TCLAMP3304N.TCT_SLP 2626P10-10

ESD@ D25

ESD@

1 2 3 4

10

1

10

9

2 3 4 556

D25

1 2 3 4 556

3

LAN_MIDI0+

9

8

7

LAN_MIDI0-

7

6

GND

11

10

9

LAN_MIDI2+

9

8

7

LAN_MIDI2-

7

6

GND

11

2013/04/01 2014/04/01

L44

8111GS@L44

8111GS@

2.2UH +-5% NLC 252018T-2R2J-N

1 2

8111GS@ C 567

8111GS@

4.7U_0603_10V6K

<Note> C567 is X5R

8111GS (SWR Mode)

Compal Secret Data

+LAN_VDD10

1

C567

2

Deciphered Date

Green / Orage

12

C568

0.1U_0402_16V4Z

LAN_LED_GRN# LAN_LED_GRN#_R

LAN_LED_ORG# LAN_LED_ORG#_R

vendor recommend

@

R582

0_0402_5%

8111GS@C568

8111GS@

LAN_LED_YEL# LAN_LED_YEL#_R

Yellow

LAN_LED_YEL#

LAN_LED_ORG#

@ESD@ D26

@ESD@

PESD5V0U2BT_SOT23-3

2

12

D26

R575

249_0402_1%

1 2

R576

249_0402_1%

1 2

1

EMI@

C565

0.01U_0402_16V7K

2

R583

510_0402_5%

1 2

2

3

1

Size Document Number Rev

Custom

Date: Sheet of

20mils

LAN_MIDI0+

LAN_MIDI0-

LAN_MIDI1+

LAN_MIDI1-

LAN_MIDI2+

LAN_MIDI2-

LAN_MIDI3+

LAN_MIDI3-

20mils

+3V_LAN

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

ZEA00 LA-A061P M/B

JRJ1

13

L3

+

14

L4

1

TD1+ R1

2

TD1- R2

3

TD2+ R3

4

TD2- R4

5

CT R5

6

CT R6

7

TD3+ R7

8

TD3- R8

9

TD4+ R9

10

TD4- R10

11

L1

+

12

R586 0_0805_5%

LAN RTL8111G

+

L2

UDE_RV1-26295NU1

CONN@

DC234008N10

12

@

LAN_GND

1

+

15

GND

16

GND

LAN_GND

0.3

39 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

I

NI(TV)/m-SATA SSD

M

Mini Card Slot 1---TV tuner Current: +3VS : 2750mA, 1.5V: 500mA

P

IE_WAKE#[14,39]

C

V

_CLKREQ#[13]

C2020 0 .01U_0402_25V7KSS D@ C2020 0.01U_ 0402_25V7KSSD@ C2021 0 .01U_0402_25V7KSS D@ C2021 0.01U_ 0402_25V7KSSD@ R620 0_0402_5%TV@ R620 0_0402_5%TV@ R621 0_0402_5%TV@ R621 0_0402_5%TV@

1 2

C2023 0.01U_0402_25V7KSSD@ C2023 0.01U_0402_25V7KSSD@ C2022 0.01U_0402_25V7KSSD@ C2022 0.01U_0402_25V7KSSD@ C121 0.1U_0402_16V 7KTV@ C121 0.1U_0402_16V7KTV@ C122 0.1U_0402_16V 7KTV@ C122 0.1U_0402_16V7KTV@

T

1 2 1 2

1 2 1 2 1 2 1 2

D D

SATA_PRX_DTX_P1[12] SATA_PRX_DTX_N1[12]

PCIE_PRX_TVTX_N4[16]

PCIE_PRX_TVTX_P4[16] SATA_PTX_DRX_N1[12] SATA_PTX_DRX_P1[ 12]

PCIE_PTX_TVRX_N4[16] PCIE_PTX_TVRX_P4[16]

R665 0_0402_5%@ R665 0_0402_5%@

E51_TXD E51_RXD

C C

1 2 1 2

R666 0_0402_5%@ R666 0_0402_5%@

+12VS_TV1

+12VS_TV2

+3VS +12VS

3

+

L

K_TV#[13]

C C

K_TV[13 ]

L

R478 0_0402_5%@ R478 0_0402_5%@ R477 0_0402_5%@ R477 0_0402_5%@ R479 0_0402_5%@ R479 0_0402_5%@

VS

1 2 1 2 1 2

@C494

@

0.1U_0402_16V4Z

T

_CLKREQ#

V

PCIE_PRX_R_TVTX_N4 PCIE_PRX_R_TVTX_P4

PCIE_PTX_C_TVRX_N4 PCIE_PTX_C_TVRX_P4

C494

4

v1.0 update

R

70

@

70

@

4

0_0402_5%

1 2

B

DETECT_R

_

+3VS

+3VS_TV_R +12VS_TV1 +12VS_TV2

1

2

@C495

@

0.1U_0402_16V4Z

P

IE_WAKE#_R

C

C495

H=4mm

J

INI1

M

1

1 3 5 7 9

1

1 1

3 5

1 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

CONN@

2 4 6 8

1

0 2

1 1

4 6

1

3 5 7 9

1

1 3

1 1

5

LOTES_AAA-PCI-049- P06-A

3

2 4 6 8

0

1 1

2 4

1 1

6 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+

CC_SIM

V

B

DAT

_

B

CLK

_

B

RST

_

1 2

R

71 0_0402_5%@

4

PLT_A_RST#

PM_SMBCLK_TV PM_SMBDATA_TV

+

CC_SIM

V

R474 0_0402_5%@ R474 0_ 0402_5%@ R476 0_0402_5%@ R476 0_ 0402_5%@

1 2 1 2

USB20_N10 [16] USB20_P10 [16]

+

VS

3

+

.5VS

1

+

VS

3

PLT_A_RST# [15,36,39]

PM_SMBCLK [ 10,11,13,5]

PM_SMBDATA [10, 11,13,5]

5

+

VS

v0.3 update

2

3

VS

+

120mil 40mil

1

TV@

C

88

4

4.7U_0805_10V4Z

TV@

2

A_63V_0437002.W R_1206

TV@

C

2

0.1U_0402_16V4Z

1

F

21

JBCAS1

GND GND

ACES_85201-1005N

CONN@

89

4

10

1 2 3 4 5 6 7 8 9

+VCC_SIM

1 2 3 4 5 6 7 8 9 10 11 12

TV@

C

90

4

0.1U_0402_16V4Z

V

CC_SIM

+

1

C493

C493 330P_0402_50V7K

330P_0402_50V7K

2

TV@

DET1 B_DETECT_R

B_DAT B_CLK

B_RST

+VCC_SIM

Smart Card Conn.(B-CAS)

1

+

TV@

C

91

4

4.7U_0805_10V4Z

+VCC_SIM

1

TV@

C496

0.1U_0402_16V4Z

2

.5VS

1

TV@

C

92

4

2

4

0.1U_0402_16V4Z

+3VALW_M INI

WLAN & Bluetooth Combo Card

Mini Card Slot 2--- WLAN Current: 3.3 : 750mA,

4.7U_0603_6.3V6K

2 4 6 8

10

R482 0_0402_5%@R482 0_0402_5%@

+3VALW_M INI

1 2

R507 0_04 02_5%@ R507 0_0402_5%@

1 2

1K_0402_5%

v1.0 update

C2157

0.1U_0402_16V7K

1 2

R481

@ R 481

@

0_0402_5%

1 2

R489

H=4mm

JMINI2

1

3

5

7

9

9 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

LOTES_AAA-PCI-049- P06-A

CONN@

Short J4

J4 JUMP _43X79@ J4 JUMP_43 X79@

2

112

Q20

@

Q20

@

D

S

D

+3VALW_PC H +3VALW_M INI

+5VALW

R483

@R483

@

100K_0402_5%

B B

100K_0402_5%

WL_PW RON[43]

2

G

R484 200K_0402_5%

200K_0402_5%

1 2

13

D

Q21

2N7002K_SOT23-3

S

G

2

@R484

@

1

0.1U_0402_16V4Z

@

2

Add power on/off for support wake on WLAN in S3 & S4 & S5

A A

13

AO3413_SOT23-3

C503

@C503

@

80mil80mil

E51_TXD[43]

E51_RXD[43]

PCIE_PTX_C_W LANRX_N3[16] PCIE_PTX_C_W LANRX_P3[16]

PCIE_PRX_W LANTX_N3[16] PCIE_PRX_W LANTX_P3[ 16]

PCIE_WAK E#

BT_ON

CLKREQ_W LAN#[13]

CLK_WLAN #[13] CLK_WLAN[13]

E51TXD_P80DATA E51RXD_P80CLK

Debug card using

BT_ON[43]

C497

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

2

+3VALW_M INI

+1.5VS_MINI

R622 10K_0402 _5%@ R622 10K_0402_5%@

1 2

PLT_A_RST#

PM_SMBCLK_W L PM_SMBDATA_W L

WLAN_LED # BT_LED#

4

mil 20mil

0

C498

0.1U_0402_16V7K

WLAN_LED #

BT_LED#

1

C499

0.1U_0402_16V4Z

2

+3VALW_M INI

R510 0_0402_5%@ R510 0_0402_5%@

1 2

R485 0_0402_5%@ R485 0_0402_5%@ R486 0_0402_5%@ R486 0_0402_5%@

1 2 1 2

USB20_N4 [16] USB20_P4 [16]

WLAN_LED # [42] BT_LED# [ 42]

1 2

1

+

2

R487 10K_0402 _5%R487 10K_0402_5%

R488 10K_0402 _5%R488 10K_0402_5%

+1.5VS

C502

@+C502

@

68U_B2_6.3VM_R70M

WL_OFF#_E C [43]

PM_SMBCLK PM_SMBDATA

+3VALW_M INI

PLT_A_RST#

v0.3 update

R480

R480 0_0603_5%@

0_0603_5%@

1 2

@C500

@

0.1U_0402_16V4Z

@ESD@

1 2

C2153 0.1U_0402_16V4Z

+1.5VS_MINI

C500

1

2

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

Title

PCIe-WLAN/TV_B-CAS

Size D ocument Number Rev

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PCIe-WLAN/TV_B-CAS

ZEA00 LA-A061P M/B

Tuesday, September 24, 2013

1

40 59

0.3

5

WWW.AliSaler.Com

TPM(Reserve)

+

VS

3

2

mils

0

1

TPM@

129

2

SERIRQ[13,43]

LPC_AD0[13,43] LPC_AD1[13,43] LPC_FRAME#[13,43] LPC_AD2[13,43] LPC_AD3[13,43]

R673 33_0402_5%TPM@ R673 33_0402_5%TPM@

2

1 2

R674 0_04 02_5%@ R674 0_0402_5%@

0.1U_0402_16V4Z

TPM@

C

130

2

10U_0603_6.3V6M

2

C2133

@ C 2133

@

SERIRQ LPC_AD0 LPC_AD1 LPC_FRAME# LPC_AD2 LPC_AD3

TPM@

C

0.1U_0402_16V4Z

D D

C C

0.1U_0402_16V4Z

CLK_PCI_EC[13,43]

PLT_RST#[15,21,43]

WebCam+Digital Mic

Co-lay Nuvton_NPCT421LA0WX

7

5

TPM@

5

TPM@

U

24

P

S

V

10

V

S

P

28

LPCPD#

27

SERIRQ

26

LAD0

23

LAD1

22

LFRAME#

20

LAD2

17

LAD3

25

NC

21

LCLK

+3VS

19 15

16

ST33ZP24AR28PVSP_TSSO P28

1

2

+3VS

NC NC

LRESET#

30 mils 30 mils

2A_63V_0437002.W R_1206

v0.3 update

L32

EMI@L32

EMI@

USB20_P11[16]

USB20_N11[16]

B B

4

1

MURAT_DLW 21SN900HQ2L_0805

3

2

30 mils

2

Touch

500mA

+5VS_TOUCH

TOUCH@

F3 2A_63V_0437002.W R_1206

mils

C513 0. 1U_0402_16V4Z

1 2

30

TOUCH@ 1 2 3 4 5 6 7

TOUCH@

USB20_N5_R USB20_P5_R

5

JTCH1

A A

1 2 3 4

5 GND GND

ACES_87212-05G0

CONN@

+5VS

21

L33

TOUCH@L33

TOUCH@

4

1

MURAT_DLW 21SN900HQ2L_0805

EMI Reauest

3

2

USB20_N5_R

USB20_P5_R

v0.3 update

3

2

@EMI@

D28

2

3

PESD5VOU2BT_SOT23- 3

USB20_N5 [16] USB20_P5 [16]

1

INT_DMIC_DATA[ 37]

INT_DMIC_CLK[37]

C

N N

C C

N

PP

NC

VNC

GND GND GND

NC

VNC

NC NC NC

F2

21

+CAM_PWR

4

1 2 3 7

6 9

4 11 18

5 8 12 13 14

0.1U_0402_16V4Z

4

TPM@

C2131

500mA

+CAM_PWR

1

C504

10U_0603_6.3V6M

2

USB20_P11_R USB20_N11_R +CAM_PW R

2

1

TPM@

2

C2132

C2132 10U_0603_6.3V6M

10U_0603_6.3V6M

1 2 3 4 5 6 7 8

3

D15

D15 PESD5V0U2BT_SOT23-3

PESD5V0U2BT_SOT23-3

ESD@

1

+3VSB

JCAM1

9

1

GND 2 3 4 5 6 7

10

8

GND

ACES_87213-0800G

CONN@

3

Screw Hole

1

H

_4P6X4P2

@

1

H

5

1

H_2P9

@

1

8

H

_4P4

@

1

H13

H_3P3

@

1

H

6

7

1

H_2P9

@

1

9

0

H

_4P4

@

1

H20

H_3P3

@

1

H_2P9

@

H_4P4

@

2

H

8

1

H_2P9

@

1

FD1@FD1

FD2@FD2

@

1

H

_4P2

@

1

FD3@FD3

@

1

2

7

6

5

1

2

1

4

H

_4P2

@

H_6P4

@

H_12P0

@

H_1P5N

@

6

H

1

H

2

1

H

9

1

H28

1

H

_4P2

@

H_6P4

@

H_12P0

@

H_1P5N

@

H

@

1

H

3

2

H_6P4

@

1

4

H

_4P2

@

1

H

H27

FD4@FD4

1

CRT Conn(Reserve 15pin)

CRT@

1 2

L29 NBQ100505T-800Y_0402

PCH_CRT_R[15]

PCH_CRT_G[15]

PCH_CRT_B[15]

150_0804_8P4R_1%

CRT@

RP16

182736

45

2.2P_0402_50V8C

CRT@

C505

1

2

Need PU/PL on PCH/FCH side (2.2K*2pcs for DDC & 150_8P4R*1pcs for RGB)

C511

@C511

@

0.1U_0402_16V4Z

1 2

+HDMI_EDID_5V

+5VS

+3VS

PCH_CRT_DATA[15]

PCH_CRT_CLK[15]

PCH_CRT_VSYNC[15]

PCH_CRT_HSYNC[15]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

U30

1

VCC_SYNC

2

VCC_VIDEO

7

VCC_DDC

10

DDC_IN1

11

DDC_IN2

13

SYNC_IN1

15

SYNC_IN2

6

GND

TPD7S019-15DBQR_SSO P16

L29 NBQ100505T-800Y_0402

CRT@

1 2

L30 NBQ100505T-800Y_0402

CRT@

1 2

L31 NBQ100505T-800Y_0402

1

CRT@

C507

C506

2.2P_0402_50V8C

2

2.2P_0402_50V8C

CRT@U30

CRT@

2

BYP

VIDEO1

VIDEO2

VIDEO3

DDC_OUT1

DDC_OUT2

SYNC_OUT1

SYNC_OUT2

8

3

4

5

9

12

14

16

1

CRT@

C509

2

2.2P_0402_50V8C

4.7K_0402_5%

CRT@

1 2

CRT@

1 2

PCH heat sink

J

1

P

1

2

HOMET_PH02Z22BJZ 202

CONN@

J

2

P

1

2

HOMET_PH02Z22BJZ 202

CONN@

PCB@ZZZ1

PCB@

CRT_R_L

CRT_G_L

CRT_B_L

JCRT1

1

2

3

4

5

6

7

G2

8

G1

9

10

11

12

13

14

ACES_87212-14G0

CONN@

+HDMI_EDID_5V

R494

4.7K_0402_5%

CRT@

1 2

VSYNC

HSYNC

41 59

ZZZ2

PCB LA-A061P

16 15

CRT_DDC_DAT

CRT_DDC_CLK

ZZZ1

PCB LA-A061P

1

CRT@

C510

2.2P_0402_50V8C

2

R493

CRT@

22_0402_5%

1

2

6

H

_4P2

H_4P2

@

1

H

4

1

H_6P4

@

1

H

5

2

H_3P5

@

1

H22

H21

1

2.2P_0402_50V8C

CRT@

CRT@ 1 2

C512 0.22U _0402_16V7K

Title

Size Document Number Rev

Date: Sheet of

H_7P0N

@

1

CRT@

C508

2

CRT_R_L CRT_G_L CRT_B_L HSYNC VSYNC CRT_DDC_CLK CRT_DDC_DAT

+HDMI_EDID_5V

CRT_R_L

CRT_G_L

CRT_B_L

R496

VSYNC_R

R497

HSYNC_R

PWR/Cap./TP/LED/LP/LS/Screw

ZEA00 LA-A061P M/B

Tuesday, September 24, 2013

DAZ@ZZZ2

DAZ@

0.3

A

WWW.AliSaler.Com

Power/B & SW/B Connector

P

R_ON_LED#

W

13

D

1 1

P

R_ON_LED[43]

W

R

@

8.2K_0402_5%

2

Q

6

G

12

67

5

SSM3K7002FU_SC70-3

S

B

C

R_IN[43]

I

B

_LED#[40]

T A

TA_LED#[ 12]

S

L

AN_LED#[40]

W

+

VS

5

v0.3 update

+

VSB

3

C

_SW_AD1[43]

E

F

C B S W

4

5

O E

I

R_IN

_LED#

T

TA_LED#

A

AN_LED#

L

/OFFBTN#

N

_SW_AD1

C

21

+

VS_SB

5

2A_63V_0437002.W R_1206

21

+

VSB_SB

3

2A_63V_0437002.W R_1206

C

8Pin sub-board Conncetor

J

WR1

P

1

2

3

4

5

6

7

8

9

1

0

1

ACES_87212-10G0

CONN@

Pin1~7: LED Board

Pin6~10:

11

G

1

1 1

2

G

Switch Board&

12

Power Button Board

D

E

v1.0 update

SW1

@SW 1

@

1

2

6

3

4

SMT1-05-A_4P

5

ON/OFFBTN#

D2

1

BAV70W_S OT323-3

2

ON/OFF_R#

3

1 2

R360

@R360

@

0_0402_5%

1

C382

C382 100P_0402_50V8J

100P_0402_50V8J

2

ON/OFF# [43]

C38 common SPEC request

TOP side For debug (Unpop after MP)

13

D

2 2

+5VS_SB +3VSB_SB

CIR_IN BT_LED# SATA_LED#

WLAN_LED # PWR_O N_LED# ON/OFFBTN# EC_SW_A D1

1 2

C2144 0 .1U_0402_16V4ZEMI@ C 2144 0.1U_0402_16V4ZE MI@

1 2

C2145 4 70P_0402_50V7KEMI@ C2145 470P_0402_50V7KEMI@

1 2

C2146 3 30P_0402_50V7KEMI@ C2146 330P_0402_50V7KEMI@

1 2

C2147 3 30P_0402_50V7KEMI@ C2147 330P_0402_50V7KEMI@

1 2

C2148 3 30P_0402_50V7KEMI@ C2148 330P_0402_50V7KEMI@

1 2

C2149 4 70P_0402_50V7KEMI@ C2149 470P_0402_50V7KEMI@

1 2

C2150 4 70P_0402_50V7KEMI@ C2150 470P_0402_50V7KEMI@

1 2

C2151 4 70P_0402_50V7KEMI@ C2151 470P_0402_50V7KEMI@

1 2

C2152 4 70P_0402_50V7KEMI@ C2152 470P_0402_50V7KEMI@

EC_ON[43]

EC_ON

PSU@

R657

10K_0402_5%

2

PSU@

Q64

G

12

SSM3K7002FU_SC70-3

S

PS_ON# [46]

v1.0 update

3 3

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Sub-board Connector

ZEA00 LA-A061P M/B

42 59Tuesday, September 24, 2013

E

0.3

A

WWW.AliSaler.Com

+

VALW_EC

l

ace closely pin 12

P

L

K_PCI_EC

C

10_0402_5%

6.8P_0402_50V8C

1 1

PLT_RST#

0.1U_0402_16V4Z

For EMC

5

R

EMI@

C

5

EMI@

C546

EMI@

12

41

45

Place closely pin 13

3

1 2

C

44 0.1U_040 2_16V4Z

5

EMI@

1

2

1

2

ESD request close to KB9012 pin1

E

E(Internal PU) to aviod test mode

M

+

VALW_EC

3

1 2

R543 47K_0402 _5%R543 47K_0402_5%

1 2

R545 47K_0402 _5%R545 47K_0402_5%

C2137 0.1U_0402_16V4Z@ESD@ C2137 0.1U_0402_16V4Z@ESD@

1 2

C2138 0.1U_0402_16V4Z@ESD@ C2138 0.1U_0402_16V4Z@ESD@

1 2

C2139 0.1U_0402_16V4Z@ESD@ C2139 0.1U_0402_16V4Z@ESD@

1 2

C2140 0.1U_0402_16V4Z@ESD@ C2140 0.1U_0402_16V4Z@ESD@

1 2

5

394.7K_0402_5%

R

G

KSO1

KSO2

CIR_IN

PWR_O N_LED

EC_SW_A D1

ON/OFF#

A

TEA20

S

K

I7

+3VALW_EC

3

VSB

+

R544

R544 47K_0402_5%

47K_0402_5%

C547

0.1U_0402_16V4Z

v0.2 update for ESD

+3VS

1 2

R549 2.2K_0402_5%R549 2.2K_0402_5%

1 2

R550 2.2K_0402_5%R550 2.2K_0402_5%

+3VALW_EC

2 2

+3VALW_EC

v0.2 update

1 2

R551 2.2K_0402_5%R551 2.2K_0402_5%

1 2

R553 2.2K_0402_5%R553 2.2K_0402_5%

1 2

R554 4.7K_0402_5%R554 4.7K_0402_5%

1 2

R664 4.7K_0402_5%R664 4.7K_0402_5%

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

EC_CRISIS PIDRST

v0.2 update

EC DEBUG port

Reserve R2009 for EC debug.

3 3

R556

1 2

100K_0603_5%

E51_TXD

DGPU_HOLD_RST#[15,21]

S_ENVDD[29,32]

DGPU_PW R_EN[15,23]

R557 0_0402_5%@R557 0_0402_5%@

PSU_PG#

R559 0_0402_5%@R559 0_0402_5%@

R560 0_0402_5%@R560 0_0402_5%@

EC DEBUG CONNECTOR

JECDB1

KSO3 KSI6 KSI7 KSI4 KSI5

Reset converter board panel ID

4 4

1

2

3

4

5

6

6 GND GND

E-T_6905-E06N-00R

CONN@

Pitch 1.0mm Hight 1.9mm

7 8

JPIDRST@JPIDRST

1 2

PIDRST

@

R

38

@

38

@

5

1 2

0_0603_5%

C

1 2

PCH_EDP_BLEN[4 4,47]

CODEC_PW REN[37]

1 2

PM_PWR OK[14,9]

CODEC_MUTE#[37]

1 2

B

A

TEA20[17] _RST#[17]

B

1

2

1

C538

C537

1000P_0402_50V7K

AMP_PD# EC_CRISIS KSI4 KSI5 KSI6 KSI7 EC_CRISIS_KSO0 KSO1 KSO2 KSO3

PCH_EDP_BLEN EC_ENVDD 35V_PG CODEC_PW REN

H_PROCHOT#_EC PIDRST

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# DGPU_HOLD_EC#

PSU_PG# SUSWA RN# INVT_PWM FAN_SPEED S_ENVDD_R E51_TXD E51_RXD

MUTE_CODEC DGPU_PW R_EC

C540

2

0.1U_0402_16V4Z

1000P_0402_50V7K

G

TEA20

A

K

_RST#

B SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# ECRST# EC_SCI#

T128PAD @T128PAD@

PM_PWR OK EC_ON

CRY1

R561 100K _0402_5%R561 100K _0402_5%

1 2

C550

C550 20P_0402_50V8

20P_0402_50V8

1

C541

2

0.1U_0402_16V4Z

1

G

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

1

5

36

10U_0603_6.3V6M

2

G K SERIRQ[13,41] LPC_FRAME#[13,41] LPC_AD3[13,41] LPC_AD2[13,41] LPC_AD1[13,41] LPC_AD0[13,41]

CLK_PCI_EC[13,41] PLT_RST#[15,21,41]

EC_SCI#[17]

AMP_PD#[38]

EC_ENVDD[32]

35V_PG[44,47]

EC_SMB_CK1[29,32] EC_SMB_DA1[29,32] EC_SMB_CK2[13,21,46] EC_SMB_DA2[13,21,46]

PM_SLP_S3#[14] PM_SLP_S5#[14] EC_SMI#[17]

SUSWA RN#[14] INVT_PWM[32] FAN_SPEED[35]

E51_TXD[40] E51_RXD[40]

Modify from VBA00

VR_HOT#[50]

From power CPU_CORE

+

VALW_EC

3

1

C542

2

0.1U_0402_16V4Z

3

5

U

A

TEA20/GPIO00

LPC & MISC

H_PROCHOT#_EC

C

C543

0.1U_0402_16V4Z

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

1 2

0_0402_5%

L

2

4

FCM1608KF-800T07_0603

1 2

9

22

33

96

111

EC_VDD0

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GND/GND

11

24

35

94

R563

@

2

G

E

C_AVCC

+

1

C

39

5

0.1U_0402_16V4Z

2

E

AGND

C

67

125

P

G

EC_VDD/VCC

CPU1.5V_S3_GATE/GPXIOA00

H_PROCHOT#_EC/GPXIOA06

GND0

113

13

D

S

BEEP#/GPIO10

EC_VDD/AVCC

ACOFF/GPIO13

BATT_TEMP/GPIO38

ADP_I/GPIO3A

IMON/GPIO43

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

SYSON/GPIO56

VR_ON/GPIO57

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF-A4_LQFP128_14X1 4

69

1 2

ECAGND

Q25

2N7002K_SOT23-3

1

2

GPIO12

GPIO39

GPIO3B

GPIO42

L43

L43 FCM1608KF-800T07_0603

FCM1608KF-800T07_0603

C551

C551 47P_0402_50V8J

47P_0402_50V8J

IO0F

V18R

+

E

C_AVCC

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

E

_BEEP#

C

FAN_PW M

PSU_DET_AD EC_SW_A D1

AD_BID

HP_DET#

EAPD_CODEC EC_3V5V_EN

VGATE_R

WL_PW RON

PWRM E_CTRL#

PCH_SPISO_EC PCH_SPISI_EC PCH_SPICLK_EC PCH_SPICS#_EC

CIR_IN USB_ILIM_SEL WOL_EN # S_BKOFF#_R BT_ON PWR_O N_LED SYSON# SYSON VR_ON PM_SLP_S4#

PCH_RSMRST# USB_CHRMODE2 VCIN1_PH USB_CHR_EN USB_CHRMODE1 BKOFF# PBTN_OUT# PCH_PW R_EN USB_CHRMODE3

ON/OFF#

SUSP# WL_OFF#_E C EC_PECI_9012

+EC_V18R

C549

4.7U_0603_6.3V6K

H_PROCHOT# [5]

R552 0_0402_5%@ R552 0_0402_5%@

1 2

D

E

_BEEP# [37]

C

FAN_PW M [35]

PSU_DET_AD [ 46] EC_SW_A D1 [42]

HP_DET# [37]

EAPD_CODEC [37]

VGATE

1 2

R644 0_0402_5%@ R644 0_0402_5%@

1 2

R645 0_0402_5%@ R645 0_0402_5%@

1 2

R646 0_0402_5%@ R646 0_0402_5%@

1 2

R647 0_0402_5%@ R647 0_0402_5%@

v0.2 update

EC_3V5V_EN [47]

VGATE [14,5,50]

WL_PW RON [ 40]

PWRM E_CTRL# [12]

CIR_IN [42]

USB_ILIM_SEL [33 ]

WOL_EN # [39]

BT_ON [40] PWR_O N_LED [42] SYSON# [33,34, 44] SYSON [48] VR_ON [50] PM_SLP_S4# [ 14]

PCH_RSMRST# [14] USB_CHRMODE2 [ 33]

USB_CHR_EN [33 ] USB_CHRMODE1 [ 33] BKOFF# [32] PBTN_OUT# [14,5]

USB_CHRMODE3 [ 33]

ON/OFF# [ 42]

SUSP# [44,45,48,49]

WL_OFF#_E C [ 40]

H_PECI [17,5]

SYSON

SUSP#

VR_ON

PCH_SPISO [13] PCH_SPISI [13] PCH_SPICLK [13] PCH_SPICS# [13]

1 2

R555 0_04 02_5%@ R555 0_0402_5%@

v0.2 update

PCH_PW R_EN [44]

EC_ON [42]

VCIN1_PH

WOL_EN #

ON/OFF#

CIR_IN

E

+

VALW_EC

3

12

Ra

A

_BID

D

12

Rb

1 2

R546 4.7K_0402_5%R546 4. 7K_0402_5%

1 2

R547 10K_0402_5%R547 10K_0402_5%

1 2

R548 10K_0402_5%R548 10K_0402_5%

VR_ON

ESD request Close to EC

V0.3 update for sequence EA

H_PECI

PCH_RSMRST#

ESD request Close to EC

1 2

C548 0.1U _0402_16V4Z@EM I@ C548 0.1U_0402_16V4Z@EMI@

S_BKOFF# [29,32]

NOTE: Strap Pin-->Pull high P109=VCIN0_PH P102=VCIN1_PH P103=VCOUT1 P104=VCOUT0_PH

1 2

C2126 5P_0402_50V@ESD@ C2126 5P_0402_50V@ESD@

1 2

C2127 5P_0402_50V@ESD@ C2127 5P_0402_50V@ESD@

1 2

R

40

5

100K_0402_5%

R

42

5

56K_0402_5%

+3VALW_EC

R5644.7K_0402_5% R5644.7K_0402_5 %

R565100K_0402_5% R565100K_0402_5%

R5664.7K_0402_5% R5664.7K_0402_5 %

R67110K_0402_5% R67110K_0402_5%

AC in-->One touch -->Power button--> Clear CMOS Always short-->AC in-->Power button--> Crisis

JCOMS2@JCOMS2

EC_CRISIS EC_CRISIS_KSO0

1 2

@

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

EC KB930/KB conn

ZEA00 LA-A061P M/B

E

43 59Tuesday, September 24, 2013

0.3

A

WWW.AliSaler.Com

B

C

D

E

+3VALW TO +3VS +5VALW TO +5VS

+

VALW

3

C

71

@

71

@

5

1U_0603_10V6K

R

87

5

0_0402_5%

1 2

@

1 1

S

SP#

U

@

R

89

5

0_0402_5%

1 2

@

5

73

@

73

@

C

0.01U_0402_25V7K

1 2

C579

@C579

@

0.022U_0402_25V7K

1 2

3

5

+5VALW

C584

@ C584

@

1U_0603_10V6K

V

S_ON

U

3

1

V

2

V

3

O

4

V

5

O

6

VIN2

7

VIN2

1

TPS22966DPUR_SON14_2X 3

2

8

V

N1

O

I

O

I

N1

V

N

1

B

IAS

G

N

2

VOUT2 VOUT2

GPAD

Vgs=10V,Id=9A,Rds=18.5mohm

14

UT1

13

UT1

C

T

1

N

D

T

2

12

11

10

9 8

15

C

5

78 1000P_0402_50 V7K

C

5

75 1000P_0 402_50V7K

1 2

+

VS_LS

3

5

VS_LS

+

@

J

6

1 2

UMP_43X118

J

0.1U_0402_16V7K

@

J

7

1 2

UMP_43X118

J

0.1U_0402_16V7K

C

C582

+

VS

3

1

5

74

2

+

1

2

C

72

@

72

@

5

4.7U_0603_10V6K

2

VS

5

1

C583

@C583

@

4.7U_0603_10V6K

2

PCH_PW R_EN[43]

+3VALW TO +3VALW_PCH

+

VSB

@

1 2

1U_0603_10V6K

R591

100K_0402_5%

2

G

3

5

80

C

W=160mils W=160mils

V

L

12

v0.3 update

R672

1 2

13

D

100K_0402_5%

Q63

SSM3K7002FU_SC70-3

S

6

5

Q

AO3415L_SOT23-3

S

G

2

1

C589

0.1U_0402_16V4Z

2

D

13

4.7U_0603_10V6K

+

VALW_PC H

3

1

5

2

5

77

@

77

@

C

0.1U_0402_16V4Z

2

5

76

@

76

@

C

+1.5V to +1.5VS

+1.5V

C586

4.7U_0603_10V6K

2 2

4.7U_0603_10V6K

5

SUSP

Q30B

2N7002KDW H_SOT363-6

Q30B

+12VS

12

34

1

2

R595

R595 1K_0402_5%

1K_0402_5%

Q29

Q29 AO4354_SO8

AO4354_SO8

8 7 6 5

12

R597

330K_0402_5%

4

1.5VS_GATE

+1.5VS

1 2 3

1

C588

0.022U_0402_25V7K

2

9.6A

1

C587

4.7U_0603_10V6K

2

1

C585

1U_0402_6.3V6K

2

Q30A

2N7002KDW H_SOT363-6

Q30A

12

R592

R592 470_0805_5%

470_0805_5%

61

2

SUSP

@ESD@

+3VALW_PC H

1 2

C2156 0.1U_0402_16V4Z

v0.3 update

+5VALW

R596

R596 100K_0402_5%

100K_0402_5%

1 2

SUSP

3

Q31B

5

SUSP#[43,45,48,49]

SUSP#

4

2N7002KDW H_SOT363-6

Discharge circuit

3 3

12

R599

R599 470_0805_5%

470_0805_5%

Q32

13

D

SSM3K7002BF 1N SC59 -3

2

G

S

4 4

SSM3K7002BF 1N SC59 -3

35V_PG[43,47]

+0.75VS +1.5V

12

R600

R600 22_0805_5%

22_0805_5%

Q33

13

D

SSM3K7002BF 1N SC59 -3

2

G

S

+12VS

B+

12

R604

R604 330K_0402_5%

330K_0402_5%

2

G

Q37

2

G

Add +12VALW discharge circuit for prevent DC plug in leakage 5/5.

A

G

13

D

S

+1.05VS_VCCIO+1.05VS_VPCH

12

R603

100_0805_5%

Q36

13

D

SSM3K7002BF 1N SC59 -3

S

12

R601

R601 470_0805_5%

470_0805_5%

Q34

13

D

SSM3K7002BF 1N SC59 -3

2

G

S

12

R602

R602 470_0805_5%

470_0805_5%

Q35

13

D

SSM3K7002BF 1N SC59 -3

2

SYSON#SUSPSU SPSUSP

G

S

B

SYSON# [33,34, 43]

+12VS_PSU

DMN66D0LDW -7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

C

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

R651

20K_0402_5%

PSU@

SUSP#

+12VS_PSU

12

2

Q60A

PSU@

U74

1 2 3 4

AO4435_SO8

61

D

S S S G

20K_0402_5%

PSU@U74

PSU@

D D D D

R652

PSU@

8 7 6 5

12

+12VS

1

C2078

1U_0603_25V6

1

C2079

0.1U_0603_25V7K

2

PSU@

2

PSU@

Title

Size Document Number Rev

Tuesday, September 24, 2013

Date: Sheet of

R650

R650 470_0603_5%

470_0603_5%

PSU@

1 2

34

5

SUSP

Q60B

Q60B DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

PSU@

Compal Electronics, Inc.

DC-DC INTERFACE

ZEA00 LA-A061P M/B

E

44 59

0.3

+12V1 TO +12VS (Reserve for PSU)

5

WWW.AliSaler.Com

D D

ADA@

PC1

0.1U_0603_25V7K

ADA@

PJ1

@PJ1

@

2

B+

C C

112

JUMP_43X118

ADA@

12

PC3

0.1U_0603_25V7K

ADA@

12

PC4

PC5

10U_0805_25V6K

FDS6690AS_NL_SO8

Vo=0.8(1+Rt/Rb)=12V

Power dissapation: 0.06W

B B

12

BOOT_12V_1

4

ADA@

PR1

PR1 0_0603_5%

0_0603_5%

1 2

12V_LG

Power dissapation: 0.577W

578

PQ1

ADA@

3 6

241

ADA@

PU1

PU1 RT8298A_SO8

RT8298A_SO8

2

BOOT

8

+12V_B+

12V_LX

4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%

12

PR102

EMI@ PR102

EMI@

4.7_1206_5%

12

PC155

EMI@ P C155

EMI@

680P_0603_50V7K

VIN

1

SW

4

BG

9

ADA@

PL1

1 2

VFB=0.8V

GND

VCC

GND

ADA@

3

ADA@

PC2

1U_0603_25V6K

1 2

12V_VCC

12V_FB

PR3

ADA@

PR5

ADA@

PC7

22U_1206_16V6-M

ATX12V1_1 +12VS_PSU

EN_12V

ADA@

12

ADA@

1 2

12

PR4

14K_0402_1%

ADA@

12

PC8

22U_1206_16V6-M

+12VSP +12VS

PC9

@

12

22U_1206_16V6-M

PJ2

@PJ2

@

2

JUMP_43X118

PJ12

2

JUMP_43X118

EN

FB

3

5

7

6

60.4K_0402_1%

1K_0402_1%

12

PC6

PC10

330P_0402_50V7K

112

PR2 0_0402_5%PR2 0_0402_5%

1 2

470P_0402_50V7K

PSU@

+12VSP

SUSP# [43,44,48,49]

2

1

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/04/27 2013/04/27

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR- 12VSP

VBA11 LA-A111 M/B

1

0.1

45 56Tuesday, September 24, 2013

0.1

A

WWW.AliSaler.Com

T

X12V1_1

A

P

2

EMI@

2

EMI@

L

HCB2012KF-121T50_0805

A

X12V1

+5VALW

12

147

147 PC

PC

68P_0402_50V8J

@RF@

3

T

E

I@

M

12

PC11

1000P_0402_50V7K

PSU_DET_AD [ 43]

12

PC149

PC145

0.1U_0402_25V6K

0.1U_0402_25V6K 2200P_0402_50V7K

2200P_0402_50V7K

@EMI@ PC149

@EMI@

@EMI@ PC145

@EMI@

EN_3VSB

20K_0402_1%

PSU@

E

@

I@

MI@

I@

PC156

22U_0805_25V6M

12

PR109

MI@

M

E

12

PC157

PC158

22U_1206_25VA

22U_0805_25V6M

11 10

12

PC151

PSU@

22U_0805_6.3VAM

12

PC148

PC148 1U_0402_6.3V6K

1U_0402_6.3V6K

PSU@

9

8

7

6

P

P101

J

7

G

D

N

6

G

D

N

5

G

OUND

R

4

O

WER

P

3

D

TECT

E

1 1

+5VSB

2 2

1K_0402_1%

O

WER

P R

OUND

G

LOTES_AJAK0031-P002A

3

VSB

+

12

118

118 PR

PR

ADA@

750_0402_1%

12

153

ADA@

PC

.1U_0402_16V7K

@

2

JUMP_43X79

@

2

JUMP_43X79

PR119

PSU@

1 2

PSU@

12

154

154 PC

PC

0.1U_0402_25V6K

2 1

PJ104

ADA@

112

PJ101

PSU@

112

PSU@

1 2

PR107

10K_0402_1%

PU101

VDD1RESET#

PSU@

D

GN

2

S IC RT9818A-44GU3

1 2

EMI@

HCB2012KF-121T50_0805

1 2

@

MI@

E

12

PC164

12

22U_1206_25VA

PSU@

RT8061AZQW_WDFN10_3X3

PU102

TP

NC

PVIN

LX

PVIN

LX

SVIN

PGOOD

NC

FB

EN

P

3

L

EMI@

P

16

C

100P_0402_50V8J

1

2

3

4

5

12

LX_3VSB

E

I@

M

100P_0402_50V8J

12

PC17

+3VSBP

PC12

EMI@ PC12

EMI@

1000P_0402_50V7K

+3VSB

@

1

1U_0402_16V7K

2

0.

@

PL4

1 2

BLM15BD121SN1D_2P

@

PL5

1 2

BLM15BD121SN1D_2P

PC19

1

@

2

0.1U_0402_16V7K

+3VS

@

PU2

1

VIN+

2

VIN-

3

GND

4

VS

HPA00900AIDCNR_SOT23-8

8

VIN_A1

A1

7

VIN_A0

A0

6

EC_SMB_DA2

SDA

5

EC_SMB_CK2

SCL

PR9

0_0402_5%

12

VIN+

3 3

PC18

@

VIN-

B

AO4407AL_SO8

1 2 3 6

12

PR7

PC13

ADA@

200K_0402_1%

.1U_0603_25V7K

ADA@ PC13

ADA@

P2-1

12

PR8

ADA@

150K_0402_1%

PSU@

PL103

1UH_FDSD0630-H-1R0M-P3_11A_20%

1 2

12

PR105

@EMI@

4.7_0603_5%

@EMI@

PC150

680P_0603_50V7K

PR106

60.4K_0402_1%

PSU@

FB_3VSB

PR108

13.3K_0402_1%

PSU@

@

PJ102

112

JUMP_43X79

@

PJ103

112

JUMP_43X79

EC_SMB_DA1 [13,21,43]

EC_SMB_CK1 [13,21,43]

ADA@

P

2

Q

4

12

2

ADA@

2

PC146

68P_0402_50V8J

8 7

5

12

PSU@

+3VSB

+3VALW

C

J

3

P

2

112

JUMP_43X118@

P

6

@

6

@

R

1

4

3

2

I

N+

V

0.01_2512_1%

PC14

.1U_0603_25V7K

ADA@ PC14

ADA@

PSU@

12

PC144

22U_0805_6.3VAM

I

N-

V

1

2

+3VSBP

PC152

22U_0805_6.3VAM

@

+

E

PC165

MI@

220U_25V_M

PS_ON#_1

EMI reserve

@

MI@

E

12

PC159

22U_1206_25VA

ATX12V1

PSU@

PR101

PR101 0_0402_5%

0_0402_5%

1 2

@

MI@

E

22U_1206_25VA

@

PJ10

2

JUMP_43X118

@

PJ11

2

JUMP_43X118

PC160

E

I@

M

12

PC161

22U_0805_25V6M

PSU@

112

ADA@

112

PJP102

3

4

3

4

2

112

LOTES_APOW0009-P001C

PR104

@ PR104

@

10K_0402_1%

1 2

I@

22U_0805_25V6M

@

@ 12

PC162

+5VSB

B

MI@

E

PC163

10U_0805_25V6K

B+ATX12V1_1

B++12V2

PS_ON# [43]

+

12

PC15

ADA@

0.1U_0603_25V7K

+

TCBATT

R

D

B

ATT1

J

1

+

CCM_060003HA002G202ZL

CONN@

2

-

+3VS

PR11

1 2

PR11 0_0402_5%

0_0402_5%

VIN_A0

PR13

PR13 0_0402_5%

0_0402_5%

@

PR10

PR10 0_0402_5%

0_0402_5%

@

1 2

VIN_A1

PR12

PR12 0_0402_5%

4 4

0_0402_5%

1 2

Current sense solution 2

Ventura for CPU side slave address : 1000001 please placemnet near R-sense

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2012/09/01 2012/11/12

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

PSU IN

46 56Tuesday, September 24, 2013

D

46 56Tuesday, September 24, 2013

0.1

A

WWW.AliSaler.Com

1 1

R

8127_12V

T

PL6

EMI@ PL6

B+

Rds(ON) :Max=16.5m-ohm Min=13.5m-ohm

2 2

EMI@

HCB1608KF-121T30_0603

EMI@ PL7

EMI@

HCB1608KF-121T30_0603

+5VALWP

Cap. ESR=17m

12

PL7

12

PC22

68P_0402_50V8J

@RF@ PC 22

@RF@

DCR=17m Ohm

ESR=17m Ohm

2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%

Power dissapation: 0.8047W

1

+

36

36 PC

PC

2

330U_6.3V_M

4.53K_0402_1%

1 2

0.047U_0402_25V7K

OCP Seting : 7.9A

12

PC23

0.1U_0402_25V6K

@EMI@ PC23

@EMI@

PL8

1 2

PR27

PC39

1 2

Power dissapation: 0.2553W

12

PC26

PC27

PR24

PC27

@

10U_0805_25V6K

PR25

4.7_1206_5%

1 2

@EMI@ PR25

@EMI@

PC40

@EMI@ PC40

@EMI@

680P_0603_50V7K

PC24

2200P_0402_50V7K

@EMI@ PC24

@EMI@

16K_0402_1%

Power dissapation: 0.2773W

PR31

PC44

200_0402_1%

1 2

200_0402_1%

PR36

6.04K_0402_1%

2200P_0402_50V7K

3 3

12

1 2

220P_0402_50V7K

PC48

1 2

1000P_0402_50V7K

PR38

1.15K_0402_1%

1 2

PC47

27K_0402_1%

PR35

12

+V_5VP Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A Fsw=300K, Iocp>=8.66A Rds H/S --> typ:24 mohm ; max: 30 mohm L/S --> typ: 13.5 mohm ; max: 16.5 mohm

B

12

5

PQ3

SIS412DN-T1-GE3_POWERPAK8-5

123

5

PQ6

123

SI7716ADN-T1-GE3_POWERPAK8-5

EC pin must set to Open Drain (EC GPIO spec is 5V/4mA) Initial EC pin: Low 3V/5V on : EC pin Open 3V/5V off : EC pin Low

PR100

4

1 2

0_0805_5%

4

EC_3V5V_EN[43]

5

VALWP

+

PC34

1 2

0.1U_0603_50V7K

0_0402_5%

1 2

BST_5V_1

2.2_0603_1%

PR39

PR21

COMP_5V

R

14

P

0_0402_5%

1 2

UG_5VUG_5V_1

BST_5V

LX_5V

LG_5V

CSP_5V

CSN_5V

PC41

1 2

0.1U_0402_25V6K

FB_5V

C

PC20

1 2

0.1U_0402_25V6K

1

2

3

4

5

6

7

PU3

UGATE2

BOOT2

PHASE2

LGATE2

PGND2

CSP2

CSN2

0.1U_0402_25V6K

29

GND

FB2

8

V

LDOBYP_35V

27

28

LDOBYP

VF=0.8V

COMP2

9

10

1 2

L

PR15

@

26

VCC

LDOEN

PGOOD11EN2/SS2

P

21

C

4.7U_0603_6.3V6K

12

0_0402_5%

12VLDOEN_35V

SKIP_35V

24

25

SKIP

12VLDOEN

LGATE1/RT

EN1/SS112COMP113FB114CSN1

V

VL

12

PR17

PR16

10K_0402_1%

0_0402_5%

LDOEN_35V

PC25

4.7U_0603_6.3V6K

12

+3VLP

23

12VLDO

22

VIN

21

UGATE1

20

BOOT1

19

PHASE1

18

17

PGND1

16

CSP1

RT8127GQW_WQFN28_4X4

15

CSN_3V

L

12

PR18

PR19

10K_0402_1%

12

PR20

26.1K_0402_1%

PR22

0.1U_0603_50V7K

2.2_0603_1%

1 2

BST_3V BST_3V_1

LG_3V

CSP_3V

35V_PG [43,44]

12

PC43

PR30

30K_0402_1%

+3VALWP

PR103

1 2

0_0402_5%

PSU@

3V5V_EN

12

PC50

@

0.1U_0402_25V6K

PC43

1 2

0.1U_0402_25V6K

FB_3V

COMP_3V

TON (1)SMPS1=300KHZ (+5VALWP) (2)SMPS2=300KHZ (+3VALWP)

D

Power dissapation: 0.1269W

RT8127_12V

PC33

PC33 1U_0603_25V6K

1U_0603_25V6K

12

1 2

PC35

PR112

PR112 0_0805_5%

0_0805_5%

1 2

LX_3V

12

PR29

1.8K_0402_1%

UG_3V_1UG_3V

SI7716ADN-T1-GE3_POWERPAK8-5

PQ4

5

4

SIS412DN-T1-GE3_POWERPAK8-5

123

PR26

12

5

PQ5

4.7_1206_5%

@EMI@ PR26

4

@EMI@

PC42

12

123

@EMI@ PC42

@EMI@

680P_0603_50V7K

Power dissapation: 0.1623W

PC45

1 2

220P_0402_50V7K

PR34

27K_0402_1%

12

1 2

1000P_0402_50V7K

+3VALWP

+5VALWP

E

R

8127_12V

T

12

PC29

PC28

@

10U_0805_25V6K

DCR=40m Ohm

4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%

Power dissapation:1.0542W

1 2

PR23

PR23 16K_0402_1%

16K_0402_1%

1 2

PL9

PR28

2.61K_0402_1%

1 2

PC38

1 2

0.047U_0402_25V7K

12

PC31

PC30

2200P_0402_50V7K

@EMI@ PC31

@EMI@

@EMI@ PC30

@EMI@

0.1U_0402_25V6K

ESR=17m Ohm

12

PC32

68P_0402_50V8J

@RF@

1

+

PC37

2

330U_6.3V_M

OCP Seting : 6.15A

PR32

PC46

PC46 2200P_0402_50V7K

2200P_0402_50V7K

12

1 2

PR33

6.2K_0402_1%

12

PC49

200_0402_1%

Cap. ESR=17m Rds(ON) :Max=16.5m-ohm

PR37

Min=13.5m-ohm

1.96K_0402_1%

1 2

PJ4

2

112

JUMP_43X118@

PJ5

2

112

JUMP_43X118@

+3VALW

+5VALW

+3VALWP

4 4

+V_3.3VP Ipeak=4.437A ; 1.2Ipeak=5.325A; Imax=3.106A Fsw=300K Iocp>=5.33A Rds H/S --> typ:24 mohm ; max: 30 mohm L/S --> typ: 13.5 mohm ; max: 16.5 mohm

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/09/01 2013/12/31

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PWR- 3VALWP/5VALWP

VCA00 LA-9792P M/B

47 56Tuesday, September 24, 2013

E

0.1

5

WWW.AliSaler.Com

4

3

2

1

0.75Volt +/- 5% TDC 0.525A

+

.5VIN

1

D D

+1.5VP

C C

P

10

EMI@

10

EMI@

L

1 2

HCB1608KF-121T30_0603

Power dissapation: 1.372W

12

PC51@RF@

68P_0402_50V8J

0.1U_0402_25V6K

PL11

2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%

1

+

PC61

2

330U_6.3V_M

PL11

12

DCR=17m Cap. ESR=17m

Rds(ON) :Max=16.5m-ohm Min=13.5m-ohm

Fsw=285K Ipeak=11A, Imax=7.7A, Iocp=1.2*Ipeak=13.2A Fsw= 285K Hz Iocp(set) =13.44A~20.49A Rds H/S --> typ:24 mohm ; max: 30 mohm L/S --> typ: 13.5 mohm ; max: 16.5 mohm

B B

+5VSB

1 2

PR308

PR308 100K_0402_1%

100K_0402_1%

PSU@

B+

578

Power dissapation: 0.1096W

1

5V_B+

.

12

PC53

PC54

PC55

PC52

2200P_0402_50V7K

@EMI@ PC53

@EMI@

@EMI@ PC52

@EMI@

SIS412DN-T1-GE3_POWERPAK8-5

12

PR42

4.7_1206_5%

SNUB_+1.5VP

12

PC64 680P_0603_50V7K

680P_0603_50V7K

@ PC54

@

10U_0805_25V6K

@EMI@PR42

@EMI@

@EMI@PC64

@EMI@

PQ7

PC55

10U_0805_25V6K

123

PC56

PR113

0_0805_5%

1 2

0.1U_0603_25V7K

+5VSB

5.1_0603_5%

1 2

1U_0603_10V6K

5

4

1 2

UG_1.5V_1

5

PQ8

4

SI7716ADN-T1-GE3_POWERPAK8-5

Power dissapation: 0.2484W

PR45

0_0402_5%

SYSON[43]

1 2

12

M

de Level +0.75VSP VTTREF_1.5V

o S5 L off off S3 L off on S0 H on on

Note: S3 - sleep ; S5 - power off

P

P 0_0603_5%

0_0603_5%

1 2

S

T_1.5V-1

B

S

LG_1.5V

OCP SET: 7.1A

PR43

12

PC63

PC65

@PC65

@

0.1U_0402_10V6K

40

R

U

_1.5V

G

W

_1.5V

10.2K_0402_1%

1U_0603_10V6K

EN_1.5V

PR41

1 2

PC60

1 2

VDD_1.5V

S

T_1.5V

B

CS_1.5V

+5VSB

1.5V_B+

SUSP#[43,44,45,49]

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR44

887K_0402_1%

1 2

Pin 19 is LDOVIN

18

17

16

PHASE

RT8207MZQW_W QFN20_3X3

PGOOD

10

PR46

0_0402_5%

19

BOOT

UGATE

VLDOIN

S5

S3

TON

9

8

7

TON_1.5V

12

EN_0.75VSP

12

20

PU4

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

PC66

@PC66

@

0.1U_0402_10V6K

21

1

2

3

4

VTTREF_1.5V

5

Pin 5 is FB

1

.5VP

+

+1.5VP

+0.75VSP

Peak Current 0.75A OCP Current 0.9A

12

PC58

PC57

10U_0805_6.3V6M

PJ6

2

112

JUMP_43X118@

PJ7

2

112

@

JUMP_43X79

@

12

PC59

12

+

.75VSP

0

10U_0805_6.3V6M

PC62

0.033U_0402_16V7K

+1.5V

+0.75VS

AO4407AL_SO8

AO4407AL_SO8 PQ303

PQ303

PSU@

3 6

241

B+ +1.5VIN

+1.5VIN

PD301 PSU@

SX34_SMA2

A A

SX34_SMA2

2 1

@

PJ13

2

JUMP_43X118

ADA@

112

+5VSB

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/09/01 2013/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

1.5VP

48 56Tuesday, September 24, 2013

1

0.1

5

WWW.AliSaler.Com

D D

OCP SET: 7.2A

PR48

PR49

SUSP#[43,44,45,48]

C C

B B

PR49

0_0402_5%

1 2

@

PC73

.1U_0402_16V7K

12

1 2

82.5K_0402_1%

EN_1.05V LX_1.05V

FB_1.05V

PR53

5.1K_0402_1%

PR54

10.2K_0402_1%

1 2

4

FB=0.7v

PU5

1

PGOOD

PR52

470K_0402_5%

2

TRIP

3

EN

4

VFB

5

TST

TPS51212DSCR_SON10_3X3

TRIP_1.05V DH_1.05V DH_1.05V_1

TST_1.05V

12

VBST

DRVH

V5IN

DRVL

10

9

8

SW

7

6

DL_1.05V

11

TP

PR47

2.2_0603_5%

1 2

PR114

1 2

0_0805_5%

BST_1.05V-1BST_1.05V

0_0402_5%

1 2

PR50

12

PC72

PC72 1U_0402_6.3V6K

1U_0402_6.3V6K

SI7716ADN-T1-GE3_POWERPAK8-5

Vtrip range ==> 0.2V ~ 3V

<Vo=1.05V> VFB=0.7V V=0.7*(1+5.1K/10.1958K)=1.05V Fsw=290KHz

Rds(ON) :Max=16.5m-ohm Typ=13.5m-ohm

Ipeak=6.526A, Imax=4.568A, 1.2*Ipeak=7.831A Iocp(set)=7.851A~11.555A

3

Power dissapation: 0.1053W

SIS412DN-T1-GE3_POWERPAK8-5

5

PQ10

4

123

5

4

123

PC71

0.22U_0603_25V7K

1 2

+5VALW

Power dissapation: 0.2643W

2

P

9

Q

Power dissapation: 0.606W

2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%

1 2

12

@EMI@

PR51

4.7_1206_5%

12

@EMI@

PC75

1000P_0603_50V7K

+1.05V +1.05VS_VPCH

+

PL13

1

.05V_12V

PC67

PJ8

@PJ8

@

2

JUMP_43X118

1

P

12

EMI@

12

EMI@

L

1 2

HCB1608KF-121T30_0603

12

PC68

68P_0402_50V8J

@RF@ PC68

@RF@

10U_0805_25V6K

12

PC69

PC70

0.1U_0402_25V6K

0.1U_0402_25V6K 2200P_0402_50V7K

2200P_0402_50V7K

@EMI@ PC69

@EMI@

B

+

+1.05V

1

+

PC74

2

330U_6.3V_M

112

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/09/01 2013/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

+1.05VSP

0.1Custom

49 56Tuesday, September 24, 2013

1

49 56Tuesday, September 24, 2013

0.1Custom

1

WWW.AliSaler.Com

A A

VSS_SENSE[8]

+1.05VS_VCCIO

VCC_SENSE[8]

PR63

1 2

75_0402_1%

B B

VR_HOT#[ 43]

VR_HOT#

+1.05VS_VCCIO

12

71

71 PR

PR

VR_SVID_DAT[8] VR_SVID_ALRT#[ 8] VR_SVID_CLK[8]

72

72 PR

PR

@

1 2

75_0402_1%

130_0402_1%

PR74

54.9_0402_1%

VR_SVID_DAT VR_SVID_ALRT# VR_SVID_CLK

12

PC84

0.1U_0402_25V6K

+3VS

TSENSE

PR76

PR76 10K_0402_1%

10K_0402_1%

1 2

VGATE[14,43,5]

C C

VGATE

12

PR77

66.5K_0402_1%

PUT COLSE TO VCORE HOT SPOT PR66 @ 66.5K=108C

PH2

1 2

100K_0402_1%_NCP15WF104F03RC

VR_ON[43]

+5VS

2

PR60

0_0402_5%

1 2

PR64

0_0402_5%

1 2

PR69

1 2

2_0402_1%

12

PC80

PC80 1000P_0402_50V8J

1000P_0402_50V8J

PR66

0_0402_5%

1 2

12

PC86

2.2U_0603_6.3V6K

Switching Frequency PR110 @ 24.9K=320KHZ

PWM2[51]

3

+

PU_Vin

P

76

C

470P_0402_50V8J

P

55

R

1 2

49.9_0402_1%

12

PR57 1K_0402_1%PR 57 1K_0402_1%

DIFFOUT

PR61 1.74K_0402_1%PR 61 1.74K_0402_1%

12

1 2

4700P_0402_25V7K

PC79

VR_HOT# CSREF VR_SVID_DAT VR_SVID_ALRT# VR_SVID_CLK VGATE TSENSE

12

PWM3[51]

12

69.8k_0402_1%

69.8k_0402_1% PR79

PR79

P

10P_0402_50V8J

12

PR58

1 2

4.99k_0402_1%

FB

VSS_SENSE_1

VCC_SENSE_1

1

ENABLE

2

VCC

3

VR_HOT

4

SDIO

5

ALERT

6

SCLK

7

VR_RDY

8

TSENSE

PC87

0.1U_0402_25V6K

PR110

1 2

24.9K_0402_1%

PWM1[51]

12

65W@

PR80

PR80 59K_0402_1%

59K_0402_1%

PR80

35W@

37.4K_0402_1%

ASM for 3Phase opration

+5VS

CSN4A

77

C

12

32

33

EPAD

1 2

C

12

COMP

+CPU_Vin1

29

27

26

28

30

31

FB

VSP

VSN

VRMP

COMP

DIFFOUT

PWM4 / ROSC9PWM2 / VBOOT10PWM3 / IMAX11PWM1 / ADDR12DRON13CSP114CSN115CSP3

PR81

PR81 68K_0402_1%

68K_0402_1%

1 2

PR82

PR82 2K_0402_1%

2K_0402_1%

PR56

PR56 1K_0402_1%

1K_0402_1%

1 2

PC78 0.01U_0402_50V7KPC78 0.01U_0402_50V7K

PR62

1 2

26.7K_0402_1%

26.7K_0402_1% PC81

PC81

1 2

Iout_A

390P_0402_50V7K

PR65

1 2

ILIM

9.31K_0402_1%

35W@

25

ILIM

IOUT

24

CSCOMP

23

CSSUM

22

CSREF

21

CSN4A

CSN4

20

CSP4

19

CSN2

18

CSP2

17

CSN3

PU6

NCP81102MNTXG_QFN32_4x4

16

ASM for 2Phase opration

CSN2A

+5VS

1 2

CSCOMP

CSSUM

CSN2A CSP2A

CSN3 CSP3A

CSN1 CSP1A

PC82

1200P_0402_50V7K

PR111

PR111 2K_0402_1%

2K_0402_1%

35W@

220K_0402_5%_ERTJ0EV224J

PR65

65W@

14.7K_0402_1%

1 2

PC83

1 2

390P_0402_50V7K

12

DRVON [51]

4

Place close to phase 1 inductir

12

PH1

PR59 75K_0402_1%PR59 75K_0402_1%

12

PC85

PC85 1000P_0402_50V8J

1000P_0402_50V8J

0.047U_0402_16V7K

0.047U_0402_16V7K PC89

PC89

0.047U_0402_16V7K

CSP3A

PR67

65W@

CSP2A

CSN3

PC137

12

CSP1A

CSN2A

PC88

CSN1

5

PR99 169K_0603_1%PR99 169K_0603_1%

165K_0402_1%

12

65W@

PR68 169K_0603_1%

12

PR70 169K_0603_1%PR70 169K_0603_1%

12

PR73

10_0402_1%

65W@

12

PR75

10_0402_1%

12

PR98

10_0402_1%

1 2

PR84

6.98K_0402_1%

65W@

1 2

PR78

PR78 0_0402_5%

0_0402_5%

65W@

1 2

PR83

6.98K_0402_1%

1 2

PR93

6.98K_0402_1%

CSP3 [50,51]

CSP2 [50,51]

CSP1 [50,51]

CSN1 [50,51]

CSN2 [50,51]

CSN3 [50,51]

CSN1 [50,51]

CSP1 [50,51]

CSN2 [50,51]

CSP2 [50,51]

CSN3 [50,51]

CSP3 [50,51]

D D

Title

NCP81102

Size Document Number Rev

VCA00 LA-9792P M/B 0.1

1

Date: Sheet of

2

3

4

Date: Sheet of

5

50 56Tuesday, September 24, 2013

1

WWW.AliSaler.Com

P

85

R

N

resistor:

E NCP81151@ 0 R NCP5911@ 4K

P

M1[50]

A A

B B

W

D

VON[50,51]

R

+

VS

5

PWM2[50]

DRVON[50,51]

+5VS

0_0402_5%

PR91

0_0402_5%

12

P

87

R

12

PC94

2.2U_0603_6.3V6K

12

65W@

PC111

2.2U_0603_6.3V6K

R

2.2_0603_1%

1 2

S

T1

B

PU7

PU7 N

N

P81151MNTBG_DFN8_2X2

C

F

1

B

D

T

S

2

P

M

W

3

E

N

4

C

V

D

65W@

PR89

2.2_0603_1%

1 2

65W@

PU8

PU8 NCP81151MNTBG_DFN8_2X2

NCP81151MNTBG_DFN8_2X2

FLAG

1

BST

DRVH

2

PWM

3

EN

4

VCC

DRVL

S

T1_1

B

0.22U_0603_25V7K

9

AG

L

8

VH

R

7

S

W

6

G

D

N

5

R

VL

BST2_1BST2

0.22U_0603_25V7K

9

8

7

SW

6

GND

5

P

C

PC102

93

1 2

P

1 2

H

1

G

0_0805_5%

W

1

S

L

1

G

65W@PC102

65W@

1 2

65W@

PR90

1 2

HG2

0_0805_5%

SW2

LG2

R

86

P

Q

PQ15

65W@

2

5

Q

11

P

4

HG1_1HG2_1HG3_1

123

SIR472DP-T1-GE3_POWERPAK8-5

5

12

4

PQ14

65W@

5

4

SIR472DP-T1-GE3_POWERPAK8-5

5

P

13

Q

4

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

5

4

PQ16

65W@

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

123

SIR472DP-T1-GE3_POWERPAK8-5

5

4

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

12

PC90

PC91

10U_0805_25V6K

0.36UH_FDU1040J-H-R36M=P3_33A_20%

PR88

1 2

4.7_1206_5%

12

@EMI@ PR88

@EMI@

PC95

@EMI@ PC95

@EMI@

1000P_0603_50V7K

65W@

12

PC104

PC103

10U_0805_25V6K

0.36UH_FDU1040J-H-R36M=P3_33A_20%

PR92

1 2

4.7_1206_5%

12

@EMI@ PR92

@EMI@

PC112

@EMI@ PC112

@EMI@

1000P_0603_50V7K

PC92

65W@

3

12

10U_0805_25V6K

P

15

L

1

4

3

2

+

C

PU_CORE

+

CSN1 [50]

CSP1 [50]

C

PU_Vin

P

LOTES_APOW0008-P001C

4

HCB2012KF-121T50_0805

P

14

EMI@

14

EMI@

L

+

2V2

1

P103

J

1

2

3

4

12

1 2

HCB2012KF-121T50_0805

EMI@

1 2

PC96

PC97

12

EMI@ PC97

EMI@

EMI@ PC96

EMI@

100P_0402_50V8J

1000P_0402_50V7K

P

16

L

12

PC98

EMI@ PC98

EMI@

100P_0402_50V8J

5

+

PU_Vin

C

@

1

12

PC99

EMI@ PC99

EMI@

1

+

PC100

PC101

2

100U_25V_M

1000P_0402_50V7K

100U_25V_M

+CPU_Vin

+CPU_CORE

12

PC105

10U_0805_25V6K

65W@

PL17

1

2

+CPU_CORE

4

3

CSN2 [50]

CSP2 [50]

+CPU_CORE

1

+

2

12

PC106

PC106 560U_2.5V_M

560U_2.5V_M

PC113

22U_0805_6.3V6M

1

+

2

12

PC114

22U_0805_6.3V6M

PC107

PC107 560U_2.5V_M

560U_2.5V_M

1

+

2

12

PC115

22U_0805_6.3V6M

PC108

PC108 560U_2.5V_M

560U_2.5V_M

1

+

2

12

PC116

22U_0805_6.3V6M

PC109

PC109 560U_2.5V_M

560U_2.5V_M

1

+

PC110

PC110 560U_2.5V_M

560U_2.5V_M

2

12

PC118

PC117

PC118

22U_0805_6.3V6M

12

PR97

+CPU_Vin

PR97

2.2_0603_1%

1 2

BST3_1BST3

PC138

0.22U_0603_25V7K

PU9

PU9 NCP81151MNTBG_DFN8_2X2

NCP81151MNTBG_DFN8_2X2

FLAG

PC143

1

BST

DRVH

2

PWM

SW

3

12

EN

GND

4

VCC

DRVL

C C

D D

PWM3[50]

DRVON[50,51]

+5VS

PR94

0_0402_5%

12

1

2.2U_0603_6.3V6K

1 2

9

8

7

6

5

HG3

SW3

LG3

PR95

1 2

0_0805_5%

PQ17

4

PQ18

5

4

123

SIR472DP-T1-GE3_POWERPAK8-5

5

2

SIR472DP-T1-GE3_POWERPAK8-5

5

PQ19

4

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

12

PC142

PC139

PC140

10U_0805_25V6K

0.36UH_FDU1040J-H-R36M=P3_33A_20%

1

2

PR96

1 2

4.7_1206_5%

12

@EMI@ PR96

@EMI@

PC141

@EMI@ PC141

@EMI@

1000P_0603_50V7K

12

10U_0805_25V6K

PL18

3

+CPU_CORE

4

3

CSN3 [50]

CSP3 [50]

12

PC119

22U_0805_6.3V6M

12

PC125

22U_0805_6.3V6M

12

PC131

22U_0805_6.3V6M

4

12

PC120

22U_0805_6.3V6M

12

PC126

22U_0805_6.3V6M

12

PC132

22U_0805_6.3V6M

12

PC121

22U_0805_6.3V6M

12

PC127

22U_0805_6.3V6M

12

PC133

22U_0805_6.3V6M

12

PC122

22U_0805_6.3V6M

12

PC128

22U_0805_6.3V6M

12

PC134

22U_0805_6.3V6M

Title

Size Document Number Rev

Date: Sheet of

12

PC124

PC123

PC129

PC135

@

Power Stage

VCA00 LA-9792P M/B 0.1

PC124

22U_0805_6.3V6M

12

PC130

22U_0805_6.3V6M

12

PC136

@

22U_0805_6.3V6M

51 56Tuesday, September 24, 2013

5

51 56Tuesday, September 24, 2013

5

WWW.AliSaler.Com

D D

GPU_VREF

DIS@

PR411

3K_0402_1%

1 2

1800P_0402_50V7K

PC413

DIS@ PC413

DIS@

0.01U_0402_50V7K

VGA_VSS_SENSE[22]

C C

B B

12

0_0402_5%

0_0402_5% PR401

PR401

2

1

@

PR419

PR419 0_0402_5%

0_0402_5%

1 2

VGA_VCC_SENSE[22]

PC401

1000P_0402_50V7K

@ PC415

@

47P_0402_50V8J

1 2

+GPU_CORE_VIN

PC415

0_0402_5%

1 2

@ PR414

@

57.6K_0402_1%

For RT8813

DIS@ PR422

DIS@

499K_0402_1%

PR416

@ PR416

@

51_0402_1%

1 2

GPU_FB1

PR417

DIS@

PH701 close to M OSFET Trigger point 11 0 degree

Follow GB4-128 demand

12

429

429 PC

PC

PC430

DIS@

DIS@ PC430

DIS@

4.7U_0603_6.3V6K

Place Under GPU

12

PC431

PC433

PC432

DIS@ PC431

DIS@

DIS@ PC433

DIS@

DIS@ PC432

DIS@

4.7U_0603_6.3V6K

12

PC436

PC435

PC437

PC434

DIS@ PC435

DIS@

DIS@ PC434

DIS@

4.7U_0603_6.3V6K

PC438

DIS@ PC436

DIS@

DIS@ PC437

DIS@

DIS@ PC438

DIS@

4.7U_0603_6.3V6K

+VGA_CORE

A A

G

U_PWM_VID[21]

P

DIS@

PR408

30K_0402_1%

1 2

DIS@

PR412

24K_0402_1%

PC412

DIS@ PC412

DIS@

1 2

PR414

12

PR422

12

PC416 10P_0402_ 50V8J@PC416 10P_0402_ 50V8J@

PC419

@ PC419

@

100P_0402_50V8J

1 2

GPU_FB2

+VGA_CORE

PlaceNear GPU

4

3

VS

+

PSI pull up on H W site

12

DIS@

P

402

R

10K_0402_1%

GPU_VID

VID

TALERT/ISEN2

GPU_TALERT/ISEN2

DIS@

R

P

10K_0402_1%

DIS@ PR406

DIS@

GPU_PSI

GPU_EN

4

3

EN

PSI

VCC/ISNE1

16

15

GPU_PGOOD

GPU_DSBL/ISEN1

DIS@ PR424

DIS@

12

PC425

DIS@ PC425

DIS@

12

427

PR406

4.7K_0402_1%

1 2

1

2

BOOT1

UGATE1

BOOT218UGATE2

17

+3VS

12

PR421

4.7K_0402_1%

DIS@

PR424

2.2_0402_1%

1U_0402_16V6K

10K_0402_1%

12

GND/PWM3

DGPU_PWROK [17,23]

12

0_0402_5%

1 2

P

404

R

+3VS_VGA

PC408

@ PC408

@

0.1U_0402_25V6K

GPU_BOOT1

24

PHASE1

23

LGATE1

22

21

PVCC

20

LAGTE2

19

PHASE2

RT8813AGQW_W QFN24_4X4

+5VALW

N

VDD_PSI [21]

V

1 2

GPU_PVCC

GPU_BOOT2 GPU_BOOT2_1

0_0402_5%

1 2

P

403

R

DIS@

PR409

39K_0402_1%

1 2

DIS@

PR410

PR410 3K_0402_1%

3K_0402_1%

1 2

12

GPU_REFADJ

6

5

PU401

7

GPU_REFIN

GPU_VREF

GPU_TON

GPU_FBRTN

GPU_FB

1 2

GPU_COMP

PR418

@ PR418

@

82K_0402_1%

1 2

PH401

1 2

DIS@ PH401

DIS@

100K_0402_1%_NCP15WF104F0 3RC

+3VS

1

12

PC441

PC440

2

DIS@ PC441

DIS@

47U_0805_6.3V6M

PR420

DIS@

22U_0805_6.3V6M

8

9

10

11

12

GPU_VREF

12

3.92K_0402_1%

12

DIS@

PR425

10K_0402_1%

1 2

REFADJ

REFIN

VREF

TON

RGND

VSNS

SS

TSNS/ISEN313PGOOD

GND

14

25

DIS@

GPU_TSNS/ISEN3

PC420

DIS@ PC420

DIS@

0.1U_0402_25V6K

3

G

U_UGATE1

P

DIS@

P

405

R

2.2_0603_5%

P

G

U_BOOT1_1

0.22U_0603_25V7K

OCP setting in 4 7A

DIS@

PR413

10K_0402_1%

1 2

DIS@

12

PC414

4.7U_0603_10V6K

@

PR117

1 2

0_0805_5%

GPU_LX2

@

PR426

2.2_0603_5%

1 2

N14P-GE2 Ipeak= Imax= Iocp=

DIS@

P

115

R

1 2

0_0805_5%

DIS@

P

407

C

0_0402_5%

PR415

GPU_LGATE2

12

GPU_LGATE1

+5VALW

12

GPU_UGATE2_1GPU_UGATE2

@

PC423

0.22U_0603_25V7K

G

U_UGATE1_1

P

12

@

PQ404

@

PQ405

2

+

PU_CORE_VIN

+

PU_CORE_VIN

G

5

D

S@

I

P

401

Q

4

123

SIR472DP-T1-GE3_POWERPAK8-5

P

U_LX1

G

DIS@

PQ402

DIS@

5

4

5

PQ403

4

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

G

12

PC402

PC403

@RF@ PC402

@RF@

68P_0402_50V8J

0.1U_0402_25V6K

@EMI@ PC403

@EMI@

DIS@

P

L

0.36UH_FDU1040 J-H-R36M=P3_33A_20 %

134

2

12

@EMI@

PR407

4.7_1206_5%

SNUB_GPU1

@EMI@

12

PC411

680P_0603_50V7K

12

PC405

PC404

PC406

DIS@ PC405

DIS@

@

10U_0805_25V6K

2200P_0402_50V7K

@EMI@ PC404

@EMI@

402

12

10U_0805_25V6K

1

+

PC409

PC409 560U_2.5V_M

560U_2.5V_M

2

DIS@

EMI@DIS@

P

403

L

HCB1608KF-121T30 _0603

EMI@DIS@

L

401

P

HCB1608KF-121T30 _0603

1

DIS@

+

PC410

PC410 560U_2.5V_M

560U_2.5V_M

2

12

+

2V2

1

+

GA_CORE

V

1

DIS@

+

PC417

PC417 560U_2.5V_M

560U_2.5V_M

2

1

Design for N

14M-GE2

+GPU_CORE_VIN

12

PC422

@PC422

5

4

123

SIR472DP-T1-GE3_POWERPAK8-5

@

5

PQ406

4

321

SIRA06DP-T1-GE_POWERPAKSO-8-5

@

PC421

@

10U_0805_25V6K

@

PL404

0.36UH_FDU1040 J-H-R36M=P3_33A_20 %

134

2

12

@EMI@

5

PR423

4.7_1206_5%

321

@EMI@

12

PC418

680P_0603_50V7K

680P_0603_50V7K SIRA06DP-T1-GE_POWERPAKSO-8-5

SIRA06DP-T1-GE_POWERPAKSO-8-5

+VGA_CORE

12

443

PC445

PC446

PC444

PC

0.1U_0402_10V7K

DIS@ PC445

DIS@

DIS@ PC446

DIS@

DIS@ PC444

DIS@

5

12

PC448

PC447

DIS@ PC448

DIS@

DIS@ PC447

DIS@

4.7U_0805_6.3V6K

4

12

PC451

PC449

PC450

Security Classification

DIS@ PC451

DIS@

DIS@ PC449

DIS@

DIS@ PC450

DIS@

4.7U_0805_6.3V6K

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/11 /14 2013/ 12/31

2

Compal Secret Data

Deciphered Date

Compal El ectronics, Inc.

Title

PWR_VGA_COR E/VGA_PCIE

ize Document Number Rev

Size Document Number Rev

S

Tripoli

Date: Sheet of

1

52 56Tuesday, September 24, 2013

0.1

A

WWW.AliSaler.Com

1 1

OCP SET:6.3A

DIS@

PR138

PR144

1 2

DIS@

1 2

78.7K_0402_1%

PR139

0_0402_5%

DGPU_PW ROK[15,23,43]

2 2

1 2

10K_0402_1%

@

PR141

12

EN_V1.5V

12

@

PC205

PC205 .1U_0402_16V7K

.1U_0402_16V7K

10K_0402_1%

B

Power dissapation: 0.0978W

DIS@

PC204

PR137

1 2

BST_V1.5V

2.2_0603_5%

PU10

DIS@PU10

DIS@

VBST

DRVH

V5IN

DRVL

10

9

8

SW

7

6

11

TP

1

PGOOD

12

PR143

PR143 470K_0402_1%

470K_0402_1%

DIS@

2

TRIP

3

EN

4

VFB

5

RF

TPS51212DSCR_SON10_3X 3

PR145

1 2

11.5K_0402_1%

DIS@

TRIP_V1.5V UG_V1.5V UG_V1.5V_1

FB_V1.5V

2.2_0603_5%

DIS@

1 2

PR116

PR116 0_0805_5%

0_0805_5%

SW_V1.5 V

0_0402_5%

1 2

PR140

LG_V1.5V

12

PC206

1U_0402_6.3V6K

DIS@

SI7716ADN-T1-GE3_POW ERPAK8-5

1 2

0.22U_0603_25V7K

+5VALW

Power dissapation: 0.1985W

DIS@

PQ22

C

5

DIS@

P

4

SIS412DN-T1-GE3_POW ERPAK8-5

123

5

4

123

+

RAM_12V

V

12

PC199

21

Q

Power dissapation: 1.0786W

4.7UH_FDSD0630-H- 4R7M-P3_5.5A_20%

12

10U_0805_25V6K

DIS@ PC199

DIS@

PL21

DIS@ PL21

DIS@

1 2

PR142

@EMI@

4.7_1206_5%

PC208

@EMI@

1000P_0603_50V7K

PC200

@ PC200

@

10U_0805_25V6K

12

PC201@RF@

68P_0402_50V8J

1

+

PC207

2

330U_2.5V_M

DIS@

12

PC202

@EMI@ PC202

@EMI@

0.1U_0402_25V6K

EMI@DIS@

L

20

P

HCB1608KF-121T30_0603

1 2

PC203

2200P_0402_50V7K

@EMI@ PC203

@EMI@

+VRAM_1.5VSP

D

+

2V2

1

PJ9

@PJ 9

@

Cap. ESR=17m Rds(ON) :Max=15m-ohm

2

JUMP_43X118

112

+1.5VS_VGA+VRAM_1.5VSP

Typ=12m-ohm Vtrip range ==> 0.2V ~ 3V <Vo=1.5V> VFB=0.7V

V=0.7*(1+11.5K/10K)=1.505V

3 3

Fsw=290KHz

Ipeak=4.7A, Imax=3.29A, Iocp=1.2*Ipeak=5.64A

Iocp(set)=5.718A~8.304A

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2012/09/01 2013/12/31

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PWR-VRAM_1.5VSP

VCA00 LA-9792P M/B

D

53 56Tuesday, September 24, 2013

0.1

5

WWW.AliSaler.Com

4

3

2

1

RT8127

D D

+V_3.3VP

+V_5VP

TPS51212 +1.05V

3.3V

5.13A

V

5

6.55A

1.05V

6A

RT8207M +1.5VP

+0.75VSP

PCH, GPU, Codec, Card reader, LAN, WLAN, LVDS, TV Tuner, WebCam

Codec, Toch Screen, Panel, HDD, ODD, USB Port, stereo

PCH, GPU

1.5V

5.9A

0.75V

0.75A

CPU, PCH, DDR, TV Tuner

DDR

Adaptor(19V) 120W/90W

C C

RT8298 +12V

NCP81102

+CPU_CORE

12V

2.58A

HDD, Fan

1.8V

75A peak for 65W CPU, 48A peak for 35W CPU

T

PS51212

B B

+VRAM_1.5VSP

RT8813 +VGA_CORE

A A

5

4

1.5V

5.23A

1.0V

38.69A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2011/09/12 2012/09/12

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Power Rail

QLA13/15 LA-8501P M/B

1

55 59Tuesday, September 24, 2013

0.4

5

WWW.AliSaler.Com

4

3

2

1

Clock and Reset Diagram

Channel A

D

R3-SO-DIMM

D

D D

Intel CPU Haswell

DDRA_CLK[0..1] SM_DRAMRST#

LGA1150

37.5mm x 37.5mm

DDRB_CLK[0..1] SM_DRAMRST#

Channel B

DDR3-SO-DIMM

100MHz

CLK_DP_DP

C C

27MHz

Nvidia N14M-GE2

CLK_PCIE_VGA

100MHz

PLT_A_RST#

A

CLK_CPU_DMI

eDP to LVDS

Realtek

RTD2136R

Audio Codec

LC-272-VA4

A

B B

KBC

PCI_RST#

ENE KB9012-A3

AZ_BITCLK_HD

24MHz

AZ_RST_HD#

CLK_PCI_EC

33.3MHz

PLT_RST#

GATEA20

KB_RST#

PCH_RSMRST#

A_RST#

G20IN

KBRST#

RSMRST#

PCH LynxPoint H81 FCBGA-708 23mm x 22mm

H_PWRGOOD

CPU_PLTRST#

RESET#

PWRGOOD

PLT_RST#

CLK_PCIE_LAN

100MHz

CLK_CR

100MHz

CLK_WLAN

100MHz

CLK_TV

100MHz

25MHz

PLT_A_RST#

A

LAN

Realtek

8111G

Card Reader

RT5229

WLAN/BT

On Mini Card

TV Tuner

On Mini Card

25MHz

PM_PWROK VGATE

PWR_GOOD

RTC

32.768KHz

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Clock/Reset Diagram

VIA15 LA-A071P M/B

1

0.3

56 59Tuesday, September 24, 2013

0.3

5

WWW.AliSaler.Com

4

3

2

1

PLT_RST#

PWR BTN

D D

Power Button

ON/OFF

PLT_RST#

VRAM

FBA_RST#

G

PIN121

PIN 97

PIN 89

PIN 114

PIN 13

+CPU_CORE VGATE

NCP6131S52MNR2G

PWM

SSM3K7002FU

+3.3V_LAN

AQ3413

MOS

VR_ON

WOL_EN

NVIDIA

MXM

Intel

Haswell

PEX_RST_N

PLT_RST_VGA#

VGA_PWROK (PCH GPIO17)

PLT_RST#

DGPU_HOLD_RST# (PCH GPIO50)

(desktop)

RC

delay

PCH_RTCRST#

RTCRST#

PLTRST#

GPIO52

GPIO54

GPIO50

2

CPU_PLTRST#

PLT_RST#

RC

delay

PCH_SRTCRST#

PLT_A_RST#

SRTCRST#

PCH_PLT_RST#

DGPU_PWR_EN MXM

F

DGPU_HOLD_RST#

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

VCA00 LA-9791P M/B

CACTUS-RIDGE Thunder bolt

RTS5229 Card reader

RTL8111F-CGT PCIE Gold Finger

Slot 2 Mini Card WLAN

Reset Diagram

1

0.3

57 59Tuesday, September 24, 2013

0.3

RESET#

C C

+12VSP RT8299

SCALER_ON

LDO

EC

KB9012QF-A3

DDR3 SO-DIMM

UNCOREPWRGOOD

PM_SYNC

SM_DRAMPWROK

SM_DRAMRST#

+1.05VCCIOP TPS51212DSCR

PWM

SM_DRAMRST#

H_PM_SYNC

PIN 37

ECRST#

1.5VS AP4800

B B

MOS

E

+0.75VSP(+0.75VS)

RT8207MZQW

PWM SYSON+1.5VP(+1.5V)

AP2301+3V_SCA_R

MOS

B+

SUSP#

D

SCALER_ON

B

PIN 116

PIN 95

PIN 109

A

A A

+3VALW

+5VALW

RT8243BZQW

DC-IN

PIN 107

PIN 106

PIN 100

PIN 2

PIN 20

PIN 15

PIN 1 A20GATE

PCH_RSMRST#

KB_RST#

EC_SCI#

EC_SMI#

GATEA20

PIN 14

PIN 110

PIN 6

PWM

5

4

VGATE

PM_PWROK

PBTN_OUT#

RC delay

H

DRAMPWROK

SYS_PWROK

DRAMPWROK

PROCPWRGD

PWROK APWROK

PWRBTN#

PM_DRAM_PWRGD_R

H_PWRGOOD

PMSYNC

PROCPWRGD

PLTRST_PROC#

RSMRST#

RCIN#

GPIO7

GPIO8

PCH

H87

C

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

AZ_RST_HD#

ALC892 Codec

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/01 2014/04/01

3

(desktop)

SLP_S5#

SLP_S4#

SLP_S3#

HDA_SDO

Compal Secret Data

Deciphered Date

NO DATE PAGE MODIFICATION LIST PURPOSE

WWW.AliSaler.Com

------------------------------------------------------------------------------------------------------------------------------------------

1. 20130604 P47

2. 20130729 P45

3. 20130729 P45 Add PR1

3. 20130729 P45 Add PR39

D D

C C

5

Add PC154 and Change the pu101 to SA00005A600 Add PR105 ,PC155 Snaber For EMI Request

4

3

2

1

For Pericom issue

For EMI Request For S5 power loss issue

B B

A A

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2011/09/12 2012/0 9/12

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR_PIR

Size Document Number Rev

Custom

B555 VAA15 LA-A072P MB

Date: Sheet of

57 61Tuesday, September 24, 2013

1

0.5

C

WWW.AliSaler.Com

5

O

MPAL CONFIDENTIAL

4

3

2

1

MODEL NAME: P

B NAME:

C

REVISION:

D D

A

TE:

D

Reserve For PSU

C C

B B

ZEA00 Power Sequence Block Diagram (Discrete)

A-

A061P

L

.

1

0 2

13/04/01

0

+5VSB

B

PS_ON#

E

PSU_PG PSU_PG

PSU

ATX12V1_1

+12V2

C

PSU Conn

PJP101

PJP901

ON/OFFBTN#

+5VSB/B+

+1.5VP(+1.5V)/ +0.75VP(+0.75VS) For DDR

+5VSB

PS_ON#

ATX12V1_1

PJ10

PJ11

+12V2

1

Adaptor

PSU_PG#

B+

D

A

PU4

PU102

B+

PU3

+5VALWP +3VALWP

+5VALW

+3VALW

+3VSB

B

EC_ON#

2

35V_PG

ON/OFF#

SYSON

DGPU_PWROK

F

8

EC

U35

20

11

PM_PWROK

4

PCH_RSMRST#

PBTN_OUT#

5

PM_SLP_S3#

PM_SLP_S5#

10

VR_ON

PCH_PWR_EN

12

CPU

JCPU1

15

17

Q29

PCH

7

U1

6

PU7

PU6

+CPU_CORE

PU8

SUSP#

18

SYS_PWROK

13

DRAMPWROK

14

H_PWRGOOD

19

CPU_PLTRST#

16

+CPU_CORE

PU9

9

VR_SVID_DAT

VR_SVID_ALRT# VR_SVID_CLK

VGATE

+1.5V

+1.5VS

3

+3VALW

U38

+5VS

+12V2

PU10

+VRAM_1.5VSP (+1.5VS_VGA)

+3VSB

U37

+3VALW_PCH

+5VALW

U38

+3VS

GPU_PWM_VID

21

A A

+12V2

PU401

+VGA_CORE

ATX12V1_1 (+12VS_PSU)

U74

+12VS

Reserve For PSU

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2013/04/01 2014/04/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Power Sequence Diagram

ZEA00 LA-A061P M/B

58 59Tuesday, September 24, 2013

1

0.3

5

WWW.AliSaler.Com

P

IR (Product Improve Record)

HW

ZEA00 LA-A061P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 --> 0.2 GERBER-OUT DATE: 2013/06/20

NO DATE PAGE MODIFICATION LIST PURPOSE

----------------------------------------------------------------------------------------------------------------------------------------

.

Change C45 from SF000002V00 to S F000003X00

1

2. Change +LCDVDD enable control from EC to LVDS convertor,un-pop R367 and R365 change short pad.

3. Change LCD_BKOFF# control from EC to LVDS convertor,un-pop R36 4 and R363 change 0 ohm.

4. Remove un-used components(U18, R335,R336,C357,C359,C360,R338,R3 39) for eDP to LVDS convertor.

D D

5. Pop R428 for AZ_SDIN0_HD.

6. U2 footprint change from socke t to IC.

7. Add RH11

8. Change Y2 from SJ10000CU00 to SJ10000DE00,change C106 & C107 f rom 27pF to 4.7pF

9. Change R423 location to L45

10. Change D7 from SC2N202U010 to SC600000B00 for

11. Change Q29 from SB548000210 t o SB00000ZN00.

12. Change D8&D9 from SCS00002G00 to SCS00000Z00

13. X1 code change:1.Change Q2,Q3 ,Q4,Q5,Q30,Q31 from SB01000JE00 to SB00000EO00. 2.Change Q9 from SB934130020 to SB934130000.

3.Change Q10 from SB00000FC00 to SB00000F400. 4.Change L1 fro m SM01000JE00 to SB01000JN00.

14. Change R551 & R553 pull-high from +3VS to +3VALW_PCH for leak age.

15. Add R677 & R678 & R679 for PT C request, Change R473,R490,R679 ,R677,R678 from 0ohm to PTC(SP040 005X00).

16. Change Q10 from SB00000FC00 t o SB00000L800 for

17. Remove R469 0ohm for TV.

18. Add C2134 ,C2135,C2136,C2137, C2138,C2139,C2140,C2141,C2143 fo r ESD.

19. Remove JXDP1,OC1,OC2,RC3,RC4, R125,R126.

20. Pop U7&R231, un-pop R228 for PLT_RST_VGA#.

21. Swap SATA_PRX_DTX_N1 & SATA_P RX_DTX_P1 for m-SATA pin define.

22. Un-pop LAN power components Q 26,Q27,R573,R574,C562.

23.0 ohm change to short pad: R34 7,R585,R507,R674,R644,R645,R646, R647

24.Change R453&R457 from 0ohm to 1.1K, R451&R459 from 300ohm to 5 .6Kohm.

25.Pop R438,R439 for ESD request.

C C

PVT change list:

1. Change Q10 from SB00000FC00(EO L soon) to SB00000ZN00(同Q29),SB00000FC00 as 2nd source.Sc hematic,

2. Change U23 pin12_+USB3_VCCA to +USB3_VCCB, pop U22, un-pop U24 for USB charger

3. R365 change from short pad to 0ohm.

4. U5 pin5 change from +3VSto +3V ALW_PCH for BCM43142 wake from W LAN issue.

5. Change R473,R490,R677,R678,R67 9 from SP040005X00_0603 size to F1,F2,F4,F5,F3 SP040003S00_1206 s ize.

6. Change L11 from SM010014520 to SM01000EJ00 for ACL request

7. Change L8 from SM010007W00 to SM010019400 for ACL request

8. Change D7 from SC2N202U010 to SC600000B00(same as D1/D2), SC2N 202U010 as 2nd source..

9. Change RP19 from SD309510A80(T 88 P/N) to SD309510A10.

11. Change R276 from 10k to 100k for +3VS_VGA rise time.

12. Change R672 from 10k to 100k for +3VALW_PCH rise time.

14. Change R438 & R439 from 0_060 3 to short pad.

15. Un-pop C125 & C548 for sequen ce EA.

16. Change C394, C398,C520 & C514 from 220uF(LELON_SF000001F00) t o 100uF (Panasonic_SF000005100) t o meet Inrush EA & ACL request.

17. Change C170 & C171 from 12pF to 10pF for EA.

20. Change C106 & C107 from 4.7pF to 10pF for 25MHz crystal.

21. Add R677 & reserve R678 on U5 AND gate for PLT_A_RST#

13. Change JUSB1 & JUSB2 from DC2 3300AE00 to DC233008R00(VBA11)

24. Change R591 pull-high from +5 VSB to VL for power S5 Erp reque st.

22. Change D20 & D21 from SC30000 1Y00 to SC300002F00 for ESD requ est

B B

23. Change D22 & D23 from SCA0000 1100 to SCA00000T00 for ESD ACL request

10. Add C2144~C2152 for EMI reque st.

18. Change R402 from short pad to 22ohm for EMI, R399,R401,R403 & R404 change from short pad to 0 ohm for EMI request.

19. Reserve C2153,C2154,C2155,C21 56, add D29 for ESD.

20. Change R282 from 100k to 2k, R277 from 470 to 22 ohm for GPU power sequence.

21. Change Y1 from SJ100001K00 to SJ10000FA00 ,C102 & C107 to 6pF .

4

3

2

1

替替替

需需需

pre-MP change list:

1. Change R399,R401,R402,R403,R40 4 from 0ohm to short pad.

2. Add C2157 and reserve C2158.

3. Change R8,R470,R669,R670,R416 from 0ohm to short pad.

4. Un-pop JECDB1 & SW1.

5. For R3 P/N, change PCH P/N fro m SA00006RF00 to SA00006RF20, PC B P/N from DA60011S000 to DA60011 S010 and GPU P/N from SA00006ZF00 to SA00006ZF10.

6. Change C520 & C514 from 100uF to 220uF.

7. Pop C2149~C2152 for ESD reques t.

8. Change C559 & C2128 from 0603 to 0805.

9. Change C2145 from 0.1uF to 470 pF, change C2149~C2152 from 330p F to 470pF for EMI.

10. Add C418 for EMI.

A A

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

2013/04/01 2014/04/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet o f

2

Date: Sheet o f

HW-PIR

VCA00 LA-9791P M/B

1

59 59Tuesday, September 24, 2013

0.3

Compal C560 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual