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Compal LA-6592P PAL51, Latitude E6420, 53 Schematic

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A
COMPAL CONFIDENTIAL
B
C
D
E
1 1
PCB NO : BOM P/N :
LA-6592P (DAA00001V10)
43192931L01
MODEL NAME :
PAL51/53
GPIO MAP: E3 Master GPIO Map10102010.xlsx
2 2
E3 MACALLAN 14" SG
rPGA Sandy Bridge + FCBGA PCH Cougar Point-M
2011-1-13
REV : 1.0(A00)
3 3
CONN@ : ME controll and stuff by default
@ : Nopop Component
MB Type
TPM EN/ TCM DIS
TPM DIS/ TCM EN
TPM DIS/ TCM DIS
ATG TPM EN/ TCM DIS
ATG TPM DIS/ TCM EN
4 4
MB PCB
MB PCB
Part Number
Part Number
DAA00001V10
DAA00001V10
Description
Description
PCB 0FE LA-6592P REV0 M/B DIS
PCB 0FE LA-6592P REV0 M/B DIS
A
B
ATG TPM DIS/ TCM DIS 2@3@3@
BOM P/N
43192931L01
43192931L02
43192931L03
43192931L11
43192931L12
1@
2@
4@
2@3@3@
1@
2@
4@
43192931L13
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-6592P
LA-6592P
LA-6592P
1 75Thursday, January 13, 2011
1 75Thursday, January 13, 2011
1 75Thursday, January 13, 2011
E
1.0
1.0
1.0
A
B
C
D
E
Block Diagram
LVDS CONN
1 1
PAGE 24
HDMI CONN
PAGE 26
DOCKING PORT
PAGE 40
USB[8,9]
SATA5
DOCK LAN
2 2
EXPRESS
Card
USB10
3 3
CPU XDP Port
PCH XDP Port
Thermal
GUARDIAN III EMC4022
WiFi ON/OFF & Power ON/OFF SW
4 4
DC/DC Interface
LED
Compal confidential Model: PAL51/53
LVDS Switch PI3LVD400ZFEX
HDMI Repeater
PS121
DAI
SDXC/MMC/MS
PCIE5
1/2 Mini Card
Flash
USB6
PAGE 7
PAGE 14
PAGE 22
PAGE 31
PAGE 44
PAGE 45
A
PAGE 23
PAGE 26
DPC
DPD VGA
CRT CONN
On IO board
1/2 Mini Card
Smart Card
RFID
PWM FAN
PAGE 35
WLAN
PAGE 33
PAGE 33
PAGE 22
iLVDS
dLVDS
VGA
Card reader
OZ600FJ0LN
PCIE2
Full Mini Card
WWAN/UWB
USB5USB4
TDA8034HN
Fingerprint CONN
SMSC SIO ECE5028
DPE
N12M-NS
PAGE 46-51
Video Switch MAX14885E
PCI Express BUS
PCIE1PCIE3
PAGE 33
PAGE 23
PAGE 41
B
Option
FP_USB
BC BUS
PEG
dVGA
iVGA
PAGE 25
iLVDS
PAGE 35
100MHz
PCIE x1
China TPM1.2
SSX44B
PAGE 34PAGE 36PAGE 36PAGE 36PAGE 37
USH
TPM1.2
BCM5882
PAGE 33,34
USB7
SMSC KBC MEC5055
PAGE 43 PAGE 43
PAGE 42
KB CONNTP CONN
Sandy Bridge
4MB (Socket 988B)
rPGA CPU
988 pins
FDI
Lane x 8
INTEL
COUGAR POINT-M
BGA
SPI
LPC BUS
33MHz
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Memory BUS (DDR3)
1066/1333MHz
PAGE 6-11
DMI2
Lane x 4
USB
PAGE 14-21
PCI Express BUS
HD Audio I/F
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
W25X64ZE
64M 4K sector
PAGE 14
W25Q16BVSSIG
16M 4K sector
C
PAGE 14
PCIE4
E-Module
PAGE 29
Touch Screen
SATA
100MHz
SATA
SATA Repeater
MAX4951BE
PAGE 28
HDD
PAGE 28
D
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
PAGE 24
BT
PAGE 43
Camera
SATA Repeater
MAX4951BE
PAGE 39
HDA Codec 92HD90B2
MDC
RJ11
on IO board
DELL CONFIDENTIAL/PROPRIETARY
PAGE 12,13
Trough eDP Cable
E-SATA
USB Port
USB Port
USB Port
USB Port
PAGE 39
PAGE 38
PAGE 38
2560
2560
2062
on IO board
Intel Lewisville
PAGE 30
DOCK LAN
INT.Speaker
HeadPhone & MIC Jack
DAI
To Docking side
PAGE 30
82579LM
PAGE 32
LAN SWITCH
PAGE 32
PI3L720
RJ45
on IO board
Dig. MIC
Trough eDP Cable
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DIS Block Diagram
DIS Block Diagram
DIS Block Diagram
LA-6592P
LA-6592P
LA-6592P
2 75Thursday, January 13, 2011
2 75Thursday, January 13, 2011
2 75Thursday, January 13, 2011
E
1.0
1.0
1.0
5
4
3
2
1
POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFL
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
Signal
SLP S3#
HIGH
LOW HIGH HIGH
OW HIGHLOW
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
SLP A#
HIGH
HIGH
ALWAYS PLANE
ON
M PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
PCH
USB PORT#
0
1
2
3
4
5
6
7
JUSB2 (Right side 1)
JUSB3 (Right side 2)
JESA1 (Right Side ESATA)
JESA1 (Ext Left Side )
WLAN
WWAN
JMINI3(Flash)
USH->BIO
DESTINATION
DOCKING8
PM TABLE
C C
power plane
State
S0
S3
+15V_ALW
+5V_ALW
+3.3V_ALW_PCH
+3.3V_RTC_LDO
ON
+3.3V_SUS
+1.5V_MEM
ON ON
ON
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
DESTINATION
HDD
ODD/ E3 Module Bay
NA
NA
ESATA
Dock
USH
9
10 Express card
11
12
13 LCD Touch
0
1
DOCKING
Bluetooth
Camera
BIO
NA
S5 S4/AC
S5 S4/AC don't exist
B B
A A
ON
OFF
OFFOFF
OFF
OFF
ON
OFF
OFFOFF
need to update Power Status and PM Table
DSC DP/HDMI Port
Port C
Port D
Port E
Connetion
Dock DP port 2
Dock DP port 1
MB HDMI Conn
PCI EXPRESS
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
Lane 8 None
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Express card
E3 Module Bay (USB3)
1/2vMINI CARD-3 PCIE
MMI
10/100/1G LOM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-6592P
LA-6592P
LA-6592P
3 75Thursday, January 13, 2011
3 75Thursday, January 13, 2011
3 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
EN_INVPWR
ADAPTER
D D
PGPU_PWR_EN
1.05V_VTTPWRGD
+PWR_SRC
BATTERY
1.05V_0.8V_PWROK
FDC654P
Q21
ISL95870A
(PU15)
ISL95870AH
(PU13)
MAX17411 (PU9)
+BL_PWR_SRC
+GPU_CORE
+VCC_SA
+VCC_GFXCORE
HDDC_EN
+5V_HDD
ALWON
MODC_EN
SI3456BDVSI3456BDV
(Q30)(Q27)
+5V_MOD
CHARGER
+15V_ALW
C C
SN0608098
(PU2)
+5V_ALW
RUN_ON
SI4164DY
+3.3V_ALW
(Q50)
+5V_RUN
MAX17411
(PU9)
RT8209BGQW
(PU3)
RT9026GFP
(PU5)
TPS51311
(PU4)
SN1003055
(PU7)
SN1003055
(PU6)
AUX_EN_WOWL
PCH_ALW_ON
SUS_ON
AUX_ON
RUN_ON
M_ON
SI3456
(Q38)
B B
1.05V_0.8V_PWROK
+VCC_CORE
CPU1.5V_S3_GATE
AO4728 (QC3)
DDR_ON
0.75V_VR_EN
+1.5V_MEM +0.75V_DDR_VTT
RUN_ON
NTGS4141N
(Q59)
RUN_ON
+1.8V_RUN
CPU_VTT_ON
+1.05V_RUN_VTT +1.05V_M
M_ON
RUN_ON
SI4164
(Q63)
+3.3V_WLAN
Pop option
+1.0V_LAN
SI3456
(Q49)
+3.3V_ALW_PCH
S13456
(Q54)
Pop option
+3.3V_M
SI3456
(Q34) (Q55)
+3.3V_LAN+3.3V_SUS
NTMS4920
+3.3V_RUN
SI3456
(Q58)
+3.3V_M
+0.8V_VCCSA
A A
+1.5V_CPU_VDDQ
5
+1.5V_RUN
+1.05V_RUN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-6592P
LA-6592P
LA-6592P
4 75Thursday, January 13, 2011
4 75Thursday, January 13, 2011
4 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
SMBUS Address [0x9a]
H14
C9
MEM_SMBCLK
MEM_SMBDATA
PCH
D D
B4
A3
B5
A4
LAN_SMBCLK
LAN_SMBDATA
2.2K
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMDATA
+3.3V_ALW_PCH
C8
G12
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
3A
1A
1A
C C
1B
1B
@
@
2.2K
2.2K
2.2K
2.2K
4
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_LAN
28
31
LOM
+3.3V_ALW
+3.3V_ALW
2N7002
2N7002
SMBUS Address [C8]
127
129
DOCKING
3
SMBUS Address
APR_EC: 0x48 SPR_EC: 0x70 MSLICE_EC: 0x72 USB: 0x59 AUDIO: 0x34 SLICE_BATTERY: 0x17 SLICE_CHARGER: 0x13
202
200
202
200
2
DIMMA
DIMMB
53
51
53
51
XDP1
XDP2
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
1
2.2K
G Sensor
WWAN
+3.3V_RUN
SMBUS Address [0x3B]
SMBUS Address [TBD]
2.2K
14
13
30
32
2.2K
4
+3.3V_ALW
100 ohm
100 ohm
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
10
9
7
6
M9
L9
7
8
Charger
BATTERY CONN
SMBUS Address [0x16]
USH
SMBUS Address [0xa4]
Express card
SMBUS Address [0x12]
SMBUS Address [TBD]
29
E3 Module Bay
30
8
GPU
9
3
SMBUS Address [0xd2]
SMBUS Address [0xXX]
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SMBUS TOPOLOGY
SMBUS TOPOLOGY
SMBUS TOPOLOGY
LA-6592P
LA-6592P
LA-6592P
5 75Thursday, January 13, 2011
5 75Thursday, January 13, 2011
5 75Thursday, January 13, 2011
1
1.0
1.0
1.0
KBC
A56
1C1CB59
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
2.2K
1E
B B
1E
MEC 5055
2B
2B
B53
A49
B52
USH_SMBDAT
2.2K
2.2K
CARD_SMBCLK
CARD_SMBDAT
USH_SMBCLK
A50
2.2K
B50
A47
CHARGER_SMBCLK
CHARGER_SMBDAT
1G
1G
2.2K
2.2K
2.2K
BAY_SMBDAT
B7
2D
BAY_SMBCLK
A A
A7
2D
2.2K
2.2K
GPU_SMBCLK
B49
2A
B48
2A
5
GPU_SMBDAT
5
JCPU1A
JCPU1A
DMI_CRX_PTX_N016 DMI_CRX_PTX_N116 DMI_CRX_PTX_N216
D D
DMI_CRX_PTX_N316
DMI_CRX_PTX_P016 DMI_CRX_PTX_P116 DMI_CRX_PTX_P216 DMI_CRX_PTX_P316
DMI_CTX_PRX_N016 DMI_CTX_PRX_N116 DMI_CTX_PRX_N216 DMI_CTX_PRX_N316
DMI_CTX_PRX_P016 DMI_CTX_PRX_P116 DMI_CTX_PRX_P216 DMI_CTX_PRX_P316
FDI_CTX_PRX_N016 FDI_CTX_PRX_N116 FDI_CTX_PRX_N216 FDI_CTX_PRX_N316 FDI_CTX_PRX_N416 FDI_CTX_PRX_N516 FDI_CTX_PRX_N616 FDI_CTX_PRX_N716
FDI_CTX_PRX_P016 FDI_CTX_PRX_P116
C C
FDI_CTX_PRX_P216 FDI_CTX_PRX_P316 FDI_CTX_PRX_P416 FDI_CTX_PRX_P516 FDI_CTX_PRX_P616 FDI_CTX_PRX_P716
FDI_FSYNC016 FDI_FSYNC116
FDI_INT16
FDI_LSYNC016 FDI_LSYNC116
(1) EDP_COMPIO use 4mil trace to RC1 (2) EDP_ICOMPO use 12mil to RC1
B B
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_FSYNC0 FDI_FSYNC1
FDI_INT
FDI_LSYNC0 FDI_LSYNC1
EDP_COMP
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9] PEG_TX#[10] PEG_TX#[11]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
DP Compensation
+1.05V_RUN_VTT
12
RC1
RC1
24.9_0402_1%~D
24.9_0402_1%~D
EDP_COMP
eDP_COMPIO and I COMPO signals sh ould be shorted n ear
A A
balls and routed with typical im pedance <25 mohms
5
PEG_ICOMPI and R COMPO signals sh ould be shorted a nd routed with - max lengt h = 500 mils - t ypical impedance = 43 mohms PEG_ICOMPO signa ls should be rou ted with - max le ngth = 500 mils
- typical impeda nce = 14.5 mohms
4
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2. (2)PEG_ICOMPO use 12mil connect to RC2
PEG_COMP
J22 J21 H22
PEG_CRX_GTX_N[0..15] 46
PEG_CRX_GTX_P[0..15] 46
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]
PEG_CRX_GTX_N0
K33
PEG_CRX_GTX_N1
M35
PEG_CRX_GTX_N2
L34
PEG_CRX_GTX_N3
J35
PEG_CRX_GTX_N4
J32
PEG_CRX_GTX_N5
H34
PEG_CRX_GTX_N6
H31
PEG_CRX_GTX_N7
G33
PEG_CRX_GTX_N8
G30
PEG_CRX_GTX_N9
F35
PEG_CRX_GTX_N10
E34
PEG_CRX_GTX_N11
E32
PEG_CRX_GTX_N12
D33
PEG_CRX_GTX_N13
D31
PEG_CRX_GTX_N14
B33
PEG_CRX_GTX_N15
C32
PEG_CRX_GTX_P0
J33
PEG_CRX_GTX_P1
L35
PEG_CRX_GTX_P2
K34
PEG_CRX_GTX_P3
H35
PEG_CRX_GTX_P4
H32
PEG_CRX_GTX_P5
G34
PEG_CRX_GTX_P6
G31
PEG_CRX_GTX_P7
F33
PEG_CRX_GTX_P8
F30
PEG_CRX_GTX_P9
E35
PEG_CRX_GTX_P10
E33
PEG_CRX_GTX_P11
F32
PEG_CRX_GTX_P12
D34
PEG_CRX_GTX_P13
E31
PEG_CRX_GTX_P14
C33
PEG_CRX_GTX_P15
B32
PEG_CTX_GRX_C_N0
M29
PEG_CTX_GRX_C_N1
M32
PEG_CTX_GRX_C_N2
M31
PEG_CTX_GRX_C_N3
L32
PEG_CTX_GRX_C_N4
L29
PEG_CTX_GRX_C_N5
K31
PEG_CTX_GRX_C_N6
K28
PEG_CTX_GRX_C_N7
J30
PEG_CTX_GRX_C_N8
J28
PEG_CTX_GRX_C_N9
H29
PEG_CTX_GRX_C_N10
G27
PEG_CTX_GRX_C_N11
E29
PEG_CTX_GRX_C_N12
F27
PEG_CTX_GRX_C_N13
D28
PEG_CTX_GRX_C_N14
F26
PEG_CTX_GRX_C_N15
E25
PEG_CTX_GRX_C_P0
M28
PEG_CTX_GRX_C_P1
M33
PEG_CTX_GRX_C_P2
M30
PEG_CTX_GRX_C_P3
L31
PEG_CTX_GRX_C_P4
L28
PEG_CTX_GRX_C_P5
K30
PEG_CTX_GRX_C_P6
K27
PEG_CTX_GRX_C_P7
J29
PEG_CTX_GRX_C_P8
J27
PEG_CTX_GRX_C_P9
H28
PEG_CTX_GRX_C_P10
G28
PEG_CTX_GRX_C_P11
E28
PEG_CTX_GRX_C_P12
F28
PEG_CTX_GRX_C_P13
D27
PEG_CTX_GRX_C_P14
E26
PEG_CTX_GRX_C_P15
D25
PEG Compensation
+1.05V_RUN_VTT
12
RC2
RC2
24.9_0402_1%~D
24.9_0402_1%~D
PEG_COMP
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
PEG_CTX_GRX_C_P0 PEG_CTX_GRX_C_N0 PEG_CTX_GRX_N0
PEG_CTX_GRX_C_P1 PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_P2 PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_P3 PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_P4 PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_P5 PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_P6 PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_P7 PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_P8 PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_P9 PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_P10 PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_P11 PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_P12 PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_P13 PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_P14 PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_P15 PEG_CTX_GRX_C_N15
3
PEG_CTX_GRX_P[0..15] 46
PEG_CTX_GRX_N[0..15] 46
CC49 0.22U_0402_16V7K~DCC49 0.22U_0402_16V7K~D
12
CC33 0.22U_0402_16V7K~DCC33 0.22U_0402_16V7K~D
12
CC50 0.22U_0402_16V7K~DCC50 0.22U_0402_16V7K~D
12
CC34 0.22U_0402_16V7K~DCC34 0.22U_0402_16V7K~D
12
CC51 0.22U_0402_16V7K~DCC51 0.22U_0402_16V7K~D
12
CC35 0.22U_0402_16V7K~DCC35 0.22U_0402_16V7K~D
12
CC52 0.22U_0402_16V7K~DCC52 0.22U_0402_16V7K~D
12
CC36 0.22U_0402_16V7K~DCC36 0.22U_0402_16V7K~D
12
CC53 0.22U_0402_16V7K~DCC53 0.22U_0402_16V7K~D
12
CC37 0.22U_0402_16V7K~DCC37 0.22U_0402_16V7K~D
12
CC54 0.22U_0402_16V7K~DCC54 0.22U_0402_16V7K~D
12
CC38 0.22U_0402_16V7K~DCC38 0.22U_0402_16V7K~D
12
CC55 0.22U_0402_16V7K~DCC55 0.22U_0402_16V7K~D
12
CC39 0.22U_0402_16V7K~DCC39 0.22U_0402_16V7K~D
12
CC56 0.22U_0402_16V7K~DCC56 0.22U_0402_16V7K~D
12
CC40 0.22U_0402_16V7K~DCC40 0.22U_0402_16V7K~D
12
CC57 0.22U_0402_16V7K~DCC57 0.22U_0402_16V7K~D
1 2
CC41 0.22U_0402_16V7K~DCC41 0.22U_0402_16V7K~D
1 2
CC58 0.22U_0402_16V7K~DCC58 0.22U_0402_16V7K~D
1 2
CC42 0.22U_0402_16V7K~DCC42 0.22U_0402_16V7K~D
1 2
CC59 0.22U_0402_16V7K~DCC59 0.22U_0402_16V7K~D
1 2
CC43 0.22U_0402_16V7K~DCC43 0.22U_0402_16V7K~D
1 2
CC60 0.22U_0402_16V7K~DCC60 0.22U_0402_16V7K~D
1 2
CC44 0.22U_0402_16V7K~DCC44 0.22U_0402_16V7K~D
1 2
CC61 0.22U_0402_16V7K~DCC61 0.22U_0402_16V7K~D
1 2
CC45 0.22U_0402_16V7K~DCC45 0.22U_0402_16V7K~D
1 2
CC62 0.22U_0402_16V7K~DCC62 0.22U_0402_16V7K~D
1 2
CC46 0.22U_0402_16V7K~DCC46 0.22U_0402_16V7K~D
1 2
CC63 0.22U_0402_16V7K~DCC63 0.22U_0402_16V7K~D
1 2
CC47 0.22U_0402_16V7K~DCC47 0.22U_0402_16V7K~D
1 2
CC64 0.22U_0402_16V7K~DCC64 0.22U_0402_16V7K~D
1 2
CC48 0.22U_0402_16V7K~DCC48 0.22U_0402_16V7K~D
1 2
2
PEG_CTX_GRX_P0
PEG_CTX_GRX_P1 PEG_CTX_GRX_N1
PEG_CTX_GRX_P2 PEG_CTX_GRX_N2
PEG_CTX_GRX_P3 PEG_CTX_GRX_N3
PEG_CTX_GRX_P4 PEG_CTX_GRX_N4
PEG_CTX_GRX_P5 PEG_CTX_GRX_N5
PEG_CTX_GRX_P6 PEG_CTX_GRX_N6
PEG_CTX_GRX_P7 PEG_CTX_GRX_N7
PEG_CTX_GRX_P8 PEG_CTX_GRX_N8
PEG_CTX_GRX_P9 PEG_CTX_GRX_N9
PEG_CTX_GRX_P10
PEG_CTX_GRX_N10
PEG_CTX_GRX_P11
PEG_CTX_GRX_N11
PEG_CTX_GRX_P12
PEG_CTX_GRX_N12
PEG_CTX_GRX_P13
PEG_CTX_GRX_N13
PEG_CTX_GRX_P14
PEG_CTX_GRX_N14
PEG_CTX_GRX_P15
PEG_CTX_GRX_N15
2
1
JCPU1I
JCPU1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
VSS
VSS
VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285
F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (1/6)
Sandy Bridge (1/6)
Sandy Bridge (1/6)
LA-6592P
LA-6592P
LA-6592P
6 75Thursday, January 13, 2011
6 75Thursday, January 13, 2011
6 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Follow DG Rev0.71 SM_DRAMPWROK topology
+3.3V_ALW_PCH
UC2
UC2
RUNPWROK41,42
+3.3V_ALW_PCH
D D
+1.05V_RUN_VTT
C C
1 2
RC18 200_0402_5%~DRC18 200_0402_5%~D
PM_DRAM_PWR GD16
1 2
RC126 56_0402_5%~D@RC126 56_0402_5%~D@
1 2
RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@
1 2
RC44 62_0402_5%~DRC44 62_0402_5%~D
H_PROCHOT#42,58,60
H_THERMTRIP#22
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
1
2
RUN_ON_CPU1.5VS3#11,44
CPU_DETECT#41
H_PECI18
1 2
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC129 0_0402_5%~D@ RC129 0_0402_5%~D@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC156
CC156
1 2
5
P
B
A
RUNPWROK_AND PM_DRAM_PWR GD_CPU
4
O
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
H_CATERR#
H_PROCHOT#_R
Close to JCBU1
H_THERMTRIP#_R
2
C26
AN34
AL33
AN33
AL32
AN32
+1.5V_CPU_VDDQ
1 2 13
D
D
G
G
S
S
JCPU1B
JCPU1B
PROC_SELECT#
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
39_0402_5%~D
39_0402_5%~D
12
RC64
RC64
QC1
QC1
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
place RC129 near CPU
H_PM_SYNC16
B B
H_CPUPWRGD18
@
@
1 2
RC25
RC25
Buffered reset to CPU
A A
PCH_PLTRST#14,17
5
H_PM_SYNC
VCCPWRGOOD_0_R
0_0402_5%~D
0_0402_5%~D
PM_DRAM_PWR GD_CPU
PCH_PLTRST#_R
+3.3V_RUN
5
UC1
UC1
1
P
NC
4
Y
2
A
G
3
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Open drain buffer
PCH_PLTRST#_BUF PCH_PLTRST#_R
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWR OK
AR33
RESET#
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
+1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CC140
CC140
2
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
4
RC12
RC12 200_0402_5%~D
200_0402_5%~D
1 2
RC28 130_0402_5%~DRC28 130_0402_5%~D
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
12
RC11
@RC11
@
0_0402_5%~D
0_0402_5%~D
4
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
DDR3
MISC
DDR3
MISC
PRDY#
PREQ#
TCK TMS
TRST#
TDI
TDO
DBR#
BPM#[0]
JTAG & BPM
JTAG & BPM
BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
3
+3.3V_ALW_PCH
12
RC124
@RC124
@
1K_0402_5%~D
1K_0402_5%~D
SYS_PWROK_XDP
The resistor for HOOK2 should be placed such that the st ub is very small on CFG0 net
H_CPUPWRGD
SIO_PWRBTN#_R14,16
CFG0
SYS_PWROK16,41
DDR_XDP_WAN_ SMBDAT12,13,14,15,28,36 DDR_XDP_WAN_ SMBCLK12,13,14,15,28,36
Keep R1132, R1133, R1136-R119 for slew rate control.
0_0402_5%~D
1 2 1 2
1 2 1 2
Max 500mils
RC26
RC26
@
@
RC30
RC30 RC31 0_0402_5%~D@RC31 0_0402_5%~D@ RC33 0_0402_5%~D@RC33 0_0402_5%~D@ RC34 0_0402_5%~D@RC34 0_0402_5%~D@ RC36 0_0402_5%~D@RC36 0_0402_5%~D@ RC37 0_0402_5%~D@RC37 0_0402_5%~D@ RC38 0_0402_5%~D@RC38 0_0402_5%~D@ RC39 0_0402_5%~D@RC39 0_0402_5%~D@
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
12
RC130
RC130 10K_0402_5%~D
10K_0402_5%~D
3
12
0_0402_5%~D@
0_0402_5%~D@
0_0402_5%~D
0_0402_5%~D
CPU_DMI#
A27
CPU_DPLL
A16
CPU_DPLL#
A15
R8
AK1 A5 A4
SM_RCOMP2 --> 15mil SM_RCOMP1/0 --> 20mil
AP29 AP27
AR26 AR27 AP30
AR28 AP26
AL35
AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32
RC15 0_0402_5%~D@RC15 0_0402_5%~D@
@
@
RC16
RC16
@
@
RC17 0_0402_5%~D
RC17 0_0402_5%~D
DDR3_DRAMRST#_CP U
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
XDP_PRDY# XDP_PREQ#
XDP_TCLK XDP_TMS XDP_TRST#
XDP_TDI_R XDP_TDO_R
XDP_DBRESET#_R
XDP_OBS0_R XDP_OBS1_R XDP_OBS2_R
XDP_OBS4_R XDP_OBS4 XDP_OBS5_R XDP_OBS6_R XDP_OBS7_R
RC13
@RC13
@
CPU_DMI
A28
For ESD concern, please put near CPU
VCCPWRGOOD_0_R
Avoid stub in th e PWRGD path while placing re sistors RC25 & R C130
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1 2
RC5 1K_0402_5%~DRC5 1K_0402_5%~D
1 2
RC6 0_0402_5%~D@ RC6 0_0402_5%~D@
1 2
RC7 1K_0402_5%~DRC7 1K_0402_5%~D
1 2
RC9 0_0402_5%~D@ RC9 0_0402_5%~D@
1 2
RC125 0_0402_5%~DRC125 0_0402_5%~D
1 2
RC127 0_0402_5%~DRC127 0_0402_5%~D
CLK_CPU_DMI 15 CLK_CPU_DMI# 15
CLK_CPU_DPLL 15 CLK_CPU_DPLL# 15
RC50
RC50
4.99K_0402_1%~D
4.99K_0402_1%~D
DDR_HVREF_RST_PCH15
DDR_HVREF_RST_GATE42
XDP_DBRESET#
XDP_OBS0
XDP_OBS1 XDP_OBS2 XDP_OBS3X DP_OBS3_R
XDP_OBS5 XDP_OBS6 XDP_OBS7
+1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
CC65
CC65
2
2
Place near JXDP1
CFG109 CFG119
1 2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@
S
S
12
XDP_DBRESET# 14,16
SM_RCOMP2 SM_RCOMP1 SM_RCOMP0
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC66
CC66
XDP_PREQ# XDP_PRDY#
XDP_OBS0 XDP_OBS1
XDP_OBS2 XDP_OBS3
CFG10 CFG11
XDP_OBS4 XDP_OBS5
XDP_OBS6 XDP_OBS7
H_CPUPWRGD_XD P CFD_PWRBTN#_X DP
SYS_PWROK_XDP
DDR_XDP_WAN_ SMBDAT_R1 DDR_XDP_WAN_ SMBCLK_R1
XDP_TCLK
D
D
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
1
CC177
CC177
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
RC46
@RC46
@
RC47 0_0402_5%~D@RC47 0_0402_5%~D@
XDP_TDO_R XDP_TDO
+1.05V_RUN_VTT +1.05V_RUN_VTT
DDR3_DRAMRST# 12
DDR_HVREF_RST
1 2
0_0402_5%~D
0_0402_5%~D
1 2
1 2
@
@
RC23 0_0402_5%~D
RC23 0_0402_5%~D
1 2
0_0402_5%~D
RC24
RC24
25.5_0402_1%~D
25.5_0402_1%~D
2
0_0402_5%~D
200_0402_1%~D
200_0402_1%~D
12
RC43
RC43
RC45
RC45
@
@
140_0402_1%~D
140_0402_1%~D
12
12
RC42
RC42
JXDP1
@JXDP1
@
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
CLK_XDP
CLK_XDP#
XDP_TDIXDP_TDI_R
1
2
GND1 OBSFN_C0 OBSFN_C1
GND3
OBSDATA_C0 OBSDATA_C1
GND5
OBSDATA_C2 OBSDATA_C3
GND7 OBSFN_D0 OBSFN_D1
GND9
OBSDATA_D0 OBSDATA_D1
GND11 OBSDATA_D2 OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TRST#
TMS
GND17
XDP_RST#_R
@
@
CLK_XDP_ITP9
CLK_XDP_ITP#9
RC8 1K_0402_5%~DRC8 1K_0402_5%~D
1 2
RH107 0_0402 _5%~D
RH107 0_0402 _5%~D
1 2
RH106 0_0402 _5%~D@RH106 0_0402_5%~D@
TD0
TDI
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
12
1 2
RH109 0_0402_5%~D@RH109 0_0402_5%~D@
1 2
RH108 0_0402_5%~D@RH108 0_0402_5%~D@
CFG16 CFG17
CFG0 CFG1
CFG2 CFG3
CFG8 CFG9
CFG4 CFG5
CFG6 CFG7
CLK_XDP CLK_XDP#
XDP_RST#_RXDP_HOOK2 XDP_DBRESET#
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS
CFG16 9 CFG17 9
CFG0 9 CFG1 9
CFG2 9 CFG3 9
CFG8 9 CFG9 9
CFG4 9 CFG5 9
CFG6 9 CFG7 9
PLTRST_XDP# 17
CLK_CPU_ITP 15
CLK_CPU_ITP# 15
PU/PD for JTAG signals
+3.3V_RUN
XDP_DBRESET#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
RC19 1K_0402_5%~DRC19 1K_0402_5%~D
RC27 51_0402_1%~DRC27 51_0402_1%~D
RC29 51_0402_1%~DRC29 51_0402_1%~D
RC32 51_0402_1%~D@RC32 51_0402_1%~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D
RC40
RC40
RC41
RC41
12
12
12
12
12
12
51_0402_1%~D
51_0402_1%~D
12
51_0402_1%~D
51_0402_1%~D
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (2/6)
Sandy Bridge (2/6)
Sandy Bridge (2/6)
LA-6592P
LA-6592P
LA-6592P
7 75Thursday, January 13, 2011
7 75Thursday, January 13, 2011
7 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
JCPU1C
JCPU1C
D D
C C
B B
DDR_A_D[0..63]12
DDR_A_BS012 DDR_A_BS112 DDR_A_BS212
DDR_A_CAS#12 DDR_A_RAS#12 DDR_A_WE#12
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_CAS# DDR_A_RAS# DDR_A_WE#
G10
N10
M10
AG6 AG5 AK6 AK5 AH5 AH6
AK8
AK9 AH8 AH9 AL9
AL8 AP11 AN11
AL12 AM12 AM11
AL11 AP12 AN12
AJ14 AH14
AL15 AK15
AL14 AK14
AJ15 AH15
AE10 AF10
AE8 AD9 AF9
F10
AJ5 AJ6 AJ8
AJ9
C5 D5 D3 D2 D6 C6 C2 C3
F8
G9
F9
F7 G8 G7
K4
K5
K1
K2 M8
N8 N7
M9 N9 M7
V6
J1 J5 J4 J2
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
4
M_CLK_DDR0
AB6
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]
RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]
SA_CS#[0]
SA_CS#[1] RSVD_TP[7] RSVD_TP[8]
SA_ODT[0]
SA_ODT[1] RSVD_TP[9]
RSVD_TP[10]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
AA6 V9
AA5 AB5 V10
AB4 AA4 W9
AB3 AA3 W10
AK3 AL3 AG1 AH1
AH3 AG3 AG2 AH2
C4 G6 J3 M6 AL6 AM8 AR12 AM15
D4 F6 K3 N6 AL5 AM9 AR11 AM14
AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7
M_CLK_DDR#0 DDR_CKE0_DIMMA
M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA
DDR_CS0_DIMMA# DDR_CS1_DIMMA#
M_ODT0 M_ODT1
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
M_CLK_DDR0 12 M_CLK_DDR#0 12 DDR_CKE0_DIMMA 12
M_CLK_DDR1 12 M_CLK_DDR#1 12 DDR_CKE1_DIMMA 12
DDR_CS0_DIMMA# 12 DDR_CS1_DIMMA# 12
M_ODT0 12 M_ODT1 12
DDR_A_DQS#[0..7] 12
DDR_A_DQS[0..7] 12
DDR_A_MA[0..15] 12
3
DDR_B_D[0..63]13
DDR_B_BS013 DDR_B_BS113 DDR_B_BS213
DDR_B_CAS#13 DDR_B_RAS#13 DDR_B_WE#13
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_B_BS0 DDR_B_BS1 DDR_B_BS2
DDR_B_CAS# DDR_B_RAS# DDR_B_WE#
AM5 AM6 AR3
AN3 AN2 AN1
AN9
AN8 AR6 AR5 AR9
AJ11
AH11
AR8
AJ12
AH12
AT11 AN14 AR14
AT14
AT12 AN15 AR15
AT15
AA10
2
JCPU1D
JCPU1D
M_CLK_DDR2
AE2
SB_CLK[0]
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34]
AP3
SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40] SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
SB_CLK#[0]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]
RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]
SB_CS#[0]
SB_CS#[1] RSVD_TP[17] RSVD_TP[18]
SB_ODT[0]
SB_ODT[1] RSVD_TP[19] RSVD_TP[20]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
AD2 R9
AE1 AD1 R10
AB2 AA2 T9
AA1 AB1 T10
AD3 AE3 AD6 AE6
AE4 AD4 AD5 AE5
D7 F3 K6 N3 AN5 AP9 AK12 AP15
C7 G3 J6 M3 AN6 AP8 AK11 AP14
AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4
M_CLK_DDR#2 DDR_CKE2_DIMMB
M_CLK_DDR3 M_CLK_DDR#3 DDR_CKE3_DIMMB
DDR_CS2_DIMMB# DDR_CS3_DIMMB#
M_ODT2 M_ODT3
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
1
M_CLK_DDR2 13 M_CLK_DDR#2 13 DDR_CKE2_DIMMB 13
M_CLK_DDR3 13 M_CLK_DDR#3 13 DDR_CKE3_DIMMB 13
DDR_CS2_DIMMB# 13 DDR_CS3_DIMMB# 13
M_ODT2 13 M_ODT3 13
DDR_B_DQS#[0..7] 13
DDR_B_DQS[0..7] 13
DDR_B_MA[0..15] 13
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
A A
Sandy Bridge_rPGA_Rev1p0
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (3/6)
Sandy Bridge (3/6)
Sandy Bridge (3/6)
LA-6592P
LA-6592P
LA-6592P
8 75Thursday, January 13, 2011
8 75Thursday, January 13, 2011
8 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
CFG Straps for Processor
CFG2
D D
T22 PAD~D@T22 PAD~D@
T28 PAD~D@ T28 PAD~D@ T29 PAD~D@ T29 PAD~D@ T30 PAD~D@ T30 PAD~D@ T31 PAD~D@ T31 PAD~D@ T33 PAD~D@ T33 PAD~D@ T35 PAD~D@ T35 PAD~D@ T36 PAD~D@ T36 PAD~D@ T37 PAD~D@ T37 PAD~D@ T38 PAD~D@ T38 PAD~D@ T40 PAD~D@ T40 PAD~D@ T41 PAD~D@ T41 PAD~D@ T42 PAD~D@ T42 PAD~D@ T43 PAD~D@ T43 PAD~D@ T44 PAD~D@ T44 PAD~D@ T45 PAD~D@ T45 PAD~D@ T46 PAD~D@ T46 PAD~D@
T47 PAD~D@ T47 PAD~D@ T48 PAD~D@ T48 PAD~D@ T155 PAD~D@T155 PAD~D@
T52 PAD~D@ T52 PAD~D@
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17
RSVD1 RSVD2 RSVD3 RSVD4
+DIMM0_1_VREF_CPU +DIMM0_1_CA_CPU
CFG07 CFG17 CFG27 CFG37 CFG47 CFG57 CFG67 CFG77 CFG87 CFG97 CFG107 CFG117
T9 PAD~D@T9 PAD~D@ T10 PAD~D@T10 PAD~D@ T12 PAD~D@T12 PAD~D@
+VCC_GFXCORE
1 2
RC122 49.9_0402_1%~D@RC 122 49.9_0402_1%~D@
+VCC_CORE
1 2
C C
B B
RC120 49.9_0402_1%~D@RC 120 49.9_0402_1%~D@
RC123 49.9_0402_1%~D@RC 123 49.9_0402_1%~D@
RC121 49.9_0402_1%~D@RC 121 49.9_0402_1%~D@
RC96 1K_0402_5%~D@RC96 1K_0402_5%~D@
RC97 1K_0402_5%~D@RC97 1K_0402_5%~D@
1 2
1 2
1 2
1 2
RSVD1
RSVD3
RSVD2
RSVD4
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
T14 PAD~D@T14 PAD~D@
CFG167 CFG177
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
JCPU1E
JCPU1E
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
VCCIO_SEL
J15
RSVD27
RSVD28 RSVD29 RSVD30 RSVD31 RSVD32
RSVD33 RSVD34 RSVD35
RSVD37 RSVD38 RSVD39 RSVD40
RSVD41 RSVD42 RSVD43 RSVD44 RSVD45
RSVD46 RSVD47 RSVD48 RSVD49 RSVD50
RESERVED
RESERVED
RSVD51 RSVD52
VCC_DIE_SENSE
RSVD54 RSVD55
RSVD56 RSVD57 RSVD58
KEY
L7 AG7 AE7 AK2 W8
AT26 AM33 AJ27
T8 J16 H16 G16
AR35 AT34 AT33 AP35 AR34
B34 A33 A34 B35 C35
AJ32 AK32
AH27
AN35 AM35
AT2 AT1 AR1
B1
T1 PAD~D@T1 PAD~D@ T2 PAD~D@T2 PAD~D@ T3 PAD~D@T3 PAD~D@ T4 PAD~D@T4 PAD~D@ T5 PAD~D@T5 PAD~D@
T6 PAD~D@T6 PAD~D@ T7 PAD~D@T7 PAD~D@ T8 PAD~D@T8 PAD~D@
T11 PAD~D@T11 PAD~D@ T13 PAD~D@T13 PAD~D@ T15 PAD~D@T15 PAD~D@ T16 PAD~D@T16 PAD~D@
T17 PAD~D@T17 PAD~D@ T18 PAD~D@T18 PAD~D@ T19 PAD~D@T19 PAD~D@ T20 PAD~D@T20 PAD~D@ T21 PAD~D@T21 PAD~D@
T23 PAD~D@T23 PAD~D@ T24 PAD~D@T24 PAD~D@ T25 PAD~D@T25 PAD~D@ T26 PAD~D@T26 PAD~D@ T27 PAD~D@T27 PAD~D@
T32 PAD~D@T32 PAD~D@ T34 PAD~D@T34 PAD~D@
T39 PAD~D@T39 PAD~D@
CLK_XDP_ITP 7 CLK_XDP_ITP# 7
T49 PAD~D@T49 PAD~D@ T50 PAD~D@T50 PAD~D@ T51 PAD~D@T51 PAD~D@
T53 PAD~D@T53 PAD~D@
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2
definition matches socket pin map definition 0:Lane Reversed
Display Port Presence Strap
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is connected to the Embedded Display Port
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG4
CFG6
CFG5
RC54
@RC54
@
1K_0402_5%~D
1K_0402_5%~D
12
RC51
@RC51
@
1K_0402_5%~D
1K_0402_5%~D
12
RC52
@RC52
@
1K_0402_5%~D
1K_0402_5%~D
follow DG0.9 change to 1Kohm 5%
12
12
RC53
@RC53
@
1K_0402_5%~D
1K_0402_5%~D
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
CFG7
12
RC56
@RC56
@
1K_0402_5%~D
1K_0402_5%~D
PEG DEFER TRAINING
1: (Default) PEG Train immediately
CFG7
following xxRESETB de assertion
A A
0: PEG Wait for BIOS for training
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (4/6)
Sandy Bridge (4/6)
Sandy Bridge (4/6)
LA-6592P
LA-6592P
LA-6592P
9 75Thursday, January 13, 2011
9 75Thursday, January 13, 2011
9 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
+VCC_CORE
CC129
CC129 470U_D2_2V-M~D
470U_D2_2V-M~D
CC133 470U_D2_2V-M~D
470U_D2_2V-M~D
1
CC75
CC75 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC71
CC71 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC111
CC111 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
CC116
CC116 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
CC121
CC121 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
+
2 3
1
CC67
+VCC_CORE
+VCC_CORE
CC67 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC87
CC87 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC110
CC110 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
CC115
CC115 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
CC120
CC120 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
CC125
CC125 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
+
+
2 3
1
+
@+CC133
@
2 3
D D
C C
B B
A A
CC130
@+CC130
@
470U_D2_2V-M~D
470U_D2_2V-M~D
1
+
+
CC134
CC134 470U_D2_2V-M~D
470U_D2_2V-M~D
2 3
1
CC68
CC68 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC72
CC72 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC112
CC112 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
CC117
CC117 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
CC122
CC122 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
+
+
2 3
1
CC76
CC76 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC88
CC88 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
2
1
2
1
2
CC131
CC131 470U_D2_2V-M~D
470U_D2_2V-M~D
CC113
CC113 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC118
CC118 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC123
CC123 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
+
+
CC132
CC132 470U_D2_2V-M~D
470U_D2_2V-M~D
2 3
1
CC77
CC77 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
CC73
CC73 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
2
1
2
1
2
4
CC114
CC114 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC119
CC119 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC124
CC124 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
3
POWER
JCPU1F
JCPU1F
+VCC_CORE
53A 8.5A
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
POWER
PEG AND DDR
PEG AND DDR
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8
VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24
VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39
VCCIO40
VIDALERT#
VIDSCLK VIDSOUT
VCC_SENSE VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12
E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
J23
AJ29 AJ30 AJ28
AJ35 AJ34
VTT_SENSE_R
B10
VSSIO_SENSE_R
A10
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
1
CC78
CC78
2
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
1
CC89
CC89
2
2
H_CPU_SVIDALRT# VIDSCLK VIDSOUT
SVID note: VIDAL ERT# trace routing need to be routed betwee n VIDSCLK and VIDS OUT signals
VCCSENSE_R VSSSENSE_R
RC67 0_0402_5%~D@RC67 0_0402_5%~D@ RC68 0_0402_5%~D@RC68 0_0402_5%~D@
RC132 0_0402_5%~D@RC132 0_0402_5%~D@ RC133 0_0402_5%~D@RC133 0_0402_5%~D@
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
CC79
CC79
CC69
CC69
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
@CC91
@
@CC90
@
1
CC91
CC90
2
Note: Place the PU resistors clo se to CPU R1555 close to C PU 300 - 1500mil s
H_CPU_SVIDALRT#
VIDSCLK 58
Place RC66, RC70near CPU
1 2 1 2
1 2 1 2
22U_0805_6.3VAM~D
1
1
CC80
CC80
CC81
CC81
2
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
@CC92
@
@CC93
1
2
+1.05V_RUN_VTT
@
1
CC92
CC93
2
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D
12
RC63
RC63 130_0402_1%~D
130_0402_1%~D
VIDSOUT 58
VTT_SENSE 57 VTT_GND 57
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
1
CC82
CC82
2
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
1
CC107
CC107
+
+
+
+
2
2
CAD Note: Place the PU resistors close to CPU R1558 close to C PU 300 - 1500mil s
+VCC_CORE
12
RC66
RC66 100_0402_1%~D
100_0402_1%~D
12
RC70
RC70 100_0402_1%~D
100_0402_1%~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
CC83
CC83
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
CC108
CC108
2
VCCSENSE 58
VSSSENSE 58
1
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
CC84
CC84
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
CC109
CC109
+
+
@
@
+1.05V_RUN_VTT
12
22U_0805_6.3VAM~D
CC85
CC85
RC60
RC60 75_0402_1%~D
75_0402_1%~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
CC70
CC70
2
VIDALERT_N 58
CC86
CC86
Iccmax current c hanged for PDDG Rev0.7
CPU Power Rail Table
Voltage Rail
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
+1.5V_MEM 1.5
Description
*
5A to Mem contro ller(+1.5V_CPU_V DDQ) 5-6A to 2 DIMMs/ channel 2-5A to +1.5V_RU N & +0.75V_DDR_V TT
Voltage
0.65-1.3
1.05
0.0-1.1
1.8
1.5
0.65-0.9
+1.05V_RUN_VTT
S0 Iccmax Current (A)
53
8.5
26
3
5
6
12-16
*
Sandy Bridge_rPGA_Rev1p0
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Sandy Bridge (5/6)
Sandy Bridge (5/6)
Sandy Bridge (5/6)
LA-6592P
LA-6592P
LA-6592P
10 75Thursday, January 13, 2011
10 75Thursday, January 13, 2011
10 75Thursday, January 13, 2011
1
1.0
1.0
1.0
Sandy Bridge_rPGA_Rev1p0
DELL CONFIDENTIAL/PROPRIETARY
5
4
3
2
1
+1.5V_CPU_VDDQ Source
+15V_ALW+3.3V_ALW2
12
RC74
RC74 100K_0402_5%~D
61
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC139
CC139
CC148
CC148
1
2
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
1
CC176
CC176
+
+
2
100K_0402_5%~D
RUN_ON_CPU1.5VS3#
QC4A
QC4A DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
JCPU1G
JCPU1G
26A
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
3A
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
5
POWER
POWER
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
D D
RUN_ON37,41,44,55,63
CPU1.5V_S3_GATE42 RUN_ON_CPU1.5VS3# 7,44
+VCC_GFXCORE
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC137
CC137
CC138
CC138
1
1
1
2
2
C C
1
2
B B
+1.8V_RUN
A A
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC151
CC151
CC141
CC141
1
1
2
2
1 2
RC77 0_0402_5%~D@RC77 0_0402_5%~D@
1 2
RC79 0_0402_5%~D@RC79 0_0402_5%~D@
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC145
CC145
CC144
CC144
1
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC152
CC152
CC153
CC153
1
2
10U_0805_4VAM~D
10U_0805_4VAM~D
1
CC173
CC173
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC146
CC146
CC147
CC147
1
2
1
2
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC175
CC175
CC174
CC174
2
+1.5V_MEM +1.5V_CPU_VDDQ
12
RC72
RC72 100K_0402_5%~D
100K_0402_5%~D
RUN_ON_CPU1.5VS3
3
QC4B
QC4B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID1
SM_VREF
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8
FC_C22
QC3
QC3
AO4728L_SO8~D
AO4728L_SO8~D
8 7 6 5
4
1
CC136
CC136 4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
AK35 AK34
AL1
+V_SM_VREF should have 10 mil trace width
5A
AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1
6A
M27 M26 L26 J26 J25 J24 H26 H25
H23
C22 C24
1 2 3
1 2
RC138 0_0402_5%~D@RC138 0_0402_5%~D@
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
12
CC135
CC135
1
2
VCC_AXG_SENSE 58 VSS_AXG_SENSE 58
+V_SM_VREF_CNT
10U_0805_4VAM~D
10U_0805_4VAM~D
1
1
CC161
CC161
2
2
1
2
H_FC_C22
20K_0402_5%~D
@RC73
20K_0402_5%~D
@
RC73
10U_0805_4VAM~D
10U_0805_4VAM~D
CC162
CC162
10U_0805_4VAM~D
10U_0805_4VAM~D
CC168
CC168
+V_DDR_REF
10U_0805_4VAM~D
10U_0805_4VAM~D
1
1
CC163
CC163
2
2
10U_0805_4VAM~D
10U_0805_4VAM~D
1
1
CC169
CC169
2
2
RC137 0_0402 _5%~D@RC137 0_0402_5%~D@
VCCSA_VID_1 61
RUN_ON_CPU1.5VS3
10U_0805_4VAM~D
10U_0805_4VAM~D
1
CC164
CC164
2
10U_0805_4VAM~D
10U_0805_4VAM~D
1
CC170
CC170
2
1 2
RC134 0_0402_5%~D@RC134 0_0402_5%~D@
+1.5V_CPU_VDDQ
10U_0805_4VAM~D
10U_0805_4VAM~D
1
CC165
CC165
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CC171
@
1
CC171
+
+
2
10K_0402_5%~D
10K_0402_5%~D
12
NTR4503NT1G_SOT23-3~D
NTR4503NT1G_SOT23-3~D
1 2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
CC167
CC167
CC166
CC166
+
+
2
CC172
CC172 330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
RC83
RC83
QC5
QC5
1
3
12
2
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
12
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
12
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
12
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
12
PJP1
@PJP1
@
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP2
@PJP2
@
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+VCC_SA
+GND_VCC_SA 61
+VCCSA_SENSE 61
+V_SM_VREF_CNT
RC78
RC78 100K_0402_5%~D
100K_0402_5%~D
+1.5V_MEM
JCPU1H
JCPU1H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
VSS
VSS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (6/6)
Sandy Bridge (6/6)
Sandy Bridge (6/6)
LA-6592P
LA-6592P
LA-6592P
11 75Thursday, January 13, 2011
11 75Thursday, January 13, 2011
11 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Note: Check voltage tolerance of VREF_DQ at the DIMM socket
DDR_A_DQS#[0..7]8
DDR_A_D[0..63]8
D D
DDR_A_DQS[0..7]8
DDR_A_MA[0..15]8
Layout Note: Place near JDIMMA
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD3
CD3
2
C C
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD7
CD7
1
1
2
2
B B
+0.75V_DDR_VTT
A A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
CD8
CD8
Layout Note: Place near JDIMMA.203,204
1
2
CD5
CD5
CD4
CD4
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD9
CD9
CD10
CD10
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD17
CD17
CD18
CD18
2
All VREF traces should have 10 mil trace width
Populate RD1 for Intel DDR3 VREFDQ multiple methods M1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD6
CD6
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD11
CD11
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD19
CD19
2
10U_0603_6.3V6M~D
CD12
CD12
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD20
CD20
2
+V_DDR_REF
+DIMM0_1_VREF_CPU
330U_SX_2VY~D
330U_SX_2VY~D
@CD13
@
1
CD13
CD14
CD14
+
+
2
4
1 2
RD1 0_0402_5%~D@RD1 0_0402_5%~D@
1 2
RD7 0_0402_5%~D@RD7 0_0402_5%~D@
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
1 2
1 2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
+3.3V_RUN
+DIMM0_1_VREF_DQ
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
CD1
CD1
2
DDR_CKE0_DIMMA8
DDR_A_BS28
M_CLK_DDR08
DDR_A_BS08
DDR_A_WE#8
DDR_A_CAS#8
DDR_CS1_DIMMA#8
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD21
CD21
2
3
JDIMM1
JDIMM1
1
VREF_DQ
3
DDR_A_D0
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_A_D1
1
CD2
CD2
DDR_A_D2
2
DDR_A_D3
DDR_A_D8 DDR_A_D9 DDR_A_D13
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_D26 DDR_A_D27
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_BS2
DDR_A_MA3
M_CLK_DDR0 M_CLK_DDR#0
DDR_A_MA10 DDR_A_BS0
DDR_A_WE# DDR_A_CAS#
DDR_A_MA13 DDR_CS1_DIMMA#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_D58 DDR_A_D59
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
CD22
CD22
+0.75V_DDR_VTT
2
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
FOX_AS0A626-U4SN-7F
FOX_AS0A626-U4SN-7F
CONN@
CONN@
change footprint.
VSS DQ4 DQ5 VSS
DQS0#
DQS0
VSS DQ6 DQ7 VSS
DQ12 DQ13
VSS DM1
RESET#
VSS
DQ14 DQ15
VSS
DQ20 DQ21
VSS DM2 VSS
DQ22 DQ23
VSS
DQ28 DQ29
VSS
DQS3#
DQS3
VSS
DQ30 DQ31
VSS
CKE1
VDD
A15
A14 VDD
A11
VDD
VDD
VDD CK1
CK1#
VDD BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
VDD
VREF_CA
VSS
DQ36 DQ37
VSS DM4 VSS
DQ38 DQ39
VSS
DQ44 DQ45
VSS
DQS5#
DQS5
VSS
DQ46 DQ47
VSS
DQ52 DQ53
VSS DM6 VSS
DQ54 DQ55
VSS
DQ60 DQ61
VSS
DQS7#
DQS7
VSS
DQ62 DQ63
VSS
EVENT#
SDA SCL VTT
GND2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78 80 82 84 86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102 104 106 108 110 112 114 116 118 120 122
NC
124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
2-3A to 1 DIMMs/channel
+1.5V_MEM+1.5V_MEM
DDR_A_D4 DDR_A_D5
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D6 DDR_A_D7
DDR_A_D12
DDR3_DRAMRST#_R
DDR_A_D14 DDR_A_D15
DDR_A_D20DDR_A_D16 DDR_A_D21
DDR_A_D22 DDR_A_D23
DDR_A_D28 DDR_A_D29
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_A_MA15 DDR_A_MA14
DDR_A_MA11DDR_A_MA12 DDR_A_MA7DDR_A_MA9
DDR_A_MA6DDR_A_MA8 DDR_A_MA4DDR_A_MA5
DDR_A_MA2 DDR_A_MA0DDR_A_MA1
M_CLK_DDR1 M_CLK_DDR#1
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# M_ODT0
M_ODT1
DDR_A_D36 DDR_A_D37
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
+0.75V_DDR_VTT
M_CLK_DDR1 8
M_CLK_DDR#1 8M_CLK_DDR#08
DDR_A_BS1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 8
M_ODT0 8
M_ODT1 8
2
JDIMMA H=5.2
DDR3_DRAMRST#_R
DDR_CKE1_DIMMA 8
+DIMM0_1_VREF_CA
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD15
CD15
1
2
DDR_XDP_WAN_ SMBDAT 7,13,14,15,28,36
DDR_XDP_WAN_ SMBCLK 7,13,14,15,28,36
RD29 0_0402_5%~D@ RD29 0_0402_5%~D@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD16
CD16
1
2
1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D
1 2
1 2
RD31 0_0402_5%~D@RD31 0_0402_5%~D@
+1.5V_MEM
12
RD27
RD27 1K_0402_1%~D
1K_0402_1%~D
+V_DDR_REF
+DIMM0_1_CA_CPU
1
DDR3_DRAMRST# 7DDR3_DRAMRST#_R13
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-6592P
LA-6592P
LA-6592P
12 75Thursday, January 13, 2011
12 75Thursday, January 13, 2011
12 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
All VREF traces should have 10 mil trace width
DDR_B_DQS#[0..7]8
DDR_B_D[0..63]8
DDR_B_DQS[0..7]8
D D
C C
B B
A A
DDR_B_MA[0..15]8
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD29
CD29
1
2
Layout Note: Place near JDIMMB.203,204
+0.75V_DDR_VTT
1
2
CD26
CD26
CD25
CD25
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD30
CD30
CD31
CD31
1
1
1
2
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD40
CD40
CD39
CD39
2
Layout Note: Place near JDIMMB
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD27
CD27
CD28
CD28
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD32
CD32
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD33
CD33
CD34
CD34
1
2
CD41
CD41
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD42
CD42
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
Populate RD4 for Intel DDR3 VREFDQ multiple methods M1
330U_SX_2VY~D
330U_SX_2VY~D
@CD35
@
1
CD36
CD36
CD35
+
+
2
4
+DIMM0_1_VREF_DQ
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
2
Note: Check voltage tolerance of VREF_DQ at the DIMM socket
+3.3V_RUN
RD5 10K_04 02_5%~DRD5 10K_0402_5%~D
12
CD23
CD23
DDR_CKE2_DIMMB8
DDR_CS3_DIMMB#8
+3.3V_RUN
1
2
DDR_B_BS28
M_CLK_DDR28 M_CLK_DDR#28
DDR_B_BS08
DDR_B_WE#8
DDR_B_CAS#8
12
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD24
CD24
10K_0402_5%~D
10K_0402_5%~D
DDR_B_D0 DDR_B_D1
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
M_CLK_DDR2 M_CLK_DDR#2
DDR_B_MA10 DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
DDR_B_MA13 DDR_CS3_DIMMB#
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_D42 DDR_B_D43
DDR_B_D48 DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_D58 DDR_B_D59
+0.75V_DDR_VTT
RD6
RD6
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
CD43
CD43
2
3
+1.5V_MEM
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
2
CD44
CD44
JDIMM2
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
FOX_AS0A626-U8SN-7F
FOX_AS0A626-U8SN-7F
CONN@
CONN@
DQ4 DQ5 VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1 RAS#
VDD
ODT0
VDD ODT1
VDD
VREF_CA
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
2
2-3A to 1 DIMMs/channel
+1.5V_MEM
2
VSS
A15 A14
A11
S0#
A7
A6 A4
A2 A0
NC
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
DDR_B_D4 DDR_B_D5
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D6 DDR_B_D7
DDR_B_D12 DDR_B_D13
DDR3_DRAMRST#_R
DDR_B_D14 DDR_B_D15
DDR_B_D20 DDR_B_D21
DDR_B_D22 DDR_B_D23
DDR_B_D28 DDR_B_D29
DDR_B_DQS#3 DDR_B_DQS3
DDR_B_D30 DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA15 DDR_B_MA14
DDR_B_MA11 DDR_B_MA7
DDR_B_MA6 DDR_B_MA4
DDR_B_MA2 DDR_B_MA0
M_CLK_DDR3 M_CLK_DDR#3
DDR_B_BS1 DDR_B_RAS#
DDR_CS2_DIMMB# M_ODT2
M_ODT3
DDR_B_D36 DDR_B_D37
DDR_B_D38 DDR_B_D39
DDR_B_D44 DDR_B_D45
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D46 DDR_B_D47
DDR_B_D52 DDR_B_D53
DDR_B_D54 DDR_B_D55
DDR_B_D60 DDR_B_D61
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D62 DDR_B_D63
+0.75V_DDR_VTT
JDIMMB H=9.2
DDR3_DRAMRST#_R 12
DDR_CKE3_DIMMB 8
M_CLK_DDR3 8
M_CLK_DDR#3 8
DDR_B_BS1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 8
M_ODT2 8
M_ODT3 8
+DIMM0_1_VREF_CA
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
2
DDR_XDP_WAN_ SMBCLK 7,12,14,15,28,36
1
CD37
CD37
2
DDR_XDP_WAN_ SMBDAT 7,12,14,15,28,36
1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CD38
CD38
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-6592P
LA-6592P
LA-6592P
13 75Thursday, January 13, 2011
13 75Thursday, January 13, 2011
13 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
CMOS settingCMOS_CLR1
Clear CMOSShunt
Open
ME_CLR1
Shunt
Open
D D
+RTC_CELL
INTVRMEN- Integrated SUS
1.1V VRM Enable High - Enable Internal VRs
*
Low - Enable External VRs
C C
PCH_AZ_CODEC_SDOUT30
PCH_AZ_CODEC_SYNC30
PCH_AZ_CODEC_BITCLK30
B B
Keep CMOS
TPM setting
Clear ME RTC Registers
Keep ME RTC Registers
12
RH38
RH38 330K_0402_5%~D
330K_0402_5%~D
PCH_INTVRMEN
12
RH39
@RH39
@
330K_0402_5%~D
330K_0402_5%~D
1
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
PCH_AZ_CODEC_RST#30
CH101
@CH101
@
27P_0402_50V8J~D
27P_0402_50V8J~D
+3.3V_RUN
12
RH295
@RH295
@
8.2K_0402_5%~D
8.2K_0402_5%~D
PCH_SPI_DO
2
2
1
2
PCH_AZ_SYNC is sampled at the rising edge of RSMRST# pin. So signal should be PU to the ALWAYS rail.
+3.3V_ALW_PCH
12
PCH_AZ_SYNC
12
@RH282
@
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V when sampled low
+RTC_CELL
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
+3.3V_ALW_PCH
1 2
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
1 2
CH4
CH4
CMOS place near DIMM
PCH_AZ_SDOUT
PCH_AZ_SYNC_Q
PCH_AZ_RST#
PCH_AZ_BITCLK
12
RH288
@RH288
@
0_0603_5%~D
0_0603_5%~D
+3.3V_ALW_PCH_JTAG
RH66
RH66 1K_0402_5%~D
1K_0402_5%~D
RH282 100K_0402_5%~D
100K_0402_5%~D
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PCH_AZ_MDC_SDOUT31
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
12
12
12
12
SPI_MOSI
High: Enable Intel Anti-Theft Technology Left floating: Disable Intel Anti-Theft Technology
+3.3V_SPI +3.3V_M
CONN@
CONN@
JSPI1
JSPI1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
A A
11
11
12
12
13
13
14
14
15
15
16
16
17
G1
18
G2
HRS_FH12-16S-0P5SH(55)~D
HRS_FH12-16S-0P5SH(55)~D
RH350 0_0402_5%~DRH350 0_0402_5%~D
SPI_PCH_CS1# PCH_SPI_CS1# SPI_PCH_DO PCH_SPI_DO SPI_PCH_DIN PCH_SPI_DIN SPI_PCH_CLK PCH_SPI_CLK SPI_PCH_CS0# PCH_SPI_CS0#
SPI_WP#_SEL41
1 2
1 2
RH345 0_0402_5%~DRH345 0_0402_5%~D
1 2
RH346 0_0402_5%~DRH346 0_0402_5%~D
1 2
RH347 0_0402_5%~DRH347 0_0402_5%~D
1 2
RH348 0_0402_5%~DRH348 0_0402_5%~D
1 2
RH349 0_0402_5%~DRH349 0_0402_5%~D
+3.3V_SPI +3.3V_M
5

SPI_PCH_CS0#
SPI_PCH_DIN
PCH_AZ_MDC_SYNC31
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_CS0#
1 2
R933 47_0402_5%~DR933 47_0402_5%~D
R894 33_0402_5%~DR894 33_0402_5%~D
R898 0_0402_5%~D@ R898 0_0402_5%~D@
1 2
1 2
SPI_DIN64
12
200 MIL SO8
R890
R890
64Mb Flash ROM
1 2
RH33 33_0402_5%~DRH33 33_0402_5%~D
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
U52
1
/CS
2
DO
3
/WP
GND4DIO
W25Q64BVSSIG_SO8~D
W25Q64BVSSIG_SO8~D
X76@U52
X76@
SLP_ME_CSW_DE V#18,41 USB_MCARD1_DET#18,36
EN_ESATA_RPTR#18 TEMP_ALERT#18,41
SIO_EXT_SCI#_R18
PCH_AZ_MDC_BITCLK31
PCH_AZ_MDC_RST#31
PCH_AZ_CODEC_SDIN030
PCH_AZ_MDC_SDIN131
ME_FWP41
PCH_PLTRST#_EC17,34,36,37,41,42
PCH_AZ_SYNC_Q
12
VCC
/HOLD
CLK
4
USB_OC0#_R17 USB_OC1#_R17
USB_OC2#17 USB_OC3#17 USB_OC4#17 USB_OC5#17 USB_OC6#17
SIO_EXT_SMI#17,42
GPIO3618 GPIO3718
PCH_GPIO1518
PCH_RSMRST#_Q16,42
CH2
CH2
18P_0402_50V8J~D
18P_0402_50V8J~D
CH3
CH3
18P_0402_50V8J~D
18P_0402_50V8J~D
CH100
@CH100
@
27P_0402_50V8J~D
27P_0402_50V8J~D
+3.3V_SPI
8
7
SPI_CLK64SPI_WP#_SEL
6
SPI_DO64
5
4
Can be place in 0 height area.
HDD_DET#_R BBS_BIT0_R
12
YH1
YH1
1
32.768KHZ_12.5PF_Q13MC1461000~D
32.768KHZ_12.5PF_Q13MC1461000~D
12
12
SPKR30
+3.3V_ALW_PCH
RH36 33_0402_5%~DRH36 33_0402_5%~D RH50 1K_0402_5%~DRH50 1K_0402_5%~D
RH48
@ RH48
@
G
G
2
13
D
S
D
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
QH7
QH7
C746
C746
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
12
R891
R891
3.3K_0402_5%~D
3.3K_0402_5%~D
1 2
R899 33_0402_5%~DR899 33_0402_5%~D
1 2
R901 33_0402_5%~DR901 33_0402_5%~D
RH1 33_0402_5%~D@RH1 33_0402_5%~D@
1 2
RH3 33_0402_5%~D@RH3 33_0402_5%~D@
1 2
RH4 33_0402_5%~D@RH4 33_0402_5%~D@
1 2
RH5 33_0402_5%~D@RH5 33_0402_5%~D@
1 2
RH6 33_0402_5%~D@RH6 33_0402_5%~D@
1 2
RH7 33_0402_5%~D@RH7 33_0402_5%~D@
1 2
RH8 33_0402_5%~D@RH8 33_0402_5%~D@
1 2
RH9 33_0402_5%~D@RH9 33_0402_5%~D@
1 2
RH10 33_0402_5%~D@RH10 33_0402_5%~D@
1 2
RH12 33_0402_5%~D@RH12 33_0402_5%~D@
1 2
RH13 33_0402_5%~D@RH13 33_0402_5%~D@
1 2
RH14 33_0402_5%~D@RH14 33_0402_5%~D@
1 2
RH15 33_0402_5%~D@RH15 33_0402_5%~D@
1 2
RH16 33_0402_5%~D@RH16 33_0402_5%~D@
1 2
RH17 33_0402_5%~D@RH17 33_0402_5%~D@
1 2
RH18 33_0402_5%~D@RH18 33_0402_5%~D@
1 2
RH19 33_0402_5%~D@RH19 33_0402_5%~D@
1 2
RH20 33_0402_5%~D@RH20 33_0402_5%~D@
1 2
RSMRST#_XDP
2
G
G
34
G
G
1 2
1 2
1 2
1 2 1 2
12
RH49
@ RH49
@
SPI_PCH_CLK
SPI_PCH_DO
12
PCH_RTCX1
12
USB30_SMI#29
12
RH47
@ RH47
@
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
SPI_PCH_CS1#
SPI_WP#_SEL SPI_CLK32
RH24 1K_0402_5%~D@RH24 1K_0402_5%~D@
1 2
RH286 0_0402_5%~DRH286 0_0402_5%~D
RH32 33_0402_5%~DRH32 33_0402_5%~D
RH34 33_0402_5%~DRH34 33_0402_5%~D
RH287 1K_0402_5%~D@ RH287 1K_0402_5%~D@
12
100_0402_1%~D
100_0402_1%~D
PCH_AZ_SYNC
RH2
RH2 10M_0402_5%~D
10M_0402_5%~D
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_MDC_SDIN1
PCH_AZ_SDOUT
PCH_GPIO33
USB30_SMI#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
1 2
R935 47_0402_5%~DR935 47_0402_5%~D
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
1 2
R896 0_0402_5%~D@R896 0_0402_5%~D@
3
XDP_FN0 XDP_FN1 XDP_FN2 XDP_FN3 XDP_FN4 XDP_FN5 XDP_FN6 XDP_FN7 XDP_FN8 XDP_FN9 XDP_FN10 XDP_FN11 XDP_FN12 XDP_FN13 XDP_FN14 XDP_FN15 XDP_FN16 XDP_FN17
DDR_XDP_WAN_ SMBDAT7,12,13,15,28,36
DDR_XDP_WAN_ SMBCLK7,12,13,15,28,36
A20
C20
D20
G22
K22
C17
N34
L34
T10
K34
E34
G34
C34
A34
A36
C36
N32
J3
H7
K5
H1
T3
Y14
T1
V4
U3
R888
R888
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_CS1#
SPI_DIN32SPI_PCH_DIN
3
+3.3V_ALW_PCH
1.05V_0.8V_PWROK42,58 SIO_PWRBTN#_R7,16
UH4A
UH4A
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
12
200 MIL SO8
16Mb Flash ROM
U53
X76@U53
X76@
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
W25Q16BVSSIG_SO8~D
W25Q16BVSSIG_SO8~D
1
2
RH283 1K_0402_5%~D@RH283 1K_0402_5%~D@
1 2 1 2
RH21 0_0402_5%~D@RH21 0_0402_5%~D@
RH284 0_0402_5%~D@RH284 0_0402_5%~D@
1 2 1 2
RH285 0_0402_5%~D@RH285 0_0402_5%~D@
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
/HOLD(IO3)
@CH1
@
DI(IO0)
CH1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1.05V_0.8V_PWROK_R PCH_PWRBTN#_X DP
DDR_XDP_WAN_ SMBDAT_R2 DDR_XDP_WAN_ SMBCLK_R2
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP SATA0TXN SATA0TXP
SATA1RXN
SATA 6G
SATA 6G
SATA1RXP SATA1TXN SATA1TXP
SATA2RXN
SATA2RXP SATA2TXN SATA2TXP
SATA3RXN
SATA3RXP SATA3TXN SATA3TXP
SATA4RXN
SATA4RXP SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP SATA5TXN SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
+3.3V_SPI
8
VCC
7
6
CLK
5
XDP_FN0 XDP_FN1
XDP_FN2 XDP_FN3
XDP_FN4 XDP_FN5
XDP_FN6 XDP_FN7
C38 A38 B37 C37
D36
E36 K36
V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
PCH_PLTRST#7,17
C745
C745
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
12
R892
R892
3.3K_0402_5%~D
3.3K_0402_5%~D
R897 33_0402_5%~DR897 33_0402_5%~D
SPI_DO32
R900 33_0402_5%~DR900 33_0402_5%~D
2
+3.3V_ALW_PCH
IRQ_SERIRQ
+SATA_COMP
+SATA3_COMP
RBIAS_SATA3
SATA_ACT#
HDD_DET#_R
BBS_BIT0_R
1 2
1 2
2
JXDP2
@JXDP2
@
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
LPC_LAD0 33,34,41,42 LPC_LAD1 33,34,41,42 LPC_LAD2 33,34,41,42 LPC_LAD3 33,34,41,42
LPC_LFRAME# 33,34,41,42
LPC_LDRQ0# 41 LPC_LDRQ1# 41
IRQ_SERIRQ 33,34,41,42
PSATA_PRX_DTX_N0_C 28 PSATA_PRX_DTX_P0_C 28
PSATA_PTX_DRX_N0_C 28
PSATA_PTX_DRX_P0_C 28
SATA_ODD_PRX_DTX_N1_C 29
SATA_ODD_PRX_DTX_P1_C 29 SATA_ODD_PTX_DRX_N1_C 29 SATA_ODD_PTX_DRX_P1_C 29
ESATA_PRX_DTX_N4_C 39
ESATA_PRX_DTX_P4_C 39 ESATA_PTX_DRX_N4_C 39 ESATA_PTX_DRX_P4_C 39
SATA_PRX_DKTX_N5_C 40
SATA_PRX_DKTX_P5_C 40 SATA_PTX_DKRX_N5_C 40 SATA_PTX_DKRX_P5_C 40
1 2
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
1 2
RH46 750_0402_1%~DRH46 750_0402_1%~D
SATA_ACT# 45
RH290 0_0402_5%~D@RH290 0_0402_5%~D@
1 2
D
S
D
S
1 3
QH1 BSS138W -7-F_SOT323-3~D
QH1 BSS138W -7-F_SOT323-3~D
G
G
2
SPI_PCH_CLK
SPI_PCH_DO
1
2
GND1 OBSFN_C0 OBSFN_C1
GND3
OBSDATA_C0 OBSDATA_C1
GND5
OBSDATA_C2 OBSDATA_C3
GND7 OBSFN_D0 OBSFN_D1
GND9
OBSDATA_D0 OBSDATA_D1
GND11 OBSDATA_D2 OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TRST#
TMS
GND17
TD0
TDI
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
XDP_FN16 XDP_FN17
XDP_FN8 XDP_FN9
XDP_FN10 XDP_FN11
XDP_FN12 XDP_FN13
XDP_FN14 XDP_FN15
RSMRST#_XDP XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI PCH_JTAG_TMSPCH_JTAG_TCK
IRQ_SERIRQ
PCH_AZ_SYNC_Q
PCH_GPIO33
BBS_BIT0_R
+3.3V_ALW_PCH
XDP_DBRESET# 7,16
+3.3V_RUN
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
RH37 10K_0402_5%~DRH37 10K_0402_5%~D
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
RH51 4.7K_0402_5%~DRH51 4.7K_0402_5%~D
12
12
12
12
HDD
ODD/ E Module Bay
+3.3V_RUN
SPKR
RH35 10K_0402_5%~D@RH35 10K_0402_5%~D@
12
No Reboot Strap
Low = Default
SPKR
High = No Reboot
E-SATA
DOCK
+1.05V_RUN
+1.05V_RUN
+3.3V_RUN
12
RH30
RH30 10K_0402_5%~D
10K_0402_5%~D
PCH_SATA_MOD_EN# 42
HDD_DET# 28
BBS_BIT0 - BIOS BOOT STRAP BIT 0
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-6592P
LA-6592P
LA-6592P
14 75Thursday, January 13, 2011
14 75Thursday, January 13, 2011
14 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
D D
Follow DG0.9 Device down & Express/Mini card topology
PCIE_PRX_WANTX_N 136
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
EXPRESS Card--->
E3 Module Bay--->
1/2vMINI CARD-3 PCIE (Mini Card 3)--->
C C
MMI --->
10/100/1G LAN --->
MiniWWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI Card--->
B B
MiniWPAN (Mini Card 3)--->
Express card--->
MiniWLAN (Mini Card 2)--->
eModule Bay--->
A A
PCIE_PRX_WANTX_P 136 PCIE_PTX_WANRX_N 136 PCIE_PTX_WANRX_P 136
PCIE_PRX_WLANTX_ N236
PCIE_PRX_WLANTX_ P236 PCIE_PTX_WLANRX_ N236 PCIE_PTX_WLANRX_ P236
PCIE_PRX_EXPTX_N337
PCIE_PRX_EXPTX_P337 PCIE_PTX_EXPRX_N337 PCIE_PTX_EXPRX_P337
PCIE_PRX_EMBTX_N429
PCIE_PRX_EMBTX_P429 PCIE_PTX_EMBRX_N429 PCIE_PTX_EMBRX_P429
PCIE_PRX_WPANTX _N536
PCIE_PRX_WPANTX _P536 PCIE_PTX_WPANRX _N536 PCIE_PTX_WPANRX _P536
PCIE_PRX_MMITX_N635
PCIE_PRX_MMITX_P635 PCIE_PTX_MMIRX_N635 PCIE_PTX_MMIRX_P635
PCIE_PRX_GLANTX_N732
PCIE_PRX_GLANTX_P732 PCIE_PTX_GLANRX_N732 PCIE_PTX_GLANRX_P732
CLK_PCIE_MINI1#36 CLK_PCIE_MINI136
+3.3V_ALW_PCH
MINI1CLK_REQ#36
CLK_PCIE_LAN#32 CLK_PCIE_LAN32
LANCLK_REQ#32
CLK_PCIE_MMI#35 CLK_PCIE_MMI35
+3.3V_RUN
MMICLK_REQ#35
CLK_PCIE_MINI3#36
CLK_PCIE_MINI336
+3.3V_ALW_PCH
MINI3CLK_REQ#36
CLK_PCIE_EXP#37
CLK_PCIE_EXP37
+3.3V_ALW_PCH
EXPCLK_REQ#37
CLK_PCIE_MINI2#36
CLK_PCIE_MINI236
+3.3V_ALW_PCH
MINI2CLK_REQ#36
+3.3V_ALW_PCH
CLK_PCIE_EMB#29
CLK_PCIE_EMB29
+3.3V_ALW_PCH
EMBCLK_REQ#29
CLK_CPU_ITP#7
CLK_CPU_ITP7
RH307 0_0402_5%~D@RH307 0_0402_5%~D@ RH308 0_0402_5%~D@RH308 0_0402_5%~D@ RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH82 0_0402_5%~D@RH82 0_0402_5%~D@ RH83 0_0402_5%~D@RH83 0_0402_5%~D@
RH85 0_0402_5%~D@RH85 0_0402_5%~D@ RH86 0_0402_5%~D@RH86 0_0402_5%~D@ RH87 10K_0402_5%~DRH87 10K_0402_5 %~D
RH88 0_0402_5%~D@RH88 0_0402_5%~D@ RH90 0_0402_5%~D@RH90 0_0402_5%~D@ RH152 10K_0402_5%~DRH152 10K_0402_5%~D
RH92 0_0402_5%~D@RH92 0_0402_5%~D@ RH93 0_0402_5%~D@RH93 0_0402_5%~D@ RH94 10K_0402_5%~DRH94 10K_0402_5 %~D
RH95 0_0402_5%~D@RH95 0_0402_5%~D@ RH96 0_0402_5%~D@RH96 0_0402_5%~D@ RH97 10K_0402_5%~DRH97 10K_0402_5 %~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
RH310 0_0402_5%~D@RH310 0_0402_5%~D@ RH312 0_0402_5%~D@RH312 0_0402_5%~D@ RH104 10K_0402_5%~DRH104 10K_0402_5%~D
RH280 0_0402_5%~D@RH280 0_0402_5%~D@ RH281 0_0402_5%~D@RH281 0_0402_5%~D@
PCIE REQ power rail: suspend: 0 3 4 5 6 7 core: 1 2
5
1 2
1 2
4
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
12 12 12
12 12
12 12
12 12 12
12 12 12
12 12 12
12 12 12
12 12
4
PCIE_MINI1# PCIE_MINI1
MINI1CLK_REQ#
PCIE_LAN# PCIE_LAN
LANCLK_REQ#
PCIE_MMI# PCIE_MMI
MMICLK_REQ#
PCIE_MINI3# PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP# PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2# PCIE_MINI2
MINI2CLK_REQ#
PEG_B_CLKRQ#
PCIE_EMB# PCIE_EMB
EMBCLK_REQ#
CLK_BCLK_ITP# CLK_BCLK_ITP
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
3
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37 AB38
AV22 AU22
AM12 AM13
BF18 BE18
BJ30 BG30
G24 E24
AK7 AK5
K45
H45
V47 V49
Y47
K43
F47
H47
K49
XCLK_RCOMP
PCI_TCM
SIO_14M
PCI_TPM
JETWAY_14M
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
LAN_SMBCLK
LAN_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
GFX_CLK_REQ#
CLK_PCIE_VGA# CLK_PCIE_VGA
CLK_CPU_DMI# CLK_CPU_DMI
CLK_CPU_DPLL# CLK_CPU_DPLL
CLK_BUF_DMI# CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96# CLK_BUF_DOT96
CLK_BUF_CKSSCD# CLK_BUF_CKSSCD
CLK_PCH_14M
XTAL25_IN XTAL25_OUT
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N CLKIN_GND1_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
2
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH 7
LAN_SMBCLK 32
LAN_SMBDATA 32
SML1_SMBCLK 42
SML1_SMBDATA 42
PCH_CL_CLK1 36
PCH_CL_DATA1 36
PCH_CL_RST1# 36
CLK_PCIE_VGA# 46 CLK_PCIE_VGA 46
CLK_CPU_DMI# 7 CLK_CPU_DMI 7
CLK_CPU_DPLL# 7 CLK_CPU_DPLL 7
CLK_PCI_LOOPBACK 17
1 2
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH311 22_0402_5%~D4@ RH 311 22_0402_5%~D4@
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH314 22_0402_5%~DRH314 22_0402_5%~D
RH315 22_0402_5%~D@RH315 22_0402_5%~D@
12
12
12
12
2
+3.3V_RUN
QH5A
QH5A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
6 1
5
3
4
QH5B
QH5B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1 2
RH296 0_0402_5%~D@RH296 0_0402_5%~D@
1 2
RH297 0_0402_5%~D@RH297 0_0402_5%~D@
+3.3V_ALW_PCH
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
GPIO74
MEM_SMBCLK
MEM_SMBDATAGPIO74
PCH_SMB_ALERT#
LAN_SMBCLK
LAN_SMBDATA
3.3V_RUN_GFX_ON41,49
CLK_BUF_DMI# CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96# CLK_BUF_DOT96
CLK_BUF_CKSSCD# CLK_BUF_CKSSCD
CLK_PCH_14M
DDR_XDP_WAN_ SMBCLK 7,12,13,14,28,36
DDR_XDP_WAN_ SMBDAT 7,12,13,14,28,36
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
RH300 1K_0402_5%~DRH300 1K_0402_5%~D
RH301 10K_0402_5%~DRH301 10K_0402_5%~D
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
RH304 10K_0402_5%~DRH304 10K_0402_5%~D
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
RH80
RH80
10K_0402_5%~D
10K_0402_5%~D
RH74 10K_0402_5%~DRH74 10K_0402_5 %~D RH75 10K_0402_5%~DRH75 10K_0402_5 %~D
RH91 10K_0402_5%~DRH91 10K_0402_5 %~D
RH76 10K_0402_5%~DRH76 10K_0402_5 %~D RH77 10K_0402_5%~DRH77 10K_0402_5 %~D
RH78 10K_0402_5%~DRH78 10K_0402_5 %~D RH79 10K_0402_5%~DRH79 10K_0402_5 %~D
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
CLOCK TERMINATION for FCIM and need close to PCH
RH309
@RH309
@
12
RH99
RH99 1M_0402_5%~D
+1.05V_RUN
CLK_PCI_TPM_CHA 34
CLK_SIO_14M 41
CLK_PCI_TPM 33
JETWAY_CLK14M 34
1M_0402_5%~D
25MHZ_18PF_7A25000110~D
25MHZ_18PF_7A25000110~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-6592P
LA-6592P
LA-6592P
1
1 2
1 2
12
13
D
D
2
G
G
S
S
1 2 1 2
1 2
1 2 1 2
1 2 1 2
1 2
0_0402_5%~D
0_0402_5%~D
12
2
CH18
CH18
1
18P_0402_50V8J~D
18P_0402_50V8J~D
1
+3.3V_ALW_PCH
12
12
12
12
12
+3.3V_LAN
12
12
GFX_CLK_REQ#
QH2
QH2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
YH2
YH2
12
2
1
15 75Tuesday, January 18, 2011
15 75Tuesday, January 18, 2011
15 75Tuesday, January 18, 2011
CH19
CH19
18P_0402_50V8J~D
18P_0402_50V8J~D
1.0
1.0
1.0
+3.3V_ALW_PCH
5
4
3
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
RH316
RH316
RH317
RH317
2
1
1 2
RH318 10K_0402_5%~D@ RH318 10K_0402_5%~D@
D D
+3.3V_RUN
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
1 2
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
RH319 10K_0402_5%~D@ RH319 10K_0402_5%~D@
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
1 2
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D
SUS_STAT#/LPCPD#
ME_SUS_PWR_A CK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
PCH_RI#
CLKRUN#
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_A CK_R
PCH_RSMRST#_Q
ME_SUS_PWR_A CK
1 2
RH113 0_0402 _5%~D@ RH113 0_0402_5%~D@
SYS_PWROKRESET_OUT#
1 2
RH321 0_0402_5%~D@RH321 0_0402_5%~D@
SUSACK#_R
1 2
RH323 0_0402 _5%~D@RH323 0_0402_5%~D@
1 2
RH322 10K_0402_5%~DRH322 10K_0402_5%~D
1 2
RH145 10K_0402_5%~D@ RH145 10K_0402_5%~D@
DSWODVREN - On Die DSW VR Enable
Enabled (DEFAULT)
HIGH: R221 STUFFED, R222 UNSTUFFED
Disabled
LOW: R221 STUFFED, R222 UNSTUFFED
G_CLK_DDC2
61
QH6A
QH6A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+3.3V_RUN
2
5
QH6B
QH6B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
L_DDC_DATA - LVDS Detected
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DATG_DAT_DDC2
PCH_CRT_DDC_CLK 25
PCH_CRT_DDC_DAT 25
LVDS is detected1
UH4C
UH4C
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_SUS#
H_PM_SYNC
SIO_SLP_LAN#
FDI_CTX_PRX_N0 6 FDI_CTX_PRX_N1 6 FDI_CTX_PRX_N2 6 FDI_CTX_PRX_N3 6 FDI_CTX_PRX_N4 6 FDI_CTX_PRX_N5 6 FDI_CTX_PRX_N6 6 FDI_CTX_PRX_N7 6
FDI_CTX_PRX_P0 6 FDI_CTX_PRX_P1 6 FDI_CTX_PRX_P2 6 FDI_CTX_PRX_P3 6 FDI_CTX_PRX_P4 6 FDI_CTX_PRX_P5 6 FDI_CTX_PRX_P6 6 FDI_CTX_PRX_P7 6
FDI_INT 6
FDI_FSYNC0 6
FDI_FSYNC1 6
FDI_LSYNC0 6
FDI_LSYNC1 6
RH127 330K_0402_1%~DRH127 330K _0402_1%~D
1 2
RH129 330K_0402_1%~D@RH129 330K_0402_1%~D@
1 2
PCH_PCIE_WAKE# 41
CLKRUN# 34,41,42
T56 PAD~D@ T56 PAD ~D@
T57 PAD~D@ T57 PAD ~D@
T58 PAD~D@ T58 PAD ~D@
SIO_SLP_S5# 42
T59 PAD~D@ T59 PAD ~D@
SIO_SLP_S4# 41
T60 PAD~D@ T60 PAD ~D@
SIO_SLP_S3# 41
T61 PAD~D@ T61 PAD ~D@
SIO_SLP_A# 41,56
T62 PAD~D@ T62 PAD ~D@
SIO_SLP_SUS# 41
T63 PAD~D@ T63 PAD ~D@
H_PM_SYNC 7
SIO_SLP_LAN# 32,41
3
+RTC_CELL
PCH_CRT_HSYNC25 PCH_CRT_VSYNC25
PANEL_BKEN_PCH24
ENVDD_PCH24,41
BIA_PWM_PCH24
LDDC_CLK_PCH23
LDDC_DATA_PCH23
LCD_ACLK-_PCH23 LCD_ACLK+_PCH23
LCD_A0-_PCH23 LCD_A1-_PCH23 LCD_A2-_PCH23
LCD_A0+_PCH2 3 LCD_A1+_PCH2 3 LCD_A2+_PCH2 3
LCD_BCLK-_PCH23 LCD_BCLK+_PCH23
LCD_B0-_PCH23 LCD_B1-_PCH23 LCD_B2-_PCH23
LCD_B0+_PCH2 3 LCD_B1+_PCH2 3 LCD_B2+_PCH2 3
PCH_CRT_BLU25 PCH_CRT_GRN25 PCH_CRT_RED25
RH131 150_04 02_1%~DR H131 150_0402_1%~D
RH132 150_04 02_1%~DR H132 150_0402_1%~D
RH133 150_04 02_1%~DR H133 150_0402_1%~D
RH134 100K _0402_5%~DRH134 100K_0402_5%~D
DMI_COMP_R
RBIAS_CPY
1 2
PCH_RI#
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
SUSACK#_R
XDP_DBRESET#
SYS_PWROK_R
PM_APWROK_R
PM_DRAM_PWR GD_R
PCH_RSMRST#_R
ME_SUS_PWR_A CK_R
SIO_PWRBTN#_R
SIO_PWRBTN#_R
PCH_BATLOW#
DMI_CTX_PRX_N06 DMI_CTX_PRX_N16 DMI_CTX_PRX_N26 DMI_CTX_PRX_N36
DMI_CTX_PRX_P06
C C
+1.05V_RUN
SUSACK#41 PCH_DPWROK 4 1
B B
SYS_PWROK7,41
RESET_OUT#42
PM_APWROK42
PM_DRAM_PWR GD7
PCH_RSMRST#_Q14,42
ME_SUS_PWR_A CK42
SIO_PWRBTN#_R7,14
SIO_PWRBTN#42
AC_PRESENT42
+3.3V_ALW_PCH
A A
DMI_CTX_PRX_P16 DMI_CTX_PRX_P26 DMI_CTX_PRX_P36
DMI_CRX_PTX_N06 DMI_CRX_PTX_N16 DMI_CRX_PTX_N26 DMI_CRX_PTX_N36
DMI_CRX_PTX_P06 DMI_CRX_PTX_P16 DMI_CRX_PTX_P26 DMI_CRX_PTX_P36
1 2
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D
1 2
RH112 750_0402_1%~DRH112 750_0402_1%~D
1 2
RH114 0_0402_5%~D@RH114 0_0402_5%~D@
XDP_DBRESET#7,14
1 2
RH116 0_0402 _5%~D@ RH116 0_0402_5%~D@
1 2
RH117 0_0402 _5%~D@ RH117 0_0402_5%~D@
1 2
RH118 0_0402 _5%~D@ RH118 0_0402_5%~D@
1 2
RH320 0_0402 _5%~D@ RH320 0_0402_5%~D@
1 2
RH120 0_0402 _5%~D@ RH120 0_0402_5%~D@
1 2
RH121 0_0402 _5%~D@ RH121 0_0402_5%~D@
RH122 0_0402 _5%~D@ RH122 0_0402_5%~D@
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
5
PCH_PWROK
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPW RDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
BJ14
FDI_RXN0
AY14
FDI_RXN1
BE14
FDI_RXN2
BH13
FDI_RXN3
BC12
FDI_RXN4
BJ12
FDI_RXN5
BG10
FDI_RXN6
BG9
FDI_RXN7
BG14
FDI_RXP0
BB14
FDI_RXP1
BF14
FDI_RXP2
BG13
FDI_RXP3
BE12
FDI_RXP4
BG12
FDI_RXP5
BJ10
DMI
DMI
System Power Management
System Power Management
4
FDI_RXP6
FDI
FDI
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
LVDS is not detected0
PANEL_BKEN_PCH ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH LDDC_DATA_PCH
1 2
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D
PCH_CRT_BLU PCH_CRT_GRN PCH_CRT_RED
G_CLK_DDC2 G_DAT_DDC2
RH123 20_0402_1%~DRH123 20_0402_1%~D
RH124 20_0402_1%~DRH124 20_0402_1%~D
1 2
1 2
1 2
1 2
1 2 1 2
RH126
RH126
1K_0402_0.5%~D
1K_0402_0.5%~D
HSYNC VSYNC
12
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
L_IBG
CRT_IREF
UH4D
UH4D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
2
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
Intel request DDPB can not support eDP
SDVO_INTN
SDVO_INTP
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_AUXN DDPC_AUXP
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_AUXN DDPD_AUXP
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AP43 AP45
AM42 AM40
AP39 AP40
P38 M39
AT49 AT47 AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-6592P
LA-6592P
LA-6592P
16 75Thursday, January 13, 2011
16 75Thursday, January 13, 2011
16 75Thursday, January 13, 2011
1
1.0
1.0
1.0
+3.3V_RUN
5
4
3
2
1
1 2
D D
C C
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH332 10K_0402_5%~D@ RH332 10K_0402_5%~D@
LVDS_CBL_ID
PCI_GNT3#
12
RH333
@RH333
@
1K_0402_5%~D
1K_0402_5%~D
A16 swap overrid e Strap/Top-Bloc k
Swap Override jumper
PCI_GNT#3
B B
A A
PCH_PLTRST#7,14
Low = A16 swap
High = Default
PLTRST_USH#33 PLTRST_MMI#35 PLTRST_XDP#7 PLTRST_LAN#32 PLTRST_GPU#46 PLTRST_EMB#29
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
ATG_MAC_LCD_DET#
CAM_MIC_CBL_DET#
BT_DET#
PCH_GPIO3
High : Normal type panel
Low : High contrast ratio brightness
1 2
RH335 0_0402_5%~D@RH335 0_0402 _5%~D@
1 2
RH336 0_0402_5%~D@RH336 0_0402 _5%~D@
1 2
RH337 0_0402_5%~D@RH337 0_0402 _5%~D@
1 2
RH338 0_0402_5%~D@RH338 0_0402 _5%~D@
1 2
RH343 0_0402_5%~D@RH343 0_0402 _5%~D@
1 2
RH340 0_0402_5%~D@RH340 0_0402 _5%~D@
PCH_PLTRST#
5
+3.3V_RUN
1
B
2
A
5
P
G
3
CLK_PCI_502841
CLK_PCI_MEC42
CLK_PCI_DOCK40
CLK_PCI_LOOPBACK15
CH102
CH102
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
UH3
UH3
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
PCIE_MCARD2_DET#36
BT_DET#43
ATG_MAC_LCD_DET#24
CAM_MIC_CBL_DET#24
HDD_FALL_INT28
RH160 22_0402_5%~DRH160 22_0402_5%~D RH102 22_0402_5%~DRH102 22_0402_5%~D
1 2
RH103 33_0402_5%~DRH103 33_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
PCH_PLTRST#_EC 14,34,36,37,41,42
RH334 0_0402 _5%~D@RH334 0_0402_5%~D@
12 12
12
1 2
4
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCI_REQ1#
BT_DET#
BBS_BIT1
PCI_GNT3#
ATG_MAC_LCD_DET# PCH_GPIO3 CAM_MIC_CBL_DET#
FFS_PCH_INT
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5028 PCI_MEC PCI_DOCK
PCI_LOOPBACKOUT
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
RSVD
RSVD
PCI
PCI
USB
USB
RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
RSVD23 RSVD24
RSVD25
RSVD26 RSVD27
RSVD28 RSVD29
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N
USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
Boot BIOS Strap
BBS_BIT1 Boot BIOS Location
*
SATA_SLPD (BBS_BIT0)
0 0
0 1
1 0
1 1
LPC
Reserved (NAND)
PCI
SPI
3
RSVD1 RSVD2 RSVD3 RSVD4
RSVD5 RSVD6
RSVD7 RSVD8 RSVD9
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AV10
AT8
AY5 BA2
AT12 BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
USBP0­USBP0+ USBP1­USBP1+ USBP2­USBP2+ USBP3­USBP3+ USBP4­USBP4+ USBP5­USBP5+ USBP6­USBP6+ USBP7­USBP7+ USBP8­USBP8+ USBP9­USBP9+ USBP10­USBP10+ USBP11­USBP11+ USBP12­USBP12+ USBP13­USBP13+
USBRBIAS
USB_OC0#_R USB_OC1#_R USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# SIO_EXT_SMI#
USBP0- 38 USBP0+ 38 USBP1- 38 USBP1+ 38 USBP2- 39 USBP2+ 39 USBP3- 31 USBP3+ 31 USBP4- 36 USBP4+ 36 USBP5- 36 USBP5+ 36 USBP6- 36 USBP6+ 36 USBP7- 33 USBP7+ 33 USBP8- 40 USBP8+ 40 USBP9- 40 USBP9+ 40 USBP10- 37 USBP10+ 37 USBP11- 43 USBP11+ 43 USBP12- 24 USBP12+ 24 USBP13- 24 USBP13+ 24
Within 500 mils
1 2
RH151
RH151
22.6_0402_1%~D
22.6_0402_1%~D
1 2
RH339 0_0402_5%~D@RH339 0_0402_5%~D@
1 2
RH341 0_0402_5%~D@RH341 0_0402_5%~D@
BBS_BIT1
----->Right Side 1
----->Right Side 2
----->Right Side (ESATA)
----->Left Side
----->WLAN/WIMAX
----->WWAN/UWB
----->Flash
----->USH
----->DOCK
----->DOCK
----->Express Card
----->Blue Tooth
----->Camera
----->LCD Touch
USB_OC0# 39 USB_OC1# 31,39 USB_OC2# 14 USB_OC3# 14 USB_OC4# 14 USB_OC5# 14 USB_OC6# 14 SIO_EXT_SMI# 14,42
USB_OC0#_R 14 USB_OC1#_R 14
12
RH342
@RH342
@
1K_0402_5%~D
1K_0402_5%~D
2
+3.3V_ALW_PCH
RPH1
USB_OC0# USB_OC1# USB_OC3# USB_OC4#
USB_OC5# USB_OC6#
USB_OC2#
SIO_EXT_SMI#
RH41 10K_0402_5%~DRH41 10K_0402_5%~D
RPH1
4 5 3 6 2 7 1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
RPH2
RPH2
4 5 3 6 2 7 1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-6592P
LA-6592P
LA-6592P
17 75Thursday, January 13, 2011
17 75Thursday, January 13, 2011
17 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
D D
+3.3V_ALW_PCH
PCH_GPIO15
1 2
RH354 1K_0402_5%~DRH354 1K_0402_5%~D
PCH_GPIO15 TLS Confidentiality
Low = Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality High = Intel ME Crypto TLS cipher suite with confidentiality
+3.3V_ALW_PCH
RH356
RH356
4.7K_0402_5%~D
4.7K_0402_5%~D
1 2
C C
Note: PCH has internal pull up 20k ohm on E3_PAID_TS_DET# (GPIO27)
+3.3V_ALW_PCH
B B
+3.3V_ALW_PCH
RH170 10K_0402_5%~DRH170 1 0K_0402_5%~D
+3.3V_RUN
RH171 10K_0402_5%~D@ RH171 10K_0402_5%~D@
RH173 1K_0402_5%~D@RH173 1K_0402_5%~D@
RH265 10K_0402_5%~DRH265 1 0K_0402_5%~D
A A
RH266 10K_0402_5%~DRH266 1 0K_0402_5%~D
RH179 10K_0402_5%~DRH179 1 0K_0402_5%~D
RH180 10K_0402_5%~D@ RH180 10K_0402_5%~D@
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D
RH163 10K_0402_5%~DRH163 1 0K_0402_5%~D
RH272 10K_0402_5%~DRH272 1 0K_0402_5%~D
RH273 1K_0402_5%~D@RH273 1K_0402_5%~D@
SLP_ME_CSW_DE V#
RH353
@ RH353
@
1K_0402_5%~D
1K_0402_5%~D
1 2
KB_DET#
GPIO36
12
GPIO37
12
EN_ESATA_RPTR#
12
TEMP_ALERT#
12
MEDIA_DET#
12
DGPU_HOLD_RST#
12
GPIO17
IO_LOOP#
LEDB_DET#
GPIO17
12
SIO_EXT_WAKE#
5
1 2
RH177 10K_0402_5%~DRH177 10K_0402_5%~D
1 2
RH171, RH173 should be no pop as reverse strap.
1 2
1 2
1 2
Layout note: Trace wide 10mil & length 30mil All NCTF pins should have thick traces at 45°from the pad.
SIO_EXT_SCI#_R14
SIO_EXT_SCI#42
IO_LOOP#31
LEDB_DET#31
SIO_EXT_WAKE#41
PM_LANPHY_ENABLE32
PCH_GPIO1514
EN_ESATA_RPTR#14
MEDIA_DET#31
PCIE_MCARD1_DET#36
E3_PAID_TS_DET#24
SLP_ME_CSW_DE V#14,41
DGPU_HOLD_RST#46
USB_MCARD1_DET#14,36
FFS_INT228
TEMP_ALERT#14,41
KB_DET#43
+3.3V_RUN
TPM_ID0
GPIO3614
GPIO3714
1@ RH267
1@
1 2
2@ RH270
2@
1 2
4
SIO_EXT_SCI#
PCH_GPIO1
IO_LOOP#
LEDB_DET#
SIO_EXT_WAKE#
PCH_GPIO15
EN_ESATA_RPTR#
GPIO17
MEDIA_DET#
E3_PAID_TS_DET#
SLP_ME_CSW_DE V#
DGPU_HOLD_RST#
GPIO36
GPIO37
TPM_ID0
TPM_ID1
FFS_INT2
TEMP_ALERT#
KB_DET#
RH267 10K_0402_5%~D
10K_0402_5%~D
TPM_ID1
RH270 10K_0402_5%~D
10K_0402_5%~D
4
1 2
RH259 0_0402_5%~D@RH259 0_0402_5%~D@
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
+3.3V_RUN
12
RH268
3@ RH268
3@
20K_0402_5%~D
20K_0402_5%~D
12
RH271
4@ RH271
4@
2.2K_0402_5%~D
2.2K_0402_5%~D
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
No TPM, No China TPM
China TPM
USH2.0
GPIO
GPIO
3
CPU/MISC
CPU/MISC
NCTF
NCTF
3
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
0
0
1 1
TPM_ID1TPM_ID0
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
0
1
CONTACTLESS_DET#
SIO_A20GATE
H_PECI_R
SIO_RCIN#
H_CPUPWRGD
PCH_THRMTRIP#_R
INIT3_3V#
DF_TVS
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
CONTACTLESS_DET# 33
DGPU_PWROK 41,63
PCIE_MCARD3_DET# 36
USB_MCARD2_DET# 36
SIO_A20GATE 42
1 2
RH159 0_0402_5%~D@RH159 0_0402_5%~D@
SIO_RCIN# 42
H_CPUPWRGD 7
T106@ T106@
T108@ T108@
Layout note: Trace wide 10mil & length 30mil All NCTF pins should have thick traces at 45°from the pad.
RH261 0_0402_5%~D@ RH261 0_0402_5%~D@
2
1 2
RH262 56_0402_5%~DRH262 56_0402_5%~D
1
CH97
CH97
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
2
PECI_EC 42
H_PECI 7
+1.05V_RUN_VTT
12
1
+3.3V_RUN
CONTACTLESS_DET#
PLACE RH150 CLOS E TO THE BRANCHI NG POINT ( TO CPU and NVR AM CONNECTOR)
1 2
RH256 10K _0402_1%~DRH256 10K_0402_1%~D
SIO_A20GATE
SIO_RCIN#
PCH_GPIO1
SIO_EXT_SCI#
RH158 10K_0402_5%~DRH158 10K_0402_5%~D
RH203 10K_0402_5%~DRH203 10K_0402_5%~D
RH164 10K_0402_5%~DRH164 10K_0402_5%~D
1 2
RH263 10K_0402_5%~DRH263 10K_0402_5%~D
+VCCDFTERM
RH149 need to cl ose to CPU
12
RH149
RH149
2.2K_0402_5%~D
2.2K_0402_5%~D
DF_TVS_R
RH150 0_0402 _5%~DRH150 0_0402_5%~D
12
12
12
1 2
+3.3V_RUN
DF_TVS
DMI & FDI Termination Voltage
DF_TVS
Set to Vss when LOW
Set to Vcc when HIGH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-6592P
LA-6592P
LA-6592P
18 75Thursday, January 13, 2011
18 75Thursday, January 13, 2011
18 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
POWER
+1.05V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
1
D D
+1.05V_RUN
2
CH30
CH30
CH32
CH32
2
+1.05V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH33
CH33
CH31
CH31
2
2
50 mA
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH47
CH47
+VCCAPLLEXP
1
CH40
CH40
2
@
@
10U_0805_4VAM~D
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH48
CH48
2
+VCCAPLL_FDI
1 2
RH247
@RH247
@
C C
B B
+1.05V_RUN
+3.3V_RUN
+1.05V_RUN
RH195 0.022_0805_1%@RH195 0.022_0805_1%@
1 2
1UH_LB2012T1R0M_20%~D
1UH_LB2012T1R0M_20%~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
CH44
CH44
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH51
CH51
2
+VCCAPLL_FDI
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH45
CH45
CH46
CH46
2
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+1.05V_RUN_VTT
1
2
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
DMI
DMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+1.8V_RUN_LVDS
1
2
1
2
+VCCCLKDMI
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH50
CH50
2
+VCCADAC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
CH34
CH34
2
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D CH104
CH104
CH103
CH103
1
2
CH43
CH43
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+1.05V_+1.5V_1.8V_RUN
1 2
CH49
CH49
10U_0603_4VAM~D
10U_0603_4VAM~D
@
@
1
HK1608R10J-T_0603~D
HK1608R10J-T_0603~D
CH106
CH106
2
+VCCDFTERM
1
CH52
CH52
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH54
CH54 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
BLM18PG181SN1_0603~D
BLM18PG181SN1_0603~D
10U_0805_4VAM~D
10U_0805_4VAM~D
1
CH36
CH36
CH35
CH35
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CH105
CH105
1
2
+3.3V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
LH9
LH9
RH276 0_0805_5%~D@RH276 0_0805_5%~D@
LH1
LH1
12
+3.3V_RUN
12
LH8
LH8 HK1608R10J-T_0603~D
HK1608R10J-T_0603~D
+1.05V_RUN_VTT
+1.05V_RUN
1 2
PJP51
PJP51
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
+3.3V_M
+3.3V_RUN
+1.8V_RUN
+3.3V_RUN
+1.8V_RUN
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax Current (A)
0.001
5
5
0.001
0.001
0.266
0.001
0.08
0.08
1.3
0.042
1.05VccIO 2.925
VccASW
VccSPI
VccDSW3_3 0.003
1.05
3.3
3.3
1.01
0.020
1.8 0.19VCCDFTERM
3.3VccRTC 2 (mA)
3.3VccSus3_3
3.3VccSusHDA
0.119
0.01
VccVRM 1.8 / 1. 5 0.16
1.05VccClkDMI 0.02
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8VccTX_LVDS 0.06
+1.5V_RUN
+1.8V_RUN
+1.05V_RUN
A A
RH197 0_0603_5%~DRH197 0_0603_5%~D
RH198 0_0603_5%~D@RH198 0_0603_5%~D@
RH199 0_0603_5%~D@RH199 0_0603_5%~D@
12
12
12
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
1
+
CH41
@+CH41
@
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
2
1
+
CH42
@+CH42
@
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/8)
PCH (6/8)
PCH (6/8)
LA-6592P
LA-6592P
LA-6592P
19 75Thursday, January 13, 2011
19 75Thursday, January 13, 2011
19 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW2
D D
+1.05V_RUN
C C
+3.3V_RUN
1 2
RH215 0.022_0805_1%@RH215 0.022_0805_1%@
B B
+1.05V_M
RH248 0.022_0805_ 1%@RH248 0.022_0805_1 %@
A A
+1.05V_RUN
1 2
+1.05V_M_VCCSUS
1 2
RH201 0_0402 _5%~D@RH201 0_0402_5%~D@
RH253 0_0402_5%~D@RH253 0_0402_5%~D@
Note: Check Inte l
+1.05V_RUN
+1.05V_RUN_VTT
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
5
1 2
LH3
@LH3
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
@CH58
@
1
+1.05V_RUN
CH58
2
+1.05V_M
LH4
LH4
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
1
CH85
CH85
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
LH6
LH6
1 2
1 2
LH7
LH7
+3.3V_RUN_VCC_CLKF33
1
CH73
CH73
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1
CH94
CH94
+
+
2
RH200 0.022_0805_ 1%@RH200 0.022_0805_1 %@
1
CH55
CH55
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH74
CH74
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH78
CH78
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH79
CH79 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH96
CH96 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH86
CH86
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH92
CH92
1
+
+
2
2
1 2
1
2
1
2
1 2
CH84
CH84
1
2
CH95
CH95
CH57
@CH57
@
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CH64
CH64
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH67
CH67
CH81
CH81 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
CH87
CH87
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH93
CH93
1
2
4
+VCCACLK
+VCCDSW3_3
+PCH_VCCDSW
1
+3.3V_RUN_VCC_CLKF33
2
+VCCAPLL_CPY_PCH
+VCCSUS1
1
@
@
CH61
CH61 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
CH65
CH65
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH68
CH68
CH69
CH69
2
2
+VCCRTCEXT
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+VCCSST
+1.05V_M_VCCSUS
1
CH83
@CH83
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+RTC_CELL
1
1
CH88
CH88
CH89
2
+1.05V_RUN_VCCA_A_DPL +1.05V_R UN_VCCA_B_DPL
4
CH89
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
AD49
T16
V12
T38
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
W21
W23
W24
W26
W29
W31
W33
N16
Y49
BD47
BF47
AF17 AF33 AF34 AG34
AG33
V16
T17 V19
BJ8
A22
1
CH90
CH90 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1 2
RH279 0_0805_5%~D@RH279 0_0805_5%~D@
UH4J
UH4J
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1] DCPSUS[2]
V_PROC_IO
VCCRTC
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
3
POWER
POWER
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
VCCAPLLSATA
SATA USB
SATA USB
VCCASW[22]
VCCASW[23]
HDA
HDA
VCCASW[21]
VCCSUSHDA
3
CPURTC
CPURTC
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
+PCH_V5REF_SUS
+VCCA_USBSUS
+PCH_V5REF_RUN
1
2
1
CH91
CH91
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
CH56
CH56 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH59
CH59
CH70
CH70 1U_0603_10V6K~D
1U_0603_10V6K~D
1
CH76
CH76
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+VCCSATAPLL
+1.05V_+1.5V_1.8V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
+3.3V_RUN
CH60
CH60
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH66
CH66
2
1
CH72
CH72
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH82
CH82 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
+1.05V_RUN
+3.3V_ALW_PCH
1
CH75
CH75
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH77
CH77 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+1.05V_M
2
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
1
CH80
@CH80
@
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
2
+1.05V_RUN
+3.3V_ALW_PCH
1
RH202
@RH202
@
1 2
0_0402_5%~D
0_0402_5%~D
D
S
D
S
1 3
QH4
@
QH4
@
12
RH208
RH208
12
RH213
RH213
+VCCA_USBSUS
G
G
1
2
2
+3.3V_ALW_PCH+5V_ALW_PCH
21
DH2
DH2 RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_SUS
1
CH63
CH63
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+3.3V_RUN+5V_RUN
21
DH3
DH3 RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_RUN
1
CH71
CH71 1U_0603_10V6K~D
1U_0603_10V6K~D
2
1
CH62
@CH62
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+3.3V_RUN
+1.05V_RUN
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
ALW_ENABLE44
10_0402_5%~D
10_0402_5%~D
10_0402_5%~D
10_0402_5%~D
Note: Check Inte l
LH5
@LH5
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
+1.05V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (7/8)
PCH (7/8)
PCH (7/8)
LA-6592P
LA-6592P
LA-6592P
20 75Thursday, January 13, 2011
20 75Thursday, January 13, 2011
20 75Thursday, January 13, 2011
1
+5V_ALW_PCH+5V_ALW
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
20K_0402_5%~D
20K_0402_5%~D
@RH278
@
12
RH278
CH98
CH98
1.0
1.0
1.0
5
D D
C C
B B
A A
UH4H
UH4H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
CougarPoint_Rev_1p0
CougarPoint_Rev_1p0
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]
2
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8)
PCH (8/8)
PCH (8/8)
LA-6592P
LA-6592P
LA-6592P
21 75Thursday, January 13, 2011
21 75Thursday, January 13, 2011
21 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Place under CPU Place C266 close to the Q12 as possible
C
@
@
D D
100P_0402_50V8J~D
100P_0402_50V8J~D
C C
100P_0402_50V8J~D
100P_0402_50V8J~D
B B
A A
2
C266
C266
1
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14 (2) DP5/DN5 for Skin on Q13, place Q13 close to JMINI1 for WWAN and C277 close Q13
1
C272
@C272
@
2
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
+1.05V_RUN_VTT
H_THERMTRIP#7
THERMTRIP_VGA#46
C
E
E
3 1
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
C
2
B
B
E
E
3 1
Q14
Q14
R398
R398
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
+3.3V_RUN_GFX
8.2K_0402_5%~D
@R1111
8.2K_0402_5%~D
@
12
R1111
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
5
2
B
B
Q12
Q12
2
B
B
Q15
Q15
12
THERMB3
100P_0402_50V8J~D
100P_0402_50V8J~D
+3.3V_M
2.2K_0402_5%~D
2.2K_0402_5%~D
1
@
@
C277
C277
2
12
C
C
E
E
3 1
R1112
R1112
Q115
Q115
E
E
31
B
B
2
Q13
Q13
C
C
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
R395
R395
8.2K_0402_5%~D
8.2K_0402_5%~D
THERMATRIP2#
1
2
+3.3V_M
12
C
C
2
B
B
E
E
3 1
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE3_P_4022
REM_DIODE3_N_4022
C278
C278
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
R405
R405
8.2K_0402_5%~D
8.2K_0402_5%~D
THERMATRIP3#
1
C280
C280
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
4
+FAN1_VOUT
+5V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C275
C275
C276
C276
1
1
+3.3V_RUN
2
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C305
C305
C1171
C1171
1
1
2
2
+3.3V_M
1 2
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K~D
C271 2200P_0402_50V7K~DC271 2200P_0402_50V7K~D
MAX8731_IINP60
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
3
RB751S40T1_SOD523-2~DD2RB751S40T1_SOD523-2~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
D2
C219
C219
1
2
2 1
1 2
R389 10K_040 2_5%~DR389 10K_0402_5%~D
12
+3.3V_M
PCH_PWRGD#42
1
C282
C282
2
FAN1_DET#
FAN1_TACH_FB
VDD_PWRGD
REM_DIODE1_N_4022 REM_DIODE1_P_4022
REM_DIODE3_P_4022 REM_DIODE3_N_4022
VSET_4022
1 2
R391 1K_0402_5%~DR391 1K_0402_5%~D
+RTC_CELL
12
R406
R406 953_0402_1%~D
953_0402_1%~D
MOLEX_53398-0471~D
MOLEX_53398-0471~D
VGA_THERMDN VGA_THERMDP
12
R3874.7K_0402_5%~D R3874.7K_0402_5%~D
FAN1_TACH_FB
FAN1_DET#
12
R117810K_0402_5%~D R117810K_0402_5%~D
3V_PWROK#
VSET_4022
VCP2
PWM
1 2 3 4
JFAN1
CONN@JFA N1
CONN@
1 2
5
3
G1
6
4
G2
U9
U9
2
VDDH
3
VDDH
6
VDDL
13
VDD_PWRGD
23
DN1/THERM
24
DP1/VREF_T
26
DN2/DP4
27
DP2/DN4
30
DP3/DN5
29
DN3/DP5
31
VCP
25
VIN
28
VSET
10
TACH/GPIO1
11
GPIO2
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
16
RTC_PWR3V
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
EMC4022-1-EZK-TR_QFN32_5X5~D
EMC4022-1-EZK-TR_QFN32_5X5~D
1
C274
C274
2
THERMTRIP2#
THERMTRIP3#
POWER_SW#
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
SMCLK/BC_CLK
SMDATA/BC_DATA
ADDR_MODE/XEN
POWER_SW#
2
17
18
FAN_OUT FAN_OUT
VDD
TEST1 TEST2
VSS
19
20
21 9
5 4
8 7
1 32
14 22 33
U10
U10
SYS_SHDN#
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
THERMATRIP2#
THERMATRIP3#
POWER_SW#
BC_INT#_EMC4022
+VCC_4022
+ADDR_XEN
+RTC_CELL
5
P
B
4
O
A
G
3
+FAN1_VOUT
1 2
12
R403
R403
10K_0402_5%~D
10K_0402_5%~D
SMSC request
C281
C281
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
1
2
VGA_THERMDP47
VGA_THERMDN47
BC_INT#_EMC4022
FAN1_TACH_FB
FAN1_DET#
1 2
R390 47K_0402_1%~D@ R390 47K_0402_1%~D@
ACAV_IN 42,60,62
BC_INT#_EMC4022 42
BC_CLK_EMC4022 42
BC_DAT_EMC4022 42
+VCC_4022
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
1
C1104
C1104 470P_0402_50V7K~D
470P_0402_50V7K~D
2
R385 10K_040 2_5%~DR385 10K_0402_5%~D
R426 10K_040 2_5%~DR426 10K_0402_5%~D
R402 10K_040 2_5%~DR402 10K_0402_5%~D
THERM_STP# 53
22_0402_5%~D
22_0402_5%~D
C273
C273
DOCK_PWR_SW # 42
POWER_SW_IN# 42
1
VGA_THERMDP
VGA_THERMDN
12
12
12
+RTC_CELL
R388
R388
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C1179
C1179
2
DSC only
+3.3V_M
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
+3.3V_M
Rest=953, Tp=88degree
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Title
Title
ize Document Number R ev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Thermal Sensor
FAN & Thermal Sensor
FAN & Thermal Sensor
LA-6592P
LA-6592P
LA-6592P
22 75Thursday, January 13, 2011
22 75Thursday, January 13, 2011
22 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
Channel A
U84
U84
LCD_ACLK+_GPU47
LCD_ACLK-_GPU47
LCD_A2+_GPU47
D D
C C
LCD_A2-_GPU47
LCD_A1+_GPU47
LCD_A1-_GPU47
LCD_A0+_GPU47
LCD_A0-_GPU47
LDDC_CLK_GPU46
LDDC_DATA_GPU46
LCD_ACLK+_PCH16
LCD_ACLK-_PCH16
LCD_A2+_PCH1 6
LCD_A2-_PCH16
LCD_A1+_PCH1 6
LCD_A1-_PCH16 LCD_A0+_PCH1 6 LCD_A0-_PCH16
LDDC_CLK_PCH16
LDDC_DATA_PCH16
LDDC_CLK_GPU LDDC_DATA_GPU
LDDC_CLK_PCH LDDC_DATA_PCH
48
0B1
47
1B1
43
2B1
42
3B1
37
4B1
36
5B1
32
6B1
31
7B1
22
8B1
23
9B1
46
0B2
45
1B2
41
2B2
40
3B2
35
4B2
34
5B2
30
6B2
29
7B2
25
8B2
26
9B2
54
SEL2
52
NC
5
NC
51
NC
57
Thermal_GND
PI3LVD400ZFEX_TQFN56_11X5~D
PI3LVD400ZFEX_TQFN56_11X5~D
VCC VCC VCC VCC VCC VCC VCC
GND GND GND GND GND GND GND GND GND GND GND GND GND GND
4 10 18 27 38 50 56
2
A0
3
A1
7
A2
8
A3
11
A4
12
A5
14
A6
15
A7
19
A8
20
A9
17
SEL
1 6 9 13 16 21 24 28 33 39 44 49 53 55
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@C1156
@
C1156
1
2
SW_LVDS_ACLK+ 24
SW_LVDS_ACLK- 24
@C1157
@
0.1U_0402_16V4Z~D
@C1158
0.1U_0402_16V4Z~D
@
C1157
C1158
1
2
SW_LVDS_A2+ 24
SW_LVDS_A2- 24
SW_LVDS_A1+ 24
SW_LVDS_A1- 24
SW_LVDS_A0+ 24
SW_LVDS_A0- 24
LDDC_CLK_SW 24
LDDC_DATA_SW 24
DGPU_SELECT# 25,41
+3.3V_RUN +3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
ChanelSEL
COM=NO
0.1U_0402_16V4Z~D
C1146
C1146
C1145
C1145
1
2
Source
LCD_BCLK+_GPU47
LCD_BCLK-_GPU47
LCD_B2+_GPU47
LCD_B2-_GPU47
LCD_B1+_GPU47
LCD_B1-_GPU47
LCD_B0+_GPU47
LCD_B0-_GPU47
LCD_BCLK+_PCH16
LCD_BCLK-_PCH16
LCD_B2+_PCH1 6
LCD_B2-_PCH16
LCD_B1+_PCH1 6
LCD_B1-_PCH16
LCD_B0+_PCH1 6
LCD_B0-_PCH16
DGPU_SELECT#DGPU_SELECT#
GPUCOM=NC
PCH
C1147
C1147
1
2
0
1
Channel B
U85
U85
48
0B1
47
1B1
43
2B1
42
3B1
37
4B1
36
5B1
32
6B1
31
7B1
22
8B1
23
9B1
46
0B2
45
1B2
41
2B2
40
3B2
35
4B2
34
5B2
30
6B2
29
7B2
25
8B2
26
9B2
54
SEL2
52
NC
5
NC
51
NC
57
Thermal_GND
PI3LVD400ZFEX_TQFN56_11X5~D
PI3LVD400ZFEX_TQFN56_11X5~D
VCC VCC VCC VCC VCC VCC VCC
GND GND GND GND GND GND GND GND GND GND GND GND GND GND
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
SEL
@
C1159
4 10 18 27 38 50 56
2 3 7 8 11 12 14 15 19 20
DGPU_SELECT#DGPU_SELECT#
17
1 6 9 13 16 21 24 28 33 39 44 49 53 55
1
2
SW_LVDS_BCLK+ 24
SW_LVDS_BCLK- 24 SW_LVDS_B2+ 24
SW_LVDS_B2- 24
SW_LVDS_B1+ 24
SW_LVDS_B1- 24
SW_LVDS_B0+ 24
SW_LVDS_B0- 24
C1148
C1148
C1160
1
1
2
2
ChanelSEL
0
COM=NO
1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1150
C1150
C1149
C1149
1
1
2
2
Source
GPUCOM=NC
PCH
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@C1160
0.1U_0402_16V4Z~D
@
0.1U_0402_16V4Z~D
@C1159
0.1U_0402_16V4Z~D
+3.3V_RUN_GFX
B B
+3.3V_RUN
1 2
R1122 2.2K_0402_5%~DR1122 2.2K_0402_5%~D
1 2
R1121 2.2K_0402_5%~DR1121 2.2K_0402_5%~D
1 2
R1124 2.2K_0402_5%~DR1124 2.2K_0402_5%~D
1 2
R1123 2.2K_0402_5%~DR1123 2.2K_0402_5%~D
LDDC_CLK_GPU
LDDC_DATA_GPU
LDDC_CLK_PCH
LDDC_DATA_PCH
Fingerprint CONN.
JBIO1
JBIO1
1
1
2
2
3
3
4
4
5
7
5
G1
6
8
6
A A
G2
TYCO_2041084-6~D
TYCO_2041084-6~D
CONN@
CONN@
5
FP_USB_D­FP_USB_D+
+3.3V_FP
FP_RESET# 33
C285 Place close to JBIO1.1
+3.3V_FP
1
C285
C285
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
FP_USB_D- FP_USB_D+
4
U12
@U12
@
1
GND
VCC
2
IO1
IO2
PRTR5V0U2X_SOT143-4~D
PRTR5V0U2X_SOT143-4~D
4
3
+3.3V_RUN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
FP_USBD+33
FP_USBD-33
L8
@L8
@
DLW21SN121SQ2L_4P~D
DLW21SN121SQ2L_4P~D
1
1
4
4
1 2
R409 0_0402_5%~DR4 09 0_0402_5%~D
1 2
R410 0_0402_5%~DR4 10 0_0402_5%~D
2
3
R1135
@R1135
@
0_0603_5%
FP_USB_D+
2
FP_USB_D-
3
+3.3V_RUN
+3.3V_ALW
0_0603_5%
1 2
R1136
@R1136
@
0_0603_5%~D
0_0603_5%~D
1 2
+3.3V_FP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number R ev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
LVDS SW/FP Conn.
LVDS SW/FP Conn.
LVDS SW/FP Conn.
LA-6592P
LA-6592P
LA-6592P
23 75Tuesday, January 18, 2011
23 75Tuesday, January 18, 2011
23 75Tuesday, January 18, 2011
1
1.0
1.0
1.0
5
JLVDS1
JLVDS1
BATT_WHITE_LED
BATT_YELLOW_LED
BREATH_WHITE_LED
D D
C C
DISP_ON/OFF#
CONNTST_GND
LCD_B_CLK+
LVDS_A_CLK+
LVDS_A_CLK-
46
MGND6
45
MGND5
44
MGND4
43
MGND3
42
MGND2
41
MGND1
ACES_59003-0400C-001
ACES_59003-0400C-001
CONN@
CONN@
LCD_B_CLK-
GND
VR_SRC VR_SRC VR_SRC
PWM
VR_GND VR_GND VR_GND
GND
LVDS_B2+
LVDS_B2-
LVDS_B1+
LVDS_B1-
LVDS_B0+
LVDS_B0-
GND
GND
LVDS_A2+
LVDS_A2-
LVDS_A1+
LVDS_A1-
LVDS_A0+
LVDS_A0-
EDID_DATA
EDID_CLK
BIST
V_EDID LCD_VDD LCD_VDD
CONNTST
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
BIA_PWM_LVDS
12
1 2
C246
C246
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
1 2
LE92 BLM18BB221SN1D_2 P~DLE 92 BLM18BB 221SN1D_2P~D
LDDC_DATA_SW LDDC_CLK_SW LCD_TST
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
R1137
R1137
10K_0402_5%~D
10K_0402_5%~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
BATT_WHITE_LED 45 BATT_YELLOW_LED 45 BREATH_WHITE_LED 45
+BL_PWR_SRC
DISP_ON
BIA_PWM_LVDS
SW_LVDS_BCLK+ 23
SW_LVDS_BCLK- 23
SW_LVDS_B2+ 23
SW_LVDS_B2- 23
SW_LVDS_B1+ 23
SW_LVDS_B1- 23
SW_LVDS_B0+ 23
SW_LVDS_B0- 23
SW_LVDS_ACLK+ 23
SW_LVDS_ACLK- 23
SW_LVDS_A2+ 23
SW_LVDS_A2- 23
SW_LVDS_A1+ 23
SW_LVDS_A1- 23
SW_LVDS_A0+ 23
SW_LVDS_A0- 23
LDDC_DATA_SW 23
LDDC_CLK_SW 23
LCD_TST 41
+3.3V_RUN
+LCDVDD
ATG_MAC_LCD_DET# 17
D66
D66
21
D63
D63
21
D68
D68
21
4
BIA_PWM_PCH 16
BIA_PWM_GPU 46
BIA_PWM_EC 42
+3.3V_RUN
1 2
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
1 2
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
LDDC_CLK_SW
LDDC_DATA_SW
Place near to JLVDS1
+LCDVDD
1
C298
C298
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
Close to JLVDS1.42,43
DISP_ON
12
R1138
R1138 100K_0402_5%~D
100K_0402_5%~D
3
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C243
C243
1
2
Close to JLVD1.41
D67
D67
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
21
D64
D64
21
D69
D69
21
ENVDD_PCH16,41
LCD_VCC_TEST_EN41
ENVDD_GPU46
PANEL_BKEN_PCH 16
PANEL_BKEN_DGPU 46
PANEL_BKEN_EC 41
LCD Power
D53
D53
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
2 1
D6
D6
2
3
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
2
+15V_ALW +3.3V_ALW
130_0402_5%~D
130_0402_5%~D
12
R413
R413
61
40mil
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C297
C297
2
EN_INVPWR42
+15V_ALW
12
2
13
2
+PWR_SRC
12
R423 47K_0402_5%~DR423 47K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
R414
R414
5
Q20
Q20 PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
R422
R422 100K_0402_5%~D
100K_0402_5%~D
1 2
+LCDVDD
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q19A
Q19A
EN_LCDPWR
1
12
R412
R412 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q19B
Q19B
4
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
4 5
PWR_SRC_ON
EN_INVPWR
+LCDVDD
4 5
Q21
Q21
D
D
S
S
G
G
3
Q22
Q22 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1 3
1
Q18
Q18
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
6
2 1
G
G
3
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
1
C293
C293
2
40mil
6
2 1
1
C296
C296
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
2
S
S
G
G
2
FDC654P: P CHANNAL
1
C292
C292
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
+BL_PWR_SRC
Panel backlight power control by EC
+CAMERA_VDD
JCAM1
JCAM1
For Webcam
B B
+CAMERA_VDD
D
S
D
S
10U_0805_10V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
PMV45EN_SOT23-3~D
1
1
2
C300
C300
C299
C299
2
Webcam PWR CTRL
CCD_OFF41
A A
CCD_OFF
PMV45EN_SOT23-3~D
+15V_ALW
2
G
G
5
12
R429
R429 100K_0402_5%~D
100K_0402_5%~D
13
D
D
Q24
Q24
S
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q23
Q23
13
G
G
2
1
C303
C303
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
2
+3.3V_RUN
1
C301
C301
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
USBP12-17
USBP12+17
4
1 2 3 4 5 6 7
8 G1 G2
JST_BM08B-SRSS-TB1-LF-SN~D
JST_BM08B-SRSS-TB1-LF-SN~D
CONN@
CONN@
CAM_MIC_CBL_DET#
1
USBP12_D+
2
USBP12_D-
3 4
DMIC_CLK
5 6
DMIC0
7 8 9 10
L10
@L10
@
DLW21SN121SQ2L_4P~D
USBP12- USBP12_D-
USBP12+
DLW21SN121SQ2L_4P~D
4
4
1
1
1 2
R427 0_0402_5%~DR4 27 0_0402_5%~D
1 2
R428 0_0402_5%~DR4 28 0_0402_5%~D
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
@D7
@
D7
2 1
3
2
CAM_MIC_CBL_DET# 17
DMIC_CLK 30
DMIC0 30
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
@D8
@
D8
2 1
3
USBP12_D+
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
+15V_ALW
+3.3V_ALW
12
R431
R431 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
5
61
Q125A
Q125A
TOUCH_SCREEN_PD#42
2
+5V_TSP +5V_RUN
12
R430
R430 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q125B
Q125B
4
2
R1592
@R1592
@
0_0603_5%~D
0_0603_5%~D
1 2
PMV45EN_SOT23-3~D
PMV45EN_SOT23-3~D
D
S
D
S
13
Q32
Q32
G
G
2
1
C304
C304
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
2
E3_PAID_TS_DET#18
Touch Screen Connector
U86
@U86
@
1
+5V_TSP
USBP13-
GND
2
IO1
PRTR5V0U2X_SOT143-4~D
PRTR5V0U2X_SOT143-4~D
JTCH1
JTCH1
1 2 3 4 5 6
CONN@
CONN@
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
C306
C306
1
2
Place close JTCH1
USBP13-17 USBP13+17
USBP13- USB P13+
USBP13+
VCC
IO2
8
1
G2
2 3 4 5 6
G1
TYCO_1734595-6
TYCO_1734595-6
7
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
eDP & CAM &TS Conn
eDP & CAM &TS Conn
eDP & CAM &TS Conn
LA-6592P
LA-6592P
LA-6592P
1
4
+3.3V_RUN
3
+5V_TSP
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C302
C302
2
1.0
1.0
24 75Thursday, January 13, 2011
24 75Thursday, January 13, 2011
24 75Thursday, January 13, 2011
1.0
2
1
+5V_RUN
U93
U93
MAX14885E
MAX14885E
7
REDA
17
REDB
8
GRNA
18
GRNB
9
BLUA
19
BLUB
5
SCLA
15
SCLB
6
SDAA
16
SDAB
2
EN
3
SHA
13
SHB
4
SVA
14
SVB
1
S00
40
S01
39
S10
38
S11
30
GND
20
GND
10
GND
41
GPAD
MAX14885EETL+T_TQFN40_5X5~D
MAX14885EETL+T_TQFN40_5X5~D
0
0
0
0
1
GPU_CRT_CLK_DDC46
GPU_CRT_DAT_DDC46
+3.3V_RUN
GPU_CRT_RED46
PCH_CRT_RED16
GPU_CRT_GRN46 PCH_CRT_GRN16
GPU_CRT_BLU46
PCH_CRT_BLU16
PCH_CRT_DDC_CLK16
PCH_CRT_DDC_DAT16
1 2
R1581 100K_0402_5%~DR1581 100K_0402_5%~D
GPU_CRT_HSYNC46
PCH_CRT_HSYNC16
GPU_CRT_VSYNC46
PCH_CRT_VSYNC16
EDID_SELECT#41
CRT_SWITCH41
DGPU_SELECT#23,41
CRT_EN
CRT_SWITCH
CRT_SWITCH
B B
Channel A --> GPU
Channel B --> PCH
CRT_SWITCH
DGPU_SELECT#
EDID_SELECT#
VCC
VCC
RED1 RED2
GRN1 GRN2
BLU1 BLU2
SCL1 SCL2
SDA1 SDA2
SH1 SH2
SV1 SV2
29
21
11
VL
33 24
32 23
31 22
35 26
34 25
37 28
36 27
12
NC
1 1
01 1
1
2
10
+3.3V_RUN
C1182
C1182 1U_0603_10V7K~D
1U_0603_10V7K~D
RED_CRT 31 RED_DOCK 40
GREEN_CRT 31 GREEN_DOCK 40
BLUE_CRT 31 BLUE_DOCK 40
CLK_DDC2_CRT 31 CLK_DDC2_DOCK 40
DAT_DDC2_CRT 31 DAT_DDC2_DOCK 40
HSYNC_BUF 31 HSYNC_DOCK 40
VSYNC_BUF 31 VSYNC_DOCK 40
1
C1181
C1181 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
Port 1 --> MB Port RGB
Port 2 --> Docking Port RGB
A --> Port 1 B --> Port 1 A --> Port 2 B --> Port 2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
1
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
CRT/Video switch
CRT/Video switch
CRT/Video switch
LA-6592P
LA-6592P
LA-6592P
25 75Thursday, January 13, 2011
25 75Thursday, January 13, 2011
25 75Thursday, January 13, 2011
1.0
1.0
1.0
2
+5V_RUN
21
3
D4
D4
NC
NC
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
+5V_RUN_HDMI
+VDISPLAY_VCC
0_1206_5%~D
0_1206_5%~D
21
@R5
1 2
+3.3V_RUN
@
R5
1
2
+3.3V_RUN
12
R443
R443
4.7K_0402_5%~D
4.7K_0402_5%~D
HDMI_OE#
13
D
+3.3V_RUN
1 2
B B
+5V_RUN
12
A A
R446 4.7K_0402_5%~D@R446 4.7K_0402_5%~D@
1 2
R447 4.7K_0402_5%~D@R447 4.7K_0402_5%~D@
TMDSE_GPU_P247 TMDSE_GPU_N247 TMDSE_GPU_P147 TMDSE_GPU_N147 TMDSE_GPU_P047 TMDSE_GPU_N047 TMDSE_GPU_CLK47 TMDSE_GPU_CLK#47
21
0_0402_5%~D
0_0402_5%~D
D65
@D65
@
R1163
R1163
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
+5V_HDMI_DDC
+3.3V_RUN
HDMI_SDA_CTL
HDMI_SCL_CTL
C346 0.1U_0402_1 0V7K~DC346 0.1U_0402_10V7K~D
12
C347 0.1U_0402_1 0V7K~DC347 0.1U_0402_10V7K~D
12
C348 0.1U_0402_1 0V7K~DC348 0.1U_0402_10V7K~D
12
C349 0.1U_0402_1 0V7K~DC349 0.1U_0402_10V7K~D
12
C350 0.1U_0402_1 0V7K~DC350 0.1U_0402_10V7K~D
12
C351 0.1U_0402_1 0V7K~DC351 0.1U_0402_10V7K~D
12
C352 0.1U_0402_1 0V7K~DC352 0.1U_0402_10V7K~D
12
C353 0.1U_0402_1 0V7K~DC353 0.1U_0402_10V7K~D
12
+3.3V_RUN
+3.3V_RUN
R460 1.5K_0402_5%~DR460 1.5K_0402_5%~D R461 1.5K_0402_5%~DR461 1.5K_0402_5%~D
EQUALIZATION SETTING: [PC2,PC1,PC0]=000, 12dB [PC2,PC1,PC0]=001, 16dB [PC2,PC1,PC0]=010, 10dB [PC2,PC1,PC0]=011, 7dB [PC2,PC1,PC0]=100, 1.5dB [PC2,PC1,PC0]=101, 4dB (Default) [PC2,PC1,PC0]=110, 9dB [PC2,PC1,PC0]=111, 7dB
1 2
R457 4.7K_0402_5%~DR457 4.7K_0402_5%~D
12 12
1 2
R463 4.7K_0402_5%~DR463 4.7K_0402_5%~D
1 2
R464 4.7K_0402_5%~D@R464 4.7K_0402_5%~D@
1 2
R465 4.7K_0402_5%~DR465 4.7K_0402_5%~D
HDMI_HPD_SINK
HDMI_SDA_CTL HDMI_SCL_CTL
R467
R467 499_0402_1%~D
499_0402_1%~D
1 2
HDMI_HPD_SINK
TMDSE_GPU_C_P2 TMDSE_GPU_C_N2 TMDSE_GPU_C_P1 TMDSE_GPU_C_N1 TMDSE_GPU_C_P0 TMDSE_GPU_C_N0 TMDSE_GPU_C_CLK TMDSE_GPU_C_CLK#
HDMI_OE#
HDMI_SDA_SINK HDMI_SCL_SINK
1
2
D
2
G
G
S
S
U19
U19
38
IN1p
39
IN1n
41
IN2p
42
IN2n
44
IN3p
45
IN3n
47
IN4p
48
IN4n
2
POW
30
HPD_SINK
26
I2C_CTL_EN#
32
NC/DDCBUF_EN#
25
NC/OE#
8
SDA
9
SCL
34
SDA_CTL/CFG1
35
SCL_CTL/CFG0
PC0
3
I2C_ADDR0/PC0
PC1
4
I2C_ADDR1/PC1
PC2
1
GND/PC2
6
REXT
10
CEXT
C355
C355
2.2U_0402_6.3V6M~D
2.2U_0402_6.3V6M~D
Q25
Q25 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
33
11
15
21
VCC4
VCC540VCC6
VCC1
VCC2
VCC3
GND7
GND424GND631GND5
GND3
GND15GND2
36
27
18
12
+3.3V_RUN_HDMI
46
OUT1p OUT1n OUT2p OUT2n OUT3p OUT3n OUT4p OUT4n
HPD
SDAZ
SCLZ
GND837GND9
GND10
PS121QFN48G_QFN48_7X7
PS121QFN48G_QFN48_7X7
43
49
1
2
TMDSE_RP_P2
23
TMDSE_RP_N2
22
TMDSE_RP_P1
20
TMDSE_RP_N1
19
TMDSE_RP_P0
17
TMDSE_RP_N0
16
TMDSE_RP_CLK
14
TMDSE_RP_CLK#
13
DPE_GPU_HPD
7
TMDS_E_GPU_DDC#
29
TMDS_E_GPU_DDC
28
Close to U19 VCC pins
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C354
C354
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C339
C339
2
DPE_GPU_HPD 46
C340
C340
0.1U_0402_16V4Z~D
1
1
C341
C341
C342
C342
2
2
TMDS_E_GPU_DDC# 47 TMDS_E_GPU_DDC 47
1
2
HDMI_CEC
DPE_GPU_HPD
2A_8VDC_SMD1812P200TF
2A_8VDC_SMD1812P200TF
+3.3V_RUN
12
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C344
C344
C343
C343
2
2
R1165 10K_040 2_5%~DR1165 10K_0402_5%~D
PJP54
PJP54 PAD-OPEN1x1m
PAD-OPEN1x1m
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C345
C345
1 2
R1128 100K_04 02_5%~DR1128 100K_0402_5%~D
F2
F2
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C337
C337
HDMI_HPD_SINK
TMDSE_RP_CLK
1
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
C338
C338
2
TMDSE_RP_CLK#
TMDSE_RP_P0
TMDSE_RP_N0
TMDSE_RP_P1
TMDSE_RP_N1
TMDSE_RP_P2
TMDSE_RP_N2
R1164
R1164
10K_0402_5%~D
10K_0402_5%~D
1 2
HDMI_SDA_SINK HDMI_SCL_SINK
HDMI_CEC TMDSE_CON_CLK#
TMDSE_CON_CLK TMDSE_CON_N0
TMDSE_CON_P0 TMDSE_CON_N1
TMDSE_CON_P1 TMDSE_CON_N2
TMDSE_CON_P2
HDMI_HPD_SINK_R
1 2
R451 0_0402_5%~D@R451 0_0402_5%~D@ L19
L19
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R459 0_0402_5%~D@R459 0_0402_5%~D@
1 2
R462 0_0402_5%~D@R462 0_0402_5%~D@ L20
L20
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R466 0_0402_5%~D@R466 0_0402_5%~D@
1 2
R468 0_0402_5%~D@R468 0_0402_5%~D@ L21
L21
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R469 0_0402_5%~D@R469 0_0402_5%~D@
1 2
R470 0_0402_5%~D@R470 0_0402_5%~D@ L22
L22
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R471 0_0402_5%~D@R471 0_0402_5%~D@
3
3
2
2
3
3
2
2
3
3
2
2
3
3
2
2
JHDMI1
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
TYCO_2041270-1
TYCO_2041270-1
CONN@
CONN@
20
GND
21
GND
22
GND
23
GND
TMDSE_CON_CLK
TMDSE_CON_CLK#
TMDSE_CON_P0
TMDSE_CON_N0
TMDSE_CON_P1
TMDSE_CON_N1
TMDSE_CON_P2
TMDSE_CON_N2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
1
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDMI port
HDMI port
HDMI port
LA-6592P
LA-6592P
LA-6592P
26 75Tuesday, January 18, 2011
26 75Tuesday, January 18, 2011
26 75Tuesday, January 18, 2011
1.0
1.0
1.0
5
4
3
2
1
1 2
+3.3V_RUN
C356
C356
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DPC_GPU_AUX#/DDCDPC_DOCK_AUX#
12
DPD_GPU_AUX/DDC47
DPD_GPU_AUX#/DDC47
DPD_CA_DET
AUX/DDC GPU for DPD to E-DOCK
C367
C367
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
DPD_GPU_AUX_CDPD_GPU_AUX/DDC
12
DPD_DOCK_AUX DPD_GPU_AUX/DDC
DPD_GPU_AUX#_CDPD_GPU_AUX#/DDC
12
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D
+3.3V_RUN
+15V_ALW
12
R1063
R1063 100K_0402_5%~D
100K_0402_5%~D
+3.3V_RUN
5
2
12
R1066
R1066
2.2K_0402_5%~D
2.2K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q109B
Q109B
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
Q109A
Q109A
100K_0402_5%~D
100K_0402_5%~D
1
C1175
C1175
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
2
R1065
R1065
DPD_DOCK_AUX40
DPD_DOCK_AUX#40
DPD_CA_DET40
+3.3V_ALW2
12
61
2
U23
U23
1 2
3
4 5
6
7
C369 0.1U_0402_16V4Z~DC369 0.1U_0402_16V4Z~D
12
R1062
R1062
2.2K_0402_5%~D
2.2K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q111A
Q111A
1 2
R1067 0_0402_5%~D@R1067 0_0402_5%~D@
Q111B
Q111B
DPD_DOCK_AUX#
VCC
BE0
BE3
A0
B0
BE1 A1
BE2
B1
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
12
1
5
P
NC
A2Y
G
U24
U24 NC7SZ04P5X-G_SC70-5~D
NC7SZ04P5X-G_SC70-5~D
3
1 2
R1064 0_0402_5%~D@R1064 0_0402_5%~D@
DPD_DOCK_AUX
14 13
12
A3
11
B3
10
9
A2
8
B2
DPD_CA_DET#DPD_CA_DET
4
AUX/DDC GPU for DPC to E-DOCK
U20
C357
D D
C C
B B
DPC_GPU_AUX/DDC47
DPC_GPU_AUX#/DDC47
DPC_DOCK_AUX40
DPC_DOCK_AUX#40
DPC_CA_DET
1
2
C357
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D
DPC_CA_DET40
R1532
R1532
100K_0402_5%~D
100K_0402_5%~D
C1174
C1174
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
DPC_GPU_AUX_CDPC_GPU_AUX/DDC
12
DPC_DOCK_AUX DPC_GPU_AUX/DDC
DPC_GPU_AUX#_CDPC_GPU_AUX#/DDC
12
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
+15V_ALW
+3.3V_ALW2
2
12
R1537
R1537 100K_0402_5%~D
100K_0402_5%~D
12
61
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q110B
Q110B
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
Q110A
Q110A
U20
1
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
12
C365
C365
2
+3.3V_RUN
12
3
5
4
VCC BE3
A3
B3
BE2
A2
B2
1
5
P
NC
4
A2Y
G
U21
U21 NC7SZ04P5X-G_SC70-5~D
NC7SZ04P5X-G_SC70-5~D
3
+3.3V_RUN
12
R1539
R1539
2.2K_0402_5%~D
2.2K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q113A
Q113A
R1530
R1530
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2
R1523 0_0402_5%~D@R1523 0_0402_5%~D@
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q113B
Q113B
DPC_DOCK_AUX#
14 13
12
11 10
9
8
DPC_CA_DET#DPC_CA_DET
R1538 0_0402_5%~D@ R1538 0_0402_5%~D@
DPC_DOCK_AUX
+3.3V_RUN
C366
C366
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DPD_GPU_AUX#/DDCDPD_DOCK_AUX#
12
A A
DELL CONFIDENTIAL/PROPRIETARY
1 2
R491 1M_0 402_5%~DR491 1M_0402_5%~D
1 2
R492 1M_0 402_5%~DR492 1M_0402_5%~D
5
DPD_CA_DET
DPC_CA_DET
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Title
Title
ize Document Number R ev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DP AUX SW
DP AUX SW
DP AUX SW
LA-6592P
LA-6592P
LA-6592P
27 75Thursday, January 13, 2011
27 75Thursday, January 13, 2011
27 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
D D
+3.3V_RUN
12
PJP53
PJP53 PAD-OPEN1x1m
PAD-OPEN1x1m
4
HDD Repeater
PSATA_PTX_DRX_P0_C14
PSATA_PTX_DRX_N0_C14
PSATA_PRX_DTX_N0_C14
PSATA_PRX_DTX_P0_C14
C383 0.01U_0402_ 16V7K~DC383 0.01U_0402_16V7K~D
C384 0.01U_0402_ 16V7K~DC384 0.01U_0402_16V7K~D
C386 0.01U_0402_ 16V7K~DC386 0.01U_0402_16V7K~D
C385 0.01U_0402_ 16V7K~DC385 0.01U_0402_16V7K~D
12
12
12
12
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
12
3
@ R1 173
@
R1173
PSATA_PTX_DRX_P0
PSATA_PTX_DRX_N0
PSATA_PRX_DTX_N0
PSATA_PRX_DTX_P0
+HDD_EQ1 +HDD_EQ2
10K_0402_5%~D
10K_0402_5%~D
@ R1 175
@
12
R1175
U25
U25
7
EN
18
CAD
1
AINP
2
AINM
4
BOUTM
5
BOUTP
3
GND
13
GND
17
GND
19
GND
21
EP
MAX4951BECTP+TGH7_TQFN20_4X4~ D
MAX4951BECTP+TGH7_TQFN20_4X4~ D
VCC VCC VCC VCC
AOUTP AOUTM
BINP
BINM
6 10 16 20
9
PA
8
PB
15 14
11 12
2
+3.3V_RUN
12
PJP63
PJP63 PAD-OPEN1x1m
PAD-OPEN1x1m
+3.3V_RUN_HDDR
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
+HDD_DEW2
+HDD_DEW1
HDD_PE1 HDD_PE2
PSATA_PTX_DRX_P0_RP PSATA_PTX_DRX_N0_RP
PSATA_PRX_DTX_P0_RP PSATA_PRX_DTX_N0_RP
1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C381
C381
C382
C382
0_0402_5%~D
@
0_0402_5%~D
@
2
12
R1171
R1171
10K_0402_5%~D
10K_0402_5%~D
@R1172
@
12
R1172
+3.3V_RUN
0_0402_5%~D
@R493
0_0402_5%~D
@
0_0402_5%~D
@R494
0_0402_5%~D
0_0402_5%~D
@ R1169
0_0402_5%~D
@
12
R1169
10K_0402_5%~D
10K_0402_5%~D
@R1170
@
12
R1170
@
R493
R494
1 2
1 2
0_0402_5%~D
@R495
0_0402_5%~D
@
0_0402_5%~D
0_0402_5%~D
@R496
@
12
12
R495
R496
Free Fall Sensor
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
1
C C
+3.3V_RUN
1 2
R501 10K_0402_5%~DR501 10K_0402_5%~D
1 2
R502 10K_0402_5%~DR502 10K_0402_5%~D
1 2
R503 100K_0402_5%~DR503 100K_0402_ 5%~D
B B
FFS_INT218
FFS_INT2 FFS_INT2_Q
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
DDR_XDP_WAN_ SMBDAT
DDR_XDP_WAN_ SMBCLK
HDD_FALL_INT
+3.3V_RUN
G
G
2
13
D
S
D
S
Q29
Q29
+3.3V_RUN_FFS
1
C387
C387
C388
C388
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
HDD_FALL_INT17
DDR_XDP_WAN_ SMBDAT7,12,13,14,15,36 DDR_XDP_WAN_ SMBCLK7,12,13,14,15,36
D16
D16
21
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+5V_HDD
12
HDD_FALL_INT FFS_INT2
R506
@R506
@
100K_0402_5%~D
100K_0402_5%~D
U26
U26
DE351DLTR
DE351DLTR
1
VDD_IO
6
8
12 13 14
7
DE351DLTR8_LGA14_3X5~D
DE351DLTR8_LGA14_3X5~D
PSATA_PTX_DRX_N0_RP
PSATA_PRX_DTX_N0_RP
+3.3V_RUN
+5V_HDD
GND
VDD
GND GND
INT 1 INT 29GND
SDO SDA / SDI / SDO SCL / SPC
RSVD
CS
RSVD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
1
C395
C395
2
2
Pleace near HDD CONN
2 4 5 10
3 11
C389 0.01U_0402_16V7K~DC389 0.01U_0402_16V7K~D C390 0.01U_0402_16V7K~DC390 0.01U_0402_16V7K~D
C391 0.01U_0402_16V7K~DC391 0.01U_0402_16V7K~D C392 0.01U_0402_16V7K~DC392 0.01U_0402_16V7K~D
C396
C396
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
12 12
12 12
PJP64
PJP64
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
+3.3V_RUN
+3.3V_RUN_HDD
HDD_DET#14
SATA_PTX_DRX_P0 SATA_PTX_DRX_N0
SATA_PRX_DTX_N0 SATA_PRX_DTX_P0PSATA_PRX_DTX_P0_RP
HDD_DET#
+5V_HDD
FFS_INT2_Q
0_0402_5%~D
@R1174
0_0402_5%~D
@
0_0402_5%~D
@R1176
0_0402_5%~D
@
12
12
R1174
R1176
JSATA1
JSATA1
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
Reserved
19
GND
20
12V
21
12V
22
12V
JAE_SP100421-HDD
JAE_SP100421-HDD
CONN@
CONN@
Main SATA +5V Default
GND1 GND2
Note: +HDD_DEW1, +HDD_DEW2, +HDD_EQ1, +HDD_EQ2 need to route 10 mils and R1169,R1171,R1174,R1176 need to change to 10k and no stuff R1174, R1176 to support TI SN75LVCP601
HDD PWR
R499
@Q28B
@
Q28B
+5V_ALW
6
2
1
G
G
3
S
S
4 5
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
@C393
@
1
1
C393
2
2
+5V_HDD Source
D
D
@
@
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
+5V_HDD
10U_0805_10V4Z~D
10U_0805_10V4Z~D
12
C394
C394
+15V_ALW
+3.3V_ALW2
12
R500
@R500
@
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
@Q28A
@
Q28A
R505
R505
2
12
HDDC_EN42
100K_0402_5%~D
23 24
100K_0402_5%~D
5
12
@R499
@
100K_0402_5%~D
100K_0402_5%~D
HDD_EN_5VPSATA_PTX_DRX_P0_RP
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
Q27
Q27
PJP3
PJP3
112
JUMP_43X79
JUMP_43X79
SHORT DEFAULT
R504
R504 100K_0402_5%~D
100K_0402_5%~D
+5V_RUN
2
+3.3V_RUN_HDD
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
A A
5
C402
C402
1
1
C399
C399
0.1U_0402_16V4Z~D
2
0.1U_0402_16V4Z~D
2
Pleace near HDD CONN
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDD CONNECTOR
HDD CONNECTOR
HDD CONNECTOR
LA-6592P
LA-6592P
LA-6592P
28 75Thursday, January 13, 2011
28 75Thursday, January 13, 2011
28 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
+3.3V_ALW
ZODD_WAKE#
1 2
R510 10K_0402_5%~DR510 10K_0402_5%~D
+3.3V_ALW_PCH
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C397
C397
2
R513 10K_0402_5%~DR513 10K_0402_5%~D
R514 100K_0402_5%~DR514 100K_0402_5%~D
1
2
D D
+5V_MOD
C C
1 2
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C398
C398
MOD_MD
USB30_SMI#
SATA_ODD_PTX_DRX_P1_C14 SATA_ODD_PTX_DRX_N1_C14
SATA_ODD_PRX_DTX_N1_C14 SATA_ODD_PRX_DTX_P1_C14
DEVICE_DET#42
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16V7K~D C406 0.01U_0402_16V7K~DC406 0.01U_0402_16V7K~D
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16V7K~D C404 0.01U_0402_16V7K~DC404 0.01U_0402_16V7K~D
Pleace near ODD CONN
CLK_PCIE_EMB15 CLK_PCIE_EMB#15
PCIE_PRX_EMBTX_P415 PCIE_PRX_EMBTX_N415
PCIE_PTX_EMBRX_P415
PCIE_PTX_EMBRX_N415
MODC_EN#
3
USB30_EN
EMBCLK_REQ#
+3.3V_ALW
ZODD_WAKE#
PCIE_WAKE# PLTRST_EMB# BAY_SMBDAT BAY_SMBCLK
EMBCLK_REQ#15
PCIE_WAKE#36,37,41
PLTRST_EMB#17
BAY_SMBDAT42,52
BAY_SMBCLK42,52
MOD_SATA_PCIE#_DET41
B B
Q76
Q76 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
S
D
MOD_MD
S
13
G
G
2
Q123B
Q123B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
5
4
12 12
12 12
+5V_MOD
1 2
R1183 10K_0402_5%~DR 1183 10K_0402_5%~D
USB30_SMI#
SATA_ODD_PTX_DRX_P1 SATA_ODD_PTX_DRX_N1
SATA_ODD_PRX_DTX_N1 SATA_ODD_PRX_DTX_P1
PCIE_PTX_EMBRX_P4_C
C4090.1U_0402_10 V7K~D C4090.1U_0402_10V7K~D
12
PCIE_PTX_EMBRX_N4_C
C4080.1U_0402_10 V7K~D C4080.1U_0402_10V7K~D
12
+5V_MOD
ZODD_WAKE# 41
USB30_SMI# 14
MOD_MD
For ODD
JSATA2
JSATA2
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
DP
9
+5V
10
+5V
11
MD
12
GND
13
GND
14
GND
15
REFCLK+
16
REFCLK-
17
GND
18
PETX+
19
PETX-
20
GND
21
GND
22
PERX+
23
PERX-
24
GND
25
+5V
26
CLKREQ#
27
WAKE#
28
PERST#
29
SMB_DATA
30
SMB_CLK
31
HPD
TYCO_2-2129116-3
TYCO_2-2129116-3
CONN@
CONN@
GND1 GND2
3
32 33
MOD_SATA_PCIE#_DET
MODC_EN41
+3.3V_ALW
12
R515
R515 100K_0402_5%~D
100K_0402_5%~D
USB30_EN
61
Q123A
Q123A DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
R512
R512
100K_0402_5%~D
100K_0402_5%~D
2
+5VMOD Source
+3.3V_ALW2
12
R509
R509 100K_0402_5%~D
100K_0402_5%~D
MODC_EN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q31A
Q31A
2
12
12
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
5
4
R507
R507 100K_0402_5%~D
100K_0402_5%~D
MOD_EN
3
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
Q31B
Q31B
1
2
+5V_ALW+ 15V_ALW
6
2
1
D
D
G
G
S
S
4 5
C400
C400
1
2
Q30
Q30
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C401
C401
1
+5V_MOD +5V_RUN
PJP4
PJP4
2
112
12
JUMP_43X79
JUMP_43X79
R511
R511 100K_0402_5%~D
100K_0402_5%~D
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ODD CONNECTOR
ODD CONNECTOR
ODD CONNECTOR
LA-6592P
LA-6592P
LA-6592P
29 75Thursday, January 13, 2011
29 75Thursday, January 13, 2011
29 75Thursday, January 13, 2011
1
1.0
1.0
1.0
2
DVDD_IO should match
Internal Speakers Header
INT_SPK_L+ INT_SPK_L­INT_SPK_R+ INT_SPK_R-
1
2
B B
20 mils trace
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
1
1
C973
C973
C974
C974
2
2
L91 BLM18BD121SN1D_2P ~DL91 BLM18BD121SN1D_2P ~D
1 2
L92 BLM18BD121SN1D_2P ~DL92 BLM18BD121SN1D_2P ~D
1 2
L93 BLM18BD121SN1D_2P ~DL93 BLM18BD121SN1D_2P ~D
1 2
L94 BLM18BD121SN1D_2P ~DL94 BLM18BD121SN1D_2P ~D
1 2
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
1
C975
C975
C976
C976
2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
3
@DE1
@
DE1
1
INT_SPK_R+_L
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
1
INT_SPK_L+_L INT_SPK_L-_L
INT_SPK_R-_L
@DE2
@
DE2
Speaker Connector
JSPK1
CONN@JSP K1
CONN@
1
1
2
2
3
5
3
G1
4
6
4
G2
MOLEX_53398-0471~D
MOLEX_53398-0471~D
PCH_AZ_CODEC_BITCLK14
PCH_AZ_CODEC_SDOUT14
PCH_AZ_CODEC_SYNC14
PCH_AZ_CODEC_SDIN014
PCH_AZ_CODEC_RST#14
Close to U16 pin5 Close to U16 pin6
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
12
R1077
@R1077
@
47_0402_5%~D
47_0402_5%~D
1
C978
@C978
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
12
R1076
@R1076
@
10_0402_5%~D
10_0402_5%~D
1
C977
@C977
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
AUD_NB_MUTE#41
with HDA Bus level
+3.3V_RUN +3.3V_RU N
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C994
C994
2
I2S_DO
1U_0603_10V6K~D
1
C952
C952
2
Place R1096 close to codec
1 2
33_0402_5%~DR1096 33_0402_5%~DR1096
1 2
Place R1097 close to codec
+3.3V_RUN
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
33_0402_5%~DR1097 33_0402_5%~DR1097
10K_0402_5%~DR1099 10K_0402_5%~DR1099
C953
C953
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
PCH_AZ_CODEC_RST#
I2S_DO_R
I2S_LRCLK
I2S_DI#
Notes: Keep PVDD supply and speaker traces routed on the DGND plane. Keep away from AGND and other analog signals
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C954
C954
2
I2S_12MHZ
Place C951~C961 close to Codec
U72
U72
1
DVDD_CORE
3
DVDD_IO
9
DVDD
6
BITCLK
5
SDATA_OUT
10
SYNC
8
SDATA_IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
7
DVSS
42
PVSS
49
GND
92HD90B2X5NLGXZBX8_QFN48_7X7~D
92HD90B2X5NLGXZBX8_QFN48_7X7~D
AVDD1 AVDD2
SENSE_A SENSE_B
PORTA_L PORTA_R VrefOut_A
PORTB_L PORTB_R
PORTD_+L
PORTD_-L
PORTD_+R
PORTD_-R
MONO_OUT
PC_BEEP
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
VREFFILT
PVDD PVDD
CAP+
CAP-
CAP2
Vreg
AVSS1
AVSS AVSS
27 38
45 39
13 14
28 29 23
31 32
40 41
44 43
25
12
2 4 46 48
36
35
21 22 34
V-
37
26 30 33
1
place close to pin27 place close to pin38
+VDDA_AVDD
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C955
C955
2
+VDDA_PVDD
AUD_SENSE_A AUD_SENSE_B
MIC_IN_L MIC_IN_RR
AUD_HP_OUT_L AUD_HP_OUT_R
INT_SPK_L+ INT_SPK_L-
INT_SPK_R+ INT_SPK_R-
AUD_PC_BEEPI2S_BCLK
DMIC_CLK_L
1
2
1 2
1 2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D
LE93
LE93
1 2
BLM18BB221SN1D_2P~D
BLM18BB221SN1D_2P~D
Place LE93 close to codec
C962
C962
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
Place C962 close to Codec
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1
C956
C956
2
1U_0402_6.3V6K~DC1163 1U_0402_6.3V6K~DC1163
+VREFOUT_R
1 2
C1105 0.1U_0402_16V4Z ~DC1105 0.1U_040 2_16V4Z~D
1 2
C1106 0.1U_0402_16V4Z ~DC1106 0.1U_040 2_16V4Z~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C957
C957
2
2
MIC_IN_R 31
+VREFOUT
AUD_HP_OUT_L 31 AUD_HP_OUT_R 31
MIC_IN_L and MIC_IN_RR must symmetric in layout
BEEP_R
DMIC_CLK 24 DMIC0 24
C1172
C1172
SPKR_R
Place C963~C966 close to Codec
1U_0603_10V6K~D
1U_0603_10V6K~D
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
1
C963
C963
2
1
1
C964
C964
2
2
0.1U_0402_16V4Z~D
1
C1173
C1173
2
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
2
MIC_IN_RR
+VREFOUT_R MIC_IN_R
C965
C965
1
C958
C958
C959
C959
2
2
1 2
R161 0_0402_5%~DR161 0_ 0402_5%~D
2 1
D70 R B751V-40GTE-17_SOD323-2~DD70 R B751V-40GTE-17_SOD323-2~D
1 2
R1119 100K_0402_5%~DR1119 100K_ 0402_5%~D
1 2
R1120 100K_0402_5%~DR1120 100K_ 0402_5%~D
1 2
R1141 10K_0402_5%~D@ R1141 10K_04 02_5%~D@
1 2
R1142 10K_0402_5%~D@ R1142 10K_04 02_5%~D@
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C966
C966
2
+5V_RUN
R1095
R1095
0_0805_5%~D
0_0805_5%~D
1 2
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C960
C960
C961
C961
2
Pop R161 0-ohm for Combo Jack, pop C1164 1UF for E2 backup circuit
+VREFOUT_R
1U_0603_10V6K~D
1U_0603_10V6K~D
1
2
L77
L77
BLM21PG600SN1D_0805~D
BLM21PG600SN1D_0805~D
1 2
0.1U_0402_16V4Z~D
+5V_RUN
SPKR 14
BEEP 42
C1180
C1180
Place closely to Pin 13.
AUD_SENSE_A
+3.3V_RUN
12
R1088
@R1088
@
100K_0402_5%~D
100K_0402_5%~D
AUD_MIC_SWITCH31
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
A A
Add for solve pop noise and detect issue
2
Q107A
Q107A
12
12
R1086
R1086 20K_0402_1%~D
R352
@ R352
@
20K_0402_1%~D
39.2K_0402_1%~D
39.2K_0402_1%~D
3
61
5
Q107B
Q107B
4
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C980
C980
2
Place closely to Pin 14
AUD_SENSE_B
12
+3.3V_RUN
39.2K_0402_1%~D
39.2K_0402_1%~D
12
R1081
R1081 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
R1079
R1079
2
Q106A
Q106A
12
R1080
R1080 20K_0402_1%~D
20K_0402_1%~D
3
61
5
Q106B
Q106B
4
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+VDDA_AVDD
R1083
R1083
2.49K_0402_1%~D
2.49K_0402_1%~D
12
+3.3V_RUN
12
R1087
R1087 100K_0402_5%~D
100K_0402_5%~D
1
C967
@C967
@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
R1078
R1078
2.49K_0402_1%~D
2.49K_0402_1%~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C979
C979
+3.3V_RUN
2
2
AUD_HP_NB_SENSE 31,41
+VDDA_AVDD
12
12
R1082
R1082 100K_0402_5%~D
100K_0402_5%~D
DOCK_MIC_DET 41DOCK_HP_DET41
Tie Analog Ground to Digital ground under codec by a single point
PJP62
PJP62
PAD-OPEN1x1m
PAD-OPEN1x1m
PORT A
PORT B
PORT C
PORT D
Resistor SENSE_A SENSE_B
39.2K
20K
2.49K
change C981 to jumper to solve audio noise issue ( Special Head phone only)
12
External MIC
HeadPhone Out
Dock Audio
Internal SPK
PORT A
PORT B
PORT E
PORT F
C981
@C981
@
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
C982
@C982
@
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
C983
@C983
@
100P_0402_50V8J~D
100P_0402_50V8J~D
GNDA
1 2
EN_I2S_NB_CODEC#41
I2S_BCLK
I2S_12MHZ
+3.3V_RUN +3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1103
C1103
2
1
16
1 2
1 2
33_0402_5%~DRE1098 33_0402_5%~DRE1098
I2S_LRCLK
I2S_DO
33_0402_5%~DRE1100 33_0402_5%~DRE1100
R1110
R1110 1K_0402_5%~D
1K_0402_5%~D
2
4
6
10
12
14
1
12
15
U73
U73
VCC
1A
2A
3A
4A
5A
6A
OE1# OE2#
CD74HC366M96_SO16~D
CD74HC366M96_SO16~D
Pull-up to AVDD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
GND
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
3
1
3
1Y#
5
2Y#
7
3Y#
9
4Y#
11
5Y#
I2S_DI#
13
6Y#
8
@D54
@
D54
2
3
1
+3.3V_RUN
DA204U_SOT323-3~D
DA204U_SOT323-3~D
@D55
@
D55
3
1
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
3
@D56
@
D56
1
2
D58
@D58
@
DA204U_SOT323-3~D
DA204U_SOT323-3~D
3
1
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
@D57
@
D57
DAI_DI 40
RE1101
RE1101
33_0402_5%~D
33_0402_5%~D
1 2
DAI_BCLK# 40
DAI_LRCK# 40
DAI_12MHZ# 40
RE1102
RE1102
33_0402_5%~D
33_0402_5%~D
1 2
12P_0402_50V8J~D
12P_0402_50V8J~D
DAI_DO# 40
12P_0402_50V8J~D
12P_0402_50V8J~D
CE574
CE574
1 2
CE573
CE573
1 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
Compal Electronics, Inc.
Azalia (HD) Codec
Azalia (HD) Codec
Azalia (HD) Codec
LA-6592P
LA-6592P
LA-6592P
30 75Thursday, January 13, 2011
30 75Thursday, January 13, 2011
30 75Thursday, January 13, 2011
1.0
1.0
1.0
5
4
3
2
1
SW1
SW1
POWER_SW#_M B42,43
D D
LAT_ON_SW_BTN#42
@D23
@
1
D23
2
4
3
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
POWER & INSTANT ON SWITCH
Defult on, WIRELESS_ON/OFF#: LOW: ON HIGH: OFF
C C
B B
A A
+3.3V_ALW
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C1001
C1001
2
LEDB_DET#18
BATT_WHITE45 BATT_YELLOW45 SATA_LED45 WLAN_LED45
PCH_AZ_MDC_RST#14
MDC_RST_DIS#41
+5V_ALW
12
R752
R752 10K_0402_5%~D
10K_0402_5%~D
VOL_MUTE42
VOL_DOWN42
VOL_UP42
WIRELESS_ON#/OFF41
LID_CL#41,45
MEDIA_DET#18
1 2 3 4 5 6
TYCO_2041084-6~D
TYCO_2041084-6~D
Q44
Q44 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
S
D
S
1 3
G
G
2
JLED1
JLED1
1 2 3 4 5
G1
6
G2
CONN@
CONN@
PCH_AZ_MDC_RST1#
1
3
SKRBAAE010_4P~D
SKRBAAE010_4P~D
SW2
@SW 2
@
2
4
SKRBAAE010_4P~D
SKRBAAE010_4P~D
1 2 3 4 5 6 7 8
9 10 11 12
TYCO_1-2041070-2~D
TYCO_1-2041070-2~D
7 8
12
1
3
Media Board
JMDIA1
JMDIA1
1 2 3 4 5 6 7 8 9 10
13
11
GND
14
12
GND
CONN@
CONN@
LED Board
R751
R751 100K_0402_5%~D
100K_0402_5%~D
Change to TYCO_2041300-2_60P-T and Horizonal reverse to SSI
SW_LAN_TX0+32 SW_LAN_TX0-32
SW_LAN_TX1-32 SW_LAN_TX1+32
SW_LAN_TX2+32 SW_LAN_TX2-32
SW_LAN_TX3-32 SW_LAN_TX3+32
+5V_RUN
+5V_ALW
1
2
1
@C308
@
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
MIC_IN_R
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C308
C50
C50
21
+3.3V_LAN
LED_100_ORG#32
LED_10_GRN#32
LAN_ACTLED_YEL#32
USB_OC1#17,39
USBP3+17 USBP3-17
ESATA_USB_PWR _EN#39,41
AUD_HP_NB_SENSE30,41
+3.3V_LAN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C997
C997
2
Place close to JIO1.13
@
@
R425
R425
1 2
100K_0402_5%~D
100K_0402_5%~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
@
@
D71
D71
DETECT_GND
need to route the trace as short as possible
I/O board CONN.
JIO1
JIO1
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
GND62GND
64
GND
66
GND
TYCO_2041300-2
TYCO_2041300-2
CONN@
CONN@
+5V_MIC
12
R38
@R38
@
560K_0402_1%~D
560K_0402_1%~D
12
R33
@R33
@
47K_0402_1%~D
47K_0402_1%~D
1
3
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
GND GND
C307
@C307
@
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
5
U6
@U6
@
P
IN+
4
O
IN-
G
LMV331IDCKRG4_SC70-5~D
LMV331IDCKRG4_SC70-5~D
2
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45
PCH_AZ_MDC_RST1#
47 49 51 53 55 57 59
61 63 65
AUD_MIC_SWITCH 30
MIC_IN_R
Analog_GND
IO_LOOP# 18
VSYNC_BUF 25
HSYNC_BUF 25
RED_CRT 25
GREEN_CRT 25
BLUE_CRT 25
DAT_DDC2_CRT 25 CLK_DDC2_CRT 25
XFR_ID_BIT# 42
AUD_HP_OUT_R 30
MIC_IN_R 30
AUD_HP_OUT_L 30
+3.3V_ALW_PCH
PCH_AZ_MDC_SDIN1 14 PCH_AZ_MDC_SYNC 1 4
PCH_AZ_MDC_SDOUT 14
PCH_AZ_MDC_BITCLK 14
+3.3V_ALW_PCH
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C1000
C1000
2
Place close to JIO1.35
+5V_ALW
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C1003
C1003
2
PJP65 PAD-OPEN1x1m@PJP65 PAD-OPEN1x1m@
1 2
Q33
@
Q33
+5V_RUN
R424
@R424
@
47K_0402_5%~D
47K_0402_5%~D
1 2
+5V_ALW_MIC_G
AUD_HP_NB_SENSE30,41
AUD_HP_NB_SENSE
@
SI2301CDS-T1-GE3_SOT23-3~D
SI2301CDS-T1-GE3_SOT23-3~D
S
S
D
D
13
G
G
2
Q46
@
Q46
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
S
D
S
1 3
G
G
2
+5V_MIC
SI2301CDS: P CHANNAL
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
LA-6592P
LA-6592P
LA-6592P
31 75Thursday, January 13, 2011
31 75Thursday, January 13, 2011
31 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
+3.3V_LAN
1 2
R545 10K_040 2_5%~D@R 545 10K_0402_5%~D@
1 2
R546 10K_040 2_5%~D@R 546 10K_0402_5%~D@
D D
PM_LANPHY_ENABLE18
C C
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
+3.3V_LAN
R549
R549
10K_0402_5%~D
10K_0402_5%~D
R555
@R555
@
1 2
0_0402_5%~D
0_0402_5%~D
R557
@R557
@
10K_0402_5%~D
10K_0402_5%~D
25MHZ_18PF_7A25000110~D
25MHZ_18PF_7A25000110~D
33P_0402_50V8J~D
33P_0402_50V8J~D
2
C470
C470
1
12
12
R1144 0_0402_5%~D@ R1144 0_0402_5%~D@ Y3
Y3
1 2
PCIE_PRX_GLANTX_P715
PCIE_PRX_GLANTX_N715
PCIE_PTX_GLANRX_P715
PCIE_PTX_GLANRX_N715
1 2
@
@
R1187
R1187
0_0402_5%~D
0_0402_5%~D
LANCLK_REQ#15
PLTRST_LAN#17
CLK_PCIE_LAN15 CLK_PCIE_LAN#15
LAN_SMBCLK15
LAN_SMBDATA15
33P_0402_50V8J~D
33P_0402_50V8J~D
2
C471
C471
1
1 2
12
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~D
12
C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~D
1 2
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~D
R551 0_0402_5%~D@ R551 0_0402_5%~D@
1 2 1 2
R552 0_0402_5%~D@R552 0_0402_5%~D@
SMBus Device Address 0xC8
LAN_DISABLE#_R41
T142 PAD~D@ T142 PAD ~D@ T143 PAD~D@ T143 PAD ~D@
1K_0402_5%~D
1K_0402_5%~D
12
R561
R561
4
+3.3V_RUN
12
R547
R547 10K_0402_5%~D
10K_0402_5%~D
LANCLK_REQ#_R
CLK_PCIE_LAN CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
PCIE_PTX_GLANRX_P7_C
PCIE_PTX_GLANRX_N7_C
LAN_SMBCLK_R LAN_SMBDATA_R
LAN_DISABLE#_R
LOM_ACTLED_YEL# LOM_SPD100LED_ORG# LOM_SPD10LED_GRN#
TP_LAN_JTAG_TDI TP_LAN_JTAG_TDO TP_LAN_JTAG_TMS TP_LAN_JTAG_TCK
XTALO XTALI
LAN_TEST_EN
RES_BIAS
3.01K_0402_1%~D
3.01K_0402_1%~D
12
R562
R562
U31
U31
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
MDI_MINUS0
MDI_MINUS1
MDI
MDI
PCIE
PCIE
MDI_MINUS2
MDI_MINUS3
RSVD_VCC3P3_1 RSVD_VCC3P3_2
SMBUS
SMBUS
VDD3P3_OUT
JTAG LED
JTAG LED
82579_QFN48_6X6~D
82579_QFN48_6X6~D
MDI_PLUS0
MDI_PLUS1
MDI_PLUS2
MDI_PLUS3
RSVD_NC
VDD3P3_IN
VDD3P3_15 VDD3P3_19 VDD3P3_29
VDD1P0_47 VDD1P0_46 VDD1P0_37
VDD1P0_43
VDD1P0_11
VDD1P0_40 VDD1P0_22 VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
13 14
17 18
20 21
23 24
6
+RSVD_VCC3P3_1
1
+RSVD_VCC3P3_2
2 5
4
15 19 29
47 46 37
43
11
40 22 16 8
REGCTL_PNP10
7
49
3
LAN_TX0+ LAN_TX0-
LAN_TX1+ LAN_TX1-
LAN_TX2+ LAN_TX2-
LAN_TX3+ LAN_TX3-
+3.3V_LAN_OUT
+1.0V_LAN
R553 4.7K_0402_1%~DR553 4.7K_0402_1%~D R554 4.7K_0402_1%~DR554 4.7K_0402_1%~D
12 12
1
C464
C464 1U_0603_10V6K~D
1U_0603_10V6K~D
2
Note: +1.0V_LAN will w ork at 0.95V to 1.15V
+3.3V_LAN
2
REGCTL_PNP10
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C466
C466
2
1 2
4.7UH_CBC2012T4R7M_20%~D
4.7UH_CBC2012T4R7M_20%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C467
C467
2
2
1
Default solution : PCH +1.05V_M SVR - stuff R119, u nstuff L99 Also, option to use iSVR - stuff L99, unstuff R11 9
L29
L29
Idc max=330mA
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
1
2
+1.0V_LAN
C462
C462
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
R548
@R548
@
0_0805_5%~D
0_0805_5%~D
1 2
C463
C463
Place R548, C462 , C463 and L29 c lose to U31
+1.0V_LAN
C468
C468
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C469
C469
2
+3.3V_LAN
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1177
C1177
1
2
22U_0805_6.3V6M~D
C1178
C1178
1
2
Place C1178 clos e to pin5
+3.3V_M
+1.05V_M
+1.0V_LAN POWER OPTIONS
Need to verify A3 silicon drive power before removing C427 KDS crystal vender verify driving level in A3
SWAP for layout routing
B B
DOCKED41
A A
Layout Notice : Place bead as close PI3L720 as possible
FROM NIC DOCKED
+3.3V_LAN
1 2
L37 12NH_0603CS-120EJTS_5%~DL37 12NH_0603CS-120EJT S_5%~D
1 2
L36 12NH_0603CS-120EJTS_5%~DL36 12NH_0603CS-120EJT S_5%~D
1 2
L35 12NH_0603CS-120EJTS_5%~DL35 12NH_0603CS-120EJT S_5%~D
1 2
L34 12NH_0603CS-120EJTS_5%~DL34 12NH_0603CS-120EJT S_5%~D
1 2
L32 12NH_0603CS-120EJTS_5%~DL32 12NH_0603CS-120EJT S_5%~D
1 2
L33 12NH_0603CS-120EJTS_5%~DL33 12NH_0603CS-120EJT S_5%~D
LAN_TX0- LAN_TX0-R
1 2
L31 12NH_0603CS-120EJTS_5%~DL31 12NH_0603CS-120EJT S_5%~D
LAN_TX0+ LAN_TX0+R
1 2
L30 12NH_0603CS-120EJTS_5%~DL30 12NH_0603CS-120EJT S_5%~D
DOCKED
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
1
LOM_ACTLED_YEL# LOM_SPD100LED_ORG# LOM_SPD10LED_GRN#
2
2
C472
C472
C473
C473
1
1
LAN_TX3-RLAN_TX3-
LAN_TX3+RLAN_TX3+
LAN_TX2-RLAN_TX2-
LAN_TX2+RLAN_TX2+
LAN_TX1-RLAN_TX1-
LAN_TX1+RLAN_TX1+
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C474
C474
1: TO DOCK
0: TO RJ45
5
39
U32
U32
2
A0+
3
A0-
6
A1+
7
A1-
9
A2+
10
A2-
11
A3+
12
A3-
13
SEL
15
LEDA0
16
LEDA1
42
LEDA2
5
PD
43
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
PI3L720ZHEX_TQFN42_9X3P5~D
R1200 Resistor Value:
3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM
LAN ANALOG SWITCH
38
B0+
VDD1VDD4VDD8VDD14VDD21VDD30VDD
37
B0-
34
B1+
33
B1-
29
B2+
28
B2-
25
B3+
24
B3-
17
LEDB0
18
LEDB1
41
LEDB2
36
C0+
35
C0-
32
C1+
31
C1-
27
C2+
26
C2-
23
C3+
22
C3-
19
LEDC0 LEDC1 LEDC2
4
DOCK_LOM_SPD100LED_ORG#
20
DOCK_LOM_SPD10LED_GRN#
40
SW_LAN_TX3- 31 SW_LAN_TX3+ 31
SW_LAN_TX2- 31 SW_LAN_TX2+ 31
SW_LAN_TX1- 31 SW_LAN_TX1+ 31
SW_LAN_TX0- 31 SW_LAN_TX0+ 31
LAN_ACTLED_YEL# 31 LED_100_ORG# 31 LED_10_GRN# 31
DOCK_LOM_TRD3- 40 DOCK_LOM_TRD3+ 40
DOCK_LOM_TRD2- 40 DOCK_LOM_TRD2+ 40
DOCK_LOM_TRD1- 40 DOCK_LOM_TRD1+ 40
DOCK_LOM_TRD0- 40 DOCK_LOM_TRD0+ 40
DOCK_LOM_ACTLED_YEL# 40 DOCK_LOM_SPD100LED_ORG# 40 DOCK_LOM_SPD10LED_GRN# 40
3
TO DOCK
Shared with PCH
1.05V SVR
STUFF: R548 NO STUFF: L29
AUX_ON42
SIO_SLP_LAN#16,41
Internal SRV
*
STUFF: L29 NO STUFF: R548
1 2
R566 0_0402_5%~D@R 566 0_0402_5%~D@
1 2
R567 0_0402_5%~D@R567 0_0402_5%~D@
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
2
+3.3V_ALW2
12
61
2
+3.3V_LAN
1
2
R565
R565 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q35A
Q35A
C478
C478
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
5
P
B
4
O
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
U15
U15
Q34
Q34
SI3456DDV-T1-GE3_TSOP6~D
+15V_ALW
12
3
5
4
R564
R564 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q35B
Q35B
WLAN_LAN_DISB# 41
SI3456DDV-T1-GE3_TSOP6~D
ENAB_3VLAN
D
D
6
S
S
45 2 1
G
G
3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C477
C477
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
LA-6592P
LA-6592P
LA-6592P
1
32 75Thursday, January 13, 2011
32 75Thursday, January 13, 2011
32 75Thursday, January 13, 2011
@ R563
@
0_1206_5%~D
0_1206_5%~D
1 2
+3.3V_LAN+3.3V_ALW
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C475
C475
2
R563
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C476
C476
2
1.0
1.0
1.0
5
USB_GPIO27
1 2
R575 0_0402_5%~D@ R575 0_0402_5%~D@
USBP7+
1 2
R576 1.5K_0402_5%~DR576 1.5K_0402_5%~D
+3.3V_ALW_USH
1 2
R579 10K_0402_5%~D@R579 10K_0402_5%~D@
1 2
R583 4.7K_0402_5%~D1@ R583 4.7K_0402_5%~D1@
1 2
R584 4.7K_0402_5%~D@ R584 4.7K_0402_5%~D@
1 2
R581 4.7K_0402_5%~DR581 4.7K_0402_5%~D
D D
C C
1 2
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D
1 2
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D
1 2
R592 2.2K_0402_5%~DR592 2.2K_0402_5%~D
1 2
R586 4.7K_0402_5%~DR586 4.7K_0402_5%~D
1 2
R596 4.7K_0402_5%~DR596 4.7K_0402_5%~D
12
R603
@R603
@
10_0402_5%~D
10_0402_5%~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
PCI_TPM_TERM
@C486
@
2
C486
1
1 2
R612 10M_0402_5%~D@ R612 10M_0402_5%~D@
Y4
Y4
1
IN
2
GND
1
27.12MHZ_12PF_1N227120CC0B~D
27.12MHZ_12PF_1N227120CC0B~D C492
C492 12P_0402_50V8J~D
12P_0402_50V8J~D
2
SI2301CDS-T1-GE3_SOT23-3~D
SI2301CDS-T1-GE3_SOT23-3~D
PLTRST1#_USH
USH_LPCEN
LPD#
IRQ_SERIRQ_R
USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
USH_PWR_STATE#
USBH_OC1
JTAG_RST#_USH
1 2
R610 1K_0402_5%~DR610 1K_0402_5%~D
R615 4.7K_0402_5%~D2@ R615 4.7K_0402_5%~D2@
1 2
3
OUT
4
GND
USH_LPCEN
R627 0_0402_5%~D@R627 0_0402_5%~D@
XOXI
1
2
1 2
1 3
C493
C493 15P_0402_50V8J~D
15P_0402_50V8J~D
Smart Card
+3.3V_ALW_SC
B B
SCC_CMDVCC_N_R
@
10U_0805_10V4Z~D
10U_0805_10V4Z~D
@C509
@
1
C509
2
A A
1 2
R646
R646
1.5K_0402_5%~D
1.5K_0402_5%~D
PORADJ
1 2
R632 4.7K_0402_5%~DR632 4.7K_0402_5%~D
CLKDIV1
1 2
R635 4.7K_0402_5%~DR635 4.7K_0402_5%~D
PORADJ CLKDIV1 CLKDIV2
BCM5882_SCRST SCC_CMDVCC_N
12
BCM5882_GPIO25 BCM5882_GPIO26
R637
@R637
@
0_0402_5%~D
0_0402_5%~D
AUX1UC AUX2UC
T154PAD~D@T154PAD~D
BCM5882_IO BCM5882_SCDET
BCM5882_SCCLK
SC_VCC should be 3X wide as regular SC trace width to carry
+SC_VCC
~60mA max. current per ISO spec
0.22U_0402_10V6K~D
0.22U_0402_10V6K~D
C1031 and C646 should be p
2
1
laced very close to SC cage pin
C510
C510
SC_RST SC_CLK SC_C4
SC_IO SC_C8 SC_DET
FCI_10089709-010010LF~D
FCI_10089709-010010LF~D
JSC1
CONN@JSC1
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
5
+3.3V_ALW_PCH
Q36
Q36
S
S D
D
R580
R580
G
G
2
1 2
R631 4.7K_0402_5%~D@ R631 4.7K_0402_5%~D@
1 2
R633 4.7K_0402_5%~DR633 4.7K_0402_5%~D
U34
U34
18
PORadj
6
CLKDIV1
7
CLKDIV2
3
RSTIN
5
CMDVCCN
2
EN_5V/3VN
4
EN_1.8VN
21
AUX1UC
22
AUX2UC
20
I/OUC
19
OFFN
23
XTAL1
25
GPAD
TDA8034HN_HVQFN24_4X4~D
TDA8034HN_HVQFN24_4X4~D
BCM5882_GPIO15
4.7K_0402_5%~D
4.7K_0402_5%~D
1 2
Q37
Q37 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
USB_GPIO27
2
G
G
S
S
CLK_PCI_TPM15
LPC_LAD014,34,41,42 LPC_LAD114,34,41,42 LPC_LAD214,34,41,42 LPC_LAD314,34,41,42 LPC_LFRAME#14,34,41,42 IRQ_SERIRQ14,34,41,42
PLTRST_USH#17
SP_TPM_LPC_EN34,41
USH_SMBCLK42
USH_SMBDAT42
BCM5882_ALERT#41
USH_PWR_STATE#41
REF_XOUT
REF_XIN
All XTAL components and traces should be placed/layout on top layer. The gnd/pwr layer below will provide shielding from
27.12Mhz interference which might affect cellular certification.
PORADJ
CLKDIV2
1
VDD(intf)
17
VDD
16
VDDP
15
VCC
14
RST
13
CLK
9
I/O
10
AUX1
11
AUX2
8
PRESN
24
XTAL2
12
GND
U35
@U35
SPI_CS
SPI_RXD SPI_RST
@
1
/CS
2
DO
3
/WP
GND4DIO
W25X32VSSIG_SO8~D
W25X32VSSIG_SO8~D
@R587
@
0_0402_5%~D
0_0402_5%~D
USBP7-17 USBP7+17
CLK_PCI_TPM
R600 0_0402_5%~D@R600 0_0402_5%~D@
R602 0_0402_5%~D@R602 0_0402_5%~D@
R604 0_0402_5%~D@R604 0_0402_5%~D@
SC_DET BT_COEX_STATUS2
1
2
+SC_VCC
R638 0_0402_5%~DR638 0_0402_5%~D
1 2
R639 22_0402_5%~DR639 22_0402_5%~D
1 2
R640 100_0402_5%~DR640 100_0402_5%~D
1 2
R641 0_0402_5%~DR641 0_0402_5%~D
1 2
R642 0_0402_5%~DR642 0_0402_5%~D
1 2
R643 0_0402_5%~DR643 0_0402_5%~D
1 2
+SC_VCC
Place C508 close to U33 pin15
8
VCC
7
/HOLD
6
CLK
5
1 2 1 2
@R588
@
0_0402_5%~D
0_0402_5%~D
R593 0_0402_5%~DR593 0_0402_5%~D
1 2
R594 0_0402_5%~DR594 0_0402_5%~D
1 2
R595 0_0402_5%~DR595 0_0402_5%~D
1 2
R597 0_0402_5%~DR597 0_0402_5%~D
1 2
R598 0_0402_5%~DR598 0_0402_5%~D
1 2
1 2
1 2
1 2
R606 150_0402_5%~DR606 150_0402_5%~D
1 2 1 2
R1131 0_0402_5%~D@R1131 0_0402_5%~D@
1 2
R613 0_0402_5%~D@ R613 0_0402_5%~D@
1 2
R619 1K_0402_5%~DR619 1K_0402_5%~D
1 2
R622 1K_0402_5%~DR622 1K_0402_5%~D
1 2
R624 1K_0402_5%~DR624 1K_0402_5%~D
+3.3V_ALW_SC
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C497
C497
C498
C498
2
2
.47U_0402_6.3V6-K~D
.47U_0402_6.3V6-K~D
2
C508
C508
1
+3.3V_ALW_USH
SPI_TXD SPI_CLK SPI_RST
SPI_CLK
SPI_TXD
R587
R588
USH_PWR_STATE#_R
10U_0805_10V6M~D
10U_0805_10V6M~D
SPI_CS
USBP7-_R USBP7+_R
USB_GPIO27
IRQ_SERIRQ_R
PLTRST1#_USHCLK_PCI_TPM USH_LPCEN
USH_SMBCLK USH_SMBDAT BCM5882_ALERT#
SMB_GPIO1
+5V_ALW_SC
C499
C499
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
1
10P_0402_50V8J~D
10P_0402_50V8J~D
2
2
C506
C506
1
1
U36
U36
1 2 3 4
M45PE16-VMW6TG_SO8W8~D
M45PE16-VMW6TG_SO8W8~D
BCM5882_GPIO15
4
U33A
U33A
P5
USBD_DN
P6
USBD_UP
N7
USBD_ATTACH_GPIO_27
P2
LCLK
N3
LAD0_GPIO_20
M4
LAD1_GPIO_21
K5
LAD2_GPIO_22
N4
LAD3_GPIO_23
K4
LFRAME_N_GPIO_18
L4
LSERIRQ_GPIO_19
M3
LRESET_N_GPIO_17
M5
10U_0805_10V6M~D
10U_0805_10V6M~D
1
2
C507
C507
1 2
N6
M9
L9 K9 M7 N8
L7
K1
P1
E12
C501
C501
Q VSS VCC
W#
LPCEN LPCPD_N_GPIO_24
SMBCLK SMBDAT SMBALERT_N SMB_GPIO_0 SMB_GPIO_1
WAKEUP_N
IDDQ_EN
CORE_PWRDN
ALDO_PWRDN
1 2
8 7 6 5
LPD#
SBOOT POR_EXTR
C500
C500
SC_RST SC_CLK SC_IO SC_C4 SC_C8 SC_DET
10P_0402_50V8J~D
10P_0402_50V8J~D
D C RESET# S#
R647 4.7K_0402_5%~DR647 4.7K_0402_5%~D
4
BCM5882
BCM5882
SSP_CLK0_GPIO_6 SSP_FSS0_GPIO_7
SSP_RXD0_GPIO_8
SSP_TXD0_GPIO_9
SSP_CLK1_GPIO_10 SSP_FSS1_GPIO_11 SSP_RXD1_GPIO_12
SPI
SPI
LPC
LPC
SSP_TXD1_GPIO_13
SC_SEL5V_GPIO_25
SC_SEL18V_GPIO_26
SC_PWR_N14 SC_PWR_P14
SM BUS
SM BUS
Smard Card
Smard Card
BCM5882KFBG_FBGA196~D
BCM5882KFBG_FBGA196~D
+3.3V_ALW_USH
+3.3V_ALW_SC +3.3V_ALW
5.1M_0402_5%~D
5.1M_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
R630
R630
R629
R629
1 2
3.3M_0402_5%~D
3.3M_0402_5%~D
1 2
+3.3V_ALW_USH
+3.3V_ALW_USH
+5V_ALW_SC +5V_ALW
R634
R634
RFREADER_RXP
D25 DA204U_SOT323-3~D@ D25 DA204U_SOT323-3~D@
D27 DA204U_SOT323-3~D@ D27 DA204U_SOT323-3~D@
RFREADER_RXN
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
3
1
2
3
1
2
Place C507,C575 close to JSC1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C513
C513
+3.3V_ALW
UART_RX/GPIO0 UART_TX/GPIO1
1
2
MOLEX_53398-0471~D
MOLEX_53398-0471~D
L41 BLM18BB100SN1D_2P~DL41 BLM18BB100SN1D_2P~D
3.3U_0603_10V6K~D
3.3U_0603_10V6K~D
C515
C515
+3.3V_ALW_USH
1
2
SPI_RXD
BCM5882_GPIO15
USBH_DN_0 USBH_UP_0
USBH_OC_0
USBH_DN_1 USBH_UP_1
USBH_OC_1
SC_CLK
SC_FCB
SC_DET
SC_IO
SC_RST
SC_VCC
PJP52
PJP52
PJP55
PJP55
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CONN@
CONN@
JBCM1
JBCM1
1 2 3 4
+3.3V_ALW_USH
P7 P8 P9
P11 P12 P10
G3 G2 H1 H2
C3 B2 A2 A1
M11 M12 F2 F1 M2 L11 M10 N14 P14 L10
C502
C502
1 2
C505
C505
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
1 2
5
3
G1
6
4
G2
12
1U_0603_10V6K~D
1U_0603_10V6K~D
2
C516
C516
1
3
1 2
R577 4.7K_0402_5%~DR577 4.7K_0402_5%~D
1 2
R578 4.7K_0402_5%~DR578 4.7K_0402_5%~D
1 2
R582 4.7K_0402_5%~DR582 4.7K_0402_5%~D
1 2
R645 4.7K_0402_5%~DR645 4.7K_0402_5%~D
FP_USBD­FP_USBD+ USBH_OC0#
R590 4.7K_0402_5%~DR590 4.7K_0402_5%~D
USBH_OC1
SPI_CLK
SPI_CS SPI_RXD SPI_TXD
BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13
R607 0_0402_5%~D@ R607 0_0402_5%~D@ R608 0_0402_5%~D@ R608 0_0402_5%~D@ R609 0_0402_5%~D@R609 0_0402_5%~D@ R611 0_0402_5%~D@ R611 0_0402_5%~D@
R614 0_0402_5%~D@ R614 0_0402_5%~D@ R616 0_0402_5%~D@ R616 0_0402_5%~D@ R620 0_0402_5%~D@ R620 0_0402_5%~D@
+SC_PWR
SC_TEST
R623 0_0402_5%~D@ R623 0_0402_5%~D@
RFREADER_RXP_C
+3.3V_ALW_USH
RFREADER_RXN_C
+3.3V_ALW_USH
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C517
C517
2
3
RST_N
OVSTB
FP_RESET#
SPI_RST
FP_USBD- 23 FP_USBD+ 23
12
T146PAD~D
T146PAD~D T147PAD~D
T147PAD~D T148PAD~D
T148PAD~D T150PAD~D
T150PAD~D
12 12 12 12 12 12
12
SCC_CMDVCC_N
12
+1.2V_ALW_AVDD
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
C494
C494
1
RFREADER_TXP1
DA204U_SOT323-3~D
DA204U_SOT323-3~D
RFREADER_TXN1
DA204U_SOT323-3~D
DA204U_SOT323-3~D
+2.5V_ALW_AVDD
2
1
+3.3V_ALW +3.3V_ALW_USH
+3.3V_ALW_USH
@
@ @
@ @
@ @
@
BCM5882_SCCLK AUX1UC BCM5882_GPIO25 BCM5882_GPIO26 BCM5882_SCDET BCM5882_IO BCM5882_SCRST
+2.5V_ALW_AVDD
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C490
C490
2
1
2
C495
C495
1
2
1
150NH_0805CS-151EGTS_2%~D
150NH_0805CS-151EGTS_2%~D
3
1
2
D26
@D26
@
150NH_0805CS-151EGTS_2%~D
150NH_0805CS-151EGTS_2%~D
3
1
2
@
@
D28
D28
L42 BLM18BB100SN1D_2P~DL42 BLM18BB100SN1D_2P~D
+RFID_AVDD2P5 +RFID_AVDD1P2+RFID_AVDD3P3
12
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
2
C519
C518
C518
C519
1
PAD-OPEN 2x2m~D
PAD-OPEN 2x2m~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
C488
C488
1
1 2
L40
L40
1 2
PJP56
PJP56
2 1
JTAG_CLK_USH
R591
@R591
@
0_0402_5%~D
0_0402_5%~D
1 2
JTAG_TDI_USH
JTAG_TDO_USH
R599
@R599
@
0_0402_5%~D
0_0402_5%~D
1 2
JTAG_TMS_USH
JTAG_RST#_USH
R605
@R605
@
0_0402_5%~D
0_0402_5%~D
1 2
JTCE_USH
HF_RX_TEST0
R621
@R621
@
0_0402_5%~D
0_0402_5%~D
1 2
HF_RX_TEST1
HF_RX_TEST2
R618
@R618
@
0_0402_5%~D
0_0402_5%~D
1 2
HF_RX_TEST3
R625 0_0402_5%~D@ R625 0_0402_5%~D@
1 2
R628 0_0402_5%~D@ R628 0_0402_5%~D@
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C496
C496
2
15K_0402_1%~D
15K_0402_1%~D
L39
L39
15K_0402_1%~D
15K_0402_1%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C520
C520
2
2
JTAG_CLK_USH JTAG_TDI_USH JTAG_TDO_USH JTAG_TMS_USH JTAG_RST#_USH
JTCE_USH
R601
@R601
@
0_0402_5%~D
0_0402_5%~D
SCANACCMODE
1 2
T145 PAD~D@ T145 PAD~D@
USH_TESTMODE
R626
@R626
@
1K_0402_5%~D
1K_0402_5%~D
1 2
C487 should be placed closer to pin A5
1 2
C487 0.01U_0402_16V7K~DC487 0.01U_0402_16V7K~D
+1.2V_ALW_AVDD
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
+2.5V_ALW_AVDD
C491
C491
1
C489
C489
2
12
R636
R636
390P_0603_50V8G~D
390P_0603_50V8G~D
390P_0603_50V8G~D
390P_0603_50V8G~D
C503
C503
C504
C504
1
2
12
390P_0603_50V8G~D
390P_0603_50V8G~D
390P_0603_50V8G~D
390P_0603_50V8G~D
C512
C512
C511
C511
1
2
L43 BLM18BB100SN1D_2P~DL43 BLM18BB100SN1D_2P~D
12
1U_0603_10V6K~D
1U_0603_10V6K~D
1
2
1
C521
C521
2
2
R644
R644
1
2
1
2
+1.2V_ALW_AVDD+3.3V_ALW_USH
REF_XIN REF_XOUT
RST_N
OVSTB
SBOOT
POR_EXTR
RFTAG_VRXP RFTAG_VRXN
1U_0603_10V6K~D
1U_0603_10V6K~D
C514
C514
U33D
U33D
G14
REFCLK_XTALIN
F14
REFCLK_XTALOUT
G1
RST_N
L1
JTAG_TCK
M1
JTAG_TDI
N1
JTAG_TDO
N2
JTAG_TMS
L3
JTAG_TRSTN
L2
JTCE
E1
OVSTB
E3
SCANACCMODE
E2
SECURE_BOOT
D1
TESTMODE
J14
POR_EXTR
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C522
C522
2
A6 B6
C5
A5
B4
C6 E6
D6 B5
A4
1
BCM5882
BCM5882
JTAG CLK
JTAG CLK
BCM5882KFBG_FBGA196~D
BCM5882KFBG_FBGA196~D
U33C
U33C
HF_RFIDTAG_VRX_P HF_RFIDTAG_VRX_N
HF_RFIDTAG_VTX
HF_RFIDTAG_VREF
HF_RFIDTAG_DVDD1P2
HF_RFIDTAG_AVDD2P5_C6 HF_RFIDTAG_AVDD2P5_E6
HF_RFIDTAG_AVSS_D6 HF_RFIDTAG_AVSS_B5
HF_RFIDTAG_DVSS
BCM5882
BCM5882
UART_TX_GPIO_1
UART_RX_GPIO_0 UART_CTS_GPIO_2 UART_RTS_GPIO_3
UART
UART
RSTOUT_N
POR_MONITOR
PLL_TESTOUT
HF_RX_ADC_AVDD1P2
HF_TX_AVDD3P3_D8 HF_TX_AVDD3P3_B7
HF_RX_ADC_AVSS1 HF_RX_ADC_AVSS2
BCM5882KFBG_FBGA196~D
BCM5882KFBG_FBGA196~D
GPIO_14 GPIO_15 GPIO_16
CLKOUT
HF_RX_AVSS_B11
D4 C4 B3 A3
L14
NC
J1
GPIO_4
D2 C2 B1
D3
C1
J13
K11
SWV
C13
HF_TX_P
HF_TX_N
HF_RX_P HF_RX_N
HF_RX_TEST0 HF_RX_TEST1 HF_RX_TEST2 HF_RX_TEST3
HF_TX_AVDD1P2
HF_RX_AVDD1P2
HF_RX_AVDD2P5
HF_TX_AVDD2P5
HF_TX_AVSS_C7 HF_TX_AVSS_C8 HF_TX_AVSS_E7
HF_RX_AVSS_A9
UART_TX/GPIO1 UART_RX/GPIO0
BT_COEX_STATUS2
CONTACTLESS_DET# SCC_CMDVCC_N_R BCM5882_GPIO15 BT_PRI_STATUS
CLKOUT
SPI_RST
POR_MONITOR
SWV
PLL_TESTOUT
RFREADER_TXP1
A8
RFREADER_TXN1
B8
RFREADER_RXP
A10
RFREADER_RXN
B10
B9
HF_RX_TEST1
C9
HF_RX_TEST2
C10
HF_RX_TEST3
E9
+RFID_AVDD1P2
D7 F8 D10
+RFID_AVDD2P5
F9 A7
+RFID_AVDD3P3
D8 B7
C7 C8 E7
A9 B11
E8 D9
RFID
RFREADER_TXN1_PI
CONTACTLESS_DET#18
Hardware enable for USH TPM:Populate R841, No Stuff R483. Hardware disable for USH TPM:No Stuff R841, Populate R483
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: S heet of
Date: S heet of
Date: S heet of
RFREADER_TXP1_PI
connector list: 2041084-6
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
USH BCM5882 (1/2)
USH BCM5882 (1/2)
USH BCM5882 (1/2)
LA-6592P
LA-6592P
LA-6592P
1
T144PAD~D
T144PAD~D
T149PAD~D
T149PAD~D
T151PAD~D
T151PAD~D
T153PAD~D
T153PAD~D
HF_RX_TEST0
FP_RESET# 23
BT_COEX_STATUS2 43
BT_PRI_STATUS 43
@
@
@
@
@
@
@
@
JCS1
CONN@JCS1
CONN@
1
1
2
2
3
3
4
4
5
7
5
G1
6
8
6
G2
TYCO_2041084-6~D
TYCO_2041084-6~D
33 75Thursday, January 13, 2011
33 75Thursday, January 13, 2011
33 75Thursday, January 13, 2011
1.0
1.0
1.0
5
D D
+3.3V_ALW_USH
C C
LOW:Power Down Mode High:Working Mode
B B
SP_TPM_LPC_EN33,41
LPC_LAD014,33,41,42 LPC_LAD114,33,41,42 LPC_LAD214,33,41,42 LPC_LAD314,33,41,42
CLK_PCI_TPM_CHA15
LPC_LFRAME#14,33,41,42
+3.3V_RUN
1 2
R656 4.7K_0402_5%~D@R 656 4.7K_0402_5%~D@
A A
PCH_PLTRST#_EC14,17,36,37,41,42
IRQ_SERIRQ14,33,41,42
10K_0402_5%~D
10K_0402_5%~D
5
CLKRUN#16,41,42
R657
@R657
@
R659
4@ R659
4@
1K_0402_5%~D
1K_0402_5%~D
+3.3V_RUN
12
12
1 2
R650 0_0402_5%~D4@ R650 0_0402_5%~D4@
1 2
R649 0_0402_5%~D4@ R649 0_0402_5%~D4@
1 2
R648 0_0402_5%~D4@ R648 0_0402_5%~D4@
1 2
R651 0_0402_5%~D4@ R651 0_0402_5%~D4@
1 2
R652 0_0402_5%~D4@ R652 0_0402_5%~D4@
1 2
R653 0_0402_5%~D4@ R653 0_0402_5%~D4@
1 2
R654 0_0402_5%~D4@ R654 0_0402_5%~D4@
1 2
R655 0_0402_5%~D4@ R655 0_0402_5%~D4@
12
R658
@R658
@
10K_0402_5%~D
10K_0402_5%~D
12
R660
4@ R660
4@
1K_0402_5%~D
1K_0402_5%~D
China TCM: NationZ & Jetway co-lay
TCM_BA0 TCM_BA1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
C527
C527
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
C536
C536
1
1
C_TPM_LPC_EN LPC_LAD0_R LPC_LAD1_R LPC_LAD2_R LPC_LAD3_R
LPC_LFRAME#_R PCI_RST#_R
CLKRUN#_R
TCM_BA1 TCM_BA0
TCM Vender
NationZ
Jetway
4
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
C529
C529
C528
C528
1
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
C537
C537
C538
C538
1
1
U37
4@ U37
4@
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
R659, R660, C550, C554
C555, RH315
4
3
+1.2V_ALW_PLL
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
2
1
10U_0603_6.3V6M~D
1
C525
C525
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
C545
C545
C544
C544
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C548
C548
C549
C549
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4@
4@
1
C553
C553
2
2
C555
@C555
@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C526
C526
+SC_PWR
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
C546
C546
1
4@ C550
4@
C550
TCM circuit
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C1161
C1161
2
PART/PIN Ref Des TCM Enable
USH_LPCEN
SIO 5028 ->SP_TPM_LPC_EN
PCH GPIO39 ->TPM_ID1
PCH GPIO38 ->TPM_ID0
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C524
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C534
2
2
2
C530
C530
C531
C531
C532
C532
1
1
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
C539
C539
C540
C540
1
1U_0402_6.3V6K~D
2
2
C541
C541
1
1
VDD_0 VDD_1 VDD_2
GND_11 GND_18 GND_25
GND_4
NC_5 NC_12 NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
2
1
C542
C542
10 19 24
11 18 25 4
5 12 13
1 2 6 8 14
1
C533
C533
2
+3.3V_RUN
JETWAY_PIN5
JETWAY_CLK14M
1
2
C534
C554
4@ C554
4@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+VDDC_5882
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4@
4@
2
2
C551
C551
1
1
JETWAY_CLK14M 15
JETWAY_PIN5
C524
C543
C543
C547
C547
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4@
4@
C552
C552
+1.2V_ALW_PLL
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+3.3V_ALW_USH
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
+1.2V_ALW_PLL
C535
C535
1
2
U33B
U33B
H14
AVDD_1P2I_REF
A11
AVDD_1P2O_A11
A12
AVDD_1P2O_A12
H13
AVDD_2P5I
E10
AVDD_2P5O_E10
E11
AVDD_2P5O_E11
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C523
C523
+VDDC_5882
+3.3V_ALW_USH
A13
AVDD25_LDO12_A13
B12
AVDD25_LDO12_B12
A14
AVDD25_PLL_A14
D11
AVDD33_LDO25
P13
OTP_PWR
D14
PLL_AVDD_1P2I
E14
PLL_AVDD_1P2O
C14
PLL_DVDD_1P2I
D13
VDDC_D13
F3
VDDC_F3
J4
VDDC_J4
J5
VDDC_J5
J6
VDDC_J6
J7
VDDC_J7
J8
VDDC_J8
J10
VDDC_J10
J11
VDDC_J11
K7
VDDC_K7
K8
VDDC_K8
E4
VDDO_33_E4
J2
VDDO_33_J2
K3
VDDO_33_K3
L8
VDDO_33_L8
N10
VDDO_33_N10
G4
VDDO_33CORE_G4
H3
VDDO_33CORE_H3
H4
VDDO_33CORE_H4
J3
VDDO_33CORE_J3
M13
VDDO_33SC_M13
N13
VDDO_33SC_N13
L6
VDDO_LPC_L6
M6
VDDO_LPC_M6
K10
VDDO_SC_K10
K12
VDDO_SC_K12
L12
VDDO_SC_L12
L13
VDDO_SC_L13
D5
VDDO_VAR_D5
E5
VDDO_VAR_E5
N5
VESD
USH BCM5882 and China TCM Z8H172T Option
All 4@ POP PU R583 PD R615 PU R772 PU RH268 PD RH271 PU RH267 PD RH270
@ POP @ @ POP @ POP
1
BCM5882
BCM5882
AVSS_PLL
AVSS_REF
PLL_AVSS
PLL_DVSS
POR_AVSS
VSSC_F4 VSSC_F5 VSSC_F6
VSSC_F7 VSSC_F10 VSSC_F11 VSSC_F12
VSSC_G5 VSSC_G6 VSSC_G7 VSSC_G8
VSSC_G9 VSSC_G10 VSSC_G11 VSSC_G12
VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8
VSSC_H9
VSSC_H10 VSSC_H11 VSSC_H12
VSSC_J9
VSSC_J12
VSSC_K2
VSSC_K6 VSSC_K13 VSSC_K14
VSSC_L5
VSSC_M8
VSSC_M14
VSSC_N9 VSSC_N11 VSSC_N12
VSSC_P3 VSSC_P4
C11
B13 C12
B14
F13
D12
E13
G13
F4 F5 F6 F7 F10 F11 F12 G5 G6 G7 G8 G9 G10 G11 G12 H5 H6 H7 H8 H9 H10 H11 H12 J9 J12 K2 K6 K13 K14 L5 M8 M14 N9 N11 N12 P3 P4
AVSS_LDO12
AVSS_LDO25_B13 AVSS_LDO25_C12
BCM5882KFBG_FBGA196~D
BCM5882KFBG_FBGA196~D
TPM Enable ALL TPM/TCM Disable
@ POP @ @ POP @ POP @
@ @ @ @ POP @ @ POP
POP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USH BCM5882 (2/2)
USH BCM5882 (2/2)
USH BCM5882 (2/2)
LA-6592P
LA-6592P
LA-6592P
34 75Thursday, January 13, 2011
34 75Thursday, January 13, 2011
34 75Thursday, January 13, 2011
1
1.0
1.0
1.0
A
B
C
D
E
1 1
need to apply CIS symbol.
+3.3V_RUN
L46
@L46
@
+1.5V_RUN
+PE_VDDH
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
@
@
1
2 2
1
2
C574
C574
C573
C573
2
L47
L47
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
C561
C561
1
1
2
2
CLK_PCIE_MMI15 CLK_PCIE_MMI#15
PCIE_PRX_MMITX_P615 PCIE_PRX_MMITX_N615 PCIE_PTX_MMIRX_P615 PCIE_PTX_MMIRX_N615
PLTRST_MMI#17
MMICLK_REQ#15
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
1
C556
C562
C562
C556
2
C569 0.1U_0402_1 0V7K~DC569 0.1U_0402_10V7K~D C571 0.1U_0402_1 0V7K~DC571 0.1U_0402_10V7K~D C567 0.1U_0402_1 0V7K~DC567 0.1U_0402_10V7K~D C568 0.1U_0402_1 0V7K~DC568 0.1U_0402_10V7K~D
place close to pin U38.32
3 3
4 4
L45
L45
BLM18PG471SN1D_0603~D
BLM18PG471SN1D_0603~D
1 2
1 2
L44 BLM18BD 601SN1D_0603~DL44 BLM18BD601SN 1D_0603~D
1 2 1 2 1 2 1 2
R677 191_0402_1%~DR677 191_0402_1%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C557
C557
2
2
PCIE_PRX_MMITX_P6_C PCIE_PRX_MMITX_N6_C PCIE_PTX_MMIRX_P6_C PCIE_PTX_MMIRX_N6_C
1 2
C558
C558
+3.3VDDH +VDDH_SD +PE_VDDH
U38
U38
16
3.3VDDH
9
VDDH
32
PE_VDDH
2
PE_REFCLKP
1
PE_REFCLKM
6
PE_TXP
7
PE_TXM
5
PE_RXP
4
PE_RXM
3
PE_REXT
33
GPAD
13
PE_RST#
14
MULTI-IO1
31
MULTI-IO2
OZ600FJ0LN_QFN32_5X5~D
OZ600FJ0LN_QFN32_5X5~D
DVDD
AVDD
SKT_VCC
MMI_VCC_OUT
SD_D1 SD_D2
MMI_D0
MS_D1
MS_D2 MMI_D3 MMI_D4 MMI_D5 MMI_D6 MMI_D7
MS_CD#
SD_CMD/MS_BS
MMI_CLK
SD_CD#
SD_WPI
+OZ_DVDD
10
+OZ_AVDD
8
+SKT_VCC
17 15
SD/MMCDAT1_R
28
SD/MMCDAT2_R
26
SD/MMC/MSDAT0_R
29 27 25
SD/MMC/MSDAT3_R
24
SD/MMCDAT4_R
23
SD/MMCDAT5_R
22
SD/MMCDAT6_R
21 20
MS_CD#
11
SD/MMC/MS_CMD_R
19 18
SD/MMCCD#
12
SDWP
30
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C563
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C565
C565
2
2
R663 33_0402_5%~DR663 33_0402_5%~D
1 2
R664 33_0402_5%~DR664 33_0402_5%~D
1 2
R665 33_0402_5%~DR665 33_0402_5%~D
1 2
R666 33_0402_5%~DR666 33_0402_5%~D
1 2
R667 33_0402_5%~DR667 33_0402_5%~D
1 2
R668 33_0402_5%~DR668 33_0402_5%~D
1 2
R669 33_0402_5%~DR669 33_0402_5%~D
1 2
R670 33_0402_5%~DR670 33_0402_5%~D
1 2
R672 33_0402_5%~DR672 33_0402_5%~D
1 2
R673 33_0402_5%~DR673 33_0402_5%~D
1 2
R674 33_0402_5%~DR674 33_0402_5%~D
1 2 1 2
R676 33_0402_5%~DR676 33_0402_5%~D
C563
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
2
C566
C566
EMI request
SD/MMC/MS_CLK
RE678
@RE678
@
33_0402_5%~D
33_0402_5%~D
1 2
1
CE757
@CE757
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
1
C564
C564
2
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C559
C559
2
2
SD/MMCDAT1 SD/MMCDAT2 SD/MMC/MSDAT0 MSDAT1MSDAT1_R MSDAT2MSDAT2_R SD/MMC/MSDAT3 SD/MMCDAT4 SD/MMCDAT5 SD/MMCDAT6 SD/MMCDAT7SD/MMCDAT7_R
SD/MMC/MS_CMD SD/MMC/MS_CLKSD/MMC/MS_CLK_R
+3.3V_RUN_CARD
C560
C560
+3.3V_RUN_CARD
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
10K_0402_5%~D
10K_0402_5%~D
1
2
Note: The trace need to route as daisy-chain and the trace of SD signals need to route as short as possible
SD/MMC/MSDAT0 SD/MMCDAT1 SD/MMCDAT2 SD/MMC/MSDAT3 SD/MMCDAT4 SD/MMCDAT5 SD/MMCDAT6 SD/MMCDAT7
SD/MMC/MS_CMD SD/MMC/MS_CLK
SD/MMCCD# SDWP
SD/MMC/MSDAT0 MSDAT1 MSDAT2 SD/MMC/MSDAT3
SD/MMC/MS_CLK MS_CD# SD/MMC/MS_CMD
12
1
C570
C570
C572
C572
R826
R826
2
JSD1
JSD1
7
VDD
9
VCC
22
DAT0
23
DAT1
1
DAT2
2
CD/DAT3
3
DAT4
5
DAT5
19
DAT6
21
DAT7
4
CMD
18
CLK
24
COM(SW)
25
CD(SW)
45
WP(SW)
14
DATA0
15
DATA1
13
DATA2
11
DATA3
10
SCLK
12
INS
16
BS
6
VSS
8
VSS
17
VSS
20
VSS
T-SOL_152-1300302601_NR
T-SOL_152-1300302601_NR
CONN@
CONN@
Support SD/MMC/MS
VCC
R/-B
CLE ALE
-WE
-WP
GND GND
GND1 GND2 GND3 GND4
44
27
CD
28 29
-RE
30
-CE
31 32 33 34
36
D0
37
D1
38
D2
39
D3
40
D4
41
D5
42
D6
43
D7
26 35
46 47 48 49
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A
B
C
D
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Card Reader OZ600FJ0
Card Reader OZ600FJ0
Card Reader OZ600FJ0
LA-6592P
LA-6592P
LA-6592P
35 75Thursday, January 13, 2011
35 75Thursday, January 13, 2011
35 75Thursday, January 13, 2011
E
1.0
1.0
1.0
5
+3.3V_RUN
USB_MCARD2_DET#
PCIE_MCARD2_DET#_R
D D
12
R694 100K_0402_5%~DR694 100K_0402_ 5%~D
+3.3V_PCIE_WWAN
1 2
R695 100K_04 02_5%~DR695 100K_0402_5%~D
DDR_XDP_WAN_ SMBCLK7,12,13,14,15,28
DDR_XDP_WAN_ SMBDAT7,12,13,14,15,28
Mini WWAN/GPS/LTE/UWB H=5.2
CONN@
CONN@
JMINI1
JMINI1
1
1
3
3
5
MINI1CLK_REQ#15
CLK_PCIE_MINI1#15 CLK_PCIE_MINI115
PCIE_PRX_WANTX_N 115 PCIE_PRX_WANTX_P 115
PCIE_PTX_WANRX_N 115 PCIE_PTX_WANRX_P 115
PCIE_MCARD2_DET#17
+1.5V_RUN
C C
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
C594
C594
C593
C593
2
2
+3.3V_PCIE_WWAN
B B
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C611
C611
C610
C610
2
2
MINI1CLK_REQ#
CLK_PCIE_MINI1# CLK_PCIE_MINI1
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
PCIE_PTX_WANRX_N 1_C
1 2
PCIE_PTX_WANRX_P 1_C
1 2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C612
C612
2
1 2
R725 0_0402_5%~D@R725 0_0402_5%~D@
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
2
PCIE_MCARD2_DET#_R
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C613
C613
C614
C614
2
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
1
1
@
@
+
+
+
+
C1176
C1176
C615
C615
2
2
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
TYCO_1775861-1~D
TYCO_1775861-1~D
SIM Card Push-Push
+SIM_PWR
UIM_RESET UIM_CLK
1
C616
C616 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
A A
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
@C628
@
@C630
@
1
1
C628
C630
2
2
JSIM1
JSIM1
1
VCC
2
RST
3
CLK
4
NC
MOLEX_475531001
MOLEX_475531001
CONN@
CONN@
U40
@U40
@
1
2
3
SRV05-4.TCT_SOT23-6~D
SRV05-4.TCT_SOT23-6~D
5
GND
GND GND
VPP
6
5
4
5 6 7
I/O
8
NC
9 10
1
2
UIM_VPP UIM_DATA
UIM_RESETUIM_VPP
+SIM_PWR
UIM_DATAUIM_CLK
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
@C629
@
@C631
@
1
C629
C631
2
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND2
LED_WWAN _OUT#
PWR Rail
+3.3V
+3.3Vaux
+1.5V
4
R1157 0_0402_5%~D@ R1157 0_0402_5%~D@
R1158 0_0402_5%~D@ R1158 0_0402_5%~D@
UIM_DATA UIM_CLK UIM_RESET UIM_VPP
R704 0_0402_5%~D@R704 0_0402_5%~D@
WWAN_SM BCLK WWAN_SM BDAT
USBP5­USBP5+ USB_MCARD2_DET# LED_WWAN _OUT#LED_WWAN_OUT#
+3.3V_PCIE_WWAN
R719
R719
1 2
100K_0402_5%~D
100K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Voltage Tolerance
+-9%
+-9%
+-5%
4
12
12
1 2
G
G
2
S
S
Q77
Q77
+3.3V_PCIE_WWAN
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
@R1160
@
@R1159
@
12
12
R1160
R1159
WWAN_SM BCLK
WWAN_SM BDAT
+1.5V_RUN +SIM_PWR
WWAN_RA DIO_DIS# 41 PCH_PLTRST#_EC 14,17,34,37,41,42
USBP5- 17 USBP5+ 17
USB_MCARD2_DET# 18
PCIE_MCARD2_DET#USB_MCARD2_DET#
1 2
R697 0_0402_5%~D@R697 0_0402_5%~D@
13
D
D
WIRELESS_LED# 41,45
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250 (Wake enable)
250
5 (Not wake enable)
375
3
1 2
WLAN_RADIO_DIS#41
COEX2_WLAN_ACTIVE43 COEX1_BT_ACTIVE43
COEX2_WLAN_ACTIVE
C600
@C600
@
33P_0402_50V8J~D
33P_0402_50V8J~D
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C601
C601
2
2
PCIE_PTX_WLANRX_ N215 PCIE_PTX_WLANRX_ P215
1
2
+3.3V_WLAN
1
C602
C602
2
R693 0_0402_5%~D@ R693 0_0402_5%~D@
COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE
PCIE_PRX_WLANTX_ N215 PCIE_PRX_WLANTX_ P215
PCH_CL_RST1#15
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
1
C603
C603
2
D31
D31 RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
PCIE_WAKE#29,37,41
MINI2CLK_REQ#15
CLK_PCIE_MINI2#15 CLK_PCIE_MINI215
HOST_DEBUG_RX42
PCIE_MCARD1_DET#18
PCH_CL_CLK115
PCH_CL_DATA115
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C604
C604
2
WLAN_RADIO_DIS#_R
21
MSCLK42
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
1 2 1 2
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D
1 2
R707 0_0402_5%~D@ R707 0_0402_5%~D@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C606
C606
C605
C605
2
2
PCIE_WAKE#
1 2
R700 0_0402_5%~D@ R700 0_0402_5%~D@
1 2
R702 0_0402_5%~D@ R702 0_0402_5%~D@
PCIE_PTX_WLANRX_ N2_C PCIE_PTX_WLANRX_ P2_C
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C607
C607
2
1/2 Minicard Flash Card H=4
1 2 1 2
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C624
C624
1
2
PCIE_WAKE#
1 2
R709 0_0402_5%~D@ R709 0_0402_5%~D@
MINI3CLK_REQ#
CLK_PCIE_MINI3# CLK_PCIE_MINI3
PCIE_PTX_WPANRX _N5_C PCIE_PTX_WPANRX _P5_C
PCIE_MCARD3_DET#
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C626
C626
C625
C625
2
COEX2_WLAN_ACTIVE
MINI3CLK_REQ#15
CLK_PCIE_MINI3#15 CLK_PCIE_MINI315
NA
+1.5V_RUN
1
2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C619
C619
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C620
C620
2
PCIE_PRX_WPANTX _N515 PCIE_PRX_WPANTX _P515
PCIE_PTX_WPANRX _N515 PCIE_PTX_WPANRX _P515
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
1
1
C621
C621
2
2
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D
PCIE_MCARD3_DET#18
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C622
C622
C623
C623
2
R711 100K_0402_5%~DR711 100K_0402_ 5%~D
1
2
2
Mini WLAN/WIMAX H=4
check
C608
C608
+3.3V_WLAN
WIMAX_LED#
WLAN_LED#
JMINI3
JMINI3
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
TYCO_1775861-1~D
TYCO_1775861-1~D
CONN@
CONN@
CONN@
CONN@
JMINI2
JMINI2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
TYCO_1775861-1~D
TYCO_1775861-1~D
GND2
+3.3V_WLAN
+1.5V_RUN
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND2
R705
R705
R718
R718
1 2
1 2
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
@R710
@
0_0402_5%~D
0_0402_5%~D
USBP6­USBP6+ USB_MCARD3_DET#
1
PCIE_MCARD1_DET#
R698 0_0402_5%~D@ R698 0_0402_5%~D@
PCIE_MCARD1_DET#
USB_MCARD1_DET#
MSDATA
WLAN_RADIO_DIS#_R
R703 0_0402_5%~D@ R703 0_0402_5%~D@
USBP4­USBP4+PCIE_MCARD1_DET# USB_MCARD1_DET# WIMAX_LED# WLAN_LED#
1 2
R706 0_0402_5%~D@R706 0_0402_5%~D@
WIMAX_LED# STUDY FOR DEBUG
+3.3V_WLAN
5
4
Q124B
2
Q124A
Q124A
Q124B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
USB_MCARD3_DET# PCIE_MCARD3_DE T#
+1.5V_RUN
1 2
R692 100K_0402_5%~DR692 100K_0402_ 5%~D
PCIE_MCARD1_DET#USB_MCARD1_DET#
1 2
1 2
R699 100K_0402_5%~D@R699 100K_0402_5%~D@
1 2
R701 100K_0402_5%~DR701 100K_0402_ 5%~D
1 2
C595 4700P_0402_25V7K~DC595 4700P_0402_25V7K~D
PCH_PLTRST#_EC
12
MSDATA
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
WIRELESS_LED#
3
1 2
R708 0_0402_5%~D@R708 0_0402_5%~D@
+3.3V_ALW_PCH
HOST_DEBUG_TX 42
USBP4- 17 USBP4+ 17
USB_MCARD1_DET# 14,18
MSDATA 42
Confirm with DELL about UWB
R710
PCH_PLTRST#_EC
12
USBP6- 17
USBP6+ 17
R712 100K_0402_5%~D@R712 100K_0402_5%~D@
WPAN Noise
USB_MCARD3_DET#
1
C627
@C627
@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
12
just reserve
+3.3V_ALW_PCH
+3.3V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Mini Card
Mini Card
Mini Card
LA-6592P
LA-6592P
LA-6592P
36 75Thursday, January 13, 2011
36 75Thursday, January 13, 2011
36 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
Power Control for Mini card2
Q38
Q38
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
R714
R714
2 1
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
45
G
G
3
1
2
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R713
61
Q39A
Q39A
2
R716
R716 100K_0402_5%~D
100K_0402_5%~D
R713
D D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
AUX_EN_WOW L41
12
100K_0402_5%~D
12
3
Q39B
Q39B
5
4
Power Control for Mini card1
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_WW AN_PWREN41
B B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_MISC_PW REN41
A A
+15V_ALW +3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R721
R721
MCARD_WW AN_PWREN#
61
Q41A
Q41A
2
12
R726
R726 100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R722
R722
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q41B
Q41B
5
4
Power Control for Mini card3
Q43A
Q43A
2
12
R733
R733 100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW+15V_ALW +3.3V_PCIE_FLASH
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R728
R728
61
100K_0402_5%~D
12
R729
R729
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q43B
Q43B
5
4
Q42
Q42
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
2 1
G
G
3
+3.3V_WLAN+3.3V_ALW+15V_ALW
12
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C632
C632
Q40
Q40
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
3
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C644
C644
2
45
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C650
C650
2
R715
R715 20K_0402_5%~D
20K_0402_5%~D
+3.3V_PCIE_WWAN
1 2
12
R723
R723 1K_0402_5%~D
1K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q73
Q73
2
G
G
S
S
12
R730
R730 20K_0402_5%~D
20K_0402_5%~D
PCH_PLTRST#_EC14,17,34,36,41,42
R720
@R720
@
0_0805_5%~D
0_0805_5%~D
MCARD_WW AN_PWREN#
+3.3V_RUN
+1.5V_RUN
+3.3V_RUN +3.3V_CARD
0.1U_0402_16V4Z~D
+3.3V_RUN +3.3V_CARD +1.5V_CARD
+1.5V_RUN
0.1U_0402_16V4Z~D
1
C634
C634
2
USBP10-17
USBP10+17
+3.3V_CARDAUX
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
EXPRCRD_STBY_R#
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C635
C635
2
RUN_ON11,41,44,55,63
1 2
R717 0_0402_5%~D@R717 0_0402_5%~D@
Express Card PWR S/W
+3.3V_CARDAUX
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C633
C633
2
U41
U41
17
AUXIN
3.3VIN23.3VOUT
12
1.5VIN
20
SHDN#
1
STBY#
6
SYSRST#
19
OC#
4
NC
5
NC
13
NC
14
NC
16
NC
TPS2231MRGPR-2_QFN20_4X4~D
TPS2231MRGPR-2_QFN20_4X4~D
Note: Add connection on pin4, pin5, pin 13 and pin14 to support GMT 2nd source part
AUXOUT
1.5VOUT
PERST#
CPPE#
CPUSB#
RCLKEN
GND
PAD
15 3 11
8 10 9
18
7 21
0.1U_0402_16V4Z~D
1
C642
C642
2
CARD_RESET# EXPRCRD_CPPE# CPUSB#
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
Express Card Conn.
1 2
R724 0_0402_5%~D@R724 0_0402_5%~D@
1 2
R727 0_0402_5%~D@R727 0_0402_5%~D@
L49
L49
C646
C646
+3.3V_CARD
1
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
4
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
C649
C649
2
2
3
3
CARD_SMBCLK42
CARD_SMBDAT42
PCIE_WAKE#29,36,41
EXPCLK_REQ#15
1
2
CLK_PCIE_EXP#15 CLK_PCIE_EXP15
PCIE_PRX_EXPTX_N315 PCIE_PRX_EXPTX_P315
PCIE_PTX_EXPRX_N315 PCIE_PTX_EXPRX_P315
USBP10_D­USBP10_D+ CPUSB#
CARD_SMBCLK CARD_SMBDAT
CARD_RESET#
EXPRCRD_CPPE#
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D
C643
C643
1 2 1 2
+3.3V_SUS
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C640
C640
C641
C641
2
2
+1.5V_CARD
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
R732
R732
R731
R731
PCIE_PTX_EXPRX_N3_C PCIE_PTX_EXPRX_P3_C
+1.5V_CARD+3.3V_SUS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C637
C637
2
2
1
C645
C645
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
CONN@
CONN@
JEXP1
JEXP1
1
GND1
2
USB_D-
3
USB_D+
4
CPUSB#
5
RESERVED
6
RESERVED
7
SMB_CLK
8
SMB_DAT
9
+1.5V
10
+1.5V
11
WAKE#
12
+3.3VAUX
13
PERST#
14
+3.3V
15
+3.3V
16
CLKREQ#
17
CPPE#
18
REFCLK-
19
REFCLK+
20
GND
21
PER_N0
22
PER_P0
23
GND
24
PET_N0
25
PET_P0
26
GND
27
GND
28
GND
29
GND
30
GND
T-SOL_5421005002000-9_NR
T-SOL_5421005002000-9_NR
C638
C638
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
LA-6592P
LA-6592P
LA-6592P
37 75Tuesday, January 18, 2011
37 75Tuesday, January 18, 2011
37 75Tuesday, January 18, 2011
1
1.0
1.0
1.0
5
D D
C C
L51
L51
USBP0+17
USBP0-17
B B
4
4
1
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R736 0_0402_5%~D@ R736 0_0402_5%~D@
1 2
R738 0_0402_5%~D@ R738 0_0402_5%~D@
3
3
2
2
USBP0_D+
USBP0_D-
4
USBP1+17
USBP1-17
4
1
3
L52
L52
4
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R737 0_0402_5%~D@R737 0_0402_5%~D@
1 2
R739 0_0402_5%~D@R739 0_0402_5%~D@
3
3
2
2
USBP1_D+
USBP1_D-
2
+USB_SIDE_PWR
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
+
+
2
USBP1_D­USBP1_D+
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C656
C656
2
USBP0_D­USBP0_D+
+USB_SIDE_PWR
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C657
C657
2
USB conn update ok-6/5
JUSB2
JUSB2
1
+5V
2
A-
3
A+ GND4GND
SUYIN_020133GR004M53UZL
2
3
1
C658
C658
SUYIN_020133GR004M53UZL
CONN@
CONN@
D72
D72
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
USB conn update ok-6/5
JUSB3
JUSB3
1
+5V
2
A-
3
A+ GND4GND
SUYIN_020133GR004M53UZL
2
3
D73
D73
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
SUYIN_020133GR004M53UZL
CONN@
CONN@
GND
GND
1
6 5
6 5
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
ize Document Number R ev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB x2
USB x2
USB x2
LA-6592P
LA-6592P
LA-6592P
38 75Tuesday, January 18, 2011
38 75Tuesday, January 18, 2011
38 75Tuesday, January 18, 2011
1
1.0
1.0
1.0
5
D D
ESATA_PTX_DRX_P4_C14
ESATA_PTX_DRX_N4_C14
ESATA_PRX_DTX_N4_C14
ESATA_PRX_DTX_P4_C14
C C
4
ESATA Repeater
+3.3V_RUN
1 2
R741 0_0402_5%~DR 741 0_0402_5%~D
ESATA_PTX_DRX_P4_C
ESATA_PTX_DRX_N4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
C664 0.01U_0402_ 16V7K~DC664 0.01U_0402_16V7K~D
C663 0.01U_0402_ 16V7K~DC663 0.01U_0402_16V7K~D
C666 0.01U_0402_ 16V7K~DC666 0.01U_0402_16V7K~D
C665 0.01U_0402_ 16V7K~DC665 0.01U_0402_16V7K~D
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
@ R1 582
@
12
R1582
@
@
12
0_0402_5%~D
0_0402_5%~D
R1584
R1584
ESATA_PTX_DRX_P4
12
ESATA_PTX_DRX_N4
12
ESATA_PRX_DTX_N4
12
12
10K_0402_5%~D
10K_0402_5%~D
@ R1 583
@
12
R1583
@
@
12
0_0402_5%~D
0_0402_5%~D
R1585
R1585
+ESATA_EQ1 +ESATA_EQ2
3
+3.3V_RUN
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C662
C662
C661
C661
2
2
U44
U44
7
EN
18
CAD
1
AINP
2
AINM
4
BOUTM
5
BOUTP
3
GND
13
GND
17
GND
19
GND
21
EP
MAX4951BECTP+TGH7_TQFN20_4X4~ D
MAX4951BECTP+TGH7_TQFN20_4X4~ D
Note: +ESATA_DEW1, +ESATA_DEW2, +ESATA_EQ1, +ESATA_EQ2 need to route 10 mils and R1584~R1587 need to change to 10k and no stuff R1584, R1585 to support TI SN75LVCP601
VCC VCC VCC VCC
AOUTP
AOUTM
BINP
BINM
6 10 16 20
9
PA
8
PB
15 14
11 12
+ESATA_DEW2
+ESATA_DEW1
ESATA_PTX_DRX_P4_RP ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_P4_RP ESATA_PRX_DTX_N4_RP
2
@
@
0_0402_5%~D
@R742
0_0402_5%~D
@
0_0402_5%~D
@R743
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
@
0_0402_5%~D
@
12
12
R1586
R1586
R1587
R1587
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
@ R1 588
@
@ R1 589
@
12
12
R1588
R1589
@
R742
R743
1 2
1 2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
12
@R745
@
12
@R746
@
R745
R746
1
+USB_SIDE_PWR
+5V_ALW
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
1
C669
C669
2
2
B B
PJP7
PJP7
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
JUMP_43X79
JUMP_43X79
C670
C670
+5V_ALW_FUSE
112
USBP2+17
USBP2-17
+5V_ALW_FUSE
ESATA_USB_PWR _EN#31,41
USB_SIDE_EN#41
U45
U45
1
GND
2
IN
3
IN
4
EN1# EN2#5FAULT#2
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
L90
L90
1
1
2
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
R1150 0_0402_5%~D@ R1150 0_0402_5%~D@
R1151 0_0402_5%~D@ R1151 0_0402_5%~D@
4
1 2
1 2
3
FAULT1#
OUT1 OUT2
T-PAD
2
3
+SATA_SIDE_PWR
10 9 8 7
ILIM
6 11
USBP2_D+
USBP2_D-
12
R747
R747
24.9K_0402_1%~D
24.9K_0402_1%~D
2
3
D74
D74
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
USB_OC1# 17,31
USB_OC0# 17
+SATA_SIDE_PWR
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
+
+
2
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP SATA_PRX_DT X_P4
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
C667
C667
1 2
1 2
1 2
1 2
C668
C668
1
2
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
SATA_PRX_DTX_N4
USBP2_D­USBP2_D+
JESA1
JESA1
1
VBUS
2
D-
3
D+
4
GND
5
GND
6
A+
7
A-
8
GND
9
B-
10
B+
11
GND
12
GND
13
GND
14
GND
15
GND
TYCO_2129156-3
TYCO_2129156-3
CONN@
CONN@
ESATA
ESATA
USB
USB
Place D74 close to JESATA1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
LA-6592P
LA-6592P
LA-6592P
39 75Tuesday, January 18, 2011
39 75Tuesday, January 18, 2011
39 75Tuesday, January 18, 2011
1
1.0
1.0
1.0
2
CONN@
CONN@
JDOCK1
DOCK_LOM_SPD10LED_GRN#32
DPD_GPU_LANE_P047
DPD_GPU_LANE_N047
DPD_GPU_LANE_P147
DPD_GPU_LANE_N147
DPD_GPU_LANE_P247
DPD_GPU_LANE_N247
DPD_GPU_LANE_P347
DPD_GPU_LANE_N347
DPD_GPU_HPD
B B
R757
R757 100K_0402_1%~D
100K_0402_1%~D
1 2
A A
DPD_GPU_HPD46
Close to DOCK Its for Enhance ESD on dock issue.
C690 0.1U_0402_10V7K~DC690 0.1U_040 2_10V7K~D C679 0.1U_0402_10V7K~DC679 0.1U_040 2_10V7K~D
C681 0.1U_0402_10V7K~DC681 0.1U_040 2_10V7K~D C683 0.1U_0402_10V7K~DC683 0.1U_040 2_10V7K~D
C692 0.1U_0402_10V7K~DC692 0.1U_040 2_10V7K~D C685 0.1U_0402_10V7K~DC685 0.1U_040 2_10V7K~D
C687 0.1U_0402_10V7K~DC687 0.1U_040 2_10V7K~D C689 0.1U_0402_10V7K~DC689 0.1U_040 2_10V7K~D
@C695
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
@
DPD_CA_DET27
12 12
12 12
12 12
12 12
DPD_DOCK_AUX27 DPC_DOCK_AUX 27 DPD_DOCK_AUX#27
+NBDOCK_DC_IN_SS
1
C695
2
SLICE_BAT_PRES#41,52,62 DOCK_DET# 41
BLUE_DOCK25
RED_DOCK25
GREEN_DOCK25
HSYNC_DOCK25 VSYNC_DOCK25
CLK_MSE42 DAT_MSE42
DAI_BCLK#30 DAI_LRCK#30
DAI_DI30 DAI_DO#30
DAI_12MHZ#30
D_LFRAME#41
D_CLKRUN#41
D_DLDRQ1#41
CLK_PCI_DOCK17
DOCK_SMB_CLK42
DOCK_SMB_DAT42
DOCK_SMB_ALERT#42,52,62
DOCK_PSID52
DOCK_PWR_BTN#42
+DOCK_PWR_BAR
D_LAD041 D_LAD141
D_LAD241 D_LAD341
D_SERIRQ41
DOCK_DET_1
DPD_CA_DET
DPD_GPU_LANE_P0_C DPD_GPU_LANE_N0_C
DPD_GPU_LANE_P1_C DPD_GPU_LANE_N1_C
DPD_GPU_LANE_P2_C DPD_GPU_LANE_N2_C
DPD_GPU_LANE_P3_C DPD_GPU_LANE_N3_C
DPD_GPU_HPD
BLUE_DOCK
RED_DOCK
GREEN_DOCK
SLICE_BAT_PRES#
3
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D C702
C702
1
2
SM24.TCT_SOT23-3~D
SM24.TCT_SOT23-3~D
2
@D33
@
D33
1
JDOCK1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
GND1
146
PWR1
147
PWR1
148
PWR1
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
Shield_G
JAE_WD2F144W B1
JAE_WD2F144W B1
PWR2 PWR2 PWR2
GND2
Shield_G Shield_G Shield_G Shield_G Shield_G Shield_G
2
4
4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98
100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
149 150 151 152
159 160 161 162 163 164
DPC_CA_DET
DPC_GPU_LANE_P0_C DPC_GPU_LANE_N0_C
DPC_GPU_LANE_P1_C DPC_GPU_LANE_N1_C
DPC_GPU_LANE_P2_C DPC_GPU_LANE_N2_C
DPC_GPU_LANE_P3_C DPC_GPU_LANE_N3_C
DPC_GPU_HPD
SATA_PRX_DKTX_P5 SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5 SATA_PTX_DKRX_N5
DOCK_DET_R#
C703
0.1U_0603_50V4Z~D
C703
0.1U_0603_50V4Z~D
1
2
DOCK_AC_OFF 41,62 DOCK_LOM_SPD100LED_ORG# 32
DPC_CA_DET 27
C691 0.1U_0402_10V7K~DC691 0.1U _0402_10V7K~D
12
C680 0.1U_0402_10V7K~DC680 0.1U _0402_10V7K~D
12
C682 0.1U_0402_10V7K~DC682 0.1U _0402_10V7K~D
12
C684 0.1U_0402_10V7K~DC684 0.1U _0402_10V7K~D
12
C693 0.1U_0402_10V7K~DC693 0.1U _0402_10V7K~D
12
C686 0.1U_0402_10V7K~DC686 0.1U _0402_10V7K~D
12
C688 0.1U_0402_10V7K~DC688 0.1U _0402_10V7K~D
12
C694 0.1U_0402_10V7K~DC694 0.1U _0402_10V7K~D
12
DPC_DOCK_AUX# 27
ACAV_DOCK_SRC# 62
DAT_DDC2_DOCK 25
CLK_DDC2_DOCK 25
12
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D
12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D
1 2
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D
1 2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D
USBP8+ 17
USBP8- 17
USBP9+ 17
USBP9- 17
CLK_KBD 42 DAT_KBD 42
BREATH_LED# 42,45 DOCK_LOM_ACTLED_YEL# 32
DOCK_LOM_TRD0+ 32
DOCK_LOM_TRD0- 32
DOCK_LOM_TRD1+ 32
DOCK_LOM_TRD1- 32
+LOM_VCT
DOCK_LOM_TRD2+ 32 DOCK_LOM_TRD2- 32
DOCK_LOM_TRD3+ 32 DOCK_LOM_TRD3- 32
DOCK_DCIN_IS+ 60 DOCK_DCIN_IS- 60
DOCK_POR_RST# 42
+DOCK_PWR_BAR
DOCK_AC_OFF
2
1
DPC_GPU_LANE_P0 47
DPC_GPU_LANE_N0 47
DPC_GPU_LANE_P1 47
DPC_GPU_LANE_N1 47
DPC_GPU_LANE_P2 47
DPC_GPU_LANE_N2 47
DPC_GPU_LANE_P3 47
DPC_GPU_LANE_N3 47
SATA_PRX_DKTX_P5_C 14 SATA_PRX_DKTX_N5_C 14
SATA_PTX_DKRX_P5_C 14 SATA_PTX_DKRX_N5_C 14
+LOM_VCT
1
C701
C701 1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
D32
D32
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
21
DPC_GPU_HPD 46
1
C696
@C696
@
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
2
Close to DOCK Its for Enhance ESD on dock issue.
DPC_GPU_HPD
R758
R758 100K_0402_1%~D
100K_0402_1%~D
1 2
DOCK_DET#
1 2
R755 100K_04 02_5%~DR755 100K_0402_5%~D
CLK_PCI_DOCK
12
R756
R756 33_0402_5%~D
33_0402_5%~D
1
C704
C704
6.8P_0402_50V8D~D
6.8P_0402_50V8D~D
2
+3.3V_ALW
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
1
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DOCKING CONN
DOCKING CONN
DOCKING CONN
LA-6592P
LA-6592P
LA-6592P
40 75Thursday, January 13, 2011
40 75Thursday, January 13, 2011
40 75Thursday, January 13, 2011
1.0
1.0
1.0
+3.3V_ALW
5
4
3
2
1
1 2
R759 10K_040 2_5%~DR759 10K_0402_5%~D
1 2
R761 100K_04 02_5%~DR761 100K_0402_5%~D
1 2
R763 100K_04 02_5%~DR763 100K_0402_5%~D
1 2
R760 100K_04 02_5%~DR760 100K_0402_5%~D
D D
+3.3V_ALW2
1 2
R768 10K_040 2_5%~DR768 10K_0402_5%~D
1 2
R769 10K_040 2_5%~DR769 10K_0402_5%~D
+3.3V_RUN
1 2
R766 100K_04 02_5%~DR766 100K_0402_5%~D
1 2
R772 10K_040 2_5%~D@R 772 10K_0402_5%~D@
1 2
R767 100K_04 02_5%~DR767 100K_0402_5%~D
1 2
R775 10K_040 2_5%~DR775 10K_0402_5%~D
1 2
C C
B B
R1152 100K_04 02_5%~DR1152 100K_0402_5%~D
1 2
R1153 100K_04 02_5%~DR1153 100K_0402_5%~D
1 2
R1154 100K_04 02_5%~DR1154 100K_0402_5%~D
+3.3V_ALW
R796 10K_0402_5%~DR796 10K_0402_5%~D
+3.3V_ALW
R800 100K_0402_5%~D@R800 100K_0402_5%~D@
VGA_ID
Discrete
ME_FWP PCH has internal 20K PD. (suspend power rail)
A A
PCIE_WAKE#
DCIN_CBL_DET#
CPU_DETECT#
SLICE_BAT_PRES#
USB_SIDE_EN#
ESATA_USB_PWR _EN#
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
LCD_TST
SYS_LED_MASK#
DGPU_PWR_EN
GFX_MEM_VTT_ON
DP_HDMI_HPD
DYN_TUR_PWR_ALRT#
1 2
1 2
VGA_ID
1 2
R803 100K_04 02_5%~DR803 100K_0402_5%~D
VGA_ID
0
1UMA
ME_FWP
R793
@R793
@
1K_0402_5%~D
1K_0402_5%~D
1 2
5
+3.3V_ALW
GPIOI1
GPIOI3 GPIOI4 GPIOI5 GPIOI6 GPIOI7
LAD0 LAD1 LAD2 LAD3
DLAD0 DLAD1 DLAD2 DLAD3
OUT65
VSS
EP
1
C707
C707
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
B63
0.75V_DDR_VTT_ON
A60 A61 B65 A62 B66
R765 0_0402_5%~D@ R765 0_0402_5%~D@
A63
DOCK_AC_OFF_EC
B67 A64 A5 B6 A6 B7 A7 B8
ME_FWP
A8 B9 B10 A10
TEMP_ALERT#_R
B11 A11 B12 A12
5048_GPIOL0
B60
5048_GPIOL1
A57
5048_GPIOL2
B64
5048_GPIOL3
B68
5048_GPIOL4
A9
5048_GPIOL5
B1
5048_GPIOL6
A18
5048_GPIOL7
A44
5048_GPI0M1
B34
5048_GPI0M3
B39
5048_GPI0M4
B51
A27 A26 B26 B25 A21 B22
CLK_PCI_5028
A28 B20 A23 A22 B21
CLK_SIO_14M
A32 B35
B29 B28 A25 A24 B23
D_CLKRUN#
A19
D_DLDRQ1#
B24
D_SERIRQ
A20
A29 B31 A30
A4
SP_TPM_LPC_EN
B56
B19
R804 1K_0402_5%~DR804 1K_0402_5%~D
+CAP_LDO
B46
B27 C1
1 2
RUN_ON
1
C708
C708
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
SIO_SLP_A# 16,56
0.75V_DDR_VTT_ON 55
AUX_EN_WOW L 37
WLAN_LAN_DISB# 32
SIO_SLP_LAN# 16,32
SIO_SLP_SUS# 16 GPIO_PSID_SELECT 52 MODC_EN 29 DOCK_HP_DET 30 DOCK_MIC_DET 30
ME_FWP 14
MASK_SATA_LED# 45
LED_SATA_DIAG_OUT# 45
1 2
R1591 0_0402_5%~D@R1591 0_0402_5%~D@
1
2
RUN_ON 11,37,44,55,63 SPI_WP#_SEL 14
LPC_LFRAME# 14,33,34,42
RUNPWROK 7,42
SP_TPM_LPC_EN 33,34
12
+CAP_LDO trace width 20mil.
C714
C714
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C706
C706
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
B5
A17
B30
A43
U46
U46
SUSACK#_EC
12
4
B52
GPIOA0
A49
GPIOA1
B53
GPIOA2
A50
GPIOA3
B54
GPIOA4
A51
GPIOA5
B55
GPIOA6
A52
GPIOA7
A33
GPIOB0
B36
GPIOB1
A34
GPOC2
B37
GPOC3
A35
GPOC4
B38
GPOC5
A36
GPOC6/TACH4
A37
GPIOC7
B40
GPIOD0
A38
GPIOC1
B41
GPIOC0
A39
GPIOB7
B42
GPIOB6
A40
GPIOB5
B43
GPIOB4
A41
GPIOB3
B44
GPIOB2
B32
GPIOD1
A31
GPIOD2
B33
GPIOD3
B15
GPIOD4
A15
GPIOD5
B16
GPIOD6
A16
GPIOD7
A1
GPIOE0/RXD
B2
GPIOE1/TXD
A2
GPIOE2/RTS#
B3
GPIOE3/DSR#
A3
GPIOE4/CTS#
B45
GPIOE5/DTR#
A42
GPIOE6/RI#
B4
GPIOE7/DCD#
A59
GPIOF0
B62
GPIOF1
A58
GPIOF2
B61
GPIOF3/TACH8
A56
GPIOF4/TACH7
B59
GPIOF5
A55
GPIOF6
B58
GPIOF7
B47
GPIOG0/TACH5
A45
GPIOG1
B48
GPIOG2
A46
GPIOG3
B49
GPIOG4
A47
GPIOG5
B50
GPIOG6
A48
GPIOG7/TACH6
B13
GPIOH0
A13
GPIOH1
A53
SYSOPT1/GPIOH2
B57
SYSOPT0/GPIOH3
B14
GPIOH4
A14
GPIOH5
B17
GPIOH6
B18
GPIOH7
LID_CL# 31,45
CRT_SWITCH25
MDC_RST_DIS#31
MCARD_MISC_PW REN37
DCIN_CBL_DET#52
GPU_DEEP_CLKDWN46
PCIE_WAKE#29,36,37
GPU_CLKDWN46
USB_SIDE_EN#39 EN_I2S_NB_CODEC#30 USH_PWR_STATE #33
EN_DOCK_PWR_BAR62
PANEL_BKEN_EC24
ENVDD_PCH16,24
LCD_TST24
PSID_DISABLE#52
PBAT_PRES#52,62
DOCKED32
DOCK_DET#40
AUD_NB_MUTE#30
MCARD_WW AN_PWREN37
LCD_VCC_TEST_EN24
CCD_OFF24
AUD_HP_NB_SENSE30,31
ESATA_USB_PWR _EN#31,39
MODULE_ON62
SLICE_BAT_ON62
SLICE_BAT_PRES#40,52,62
MODULE_BATT_PRES#52,62
CHARGE_MODULE_BATT62
CHARGE_PBATT62 DEFAULT_OVRDE62
GFX_MEM_VTT_ON49
CPU_DETECT#7
DGPU_PWR_EN63
MOD_SATA_PCIE#_DET29
DP_HDMI_HPD46
ZODD_WAKE#29
BCM5882_ALERT#33
SUSACK#16
EDID_SELECT#25
DGPU_PWROK18,63
3.3V_RUN_GFX_ON15,49
SLP_ME_CSW_DE V#14,18
LAN_DISABLE#_R32
CHARGE_EN6 2
SYS_LED_MASK#45
DYN_TUR_PWR_ALRT#60
SIO_EXT_WAKE#18
WIRELESS_LED#36,45
PCH_PCIE_WAKE#16
WLAN_RADIO_DIS#36
WIRELESS_ON#/OFF31
BT_RADIO_DIS#43
WWAN_RA DIO_DIS#36
SYS_PWROK7,16 DGPU_SELECT#23,25 DGPU_DI_INT#46 CPU_VTT_ON57,61 PCH_DPWROK16
LID_CL_SIO#
1 2
R1132 0_0402_5%~D@ R1132 0_0402_5%~D@
1 2
R797 0_0402_5%~D@R797 0_0402_5%~D@
+3.3V_ALW
12
R805
R805 100K_0402_5%~D
100K_0402_5%~D
1
C716
C716
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
DCIN_CBL_DET# LID_CL_SIO#
PCIE_WAKE#
USB_SIDE_EN#
PANEL_BKEN_EC
LCD_TST PSID_DISABLE# PBAT_PRES# DOCKED DOCK_DET#
MCARD_WW AN_PWREN LCD_VCC_TEST_EN CCD_OFF AUD_HP_NB_SENSE ESATA_USB_PWR _EN#
SLICE_BAT_ON SLICE_BAT_PRES#
GFX_MEM_VTT_ON
CPU_DETECT# DGPU_PWR_EN
DP_HDMI_HPD
VGA_ID
SLP_ME_CSW_DE V#
SYS_LED_MASK# DYN_TUR_PWR_ALRT#
PCH_PCIE_WAKE#
WIRELESS_ON#/OFF
CPU_VTT_ON
1 2
R802 0_0402_5%~D@R802 0_0402_5%~D@
R807 10_0402_5%~DR807 10_0402_5%~D
A54
VCC1
VCC1
VCC1
VCC1
VCC1
ECE5028-LZY_DQFN132_11X11~D
ECE5028-LZY_DQFN132_11X11~D
GPIOI2/TACH0
GPIOJ1/TACH1 GPIOJ2/TACH2
GPIOK1/TACH3
GPIOL0/PWM7 GPIOL1/PWM8 GPIOL2/PWM0 GPIOL3/PWM1 GPIOL4/PWM3 GPIOL5/PWM2
GPIOL7/PWM5
GPIOM3/PWM4 GPIOM4/PWM6
14.318MHZ/GPIOM0 CLK32/GPIOM2
DB Version 0.4
DB Version 0.4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
GPIOJ0
GPIOJ3 GPIOJ4 GPIOJ5 GPIOJ6 GPIOJ7
GPIOK0
GPIOK2 GPIOK3 GPIOK4 GPIOK5 GPIOK6 GPIOK7
GPIOL6
GPIOM1
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0# LDRQ1#
SER_IRQ
DLFRAME# DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT BC_CLK
PWRGD
TEST_PIN
CAP_LDO
3
1
C709
C709
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
SIO_SLP_S4# 16 SIO_SLP_S3# 16
IMVP_PGOOD 58
IMVP_VR_ON 58
1.8V_RUN_PWRGD 55
LPC_LAD0 14,33,34,42 LPC_LAD1 14,33,34,42 LPC_LAD2 14,33,34,42 LPC_LAD3 14,33,34,42
PCH_PLTRST#_EC 14,17,34,36,37,42 CLK_PCI_5028 17
CLKRUN# 16,34,42 LPC_LDRQ0# 14 LPC_LDRQ1# 14 IRQ_SERIRQ 1 4,33,34,42 CLK_SIO_14M 15
EC_32KHZ_ECE5048 42
D_LAD0 4 0 D_LAD1 4 0 D_LAD2 4 0 D_LAD3 4 0 D_LFRAME# 40 D_CLKRUN# 40 D_DLDRQ1# 40 D_SERIRQ 40
BC_INT#_ECE5028 42
BC_DAT_ECE5028 42
BC_CLK_ECE5028 42
1
2
ACAV_IN_NB 42,60,62
DOCK_AC_OFF_EC 62
TEMP_ALERT# 14,18
2
C710
C710
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
+3.3V_ALW
5
1
P
B
O
2
A
G
U47
U47
3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
1
C705
C705 10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
2
C711
C711
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4
2 1
D34
D34
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
DOCK_AC_OFF 40,62
12
R770
R770 33K_0402_5%~D
33K_0402_5%~D
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
RUN_ON
CPU_VTT_ON
0.75V_DDR_VTT_ON
SLICE_BAT_ON
5048_GPIOL0 5048_GPIOL1 5048_GPIOL2 5048_GPIOL3 5048_GPIOL4 5048_GPIOL5 5048_GPIOL6 5048_GPIOL7
5048_GPI0M1 5048_GPI0M3 5048_GPI0M4
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
R1567 10K_0402_5%~D@R1567 10K_0402_5%~D@ R1568 10K_0402_5%~DR1568 10K_0402_5%~D R1569 0_0402_5%~DR1569 0_0402_5%~D R1570 0_0402_5%~D@R1570 0_0402_5%~D@ R1571 0_0402_5%~DR1571 0_0402_5%~D R1572 0_0402_5%~D@R1572 0_0402_5%~D@ R1573 0_0402_5%~DR1573 0_0402_5%~D R1574 0_0402_5%~DR1574 0_0402_5%~D
R1575 0_0402_5%~D@R1575 0_0402_5%~D@ R1576 0_0402_5%~DR1576 0_0402_5%~D R1577 0_0402_5%~DR1577 0_0402_5%~D
R794
@R794
@
10_0402_5%~D
10_0402_5%~D
C712
@C712
@
1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2
CLK_PCI_5028CLK_SIO_14M
12
10_0402_5%~D
10_0402_5%~D
1
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
12
12
12
12
12
12
12
R795
@R795
@
@C713
@
C713
R777 100K_0402_5%~DR777 100K_0402_ 5%~D
R780 100K_0402_5%~DR780 100K_0402_ 5%~D
R782 100K_0402_5%~DR782 100K_0402_ 5%~D
R786 100K_0402_5%~DR786 100K_0402_ 5%~D
R789 100K_0402_5%~DR789 100K_0402_ 5%~D
R790 100K_0402_5%~DR790 100K_0402_ 5%~D
R791 100K_0402_5%~DR791 100K_0402_ 5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ECE5028
ECE5028
ECE5028
LA-6592P
LA-6592P
LA-6592P
41 75Thursday, January 13, 2011
41 75Thursday, January 13, 2011
41 75Thursday, January 13, 2011
1
+3.3V_RUN
12
1
2
1.0
1.0
1.0
+3.3V_ALW
1 2
R814 100K_0402_5%~DR814 100K_0402_5%~D
R816 100K_0402_5%~DR816 100K_0402_5%~D
R817 100K_0402_5%~DR817 100K_0402_5%~D
1 2
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
1 2
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
R821 100K_0402_5%~D@ R821 100K_0402_5%~D@
D D
C C
B B
1 2
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
1 2
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
+3.3V_ALW
12
R824
R824
10K_0402_5%~D
10K_0402_5%~D
12
100_0402_5%~D
100_0402_5%~D
@
@
R836
R836
JDEG1
@JDEG1
@
1
1
2
2
3
7
3
G1
4
8
4
G2
5
5
6
6
ACES_85204-06001~D
ACES_85204-06001~D
JTAG2
@JTAG2
@
1
1
2
2
3
7
3
G1
4
8
4
G2
5
5
6
6
ACES_85204-06001~D
ACES_85204-06001~D
32 KHz Clock
C741
C741
1 2
33P_0402_50V8J~D
33P_0402_50V8J~D
MEC_XTAL2
MEC_XTAL1
C743
C743
1 2
33P_0402_50V8J~D
33P_0402_50V8J~D
Place closely pin A29
CLK_PCI_MEC
A A
R885
@R885
@
10_0402_5%~D
10_0402_5%~D
C747
@ C747
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
5
BC_DAT_ECE5028
BC_DAT_EMC4022
12
BC_DAT_ECE1117
12
PBAT_SMBDAT
PBAT_SMBCLK
LPC_LDRQ#_MEC
12
CHARGER_SMBDAT
CHARGER_SMBCLK
JTAG_RST# citcuit c
lose to U51.B57
JTAG_RST#
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C735
C735
+3.3V_ALW
MSCLK MSDATA
1 2 1 2
49.9_0402_1%~D
49.9_0402_1%~D
12
R857
R857
1
2
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
R847
R847
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
R858
R858
R859
R859
G
G
34
G
G
2
@R1179
@
10K_0402_5%~D
10K_0402_5%~D
PROCHOT#_EC
1 2
R812
@R812
@
100K_0402_5%~D
100K_0402_5%~D
5
R848
R848
10K_0402_5%~D
10K_0402_5%~D
12
+3.3V_RUN
R1179
10K_0402_5%~D
10K_0402_5%~D
12
R860
R860
2
R853 0_0402_5%~D@R853 0_0402_5%~D@ R855 0_0402_5%~D@R855 0_0402_5%~D@
+3.3V_ALW
12
Y6
Y6
1
32.768KHZ_12.5PF_Q13MC1461000~D
32.768KHZ_12.5PF_Q13MC1461000~D
12
1
2
1.05V_VTTPWRGD57,61
VCCSAPWROK61
SHORT PADS~D
SHORT PADS~D
@JTAG1
@
JTAG1
100K_0402_5%~D
@R850
100K_0402_5%~D
@
12
R849
R849
R850
HOST_DEBUG_TX
HOST_DEBUG_RX
10K_0402_5%~D
10K_0402_5%~D
R861
R861
1 2
JTAG_TDI JTAG_TMS JTAG_CLK JTAG_TDO
BOARD_ID
12
12
R1180
R1180
2
+3.3V_ALW
0_0402_5%~D
0_0402_5%~D
G
G
EC_32KHZ_ECE504841
13
D
D
S
S
+3.3V_ALW
1
B
2
A
BC_DAT_ECE502841 BC_INT#_ECE502841
BC_INT#_EMC402222
BC_INT#_ECE111743
PCH_PLTRST#_EC14,17,34,36,37,41
33K_0402_5%~D
33K_0402_5%~D
R875 C919
240K 4700p
R875
R875
130K 4700p 62K
1 2
33K
*
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
8.2K
C744
C744
4.3K
2
2K 1K
H_PROCHOT# 7,58,60
Q47
@
Q47
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
C720
C720
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
5
U50
U50
P
1.05V_0.8V_PWROK
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
SML1_SMBDATA15
SML1_SMBCLK15
CLK_TP_SIO43 DAT_TP_SIO43 CLK_KBD40 DAT_KBD40 CLK_MSE40 DAT_MSE40
PBAT_SMBDAT52
PBAT_SMBCLK52
DOCK_POR_RST#40
SUS_ON44
AUX_ON32 BREATH_LED#40,45 PCH_ALW_ON44
BIA_PWM_EC24
HDDC_EN28
BC_CLK_ECE502841
BC_CLK_EMC402222
BC_DAT_EMC402222
BC_CLK_ECE111743
BC_DAT_ECE111743
BEEP30
SIO_SLP_S5#16
ACAV_IN_NB41,60,62
SIO_EXT_SMI#14,17
SIO_RCIN#18
IRQ_SERIRQ14,33,34,41
CLK_PCI_MEC17
LPC_LFRAME#14,33,34,41
LPC_LAD014,33,34,41 LPC_LAD114,33,34,41 LPC_LAD214,33,34,41 LPC_LAD314,33,34,41
CLKRUN#16,34,41
SIO_EXT_SCI#18
MEC_XTAL2
1 2
R867 0_0402_5%~D@R867 0_0402_5%~D@
Depopulated R867 for ECE5028 u se
4700p 4700p 4700p 4700p 4700p 4700p
RESET_OUT#
4
+RTC_CELL
R815
R815 0_0402_5%~D
0_0402_5%~D
+RTC_CELL_VBAT
1 2
1.05V_0.8V_PWROK 14,58
U51
U51
PS/2 INTERFACE
PS/2 INTERFACE
A5
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_ DATA
B6
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_ CLK
A37
GPIO110/PS2_CLK2/GPTP-IN6
B40
CLK_KBD DAT_KBD CLK_MSE DAT_MSE PBAT_SMBDAT PBAT_SMBCLK
JTAG_TDI JTAG_TDO JTAG_CLK JTAG_TMS JTAG_RST#
C736
C736
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
DOCK_POR_RST#
SUS_ON AUX_ON
PCH_ALW_ON
BC_DAT_ECE5028
BC_DAT_EMC4022
BC_DAT_ECE1117
LPC_LDRQ#_MEC
CLK_PCI_MEC
MEC_XTAL1
MEC_XTAL2_R PECI_EC_R
12
R1068 0_0402_5%~D@ R1068 0_0402_5%~D@
REV
GPIO111/PS2_DAT2/GPTP-OUT6
A38
GPIO112/PS2_CLK1A
B41
GPIO113/PS2_DAT1A
A39
GPIO114/PS2_CLK0A
B42
GPIO115/PS2_DAT0A
B59
GPIO154/I2C1C_DATA/PS2_CLK1B
A56
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
A51
GPIO145/I2C1K_DATA/JTAG_TDI
B55
GPIO146/I2C1K_CLK/JTAG_TDO
B56
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
A53
GPIO150/I2C1J_CLK/I2C2C_ CLK/JTAG_TMS
B57
JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
B22
GPIO050/FAN_TACH1
A21
GPIO051/FAN_TACH2
B23
GPIO052/FAN_TACH3
B24
GPIO053/PWM0
A23
GPIO054/PWM1
B25
GPIO055/PWM2
A24
GPIO056/PWM3
BC-LINK
BC-LINK
A43
GPIO123/BCM_A_CLK
B45
GPIO122/BCM_A_DAT
A42
GPIO121/BCM_A_INT#
A12
GPIO022/BCM_B_CLK
B13
GPIO023/BCM_B_DAT
A13
GPIO024/BCM_B_INT#
B20
GPIO044/BCM_C_CLK
A18
GPIO043/BCM_C_DAT
B19
GPIO042/BCM_C_INT#
A20
GPIO047/LSBCM_D_CLK
B21
GPIO046/LSBCM_D_DAT
A19
GPIO045/LSBCM_D_INT#
A16
GPIO032/GPTP-IN3/BCM_E_CLK
B16
GPIO31/GPTP-OUT2/BCM_E_DAT
A15
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
A6
GPIO011/nSMI
A27
GPIO061/LPCPD#
B29
LDRQ#
A28
SER_IRQ
B30
LRESET#
A29
PCI_CLK
B31
LFRAME#
A30
LAD0
B32
LAD1
A31
LAD2
B33
LAD3
A32
CLKRUN#
A33
GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
A61
XTAL1
A62
XTAL2
B62
GPIO160/32KHZ_OUT
B34
NC1
A64
NC2
B68
NC3
15mil
+3.3V_ALW
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C723
C723
2
B64
A11
VBAT
VTR[1]
DB Version 0.12
DB Version 0.12
VSS[1]
AGND
VSS[4]
B11
B66
B60
X00 X01 X02 A00
2
G
G
+3.3V_M
4
12
13
D
D
S
S
R893
R893 100K_0402_5%~D
100K_0402_5%~D
PCH_PWRGD# 22
Q48
Q48 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_ALW_PCH
PCH_RSMRST#
12
R866
@R866
@
4.7K_0402_5%~D
4.7K_0402_5%~D
INTEL RSMRST# ci rcuit
3
1
2
A22
B35
A41
A58
A52
A26
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]B3VTR[8]
MISC INTERFACE
MISC INTERFACE
GPIO124/GPTP-OUT5/UART_RX
GENERAL PURPOSE I/ O
GENERAL PURPOSE I/ O
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
SMBUS INTERFACE
SMBUS INTERFACE
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_ CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2 B_CLK
DELL PWR SW INF
DELL PWR SW INF
PECI
PECI
VR_CAP
VSS_RO
B12
B54
least 15mil
+VR_CAP
1
C739
C739
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
1 2
R868 0_0402_5%~DR868 0_0402_5%~D
Q126
@
Q126
@
MMBT3906WT1G_SC70-3~D
MMBT3906WT1G_SC70-3~D
C
C
123
E
E
B
B
D75A BAV99DW-7-F_SOT363-6~D@ D75A BAV99DW-7-F_SOT363-6~D@
1
2
D75B BAV99DW-7-F_SOT363-6~D@ D75B BAV99DW-7-F_SOT363-6~D@
4
5
3
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C724
C724
GPIO101/ECGP_SCLK GPIO103/ECGP_MISO GPIO105/ECGP_MOSI
GPIO015/GPTP-OUT7
GPIO017/GPTP-OUT8
GPIO027/GPTP-OUT1
GPIO107/nRESET_OUT
GPIO152/GPTP-OUT4
GPIO003/I2C1A_DATA
GPIO005/I2C1B_DATA
GPIO130/I2C2A_DATA
GPIO132/I2C1G_DATA
GPIO143/I2C1E_DATA
I2S
I2S
EP
C1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C727
C727
2
VCC_PRWGD
GPIO127/A20M
GPIO153/LED3 GPIO156/LED1 GPIO157/LED2
nFWP
GPIO041
GPIO126
BGPO0 VCI_IN2# VCI_OUT VCI_IN1# VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
PECI_VREF
PECI
I2S_DAT I2S_CLK
I2S_WS
12
R823
@R823
@
2.2K_0402_5%~D
2.2K_0402_5%~D
1
C729
C729
2
RUN_ON_ENABLE#44
1
2
GPIO021/RC_ID1 GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
GPIO060/KBRST
GPIO102/HSPI_SCLK GPIO104/HSPI_MISO GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
PROCHOT#/PWM4
GPIO001/ECSPI_CS1 GPIO002/ECSPI_CS2
GPIO016/GPTP-IN8
GPIO026/GPTP-IN1
GPIO125/GPTP-IN5
GPIO151/GPTP-IN4
GPIO004/I2C1A_CLK
GPIO006/I2C1B_CLK
GPIO131/I2C2A_CLK
GPIO140/I2C1G_CLK
GPIO144/I2C1E_CLK
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
PCH_RSMRST#_Q 14,16
6
3
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
A10 B10 B14 B44 B46 B26 A25 B36 B37 B38 A34 A35 A36 A40 B43 A45 A55 A57 B61 B65 A46
B2 A2 B8 B18 A8 B9 A9 A14 B15 A17 B39 A44 B47 A54 B58
A3 B4 A4 B5 B7 A7 B48 B49 A47 B50 B52 A49 B53 A50
A59 B63 A60 A63 B67 B1 A1
B51 A48
B17 B27 B28
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C725
C730
C730
RUNPWROK
C725
C731
C731
2
2
SYSTEM_ID BOARD_ID DDR_ON HOST_DEBUG_TX HOST_DEBUG_RX RUNPWROK EN_INVPWR
XFR_ID_BIT#
DYN_TUR_CURRNT_SET# CPU1.5V_S3_GATE MSDATA MSCLK
FWP# PROCHOT#_EC
R884 1K_0402_5%~DR884 1K_0402_5%~D
1 2
DOCK_SMB_ALERT#
R886 1K_0402_5%~DR886 1K_0402_5%~D
1 2
R887 1K_0402_5%~DR887 1K_0402_5%~D
1 2
DEVICE_DET# RESET_OUT# A_ON PCH_RSMRST# AC_PRESENT
DOCK_SMB_DAT DOCK_SMB_CLK LCD_SMBDAT LCD_SMBCLK BAY_SMBDAT BAY_SMBCLK GPU_SMBDAT GPU_SMBCLK CHARGER_SMBDAT CHARGER_SMBCLK
LAT_ON_SW#
VCI_INT1# POWER_SW_IN#
DOCK_PWR_SW#
+PECI_VREF
R864 0_0402_5%~D@R864 0_0402_5%~D@ R865 0_0402_5%~D@R865 0_0402_5%~D@
R864& R865 for MEC5045 should be populated
+3.3V_RUN
2
G
G
10U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C726
C726
2
R862 0_0402_5%~D@R862 0_0402_5%~D@ R863 43_0402_5%~DR863 43_0402_5%~D
1 2 1 2
12
R799
R799 10K_0402_5%~D
10K_0402_5%~D
13
D
D
Q45
Q45
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
CHIPSET_ID for B ID function
10U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C728
C728
C732
C732
2
2
DDR_ON 54,55
HOST_DEBUG_TX 36
HOST_DEBUG_RX 36
RUNPWROK 7,41 EN_INVPWR 24 PCH_SATA_MOD_EN# 14 TOUCH_SCREEN_PD# 24
XFR_ID_BIT# 31 DDR_HVREF_RST_GATE 7 DYN_TUR_CURRNT_SET# 60 CPU1.5V_S3_GATE 11
MSDATA 36 MSCLK 36 SIO_A20GATE 18
PS_ID 52
BAT1_LED# 45 BAT2_LED# 45
ME_SUS_PWR_ACK 16
1.5V_SUS_PWRGD 54 PM_APWROK 16
1.05V_A_PWRGD 56
ALW_PWRGD_3V_5V 53 DEVICE_DET# 29
RESET_OUT# 16 A_ON 44,56
AC_PRESENT 16 SIO_PWRBTN# 16
DOCK_SMB_CLK 40
BAY_SMBCLK 29,52
GPU_SMBCLK 46
CHARGER_SMBCLK 60
CARD_SMBCLK 37
USH_SMBCLK 33
ALWON 53
ACAV_IN 22,60,62
trace width 20 mils
1 2 1 2
SYSTEM_ID
2
VOL_MUTE 31
DOCK_SMB_ALERT# 40,52,62
VOL_UP 31 VOL_DOWN 31
DOCK_SMB_DAT 40
BAY_SMBDAT 29,52
GPU_SMBDAT 46
CHARGER_SMBDAT 60
CARD_SMBDAT 37
USH_SMBDAT 33
R863 close to U51 & least 250mils
+3.3V_ALW
1 2
1
2
2
PECI_EC 18
R871
R871 1K_0402_5%~D
1K_0402_5%~D
FWP#
C742
C742 4700P_0402_25V7K~D
4700P_0402_25V7K~D
1=JTAG interface Reset disable d 0=Reset JTAG interface
+RTC_CELL
12
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C737
C737
2
R872
R872 10K_0402_5%~D
10K_0402_5%~D
R879
@R879
@
10K_0402_5%~D
10K_0402_5%~D
POWER_SW_IN#
DOCK_PWR_SW#
LAT_ON_SW#
1
2
+RTC_CELL
12
R825 10K_0402_5%~DR825 10K_0402_5%~D
1
2
+RTC_CELL
12
1
2
AC_PRESENT
XFR_ID_BIT#
DOCK_SMB_DAT
DOCK_SMB_CLK
DOCK_SMB_ALERT#
LCD_SMBCLK
LCD_SMBDAT
VOL_MUTE
VOL_UP
VOL_DOWN
DEVICE_DET#
BAY_SMBDAT
BAY_SMBCLK
DYN_TUR_CURRNT_SET#
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
GPU_SMBDAT
GPU_SMBCLK
VCI_INT1#
MSDATA
A_ON
AUX_ON
DDR_ON
SUS_ON
PCH_ALW_ON
DOCK_POR_RST#
EN_INVPWR
1.05V_0.8V_PWROK
RESET_OUT#
CPU1.5V_S3_GATE
POWER_SW_IN#22 POWER_SW#_MB 31,43
Bat2 = Amber LED Bat1 =White LED
20mA drive pins
+1.05V_RUN_VTT
+3.3V_ALW
1 2
1 2
1
@C721
R810
R810 100K_0402_5%~D
100K_0402_5%~D
1 2
R811 10K_0402_5%~DR811 10K_0402_5%~D
C722
C722 1U_0402_6. 3V6K~D
1U_0402_6. 3V6K~D
R819
R819 100K_0402_5%~D
100K_0402_5%~D
1 2
C734
C734 1U_0402_6. 3V6K~D
1U_0402_6. 3V6K~D
R870
R870 100K_0402_5%~D
100K_0402_5%~D
1 2
R877 10K_0402_5%~DR877 10K_0402_5%~D
C740
C740 1U_0402_6. 3V6K~D
1U_0402_6. 3V6K~D
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
@
1U_0402_6. 3V6K~D
1U_0402_6. 3V6K~D
1 2
C733
@C733
@
1U_0402_6. 3V6K~D
1U_0402_6. 3V6K~D
1 2
@C738
@
1 2
R835 10K_0402_5%~DR835 10K_0402_5%~D
R1590 100K_0402_5%~DR1590 100K_0402_5%~D
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D
R762 10K_0402_5%~DR762 10K_0402_5%~D
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D
R1166 100K_0402_5%~DR1166 100K_0402_5%~D
R1167 100K_0402_5%~DR1167 100K_0402_5%~D
R1184 100K_0402_5%~DR1184 100K_0402_5%~D
R1118 100K_0402_5%~DR1118 100K_0402_5%~D
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D
R764 10K_0402_5%~DR764 10K_0402_5%~D
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D
12
1 2
R869 10K_0402_5%~DR869 10K_0402_5%~D
1 2
R873 100K_0402_5%~DR873 100K_0402_5%~D
R874 2.7K_0402_5%~DR874 2.7K_0402_5%~D
R876 100K_0402_5%~DR876 100K_0402_5%~D
R878 100K_0402_5%~DR878 100K_0402_5%~D
R880 100K_0402_5%~DR880 100K_0402_5%~D
R881 100K_0402_5%~DR881 100K_0402_5%~D
R882 100K_0402_5%~DR882 100K_0402_5%~D
R883 10K_0402_5%~DR883 10K_0402_5%~D
R843 8.2K_0402_5%~D@R843 8.2K_0402_5%~D@
R889 100K_0402_5%~DR889 100K_0402_5%~D
C721
DOCK_PWR_BTN# 40DOCK_PWR_SW#22
C738 1U_0402_6. 3V6K~D
1U_0402_6. 3V6K~D
LAT_ON_SW_BTN# 31
+3.3V_ALW_PCH
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
+3.3V_RUN
12
12
+RTC_CELL
12
12
12
12
12
12
12
12
12
+3.3V_ALW
+5V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EMC5055
EMC5055
EMC5055
LA-6592P
LA-6592P
LA-6592P
42 75Thursday, January 13, 2011
42 75Thursday, January 13, 2011
42 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
+3.3V_TP
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
12
R903
R903
D D
C C
DAT_TP_SIO4 2
CLK_TP_SIO42
10P_0402_50V8J~D
10P_0402_50V8J~D
C752
C752
1
2
Touch Pad
R902
R902
L54 BLM18AG601SN1D_0603~DL54 BLM18AG601SN1D_0603~D
L55 BLM18AG601SN1D_0603~DL55 BLM18AG601SN1D_0603~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C751
C751
2
12
12
+3.3V_TP
1
2
10P_0402_50V8J~D
10P_0402_50V8J~D
C750
C750
C755
C755
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
Touch Pad Conn. Pitch=0.5mm
TP_DATA
TP_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
1
1
C749
C749
2
2
TP_CLK TP_DATA
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
2 1
+3.3V_TP
+3.3V_ALW +3.3V_RUN +3.3V_TP
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
@D36
@
@D37
@
D36
D37
2 1
Pin reverse for PT
TP_CLK TP_DATA
PS2_DAT_TS PS2_CLK_TS
@R1161
@
0_0603_5%
0_0603_5%
1 2
R1162
@R1162
@
0_0603_5%~D
0_0603_5%~D
1 2
R1161
1 2 3 4 5 6 7 8
JTP1
JTP1
1 2 3 4 5
9
6
G1
10
7
G2
8
TYCO_2041070-8
TYCO_2041070-8
CONN@
CONN@
Place close to JTP1
Change KB connector to same as JSC1
BlueTooth
+3.3V_RUN
+3.3V_ALW
BT_DET#17
COEX1_BT_ACTIVE36
BT_COEX_STATUS23 3
BT_PRI_STATUS33
BT_ACTIVE45
BT_RADIO_DIS#41
COEX2_WLAN_ACTIVE36
USBP11-17 USBP11+17
+3.3V_BT
R904
R904
+3.3V_BT
100P_0402_50V8J~D
100P_0402_50V8J~D
@C754
@
C754
1
2
BT_COEX_STATUS2
BT_PRI_STATUS
R1129
@R1129
@
0_0603_5%
0_0603_5%
1 2
1 2
R1130 0_0603_5%~D@R1130 0_0603_5%~D@
BT_COEX_STATUS2 BT_PRI_STATUS
10K_0402_5%~D
10K_0402_5%~D
33P_0402_50V8J~D
33P_0402_50V8J~D
12
C753
C753
1
2
1 2
R1133 1K_0402_5%~D@R1133 1K_0402_5%~D@
1 2
R1134 1K_0402_5%~D@R1134 1K_0402_5%~D@
Power Switch for debug
1 2
C748
C748
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CONN@
CONN@
JBT1
JBT1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
G1
14
G2
E&T_3703-E12N-03R
E&T_3703-E12N-03R
KB Conn. Pitch=1.0mm
2
JKB1
+5V_RUN+3.3V_ALW
1
C756
C756
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
B B
A A
Place close to JKB1
1
C758
C758
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
KB_DET#18
+3.3V_ALW +5V_RUN
BC_INT#_ECE111742
BC_DAT_ECE111742
BC_CLK_ECE111742
KB_DET# PS2_CLK_TS PS2_DAT_TS
LVDS cable@
LVDS cable@
Part Number Description
Part Number Description
DC020003Y0L
DC020003Y0L
RTC BATT@
RTC BATT@
Part Number Description
Part Number Description
GC20323MX00
GC20323MX00
FAN@
FAN@
Part Number Description
Part Number Description
DC28A000800
DC28A000800
Speak@
Speak@
Part Number Description
Part Number Description
PK230003Q0L
PK230003Q0L
H-CONN SET ZJX MB-LCD
H-CONN SET ZJX MB-LCD 14 WXGA+(-1ch)
14 WXGA+(-1ch)
BATT CR2032 3V
BATT CR2032 3V 220MAH MAXELL
220MAH MAXELL
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
SPK PACK ZJX 2.0W 4 OHM FG
SPK PACK ZJX 2.0W 4 OHM FG
JKB1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
FCI_10089709-010010LF~D
FCI_10089709-010010LF~D
CONN@
CONN@
@LED Board FFC
@LED Board FFC
Part Number
Part Number
NBX0000RP0L
NBX0000RP0L
@MEDIA Board FFC
@MEDIA Board FFC
Part Number
Part Number
NBX0000RS0L FFC 12P G P.5 PAD.3 75MM MB-VOLUME/B 0FD
NBX0000RS0L FFC 12P G P.5 PAD.3 75MM MB-VOLUME/B 0FD
LVDS cable@
LVDS cable@
Part Number Description
Part Number Description
DC02C00180L H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL
DC02C00180L H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL
SG DC_IN wire cable@
SG DC_IN wire cable@
Part Number Description
Part Number Description
DC30100BO0L
DC30100BO0L
Battery bridge cable@
Battery bridge cable@
Part Number Description
Part Number Description
DC020014Z10
DC020014Z10
POWER_SW#_M B31,42
C759
@C759
@
100P_0402_50V8J~D
100P_0402_50V8J~D
Description
Description
FFC 6P H P1 PAD=0.7 87.4MM MB-LED/B 0FD
FFC 6P H P1 PAD=0.7 87.4MM MB-LED/B 0FD
Description
Description
CONN SET 0FE DCJACK-MB WDMD-DCE30002-DF
CONN SET 0FE DCJACK-MB WDMD-DCE30002-DF
H-CONN SET 0FD M/B-BATTERY 9PIN
H-CONN SET 0FD M/B-BATTERY 9PIN
112
1
PWRSW1
@PW RSW1
@
2
@SHORT PADS~D
@SHORT PADS~D
Place on Bottom
MDC wire set cable@
MDC wire set cable@
Part Number Description
Part Number Description
DC30100BL0L CONN SET 0FD
DC30100BL0L CONN SET 0FD
Part Number Description
Part Number Description
@KB FFC
@KB FFC
Part Number Description
Part Number Description
@BT wire cable
@BT wire cable
Part Number Description
Part Number Description
T/P FFC@
T/P FFC@
NBX0000RR0L
NBX0000RR0L
SP070007V0L
SP070007V0L
DC020014Y0L
DC020014Y0L
MDC-RJ11
MDC-RJ11
FFC 8P F P0.5
FFC 8P F P0.5 PAD=0.3 136MM
PAD=0.3 136MM MB-TP/B 0FD
MB-TP/B 0FD
S SOCKET TYCO 1770551-1
S SOCKET TYCO 1770551-1 10P H5.9 SMART
10P H5.9 SMART
H-CONN SET 0FD MB-BT
H-CONN SET 0FD MB-BT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Touch PAD/Int KB/BT
Touch PAD/Int KB/BT
Touch PAD/Int KB/BT
LA-6592P
LA-6592P
LA-6592P
43 75Thursday, January 13, 2011
43 75Thursday, January 13, 2011
43 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
+3.3V_ALW_PCH Source
+3.3V_ALW2
12
R907
@R907
@
100K_0402_5%~D
100K_0402_5%~D
ALW_ON_3.3V#
61
ALW_ENABLE20
D D
Q51A
@Q51A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_ALW_ON42
@
2
+15V_ALW
12
R905
@R905
@
100K_0402_5%~D
100K_0402_5%~D
ALW_ENABLE
3
Q51B
@Q51B
@
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
5
4
4
+3.3V_ALW +3.3V_ALW_ PCH
Q49
@
Q49
@
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
3
1
C762
@C762
@
3300P_0402_50V7K~D
3300P_0402_50V7K~D
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
20K_0402_5%~D
20K_0402_5%~D
12
@R908
1
2
@
C760
C760
R908
PJP57
PJP57
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+3.3V_ALW
3
DC/DC Interface
RUN_ON_ENABLE#42
Q52A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q52A
RUN_ON11,37,41,55,63
2
2
12
R909
R909 100K_0402_5%~D
100K_0402_5%~D
RUN_ON_ENABLE#
61
+15V_ALW+3.3V_ALW2 +5V_ALW
12
R906
R906 100K_0402_5%~D
100K_0402_5%~D
5V_RUN_ENABLE
3
Q52B
Q52B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
5
4
+5V_RUN Source
Q50
Q50
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8 7
5
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C763
C763
2
1
+5V_RUN 1 2
10U_0805_10V4Z~D
10U_0805_10V4Z~D
36
12
1
R910
R910
C761
C761
20K_0402_5%~D
20K_0402_5%~D
2
+3.3V_SUS Source
+3.3V_ALW2
12
R915
R915 100K_0402_5%~D
100K_0402_5%~D
Q53A
Q53A
2
SUS_ON_3.3V#
61
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SUS_ON42
+15V_ALW
12
R911
R911 100K_0402_5%~D
100K_0402_5%~D
3
Q53B
Q53B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
5
4
+3.3V_ALW
SUS_ENABLE
Q54
Q54
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
1
3
2
1
C767
C767 4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
C765
C765
+3.3V_SUS
12
R914
R914 20K_0402_5%~D
20K_0402_5%~D
+15V_ALW
2
G
G
12
13
D
D
S
S
R912
R912 100K_0402_5%~D
100K_0402_5%~D
3.3V_RUN_ENABLE
Q56
Q56 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_RUN Source
Q55
Q55
NTMS4920NR2G_SO8~D
NTMS4920NR2G_SO8~D
8 7
5
1 2 36
4
1
C766
C766 470P_0402_50V7K~D
470P_0402_50V7K~D
2
+3.3V_RUN+3.3V_ALW
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
12
1
R913
R913
C764
C764
20K_0402_5%~D
20K_0402_5%~D
2
Discharg Circuit
+1.5V_RUN Source
+1.5V_MEM
NTGS4141NT1G_TSOP6~D
NTGS4141NT1G_TSOP6~D
D
D
6
2 1
+1.05V_RUN Source
Q63
Q63
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8 7
5
4
1
2
Q59
Q59
S
S
45
G
G
3
1
C771
C771 4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1 2 36
2200P_0402_50V7K~D
2200P_0402_50V7K~D
C773
C773
1
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
1
2
+1.5V_RUN
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
C769
C769
+1.05V_RUN
12
C772
C772
12
R921
R921 20K_0402_5%~D
20K_0402_5%~D
R931
R931 20K_0402_5%~D
20K_0402_5%~D
2
G
G
+3.3V_M
12
R916
R916 39_0603_5%~D
39_0603_5%~D
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q60
Q60
S
S
+15V_ALW
2
G
G
12
13
D
D
S
S
R920
R920 100K_0402_5%~D
100K_0402_5%~D
1.5V_RUN_ENABLE
Q62
Q62 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_M Source
R918
R918 100K_0402_5%~D
100K_0402_5%~D
A_ON_3.3V#
5
+15V_ALW
12
R917
R917 100K_0402_5%~D
100K_0402_5%~D
A_ENABLE
3
Q57B
Q57B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
+3.3V_ALW2
12
61
Q57A
B B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
A_ON42,56
Q57A
2
+3.3V_ALW
Q58
Q58
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
1
3
2
1
C770
C770 4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+3.3V_M
C768
C768
12
R919
@R919
@
20K_0402_5%~D
20K_0402_5%~D
A_ON_3.3V#
Discharg Circuit
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH
12
R922
@R922
@
1K_0402_5%~D
1K_0402_5%~D
+3.3V_SUS_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
Q65
SUS_ON_3.3V#
A A
Q65
2
G
G
ALW_ON_3.3V#
S
S
12
R928
@R928
@
1K_0402_5%~D
1K_0402_5%~D
+3.3V_ALWPCH_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
RUN_ON_ENABLE#
Q66
2
Q66
G
G
S
S
12
R923
@R923
@
1K_0402_5%~D
1K_0402_5%~D
+5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
12
R924
@R924
@
1K_0402_5%~D
1K_0402_5%~D
+1.5V_RUN_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
@
Q67
Q67
2
@
13
D
D
Q68
Q68
G
G
S
S
2
G
G
12
R929
R929 39_0603_5%~D
39_0603_5%~D
+3.3V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q69
Q69
S
S
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ +1.05V_M
2
G
G
12
R925
@R925
@
39_0402_5%~D
39_0402_5%~D
+1.05V_RUN_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
Q70
Q70
S
S
RUN_ON_CPU1.5VS3#7,11
2
G
G
12
R926
R926 220_0402_5%~D
220_0402_5%~D
+1.5V_CPU_VDDQ_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q71
Q71
S
S
2
G
G
12
R927
R927 22_0603_5%~D
22_0603_5%~D
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q72
Q72
S
S
+15V_ALW
2
G
G
12
13
D
D
S
S
R930
R930 100K_0402_5%~D
100K_0402_5%~D
1.05V_RUN_ENABLE
Q64
Q64 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
POWER CONTROL
POWER CONTROL
POWER CONTROL
LA-6592P
LA-6592P
LA-6592P
44 75Thursday, January 13, 2011
44 75Thursday, January 13, 2011
44 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
+3.3V_ALW
12
R932
R932 10K_0402_5%~D
21
21
10K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
+3.3V_ALW
12
R937
R937 100K_0402_5%~D
100K_0402_5%~D
Q78A
Q78A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
Q74A
Q74A
2
2
Q74B
5
12
R950
R950 100K_0402_5%~D
100K_0402_5%~D
Q74B
3
4
5
3
Q78B
Q78B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
D59
D59
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
D62
D62
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
C C
B B
SATA_ACT#14
MASK_SATA_LED#41
LED_SATA_DIAG_OUT#41
WIRELESS_LED#36,41
BT_ACTIVE43
HDD LED solution for White LED
+5V_ALW
2
61
Q75
Q75 PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R934 4.7K_0402_5%~DR934 4.7K_0402_5%~D
WLAN LED solution for White LED
+5V_ALW
61
2
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R939 4.7K_0402_5%~DR939 4.7K_0402_5%~D
SATA_LED 31
WLAN_LED 31
BREATH_LED#40,42
BAT2_LED#42
BAT1_LED#42
47K_0402_5%~D
47K_0402_5%~D
R954
R954
47K_0402_5%~D
47K_0402_5%~D
47K_0402_5%~D
47K_0402_5%~D
+3.3V_ALW
12
12
R940
R940
+3.3V_ALW
12
R947
R947
C777
C777
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
1
5
P
NC
A2Y
G
U57
U57
NC7SZ04P5X-G_SC70-5~D
NC7SZ04P5X-G_SC70-5~D
3
+3.3V_ALW
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1 2
1
5
P
NC
A2Y
G
U54
U54
NC7SZ04P5X-G_SC70-5~D
NC7SZ04P5X-G_SC70-5~D
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1 2
C775
C775
1
5
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
P
NC
4
A2Y
G
U55
U55
NC7SZ04P5X-G_SC70-5~D
NC7SZ04P5X-G_SC70-5~D
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
BREATH_LED#_R
4
C774
C774
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
BAT2_LED
4
BAT1_LED
2
2
+5V_ALW
Q82A
Q82A
Q82B
Q82B
+3.3V_ALW
Q89A
Q89A
Q89B
Q89B
61
Q95A
Q95A
61
Q101A
Q101A
2
5
2
5
+5V_ALW
+5V_ALW
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
R938
R938 100K_0402_5%~D
100K_0402_5%~D
1 2
61
3
4
R945
R945 100K_0402_5%~D
100K_0402_5%~D
1 2
61
3
4
12
R953
R953 100K_0402_5%~D
100K_0402_5%~D
12
R956
R956 100K_0402_5%~D
100K_0402_5%~D
MASK_BASE_LEDS#
+5V_ALW
12
R942
R942 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
+3.3V_ALW
12
R948
R948 100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
Q83A
Q83A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
2
Q83B
Q83B
3
4
5
Q92A
Q92A
2
61
2
Q92B
Q92B
2
3
4
5
Q95B
Q95B
2
3
4
5
Q101B
Q101B
2
3
4
5
2
2
+3.3V_ALW
Q88
Q88 PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
+3.3V_ALW
Q93
Q93 PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
+5V_ALW
Q94
Q94 PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
+5V_ALW
Q96
Q96 PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R957 1K_0402_5%~DR957 1K_0402_5%~D
+5V_ALW
Q81
Q81
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R941 4.7K_0402_5%~DR941 4.7K_0402_5%~D
+5V_ALW
Q84
Q84 PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R946 150_0402_5%~DR946 150_0402_5%~D
1 2
R955 4.7K_0402_5%~DR955 4.7K_0402_5%~D
BREATH_WHITE_LED_SNIFF
Battery LED
BATT_WHITE 31
BATT_YELLOW 31
R949
R949
4.7K_0402_5%~D
4.7K_0402_5%~D
1 2
BATT_WHITE_LED 24
R951
R951 150_0402_5%~D
150_0402_5%~D
1 2
BATT_YELLOW_LED 24
LED1
LED1
LTW-C193TS5_WHITE~D
LTW-C193TS5_WHITE~D
Place LED1 close to SW1
BREATH_WHITE_LED 24
12
+3.3V_ALW
C778
C778
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 2
5
U58
Fiducial Mark
FD1
@FD1
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
A A
FD2
@FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
Mask All LEDs (Sniffer Function) Mask Base MB LEDs (Lid Closed) Do not Mask LEDs (Lid Opened)
H2
@H2
@
H1
@H1
@
H_3P2
H_3P2
5
H3
@ H3
@
H_3P2
H_3P2
H_3P0
H_3P0
1
1
LED Circuit Control Table
@H6
@
H5
@ H5
@
H4
@H4
@
H_3P2
H_3P2
1
H_3P0
H_3P0
H_3P0
H_3P0
1
1
SYS_LED_MASK# LID_CL#
0 1 0
H11
@H11
H6
@H7
@
H_3P0
H_3P0
1
@H9
@
H8
@ H8
@
H7
H_3P0
H_3P0
H_3P2
H_3P2
1
1
@
H9
H10
@ H10
@
H_3P7
H_3P7
H_3P2
H_3P2
1
1
4
X
11
H15
@ H15
H12
@H12
@
@ H13
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
@
H13
H14
@H14
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
H17
@H17
@
H16
@H16
@
H_2P2
H_2P2
H_3P0
H_3P0
1
1
1
H19
@H19
@
H_3P0x2P0
H_3P0x2P0
1
SYS_LED_MASK#41
LID_CL#31,41
H20
@ H20
@
H_2P0N
H_2P0N
1
SYS_LED_MASK#
LID_CL#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
1
B
2
A
U58
P
MASK_BASE_LEDS#
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
EMI CLIP
CLIP1
CLIP1 EMI_CLIP
EMI_CLIP
1
GND
CLIP2
CLIP2 EMI_CLIP
EMI_CLIP
1
GND
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PAD and Standoff
PAD and Standoff
PAD and Standoff
LA-6592P
LA-6592P
LA-6592P
1
45 75Thursday, January 13, 2011
45 75Thursday, January 13, 2011
45 75Thursday, January 13, 2011
1.0
1.0
1.0
5
PEG_CTX_GRX_P[0..15]6
PEG_CTX_GRX_N[0..15]6
PEG_CRX_GTX_P[0..15]6
D D
PEG_CRX_GTX_P0 PEG_CRX_GTX_N0
PEG_CRX_GTX_P1 PEG_CRX_GTX_N1
PEG_CRX_GTX_P2 PEG_CRX_GTX_N2
PEG_CRX_GTX_P3 PEG_CRX_GTX_N3
PEG_CRX_GTX_P4 PEG_CRX_GTX_N4
PEG_CRX_GTX_P5 PEG_CRX_GTX_N5
PEG_CRX_GTX_P6 PEG_CRX_GTX_N6
PEG_CRX_GTX_P7 PEG_CRX_GTX_N7
PEG_CRX_GTX_P8 PEG_CRX_GTX_N8
C C
PEG_CRX_GTX_P9 PEG_CRX_GTX_N9
PEG_CRX_GTX_P10 PEG_CRX_GTX_N10
PEG_CRX_GTX_P11 PEG_CRX_GTX_N11
PEG_CRX_GTX_P12 PEG_CRX_GTX_N12
PEG_CRX_GTX_P13 PEG_CRX_GTX_N13
PEG_CRX_GTX_P14 PEG_CRX_GTX_N14
PEG_CRX_GTX_P15 PEG_CRX_GTX_N15
PEG_CRX_GTX_N[0..15]6
CV1 0.22U_0402_16V7K~DCV1 0.22U_0402_16V7K~D
12
CV2 0.22U_0402_16V7K~DCV2 0.22U_0402_16V7K~D
12
CV4 0.22U_0402 _16V7K~DCV4 0.22U_0402_16V7K~D
12
CV3 0.22U_0402_16V7K~DCV3 0.22U_0402_16V7K~D
12
CV5 0.22U_0402 _16V7K~DCV5 0.22U_0402_16V7K~D
12
CV6 0.22U_0402_16V7K~DCV6 0.22U_0402_16V7K~D
12
CV7 0.22U_0402 _16V7K~DCV7 0.22U_0402_16V7K~D
12
CV8 0.22U_0402_16V7K~DCV8 0.22U_0402_16V7K~D
12
CV9 0.22U_0402 _16V7K~DCV9 0.22U_0402_16V7K~D
12
CV10 0.22U_0402_16V7K ~DCV 10 0.22U_0402_16V7K~D
12
CV11 0.22U_0402_16V7K~DCV11 0.22U_0402_16V7K~D
12
CV12 0.22U_0402_16V7K ~DCV 12 0.22U_0402_16V7K~D
12
CV14 0.22U_0402_16V7K~DCV14 0.22U_0402_16V7K~D
12
CV15 0.22U_0402_16V7K ~DCV 15 0.22U_0402_16V7K~D
12
CV16 0.22U_0402_16V7K~DCV16 0.22U_0402_16V7K~D
12
CV17 0.22U_0402_16V7K ~DCV 17 0.22U_0402_16V7K~D
12
CV18 0.22U_0402_16V7K~DCV18 0.22U_0402_16V7K~D
12
CV19 0.22U_0402_16V7K ~DCV 19 0.22U_0402_16V7K~D
12
CV20 0.22U_0402_16V7K~DCV20 0.22U_0402_16V7K~D
12
CV21 0.22U_0402_16V7K ~DCV 21 0.22U_0402_16V7K~D
12
CV22 0.22U_0402_16V7K~DCV22 0.22U_0402_16V7K~D
12
CV23 0.22U_0402_16V7K ~DCV 23 0.22U_0402_16V7K~D
12
CV24 0.22U_0402_16V7K~DCV24 0.22U_0402_16V7K~D
12
CV25 0.22U_0402_16V7K ~DCV 25 0.22U_0402_16V7K~D
12
CV26 0.22U_0402_16V7K~DCV26 0.22U_0402_16V7K~D
12
CV27 0.22U_0402_16V7K ~DCV 27 0.22U_0402_16V7K~D
12
CV28 0.22U_0402_16V7K~DCV28 0.22U_0402_16V7K~D
12
CV29 0.22U_0402_16V7K ~DCV 29 0.22U_0402_16V7K~D
12
CV30 0.22U_0402_16V7K~DCV30 0.22U_0402_16V7K~D
12
CV31 0.22U_0402_16V7K ~DCV 31 0.22U_0402_16V7K~D
12
CV32 0.22U_0402_16V7K~DCV32 0.22U_0402_16V7K~D
12
CV33 0.22U_0402_16V7K ~DCV 33 0.22U_0402_16V7K~D
12
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_N[0..15]
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P10 PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_N15
Differential signal
B B
+3.3V_RUN
RV22
RV22
12
1
2
12
RV33
@RV33
@
100K_0402_5%~D
100K_0402_5%~D
DGPU_HOLD_RST#18
PLTRST_GPU#17
A A
100K_0402_5%~D
100K_0402_5%~D
5
DGPU_PEX_RST
+3.3V_RUN_GFX
+3.3V_RUN_GFX
+3.3V_RUN
5
P
B
4
O
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
UV14
UV14
21
DV1
@DV1
@
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
4
CLK_PCIE_VGA15 CLK_PCIE_VGA#15
1 2
RV13 200_0402_1%~D@ RV13 200_0402_1%~D@
don't connect to PCH
12
RV29
RV29
2.2K_0402_5%~D
2.2K_0402_5%~D
DGPU_PEX_RST
4
12
RV15 2.49K_0402_1%~DRV15 2.49K_0402_1%~D
1 2
RV18 0_0402_5%~D@R V18 0_0402_5%~D@
1 2
RV21 10K_0402_5%~DRV21 10K_0402_5%~D
PEG_CTX_GRX_P0 PEG_CTX_GRX_N0 PEG_CTX_GRX_P1 PEG_CTX_GRX_N1 PEG_CTX_GRX_P2 PEG_CTX_GRX_N2 PEG_CTX_GRX_P3 PEG_CTX_GRX_N3 PEG_CTX_GRX_P4 PEG_CTX_GRX_N4 PEG_CTX_GRX_P5 PEG_CTX_GRX_N5 PEG_CTX_GRX_P6 PEG_CTX_GRX_N6 PEG_CTX_GRX_P7 PEG_CTX_GRX_N7 PEG_CTX_GRX_P8 PEG_CTX_GRX_N8 PEG_CTX_GRX_P9 PEG_CTX_GRX_N9 PEG_CTX_GRX_P10 PEG_CTX_GRX_N10 PEG_CTX_GRX_P11 PEG_CTX_GRX_N11 PEG_CTX_GRX_P12 PEG_CTX_GRX_N12 PEG_CTX_GRX_P13 PEG_CTX_GRX_N13 PEG_CTX_GRX_P14 PEG_CTX_GRX_N14 PEG_CTX_GRX_P15 PEG_CTX_GRX_N15
PEG_CRX_GTX_C_P0 PEG_CRX_GTX_C_N0 PEG_CRX_GTX_C_P1 PEG_CRX_GTX_C_N1 PEG_CRX_GTX_C_P2 PEG_CRX_GTX_C_N2 PEG_CRX_GTX_C_P3 PEG_CRX_GTX_C_N3 PEG_CRX_GTX_C_P4 PEG_CRX_GTX_C_N4 PEG_CRX_GTX_C_P5 PEG_CRX_GTX_C_N5 PEG_CRX_GTX_C_P6 PEG_CRX_GTX_C_N6 PEG_CRX_GTX_C_P7 PEG_CRX_GTX_C_N7 PEG_CRX_GTX_C_P8 PEG_CRX_GTX_C_N8 PEG_CRX_GTX_C_P9 PEG_CRX_GTX_C_N9 PEG_CRX_GTX_C_P10 PEG_CRX_GTX_C_N10 PEG_CRX_GTX_C_P11 PEG_CRX_GTX_C_N11 PEG_CRX_GTX_C_P12 PEG_CRX_GTX_C_N12 PEG_CRX_GTX_C_P13 PEG_CRX_GTX_C_N13 PEG_CRX_GTX_C_P14 PEG_CRX_GTX_C_N14 PEG_CRX_GTX_C_P15 PEG_CRX_GTX_C_N15
PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
DGPU_PEX_RST_R
CLK_REQ#
UV1A
UV1A
AE12
PEX_RX0
AF12
PEX_RX0_N
AG12
PEX_RX1
AG13
PEX_RX1_N
AF13
PEX_RX2
AE13
PEX_RX2_N
AE15
PEX_RX3
AF15
PEX_RX3_N
AG15
PEX_RX4
AG16
PEX_RX4_N
AF16
PEX_RX5
AE16
PEX_RX5_N
AE18
PEX_RX6
AF18
PEX_RX6_N
AG18
PEX_RX7
AG19
PEX_RX7_N
AF19
PEX_RX8
AE19
PEX_RX8_N
AE21
PEX_RX9
AF21
PEX_RX9_N
AG21
PEX_RX10
AG22
PEX_RX10_N
AF22
PEX_RX11
AE22
PEX_RX11_N
AE24
PEX_RX12
AF24
PEX_RX12_N
AG24
PEX_RX13
AF25
PEX_RX13_N
AG25
PEX_RX14
AG26
PEX_RX14_N
AF27
PEX_RX15
AE27
PEX_RX15_N
AD10
PEX_TX0
AD11
PEX_TX0_N
AD12
PEX_TX1
AC12
PEX_TX1_N
AB11
PEX_TX2
AB12
PEX_TX2_N
AD13
PEX_TX3
AD14
PEX_TX3_N
AD15
PEX_TX4
AC15
PEX_TX4_N
AB14
PEX_TX5
AB15
PEX_TX5_N
AC16
PEX_TX6
AD16
PEX_TX6_N
AD17
PEX_TX7
AD18
PEX_TX7_N
AC18
PEX_TX8
AB18
PEX_TX8_N
AB19
PEX_TX9
AB20
PEX_TX9_N
AD19
PEX_TX10
AD20
PEX_TX10_N
AD21
PEX_TX11
AC21
PEX_TX11_N
AB21
PEX_TX12
AB22
PEX_TX12_N
AC22
PEX_TX13
AD22
PEX_TX13_N
AD23
PEX_TX14
AD24
PEX_TX14_N
AE25
PEX_TX15
AE26
PEX_TX15_N
AB10
PEX_REFCLK
AC10
PEX_REFCLK_N
AF10
PEX_TSTCLK_OUT
AE10
PEX_TSTCLK_OUT_N
AG10
PEX_TERMP
AD9
PEX_RST_N
AE9
PEX_CLKREQ_N
N12P-NS-S-A1_BGA533~D
N12P-NS-S-A1_BGA533~D
3
Part 1 of 5
Part 1 of 5
GPIO
GPIO
DACA_HSYNC
DACA_VSYNC
DACA_GREEN
DACB_HSYNC
DACB_VSYNC
DACB_GREEN
PCI EXPRESS
PCI EXPRESS
JTAG_TRST_N
TEST
TEST
I2C DACADACB
I2C DACADACB
XTAL_OUTBUFF
CLK
CLK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19
DACA_RED
DACA_BLUE
DACA_VREF DACA_RSET
DACB_RED
DACB_BLUE
DACB_VREF DACB_RSET
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
TESTMODE
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
GPIO20 GPIO21
I2CS_SCL
I2CS_SDA
XTAL_SSIN
XTAL_OUT
XTAL_IN
N1
DPC_GPU_HPD
G1
BIA_PWM_GPU
C1
ENVDD_GPU
M2
PANEL_BKEN_DGPU
M3
GPU_VID_0
K3
GPU_VID_1
K2 J2
THERMTRIP_VGA#
C2
GPU_GPIO9
M1 D2 D1
GPU_CLKDWN_R
J3 J1 K1
DPE_GPU_HPD
F3
GPU_DEEP_CLKDWN _R
G3 G2
DGPU_DI_INT#_R
F1 F2
DPD_GPU_HPD GPU_CRT_HSYNC
AD2
GPU_CRT_VSYNC
AD1
GPU_CRT_RED
AE2
GPU_CRT_BLU
AD3
GPU_CRT_GRN
AE3
DACA_VREF
AF1
DACA_RSET
AE1
U6 U4
T5 R4 T4
R6 V6
GPU_JTAG_TCK
AF3
GPU_JTAG_TDI
AG4
GPU_JTAG_TDO
AE4
GPU_JTAG_TMS
AF4
GPU_JTAG_TRST#
AG3
GPU_TESTMODE
AD25
GPU_CRT_CLK_DDC_R
R1
GPU_CRT_DAT_DDC_R
T3
I2CB_SCL
R2
I2CB_SDA
R3
LDDC_CLK_GPU
A2
LDDC_DATA_GPU
B1
I2CH_SCL
A3
I2CH_SDA
A4
GPU_SMBCLK
T1
GPU_SMBDAT
T2
XTALSSIN
D11
XTALOUTBUFF
E9
E10
CLK_27M_IN
D10
YV1 27MHZ_10PF_X3S027000B A1H-U~D
YV1 27MHZ_10PF_X3S027000B A1H-U~D
CLK_27M_IN
CV34
CV34
22P_0402_50V8J~D
22P_0402_50V8J~D
1 2
G1
1
2
G1
DPC_GPU_HPD 40 BIA_PWM_GPU 24 ENVDD_GPU 24 PANEL_BKEN_DGPU 24 GPU_VID_0 63 GPU_VID_1 63
THERMTRIP_VGA# 22
1 2
RV20 0_0402_5%~D@R V20 0_040 2_5%~D@
1 2
RV25 0_0402_5%~D@R V25 0_040 2_5%~D@
1 2
RV26 0_0402_5%~D@R V26 0_040 2_5%~D@
DPD_GPU_HPD 40
GPU_CRT_HSYNC 25 GPU_CRT_VSYNC 25
GPU_CRT_RED 25 GPU_CRT_BLU 25 GPU_CRT_GRN 25
CV13 0.1U_0402_10V7K~DCV13 0.1U_0402_10V7K~D
1 2
1 2
RV6 124_0402_1%~DR V6 12 4_0402_1%~D
TV1@TV1@ TV2@TV2@ TV3@TV3@ TV4@TV4@
RV9 1K_0402_1%~DRV9 1K_0402_1%~D
1 2
RV10 33_0402_5%~DRV10 33_0402_5%~D
1 2
RV11 33_0402_5%~DRV11 33_0402_5%~D
LDDC_CLK_GPU 23
LDDC_DATA_GPU 23
GPU_SMBCLK 42
GPU_SMBDAT 42
1 2
RV12 10K_0402_5%~DRV12 10K_0402_5%~D
1 2
RV16 10K_0402_5%~DRV16 10K_0402_5%~D
1 2
RV19 0_0402_5%~D@RV19 0_0402_5%~D@
3 4
G2
G2
1
CV35
CV35
2
22P_0402_50V8J~D
22P_0402_50V8J~D
NV_CLK_27M_OUT
NV_CLK_27M_OUT
2
1 2
FERMI Changed
2
GPU_CLKDWN 41
DPE_GPU_HPD 26 GPU_DEEP_CLKDWN 41
DGPU_DI_INT# 4 1
GPU_CRT_CLK_DDC 25
GPU_CRT_DAT_DDC 25
+3.3V_RUN_GFX
DPC_GPU_HPD
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
DPD_GPU_HPD
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
DPE_GPU_HPD
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
ENVDD_GPU
GPU_CRT_RED
GPU_CRT_GRN
GPU_CRT_BLU
1 2
RV23 4.7K_0402_5%~D@ RV23 4.7K_0402_5%~D@
1 2
RV24 4.7K_0402_5%~D@ RV24 4.7K_0402_5%~D@
1 2
RV100 10K_0402_5%~D@RV100 10K_0402_5%~D@
1 2
RV101 10K_0402_5%~D@RV101 10K_0402_5%~D@
RV27 2.2K_0402_5%~DR V27 2.2K_0402_5%~D
RV28 2.2K_0402_5%~DR V28 2.2K_0402_5%~D
1 2
RV102 10K_0402_5%~DRV102 10K_0402_5%~D
1 2
RV103 10K_0402_5%~DRV103 10K_0402_5%~D
1 2
RV104 10K_0402_5%~DRV104 10K_0402_5%~D
GPU_CRT_CLK_DDC
GPU_CRT_DAT_DDC
I2CH_SCL
I2CH_SDA
I2CB_SCL
12
I2CB_SDA
12
GPU_GPIO9
THERMTRIP_VGA#
GPU_CLKDWN_R
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
DV2
DV2
2 1
DV3
DV3
2 1
DV4
DV4
2 1
1 2
RV1 100K_0402_5%~DRV1 100K_0402_5%~D
Close to GPU
1 2
RV3 150_0402_1%~DRV3 150_0402_1%~D
1 2
RV4 150_0402_1%~DRV4 150_0402_1%~D
1 2
RV5 150_0402_1%~DRV5 150_0402_1%~D
+3.3V_RUN_GFX
12
RV7
@ RV7
@
10K_0402_5%~D
10K_0402_5%~D
GPU_TESTMODE
12
RV8
RV8 10K_0402_5%~D
10K_0402_5%~D
FERMI Changed
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
N12P PCIE,I2C,DAC,GPIO
N12P PCIE,I2C,DAC,GPIO
N12P PCIE,I2C,DAC,GPIO
LA-6592P
LA-6592P
LA-6592P
1
DP_HDMI_HPD 4 1
46 75Thursday, January 13, 2011
46 75Thursday, January 13, 2011
46 75Thursday, January 13, 2011
1.0
1.0
1.0
5
LCD_ACLK+_GPU23 LCD_ACLK-_GPU23 LCD_A0+_GPU23 LCD_A0-_GPU23 LCD_A1+_GPU23 LCD_A1-_GPU23 LCD_A2+_GPU23
D D
TO DOCKING
C C
TO DOCKING
TO MB HDMI
+3.3V_RUN_GFX
Decive ID change to 0x1056
LCD_A2-_GPU23
LCD_BCLK+_GPU23 LCD_BCLK-_GPU23 LCD_B0+_GPU23 LCD_B0-_GPU23 LCD_B1+_GPU23 LCD_B1-_GPU23 LCD_B2+_GPU23 LCD_B2-_GPU23
DPC_GPU_AUX/DDC27
DPC_GPU_AUX#/DDC27 DPC_GPU_LANE_P040 DPC_GPU_LANE_N040 DPC_GPU_LANE_P140 DPC_GPU_LANE_N140 DPC_GPU_LANE_P240 DPC_GPU_LANE_N240 DPC_GPU_LANE_P340 DPC_GPU_LANE_N340
DPD_GPU_AUX/DDC27
DPD_GPU_AUX#/DDC27 DPD_GPU_LANE_P040 DPD_GPU_LANE_N040 DPD_GPU_LANE_P140 DPD_GPU_LANE_N140 DPD_GPU_LANE_P240 DPD_GPU_LANE_N240 DPD_GPU_LANE_P340 DPD_GPU_LANE_N340
TMDS_E_GPU_DDC26
TMDS_E_GPU_DDC#26 TMDSE_GPU_P226 TMDSE_GPU_N226 TMDSE_GPU_P126 TMDSE_GPU_N126 TMDSE_GPU_P026 TMDSE_GPU_N026 TMDSE_GPU_CLK26 TMDSE_GPU_CLK#26
DPC_GPU_AUX/DDC DPC_GPU_AUX#/DDC
DPD_GPU_AUX/DDC DPD_GPU_AUX#/DDC
TMDS_E_GPU_DDC TMDS_E_GPU_DDC#
AC4 AD4
AA5 AA4
AB4 AB5
AB3 AB2
AA2 AA3 AB1 AA1
V5 V4
W4
Y4
W1
V1 W3 W2
G4 G5
P4
N4
M5 M4
L4
K4
H4
J4
D3
D4
F5
F4
E4
D5
C3
C4
B3
B4
F7
G6
D6
C6
A6
A7
B6
B7
E6
E7
4
UV1C
UV1C
IFPA_TXC IFPA_TXC_N IFPA_TXD0 IFPA_TXD0_N IFPA_TXD1 IFPA_TXD1_N IFPA_TXD2 IFPA_TXD2_N IFPA_TXD3 IFPA_TXD3_N
IFPB_TXC IFPB_TXC_N IFPB_TXD4 IFPB_TXD4_N IFPB_TXD5 IFPB_TXD5_N IFPB_TXD6 IFPB_TXD6_N IFPB_TXD7 IFPB_TXD7_N
IFPC_AUX_I2CW_SCL IFPC_AUX_I2CW_SDA_N IFPC_L0 IFPC_L0_N IFPC_L1 IFPC_L1_N IFPC_L2 IFPC_L2_N IFPC_L3 IFPC_L3_N
IFPD_AUX_I2CX_SCL IFPD_AUX_I2CX_SDA_N IFPD_L0 IFPD_L0_N IFPD_L1 IFPD_L1_N IFPD_L2 IFPD_L2_N IFPD_L3 IFPD_L3_N
IFPE_AUX_I2CY_SCL IFPE_AUX_I2CY_SDA_N IFPE_L0 IFPE_L0_N IFPE_L1 IFPE_L1_N IFPE_L2 IFPE_L2_N IFPE_L3 IFPE_L3_N
N12P-NS-S-A1_BGA533~D
N12P-NS-S-A1_BGA533~D
Part 3 of 5
Part 3 of 5
PGOOD
NCDBG
NCDBG
MULTI_STRAP_REF2_GND
DBG_DATA1 DBG_DATA2 DBG_DATA3 DBG_DATA4
STRAP0
STRAP1
STRAP2
BUFRST_N
LVDS / TMDS
LVDS / TMDS
THERMDN
THERMDP
STRAP4
GENERAL STRAPSERIAL
GENERAL STRAPSERIAL
STRAP3
ROM_CS_N
ROM_SCLK
ROM_SI
ROM_SO
IFPAB_RSET
IFPC_RSET
IFPD_RSET
IFPE_RSET
NC
PGOOD
J5
GB1B-64 : PGOOD
C15
NC
D15
GB1B-64 : MULTI_STRAP_REF2_GND
MULTI_STRAP_REF2_GND
T6 W6 Y6 AA6 N3
STRAP0
C7
STRAP1
B9
STRAP2
A9
N5
D8
D9
N2
F9
B10
C9
A10
C10
AB6
R5
M6
F8
1
CV37
@CV37
@
100P_0402_50V8J~D
100P_0402_50V8J~D
2
STRAP4
STRAP3
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU
1 2
RV32 1K_0402 _1%~D@ RV32 1K_0402_1%~D@
1 2
RV45 1K_0402 _1%~DRV45 1K_0402_1%~D
1 2
RV47 1K_0402 _1%~DRV47 1K_0402_1%~D
1 2
RV48 1K_0402_1%~DRV48 1K_0402_1%~D
3
1 2
RV61 10K_0402_5%~DRV61 10K_0402_5%~D
1 2
RV62 40.2K_0402_1%~DRV62 40.2K_0402_1%~D
VGA_THERMDN 22
VGA_THERMDP 22
Fermi changed
2
UV1E
UV1E
B2 B5 B8
B11 B14 B17 B20 B23 B26
E2 E5 E8
E11 E17 E20 E23 E26
H2 H5
J11 J14 J17
K9
K19
L2 L5
L11 L12 L13 L14 L15 L16
L17 M12 M13 M14 M15 M16
P2 P5
P9 P19 P23 P26 T12 T13
W16
E14
N12P-NS-S-A1_BGA533~D
N12P-NS-S-A1_BGA533~D
GPU_GND_SENSE63
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GND_SENSE
GND_SENSE
Part 5 of 5
Part 5 of 5
FB_CAL_TERM_GND
MULTI_STRAP_REF0_GND
MULTI_STRAP_REF1_GND
GND
GND
FB_CAL_PU_GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
U2 U5 U11 U12 U13 U14 U15 U16 U17 U23 U26 V9 V19 W11 W14 W17 Y2 Y5 Y23 Y26 AC2 AC5 AC6 AC8 AC11 AC14 AC17 AC20 AC23 AC26 AF2 AF5 AF8 AF11 AF14 AF17 AF20 AF23 AF26 T16 T15 T14 F6
1 2
A15
RV42 40.2_0402_1%~DRV42 40.2_0402_1%~D
B16
1 2
RV43 60.4_0402_1%~DRV43 60.4_0402_1%~D
1 2
F11
RV44 40.2K_0402_1%~DRV44 40.2K_0402 _1%~D
F10
1 2
RV46 40.2K_0402_1%~DRV46 40.2K_0402 _1%~D
1
set to multi-level straps
RV54
RV54
RV49
RV49
B B
45.3K_0402_1%~D
45.3K_0402_1%~D
RV55
@ RV55
@
4.99K_0402_1%~D
4.99K_0402_1%~D
**
RV51
RV50
@ RV50
@
@ RV51
@
1 2
1 2
45.3K_0402_1%~D
45.3K_0402_1%~D
34.8K_0402_1%~D
34.8K_0402_1%~D
RV57
RV57
RV56
RV56
1 2
1 2
34.8K_0402_1%~D
34.8K_0402_1%~D
34.8K_0402_1%~D
34.8K_0402_1%~D
Hynix 64Mx16 DDR3 part stuff RV59=15K Samsung 64Mx16 DDR3 part stuff RV59=20K
RV53
RV52
RV52
@ RV53
@
1 2
1 2
1 2
1 2
4.99K_0402_1%~D
4.99K_0402_1%~D
RV58
@ RV58
@
1 2
15K_0402_1%~D
15K_0402_1%~D
10K_0402_1%~D
10K_0402_1%~D
4.99K_0402_1%~D
4.99K_0402_1%~D
RV60
RV59
@ RV60
@
15K_0402_1%~D
15K_0402_1%~D
1 2
10K_0402_1%~D
10K_0402_1%~D
X76@ RV59
X76@
Hynix 128Mx16 DDR3 part stuff RV59=35K
A A
Samsung 128Mx16 DDR3 part stuff RV59=45.3K
STRAP0
STRAP1
STRAP2
USER[3:0]
3GIO_PADCFG_LUT_ADR[3:0]
PCI_DEVID[3:0]
5
RV98
RV97
RV97
@ RV98
@
1 2
1 2
1 2
1 2
10K_0402_1%~D
10K_0402_1%~D
34.8K_0402_1%~D
34.8K_0402_1%~D
RV41
@ RV41
@
4.99K_0402_1%~D
4.99K_0402_1%~D
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 ROM_SCLK_GPU ROM_SI_GPU ROM_SO_GPU
RV99
RV99
1 2
1 2
20K_0402_1%~D
20K_0402_1%~D
+3.3V_RUN_GFX
Resistor Values
5K
10K
15K
20K
25K
30K
35K
45K
4
1 2
RV38 100K_0402_5%~DRV38 100K_0402_5%~D
1 2
RV37 100K_0402_5%~DRV37 100K_0402_5%~D
1 2
RV35 100K_0402_5%~DRV35 100K_0402_5%~D
1 2
RV36 100K_0402_5%~DRV36 100K_0402_5%~D
RV39
RV39
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2
1 2
RV40
RV40
2.2K_0402_5%~D
2.2K_0402_5%~D
Pull-up to +3V
1000
1001
1010
1011
1100
1101
1110
1111
DPC_GPU_AUX/DDC
DPC_GPU_AUX#/DDC
DPD_GPU_AUX/DDC
DPD_GPU_AUX#/DDC
TMDS_E_GPU_DDC
TMDS_E_GPU_DDC#
Pull-down to Gnd
0000
0001
0010
0011
0100
0101
0110
0111
PCIDEVID_EXT, SUB_VENDOR, SLOT_CLK, PEX_PLL_ENROM_SCLK
ROM_SI
ROM_SO
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
RAM_CFG[3:0]
XCLK_417, FB_0_BAR_SIZE, ALT_ADOOR, VGA_DEVICE
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
N12P DP, STRAP, GND
N12P DP, STRAP, GND
N12P DP, STRAP, GND
LA-6592P
LA-6592P
LA-6592P
47 75Thursday, January 13, 2011
47 75Thursday, January 13, 2011
47 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
add for GB1b-64
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CV164
CV164
1
1
2
2
D D
NV DG for VDD Cap:
0.022uF 10% X7R x5
0.1uF 10% X7R x5 1uF 10% X7R x3 22uF 10% X5R x2
1U_0603_10V7K~D
1U_0603_10V7K~D
CV162
CV163
CV163
CV162
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV49
CV49
1
1
2
2
1U_0603_10V7K~D
1U_0603_10V7K~D
1U_0603_10V7K~D
1U_0603_10V7K~D
CV160
CV160
CV161
CV161
1
1
2
2
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV50
CV50
CV40
CV40
1
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
CV41
CV41
1
2
under GPU
+3.3V_RUN_GFX
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
CV74
1 2
RV30 0_0402_5%~D@R V30 0_0402_5%~D@
1 2
RV31 0_0402_5%~D@R V31 0_0402_5%~D@
CV175
CV175
CV119
CV119
CV74
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV172
CV172
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV120
CV120
2
+IFPAB_PLLVDD
1
2
C C
+3.3V_RUN_GFX
+1.05V_RUN_VTT_GFX
+1.8V_RUN_GFX
B B
+1.05V_RUN_VTT_GFX
+1.05V_RUN_VTT_GFX
A A
220R 100MHZ
LV11 BLM18PG221SN1D_2P~DLV11 BLM18PG221SN1D_2P~D
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV173
CV173
2
220R 100MHZ
LV9 BLM18PG221SN1D_2P~DLV9 BLM18PG221SN1D_2P~D
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV118
CV118
2
LV10
LV10
BLM18AG121SN1D_0603~D
BLM18AG121SN1D_0603~D
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV169
CV169
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
add for GB1b-64
5
220R 100MHZ
LV1
LV1
BLM18PG221SN1D_2P~D
BLM18PG221SN1D_2P~D
1 2
1
2
285mA
+IFPAB_IOVDD
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV166
CV166
1
1
2
2
285mA
+IFPCDE_IOVDD
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV121
CV121
1
1
2
2
285mA
1U_0603_10V7K~D
1U_0603_10V7K~D
4.7U_0805_10V7K~D
4.7U_0805_10V7K~D
12
CV168
CV168
CV171
CV171
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV80
CV80
CV174
CV174
CV122
CV122
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
+3.3V_RUN_VDD33
1
2
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV170
CV170
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV123
CV123
1
2
CV167
CV167
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV75
CV75
+PEX_SVDD_3V3
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D CV81
CV81
+3.3V_RUN_GFX
+3.3V_RUN_GFX
@CV159
@
CV159
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
CV51
CV51
1
1
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV58
CV58
1
1
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
CV68
CV68
2
2
150mA 150mA 285mA 285mA 285mA 220mA 220mA 220mA 220mA
LV6
LV6
MMZ1608D301BT_0603
MMZ1608D301BT_0603
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
CV94
CV94
1
2
LV5
LV5
MMZ1608D301BT_0603
MMZ1608D301BT_0603
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
CV101
CV101
1
2
add for GB1b-64
4
+GPU_CORE
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
@CV44
@
CV44
1
2
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
0.022U_0402_16V7K~D
CV42
CV42
CV43
CV43
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV60
CV60
CV59
CV59
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CV76
CV76
CV69
CV69
120mA
2
120mA
+IFPAB_IOVDD
+IFPCDE_IOVDD
+IFPAB_PLLVDD
+IFPCD_PLLVDD
+IFPE_PLLVDD
4.7U_0805_10V7K~D
4.7U_0805_10V7K~D
1
12
CV95
CV95
2
add for GB1b-64
4.7U_0805_10V7K~D
4.7U_0805_10V7K~D
1
12
CV102
CV102
2
4
220mA
1U_0603_10V7K~D
1U_0603_10V7K~D
1
CV96
CV96
2
220mA
+IFPE_PLLVDD
1U_0603_10V7K~D
1U_0603_10V7K~D
1
CV103
CV103
2
UV1D
UV1D
J9
VDD
J10
VDD
J12
VDD
J13
VDD
L9
VDD
M9
VDD
M11
VDD
M17
VDD
N9
VDD
N11
VDD
N12
VDD
N13
VDD
N14
VDD
N15
VDD
N16
VDD
N17
VDD
N19
VDD
P11
VDD
P12
VDD
P13
VDD
P14
VDD
P15
VDD
P16
VDD
P17
VDD
R9
VDD
R11
VDD
R12
VDD
R13
VDD
R14
VDD
R15
VDD
R16
VDD
R17
VDD
T9
VDD
T11
VDD
T17
VDD
U9
VDD
U19
VDD
W9
VDD
W10
VDD
W12
VDD
W13
VDD
W18
VDD
W19
VDD
A12
VDD33
B12
VDD33
C12
VDD33
D12
VDD33
E12
VDD33
F12
VDD33
AG9
PEX_SVDD_3V3
V3
IFPA_IOVDD
V2
IFPB_IOVDD
J6
IFPCD_IOVDD
H6
IFPE_IOVDD
AD5
IFPAB_PLLVDD
P6
IFPC_PLLVDD
N6
IFPD_PLLVDD
D7
IFPE_PLLVDD
N12P-NS-S-A1_BGA533~D
N12P-NS-S-A1_BGA533~D
+IFPCD_PLLVDD
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV98
CV98
CV97
CV97
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV105
CV105
CV104
CV104
1
2
Part 4 of 5
Part 4 of 5
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV106
CV106
1
2
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
POWER
POWER
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
2A
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD
2A
PEX_IOVDD PEX_IOVDD
PEX_PLLVDD
VID_PLLVDD
SP_PLLVDD
PLLVDD
FB_PLLAVDD
FB_PLLAVDD
FB_DLLAVDD
DACA_VDD
DACB_VDD
FB_CAL_PD_VDDQ
VDD_SENSE
VDD_SENSE
+1.05V_RUN_VTT_GFX
CV99
CV99
3
A13 B13 C13 D13 D14 E13 F13 F14 F15 F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22
AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7
AG7 AF7 AE7 AD8 AD7 AC9
AF9
K6
L6
K5
R19
AC19
T19
AG2
W5
B15
W15
E15
BLM18PG221SN1D_2P~D
BLM18PG221SN1D_2P~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV84
CV84
1
2
2.97A
+PEX_PLLVDD
+PLLVDD
45mA 60mA
100mA
100mA
+DACA_VDD
1 2
RV63 10K_0402_5%~DRV63 10K_040 2_5%~D
+1.5V_MEM_VDDQ
route as 50ohm
LV3
LV3
12
Close to Pin C1747 to be close to the GPU
0.01U_0402_25V7K~D
CV45
CV45
CV53
CV53
CV62
CV62
CV71
CV71
1
2
20 mil
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV179
CV179
1
2
1
2
1
2
1
2
+PLLVDD
22U_0603_6.3V6M~D
22U_0603_6.3V6M~D
1
2
0.01U_0402_25V7K~D
CV46
CV46
0.047U_0402_10V7K~D
0.047U_0402_10V7K~D
CV54
CV54
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV63
CV63
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV72
CV72
+1.5V_MEM_GFX
CV180
CV180
1
2
10U_0805_6.3V7K
10U_0805_6.3V7K
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
1
2
0.047U_0402_10V7K~D
0.047U_0402_10V7K~D
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
PLACE CLOSE TO BALL PLACE NEAR GPU
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
45mA
+FB_AVDD
GPU_VDD_SENSE 63
0.01U_0402_25V7K~D
CV38
CV38
1
2
0.047U_0402_10V7K~D
0.047U_0402_10V7K~D
CV52
CV52
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV61
CV61
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV70
CV70
1
2
120mA
12
RV65 40.2_0402_1%~DRV65 40.2_0402_1%~D
150mA , 10mil
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV89
CV89
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV88
CV88
CV87
CV87
1
1
2
2
add for GB1b-64
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV47
CV47
1
2
1
2
1
2
1
2
PLACE NEAR GPU
@CV181
@
CV181
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV55
CV55
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV64
CV64
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV73
CV73
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV165
CV165
1
2
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
CV48
CV48
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
@CV56
@
CV56
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
CV65
CV65
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
CV77
CV77
add for GB1b-64
120mA
+DACA_VDD
1
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+1.5V_MEM_GFX
CV39
CV39
1
2
N10M SPEC FBVDDQ TYP. 1.8V.
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+1.5V_MEM_GFX
CV57
CV57
1
2
+1.05V_RUN_VTT_GFX
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
CV67
CV67
CV66
CV66
1
1
2
2
+1.05V_RUN_VTT_GFX
10U_0805_4VAM~D
10U_0805_4VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1
2
12
120mA
CV79
CV79
CV78
CV78
1
2
10U_0805_4VAM~D
10U_0805_4VAM~D
1U_0603_10V7K~D
1U_0603_10V7K~D
1
CV82
CV82
2
add for GB1b-64
+PEX_PLLVDD
1U_0603_10V7K~D
1U_0603_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV90
CV90
1
12
2
CV83
CV83
4.7U_0805_10V7K~D
4.7U_0805_10V7K~D
1
CV92
CV92
2
add for GB1b-64
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV107
CV107
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV109
CV109
CV110
CV110
1
1
1
2
2
2
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
LV2
LV2
12
BLM18PG300SN1D_2P~D
BLM18PG300SN1D_2P~D
30R 100MHZ
BLM18AG121SN1D_0603~D
BLM18AG121SN1D_0603~D
CV93
CV93
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV108
CV108
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
N12P Power
N12P Power
N12P Power
LA-6592P
LA-6592P
LA-6592P
+1.05V_RUN_VTT_GFX
+1.05V_RUN_VTT_GFX
LV4
LV4
12
300ohm 100MHz ESR0.25ohm
LV7
LV7
MMZ1608D301BT_0603
MMZ1608D301BT_0603
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
4.7U_0805_10V7K~D
4.7U_0805_10V7K~D
CV112
CV112
1
CV113
CV113
2
1
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
CV91
CV91
1
2
+3.3V_RUN_GFX
1
2
48 75Thursday, January 13, 2011
48 75Thursday, January 13, 2011
48 75Thursday, January 13, 2011
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
CV114
CV114
1.0
1.0
1.0
5
4
3
2
1
FBAD[0..63]
FBA_CMD[0..30]
DQMA#[0..7]
DQSA_RN[0..7]
DQSA_WP[0..7]
D D
10K_0402_5%~D
10K_0402_5%~D
12
10K_0402_5%~D
10K_0402_5%~D
12
C C
10K_0402_5%~D
10K_0402_5%~D
12
10K_0402_5%~D
10K_0402_5%~D
12
10K_0402_5%~D
10K_0402_5%~D
12
B B
+1.5V_MEM_GFX
1.1K_0402_1%~D
1.1K_0402_1%~D
@RV77
@
12
RV77
1.1K_0402_1%~D
@RV78
1.1K_0402_1%~D
@
12
RV78
A A
RV66
RV66
RV68
RV68
RV71
RV71
RV72
RV72
RV75
RV75
CKE_1
ODT_2
ODT_1
CKE_2
RST
FBA_CMD3
FBA_CMD19
FBA_CMD0
FBA_CMD16
FBA_CMD20
+FB_VREF
1
2
FBAD[0..63] 50,51
FBA_CMD[0..30] 50,51
DQMA#[0..7] 50,51
DQSA_RN[0..7] 50,51
DQSA_WP[0..7] 50,51
16mil
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
@CV128
@
CV128
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
UV1B
UV1B
D22
FBA_D0
E24
FBA_D1
E22
FBA_D2
D24
FBA_D3
D26
FBA_D4
D27
FBA_D5
C27
FBA_D6
B27
FBA_D7
A21
FBA_D8
B21
FBA_D9
C21
FBA_D10
C19
FBA_D11
C18
FBA_D12
D18
FBA_D13
B18
FBA_D14
C16
FBA_D15
E21
FBA_D16
F21
FBA_D17
D20
FBA_D18
F20
FBA_D19
D17
FBA_D20
F18
FBA_D21
D16
FBA_D22
E16
FBA_D23
A22
FBA_D24
C24
FBA_D25
D21
FBA_D26
B22
FBA_D27
C22
FBA_D28
A25
FBA_D29
B25
FBA_D30
A26
FBA_D31
U24
FBA_D32
V24
FBA_D33
V23
FBA_D34
R24
FBA_D35
T23
FBA_D36
R23
FBA_D37
P24
FBA_D38
P22
FBA_D39
AC24
FBA_D40
AB23
FBA_D41
AB24
FBA_D42
W24
FBA_D43
AA22
FBA_D44
W23
FBA_D45
W22
FBA_D46
V22
FBA_D47
AA25
FBA_D48
W27
FBA_D49
W26
FBA_D50
W25
FBA_D51
AB25
FBA_D52
AB26
FBA_D53
AD26
FBA_D54
AD27
FBA_D55
V25
FBA_D56
R25
FBA_D57
V26
FBA_D58
V27
FBA_D59
R26
FBA_D60
T25
FBA_D61
N25
FBA_D62
N26
FBA_D63
N12P-NS-S-A1_BGA533~D
N12P-NS-S-A1_BGA533~D
Part 2 of 5
Part 2 of 5
MEMORY INTERFACE
MEMORY INTERFACE
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FB_VREF
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_DEBUG
FBA_CMD0
G24
FBA_CMD1
F27
FBA_CMD2
F25
FBA_CMD3
F26
FBA_CMD4
G26
FBA_CMD5
G27
FBA_CMD6
G25
FBA_CMD7
J25
FBA_CMD8
J24
FBA_CMD9
H24
FBA_CMD10
H22
FBA_CMD11
J26
FBA_CMD12
G22
FBA_CMD13
G23
FBA_CMD14
J22
FBA_CMD15
J27
FBA_CMD16
M24
FBA_CMD17
L24
FBA_CMD18
J23
FBA_CMD19
K23
FBA_CMD20
K22
FBA_CMD21
M23
FBA_CMD22
K24
FBA_CMD23
M27
FBA_CMD24
N27
FBA_CMD25
M26
FBA_CMD26
K26
FBA_CMD27
K27
FBA_CMD28
K25
FBA_CMD29
M25
FBA_CMD30
L22
DQMA#0
C26
DQMA#1
B19
DQMA#2
D19
DQMA#3
D23
DQMA#4
T24
DQMA#5
AA23
DQMA#6
AB27
DQMA#7
T26
DQSA_RN0
D25
DQSA_RN1
A18
DQSA_RN2
E18
DQSA_RN3
B24
DQSA_RN4
R22
DQSA_RN5
Y24
DQSA_RN6
AA27
DQSA_RN7
R27
DQSA_WP0
C25
DQSA_WP1
A19
DQSA_WP2
E19
DQSA_WP3
A24
DQSA_WP4
T22
DQSA_WP5
AA24
DQSA_WP6
AA26
DQSA_WP7
T27
+FB_VREF
A16
F24 F23
N24 N23
M22
RV76 10K_0402_5%~DRV76 10K_0402_5%~D
1 2
Mode E - Mirror Mode Mapping
CLKA0 50 CLKA0# 50
CLKA1 51 CLKA1# 51
+1.5V_MEM_GFX
TV6PAD ~D @TV6PAD ~D @
TV5PAD ~D @TV5PAD ~D @
Address
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
DATA Bus
0..31
ODT_L
CS1#_L
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#CMD15
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
A15
32..63
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
CKE_H
CS1#_H
CS0#_H
ODT_H
RST
A6
A5
A9
A1
WE#
A4
A15
A10
BA0
BA2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3.3V_RUN_GFX_ON15,41
GFX_MEM_VTT_ON41
+1.8V_RUN_GFX Source
+1.8V_RUN +1 .8V_RUN_GFX
1.05V_RUN_VTT_GFX#_EN 1.05V_RUN_VTT_GFX#_EN_R
1 2
RV95 0_0402_5 %~DRV95 0_0402_5%~D
+3.3V_RUN_GFX Source
QV6A
QV6A
+3.3V_ALW2
2
12
RV92
RV92 100K_0402_5%~D
100K_0402_5%~D
3.3V_RUN_GFX_ON#
61
+15V_ALW
5
+3.3V_ALW +3.3V_RUN_GFX
12
RV91
RV91 100K_0402_5%~D
100K_0402_5%~D
3.3V_RUN_GFX_EN
3
QV6B
QV6B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
+1.5V_MEM_GFX Source
2
100K_0402_5%~D
100K_0402_5%~D
12
RV69
RV69
GFX_MEM_VTT_ON#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
QV2A
QV2A
+15V_ALW+3.3V_ALW2 +1.5V_MEM
100K_0402_5%~D
100K_0402_5%~D
12
RV67
RV67
GFX_MEM_VTT_EN
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
QV2B
QV2B
5
4
QV1
QV1 SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8 7
5
+1.05V_RUN_VTT_GFX Source
+15V_ALW +1.05V_M
100K_0402_5%~D
100K_0402_5%~D
12
13
D
D
2
G
G
S
S
RV73
RV73
1.05V_RUN_VTT_GFX#_EN
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
8 7
5
QV4
QV4
QV7
QV7 PMV45EN_SOT23-3~D
PMV45EN_SOT23-3~D
D
S
D
S
1 3
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
2 1
4
1
2
QV3
QV3 SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
1
G
G
2
2
QV5
QV5
S
S
45
G
G
3
3300P_0402_50V7K~D
3300P_0402_50V7K~D
CV186
CV186
1
2
1 2 36
1
2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
CV125
CV125
1 2 36
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
CV127
CV127
1
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
20K_0402_5%~D
20K_0402_5%~D
12
RV96
RV96
CV187
CV187
20K_0402_5%~D
20K_0402_5%~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
12
RV90
CV185
CV185
+1.5V_MEM_GFX
20K_0402_5%~D
20K_0402_5%~D
12
RV70
RV70
CV124
CV124
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
20K_0402_5%~D
20K_0402_5%~D
12
RV74
RV74
CV126
CV126
RV90
1
2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+1.05V_RUN_VTT_GFX
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
N12P Memory
N12P Memory
N12P Memory
LA-6592P
LA-6592P
LA-6592P
49 75Thursday, January 13, 2011
49 75Thursday, January 13, 2011
49 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
3
2
1
Memory Partition A - Lower 32 bits
change to Hynix
D D
UV3
N3
P7 P3
N2
P8
P2 R8 R2
T8 R3
L7 R7 N7
T3 M7
M2 N8 M3
J7
K7
K9
K1
J3
L2
K3
L3
F3 C7
E7 D3
G3
B7
T2
L8
M8 H1
J1
J9
L1
L9
T7
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV139
CV139
1
1
2
2
UV3
X76@
X76@
DQL0 DQL1
96-BALL
96-BALL
SDRAM DDR3
SDRAM DDR3
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV141
CV141
1
1
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
CV142
CV142
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15
BA0 BA1 BA2
CK CK# CKE
ODT RAS# CS# CAS# WE#
DQSL DQSU
DML DMU
DQSL DQSU
RESET
ZQ
VREFCA VREFDQ
NC NC NC NC NC
H
H
5TQ2G63BFR-12C_FBGA96~D
5TQ2G63BFR-12C_FBGA96~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV140
CV140
FBAD30
E3
FBAD24
F7
FBAD31
F2
FBAD28
F8
FBAD29
H3
FBAD26
H8
FBAD25
G2
FBAD27
H7
FBAD14
D7
FBAD10
C3
FBAD15
C8
FBAD11
C2
FBAD12
A7
FBAD8
A2
FBAD13
B8
FBAD9
A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV143
CV143
1
2
Group3Group0
Mode E - Mirror Mode Mapping
Group1
UV4
UV4
X76@
+1.5V_MEM_GFX
1.1K_0402_1%~D
1.1K_0402_1%~D
12
RV80
RV80
+FBA_VREF0
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
1.1K_0402_1%~D
1.1K_0402_1%~D
CV129
CV129
RV79
RV79
1
12
2
CLKA0
C C
B B
RV81
RV81 160_0402_1%~D
160_0402_1%~D
1 2
CLKA0#
+1.5V_MEM_GFX
16mil
FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD30
FBA_CMD29 FBA_CMD13 FBA_CMD27
CLKA049 CLKA0#49
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CV176
CV176
2
2
FBA_CMD3
FBA_CMD0 FBA_CMD11 FBA_CMD2 FBA_CMD15 FBA_CMD28
DQSA_WP0 DQSA_WP2
DQMA#0 DQMA#2
DQSA_RN0 DQSA_RN2
FBA_CMD20
243_0402_1%~D
243_0402_1%~D
12
+FBA_VREF0
RV82
RV82
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV130
CV130
CV177
CV177
2
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CV132
CV132
CV131
CV131
2
2
X76@
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
K1
ODT
J3
RAS#
L2
CS#
K3
CAS#
L3
WE#
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
M8
VREFCA
H1
VREFDQ
J1
NC
J9
NC
L1
NC
L9
NC
T7
NC
96-BALL
96-BALL
SDRAM DDR3
SDRAM DDR3
H
H
5TQ2G63BFR-12C_FBGA96~D
5TQ2G63BFR-12C_FBGA96~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
1
1
CV133
CV133
CV134
CV134
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
CV135
CV135
FBAD1
E3
FBAD6
F7
FBAD3
F2
FBAD4
F8
FBAD0
H3
FBAD5
H8
FBAD2
G2
FBAD7
H7
FBAD17
D7
FBAD21
C3
FBAD19
C8
FBAD20
C2
FBAD18
A7
FBAD22
A2
FBAD16
B8
FBAD23
A3
+1.5V_MEM_GFX +1.5V_MEM_GFX
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CV136
CV136
2
Group2
+1.5V_MEM_GFX
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV178
CV178
2
16mil
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV188
CV188
2
243_0402_1%~D
243_0402_1%~D
RV83
RV83
1
2
FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD30
FBA_CMD29 FBA_CMD13 FBA_CMD27
CLKA0 CLKA0# FBA_CMD3
FBA_CMD0 FBA_CMD11 FBA_CMD2 FBA_CMD15 FBA_CMD28
DQSA_WP3 DQSA_WP1
DQMA#3 DQMA#1
DQSA_RN3 DQSA_RN1
FBA_CMD20
+FBA_VREF0
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV137
CV137
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV138
CV138
2
FBA_CMD[0..30]
FBAD[0..63]
DQMA#[0..7]
DQSA_RN[0..7]
DQSA_WP[0..7]
Address
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
0..31
ODT_L
CS1#_L
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#CMD15
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
A15
FBA_CMD[0..30] 49,51
FBAD[0..63] 49,51
DQMA#[0..7] 49,51
DQSA_RN[0..7] 49,51
DQSA_WP[0..7] 49,51
DATA Bus
32..63
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
CKE_H
CS1#_H
CS0#_H
ODT_H
RST
A6
A5
A9
A1
WE#
A4
A15
A10
BA0
BA2
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
VRAM A Lower
VRAM A Lower
VRAM A Lower
LA-6592P
LA-6592P
LA-6592P
50 75Thursday, January 13, 2011
50 75Thursday, January 13, 2011
50 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
4
Memory Partition A - Upper 32 bits
3
2
1
FBAD[0..63]
D D
UV5
UV5
X76@
X76@
96-BALL
96-BALL
SDRAM DDR3
SDRAM DDR3
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
16mil
+1.5V_MEM_GFX
1.1K_0402_1%~D
1.1K_0402_1%~D
RV84
RV84
12
+FBA_VREF1
1.1K_0402_1%~D
1.1K_0402_1%~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
12
RV85
RV85
CV144
CV144
1
2
C C
CLKA1
RV86
RV86 160_0402_1%~D
160_0402_1%~D
1 2
CLKA1#
B B
12
+1.5V_MEM_GFX +1.5V_MEM_GFX
FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD27
FBA_CMD29 FBA_CMD6 FBA_CMD30
CLKA149 CLKA1#49
FBA_CMD16
FBA_CMD19 FBA_CMD11 FBA_CMD18 FBA_CMD15 FBA_CMD25
DQSA_WP4 DQSA_WP5
DQMA#4 DQMA#5
DQSA_RN4 DQSA_RN5
FBA_CMD20
243_0402_1%~D
243_0402_1%~D
+FBA_VREF1 +FBA_VREF1
RV87
RV87
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
K1
ODT
J3
RAS#
L2
CS#
K3
CAS#
L3
WE#
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
M8
VREFCA
H1
VREFDQ
J1
NC
J9
NC
L1
NC
L9
NC
T7
NC
H
H
5TQ2G63BFR-12C_FBGA96~D
5TQ2G63BFR-12C_FBGA96~D
FBAD35
E3
FBAD32
F7
FBAD38
F2
FBAD33
F8
FBAD37
H3
FBAD34
H8
FBAD39
G2
FBAD36
H7
FBAD42
D7
FBAD46
C3
FBAD40
C8
FBAD45
C2
FBAD44
A7
FBAD43
A2
FBAD41
B8
FBAD47
A3
+1.5V_MEM_GFX +1.5V_MEM_GFX
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9
VSS
B3
VSS
E1
VSS
G8
VSS
J2
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VSS
B1 B9 D1 D8 E2 E8 F9 G1 G9
Group4
Group5
16mil
12
FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD27
FBA_CMD29 FBA_CMD6 FBA_CMD30
CLKA1 CLKA1# FBA_CMD16
FBA_CMD19 FBA_CMD11 FBA_CMD18 FBA_CMD15 FBA_CMD25
DQSA_WP7 DQSA_WP6
DQMA#7 DQMA#6
DQSA_RN7 DQSA_RN6
FBA_CMD20
243_0402_1%~D
243_0402_1%~D
RV88
RV88
UV6
UV6
X76@
X76@
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
K1
ODT
J3
RAS#
L2
CS#
K3
CAS#
L3
WE#
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
M8
VREFCA
H1
VREFDQ
J1
NC
J9
NC
L1
NC
L9
NC
T7
NC
96-BALL
96-BALL
SDRAM DDR3
SDRAM DDR3
H
H
5TQ2G63BFR-12C_FBGA96~D
5TQ2G63BFR-12C_FBGA96~D
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
FBAD61
E3
FBAD57
F7
FBAD58
F2
FBAD60
F8
FBAD56
H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
FBAD62 FBAD59 FBAD63
FBAD51 FBAD52 FBAD49 FBAD53 FBAD48 FBAD54 FBAD50 FBAD55
Group7
Mode E - Mirror Mode Mapping
Group6
FBA_CMD[0..30]
DQMA#[0..7]
DQSA_RN[0..7]
DQSA_WP[0..7]
Address
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV189
CV189
2
1U_0402_6.3V6K~D
1
1
CV190
CV190
CV145
CV145
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CV146
CV146
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV148
CV148
1
1
CV147
CV147
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV149
CV149
1
2
0.1U_0402_10V7K~D
CV150
CV150
CV151
CV151
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CV191
CV191
CV192
CV192
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CV153
CV153
CV152
CV152
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV154
CV154
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV155
CV155
CV156
CV156
1
1
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV158
CV158
CV157
CV157
1
1
2
2
CMD30
FBA_CMD[0..30] 49,50
DQMA#[0..7] 49,50
DATA Bus
0..31
ODT_L
CS1#_L
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#CMD15
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
A15
FBAD[0..63] 49,50
DQSA_RN[0..7] 49,50
DQSA_WP[0..7] 49,50
32..63
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
CKE_H
CS1#_H
CS0#_H
ODT_H
RST
A6
A5
A9
A1
WE#
A4
A15
A10
BA0
BA2
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
VRAM A Upper
VRAM A Upper
VRAM A Upper
LA-6592P
LA-6592P
LA-6592P
51 75Thursday, January 13, 2011
51 75Thursday, January 13, 2011
51 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
+3.3V_ALW
ESD Diodes
2
3
PD33
PD33
@
+5V_ALW
DA204U_SOT323~D
DA204U_SOT323~D
PC5
PC5
@
@
PL3
PL3
1
2
Z4304 Z4305 Z4306
NB_PSID
3
1
1 2
.47U_0402_6.3V6-K~D
.47U_0402_6.3V6-K~D
PD10
PD10
@
@
2
VZ0603M260APT_0603
VZ0603M260APT_0603
PC12
PC12
@
@
@
DA204U_SOT323~D
DA204U_SOT323~D
+3.3V_ALW
GND
PD2
PD2
@
@
DA204U_SOT323~D
DA204U_SOT323~D
GND
GND
DCIN_CBL_DET# <42>
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
Media Bay Battery Connector
MBATT1
D D
12
PC301
PC301
2200P_0402_50V7K~D
2200P_0402_50V7K~D
MBATT1
1
1
Z5304
2
2
Z5305
3
3
Z5306
4
4
5
5
6
6
7
GND
8
GND
SUYIN_150010GR006M500ZR
SUYIN_150010GR006M500ZR
Primary Battery Connector
11
GND
10
GND
9
9
8
8
7
7
6
6
12
PC3
PC3
C C
2200P_0402_50V7K~D
2200P_0402_50V7K~D
SUYIN_200275MR009G50PZR
SUYIN_200275MR009G50PZR
B B
MOLEX_87438-0743
MOLEX_87438-0743
7
7
6
6
-DCIN_JACK
5
5
4
4
PJPDC1
PJPDC1
+DCIN_JACK
3
3
2
2
1
1
A A
5
5
4
4
3
3
2
2
1
1
PBATT1
PBATT1
@
@
@
@
PR14
PR14
1 2
0_0402_5%~D
0_0402_5%~D
FBMA-L18-453215-900LMA90T_1812~D
FBMA-L18-453215-900LMA90T_1812~D
1 2
12
PC10
PC10
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
FBMA-L18-453215-900LMA90T_1812~D
FBMA-L18-453215-900LMA90T_1812~D
12
PC13
PC13
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
5
PD9
PD9
PL4
PL4
1
100_0402_5%~D
100_0402_5%~D
2
3
1
100_0402_5%~D
100_0402_5%~D
PR17
@ PR17
@
4.7K_0805_5%~D
4.7K_0805_5%~D
@
@
PR501
PR501
1 2
PD3
PD3
@
@
PR4
PR4
1 2
12
PD34
PD34
DA204U_SOT323~D
DA204U_SOT323~D
+DC_IN
DA204U_SOT323~D
DA204U_SOT323~D
3
3
2
3
PD32
PD32
@
@
1
DA204U_SOT323~D
DA204U_SOT323~D
PR502
PR502
100_0402_5%~D
100_0402_5%~D
1 2
ESD Diodes
3
2
PD4
PD4
@
@
1
DA204U_SOT323~D
DA204U_SOT323~D
PR3
PR3
100_0402_5%~D
100_0402_5%~D
1 2
PL2
PL2
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
12
+DC_IN
PC6
PC6
1 2
PR15
PR15
0.022U_0805_50V7K~D
0.022U_0805_50V7K~D
4
2
1
PR503
PR503
100_0402_5%~D
100_0402_5%~D
1 2
2
1
PR5
PR5
100_0402_5%~D
100_0402_5%~D
1 2
2
1
DC_IN+ Source
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1 2 3
12
4
PR18
PR18
1M_0402_5%~D
1M_0402_5%~D
1 2
10K_0402_5%~D
10K_0402_5%~D
12
PR19
PR19
1M_0402_5%~D
1M_0402_5%~D
4
3
@
@
PD7
PD7 SM24_SOT23
SM24_SOT23
PQ4
PQ4
S S S G
8
D
7
D
6
D
5
D
SOFT_START_GC
<63>
MBATT+_C
PR10
PR10
100K_0402_1%~D
100K_0402_1%~D
PR12
PR12
15K_0402_1%~D
15K_0402_1%~D
BAY_SMBCLK 45 BAY_SMBDAT 45
PBAT_SMBCLK <43> PBAT_SMBDAT <43>
1 2
1 2
PC7
PC7
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
3
MPBATT+
PBATT+
GND
10K_0402_1%~D
10K_0402_1%~D
PR13
PR13
1 2
10K_0402_5%~D@
10K_0402_5%~D@
SLICE_BAT_PRES#<41,42,63>
+3.3V_ALW
PR8
PR8
+5V_ALW
PD8
PD8
@
@
+3.3V_ALW
12
PR504
PR504
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW
12
PR2
PR2
100K_0402_5%~D
100K_0402_5%~D
@ PD5
@
1 2
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
1 2
2.2K_0402_5%~D
2.2K_0402_5%~D
2
3
1
DA204U_SOT323~D
DA204U_SOT323~D
MODULE_BATT_PRES#
44
FDN338P_G_NL_SOT23-3~D
PD5
NB_PSID_TS5A63157
FDN338P_G_NL_SOT23-3~D
PR6
@ PR6
@
1 2
0_0402_5%~D
0_0402_5%~D
DOCK_PSID<41> GPIO_PSID_SELECT <42>
PSID_DISABLE# <42>
PL21
PL21
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PJP36
PJP36
2 1
12
PAD-OPEN 2x2m~D
PAD-OPEN 2x2m~D
PC302
PC302
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PL22
PL22
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PL1
PL1
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PJP43
PBATT+_C
PC2
PC2
PR7
@ PR7
@
1 2
0_0402_5%~D
0_0402_5%~D
D
S
D
S
1 3
PQ2
PQ2 FDV301N_G_NL_SOT23-3~D
FDV301N_G_NL_SOT23-3~D
G
G
2
C
C
PQ3
PQ3
2
B
B
MMST3904-7-F_SOT323~D
MMST3904-7-F_SOT323~D
E
E
3 1
12
12
12
PC9
PC9
PC8
PC8
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
33_0402_5%~D
33_0402_5%~D
+DC_IN_SS
12
PR16
PR16
100K_0402_5%~D
100K_0402_5%~D
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PR9
PR9
1 2
PC11
PC11
10U_1206_25V6M~D
10U_1206_25V6M~D
PJP43
12
+5V_ALW
PD6
PD6
DA204UGT106_SOT323~D
DA204UGT106_SOT323~D
3
1
+5V_ALW
2
12
PR11
PR11
PBAT_PRES# <42,63>
PQ1
@
PQ1
@
1
3
1
3
1 3
2
2
2
12
1500P_0402_7K~D
1500P_0402_7K~D
2
+3.3V_RTC_LDO
PD1
PD1
RB715FGT106_UMD3
RB715FGT106_UMD3
DOCK_SMB_ALERT# <41,42,63>
PC4
PC4
@
@
PU1
PU1
1
NO
2
GND
NC3COM
TS5A63157DCKR_SC70-6~D
TS5A63157DCKR_SC70-6~D
+COINCELL
12
Z4012
2
3
1
PR1
PR1 1K_0402_5%~D
1K_0402_5%~D
1
2
6
IN
5
V+
4
COIN RTC Battery
+COINCELL
+RTC_CELL
PC1
PC1 1U_0603_10V4Z~D
1U_0603_10V4Z~D
Move to power schematic
+5V_ALW
PS_ID <43>
JRTC1
JRTC1
1
1
G
22G
TYCO_2-1775293-2~D
TYCO_2-1775293-2~D
1
3 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Title
Title
S
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
LA-6592
LA-6592
LA-6592
1
52 67Tuesday, January 18, 2011
52 67Tuesday, January 18, 2011
52 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
4
3
2
1
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO
PJP44
PJP44
+PWR_SRC
D D
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
5 Volt +/-5% Thermal Design Current : 7.869A Peak Current : 11.242A OCP_MIN : 13.490A
Fsw = 400KHz
+5V_ALWP
C C
12
1
+
+
PC33
PC33
2
330U_V_6.3VM~D
330U_V_6.3VM~D
B B
A A
PR32
PR32
12
@
@
0_0402_5%~D
0_0402_5%~D
PC36
PC36
@
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
12
PR38
PR38
0_0402_5%~D
0_0402_5%~D
GNDA_3V5V
+5V_ALWP
+3.3V_ALWP
PL5
PL5
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PJP47
PJP47
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP48
PJP48
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP50
PJP50
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP9
PJP9
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+DC1_PWR_SRC
Pop 10 Ohm for MAX17020
PJP45
PJP45
1 2
+5V_ALW2
PR21
PR20
PC18
PC18
10U_0805_25V6K
10U_0805_25V6K
GNDA_3V5V
PC41
PC41
1 2
200K_0402_5%~D
200K_0402_5%~D
PAD-OPEN1x1m
PAD-OPEN1x1m
PR20
12
PC25
PC25
348K_0402_1%~D
348K_0402_1%~D
+5V_ALW_PHASE
+5V_ALWP
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PJP49
PJP49
12
PC15
PC15
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
+5V_ALW_UGATE
12
12
12
12
PC16
PC16
PC17
PC17
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
PC29
PC29
@
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PR44
PR44
+15V_ALW
12
PC14
PC14
2200P_0402_50V7K~D
2200P_0402_50V7K~D
3
D
PQ5
PQ5
2
G
S
FDS8878_G 1N SO8
FDS8878_G 1N SO8
1
12
12
3
PC31
PC31
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PR36
PR36
ALWON<43>
THERM_STP#<23>
D
PQ7
PQ7
2
G
S
1
FDMS7692 1N POWER56-8
FDMS7692 1N POWER56-8
1 2
2.2_1206_5%~D
2.2_1206_5%~D
PR42
PR42
2K_0402_5%~D
2K_0402_5%~D
@
@
PR43
PR43
0_0402_5%~D
0_0402_5%~D
+5V_ALW
(100mA,20mils ,Via NO.=1)
+3.3V_ALW
PR21
1 2
0_0805_5%~D
0_0805_5%~D
+3.3V_ALW2
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+3.3V_RTC_LDO
GNDA_3V5V
PR30
PR30
+5V_FB1
1 2
EN_3V_5V
POK1
12
PC34
PC34
GNDA_3V5V
PR34
PR34
2.2_0603_5%~D
2.2_0603_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
+5V_ALW_LGATE
2
3
PD11
PD11
BAT54SW-7-F_SOT323-3~D
BAT54SW-7-F_SOT323-3~D
2
3
PD12
PD12
BAT54SW-7-F_SOT323-3~D
BAT54SW-7-F_SOT323-3~D
+15V_ALWP
12
1 2
0_0805_5%~D
0_0805_5%~D
12
PR23
PR23
@
@
0_0402_5%~D
0_0402_5%~D
GNDA_3V5V
LDOREFIN
+5V_ALWP
9
VSW
10
VOUT1
11
VFB1
12
TRIP1
13
PGOOD1
14
EN1
15
DRVH1
16
LL1
+5V_ALW_BOOT
PC39
PC39
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
1
PC42
PC42
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1 2
200K_0402_1%~D
200K_0402_1%~D
12
PC43
PC43
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PC26
PC26
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
PAD
33
3
PR46
PR46
PAD-OPEN1x1m
PAD-OPEN1x1m
+5V_ALW2P
VIN
EN_3V_5V
+3.3V_ALW2
4
8
5
7
6
VIN
LDO
VREF3
LDOREFIN
VBST117DRVL118V5DRV19SECFB20GND21PGND22DRVL223VBST2
SECFB
GNDA_3V5V
+5V_ALW2
PD13
PD13
1
BAT54CW_SOT323~D
BAT54CW_SOT323~D
2
12
1 2
GNDA_3V5V
+5V_3V_REF
2
1
3
VREF2
V5FILT
EN_LDO
TONSEL
SKIPSEL
PGOOD2
24
+3.3V_ALW_BOOT
12
PC40
PC40
1U_0603_10V6K~D
1U_0603_10V6K~D
PR47
PR47 39K_0402_5%~D
39K_0402_5%~D
PC24
PC24
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
@ PR24
@
0_0402_5%~D
0_0402_5%~D
1 2
@ PR25
@
0_0402_5%~D
0_0402_5%~D
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
PR26
@ PR26
@
PU2
PU2
REFIN2
TRIP2
VOUT2
EN2
DRVH2
LL2
GNDA_3V5V
+5V_VCC1
PR22
@ PR22
@
10_0603_5%~D
10_0603_5%~D
12
PR24
PR25
PC28
PC28
GNDA_3V5V
1 2
0_0603_5%~D
0_0603_5%~D
SN0608098_QFN32_5X5~D
SN0608098_QFN32_5X5~D
REFIN2
274K_0402_1%~D
274K_0402_1%~D
32 31
1 2
+3.3V_OUT2
30 29
POK2
28
EN_3V_5V
27
+3.3V_ALW_UGATE
26
+3.3V_ALW_PHASE
25
PR35
PR35
2.2_0603_5%~D
2.2_0603_5%~D
1 2
+3.3V_ALW_LGATE
PJP46
PJP46
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
12
12
PC27
PC27
1U_0603_10V6K~D
1U_0603_10V6K~D
12
PR27
PR27 0_0402_5%~D
0_0402_5%~D
PR28
PR28
@
@
1 2
0_0402_5%~D
0_0402_5%~D
PR29
PR29
PR31
PR31
0_0402_5%~D
0_0402_5%~D
12
12
PC35
PC35
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
Main (X7630031L10)
2nd (X7630031L11)
GNDA_3V5V
GNDA_3V5V
POK2
POK1
PC30
PC30
@
@
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+3.3V_ALWP
PR41
PR41
PR40
PR40
@
@
1 2
100K_0402_1%~D
100K_0402_1%~D
PR45
PR45
@
@
PU2 PR22
SN0608098
MAX17020
12
12
PC21
PC19
PC19
2200P_0402_50V7K~D
2200P_0402_50V7K~D
786
5
PQ6
PQ6
4
4
+3.3V_ALWP
1 2
100K_0402_1%~D
100K_0402_1%~D
12
0_0402_5%~D
0_0402_5%~D
ALW_PWRGD_3V_5V * connect to U51 (EC) Pin B15 (Vih =>2V)
123
786
5
123
AO4466L_SO8~D
AO4466L_SO8~D
PQ8
PQ8
AO4406AL_SO8~D
AO4406AL_SO8~D
ALW_PWRGD_3V_5V <43>
PC21
PC20
PC20
10U_0805_25V6K
10U_0805_25V6K
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
PL6
PL6
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
12
PC32
PC32
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PR37
PR37
1 2
2.2_1206_5%~D
2.2_1206_5%~D
@
10 Ohm
12
12
PC22
PC22
10U_0805_25V6K
10U_0805_25V6K
12
PR33
PR33
0_0402_5%~D
0_0402_5%~D
@
@
PR39
PR39
0_0402_5%~D
0_0402_5%~D
GNDA_3V5V
3.3 Volt +/-5% Thermal Design Current : 5.079A Peak current : 7.256A
12
OCP_MIN : 8.707A
PC23
PC23
Fsw = 300KHz
10U_0805_25V6K
10U_0805_25V6K
+3.3V_ALWP
+3.3V_ALWP+5V_ALWP
12
12
PC37
PC37
@
@
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PC38
PC38
330U_V_6.3VM~D
330U_V_6.3VM~D
1
+
+
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DC/DC +3V/ +5V
DC/DC +3V/ +5V
DC/DC +3V/ +5V
LA-6592
LA-6592
LA-6592
1
53 67Tuesday, January 18, 2011
53 67Tuesday, January 18, 2011
53 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
4
3
2
1
+1.5V_SUS_P
1.5 Volt +/-5% Thermal Design Current: 12.275A Peak current: 17.535A
D D
PL601
@ PL601
@
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PJP601
1.5V_PWR_SRC
12
12
PC605
PQ601
4
PC611
PC611
4.7U_0805_10V4Z~D
4.7U_0805_10V4Z~D
PQ601
3 5
5
PQ602
PQ602
PR603
PR603
255K_0402_1%~D
255K_0402_1%~D
1 2
PR604
@
@
PR606
DDR_ON 45
C C
+5V_ALW
PR606
1 2
0_0402_5%~D
0_0402_5%~D
@ PR611
@
300K_0402_5%~D
300K_0402_5%~D
PR607
PR607
10_0402_5%~D
10_0402_5%~D
1 2
PC614
PC614
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1.5V_SUS_PWRGD 45
PR611
GNDA_1.5V
12
12
PC613
@ PC613
@
1U_0402_6.3V4Z~D
1U_0402_6.3V4Z~D
12
PC615
PC615
@
@
+3.3V_ALW
12
PR610
PR610
100K_0402_1%~D
100K_0402_1%~D
GNDA_1.5V
12
47P_0402_50V8J~D
47P_0402_50V8J~D
PR608
PR608
10K_0402_1%~D
10K_0402_1%~D
1 2
12
PR609
PR609 10K_0402_1%~D
10K_0402_1%~D
GNDA_1.5V
15
1
PU601
PU601
TON
VOUT
VDD
FB
PGOOD
EN/DEM
GNDA_1.5V
NC
GND7PGND
8
2
3
4
5
6
PR604
2.2_0603_5%~D
2.2_0603_5%~D
BST_1.5VP
1 2
14
13
BOOT UGATE
12
PHASE
11
1 2
CS
10K_0402_1%~D
10K_0402_1%~D
10
VDDP
DL_1.5VP
9
LGATE
RT8209MGQW_WQFN14_3P5X3P5
RT8209MGQW_WQFN14_3P5X3P5
DH_1.5VP
LX_1.5VP
PR605
PR605
GNDA_1.5V
PC612
PC612
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+5V_ALW
1 2
PC605
@
@
2200P_0402_50V7K~D
2200P_0402_50V7K~D
FDMS7692_SO8~D
FDMS7692_SO8~D
241
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
12
FDMS0310S_DFN8-5
FDMS0310S_DFN8-5
123
PR602
PR602
1 2
PC604
PC604
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
PL602
PL602
1 2
PC610
PC610
1000P_0603_50V7K~D
1000P_0603_50V7K~D
2.2_1206_5%~D
2.2_1206_5%~D
PC603
PC603
12
12
PC602
PC602
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1
+
+
PC609
PC609
PR601
PR601
330U_SX_2VY~D
330U_SX_2VY~D
2
0_0402_5%~D
0_0402_5%~D
1 2
PJP601
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PC601
PC601
@
@
10U_1206_25V6M~D
10U_1206_25V6M~D
1
12
+
+
PC607
PC607
PC608
PC608
330U_SX_2VY~D
330U_SX_2VY~D
2
PC606
PC606
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
OCP_MIN:21.042A
+PWR_SRC
+1.5V_SUS_P
12
1.5V_SUS_PWRGD * connect to U51 (EC) Pin B9 (Vih => 2V)
B B
GNDA_1.5V
A A
5
PJP604
PJP604
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
+1.5V_SUS_P +1.5V_MEM
4
PJP602
PJP602
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP603
PJP603
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
+1.5V_MEM
+1.5V_MEM
+1.5V_MEM
LA-6592
LA-6592
LA-6592
1
54 67Tuesday, January 18, 2011
54 67Tuesday, January 18, 2011
54 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
4
3
2
1
+1.8V_RUNP
1.8 Volt +/-5% Thermal Design Current: 0.981 A Peak current: 1.402 A
D D
C C
B B
+3.3V_ALW
@PJP14
@
2 1
PAD-OPEN 2x2m~D
PAD-OPEN 2x2m~D
GNDA_1.8V
PJP14
PJP15
@ PJP15
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
PC70
PC70
1 2
0.012U_0402_16V7K~D
0.012U_0402_16V7K~D
+1.8V_RUNP
PC66
PC66
1 2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PR65
PR65
2K_0402_1%~D
2K_0402_1%~D
12
PC68
PC68
PC67
PC67
1 2
@
@
22U_0805_6.3V4Z~D
22U_0805_6.3V4Z~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR63
PR63
12
10_0402_1%~D
10_0402_1%~D
12
PR68
PR68
GNDA_1.8V
12
1.43K_0402_1%~D
1.43K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
+0.75V_DDR_VTT
DDR3 Termination
+1.8V_PWR_SRC
GNDA_1.8V
PR66
PR66
0.018U_0402_16V7K~D
0.018U_0402_16V7K~D
12
PC72 100P_0402_50V8J~DPC72 100P_0402_50V8J~D
12
1 2
.1U_0402_16V7K~D
.1U_0402_16V7K~D
PC71
PC71
12
PC69
PC69
+1.8V_COMP
12
+1.8V_VDD
+1.8V_FB
PR60
PR60 0_0603_5%~D
0_0603_5%~D
PU4
PU4
12
VDD
11
AGND
10
FB
9
COMP
PR69
PR69
57.6K_0402_1%~D
57.6K_0402_1%~D
14
15
VIN13VIN
PGND
TPS51311RGTR_QFN16_3X3~D
TPS51311RGTR_QFN16_3X3~D
MODE
7
8
+1.8V_MODE
1 2
GNDA_1.8V
16
PGND
SW6SW
+1.8V_SW
17
TPAD
1
EN
2
RES
3
PGOOD
4
VBST
SW
5
PC73
PC73
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
+1.8V_EN
+1.8V_VBST
12
PR67
PR67
1 2
PR61
PR61
24k_0402_1%~D
24k_0402_1%~D
3.3_0603_1%~D
3.3_0603_1%~D
RUN_ON <11,38,42,45,64>
12
12
10K_0402_5%~D
10K_0402_5%~D
PR64
PR64
1.8V_RUN_PWRGD connect to U46 Pin B10 (EC)
PL8
PL8
2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
12
PC74
PC74
@
@
680P_0603_50V8J~D
680P_0603_50V8J~D
12
PR70
PR70
@
@
4.7_0805_5%~D
4.7_0805_5%~D
+3.3V_RUN
1.8V_RUN_PWRGD <42>
12
PAD-OPEN 2x2m~D
PAD-OPEN 2x2m~D
OCP_MIN: 1.682 A
PC75
PC75
1 2
22U_0805_6.3V4Z~D
22U_0805_6.3V4Z~D
PJP16
@ PJP16
@
2 1
+1.8V_RUNP
PC76
PC76
22U_0805_6.3V4Z~D
22U_0805_6.3V4Z~D
12
PC77
PC77
1 2
47P_0402_50V8J~D
47P_0402_50V8J~D
+1.8V_RUN+1.8V_RUNP
+5V_ALW
PU5
PJP17
PJP17
+1.5V_MEM
A A
2 1
PAD-OPEN 2x2m~D
PAD-OPEN 2x2m~D
DC_1+0.75V_VTT_PWR_SRC
PC82
PC82
1 2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
5
+0.75V_P
12
PC83
PC83
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC81
PC81
PC80
PC80
1 2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PU5
1
VDDQSNS
VIN
2
VLDOIN
GND
VTTREF
3
VTT
5
1 2
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
VTTSNS
4
S5
S3
PGND
GND
RT9026GFP_MSOP10~D
RT9026GFP_MSOP10~D
11
12
10
8 6
9
7
4
+0.75V_S5
+0.75V_S3
PC78
PC78
4.7U_0805_10V4Z~D
4.7U_0805_10V4Z~D
@
@
PR72
PR72
@
@
PR71
PR71
1 2
0_0402_5%~D
0_0402_5%~D
1 2
0_0402_5%~D
0_0402_5%~D
+V_DDR_REF
PC79
PC79
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
0.75Volt +/-5% Thermal Design Current: 0.525A Peak current: 0.75A
2 1
PAD-OPEN 2x2m~D
PAD-OPEN 2x2m~D
3
DDR_ON <43,49>
0.75V_DDR_VTT_ON <42>
+0.75V_P
PJP18
PJP18
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+0.75V_DDR_VTT
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+0.75V_DDR_VT/+1.8V_RUN
+0.75V_DDR_VT/+1.8V_RUN
+0.75V_DDR_VT/+1.8V_RUN
LA-6592
LA-6592
LA-6592
1
55 67Tuesday, January 18, 2011
55 67Tuesday, January 18, 2011
55 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
4
3
2
1
+1.05V_M
D D
PC84
PC84
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
+1.05VM_VX
GNDA_1.05VM
PC91 100P_0402_50V8J~DPC91 100P_0402_50V8J~D
12
PC92
PR76
C C
5.6K_0402_5%~D
5.6K_0402_5%~D
+1.05V_MP
PR76
0_0402_5%~D
0_0402_5%~D
PR81
PR81
PC92
680P_0402_50V7K~D
680P_0402_50V7K~D
12
PR80 2K_0402_1%~DPR80 2K_0402_1%~D
12
12
1 2
1800P_0402_50V7K~D
1800P_0402_50V7K~D
PC93
PC93
12
12
GNDA_1.05VM
PR82
PR82
2.67K_0402_1%~D
2.67K_0402_1%~D
+1.05VM_COMP
+1.05VM_VFB
12
PC94
PC94
GNDA_1.05VM
+3.3V_ALW
+1.05V_MP
+1.05VM_SS
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
17
VCCA
GND
COMP
VFB
VOUT
SS
16
VIN
VIN
VBST
PGOOD
EN
FSET
MODE
IMON
PGND9SW
PGND
8
7
+1.05VM_VX
12
PR74
PR74
3.3_0603_1%~D
3.3_0603_1%~D
+1.05VM_BST
+1.05VM_PWRGD
+1.05VM_EN
+1.05VM_FSET
+1.05VM_MODE
+1.05VM_IMON
1 2
22.1K_0402_1%~D
22.1K_0402_1%~D
@ PR79
@
12
PR84
@ PR84
@
GNDA_1.05VM
PR79
15
14
13
12
11
10
SN1003055RUWR_QFN17_3P5X3P5~D
SN1003055RUWR_QFN17_3P5X3P5~D
1 2
12
1 2
GNDA_1.05VM
1.33K_0402_1%~D
1.33K_0402_1%~D
PC90
PC90
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
GNDA_1.05VM
PR83
PR83
22K_0402_1%~D
22K_0402_1%~D
0_0402_5%~D
0_0402_5%~D
@
@
PR78
PR78
0_0402_5%~D
0_0402_5%~D
PU6
PU6
1
2
3
4
5
6
PR85 0_0402_5%~D@ PR85 0_0402_5%~D@
PR75
@PR75
@
12
12
+1.05V_PWR_SRC
12
PC85
PC85
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
SIO_SLP_A# <17,42>
A_ON <43,45>
0.42UH_ETQP4LR42AFM_17A_20%~D
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VM_VX
12
@
@
PC95
PC95
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR86
@ PR86
@
7.68K_0805_1%~D
7.68K_0805_1%~D
1 2
12
12
PC87
PC87
PC86
PC86
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
PL9
PL9
12
12
PC88
PC88
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PC97
PC97
PC96
PC96
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
PJP19
PJP19
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PC89
PC89
+5V_ALW
1.05 Volt +/-5% Thermal Design Current : 4.782A Peak current : 6.832A OCP_MIN :8.198A
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+1.05V_MP
12
12
12
12
PC98
PC98
PC99
PC99
PC100
PC100
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
12
PC102
PC102
PC101
PC101
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
12
PC103
PC103
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
PC104
PC104
PC105
PC105
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
12
PC107
PC107
PC106
PC106
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D 6800P_0402_25V7K~D
6800P_0402_25V7K~D
B B
+3.3V_ALW
12
PR87
PR87
100K_0402_1%~D
100K_0402_1%~D
@
@
0_0402_5%~D
0_0402_5%~D
PR88
+1.05VM_PWRGD
1.05V_A_PWRGD * connect to U51 (EC) Pin A14 (Vih => 2V)
A A
PR88
12
1.05V_A_PWRGD <43>
GNDA_1.05VM
PJP20
PJP20
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
+1.05V_MP
PJP21
PJP21
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP22
PJP22
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+1.05V_M
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
+1.05V_M
+1.05V_M
+1.05V_M
LA-6592
LA-6592
LA-6592
1
56 67Tuesday, January 18, 2011
56 67Tuesday, January 18, 2011
56 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
4
3
2
1
+1.05VTT
1.05Volt => (+/- 5% AC + DC +Ripple ) => (+/- 2% DC + Ripple)
PC108
PC108
1U_0402_6.3V6K~D
GNDA_1.05VTT
12
680P_0402_50V7K~D
680P_0402_50V7K~D
12
1 2
12
1800P_0402_50V7K~D
1800P_0402_50V7K~D
PC117
PC117
1U_0402_6.3V6K~D
PC116
PC116
12
PR105
PR105
20K_0402_0.5%~D
20K_0402_0.5%~D
12
GNDA_1.05VTT
12
+1.05VTT_VX
17
16
VIN
VIN
+1.05VTT_BST
VCCA
GND
COMP
VFB
VOUT
SS
PGND
7
12
1.05V_VTTPWRGD * connect to PU13 Pin 15 (Vih => 2V) * connect to U50 Pin 1 (Vih => 2.31V)
15
VBST
+1.05VTT_PWRGD
14
PGOOD
+1.05VTT_EN
13
EN
+1.05VTT_FSET
12
FSET
+1.05VTT_MODE
11
MODE
+1.05VTT_IMON
10
IMON
PGND9SW
SN1003055RUWR_QFN17_3P5X3P5~D
SN1003055RUWR_QFN17_3P5X3P5~D
8
+1.05VTT_VX
PR101
PR101
9.31K_0402_1%~D
9.31K_0402_1%~D
@
@
PR103
PR103
1 2
0_0402_5%~D
0_0402_5%~D
13.3K_0402_1%~D
13.3K_0402_1%~D PR104
PR104
12
12
PR89
PR89
2.2_0603_5%~D
2.2_0603_5%~D
1 2
22.1K_0402_1%~D
22.1K_0402_1%~D
@ PR92
@
PR97
PR97
GNDA_1.05VTT
+5V_RUN
1.05V_VTTPWRGD <43,62>
PR92
GNDA_1.05VTT
12
22.1K_0402_1%~D
22.1K_0402_1%~D
PC114
PC114
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
1 2
@
@
PR91
PR91
0_0402_5%~D
0_0402_5%~D
1 2
12
PR95
PR95
1 2
0_0402_5%~D
0_0402_5%~D
GNDA_1.05VTT
12
3.09K_0402_0.5%~D
3.09K_0402_0.5%~D
GNDA_1.05VTT
PR96
PR96
+3.3V_ALW
+1.05VTT_COMP
+1.05VTT_VFB
+1.05VTT_SENSE
+1.05VTT_SS
12
PC118
PC118
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
PU7
PU7
1
2
3
4
5
6
PR98 0_0402_5%~D@ PR98 0_0402_5%~D@
+1.05VTT_PWRGD
D D
PC115 100P_0402_50V8J~DPC115 100P_0402_50V8J~D
PR90
PR90
5.6K_0402_5%~D
5.6K_0402_5%~D
12
PR93 2K_0402_0.5%~DPR93 2K_0402_0.5%~D
0_0402_5%~D
0_0402_5%~D
PR94
PR94
+1.05VTT_SENSE
C C
B B
PC351
PC351
@
@
22U_0805_6.3V4Z~D
22U_0805_6.3V4Z~D
CPU_VTT_ON
+1.05VTT_PWR_SRC
PC350
PC350
1 2
1 2
@
@
22U_0805_6.3V4Z~D
22U_0805_6.3V4Z~D
<42,62>
0.42UH_ETQP4LR42AFM_17A_20%~D
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VTT_VX
12
@
@
PC119
PC119
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR99
@ PR99
@
7.68K_0805_1%~D
7.68K_0805_1%~D
1 2
GNDA_1.05VTT
PC109
@ PC109
@
12
10U_1206_25V6M~D
10U_1206_25V6M~D
PL10
PL10
12
PC110
PC110
10U_1206_25V6M~D
10U_1206_25V6M~D
12
+1.05VTT_SENSE
12
12
PC112
PC112
PC111
PC111
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
12
PC120
PC120
PC129
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PC129
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
PR102
PR102
1 2
0_0402_5%~D
0_0402_5%~D
PR461
PR461
1 2
0_0402_5%~D
0_0402_5%~D
PR100
PR100
10_0402_5%~D
10_0402_5%~D
PJP23
PJP23
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PC113
PC113
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
12
PC122
PC122
PC121
PC121
47U_0805_4V6M~D
47U_0805_4V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
+5V_ALW
12
12
PC130
PC130
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
PC124
PC124
PC123
PC123
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
VTT_SENSE <10>
VTT_GND <10>
12
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
12
PC126
PC126
PC125
PC125
47U_0805_4V6M~D
47U_0805_4V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
Thermal Design Current : 5.980A Peack current : 8.970A OCP_MIN : 10.764A
+1.05VTTP
12
PC127
PC127
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
12
12
PC131
PC131
PC128
PC128
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D 6800P_0402_25V7K~D
6800P_0402_25V7K~D
PJP25
PJP24
PJP24
1 2
PAD-OPEN 43X118
PAD-OPEN 43X118
PJP26
+1.05VTTP
A A
PJP26
1 2
PAD-OPEN 43X118
PAD-OPEN 43X118
+1.05V_RUN_VTT
GNDA_1.05VTT
PJP25
PAD-OPEN1x1m
PAD-OPEN1x1m
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ISL95870A +1.05V_RUN_VTT
ISL95870A +1.05V_RUN_VTT
ISL95870A +1.05V_RUN_VTT
LA-6592
LA-6592
LA-6592
1
57 67Tuesday, January 18, 2011
57 67Tuesday, January 18, 2011
57 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
VCC_Core Thermal Design Current : 53A Peak current : 94A OCP_MIN :112.8A
D D
Layout Note: P
C142 close to PIN19
0_0402_5%~D
0_0402_5%~D
PR121
@ PR121
@
+5V_ALW
C C
12
PC141
PC141
@
@
1U_0603_10V6K~D
1U_0603_10V6K~D
+VCC_PWR_SRC
+VGFX_PWR_SRC
PR410 10_0402_1%~D@ PR410 10_0402_1%~D@
VSSSENSE<10>
1 2
1 2
PC142
PC142
+Vcore_VDD
2.2U_0603_10V7K~D
2.2U_0603_10V7K~D
12
PR138 10_0402_1%~DPR138 10_0402_1%~D
Local sense resister put HW side
VCCSENSE<10>
PR411 10_0402_1%~D@ PR411 10_0402_1%~D@
1 2
+1.05V_RUN_VTT
H_PROCHOT#<7, 43>
GNDA_VCC
PR149 10_0402_5%~DPR149 10_0402_5%~D
1 2
1 2
PR158 10_0402_5%~DPR158 10_0402_5%~D
PJP28
PJP28
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
PR153 10_0402_1%~DPR153 10_0402_1%~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
PR156 10_0402_1%~DPR156 10_0402_1%~D
+3.3V_RUN
10K_0402_1%~D
10K_0402_1%~D
VSS_AXG_SENSE<11>
B B
VCC_AXG_SENSE<11>
+VCC_GFXCORE
IMVP_PGOOD<42>
IMVP_PGOOD connect to U46 Pin A62 (EC)
A A
GNDA_VCC
PR139 10_0402_1%~DPR139 10_0402_1%~D
PR143 75_0402_5%~D@ PR143 75_0402_5%~D@
1 2
PC168 43P_0402_50V8J
PC168 43P_0402_50V8J
@
@
+GFX_CSPBAVE<60>
GNDA_VCC
1 2
PC165
@PC165
@
1 2
PR165
PR165
@
@
1 2
1 2
0_0402_5%~D
0_0402_5%~D
Vcore/VAXG H/S Mosfet
Main (X7630031L08)
2nd
3rd (X7630031L09)
5
PC701 0.033U_0402_16V7K~DPC701 0.033U_0402_16V7K~D
PC136
PC136
1 2
0.33U_0603_10V7K~D
0.33U_0603_10V7K~D
PR109
PR109
40.2K_0402_1%~D
40.2K_0402_1%~D
1 2
10K_0402_1%_ERTJ0EG103FA~D
10K_0402_1%_ERTJ0EG103FA~D
PR122 10_0402_5%~DPR122 10_0402_5%~D
1 2
2.2U_0603_10V7K~D
2.2U_0603_10V7K~D
GNDA_VCC
1 2
@ PC150
@
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1 2
0_0402_5%~D
0_0402_5%~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
12
1000P_0402_50V7K~D
1000P_0402_50V7K~D
GNDA_VCC
PR166
PR166
1 2
1 2
1 2
PR132 200K_0402_1%~DPR132 200K_0402_1%~D
1 2
PR136 200K_0402_1%~DPR136 200K_0402_1%~D
PC150
1 2
@
@
PR146
PR146
1 2
0_0402_5%~D
0_0402_5%~D
12
@
@
PR199
PR199
PC205
@ PC205
@
1 2
+VGFX_GNDSB
12
PC163
PC163
1000P_0402_50V7K~D
1000P_0402_50V7K~D
GNDA_VCC
PR157 7.5K_0402_1%~D
PR157 7.5K_0402_1%~D
12
PC167
PC167
+GFX_POKB
@
@
PR171
PR171
+Vcore_POKA
0_0402_5%~D
0_0402_5%~D
12
12
PH1
PH1
PC143
PC143
1.05V_0.8V_PWROK<15,43>
IMVP_VR_ON<42>
12
12
PC158
PC158
1000P_0402_50V7K~D
1000P_0402_50V7K~D
GNDA_VCC
+Vcore_VCC
+VGFX_FBB
PR118
PR118
12
1_0603_1%~D
1_0603_1%~D
PR111
PR111
12
2.1K_0402_1%~D
2.1K_0402_1%~D
@
@
PR129
PR129
PR131 0_0402_5%~D@ PR131 0_0402_5%~D@
GNDA_VCC
+VGFX_TONB
+Vcore_GNDSA
12
PC149
PC149
1000P_0402_50V7K~D
1000P_0402_50V7K~D
GNDA_VCC
PR140 12.7K_0402_1%~DPR140 12.7K_0402_1%~D
+GFX_CSNB<60>
+GFX_POKB
+Vcore_FBA
12
+Vcore_VRHOT#
GNDA_VCC
+VGFX_FBB
+VGFX_GNDSB
+GFX_CSPB1
PR198
PR198
@
@
1 2
0_0402_5%~D
0_0402_5%~D
+GFX_BSTB<60>
+GFX_LXB<60>
+GFX_DHB<60>
+GFX_DLB<60>
+1.05V_RUN_VTT
VIDSOUT<10>
VIDALERT_N<10>
VIDSCLK<10>
PQ9,PQ13,PQ18,PQ24,PQ60,PQ52
AON6414AL
SIR472
MDU2657RH MDU2653RH
4
12
PR110 4.32K_0402_1%~DPR110 4.32K_0402_1%~D
12
PR112 4.32K_0402_1%~DPR112 4.32K_0402_1%~D
12
PR115 4.32K_0402_1%~DPR115 4.32K_0402_1%~D
1 2
0_0402_5%~D
0_0402_5%~D
1 2
49
PU9
PU9
TPAD
1
TONB
2
GNDSA
3
FBA
4
VRHOT#
5
AGND
6
FBB
7
GNDSB
8
CSPBAVE
9
CSPB1
10
CSNB
11
CSPB2
12
POKB
PC173 0.1U_0402_25V6K~DPC173 0.1U_0402_25V6K~D
PR159 130_0402_1%~DPR159 130_0402_1%~D
PR160 130_0402_1%~D@ PR160 130_0402_1%~D@
PR162 54.9_0402_1%~DPR162 54.9_0402_1%~D
1 2
PR164 0_0402_5%~DPR164 0_0402_5%~D
1 2
PR167 0_0402_5%~DPR167 0_0402_5%~D
1 2
PR168 0_0402_5%~DPR168 0_0402_5%~D
4
P1_SW
P2_SW
P3_SW
+Vcore_CSPA1
+Vcore_CSPA3
+Vcore_CSPA2
+Vcore_CSNA
+Vcore_CSPAAVE
+VGFX_THERMB
+Vcore_VCC
+Vcore_EN
+Vcore_TONA
48
47
TONA
DRVPWMB13BSTB14LXB15DHB16PGNDB17DLB18VDDB19AGND20ALERT#22CLK23POKA
1 2
43
44
46
EN
VCC
CSPA345CSPA2
MAX17411GTM+_TQFN48_6X6~D
MAX17411GTM+_TQFN48_6X6~D
12
12
12
+Vcore_THERMA
41
39
42
CSNA
CSPA1
THERMB40THERMA
CSPAAVE
VDIO
21
+Vcore_VDIO
+Vcore_VDD
+Vcore_ALERT#
GNDA_VCC
Vcore/VAXG L/S Mosfet
Main (X7630031L08)
2nd
3rd (X7630031L09)
PC138
PC138
1U_0603_10V6K~D
1U_0603_10V6K~D
+Vcore_PWMA
+Vcore_SR
38
37
SR
DRVPWMA
IMAXB
IMAXA
BSTA2
DHA2
PGNDA
VDDA
DHA1
BSTA1
24
+Vcore_CLK
+Vcore_POKA
LXA2
DLA2
DLA1
LXA1
12
+5V_ALW
36
35
34
33
32
31
30
29
28
27
26
25
+GFX_IMAXB
+Vcore_IMAXA
BOST2
PHASE2
UGATE2
LGAT2
+Vcore_VDD
3
UGATE3
PR107
PR107
2.2_0603_5%~D
2.2_0603_5%~D
PHASE3
PR127
PR127
1 2
165K_0402_1%~D
165K_0402_1%~D
PR135
PR135
1 2
105K_0402_1%~D
105K_0402_1%~D
PR141
PR141
2.2_0603_5%~D
2.2_0603_5%~D
BT1_1
12
BT3_1
12
12
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1 2
+Vcore_IMAXA
+GFX_IMAXB
1 2
PC157
PC157
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
BT2_1
1 2
12
12
PC161
PC161
4700P_0402_25V7K~D
4700P_0402_25V7K~D
PC174
PC174
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
1 2
12
PC176
PC176
4700P_0402_25V7K~D
4700P_0402_25V7K~D
PU8
PU8
5
6
2
3
9
PR123
PR123
5.62K_0402_1%~D
5.62K_0402_1%~D
PH2
PH2
100K_0402_1%_TSM0B104F4251RZ~D
100K_0402_1%_TSM0B104F4251RZ~D
1
BST
VDD
8
SKIP
DH
7
PWM
LX
4
DL
GND
EP
MAX17491GTA+T_TQFN8_3X3~D
MAX17491GTA+T_TQFN8_3X3~D
PR124
PR124
1 2
1 2
5.62K_0402_1%~D
5.62K_0402_1%~D
PH3
PH3
@
@
1 2
1 2
GNDA_VCC
100K_0402_1%_TSM0B104F4251RZ~D
100K_0402_1%_TSM0B104F4251RZ~D
12
UGATE1
BOST1
PHASE1
PR125
PR125
PR133
PR133
PC160
PC160
LGATE1
1K_0402_1%~D
1K_0402_1%~D
10K_0402_1%~D
10K_0402_1%~D
1 2
1 2
2.2U_0603_10V7K~D
2.2U_0603_10V7K~D
PR161
PR161
2.2_0603_5%~D
2.2_0603_5%~D
BOST3
LGATE3
+Vcore_VCC
PR126
PR126
165K_0402_1%~D
165K_0402_1%~D
PR134
PR134
105K_0402_1%~D
105K_0402_1%~D
PQ11,PQ12,PQ15,PQ16,PQ19,PQ20,PQ25,PQ26,PQ53
AON6704L
SIR164DP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PC137
PC137
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
1 2
PC140
PC140
PQ19
PQ19
2
PQ9
PQ9
PQ11
PQ11
4
PQ13
PQ13
3 5
5
PQ15
PQ15
4
PQ17
PQ17
@
@
3 5
241
5
4
123
PQ10
PQ10
@
@
AON6414AL 1N DFN
AON6414AL 1N DFN
3 5
241
5
241
123
AON6414AL 1N DFN
AON6414AL 1N DFN
AON6704L_DFN8-5
AON6704L_DFN8-5
3 5
5
4
AON6704L_DFN8-5
AON6704L_DFN8-5
123
PQ14
PQ14
@
@
AON6414AL 1N DFN
AON6414AL 1N DFN
3 5
241
5
4
AON6704L_DFN8-5
AON6704L_DFN8-5
PQ18
PQ18
AON6414AL 1N DFN
AON6414AL 1N DFN
3 5
241
5
PQ20
PQ20
4
123
GNDA_VCC
+Vcore_CSNA
GNDA_VCC
2
AON6414AL 1N DFN
AON6414AL 1N DFN
241
PQ12
PQ12
123
+Vcore_CSPA3
GNDA_VCC
+Vcore_CSNA
PC401
PC401
AON6414AL 1N DFN
AON6414AL 1N DFN
PQ16
PQ16
AON6704L_DFN8-5
AON6704L_DFN8-5
123
+Vcore_CSPA2
GNDA_VCC
+Vcore_CSNA
12
PC402
PC402
10U_1206_25VAK~D
10U_1206_25VAK~D
AON6704L_DFN8-5
AON6704L_DFN8-5
+Vcore_CSPA1
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
PC400
PC400
10U_1206_25VAK~D
10U_1206_25VAK~D
AON6704L_DFN8-5
AON6704L_DFN8-5
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
PC148
PC148
10U_1206_25VAK~D
10U_1206_25VAK~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC159
PC159
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
PC169
PC169
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PC175
PC175
PR173
PR173
1 2
PC178
@ PC178
@
1 2
PC180
@ PC180
@
1 2
12
PC132
PC132
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PC139
PC139
PR117
PR117
1 2
1_1206_1%~D
1_1206_1%~D
PC145
@ PC145
@ 1 2
12
12
PC151
PC151
2200P_0402_50V7K~D
2200P_0402_50V7K~D
12
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PR148
PR148
1 2
1_1206_1%~D
1_1206_1%~D
PC164
@ PC164
@ 1 2
12
PC170
PC170
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1_1206_1%~D
1_1206_1%~D
12
12
12
PC133
PC133
2200P_0402_50V7K~D
2200P_0402_50V7K~D
12
+VCC_PWR_SRC
12
PC152
PC152
10U_1206_25VAK~D
10U_1206_25VAK~D
12
12
PC171
PC171
10U_1206_25VAK~D
10U_1206_25VAK~D
PR177
PR177 0_0402_5%~D
0_0402_5%~D
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
12
PC134
PC134
PC135
PC135
10U_1206_25VAK~D
10U_1206_25VAK~D
10U_1206_25VAK~D
10U_1206_25VAK~D
PR113
PR113
PR128
PR128 0_0402_5%~D
0_0402_5%~D
PC146
PC146
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
12
1
12
PC154
PC154
PC153
PC153
2
100U_25V_M~D
100U_25V_M~D
10U_1206_25VAK~D
10U_1206_25VAK~D
12
PR144
PR144
PR154
PR154 0_0402_5%~D
0_0402_5%~D
PC166
PC166
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
12
+VCC_PWR_SRC
12
PC172
PC172
10U_1206_25VAK~D
10U_1206_25VAK~D
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
P1_SW P1_Vo
12
2.1K_0402_1%~D
2.1K_0402_1%~D
PR169
PR169
PC179
PC179
12
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+VCC_PWR_SRC
PL11
PL11
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
P3_SW P3_Vo
12
2.1K_0402_1%~D
2.1K_0402_1%~D
+
+
PC155
PC155
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
4
P2_SW P2_Vo
3
2.1K_0402_1%~D
2.1K_0402_1%~D
PL13
PL13
4
3
22.1K_0402_1%~D
22.1K_0402_1%~D
PC177
@PC177
@
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
4
3
PR120
PR120
12
22.1K_0402_1%~D
22.1K_0402_1%~D
PC144
@ PC144
@
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
1
+
+
+
+
PC156
PC156
2
2
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
PL12
PL12
1
2
PR152
PR152
12
22.1K_0402_1%~D
22.1K_0402_1%~D
PC162
@PC162
@
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
2
PR176
PR176
12
Vcore
Vcore
Vcore
LA-6592
LA-6592
LA-6592
1
1
2
12
PJP27
PJP27
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PR145
PR145 1_0402_5%~D
1_0402_5%~D
12
PR170
PR170 1_0402_5%~D
1_0402_5%~D
PR114
PR114 1_0402_5%~D
1_0402_5%~D
58 67Tuesday, January 18, 2011
58 67Tuesday, January 18, 2011
58 67Tuesday, January 18, 2011
+VCC_CORE
+VCC_CORE
+VCC_CORE
+PWR_SRC
0.4
0.4
0.4
5
4
3
2
1
VCC_AXG
D D
Thermal Design Current : 21.5A Peak current : 33A OCP_MIN :39.6A
+VGFX_PWR_SRC
12
PC403
PC403
10U_1206_25VAK~D
10U_1206_25VAK~D
AON6704L_DFN8-5
AON6704L_DFN8-5
0_0603_1%~D
0_0603_1%~D
2.1K_0402_1%~D
2.1K_0402_1%~D
PR119
PR119
PR203
PR203
12
PC193
PC193
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PC198
PC198
PR193
PR193
1 2
12
12
1_1206_1%~D
1_1206_1%~D
PQ60
PQ24
PQ24
+GFX_DHB<59>
C C
B B
+GFX_BSTB<59>
+GFX_LXB<59>
+GFX_DLB<59>
PR189
PR189
2.2_0603_5%~D
2.2_0603_5%~D
12
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
GBT1_1
1 2
12
PC203
PC203
4700P_0402_25V7K~D
4700P_0402_25V7K~D
PC197
PC197
PQ25
PQ25
4
+GFX_CSNB<59>
GNDA_VCC
1000P_0402_50V7K~D
1000P_0402_50V7K~D
+GFX_CSPBAVE<59>
PQ60
AON6414AL 1N DFN
AON6414AL 1N DFN
3 5
3 5
241
5
123
10K_0402_1%_ERTJ0EG103FA~D
10K_0402_1%_ERTJ0EG103FA~D
PC207
@ PC207
@
1 2
241
5
4
AON6704L_DFN8-5
AON6704L_DFN8-5
PC702 0.033U_0402_16V7K~DPC702 0.033U_0402_16V7K~D
PC208
PC208
1 2
0.33U_0603_10V7K~D
0.33U_0603_10V7K~D
PR201
PR201
40.2K_0402_1%~D
40.2K_0402_1%~D
PH4
PH4
1 2
AON6414AL 1N DFN
AON6414AL 1N DFN
PQ26
PQ26
123
12
12
PC194
PC194
2200P_0402_50V7K~D
2200P_0402_50V7K~D
12
PC195
PC195
10U_1206_25VAK~D
10U_1206_25VAK~D
PR190
PR190
1.43K_0402_1%~D
1.43K_0402_1%~D
12
PC196
PC196
10U_1206_25VAK~D
10U_1206_25VAK~D
12
PJP29
PJP29
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PL15
PL15
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
4
GP1_SW GP1_Vo
3
+PWR_SRC
1
2
+VCC_GFXCORE
1
1
12
+
+
PC201
PC201
PC202
PC202
2
PC200
PC200
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
470U_D2_2VM_R4.5M~D
12
PR191
PR191
1_0402_5%~D
1_0402_5%~D
470U_D2_2VM_R4.5M~D
12
+
+
PC199
PC199
2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
+VCORE/+GFXCORE
+VCORE/+GFXCORE
+VCORE/+GFXCORE
LA-6592
LA-6592
LA-6592
1
59 67Tuesday, January 18, 2011
59 67Tuesday, January 18, 2011
59 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
4
3
2
1
PU11 PR215
PD14@
PD14@
2 1
SBR3A40SA-13_SMA2
SBR3A40SA-13_SMA2
PQ27
PQ27
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
8
+DC_IN_SS
D D
7
5
1 2 36
4
@
@
PR206
PR206
1 2
0_0402_5%~D
0_0402_5%~D
DC_BLOCK_GC <63>
CSS_GC<63>
E2 AC_OK=17.7 Volt
PR218 TI bq24745 = 316K Intersil ISL88731 = 226K Maxim = 383K
49.9K_0402_1%~D
49.9K_0402_1%~D
C C
B B
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
GNDA_CHG
CHARGER_SMBCLK<43>
CHARGER_SMBDAT<43>
PR218
PR218
12
PC216
PC216
12
+5V_ALW
PC223
PC223
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+SDC_IN
PR217
PR217
1 2
316K_0402_1%~D
316K_0402_1%~D
GNDA_CHG
MAX8731A_LDO
ACAV_IN<23,43,63>
12
MAX8731_IINP<23>
MAX8731_REF
12
PR215
PR214
PR214
@
@
PR215
10K_0402_1%~D
10K_0402_1%~D
12
PR222
PR222
@
@
15.8K_0402_1%~D
15.8K_0402_1%~D
12
PR229
PR229
@
@
8.45K_0402_1%~D
8.45K_0402_1%~D
+CHGR_DC_IN<63>
12
10K_0402_5%~D
10K_0402_5%~D
@
@
PR221
PR221
1 2
0_0402_5%~D
0_0402_5%~D
1 2
PR224
PR224
200K_0402_5%~D
200K_0402_5%~D
12
PR226
PR226
PC228
PC228
4.7K_0402_5%~D
4.7K_0402_5%~D 120P_0402_50VNPO~D
120P_0402_50VNPO~D
1 2
12
12
PC229
PC229
PC231
PC231
@
@
220P_0402_50V8J~D
220P_0402_50V8J~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
Maximum charging current is 6.3A
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PC227
PC227
1 2
56P_0402_50V8~D
56P_0402_50V8~D
12
12
PC232
PC232
PC233
PC233
@
@
@
@
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
DYN_TUR_CURRENT_SET#
90W
130W
A A
DYN_TUR_CURRNT_SET#
<57>
High
Low
PR801
@ PR801
@
ICOUT ICREF
1 2
649K_0402_1%~D
649K_0402_1%~D
PR802
PR802
162K_0402_1%~D
162K_0402_1%~D
2
G
G
PR803
PR803
150K_0402_1%~D
150K_0402_1%~D
12
13
D
D
PQ801
PQ801
S
S
RHU002N06_SOT323-3~D
RHU002N06_SOT323-3~D
+3.3V_ALW2
12
1 2
MAX8731_IINP
PR804
PR804
113K_0402_1%~D
113K_0402_1%~D
12
PC801
PC801
100P_0402_50V8J~D
100P_0402_50V8J~D
PR805
PR805
20K_0402_1%~D
20K_0402_1%~D
1 2
1 2
PR806 0_0402_5%~DPR806 0_0402_5%~D
12
12
PC244
PC244
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
PR807
PR807
0_0402_5%~D
0_0402_5%~D
1 2
12
PC802
PC802
@
@
220P_0402_50V8J~D
220P_0402_50V8J~D
+SDC_IN
@
@
PR207
PR207
1 2
0_0402_5%~D
0_0402_5%~D
PR213
PR213
1 2
1_0805_5%~D
1_0805_5%~D
PC215
PC215
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
GNDA_CHG
1 2
12
PC225
PC225
7.5K_0402_5%~D
7.5K_0402_5%~D
MAX8731_REF
PR228
PR228
1 2
10K_0402_5%~D
10K_0402_5%~D
12
PC234
PC234
1U_0603_10V6K~D
1U_0603_10V6K~D
GNDA_CHG
+5V_ALW +5V_ALW
PC245
PC245
PR808
PR808
@
@
1.8M_0402_1%
1.8M_0402_1%
1 2
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
8
5
P
+
7
O
6
-
G
PU12B
PU12B
4
LM393DR_SO8~D
LM393DR_SO8~D
@
@
12
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
GNDA_CHG
12
MAX8731_IINP
PR225
PR225
12
PC235
PC235
@
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PR809
PR809 221K_0402_1%~D
221K_0402_1%~D
1 2
PC210
PC210
1 2
DCIN
PC212
PC212
ICREF
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PQ29
PQ29
22
13
11
10
14
12
29
2
G
G
Adapter Protection Circuit for Turbo Mode
5
4
PR205
PR205
0.01_1206_1%~D
0.01_1206_1%~D
4
3
13
D
D
2
G
G
S
S
CSSP_1
PR208
PR208
10K_0402_5%~D
10K_0402_5%~D
12
PR209
PR209
PC213
PC213 0_0402_5%~D
0_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
1
28
PU11
PU11
DCIN
CSSP
ICREF
2
ACIN
ACOK
VDDSMB
SCL
9
SDA
NC
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
GND
TP
BQ24747RHDR_QFN28_5X5~D
BQ24747RHDR_QFN28_5X5~D
DYN_TUR_PWR_VO
12
PR810
PR810 0_0402_5%~D
0_0402_5%~D
13
D
D
PQ802
PQ802
S
S
RHU002N06_SOT323-3~D
RHU002N06_SOT323-3~D
1
2
13
D
D
PQ28
PQ28
2
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
G
G
S
S
CSSN_1
12
12
PR210
PR210
0_0402_5%~D
0_0402_5%~D
1 2
PC292
@PC292
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
27
ICOUT
26
ICOUT
CSSN
2.2_0603_1%~D
2.2_0603_1%~D
BOOT
25
1 2
BOOT
MAX8731A_LDO
21
VDDP
24
UGATE
23
PHASE
12
@ PC224
@
220P_0402_50V7K~D
220P_0402_50V7K~D
20
LGATE
19
PGND
18
CSOP
17
CSON
VFB
15
VFB
16
NC
GNDA_CHG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
S
S
12
PR211
PR211
100K_0402_1%~D
100K_0402_1%~D
GNDA_CHG
33_0603_1%~D
33_0603_1%~D
PR219
PR219
PC217
PC217
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR223
PR223
12
1_0603_1%~D
1_0603_1%~D
PC224
PR230
PR230
1 2
100_0402_5%~D
100_0402_5%~D
PJP34
PJP34
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
PQ30A
PQ30A
G
G
1
BOOT_D
12
CHG_LGATE
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
D
D
65
PQ30B
PQ30B
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
S
S
12
G
G
3
PR212
PR212
100K_0402_1%~D
100K_0402_1%~D
PR220
@ PR220
@
PC214
12
@ PC214
@
1 2
GNDA_CHG
PD15
PD15
PC222
PC222
1 2
1U_0603_10V6K~D
1U_0603_10V6K~D
BAT54HT1G_SOD323-2~D
BAT54HT1G_SOD323-2~D
+VCHGR_B
+VCHGR
MAX8731_REF
+DC_IN
PR235
PR235
232K_0402_1%~D
232K_0402_1%~D
12
PC242
PC242
PR241
PR241
22.6K_0402_1%~D
22.6K_0402_1%~D
100P_0402_50V8J~D
100P_0402_50V8J~D
Main
2nd
PJP33
PJP33
1U_0603_10V6K~D
1U_0603_10V6K~D
12
12
PL16
PL16
1 2
12
D
D
42
@
@
PR216
PR216
1 2
0_0402_5%~D
0_0402_5%~D
PR811
@ PR811
@
0_0402_5%~D
0_0402_5%~D
@
@
12
PR237
PR237
47K_0402_1%~D
47K_0402_1%~D
12
PR242
PR242
42.2K_0402_1%~D
42.2K_0402_1%~D
PR223
1 ohm
0 ohm
12
PC209
PC209
47P_0402_50V8J~D
47P_0402_50V8J~D
DOCK_DCIN_IS+ <41>
DOCK_DCIN_IS- <41>
DYN_TUR_PWR_VO
@ PC803
@
12
1 2
220P_0402_50V8J~D
220P_0402_50V8J~D
12
PR812
@PR812
@
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW
CHG_UGATE
12
PC226
PC226
3300P_0402_50V7K~D
3300P_0402_50V7K~D
578
3 6
241
12
PC243
PC243
100P_0402_50V8J~D
100P_0402_50V8J~D
PR220
@
4.7 ohm
12
PC211
PC211
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
SW
HW
DK_CSS_GC <63>
PC803
PQ31
PQ31
5.6UH 20% FDVE1040-H-5R6M=P3_9.2A_20%~D
5.6UH 20% FDVE1040-H-5R6M=P3_9.2A_20%~D
PQ33
PQ33
SI4812BDY-T1-GE3_SO8~D
SI4812BDY-T1-GE3_SO8~D
PR236
PR236
1M_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
8
3
+
2
-
4
PC214
@
1u
GNDA_CHG
3 5
241
SIR472DP-T1-GE3_SO8~D
SIR472DP-T1-GE3_SO8~D
12
PC230
PC230
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PR234
PR234
4.7_1206_5%~D
4.7_1206_5%~D
1 2
GNDA_CHG
PU12A
PU12A
P
1
O
G
LM393DR_SO8~D
LM393DR_SO8~D
PC292
2
PR813 0_0402_5%~D@ PR813 0_0402_5%~D@
PR814 0_0402_5%~DPR814 0_0402_5%~D
PL17
PL17
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
@
@
@
0.1u
Main (X7630031L12)
2nd (X7630031L13)
Adapter Protection Event
PR813 PR814
@0 Ohm 100k
@ 0 Ohm @
+VCHGR_L
12
PR232
PR232
PR239
PR239
PR243
PR243
@
@
12
PC218
PC218
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.01_1206_1%~D
0.01_1206_1%~D
4
3
12
0_0402_5%~D
0_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
MAX8731_REF
12
10K_0402_1%~D
10K_0402_1%~D
12
41.2K_0402_1%~D
41.2K_0402_1%~D
PR210
0 ohm
10 ohm
DYN_TUR_PWR_ALRT#
H_PROCHOT#
PC219
PC219
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR227
PR227
PC241
PC241
1 2
@
@
1 2
0_0402_5%~D
0_0402_5%~D
1 2
1 2
PC240
PC240
1 2
+3.3V_ALW
12
PR238
PR238
100K_0402_1%~D
100K_0402_1%~D
PR209
0 ohm
10 ohm
PR812
12
PR240
PR240
PC213
0.1u
0.047u
BQ24747
ISL88731C
CHAGER_SRC+PWR_SRC
<23>
<7,43>
12
12
PC220
PC220
PC221
PC221
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1
2
12
12
PR233
PR233
PC236
PC236 0_0402_5%~D
0_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
PC293
@ PC293
@
PC237
PC237
10U_1206_25V6M~D
10U_1206_25V6M~D
GNDA_CHG
ACAV_IN_NB <42,43,63>
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
10K
@
PR217
Main
2nd
316K
226K
PC231
Main
2nd
@
0.01u
PR228
Main
2nd
10K
@
PC228
Main
2nd
120P
@
PC240
12
PC239
PC239
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
ACAV_IN
RHU002N06_SOT323-3~D
RHU002N06_SOT323-3~D
0.1u
@
12
PR231
PR231
@
@
2
G
G
@
@
PQ34
PQ34
1
Main
2nd
+VCHGR
12
PC238
PC238
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Charger
Charger
Charger
LA-6592
LA-6592
LA-6592
1.8K_1206_5%~D
1.8K_1206_5%~D
PR214
@
10K
12
13
D
D
S
S
PC229
220P
@
PR224
200K
@
PC225
2200P
@
PC234
1u
@
PC241
0.1u
0.22u
60 67Tuesday, January 18, 2011
60 67Tuesday, January 18, 2011
60 67Tuesday, January 18, 2011
PR222
@
15.8K
PR226
4.7K
2.2K
PR225
7.5K
@
PC227
56P
@
PC233
@
0.01u
PR232
0 ohm
10 ohm
0.4
0.4
0.4
5
4
3
2
1
D D
VCCSA Thermal Design Current : 4.2A Peak current : 6A OCP_MIN :7.2A
PJP35
12
PJP35
1 2
PAD-OPEN 43X118
PAD-OPEN 43X118
10_0402_5%~D
10_0402_5%~D
+PWR_SRC
+VCCSA_P
12
PR246
PR246
1
12
PC255
PC255
PC258
PC258
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
12
PR257
PR257
10_0402_5%~D
10_0402_5%~D
12
+
+
2
PC256
PC256
330U_D2_2VY_R7M~D
330U_D2_2VY_R7M~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PR253
PR253
12
0_0402_5%~D
0_0402_5%~D
PC257
PC257
12
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
12
PC260
PC260
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+VCCSA_SENSE <11>
+GND_VCC_SA <11>
+VCCSA_PWR_SRC
+5V_RUN
PC250
PC250
1U_0603_10V6K~D
1U_0603_10V6K~D
1 2
+VCCSA_VCC
+VCCSA_LGATE
20
1
PU13
PU13
PVCC
LGATE
2
C C
+1.05V_RUN
PR249
@PR249
@
0_0402_5%~D
0_0402_5%~D
VCCSA_VID_1<11>
B B
1 2
1 2
+1.05V_RUN
1 2
1 2
PR295
PR295 1K_0402_5%~D
1K_0402_5%~D
PR263
@ PR263
@
10K_0402_5%~D
10K_0402_5%~D
PR266
PR266 1K_0402_5%~D
1K_0402_5%~D
GNDA_VCCSA
GNDA_VCCSA
+VCCSA_RTN
VCCSA_VID_1
+VCCSA_VID0
PR259
PR259
1 2
47.5K_0402_1%~D
47.5K_0402_1%~D
+VCCSA_SREF
+VCCSA_SET0
+VCCSA_SET1
GNDA_VCCSA
12
PR250
PR250 113K_0402_1%~D
113K_0402_1%~D
1 2
PC262
PC262
.068U_0603_16V7~D
.068U_0603_16V7~D
12
PR256
PR256 140K_0402_1%~D
140K_0402_1%~D
3
4
5
6
7
8
9
PR260
@ PR260
@
4.12K_0402_1%~D
4.12K_0402_1%~D
1 2
PGND
GND
RTN
VID1
VID0
SREF
SET0
SET1
FB10OCSET
+VCCSA_FB
12
PR261
PR261
0_0402_5%~D
0_0402_5%~D
19
VCC
+VCCSA_BT
18
BOOT
+VCCSA_UGATE
17
UGATE
+VCCSA_PHASE
16
PHASE
+VCCSA_EN
15
EN
+VCCSA_PWRGD
14
PGOOD
+VCCSA_FSEL
13
FSEL
12
VO
ISL95870AHRUZ_UTQFN20_1P8X3P2
ISL95870AHRUZ_UTQFN20_1P8X3P2
11
+VCCSA_OCSET
12
PR267
@ PR267
@
4.12K_0402_1%~D
4.12K_0402_1%~D
PR252
PR252
GNDA_VCCSA
+VCCSA_VO
PR265
PR265
0_0402_5%~D
0_0402_5%~D
2.2_0603_1%~D
2.2_0603_1%~D
1
2
PR245
PR245
1 2
12
0_0402_5%~D
0_0402_5%~D
12
12
12
PC251
PC251
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
GNDA_VCCSAGND A_VCCSA
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
PR244
PR244
2.2_0805_5%~D
2.2_0805_5%~D
PC252
PC252
1U_0603_10V6K~D
1U_0603_10V6K~D
PC253
PC253
1 2
@
@
PR251
PR251
1 2
0_0402_5%~D
0_0402_5%~D
PR254
@ PR254
@ 1 2
0_0402_5%~D
0_0402_5%~D
786
5
PQ35
PQ35
4
4
+VCCSA_LGATE
0.8_VCCPWROK * connect to U50 Pin 2 (Vih => 2.31V)
AO4466L_SO8~D
AO4466L_SO8~D
123
786
5
PQ36
PQ36
AO4406AL_SO8~D
AO4406AL_SO8~D
123
1.05V_VTTPWRGD <43,58>
CPU_VTT_ON <42,58>
12
PR255
PR255 10K_0402_5%~D
10K_0402_5%~D
@
@
PR258
PR258
1 2
0_0402_5%~D
0_0402_5%~D
PR262
PR262
12
12.7K_0402_1%~D
12.7K_0402_1%~D
1
1
PC246
PC246
2
2
10U_1206_25V6M~D
10U_1206_25V6M~D
12
PC254
@ PC254
@
1000P_0603_50V7K~D
1000P_0603_50V7K~D
12
PR248
@PR248
@
2.2_1206_1%~D
2.2_1206_1%~D
+3.3V_RUN
VCCSAPWROK <43>
2
12
PC247
PC247
1
PC248
PC248
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1UH 20% FDVE0630-H-1R0M=P3 11.9A
1UH 20% FDVE0630-H-1R0M=P3 11.9A
PR247
PR247
12.7K_0402_1%~D
12.7K_0402_1%~D
1 2
.015U_0603_25V7K~D
.015U_0603_25V7K~D
PC249
PC249
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PL18
PL18
PC261
PC261
12
GNDA_VCCSA
A A
PJP38
+VCCSA_P
PJP38
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
5
+VCC_SA
GNDA_VCCSA
PJP37
PJP37
PAD-OPEN1x1m
PAD-OPEN1x1m
12
0. 9V 0.8V VCCSA_VID_1 0 1
output voltage adjustable net work
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ISL95870A 0.8V_VCC_SA
ISL95870A 0.8V_VCC_SA
ISL95870A 0.8V_VCC_SA
LA-6592
LA-6592
LA-6592
1
61 67Tuesday, January 18, 2011
61 67Tuesday, January 18, 2011
61 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
+VCHGR
12
PC264
PC264
PR270
PR270
1 2
100K_0402_5%~D
100K_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
D D
@
@
PR277
12
@
@
1 2
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
PR277
1 2
0_0402_5%~D
0_0402_5%~D
+VCHGR
@
@
PR293
PR293
1 2
0_0402_5%~D
0_0402_5%~D
PR355
PR355
0_0402_5%~D
0_0402_5%~D
SLICE_BAT_ON
DEFAULT_OVRDE
12
PD28
PD28
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
1 2
@
@
PR321 0_0402_5%~D
PR321 0_0402_5%~D
CHARGE_MODULE_BATT
C C
CHARGE_PBATT
CHARGE_EN
B B
PD29
PD29
A A
SLICE_BAT_PRES#
<41,42,47>
12
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PR273
PR273
10K_0402_5%~D
10K_0402_5%~D
61
PQ42A
PQ42A
2
12
PC266
PC266
PR279
PR279
1 2
100K_0402_5%~D
100K_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PR286
PR286
10K_0402_5%~D
10K_0402_5%~D
61
PQ49A
PQ49A
2
PD30
PD30
12
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
PD31
PD31
12
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
@
@
PR294
PR294
1 2
0_0402_5%~D
0_0402_5%~D
+3.3V_ALW2
PQ51
PQ51
FDN338P_G_NL_SOT23-3~D
FDN338P_G_NL_SOT23-3~D
1
3
1
3
1 3
2
2
2
12
PC272
PC272 1500P_0402_7K~D
1500P_0402_7K~D
5
PQ39
PQ39
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
1 2 3 6
4
PQ44
PQ44
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
1 2 3 6
4
PR285
PR285
@
@
1 2
PBATT+
2
12
PR288
PR288
@
@
499K_0402_1%~D
499K_0402_1%~D
+DC_IN
1 2
PR310 100K_0402_5%~DPR310 100K_0402_5%~D
ACAV_DOCK_SRC#<41>
+SDC_IN
ACAV_IN<23,43,55>
+3.3V_ALW2
DOCK_SMB_ALERT#
<41,42,47>
8 7
5
8 7
5
5
0_0402_5%~D
0_0402_5%~D
PD24
PD24
12
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
PR290
PR290
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
200K_0402_1%~D
200K_0402_1%~D
61
PQ54A
PQ54A
1 2
PR307 47_0805_5%~DPR307 47_0805_5%~D
SOFT_START_GC<47>
1 2
@
@
PR314 0_0402_5%~D
PR314 0_0402_5%~D
DC_BLOCK_GC<55>
1 2
@
@
PR318 0_0402_5%~D
PR318 0_0402_5%~D
1 2
@
@
PR319 0_0402_5%~D
PR319 0_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ47A
PQ47A
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
3
PQ47B
PQ47B
4
1 2
5
PR298
PR298
@
@
PBAT_PRES#
PC271
PC271
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
1 2
@
@
PR312 0_0402_5%~D
PR312 0_0402_5%~D
1 2
61
1 2
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
3
4
0_0402_5%~D
0_0402_5%~D
1 2
PR297
PR297 20K_0402_1%~D
20K_0402_1%~D
2
PD22
PD22
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
PQ54B
PQ54B
+DOCK_PWR_BAR
<55>
12
PC273
PC273
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2
PD25
PD25
SLICE_BAT_PRES#
+DC_IN_SS
+CHGR_DC_IN
CD3301_DCIN
ACAVDK_SRC
ERC1
12
1 2
61
1 2
12
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
ACAVIN P33ALW2
@
@
0_0402_5%~D
0_0402_5%~D
4
PR280
PR280 20K_0402_1%~D
20K_0402_1%~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ48A
PQ48A
PD26
PD26
PR296
PR296
1 2
@
@
PR299 0_0402_5%~D
PR299 0_0402_5%~D
@
@
PR302
PR302
1 2
@
@
PR305 0_0402_5%~D
PR305 0_0402_5%~D
PU14
PU14
1
DC_IN
2
SS_GC
3
ERC1
4
ACAVDK_SRC
5
GND
6
SDC_IN
7
DC_BLK_GC
8
ACAV_IN
9
P33ALW2
37
TP
CSS_GC<55>
DK_CSS_GC<55>
4
PQ48B
PQ48B
1 2
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
PQ50B
PQ50B
1 2
0_0402_5%~D
0_0402_5%~D
12
PC274
PC274
0.047U_0603_25V7K~D
0.047U_0603_25V7K~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
ERC3
3
1 2
5
4
PD27
PD27
1 2
3
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
5
4
@
@
PR472
PR472
1 2
0_0402_5%~D
0_0402_5%~D
CHGVR_DCIN
DK_PWRBAR
DC_IN_SS
35
36
34
NC
DC_IN_SS
CHARGERVR_DCIN
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
ERC2
PC275
PC275
@
@
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
PR271
PR271
PR276
PR276
PBATT+
PR281
PR281
390K_0402_5%~D
390K_0402_5%~D
PR291
PR291
@
@
PR287
PR287
0_0402_5%~D
0_0402_5%~D
MPBATT+
12
PR471
PR471
510K_0402_5%~D
510K_0402_5%~D
1 2
33
32
28
29
31
30
NC
GND
DK_PWRBAR
BLK_MOSFET_GC
DK_AC_OFF_EN
DSCHRG_MOSFET_GC DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
SS_DCBLK_GC
EN_DK_PWRBAR17P33ALW
16
15
18
EN_DK_PWRBAR
12
STSTART_DCBLOCK_GC
3301_PWRSRC
MPBATT+
12
390K_0402_5%~D
390K_0402_5%~D
12
390K_0402_5%~D
390K_0402_5%~D
12
PR282
PR282
5
12
390K_0402_5%~D
390K_0402_5%~D
MODULE_ON
PR473 100K_0402_5%~D@ PR473 100K_0402_5%~D@
1 2
MODULE_BATT_PRES#
PBATT+
@
@
PR301
PR301
0_0402_5%~D
0_0402_5%~D
PBatt+
P50ALW
PBATT_OFF
ACAV_IN_NB
GND
CD3301RHHR_QFN36_6X6~D
CD3301RHHR_QFN36_6X6~D
P33ALW
@
@
@
@
@
@
PR327 0_0402_5%~D
PR327 0_0402_5%~D
12
PR272
PR272
PR274
PR274
33_0603_5%~D
33_0603_5%~D
620K_0402_5%~D
620K_0402_5%~D
1 2
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
3
PQ42B
PQ42B
5
4
12
PR284
PR284
33_0603_5%~D
33_0603_5%~D
620K_0402_5%~D
620K_0402_5%~D
1 2
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
3
PQ49B
PQ49B
4
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ50A
PQ50A
P50ALW
CD_PBATT_OFF
27 26
DK_AC_OFF
25 24 23 22 21 20 19
1 2
PR324 0_0402_5%~D
PR324 0_0402_5%~D
1 2
PR325 0_0402_5%~D
PR325 0_0402_5%~D
1 2
1 2 3 4
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
12
PQ45
PQ45
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
S
2
S
3
S
4
G
12
PC270
PC270
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
61
2
@
@
@
@
@
@
DK_AC_OFF_ENCD3301_SDC_IN SL_BAT_PRES#
+3.3V_ALW
3
8
S
D
7
S
D
6
S
D
5
G
D
PQ40
PQ40
PC265
PC265
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
8
D
7
D
PBATT_IN_SS
6
D
5
D
0_0402_5%~D
0_0402_5%~D
PR323
@ PR323
@
1 2
12
PR289
PR289
@
@
499K_0402_1%~D
499K_0402_1%~D
1 2
PR309 0_0402_5%~D
PR309 0_0402_5%~D
1 2
PR311 0_0402_5%~D
PR311 0_0402_5%~D
1 2
PR313 0_0402_5%~D
PR313 0_0402_5%~D
@
@
BLKNG_MOSFET_GC
1 2
@
@
PR320 0_0402_5%~D
PR320 0_0402_5%~D
1 2
@
@
PR322 0_0402_5%~D
PR322 0_0402_5%~D
EN_DOCK_PWR_BAR <42>
1 2
1M_0402_5%~D
1M_0402_5%~D
PR326
PR326
@
@
+PWR_SRC
3
2
PD17
PD17
PR283
PR283
330K_0402_5%~D
330K_0402_5%~D
1 2
MPBATT_IN_SS
PR278
PR278
330K_0402_5%~D
330K_0402_5%~D
1 2
DEFAULT_OVRDE
+5V_ALW
SLICE_BAT_ON <42>
DOCK_AC_OFF <41,42>
3301_ACAV_IN_NB
1 2
PR316 0_0402_5%~D
PR316 0_0402_5%~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1 2
@
@
PR317 0_0402_5%~D
PR317 0_0402_5%~D
SLICE_BAT_PRES# <41,42, 47>
+NBDOCK_DC_IN_SS
ACAV_IN_NB <42,43,55>
DOCK_AC_OFF_EC <42>
2
3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D
PQ41
PQ41
8
S
D
7
S
D
6
S
D
5
G
D
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
PD18
PD18
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
12
PD19
PD19
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
12
12
PR275
PR275
499K_0402_1%~D
499K_0402_1%~D
PD20
PD20
2
3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D
PQ46
PQ46
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
PD21
PD21
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
12
PD23
PD23
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
12
PR292
PR292
499K_0402_1%~D
499K_0402_1%~D
1 2
1M_0402_5%~D
1M_0402_5%~D
PR315
PR315
2
1
1 2 3 4
1
12
+DOCK_PWR_BAR
PR306
@PR306
@
0_0402_5%~D
0_0402_5%~D
1 2
1
ES2AA-13-F SMA
ES2AA-13-F SMA
PD16
PD16
2 1
PQ37
PQ37
1
8
S
D
2
7
S
D
3
6
D
5
D
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
PR268
PR268 330K_0402_5%~D
330K_0402_5%~D
1 2
S
G
12
4
PC263
PC263
PR269
PR269 0_0402_5%~D
0_0402_5%~D
@
@
1 2
STSTART_DCBLOCK_GC
PC267
PC267
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D
+PWR_SRC
12
12
PC268
PC268
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Selector
Selector
Selector
LA-6592
LA-6592
LA-6592
1
62 67Tuesday, January 18, 2011
62 67Tuesday, January 18, 2011
62 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
D D
4
3
2
1
PJP39
1
2
PJP39
1 2
PAD-OPEN 43X118
PAD-OPEN 43X118
10_0402_5%~D
10_0402_5%~D
+VCC_GPU_CORE
2
+PWR_SRC
PC285
PC285
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
12
PC286
PC286
PR336
PR336
1 2
0_0402_5%~D
0_0402_5%~D
PAD-OPEN 43X118
PAD-OPEN 43X118
PAD-OPEN 43X118
PAD-OPEN 43X118
1
+
+
2
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
PJP40
PJP40
1 2
PJP42
PJP42
1 2
12
PR330
PR330
+GPU_PWR_SRC
+5V_RUN
PC280
PC280
1U_0603_10V6K~D
1U_0603_10V6K~D
1 2
GPU_CORE_VCC
GPU_LGATE
20
1
PU15
PU15
PVCC
LGATE
2
SREF
SET0
SET1
PGND
3
GND
4
RTN
5
VID1
6
VID0
7
SREF
8
SET0
9
SET1
FB10OCSET
1. 025V 1V 0.85 V 0.8V GPU_VID_0 0 1 0 1 GPU_VID_1 0 0 1 1
output voltage adjustable net work
4
C C
+3.3V_RUN
PR333
@PR333
@
10K_0402_5%~D
10K_0402_5%~D
1 2
@
@
PR337
PR337
0_0402_5%~D
0_0402_5%~D
PR340
PR340
10K_0402_5%~D
10K_0402_5%~D
@
@
PR345
PR345
0_0402_5%~D
0_0402_5%~D
PR347
@ PR347
@
10K_0402_5%~D
10K_0402_5%~D
12
1 2
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
1 2
12
1 2
DGPU_PWROK
RUN_ON<11,38,42,45,56>
DGPU_PWR_EN
PR343
PR343
5
@
@
GNDA_GPU_CORE
+3.3V_RUN
PR348
PR348
10K_0402_5%~D
10K_0402_5%~D
1 2
PR349 0_0402_5%~D
PR349 0_0402_5%~D
PR350 0_0402_5%~D@ PR350 0_0402_5%~D@
PR351
@ PR351
@
0_0402_5%~D
0_0402_5%~D
GPU_VID_1<47>
B B
GPU_VID_0<47>
A A
1 2
PC290
PC290
.056U_0603_16V7~D
.056U_0603_16V7~D
1 2
12
12
GNDA_GPU_CORE
12
12
12
GNDA_GPU_CORE
GPU_PWRGD
PR334
PR334
30.1K_0402_1%~D
30.1K_0402_1%~D
PR338
PR338
71.5K_0402_1%~D
71.5K_0402_1%~D
PR403
PR403
38.3K_0402_1%~D
38.3K_0402_1%~D
PR341
PR341
412K_0402_1%~D
412K_0402_1%~D
GPU_EN
GPU_VID1
GPU_VID0
12
19
VCC
GPU_BOOT
18
BOOT
GPU_UGATE
17
UGATE
GPU_PHASE
16
PHASE
GPU_EN
15
EN
GPU_PWRGD
14
PGOOD
FSEL
11
ISL95870AHRUZ_UTQFN20_1P8X3P2
ISL95870AHRUZ_UTQFN20_1P8X3P2
1 2
13
12
VO
GPU_VO
GPU_FB
2.2_0603_1%~D
2.2_0603_1%~D
PR335
PR335
0_0402_5%~D
0_0402_5%~D
1
2
PR329
PR329
1 2
GNDA_GPU_CORE
12
12
PC281
PC281
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
GNDA_GPU_COREGNDA_GPU_CORE
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
GNDA_GPU_CORE
12
PR346
PR346
5.11K_0402_1%~D
5.11K_0402_1%~D
GNDA_GPU_CORE
12
PR401
PR401
5.11K_0402_1%~D
5.11K_0402_1%~D
PR328
PR328
2.2_0805_5%~D
2.2_0805_5%~D
PC282
PC282
1U_0603_10V6K~D
1U_0603_10V6K~D
PC283
PC283
1 2
GPU_LGATE
3.09K_0402_1%~D
3.09K_0402_1%~D
3.09K_0402_1%~D
3.09K_0402_1%~D
3
2
G
1
3
2
G
1
GPU_OCSET
PR339
PR339
5.9K_0402_1%~D
5.9K_0402_1%~D
PR344
PR344
12
PR400
PR400
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
1
PC276
PC276
2
2
10U_1206_25V6M~D
10U_1206_25V6M~D
D
PQ52
PQ52
S
AON6414AL 1N DFN
AON6414AL 1N DFN
12
PC284
PC284
1000P_0603_50V7K~D
1000P_0603_50V7K~D
D
PQ53
PQ53
AON6704L
AON6704L
S
PR331
PR331
1 2
1_1206_1%~D
1_1206_1%~D
12
2
12
PC277
PC277
1
PC278
PC278
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.56UH +-20% MPC1040LR56C 23A
0.56UH +-20% MPC1040LR56C 23A
4
3
PR332
PR332
5.9K_0402_1%~D
5.9K_0402_1%~D
1 2
0.15U_0603_16V7K~D
0.15U_0603_16V7K~D
PC279
PC279
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PL19
PL19
PC289
PC289
12
GPU_CORE Thermal Design Current : 15.615A Peak current : 20.2A OCP min : 24.2A
PC288
PC288
2200P_0402_50V7K~D
2200P_0402_50V7K~D
+GPU_CORE
+VCC_GPU_CORE
12
GPU_GND_SENSE <49>
GNDA_GPU_CORE
+
+
PC287
PC287
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
PR402
PR402 10_0402_5%~D
10_0402_5%~D
1 2
1
2
1 2
0_0402_5%~D
0_0402_5%~D
GPU_VDD_SENSE <49>
PR474
PR474
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ISL62870 GPU core
ISL62870 GPU core
ISL62870 GPU core
LA-6592
LA-6592
LA-6592
1
PJP41
PJP41
PAD-OPEN1x1m
PAD-OPEN1x1m
63 67Tuesday, January 18, 2011
63 67Tuesday, January 18, 2011
63 67Tuesday, January 18, 2011
12
0.4
0.4
0.4
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Date
Page#
ItemItem
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
RequestRequest Owner
Owner
OwnerOwner
4
Issue Description
Issue Description
Issue DescriptionIssue Description
3
Solution Description
Solution Description
Solution DescriptionSolution Description
2
1
Rev.
Rev.
Rev.Rev.
D D
VCCSA61 6/30 Intersil VCCSA spike issue
61 VCCSA 6/30 Intel
2 X01
53 3V/5V
3 7/15 Compal
C C
4 7/15 Compal
52 DCIN
5 7/15 Compal
526 DCIN 7/15 Compal
537 3V/5V 7/16 Compal 10u/1206/X5R/25V will COS
8 53 3V/5V 7/16 Compal
Change VCCSA VID pull down resistor value
3V/5V Bulk cap interfere with ME
Vendor will not support this part
PL3 and PL4 current rating is not enough for 130W adapter
PL1 current rating is not enough for 9cell (3.0Ah 1C) discharge current
+3.3V phase node over Mosfet Vds rating
Delete PR264
Delete VCCSA_VID_0 net
Connect VCCSA_VID_1 net to PIN5
Depop PR249, PR267 and PR260
Change PR261 and PR260 to 0 Ohm (SD02800008L) from 24.9k (SD03424918L)
Change PR259 to 47.5k (SD03447528L) from 274k (SD03427438L)
Change PR256 to 140k (SD03414038L) from 0 Ohm (SD02800008L)
Change PR250 to 113k () from 34k (SD03434028L)
Add pull down PR295 10k(SD02810028L)
Change PR295 and PR266 to 1k (SD02810018L) from 10k (SD02810028L)
Change PC33 and PC38 to 330U/25m/H1.9(SGA00001A8L) from 330U/25m/H2.8 (SGA1933131L)
Change PC609 and PC608 to 330U/9m/2V (SGA20331E0L) from 330U/9m/2.5V (SGA19331D1L)
Change PL2 and PL3 to FBMA-L18-453215-900LMA90T (SM01002078L) from FBMJ4516HS720NT(SM010009C8L)
Change PL1 to FBMJ4516HS720NT(SM010009C8L) from FBMA-L18-453215-900LMA90T (SM01002078L)
Add PL22 FBMJ4516HS720NT(SM010009C8L)
Change PC16,PC17,PC18,PC21,PC22 and PC23 to 10u/0805/X5R (SE00000QK00) from 10u/1206/X5R (SE142106M8L)
Change PQ6 AO4466L (SB00000CG8L) from SI4128DY (SB00000IR0L)
Change PQ8 AO4712L (SB00000AJ1L) from SI4134DY(SB00000KB0L)
X011
X01
X0154 +1.5V_SUS
X01
X01
X01
X01
9 53 3V/5V 7/16 Compal
B B
6110
11 54 1.5V_SUS 7/16 Richtek
12 60 Charger 7/18 Compal
13 62 Selector 7/18 Compal Leakage issue on PD16
Axg_core Vcore
15 60 Charger 7/20 Compal
A A
16 61 VCCSA 7/20 Compal
5
7/20 MAXIM
Compal7/16VCCSA X01
PC24 down size to 0603 from 0805 Change PC24 to 4.7u/6.3V/0603 (SE107475K8L) from 4.7u/6.3V/0805 (SE093475K8L)
VCCSA output voltage is not constant so change some net name
Reserve Pull down resister on EN pin for power consumption issue
PQ27 body diode can handle surge current when adapter plug in so depop PD14
Reserve 0402 cap pad for transient fine tune
Reserve adapter protection circuit for turbo mode
VCCSA phase node over Mosfet Vds rating
4
Change +0.8V_VCC net name to +VCCSA_P Change 0.8V_VCCPWROK net name to VCCSAPWROK Change +0.8V_VCC_SA net name to +VCC_SA
Add 0402 resister pad on EN pin
Depop PD14 SBR3A40SA (SC100003J00)
Change PD16 to ES2AA (SC100005A0L) from SBR3A40SA (SC100003J00)
Add PC701 and PC702 0402 cap pad
Change PU11 pin1 net name to ICREF from GNDA_CHG Change PU11 pin26 net name to ICOUT from VCC Reserve PR801,PR802,PR803,PR804,PR805,PR806,PR807,PR808,PR809,PR810,PR811,PR812 Reserve PC801,PC802,PC803
Change PQ35 AO4466L (SB00000CG8L) from SI4128DY (SB00000IR0L) Change PQ36 AO4712L (SB00000AJ1L) from SI4172DY(SB00000HN0L)
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PWR_PIR
PWR_PIR
PWR_PIR
LA-6592
LA-6592
LA-6592
1
64 67Tuesday, January 18, 2011
64 67Tuesday, January 18, 2011
64 67Tuesday, January 18, 2011
X01
X01
X01
X01
X0114 58,59
X01
X01
0.4
0.4
0.4
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Date
Page#
Page# Title
ItemItem
Page#Page#
D D
18 58,59
19 53 3V/5V 7/28 Comapl Broad band issue in 700MHz
20 58 Vcore 7/28 Comapl
C C
54,58 59,63
21
56
22 60 Charger 7/28 TI
B B
23 58,59
24 56 Selector 9/2 Compal Change parts to HF parts
25 46 +DCIN 9/2 Compal Change parts to HF parts
47 9/2 Compal Change parts to HF parts
26
54 Charger 9/2 Compal Change parts to HF parts
27 X02
A A
48 +1.5V_SUS 9/2 Compal Change parts to HF parts
28 X02
Title
TitleTitle
Vcore VAXG_core
Vcore VAXG_core
1.5V Vcore VGFX_Core GPU_core
1.05VM
Vcore VAXG_core
+5V/3.3 /+15VALW
Date
DateDate
7/24 MAXIM
7/24 MAXIM
7/28 Comapl
7/28 Compal
RequestRequest Owner
Owner
OwnerOwner
Fine tune OCP setting for Pass 2 IC
Phase node switching waveform abnormal issue for Pass 2 IC
Bump noise in band of 700MHz
Broad band in 800MHz and 900MHz
Pop adapter protection componment for turbo mode with TI solution
Fine tune load line and transient for Vcore and VAXG_core
4
Issue Description
Issue Description
Issue DescriptionIssue Description
3
Solution Description
Solution Description
Solution DescriptionSolution Description
Change PR127 to 165K (SD03416530L) from 100K (SD03410038L) Change PR135 to 105K (SD03410538L) from 150K (SD03415038L) Change PR126 to 165K (SD03416530L) from 100K (SD03410038L) Change PR134 to 105K (SD03410538L) from 150K (SD03415038L)
Change PR118 to 1 Ohm (SD014100B8L) from 2 Ohm (SD013200B8L) Change PR119 to 1 Ohm (SD014100B8L) from 2 Ohm (SD013200B8L)
Pop PC32 1000P (SE025102K8L) Pop PR37 2.2 Ohm (SD011220B8L) Pop PC31 1000P (SE025102K8L) Pop PR36 2.2 Ohm (SD011220B8L) Change PR35 to 2.2 Ohm (SD013220B8L) from 1 Ohm (SD013100B8L) Change PR35 to 2.2 Ohm (SD013220B8L) from 1 Ohm (SD013100B8L)
Pop PC139 470P (SE024471J8L) Pop PC159 470P (SE024471J8L) Pop PR117 2.2 Ohm (SD011220B8L) Pop PR148 2.2 Ohm (SD011220B8L)
Pop PC610 1000P (SE025102K8L) Pop PR602 2.2 Ohm (SD011220B8L) Pop PC175 470P (SE024471J8L) Pop PR173 2.2 Ohm (SD011220B8L) Pop PC198 470P (SE024471J8L) Pop PR193 2.2 Ohm (SD011220B8L) Pop PC284 1000P (SE025102K8L) Pop PR331 2.2 Ohm (SD011220B8L) Pop PC85 0.1u (SE00000Q900)
Pop PR803 100k (SD03410038L) Pop PR804 78.7k (SD03478728L) Pop PR802 115k (SD03411538L) Pop PR801 1.87M () Pop PQ801 RHU002N06 (SB50206008L) Pop PR812 100K (SD02810038L) Pop PC801 100P (SE071101J8L)
Change PR140 to 11.8k (SD03411828L) from 12.4k (SD00000AJ8L) Change PR157 to 8.25k (SD03482518L) from 8.66K(SD03486618L) Pop PC701 and PC702 0.033uF (SE076333K8L)
Change PQ51 FDN338P_G (SB90338001L) from FDN338P (SB90338008L) Change PD18, PD19, PD21, PD22, PD23, PD24, PD25, PD26, PD27, PD28, PD29, PD30 and PD31 RB751V-40GTE-17 (SCS00004L0L) from RB751V (SC1B751V08L) Change PQ37, PQ40, PQ41, PQ45 and PQ46 FDS6679AZ_G (SB000009D1L) from FDS6679AZ (SB000009D8L)
Change PD6 DA204UGT106 (SC60000170L) from DA204UT106 (SC1A204U00L) Change PQ4 FDS6679AZ_G (SB000009D1L) from FDS6679AZ (SB000009D8L) Change PD1 RB715FGT106 (SCSB715F010) from RB715F (SCSB715F08L) Change PQ2 FDV301N_G (SB503010020) from FDV301N (SB50301008L)
Change PQ5 FDS8878_G (SB00000BV1L) from FDS8878 (SB00000BV8L)
Change PQ33 SI4812BDY-T1-GE3 (SB00000DI1L) from SI4812BDY-T1-E3 (SB00000DI0L) Change PL17 FDVE1040-H-5R6M=P3 (SH00000CH1L)from FDVE1040-5R6M=P3 (SH00000CH0L) Change PQ27 SI4835DDY-T1-GE3 (SB00000FF1L) from SI4835DDY-T1-E3 (SB00000FF0L)
Change PL602 FDUE1040D-H-1R0M=P3 (SH000009U1L) from FDUE1040D-1R0M=P3 (SH000009U0L)
2
1
Rev.
Rev.
Rev.Rev.
X0117 58
X01
X01
X01
X01
X01
X01
X02
X02
X02
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR
PWR_PIR
PWR_PIR
LA-6592
LA-6592
LA-6592
1
65 67Tuesday, January 18, 2011
65 67Tuesday, January 18, 2011
65 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Page#
Page# Title
ItemItem
Page#Page#
29
D D
30 Change parts to HF partsCompal9/13Selector56 X02
31 60 charger 9/13 Compal
47
Title Date
TitleTitle
+5V/3.3 /+15VALW
Date
DateDate
9/2 TI
RequestRequest Owner
Owner
OwnerOwner
Fine tune OCP setting for +5V/+3.3V
Fine tune adapter protection circuit for 2nd source and reserve H_PROCHOT#
4
Issue Description
Issue Description
Issue DescriptionIssue Description
3
Solution Description
Solution Description
Solution DescriptionSolution Description
Change PR29 to 274K (SD03427438L) from 220K (SD03422038L) Change PR30 to 348K (SD00000WW8L) from 243K (SD03424338L)
Change PQ39 and PQ44 SI4835DDY-T1-GE3 (SB00000FF1L) from SI4835DDY-T1-E3 (SB00000FF0L)
Delete PQ802 and PR807 MAX8731_IINP singal connect change to inverting input from Non-inverting input ICREF singal connect change to Non-inverting input from inverting input Pop PR811 and PR813 0 Ohm (SD02800008L) Depop PR814
2
1
Rev.
Rev.
Rev.Rev.
X02
X02
32 56 9/14 TI Fine tune OCP setting +1.05VM
33 56 10/05+1.05VM Compal 22u/1206/6.3V COS issue
34 57 +1.05VTT 10/05 Compal 22u/1206/6.3V COS issue
C C
35 52 DCIN 10/05 Compal
36 61 VCCSA 10/14 Compal
37 63 GPU_Core 10/14 nVidia
39 63 GPU_Core 11/09 nVidia
B B
40 62 Selector 11/09 Compal
42 60 Charger 11/09 Compal
43 60 Charger 12/09 Compal
A A
44 60 Charger 12/09 Compal
5
6 ~ 7mA leakage current in slice Change PR2 and PR504 to 100K (SD02810038L) from 10K (SD03410028L)
Fine tune VCCSA OCP setting for 2nd and 3rd source choke
Fix output voltage to 0.9V for nVidia ES sample
Change OCP setting for new nVidia chip
Change VID setting for new nVidia chip. Defult set 1V.
Fine tune main and media battery switching to slice battery transient time
Change adapter protection circuit trip point. (Adapter rated current + 0.75A)
Change adapter protection event to HW from SW
H_PROCHOT# can not pull high issue with external circuit at DC mode
H_PROCHOT# pull low level can not meet Intel SPEC with TI solution at AC mode
4
Change PR83 to 22k (SD03422028L) from 10k (SD03410028L)
Change PC98 ~ PC105 to 22u/0805 (SE00000110L) from 22u/1206 (SE077226M8L)
Change PC123 ~ PC125, PC121, PC127, PC120, PC129 and PC130 to 22u/0805 (SE00000110L) from 22u/1206 (SE077226M8L)
Change PC122 and PC126 to 47u/0805 (SE00000G60L) from 22u/1206 (SE077226M8L)
Change PR247 and PR262 to 12.7k (SD03412728L) from 11.5k (SD03411528L)
Depop PR337 and PR345 0 Ohm (SD02800008L) Depop PR347 10K (SD02810028L) Pop PR343 10K (SD02810028L)
Change PR332 and PR339 to 5.9k (SD03459018L) from 4.22k (SD03442218L)
Depop PR347 10K (SD02810028L) Pop PR343 10K (SD02810028L) Change PR344 and PR400 to 3.09k (SD00000J38L) from 3.57k (SD03435718L) Change PR341 to 412k (SD00000678L) from 402k (SD034402380) Change PR403 to 38.3k (SD03438328L) from 200k (SD03420038L) Change PR338 to 71.5k (SD03471528L) from 0 Ohm (SD02800008L) Change PR334 to 30.1k (SD03430128L) from 23.7k (SD03423728L)
Change PC270 and PC265 to 0.22uF (SE000005Z8L) from 1uF (SE00000698L)
Change PR802 to 107k (SD03410738L) from 115K (SD03411538L) Change PR801 to 649K (SD03464938L) from 1.87M (SD00000WN0L) Change PR804 to 80.6K (SD03480628L) from 78.7k (SD03478728L)
Pop PR814 0 Ohm (SD02800008L) Depop PR813 0 Ohm (SD02800008L) Depop PR812 100k Ohm (SD02810038L)
Change PR803.1 net nam to +3.3V_ALW2 from MAX8731_REF Change PQ801.3, PR804.1 and PC801.2 net nam to PGND from GAND_CHG
Depop PR801 (SD03464938L) Change PR802 to 174k (SD03417438L) from 107k (SD03410738L) Change PR803 to 150k (SD03415038L) from 100k (SD03410038L) Change PR804 to 113k (SD03411338L) from 80.6K (SD03480628L) Pop PR806, PR807,PR810 0 Ohm (SD02800008L) Pop PQ802 RHU002N06 (SB50206008L) Pop PR809 221K (SD00000HX8L) Pop PR808 1.8M (SD00000K180) Pop PR805 20K (SD03420028L) Depop PR811 (SD02800008L)
3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PWR_PIR
PWR_PIR
PWR_PIR
LA-6592
LA-6592
LA-6592
X02
X02
X02
X02
X02
X02
X0238 63 GPU_Core 10/14 Compal
X03
X03
X0341 60 Charger 11/09 Compal
X03
X04
X04
0.4
0.4
66 67Tuesday, January 18, 2011
66 67Tuesday, January 18, 2011
1
66 67Tuesday, January 18, 2011
0.4
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Page#
Page# Title
ItemItem
Page#Page#
58,59,63
45
D D
46 60 Charger 12/17 TI
47 58,59
48 59 +VAXG 12/17 MAXIM
49 60 Charger 01/12 Compal
C C
Title Date
TitleTitle
+Vcore +VAXG +VGPU
+Vcore +VAXG
Date
DateDate
12/10 Compal
12/17 Compal
01/12ALL52 ~ 6350
RequestRequest Owner
Owner
OwnerOwner
Compal
Change sunbber valure for 3rd source MOSFET
H_PROCHOT# spike voltage issue when AC to DC transient
Fine tune VAXG and Vcore load line for 2nd source choke
Low side driver no signal when loading over 10A
Adapter protection trip point for 2nd source Change PR802 to 162k (SD03416238L) from 174k (SD03417438L)
Remove debug resistor (0 Ohm)
4
Issue Description
Issue Description
Issue DescriptionIssue Description
3
Solution Description
Solution Description
Solution DescriptionSolution Description
Change PC139, PC159, PC175, PC198, PC284 to 1000P (SE025102K8L) from 470P (SE024471J8L) Change PR117, PR148, PR173, PR193, PR331 to 1 Ohm (SD012100B8L) from 2.2 Ohm (SD011220B8L)
Pop PR208 10k (SD02810028L) X04
Change PR157 to 7.5k (SD03475018L) from 8.25k(SD03482518L) Change PR140 to 12.7k (SD03412728L) from 11.8k (SD03411828L)
Change PR119 to 0 Ohm (SD01400008L) from 1 Ohm (SD014100B8L)
Change PR14,PR23,PR43,PR45,PR71,PR72,PR78,PR88,PR91,PR103,PR121,PR129,PR146,PR171,PR198 PR199,PR206,PR207,PR216,PR221,PR240,PR251,PR258,PR269,PR277,PR285,PR287,PR293,PR294 PR296,PR298,PR299,PR301,PR302,PR305,PR309,PR311,PR312,PR313,PR314,PR316,PR317,PR318 PR319,PR321,PR322,PR323,PR324,PR325,PR337,PR345,PR349,PR351,PR355,PR472,PR606 footprint
2
1
Rev.
Rev.
Rev.Rev.
X04
X04
X04
A00
A00
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR
PWR_PIR
PWR_PIR
LA-6592
LA-6592
LA-6592
1
67 67Tuesday, January 18, 2011
67 67Tuesday, January 18, 2011
67 67Tuesday, January 18, 2011
0.4
0.4
0.4
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
1 HW
Title
TitleTitle
Date
DateDate
6/15/2010
RequestRequest Owner
Owner
OwnerOwner
COMPAL7
4
Issue DescriptionDate
Issue DescriptionIssue Description
3
Change QC1 control from SUS_ON to RUN_ON_CPU1.5VS3#Boot issue
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X01
2
3
C C
6
8 Follow Intel Design Guide Rev1.0 X01HW
9 HW X01
10 HW Change CRT SW to MAX14885 Change CRT SW to MAX14885 and add C1181,C1182, R1581 remove C325~C336 X01
12
B B
15
11 6/15/2010
14 6/15/2010 COMPAL
14 6/15/2010 COMPAL
17,29,42 6/15/2010 COMPAL
18 COMPAL6/17/2010
18 6/17/2010 INTEL Change RH149 to 1k and RH150 to 4.7k
22 6/17/2010 COMPAL
25 6/17/2010 COMPAL
26 6/17/2010 COMPAL
30 6/17/2010 COMPAL
33 6/17/2010 COMPAL
33 6/17/2010 COMPAL
HW
HW
HW Change HDA_SYNC topology X01Add QH7 and RH375
HW Change ODD connector from 13 pin to 31 pin X01
HW11 Add no stuff D4 and co-lay with F2, change F2 to 2A_8V X01Safety request
HW X01Change SATA repeater to MAX4951BE
HW13
HW14
6/15/2010
COMPAL
COMPAL
COMPAL28, 39 6/17/2010
Modify net name
Follow PPM recommendation to change material
Remove touch screen PAID pull down circuit X01Remove RH2417 HW
Change EMC4002 to EMC4022 Change U9 to EMC4022, remove R392,R394 R866,R404,C279
Change Codec to ZB version and speaker connector
Change SI2301BDS to C version Change Q36 to SI2301CDSHW
Change +0.8V_VCC_SA to +VCC_SA
Change capacitors from 10uF_0805_10V Y5V to 10uF_0805_6.3V_X5R: C305,C387,C462,C705,C728,C760,C764,C765,C768,C769, C772,CC135,CH58,CH73,CH80,CV124,CV126,CV185,CV187 Change capacitors from 10uF_0805_6.3V to 10uF_0603_6.3V: C475,C638,C641,C643 Change resistors to 0402 size: RC134, RH201,RH253,RH208,RH213 Delete RH192 and add PJP51
De-pop RH1,RH3~RH10,RH12~RH21,RH24,RH283~RH285,CH14 HW De-pop PCH XDP X01
Change ODD connector to 31 pin, add @R1189,RH340 and remove C1168, C1169,C1170,U87,U88,U89, R1188 and short R1188 pin1 and pin2 together
Chagne U25, U44 to MAX4591BE and change R1169,R1171,R1174,R1176 to 0 ohm and stuff R1174,R1176
Change JSPK1 to TYCO_1734595-6 and change U72 to ZB version and stuff C962
Add PJP52,PJP55Add Jumper for power consumption measurement
X01
X01
X01
X01
X01
16
17 X01HW
18
19
20 Board ID Change R875 to 130KHW
A A
21 BIOS request De-pop DV1, RV29 and pop U14HW
33 6/17/2010 BRCOM Change RFID capacitors for more popular
35 6/17/2010 COMPAL Link R677 to CIS to have the correct part number
37 6/17/2010 COMPAL
41 6/17/2010 COMPAL
42 6/17/2010 COMPAL
46 6/17/2010 COMPAL
HW Add pull down on SLICE_BAT_ON Add R791
Link R677 to CIS
Change express card power SW to TPS2231MRGPR-2
Change C502,C505 from 1uF to 0.1uFHW
Change U41 to TPS2231MRGPR-2 and remove C636,C639HW
X01
X01
X01
X01
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (1/7)
EE P.I.R (1/7)
EE P.I.R (1/7)
LA-6592P
LA-6592P
LA-6592P
68 75Thursday, January 13, 2011
68 75Thursday, January 13, 2011
68 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
22 HW
Title
TitleTitle
Date
DateDate
6/18/2010
RequestRequest Owner
Owner
OwnerOwner
COMPAL11,14,42
4
Issue DescriptionDate
Issue DescriptionIssue Description
3
Change CC176 to SGA00005H0L, change YH1, Y6 to SJ132P7KW1LEOL concern
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X01
23
24
26
27
28 32 HW 6/21/2010 INTEL Remove useless resistors Remove R556, R558, R559, R560 and short the pin1 and pin2 together X01
C C
29
30 10 HW 6/22/2010 COMPAL To have better return path De-pop CC130 and pop CC134
31 44 HW 6/23/2010 COMPAL Solution +1.5V_RUN voltage drop issue Change Q59 from SI3456BDV to NTGS4141NT1G
32 41 HW 6/23/2010 COMPAL Remove double pull high resistor Remove R1177
33 29 HW 6/23/2010 COMPAL Remove useless resistor Remove R1125,R1126
34 44 HW 6/25/2010 COMPAL NTMS4107NR2G EOL Change Q55 to NTMS4920NR2G
35 10 HW 6/25/2010 COMPAL CC129~CC134 D2T LESR5M EOL Change CC129~CC134 to SGA00004X0L X01
36 COMPAL6/25/2010HW24 X01Change JLVDS1 to 40 pinChange LVDS connector to 40 pin
B B
37 31 HW 6/25/2010 COMPAL Change I/O connector to TYCO Change JIO1 vendor from Lotes to TYCO X01
43
43 6/18/2010
41,42 COMPAL
24,45 COMPAL
26,40, 41,46
24,28,29, 32,37,44,49
HW
HW
HW Correct net name for LED signal X01
HW 6/21/2010 NVIDIA
HW 6/22/2010 COMPAL Change part for Halogen free Change Q18,Q27,Q30,Q34,Q38,Q40,Q42,Q49,Q54,Q58,QV5 to HF part X01
6/18/2010
6/18/2010
6/18/2010
COMPAL
COMPAL Change TP pin definition Reverse TP pin definition for PT
Change connector
Add series resistor and pull up resistors on MIC_MUTE#, VOL_MUTE,VOL_UP,VOL_DOWN
Add HPD circuit to inform system for NV request
Change JKB1 to same as JSC1
Add R773,R806,R884,R886,R887,R1166,R1167,R118425 HW
Modify signal name BREATH_BLUE_LED to BREATH_WHITE_LED and BREATH_BLUE_LED_SNIFF to BREATH_WHITE_LED_SNIFF
Add DV2,DV3,DV4,R1154 and use ECE5028 GPIOE7/DCD# as HPD signal to inform system
X01
X01
X01
X01
X01
X01
X01
X01
X01
COMPAL6/25/20102438 X01Change JTS1 pin definition for new TS pin definePT panel change touch screen pin definitionHW
36,42
40 24 HW 7/1/2010 COMPAL Stuff PWM pull down resistor for PT solution Pop R1137 X01
7/1/2010HW7 X01De-pop RC9For support XDP deviceCOMPAL41
42 15,18,
A A
41,42
HW 7/1/2010 COMPAL Base on GPIO map to modify X011. Move SLP_ME_CSW_DEV# from GPIO45 to GPIO28, add MCARD_PCIE_SATA# on
Modify Module Bay circuit 1.Remove R1181,R1182,R1189. 2.Change BAY_SMBUS, DEVICE_DET# pull up
power rail from +3.3V_RUN to +3.3V_ALW. 3.Change net name ODD_DET# to PCH_SATA_MOD_EN#. 4.Add Q123,Q76,R513,R514,R515 for USB_SMI# circuit.
5.De-pop C627,R712
5028 GPIOE3. 2. Remove RH238, change RH80 from 1k to 10k. 3. Change SLICE_BAT_PRES# pull up power rail from +3.3V_ALW2 to +3.3V_ALW. 4. Add R889
X01COMPAL7/1/2010HW39 14,29,
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (2/7)
EE P.I.R (2/7)
EE P.I.R (2/7)
LA-6592P
LA-6592P
LA-6592P
69 75Thursday, January 13, 2011
69 75Thursday, January 13, 2011
69 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
7/1/2010
RequestRequest Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
3
Remove R1139,R1140 and add D68,D69PWM function43 HW
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X01COMPAL24
44
45
46 X01
48 X01
49 X01
C C
50 X01
51
52
53
54
55
56 X01
B B
57 31,41,45 HW 7/13/2010 Dell Remove Mic mute function and LED Remove R773,R806,R1108,R1061,Q105 and delete MIC_MUTE# signal
11 HW 7/1/2010 COMPAL VCCSA VID circuit Change VCCSA_VID_0 to VCCSA_VID_1 and pop RC138
36,45 HW 7/2/2010 COMPAL Modify LED circuit Remove R1578,R1579,R1580,D42,D60,D61, add Q77,Q124,R705,R718,R719
22 HW 7/2/2010 COMPAL Modify thermal diode for thermal request
15,32 HW 7/5/2010 COMPAL EOL concern Change Y3 and YH2 from 1Y725000CE1A to 7A25000110
11,24, 27,45
29 HW 7/7/2010 COMPAL USB30 SMI circuit Stuff R513 due to this pin is OD type on USB30 module
35 HW 7/9/2010 O2-Mirco Add discharge circuit for +3.3V_RUN_CARD Add R826 on +3.3V_RUN_CARD
15,29,32, 35,36,37
14 COMPAL7/12/2010HW Add R933,R935 on SPI chip select signalsTo solve SPI EA
24 Link CIS symbolCOMPAL7/12/2010HW Link JLVDS1
28 HW 7/12/2010 COMPAL Meet EA result Stuff R493,R494
24,30,35, 38,39
HW 7/7/2010 COMPAL Change part for Halogen free part
COMPAL7/8/2010HW29 Link JSATA2 CIS symbolLink CIS symbol
HW 7/9/2010 COMPAL
EMI 7/12/2010 COMPAL EMI request to solve EMI issue
Move PCIE TX AC coupling capacitors close to PCH
Remove C268,C269, use DP1/DN1 for CPU,DP2/DN2 for GPU, DP3/DN3 for DIMM, DN5/DP5 for WWAM
Change QC5 to NTR4501NT1G, U21,U24,U54,U55,U57 change to NC7SZ04P5X-G, Q21 change to FDC654P-G
Move C408,C409,C460,C461,C567,C568,C596,C597,C598,C599,C617,C618, C647,C648 to page 15 to close to PCH
Add R678,C757,L92,L93, and stuff L51,L52,L90, de-pop R736~R739,R1150,R1151, and remove R1106
X01
X01
X0147
X01
X01
X01
X01
X01
X01
58 X01
61 22 HW 7/14/2010 COMPAL Reserve capacitor for WWAN thermal diode Add @C277
62 14,17,18 HW 7/14/2010 COMPAL To solve back drive issue
64 38,39 HW 7/15/2010 COMPAL Remove one TPS2560 for cost saving Remove U43,C659,C660,R740,PJP6, and share with power source of U45 X01
A A
65 31,41,45 HW 7/15/2010 COMPAL Remove speaker LED Remove Q119,Q102,R1109,R1059 X01
28
29
45 HW 7/14/2010 COMPAL Remove CLIP Remove CLIP3,CLIP4,CLIP6~CLIP863 X01
HW 7/13/2010 COMPAL Follow EA result De-pop R493,R494 and pop R495,R496
HW 7/13/2010 COMPAL Modify zero ODD circuit Change ZODD_WAKE#,MODC_EN#,MOD_SATA_PCIE#_DET,USB30_EN connection
HW33 Change R632,R635 pull up power rail from +3.3V_ALW to +3.3V_ALW_SCChange power rail for smart cardCOMPAL7/14/201060
Move SIO_EXT_SMI# from PCH GPIO1 to GPIO14, remove RH254, and change RH164 pull up power rail from +3.3V_RUN to +3.3V_ALW_PCH
X0159
X01
X01
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (3/7)
EE P.I.R (3/7)
EE P.I.R (3/7)
LA-6592P
LA-6592P
LA-6592P
70 75Thursday, January 13, 2011
70 75Thursday, January 13, 2011
70 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
7/15/2010
RequestRequest Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
Add pull up for PCH GPIO1 Add RH41 and change reference RH164 to RH41
3
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X01COMPAL17,1866 HW
COMPAL7/16/2010HW24,30,35 Change L92 to LE92,L93 to LE93,R678 to RE678,CE757 to CE757Change part reference for EMI request67
20,44 HW 7/16/2010 COMPAL For cost saving Add PJP57,RH202, no stuff QH4,Q49,RH278,R90868
69
70
71
73 14 HW 7/19/2010 COMPAL Follow Intel XDP design Change RH43,RH44,RH45 to 200 ohm
C C
75 46 HW 7/19/2010 NV NV request to add 10k pull on GPIO9 Add RV102
76 23 HW 7/20/2010 SMSC Follow SMSC review result Add R403
79 46 HW 7/20/2010 NV Follow NV request Add RV103,RV104, @RV20,@RV25,@RV26 and de-pop R1111
80 26 HW 7/20/2010 Safety Follow safety request De-pop F2, pop D4 and add R5
81 17,30,40 HW 7/20/2010 EMI Follow EMI request
B B
82 14 HW 7/20/2010 COMPAL Change SPI chip select damping R Change R933,R935 to 47 ohm
83 24,39 HW 7/20/2010 COMPAL Change material for small size Change C300,C669 from 1206 16V to 0805 10V
84 24 HW 7/20/2010 COMPAL Change U86 power rail for touch screen Change U86.4 power rail from +3.3V_RUN to +5V_RUN
85 38,39 HW 7/20/2010 COMPAL Remove useless capacitors Remove C1151~C1154
22 HW 7/16/2010
41,42 HW 7/16/2010 DELL Follow GPIO 0713
35 HW 7/16/2010 COMPAL Follow vendor request
28,4572 Part leverage selectCOMPAL7/19/2010HW Change D16,D59,D62 to SC100000S0L
38,39 COMPAL7/19/2010HW74
31 HW 7/20/2010 COMPAL Change USB3(on IO/B) enable signal Chnage USB3 enable signal from USB_SIDE_EN# to ESATA_USB_PWR_EN#77
31 HW 7/20/2010 COMPAL Change JIO1 for correct connector list Change JIO1 to TYCO_2041300-278
COMPAL
Modify current sense connection Move MAX8731_IINP from U9.25 to U9.31
Add DYN_TURB_PWR_ALRT#, DYN_TUR_CURRNT_SET#, and change R796 pull up power rail from +3.3V_RUN to +3.3V_ALW
De-pop RE678,CE757
Change power rail for layout limitation
Change U90,U91 power rail to +USB_SIDE_PWR,U92 power rail to +SATA_SIDE_PWR
Add RE1098,RE1100,RE1101,RE1102,CE573,CE574, change RH103,R756 to 33 ohm, C704 to 12pF
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
86 41 HW 7/20/2010 COMPAL Follow GPIO map Change R796 to 10k ohm, add R764
87 44 HW 7/20/2010 COMPAL Change PJP57 footprint Change PJP57 footprint to 4x4m
88 31 HW 7/21/2010 COMPAL Modify HP & Mic circuit Change JIO1 pin connection
89 36 HW 7/21/2010 COMPAL Add 0 ohm R on PCIE_MCARD2_DET# Add R725
A A
40 HW 7/21/2010 COMPAL Follow EA request Change C704 to 6.8pF90 X01
X01
X01
X01
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (4/7)
EE P.I.R (4/7)
EE P.I.R (4/7)
LA-6592P
LA-6592P
LA-6592P
71 75Thursday, January 13, 2011
71 75Thursday, January 13, 2011
71 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
7/21/2010
RequestRequest Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
Change JSD1 to support Memory Stick Change R666,R667, change JSD1
3
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
2
1
Rev.Page#
Rev.Rev.
X01COMPAL3591 HW
92 31, 42 HW 7/22/2010 COMPAL GPIO MAP update. add R1590
HW39 add R1582~R1585Follow Vender request.COMPAL7/22/2010 X0193
39 HW 7/23/2010 COMPAL To compatible with SN75LVCP601 Add R1586~R158994
95 41 HW 7/23/2010 COMPAL Add 0 ohm R on TEMP_ALERT# for backup Add R1591
96 24,42 HW 7/24/2010 COMPAL
97 24 HW 7/26/2010 COMPAL Reserve a 0 ohm resistor for +5V_TSP Add R1592
98 45 HW 7/26/2010 COMPAL Add pull down 100k on BT_ACTIVE Add R950
C C
99 48 HW 7/27/2010 NV Follow NV suggestion to modify BOM
37 HW 8/23/2010 COMPAL Add connection for express card SW Add connection of pin4,pin5,pin13 and pin 14100
101 18 HW 8/23/2010 Intel Follow Intel design guide Rev1.2 Change RH149 to 2.2k and RH150 to 0 ohm
102 46 HW 8/23/2010 COMPAL De-pop pull up resistors De-pop RV23,RV24
14,18,30 HW 8/23/2010 DELL Remove PAID function of RTC and speaker Change speaker connector to 4 pin and remove RTC_DET# and SPEAKER_DET#103
104 17 HW 8/26/2010 Intel Follow Intel check list rev1.2 Add @RH332
105 14,18 HW 8/26/2010 Intel Follow Intel request Add RH51 and RH356
B B
106 33 HW 8/27/2010 BRCOM Follow BRCOM request Change L39,L40 to rated current is 400mA
107 45 HW 8/27/2010 COMPAL Follow ME request Change H17 to 2P2
108 16 HW 8/27/2010 COMPAL Reserve pull down R for ME_SUS_PWR_ACK Add @RH145
Follow GPIO map to add touch screen power down control circuit
Add TOUCH_SCREEN_PD#, Q125,Q32,R430,R431,C304,C306, and change JTCH1 pin 1,pin2 from +5V_RUN to +5V_TSP
De-pop CV184, and change CV183 to 1uF,CV182 to 4.7uF, CV109 to 470pF,CV110 to 4700pF, LV8 to 100nH
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
9/2/2010HW36 De-pop U40De-pop ESD diodeCOMPAL109
9/2/2010HW11 COMPAL Change QC5 to SB00000HK0LChange QC5 VGS to 20V part110
111 45 HW 9/3/2010 COMPAL Follow ME request Change H11 from 3P8 to 3P7
112 26 HW 9/3/2010 COMPAL Follow safety request Pop F2 and de-pop R5
113
46,47,48,49 HW 9/6/2010 COMPAL Change GPU to N12P FERMI Change UV1 to N12P FERMI X01
114 24,26,46 HW 9/8/2010 COMPAL Change RB751V to HF part Change D53,D63~D69,DV1~DV4 to SCS00004L0L X01
A A
X01
X01
X01
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (5/7)
EE P.I.R (5/7)
EE P.I.R (5/7)
LA-6592P
LA-6592P
LA-6592P
72 75Thursday, January 13, 2011
72 75Thursday, January 13, 2011
72 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
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Request
Item
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ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
9/9/2010
RequestRequest Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
To solve pop noise and detect issue
3
Add U6,Q33,Q46,D70,D71,R425,R33,R38,R424,R161,R352,R1088,C967,C307,C308
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X01IDT30,31115 HW
116 35 HW 9/10/2010 O2 To solve RF noise issue Add @C573,@C574,L45
117 50,51 HW 9/14/2010 Change VRAM to 800MHz Change UV3~UV6 to SA00003VS0L
118 9/14/2010HW30,38,39 For EMI request Change C973~C976 to 680pF and pop, add L91~L94, D72~D74, remove U90~U92COMPAL
35 HW 9/14/2010 O2 Modify circuit Remove R661,R662, add L46,L47, change L45 to SM01000GG0T119
120 17,24 HW 9/15/2010
121 37,38,39 HW 9/16/2010 COMPAL change materials Change L49,L51,L52,L90 to SM070001E0L
C C
122 46,48,50,51 HW 9/20/2010 Nvidia Vender request
24124
125 46
B B
32129 HW 10/07/2010 COMPAL Solve LAN Package Lost Problem change L30~L37 from 22NH to 12NH.
9/28/2010HW
9/28/2010HW COMPAL
COMPAL
COMPAL To support high contrast ratio brightness Change net name from LVDS_CBL_DET# to LVDS_CBL_ID
add CV89,CV176,CV177,CV178,CV188~CV192,RV30, RV31, change RV81/86 to 160ohm RV59 to 15K, CV80 to 4.7uF, CV40,CV58,CV59,CV60 to
0.1u,CV41,CV42,CV43,CV50,CV51 to 0.022u. CV160~CV162 to 1u, CV181 to 10u CV180 to 22u, pop RV99 and change it to 20K pop RV41 and change to
4.99K, de-pop RV50, pop RV56. Rename from I2CS_SCL/SDA to I2CH_SCL/SDA
Change LV3 to SM01000BE0L (220ohm)Vender request123 9/28/2010HW48 Nvidia
Change R1137 to 10KohmCOMPAL solve PWM leackage issue.
solve systen can't boot in UMA only mode.
DG1.5 update. add RH31COMPAL10/01/2010HW14126
correct from U14 to UV14 and change the PN to SA00003Y00L. pop RV29, de-pop RV22
add U15, C478.GPIO MAP update.COMPAL10/04/2010HW32127
change R957 to 1K, R955, R941, R949, R939, R934 to 4.7K45 10/04/2010HW COMPAL128 LED brightness test result
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
depop RC96, RC97COMPAL10/07/2010HW9130 DG1.5 update.
10/07/2010 COMPAL change the PN from SA00003ZZ1L to SA00003ZZ2L131 30 HW change Codec to YA version.
Change LVDS_CBL_ID to ATG_MAC_LCD_DET#, remove R771132 17,24,41 HW 10/11/2010 COMPAL Follow GPIO Map
31 HW 10/11/2010 DELL Remove Latitude On button Depop SW2133 X02
28 HW 10/12/2010 DELL Support SSD Add PJP64,C399,C402134
31 HW 10/18/2010 IDT Change GND reference Change Mic detect circuit DGND to AGND135
136 30 HW 10/19/2010 COMPAL Change Mic detect to external detect Remove R161 and add C1164
A A
137 14,18 HW 10/19/2010 COMPAL Follow Intel debug port DG Connect PCH_GPIO15 to PCH XDP X02
X01
X01
X02
X02
X02
X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (6/7)
EE P.I.R (6/7)
EE P.I.R (6/7)
LA-6592P
LA-6592P
LA-6592P
73 75Thursday, January 13, 2011
73 75Thursday, January 13, 2011
73 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
140 18 HW 10/22/2010 COMPAL Follow check list rev1.0 Change RH177 to 10k
141 31 HW 10/26/2010 COMPAL Cost saving Change C307,C308 to 0402 package
142 34 HW 10/26/2010 COMPAL Follow BRCOM request Pop C1161
143 14~21 HW 10/28/2010 Intel Change PCH stepping Change UH4 to B2 stepping
144 30,31 HW 10/28/2010 COMPAL Use internal Mic detect circuit De-pop D71,R425,R33,R38,C307,C308,U6, R352,R1088,C967 X02
Page# Title
Page#Page#
30,31139 HW 10/21/2010 COMPAL Modify Mic detect circuit
Title
TitleTitle
Date
DateDate
RequestRequest Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
3
1. Add PJP65, 2. Change C307,C308 to 0402 size 3. Change C308 connection, 4. Change Mic detect power from +5V_ALW to +5V_RUN,
5. De-pop Q33,Q46,R424, 6. Move C1180 to +VREFOUT_R
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X02COMPAL42138 HW 10/19/2010 Change board ID to X02 Change R875 to 62k
X02
X02
X02
X02
X02
C C
145 47 HW 11/1/2010 NV Solve HDMI audio issue De-pop RV41, change RV97 to 34.8K and stuff it
146 47 HW 11/1/2010 NV
147
148 15
149 37 HW 11/16/2010 COMPAL To fix soldering issue Change express card connector JEXP1 to TAISOL 5-421005002000-9 X02
150 28 HW 11/17/2010 Intel Follow Intel CRB design
151 COMPAL11/18/2010HW12,13 Change JDIMMA1 & JDIMMB1 to JDIMM1 & JDIMM2Follow part reference design rule
152
B B
153
154 31 HW 11/22/2010 COMPAL Follow part reference design rule Change JMEDIA1 to JMDIA1
155 14 HW 11/22/2010 COMPAL Change SPI ROM to version C Change U52 to SA000039A1L, U53 to SA00003FO1L
156
157
159 18 HW 12/07/2010 COMPAL de-pop RH269 and add RH273 1Kohms pull lowAudio MIC detect selection
A A
160 33 HW 12/17/2010 COMPAL Follow NXP design guide Add @C575
47 11/1/2010 NV Follow NV request De-pop RV60, change RV54 to 10k and stuff it, change RV52 to 4.99k
46,47, 48,49
46 HW
HW
HW 11/5/2010 COMPAL To fix ME issue De-pop RH296,RH297, pop QH5,RH302,RH303
HW 11/18/2010 NV Change GPU to QS sample
COMPAL11/19/2010HW28,44 De-pop R499,R500,C393,Q28,R905,R907,C762,Q51For cost saving
12/03/2010 COMPAL Solve GPU reset timing issue Add RV33 100Kohms pull up to +3.3V_RUN and de-pop RV22
HW
12/07/2010 COMPALHW46158 Solve GPU reset timing issue de-pop RV33 and pop RV22
Chagne Device ID to 0x1056 De-pop RV51,change RV57 to 34.8k and stuff
Change R501,R502 to 10k
Change UV1 to N12P-NS-S-A1
Follow INTEL DG1.5 RSMRST# timing cicuitCOMPAL12/03/201042
Just add RSMRST# circuit for backup. but de-pop
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
A00
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (7/7)
EE P.I.R (7/7)
EE P.I.R (7/7)
LA-6592P
LA-6592P
LA-6592P
74 75Thursday, January 13, 2011
74 75Thursday, January 13, 2011
74 75Thursday, January 13, 2011
1
1.0
1.0
1.0
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
161 42 HW 12/20/2010 COMPAL Change Board ID Change R875 to 33k A00
162 42 HW 12/21/2010 COMPAL To solve backdrive issue Pop Q45 A00
163 33,34 HW 12/24/2011 COMPAL Change USH chip to CID7 Change U33 to SA00003AO1L A00
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
RequestRequest Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
3
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
A00COMPAL14160 HW 12/17/2010 For cost saving De-pop RH47,RH48,RH49,RH288
164 34 HW 1/6/2011 COMPAL
165 HW 1/11/2011 COMPAL For cost saving
C C
B B
update TPM/TCM pop option table Correct pop option table
Change 125pcs 0402 0 ohm resistors and 3pcs 0603 0 ohm footprint to new footprint which is short pin1 and pin2
A00
A00ALL
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (7/7)
EE P.I.R (7/7)
EE P.I.R (7/7)
LA-6592P
LA-6592P
LA-6592P
75 75Thursday, January 13, 2011
75 75Thursday, January 13, 2011
75 75Thursday, January 13, 2011
1
1.0
1.0
1.0
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