CMO V370H3-L02 Specification

Global LCD Panel Exchange Center
TFT LCD Approval Specification
MODEL NO.: V370H3 – L02
ʳ
Customer:
ʳ
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
ʳ
Approved by:
Note:
TVHD
Approved By
Chao-Chun Chung
Reviewed By
QA Dept. Product Development Div.
Hsin-nan Chen WT Lin
LCD TV Marketing and Product Management Div.
Prepared By
Josh Chi Chloe Chen
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- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 PACKAGE STORAGE
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
2.3.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
3.2.1 CCFL(Cold Cathode Fluorescent Lamp) CHARACTERISTICS
3.2.2 INVERTER CHARACTERISTICS
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 INVERTER UNIT
5.3 BLOCK DIAGRAM OF INTERFACE
5.4 LVDS INTERFACE
5.5 COLOR DATA INPUT ASSIGNMENT
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
9. PACKAGING
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
10.2 SAFETY PRECAUTIONS
10.3 SAFETY STANDARDS
11. MECHANICAL CHARACTERISTICS
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
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Model No.: V370H3-L02
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Version Date
Ver 2.0
Ver. 2.1
June. 16 ,’09
July. 14 ,’09
Page
(New)
All
Ε
34
REVISION HISTORY
Section Description
All
Approval Specification was first issued.
35
11
Modify mechanical drawing (Mark the tolerance)
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V370H3 - L02 is a 37” TFT Liquid Crystal Display module with 10-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 FHD format and can display true 16.7M colors (8-bit colors).
The inverter module for backlight is built-in.
1.2 FEATURES
- High brightness (450 nits)
- Ultra-high contrast ratio (4000:1)
- Faster response time (Gray to gray average 6.5ms)
- High color saturation NTSC 72%
- Ultra wide viewing angle : 176(H)/176(V) (CR>20) with Super MVA technology
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- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Color reproduction (nature color)
- Optimized response time for 60 Hz Frame rate
- Low color shift function
- RoHS compliance
1.3 APPLICATION
- TFT LCD TVs
- Multi-Media Display
1.4 GENERAL SPECIFICATIONS
Item Specification Unit Note Active Area 819.36(H) x 460.89 (V) (37” diagonal) mm Bezel Opening Area 828.6 (H) x 469.8 (V) mm Driver Element a-si TFT active matrix - Pixel Number 1920 x R.G.B. x 1080 pixel Pixel Pitch (Sub Pixel) 0.14225 (H) x 0.42675 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 16.7M color Display Operation Mode Transmissive mode / Normally black - Surface Treatment Anti-Glare coating (Haze 11%), Hard coating (3H) -
(1)
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 876 877 878 mm (1) Vertical(V) 516 516.8 517.6 mm (1)
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
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Depth(D) 32.4 36.4 37.4 mm To TOP Side Depth(D) 50.4 51.4 52.4 mm To PCB Cover Depth(D) 52 53 54 mm To INV Cover
Weight - 7900 - g
4
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
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Value
Min. Max.
- 50 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Unit Note
(a) 90 %RH Max. (Ta
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
Љ
40 ºC).
Relative Humidity (%RH)
100
90
80
60
40
20
10
Operating Range
Storage Range
Temperature (ºC)
5
8060-20 400 20-40
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2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to
store the module with temperature from 0 to 35 ºC at normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 13.5 V Input Signal Voltage VIN -0.3 3.6 V
Min. Max.
Value
Unit Note
(1)
2.3.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VW
Power Supply Voltage VBL
Ё
Control Signal Level
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional
Te st
Condition
Ta = 25
Ё Ё
Min. Type Max. Unit Note
к Ё
0
-0.3
Ё Ё Ё
3000 V
30 V
7 V
RMS
(1)
(1), (3)
operation should be restricted to the conditions described under normal operating conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control, Internal PWM Control, External PWM Control..
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3. ELECTRICAL CHARACTERISTICS
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Model No.: V370H3-L02
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3.1 TFT LCD MODULE
Parameter Symbol
Power Supply Voltage VCC 10.8 12.0 13.2 V (1) Power Supply Ripple Voltage VRP - - 200 mV Rush Current I
White -
Power Supply Current
Common Input Voltage V
Interface
interface
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
Terminating Resistor R Input High Threshold Voltage VIH 2.7 - 3.3 V CMOS Input Low Threshold Voltage V
+12v
Black -
Vertical Stripe
Ta = 25 ± 2 ºC
Value
Min. Typ. Max.
- - 4.5 A (2)
RUSH
0.86
ICC
-
1.125 1.25 1.375 V LVDS
LVC
- 100 - ohm
T
0 - 0.7 V
IL
0.65
0.85
1.0 A
- A
- A
Unit Note
(3)
Vcc rising time is 470us
+12V
0.9Vcc
0.1Vcc
GND
470us
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Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
Active Area
c. Vertical Stripe Pattern
b. Black Pattern
Active Area
R
G
R
B
G
B
B
R
R
G
G
B
B
R
= 60
v
R
Active Area
B
R R
G
G
B
B
R
G
G
3.2 BACKLIGHT UNIT
3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (
Parameter Symbol
Lamp Voltage VW Lamp Current IL
Lamp Starting Voltage VS
Operating Frequency FO 30 - 80 Operati FO Lamp Life Time LBL 50,000 - - Lamp LBL
Min. Typ. Max.
- 990 -
11.5 12.0 12.5
- -
- -
Value
1730 1340
Ta = 25 ± 2 ºC)
Unit Note
Lamp
mA
RMS
B
R
B
Ih = 12.0mA
(1)
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Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring
master and slave board.
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Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second after startup.
S
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
display input signals, and it may result in line flow on the display. In order to avoid interference, the
lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at
the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25
2к
and IL = 11.5~ 12.5mArms.
3.2.2 INVERTER CHARACTERISTICS (
Parameter Symbol
Power Consumption PBL
Power Supply Voltage VBL 22.8
Power Supply Current IBL
Ta = 25 ± 2 ºC)
Value
Min. Typ. Max.
Ё
Ё
110 120 W (5) (6) I
24
4.375
25.2
Ё
Unit Note
V
A Non Dimming
DC
= 12.0mA
L
Input Ripple Noise
Ё
-
Ё
Ё
912 mV
P-P
VBL =22.8V
Oscillating Frequency FW 37.0 40.0 43.0 kHz (3)
Dimming Frequency FB 150 160 170 Hz
Ё
Minimum Duty Ratio D
20
MIN
%
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second after startup.
S
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
display input signals, and it may result in line flow on the display. In order to avoid interference, the
lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value
and the effective discharge length is longer than 80% of its original length (Effective discharge
length is defined as an area that has equal to or more than 70% brightness compared to the
brightness at the center point of lamp.) as the time in which it continues to operate under the
condition at Ta = 25
2к
and IL = 11.5~12.5 mArms.
Note (5) The power supply capacity should be higher than the total inverter power consumption P
BL
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
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changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
Note (6) The measurement of Max. value is based on 37” backlight unit under 24V input voltage and 12.3
mA lamp in average after lighting for 30 minutes.
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A
A
A
A
A
LCD Module Inverter
A
A
A
A
A
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X
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
Parameter Symbol
On/Off Control Voltage
Voltage
Voltage
Status Signal
VBL Rising Time Tr1 VBL Falling Time Tf1 Control Signal Rising Time Tr Control Signal Falling Time Tf PWM Signal Rising Time T PWM Signal Falling Time T Input impedance RIN PWM Delay Time T
BLON Delay Time
BLON Off Time T
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to
ON
OFF
MA
MIN
HI 2.0
LO
HI 3.0 3.3 3.6 V Normal
LO
V
BLON
V
IPWM
V
EPWM
Status
PW MR
PW MF
PW M
Ton
T
on1
off
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Te st
Condition
Ё Ё
Ё
Ё
Ё
Ё
30 Ё
Ё
30 Ё
Ё Ё Ё Ё Ё Ё
100 Ё ms
Ё
300 Ё
ЁЁЁЁ
300
Ё
300 Ё
Min. Typ. Max.
2.0
3.15 3.3 3.45 V Maximum duty ratioInternal PWM Control
Ё
Ё Ё Ё Ё
0
0
0
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Val ue
Ё Ё
0
Ё Ё
Ё
Ё Ё Ё Ё Ё
ЁЁЁЁ
5.0 V
0.8 V
Ё
5.0 V Duty onExternal PWM Control
0.8 V Duty off
0.8 V Abnormal
Ё Ё
100 ms 100 ms
50 us 50 us
Ё
Ё Ё Ё
Unit Note
VMinimum duty ratio
ms ms
ms ms ms
10%-90%V
M˖
BL
change the internal/external PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure. For a certain
reason, the inverter has a possibility to be damaged with wrong power sequence and control
signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL
Turn OFF sequence: BLOFF
Ш
PWM signal Ш BLON
ψ
PWM signal ψ VBL
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V
V
V
BL
V
BLON
EPWM
IPWM
9
Toff
%/
Tf1
9
%/
Tr1
9
%/
9
%/
2.0V
0.8V
3.3V
2.0V
0.8V
Ton
T
Backlight on duration
Tr
Ext. Dimming Function
T
PWMR
PWM
Floating
T
Ton1
Tf
PWMF
Floating
Int. Dimming Function
0
0
0
0
V
W
External
PWM
Period
External
PWM Duty
100%
Minimun
Duty
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4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ECLK(+/-)
SELLVDS
ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
OCLK(+/-)
Vcc
GND
(FI-RE51S-HF ) or equal
INPUT CONNECTOR
CNF1
FI-RE51S-HF-J,JAE
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FRAME BUFFER
TIMING
CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
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Model No.: V370H3-L02
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SCAN DRIVER IC
TFT LCD PANEL
(1920x3x1080)
DATA DRIVER IC
VBL
GND
Status
E_PWM
I_PWM
BLON
CN1
INVERTER CONNECTOR
CN1: CI0114M1HR0-LA (CviLux)
BACKLIGHT
UNIT
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5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
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CNF1 Connector Pin Assignment
Pin Name Description Note
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7 SELLVDS LVDS data format Selection (3)(4)
8 N.C. No Connection (2)
9 N.C No Connection (2)
10 N.C. No Connection (2)
11 N.C. No Connection (2)
12 ERX0- Even pixel Negative LVDS differential data input. Channel 0
13 ERX0+ Even pixel Positive LVDS differential data input. Channel 0
14 ERX1- Even pixel Negative LVDS differential data input. Channel 1
(2)
15 ERX1+ Even pixel Positive LVDS differential data input. Channel 1
16 ERX2- Even pixel Negative LVDS differential data input. Channel 2
17 ERX2+ Even pixel Positive LVDS differential data input. Channel 2
18 GND Ground
19 ECLK- Even pixel Negative LVDS differential clock input.
20 ECLK+ Even pixel Positive LVDS differential clock input.
21 GND Ground
22 ERX3- Even pixel Negative LVDS differential data input. Channel 3
23 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
24 N.C. No Connection (2)
25 N.C. No Connection (2)
26 N.C. No Connection (2)
27 N.C. No Connection (2)
28 ORX0- Odd pixel Negative LVDS differential data input. Channel 0
29 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0
30 ORX1- Odd pixel Negative LVDS differential data input. Channel 1
31 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1
32 ORX2- Odd pixel Negative LVDS differential data input. Channel 2
33 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2
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34 GND Ground
35 OCLK- Odd pixel Negative LVDS differential clock input
36 OCLK+ Odd pixel Positive LVDS differential clock input
37 GND Ground
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38 ORX3-
39 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3
40 N.C. No Connection (2)
41 N.C. No Connection (2)
42 N.C. No Connection (2)
43 N.C. No Connection (2)
44 GND Ground
45 GND Ground
46 GND Ground
47 GND Ground
48 VCC Power input (+12V)
49 VCC Power input (+12V)
50 VCC Power input (+12V)
51 VCC Power input (+12V)
Note (1) Connector part no.:
Note (2) Please be reserved to open.
Odd
pixel Negative LVDS differential data input. Channel 3
JAE, FI-RE51S-HF
or equivalent
Note (3)
Note (4) Low = Open or connect to GND, High = Connect to +3.3V
Low : VESA LVDS Format (default), High : JEIDA LVDS Format
.
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5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
Pin No. Symbol Description
NA NA NA NA
Note (1) The backlight interface housing for high voltage side is a model
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Wire Color
CPLEA4C1000
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, manufactured by
CVILUX
or equivalent
.
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5.3 INVERTER UNIT
CN1 (Header): CI0114M1HR0-LA (CviLux)
Pin No. Symbol Description
1 2 3 4 5 6 7 8 9
10
11 Status
12 E_PWM External PWM Control 13 I_PWM Internal PWM Control 14 BLON BL ON/OFF
VBL +24V Power input
GND Ground
Normal (3.3V) Abnormal (0V)
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Notice:
PIN 13:Intermal PWM Control (Use Pin 13): Pin 12 must open.
PIN 12:External PWM Control (Use Pin 12): Pin 13 must open.
Pin 13(I_PWM) and Pin 12(E_PWM) can’t open in same period.
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p
p
OR0
5.3 BLOCK DIAGRAM OF INTERFACE
CNF1
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ERx0+
ER0-ER7
-
-
ERx1+
ERx1-
ERx2+
OR0-OR7
-
-
ERx3+
ERx3-
ECLK+
Host
Graphics
Controller
ORx0+
ORx1+
ORx1-
51
Ө
51
51
51
51
51 51
51
100pF
Ө
Ө
100
Ө
Ө
100pF
Ө Ө
100pF
Ө
F
-
-
RxOUT
ER0-ER7
-
-
-OR7
-
-
51
Ө
51
100pF
Ө
-
Timing
51
Ө
51
51
Ө
Ө
100pF
100
F
-
Controller
ORx2+
-
ORx3+
ORx3-
51
Ө
100pF
51
Ө
51
Ө
100pF
51
Ө
OCLK+
51
Ө
51
100pF
Ө
-
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
LVDS Receiver
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ER0~ER7 : Even pixel R data
EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
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used differentially.
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is old pixel and the
second pixel is even pixel.
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5.4 LVDS INTERFACE
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Model No.: V370H3-L02
APPROVAL
VESA LVDS forma
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
Κʻ˦˘˟˟˩˗˦ʳ˼ː˟ʳʳˢˣ˘ˡʼʳ
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
Current F\FOH
Current F\FOH
R0
R0
G3 G2G4
G3 G2G4
G3 G2G4
G3 G2G4
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
ERX3
ERX3
JEDIA LVDS forma
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
Κʻ˦˘˟˟˩˗˦ʳ˼ː˛ʼʳ
Current F\FOH
Current F\FOH
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
G5 G4G6
G5 G4G6
G5 G4G6
G5 G4G6
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R2
R2
G3
G3
ʳ
B4B6 B5B7VS HSDE
ERX2
ERX2
ERX3
ERX3
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
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R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
DCLK : Data clock signal
Notes (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
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5.5 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0) / Dark
Red(1)
Red(2)
:
:
Red(253)
Red(254)
Red(255)
Green(0) / Dark
Green(1)
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
1
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
0
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
1
0
1
0
1
1
1
0
0
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
1
0
0
:
:
0
1
0
0
0
1
0
0
0
0
0
0
:
:
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
:
:
:
:
:
:
1
0
1
0
1
1
1
1
1
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y
(1)
(1)
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequenc
LVDS Receiver Clock
Input cycle to
cycle jitter
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1/Tc 60 74.25 80 MH
Trcl - - 200 ps
Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
Z
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) (ODSEL) = (H) , (L). Please refer to 5.1 for detail information.
Note (2) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to
low logic level. Otherwise, this module would operate abnormally.
Setup Time Tlvsu 600 - - ps Hold Time Tlvhd 600 - - ps
Fr
Frame Rate
To ta l Tv Display Tvd Blank Tvb Tot a l Th Display Thd
Thb
Blank
Fr
5
6
47 50 53 Hz 57 60 63 Hz
1115 1125 1135
1080 1080 1080
35 45 55
1050 1100 1150
960 960 960
90 140 190
Th Tv=Tvd+Tvb Th ­Th -
Tc Th=Thd+Thb Tc - Tc -
INPUT SIGNAL TIMING DIAGRAM
Tvd
Tv
Tvb
DE
DCLK
DE
DATA
T
h
T
c
T
hb
Valid display data (960 clocks)
23
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T
14
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
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6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the
diagram below.
Power Supply
Vcc
0.5ЉT
0
0
500ms
1
Љ
10ms
Љ
T
2
Љ
50ms
Љ
T
3
Љ
50ms
Љ
T4
LVDS Signals
0ЉT
0
7
Љ
T2
Љ
T
8
Љ
T3
Option Signals
(SELLVDS, ODSEL)
0V
0V
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0.9VCC 0.9VCC
0.1V
CC
3
T1
T
2
T
VA L I D
Power On
T7
Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
cc
0.1V
T4
Power Off
8
T
Backlight (Recommended)
Љ
500ms
100msЉT
T5
6
50%
5
T
50%
6
T
Power ON/OFF Sequence
Note.
(1) The supply voltage of the external system for the module input should follow the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the
LCD operation or the LCD turns off before the backlight turns off, the display may momentarily
become abnormal screen. There is no reliability issue when the T5, T6 timing missing the range.
(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
(4) T4 should be measured after the module has been fully discharged between power off and on
period.
(5) Interface signal shall not be kept at high impedance when the power is on.
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y
(2)
(4)
)
k
(5)
(
)
y
(
)
(
)
y
(
)
y
(
)
y
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current(HV) IL Oscillating Frequency
(Balance Board) Frame rate 60 Hz
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12.0 ± 0.5
F
W
25±2
50±10
63±3
Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
o
C
%RH
mA
KHz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should
be measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item S
Contrast Ratio CR 3500 4000
Response Time
Center Luminance of White L White Variation Cross Tal
Red
Green Color Chromaticity
Viewing Angle
Blue
White
Color Gamut CG
Horizontal
Vertical
mbol Condition Min. Typ. Max. Unit Note
-
Gray to gray
average
δW
CT - - 4.0 % Rx R Gx G Bx (0.149) -
B Wx 0.285 ­W
θ
+
θ
-
θ
+
-
θ
=0°, θY =0°
θ
x
Viewing angle at
Normal direction
CR20
- 6.5 12 ms (3)
360 450
--1.3-(7
0.638
0.320
0.291
Typ. –
0.03
70 72 % NTSC 80 88 ­80 88 ­80 88 ­80 88 -
0.593
0.060
0.293
-
Typ. +
0.03
cd/
Deg
-
-
-
-
-
-
-
.
(6)
(1)
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Note (1) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by EZ-Contrast 160R (Eldim)
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
Note (2) Definition of Contrast Ratio (CR):
θX- = 90º
6 o’clock
θ
y-
= 90º
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx
θx+
12 o’clock direction
y+
θ
y+
= 90º
x+
θX+ = 90º
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in
Note (7).
Note (3) Definition of Gray to Gray Switching Time :
Optical
Response
100%
90%
10%
0%
Gray to gray switching time
Gray to gray switching time
Time
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(
)
(
)
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The driving signal means the signal of gray level 0, 63, 127, 191, 255.
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each
other .
Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point and 5 points
LC = L (5)
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA × 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 255 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 255 pattern (cd/m2)
B
(0, 0)
Active Area
Y
(D/8,W/2)
A, L
Gray 0
Y
(D/2,7W /8)
A, D
Y
Y
D,W
A, U
A, R
, L
):
C
AVE
(D/2,W /8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W /8)
B, D
(0, 0)
Active Area
Gray 0
Gray 255
Gray 0
Y
(D/2,W /8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D,W
28
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Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be
executed after lighting Backlight for 1 hour in a windless room.
LCD Module
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
Note (7) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
LCD Panel
Center of the Screen
Horizontal Line
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
D
D/4 D/2 3D/4
12
: Test Point
5
X
X=1 to 5
W
W/4
W/2
Vertical Line
3W /4
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Active Area
29
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8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
CHI MEI
OPTOELECTRONICS
CHI MEI
OPTOELECTRONICS
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V370H3 -L02 Rev. XX
X X X X X X X Y M D L N N N N
V370H3 -L02 Rev. XX
X X X X X X X Y M D L N N N N
Issued Date: July 14, 2009
Model No.: V370H3-L02
E207943
MADE IN TAIWAN
RoHS
E207943
MADE IN TAIWAN
MADE IN CHINA
LEOO(or CAPG or CANO)
RoHS
APPROVAL
(a) Model Name: V370H3-L02
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) CMO barcode definition:
Serial ID: XX-XX-X-XX-YMD-L-NNNN
Code Meaning Description
XX CMO internal use ­XX Revision Cover all the change
X-XX CMO internal use -
Year, month, day
YMD
NNNN Serial number Manufacturing sequence of product
L Product line # Line 1=1, Line 2=2, Line 3=3, …
Year: 2001=1, 2002=2, 2003=3, 2004=4…
Month: Jan. ~ Dec.=1, 2, 3, ~, 9, A, B, C
st
Day: 1
to 31st =1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 5 LCD TV modules / 1 Box
(2) Box dimensions : 954(L)x378(W)x602(H)mm
(3) Weight : approximately 42.5 Kg ( 5 modules per box)
9.2 PACKING METHOD
Figures 10-1 and 10-2 are the packing method
LCD TV Module
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
Carton
Anti-Static Bag
Cushion(Bottom)
Carton Label Loction
Module*5pcs
Cushion(Top)
2 pcs Drier
Carton Label
Figure.9-1 packing method
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(40ft Container)
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
Air TransportationSea / Land Transportation
Figure.9-2 Packing method
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Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
10.3 SAFETY STANDARDS
The LCD module should be certified with safety regulations as follows:
(1) UL60950-1 or updated standard.
(2) IEC60950-1 or updated standard.
(3) UL60065 or updated standard.
(4) IEC60065 or updated standard.
33
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
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Version 2. 1
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
11. MECHANICAL CHARACTERISTICS
ڻႝηިҽԖϦљ
34
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Version 2. 1
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: July 14, 2009
Model No.: V370H3-L02
APPROVAL
ڻႝηިҽԖϦљ
CHI MEI
35
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO ’s representative while your product design is based on this specification.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
www.panelook.com
Version 2. 1
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