CMO V370B1-P02 Specification

Global LCD Panel Exchange Center

Issued Date:Aug. 24, 2009

Model No.: V370B1-P02

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Approval

TFT LCD Approval Specification

MODEL NO.: V370B1-P02

Customer:

Approved by:

Note:

TV Product Marketing & Management Div

Approved By

Chao-Chun Chung

QA Dept. Product Development Div.

Reviewed By

Hsin-Nan Chen WT Lin

LCD TV Marketing and Product Management Div.

Prepared By

Josh Chi Chloe Chen

1

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- CONTENTS -

REVISION HISTORY

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 CHARACTERISTICS

1.3 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMO MODULE V260B1-L11)

2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)

2.3 ELECTRICAL ABSOLUTE RATINGS (OPEN CELL)

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD OPEN CELL

4. BLOCK DIAGRAM

4.1 TFT LCD OPEN CELL

5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

5.2 BLOCK DIAGRAM OF INTERFACE

5.3 LVDS INTERFACE

5.4 COLOR DATA INPUT ASSIGNMENT

-------------------------------------------------------

5.5 PATTERN FOR Vcom ADJUSTMENT

3

4

5

8

11

12

6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

8.2 SAFETY PRECAUTIONS

9. PACKING

9.1 PACKING SPECIFICATIONS

9.2 PACKING METHOD

10. REGULATORY STANDARD

10.1 SAFETY

11. DEFINITION OF LABELS

11.1 OPEN CELL LABEL

11.2 CARTON LABEL

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18

22

26

27

29

30

12. MECHANICAL DRAWING ------------------------------------------------------- 31

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REVISION HISTORY

Version Date

2.0 08/24/2009 All All Approval Specification was first issued.

Page

(New)

Section Description

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V370B1- P02 is a 37” TFT LCD cell with driver ICs and a 1-ch LVDS interface. The product supports 1366

x 768 WXGA mode and can display true 16.7M colors. The backlight unit is not built in.

1.2 CHARACTERISTICS

CHARACTERISTICS ITEMS SPECIFICATIONS

Screen Diagonal [in] 37 Pixels [lines]

Active Area [mm] Sub -Pixel Pitch [mm]

Pixel Arrangement RGB vertical stripe

Weight [g] TYP. 1630

Physical Size [mm] 841.4(W) x 480.4(H) x 1.75(D) Typ.

Display Mode Transmissive mode / Normally black Contrast Ratio 3000:1 Typ.

Glass thickness (Array/CF) [mm] 0.7 / 0.7 Viewing Angle (CR>20) +88/-88(H),+88/-88(V) Typ.

Color Chromaticity R=(0.654, 0.329)

Cell Transparency [и]

Polarizer (CF side) Anti-glare coating,

Polarizer (TFT side) 834.2(H) x 475.8(w), Hardness: 2H

1366768

819.6460.8

0.2(H)0.6(V)

(Typical value measured at CMO’s module)

G=(0.274, 0.590) B=(0.130,0.124) W=(0.310, 0.356)

(Light source is the standard light source “C” which is defined by CIE and driving voltages are based on suitable gamma voltages.)

6.0%Typ. (Typical value measured at CMO’s module)

834.2(H) x 475.8(w). Hardness: 2H

1.3 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Weight 1630 g

I/F connector mounting position

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

(2) Connector mounting position

The mounting inclination of the connector makes the screen center within ±0.5mm as the horizontal.

+/- 0.5mm

4

(2)

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMO MODULE V260B1-L11)

Item Symbol

Storage Temperature TST -20 +60 ºC (1), (3) Operating Ambient Temperature TOP 0 50 ºC (1), (2), (3) Altitude Operating A OP 0 5000 M (3) Altitude Storage A ST 0 12000 M (3)

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation..

Min. Max.

Value

Unit Note

Relative Humidity (%RH)

100

90

80

60

Operating Range

40

20

10

Storage Range

Temperature (ºC)

80 60 -20 40 0 20 -40

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled

chamber. Thermal management should be considered in your product design to prevent the surface

temperature of display area from being over 65 ºC. The range of operating temperature may

degrade in case of improper thermal management in your product design.

Note (3) The rating of environment is base on LCD module. Leave LCD cell alone, this environment condition can’t

be guaranteed. Except LCD cell, the customer has to consider the ability of other parts of LCD module

and LCD module process.

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2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)

Storage Condition : With shipping package.

Storage temperature range : 25±5 к

Storage humidity range : 50±10%RH

Shelf life : a month

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage Vcc -0.3 13.5 V Input Signal Voltage VIN -0.3 3.6 V

Min. Max.

Value

Unit Note

(1)

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

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3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

(Ta = 25 ± 2 ºC)

Value

Parameter Symbol

Min. Typ. Max.

Unit Note

Power Supply Voltage V

Rush Current I

White Pattern

Power Supply Current

Vertical Stripe

Black Pattern

LVD S interface

Differential Input High Threshold Voltage

Differential Input Low Threshold Voltage

Common Input Voltage V

V

Differential input voltage |VID| 200

Terminating Resistor R

CMOS interface

Input High Threshold Voltage V

Input Low Threshold Voltage V

CC

RUSH

10.8 12 13.2 V (1)

ЁЁ

LVT H

LVT L

CM

T

IH

IL

+100

ЁЁ

1.0 1.2 1.4 V

Ё

2.7

0

3.3 A (2)

0.43 0.5 A

0.43

0.3

ЁЁ

Ё

A

mV

-100 mV

Ё

100

Ё

600 mV

Ё

ohm

3.3 V

0.7 V

(3)

(4)

Note (1) The module should be always operated within the above ranges.

Note (2) Measurement condition:

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GND

Vcc rising time is 470us

+12V

0.9Vcc

0.1Vcc

470us

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Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60 Hz,

whereas a power dissipation check pattern below is displayed.

a. White Pattern

Active Area

c. Vertical Stripe Pattern

b. Black Pattern

Active Area

Note (4) The LVDS input characteristics are as follows:

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4. BLOCK DIAGRAM

4.1 TFT LCD OPEN CELL

RX0(+/-)

RX1(+/-)

RX2(+/-)

RX3(+/-)

RXCLK

Vcc

GND

ODSEL

SELLVDS

+/-

093G30-B0001A or

INPUT CONNECTOR

(STARCONN

FRAME BUFFER

TIMING

CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

SCAN DRIVER IC

TFT LCD PANEL

(1366x3x768)

DATA DRIVER IC

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

Pin assignment

CNF1 Connector Pin Assignment

Pin No. Symbol Description Note

1 VCC Power supply: +12V 2 VCC Power supply: +12V 3 VCC Power supply: +12V 4 VCC Power supply: +12V 5 GND Ground 6 GND Ground 7 GND Ground 8 NC No connection 9 SELLVDS Select LVDS data format (2)

10 ODSEL Overdrive Lookup Table Selection (3)

11 GND Ground 12 RX0- Negative transmission data of pixel 0 13 RX0+ Positive transmission data of pixel 0 14 GND Ground 15 RX1- Negative transmission data of pixel 1 16 RX1+ Positive transmission data of pixel 1 17 GND Ground 18 RX2- Negative transmission data of pixel 2 19 RX2+ Positive transmission data of pixel 2 20 GND Ground 21 RXCLK- Negative of clock 22 RXCLK+ Positive of clock 23 GND Ground 24 RX3- Negative transmission data of pixel 3 25 RX3+ Positive transmission data of pixel 3 26 GND Ground 27 TST_AGE Aging Mode (4) 28 NC No connection (5) 29 NC No connection 30 GND Ground

Note (1) Connector type: STARCONN 093G30-B0001A or compatible

LVDS connector pin orderdefined as follows

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Note (2) Ground or OPEN: VESA, High: JEIDA LVDS format

Please refer to 5.5 LVDS INTERFACE

Note (3) Overdrive lookup table selection. The Overdrive lookup table should be selected in accordance to the frame

rate to optimize image quality.

ODSEL Note

L or Open Lookup table was optimized for 60 Hz frame rate.

H Lookup table was optimized for 50 Hz frame rate.

Note (4) Ground or OPEN : Disable , HIGH : Enable.

Note (5) Reserved for internal use. Left it open.

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5.2 BLOCK DIAGRAM OF INTERFACE

CN1

R0-R7

G0-G7

B0-B7

DE

Host

Graphics

Controller

TxIN

PLL

LVDS Transmitter

THC63LVDM83A

(LVDF83A)

Rx0+

Rx0-

Rx1+

Rx1-

Rx2+

Rx2-

Rx3+

-

CLK+

-

51Ө

100pF

51Ө

100

51Ө

100pF

51Ө 51Ө

100pF

51Ө

100pF

51Ө

LVDS Receiver

THC63LVDF84A

RxOUT

R0-R7

G0-G7

F

B0-B7

DE

PLL

DCLK

Timing

Controller

R0~R7 : Pixel R Data ,

G0~G7 : Pixel G Data ,

B0~B7 : Pixel B Data ,

DE : Data enable signal

Note (1) The system must have the transmitter to drive the module.

Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is

used differentially.

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5.3 LVDS INTERFACE

SELLVDS = L or Open (VESA)

SELLVDS = H (JEIDA)

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

Notes(1) RSVD(reserved)pins on the transmitter shall be “H” or( “L” or OPEN)

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5.4 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of color

versus data input.

Data Signal

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black

Red

Green

Basic

Colors

Gray

Scale

Of

Red

Gray

Scale

Of

Green

Gray

Scale

Of

Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue

Cyan

Magenta

Yellow

White

Red(0) / Dark

Red(1)

Red(2)

:

Red(253)

Red(254)

Red(255)

Green(0) / Dark

Green(1)

Green(2)

:

Green(253)

Green(254)

Green(255)

Blue(0) / Dark

Blue(1)

Blue(2)

:

Blue(253)

Blue(254)

Blue(255)

0

1

0

1

0

:

1

0

:

0

:

0

Red Green Blue

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

:

0

:

0

1

:

1

0

1

0

:

0

:

0

1

0

:

1

0

1

0

:

0

1

0

1

0

1

0

:

0

:

0

:

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

1

0

1

0

:

1

0

1

0

1

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5.5 PATTERN FOR Vcom ADJUSTMENT

2line-inversion pattern ( 2n)

Gray level = 128

!

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

F

LVDS Receiver Clock

Frequency

clkin

(=1/TC)

Input cycle to

cycle jitter Trcl - - 200 ps (3)

60 76 82 MH

Z

Spread spectrum modulation range

clkin_mod

F

-2%

clkin

Ё

F

+2% MHz

clkin

(4)

LVDS Receiver Data

Vertical Active Display Te rm

Spread spectrum modulation frequency

Setup Time Tlvsu 600 - - ps Hold Time Tlvhd 600 - - ps

Frame Rate

Total Tv 778 806 888 Th Tv=Tvd+Tvb Display Tvd 768 768 768 Th -

F

200 KHz

SSM

Fr5 47 50 53 Hz Fr

6

57 60 63 Hz

(5)

(6)

Blank Tvb 10 38 120 Th -

Horizontal Active Display Term

Total Th 1442 1560 1936 Tc Th=Thd+Thb Display Thd 1366 1366 1366 Tc Blank Thb 76 194 570 Tc -

Note (1) ˣ˿˸˴˸ʳ˴˾˸ʳ˸ʳ˻˸ʳ˴˺˸ʳ˹ʳ˼˸˿ʳ˶˿˶˾ʳ˻˴ʳ˹˿˿ʳ˻˸ʳ˵˸˿ʳ˸˴˼Κʳ ʳ ʳ

˙

˶˿˾˼ʻ˴ʼ

F

r

ʳЊʳ˙



ˉʳѼʳ˧ʳѼʳ˧˻

5 Ѽ Tv Ѽ Th Њ F

ʳ

clkin(min)

Note (2) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to low

logic level. Otherwise, this module would operate abnormally.

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INPUT SIGNAL TIMING DIAGRAM

Tv

DE

DCLK

DE

DAT

Th

Tvd

Tvb

Thd

Valid display data (1366)

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI

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Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

1T

3T

5T

7T

9T

11T

13T

14

Note (6) : (ODSEL) = H/L or open for 50/60Hz frame rate. Please refer to 5.1 for detail information

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