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MODEL NO.: V320HH6
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PRODUCT SPECIFICATION
ϭʳ Tentative Specification
ϮϮ ϮϮ ʳ Preliminary Specification
ϭʳ Approval Specification
SUFFIX: PSA
Customer:
APPROVED BY SIGNATURE
Name / Title
Note
Please return 1 copy for your confirmation with your
signature and comments.
Approved By Checked By Prepared By
Chao-Chun Chung
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Kevin Tsai
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PRODUCT SPECIFICATION
CONTENTS
REVISION HISTORY ..................................................................................................................................................4
1. GENERAL DESCRIPTION ......................................................................................................................................5
1.1 OVERVIEW....................................................................................................................................................5
1.2 FEATURES ....................................................................................................................................................5
1.3 MECHANICAL SPECIFICATIONS ..................................................................................................................5
2. ABSOLUTE MAXIMUM RATINGS ...........................................................................................................................6
2.1 ABSOLUTE RATINGS OF ENVIRONMENT....................................................................................................6
2.2 PACKAGE STORAGE....................................................................................................................................7
2.3 ELECTRICAL ABSOLUTE RATINGS..............................................................................................................7
2.3.1 TFT LCD MODULE...............................................................................................................................7
2.3.2 BACKLIGHT INVERTER UNIT .............................................................................................................7
3. ELECTRICAL CHARACTERISTICS ........................................................................................................................8
3.1 TFT LCD MODULE.........................................................................................................................................8
4. BLOCK DIAGRAM OF INTERFACE ...................................................................................................................... 11
4.1 TFT LCD MODULE....................................................................................................................................... 11
5.1 TFT LCD Module Input .................................................................................................................................12
5.4 BLOCK DIAGRAM OF INTERFACE .............................................................................................................18
5.5 LVDS INTERFACE .......................................................................................................................................20
5.6 COLOR DATA INPUT ASSIGNMENT............................................................................................................21
6. INTERFACE TIMING.............................................................................................................................................22
6.1 INPUT SIGNAL TIMING SPECIFICATIONS..................................................................................................22
7. OPTICAL CHARACTERISTICS.............................................................................................................................28
7.1 TEST CONDITIONS.....................................................................................................................................28
8. PRECAUTIONS ....................................................................................................................................................34
8.1 ASSEMBLY AND HANDLING PRECAUTIONS.............................................................................................34
8.2 SAFETY PRECAUTIONS.............................................................................................................................34
9. DEFINITION OF LABELS...................................................................................................................................... 35
9.1 CMO MODULE LABEL................................................................................................................................. 35
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PRODUCT SPECIFICATION
10. PACKAGING.......................................................................................................................................................36
10.1 PACKAGING SPECIFICATIONS.................................................................................................................36
10.2 PACKAGING METHOD..............................................................................................................................36
11. MECHANICAL CHARACTERISTIC......................................................................................................................38
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REVISION HISTORY
Version Date Page(New) Section Description
Ver. 1.0 Jan. 21, 2010 All All The preliminary specification was first issued.
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PRODUCT SPECIFICATION
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V320HH6-PSA is a 32.0” TFT Liquid Crystal Display module with Backlight unit and 4ch-LVDS interface. This
module supports 1920 x 1080 Full HDTV format and can display 16.7M colors (8-bit).
1.2 FEATURES
CHARACTERISTICS ITEMS SPECIFICATIONS
Screen Diagonal [in] 32.0
Pixels [lines] 1920
Active Area [mm] 698.4(H) x 392.85(V) (32.0” )
Sub-Pixel Pitch [mm] 0.12125 (H) x 0.36375 (V)
Pixel Arrangement RGB vertical stripe
Weight [g] TYP. 2100g
Physical Size [mm] 716.1(W) 410(H) 1.79(D) Typ.
Display Mode Transmissive mode / Normally White
Contrast Ratio 1000:1 Typ.
Viewing Angle (CR>10) 160°(H)/150°(V) (CR>10) TN Technology
Color Chromaticity R = (0.647, 0.328)
Cell Transparency [%] ˈˁ˄˃ʸ
Polarizer Surface Treatment Anti-Glare coating (Haze 25%)
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PRODUCT SPECIFICATION
1080
(Typical value measure at CMO’s module)
(Typical value measure at CMO’s module)
G = (0.279, 0.633)
B = (0.154, 0.058)
W= (0.280, 0.290)
1.3 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Weight 2100 g -
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 50 ºC (1), (2)
Shock (Non-Operating) SNOP - 50 G (3), (5)
Vibration (Non-Operating) VNOP - 1.0 G (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below.
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PRODUCT SPECIFICATION
Value
Unit Note
Min. Max.
(a) 90 %RH Max. (Ta
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that
the module would not be twisted or bent by the fixture.
Љ 40 ºC).
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2.2 PACKAGE STORAGE
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to
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PRODUCT SPECIFICATION
store the module with temperature from 0 to 35
(b) The module shall be stroed in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage VCC -0.3 13.5 V
Logic Input Voltage VIN -0.3 3.6 V
2.3.2 BACKLIGHT INVERTER UNIT
Item Symbol
Lamp Voltage VW
к at normal humidity without condensation.
Value
Unit Note
Min. Max.
Value
Unit Note
Min. Max.
Ё
3000 VRMS
(1)
Power Supply Voltage VBL 0 30 V (1)
Control Signal Level
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control and Internal PWM Control.
Ё
-0.3 7 V (1), (3)
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
(Ta = 25 ± 2 ºC)
Parameter Symbol
Power Supply Voltage VCC 10.8 12 (13.2) V (1)
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PRODUCT SPECIFICATION
Value
Unit Note
Min. Typ. Max.
Rush Current I
White Pattern
Power Consumption
Horizontal Stripe
Black Pattern
White Pattern
Power Supply Current
Horizontal Stripe
Black Pattern
Differential Input High
Threshold Voltage
Differential Input Low
Threshold Voltage
LVDS
interface
Common Input Voltage VCM 1.0 1.2 1.4 V
Differential input voltage
(single-end)
Terminating Resistor R
CMIS
interface
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
Ё Ё
RUSH
Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
Ё Ё
V
LVT H
V
LVTL
| 200
|V
ID
T
0
IL
+100
Ё
Ё Ё
Ё
(4) A (2)
(6.6) (7.8) W
(15) (17.4) W
(15) (17.4) W
(0.55) (0.65) A
(1.25) (1.45) A
(1.25) (1.45) A
Ё Ё
mV
-100 mV
Ё
100
Ё
Ё
600 mV
Ё
ohm
3.3 V
0.7 V
(3)
(4)
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:
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PRODUCT SPECIFICATION
(Low to High)
Control Sig na l
SW
+12V
Vcc
Q1 Si4485DY
Fus e
R1
1k
VR1
47k
R2
1k
Q2
2N7002
C1
0.01uF
(LCD Module Input)
C3
1uF
Vcc rising time is 470us
Vcc
0.9Vcc
GND
0.1Vcc
470us
Note (3) The specified power consumption and power supply current is under the conditions at Vcc = 12 V, Ta =
25 ± 2 ºC, f
= 120 Hz, where as a power dissipation check pattern below is displayed.
v
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PRODUCT SPECIFICATION
a. White Pattern
c. Horizontal Pattern
Active Area
b. Black Pattern
Active Area
Note (4) The LVDS input characteristics are as follows:
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4. BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
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PRODUCT SPECIFICATION
CH3_0(+/-)
CH3_1(+/-)
CH3_2(+/-)
CH3_3(+/-)
CH3_CLK(+/-)
CH4_0(+/-)
CH4_1(+/-)
CH4_2(+/-)
CH4_3(+/-)
CH4_CLK(+/-)
CH1_0(+/-)
CH1_1(+/-)
CH1_2(+/-)
CH1_3(+/-)
CH1_CLK(+/-)
CH2_0(+/-)
CH2_1(+/-)
CH2_2(+/-)
CH2_3(+/-)
CH2_CLK(+/-)
SELLVDS
2D/3D
LR
LD_EN
GND
INPUT CONNECTOR
CNF2: 187060-41221 (P-Two),
or equivalent
SCAN DRIVER
TIMING
TFT LCD PANEL
(1920x3x1080)
CONTROLLER
INPUT CONNECTOR
CNF1: 187059-51221 (P-Two),
or equivalent
DC/DC CONVERTER
& REFERENCE
VOLTAGE
DATA DRIVER
L/R_O
GND
OUTPUT CONNECTOR
CN6: LM123S010HTF13Y
(UNE) or equivalent
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD Module Input
CNF1 Connector Pin Assignment: (187059-51221 (P-Two) or equivalent)
Pin Name Description Note
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 L/R_O Output signal for Left Right Glasses control
6 N.C. No Connection (1)
7 SELLVDS LVDS Data Format Selection (2)(6)
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PRODUCT SPECIFICATION
(1)
(8)
8 N.C. No Connection
9 N.C. No Connection
10 N.C. No Connection
11 GND Ground
12 CH1[0]- First pixel Negative LVDS differential data input. Pair 0
13 CH1[0]+ First pixel Positive LVDS differential data input. Pair 0
14 CH1[1]- First pixel Negative LVDS differential data input. Pair 1
15 CH1[1]+ First pixel Positive LVDS differential data input. Pair 1
16 CH1[2]- First pixel Negative LVDS differential data input. Pair 2
17 CH1[2]+ First pixel Positive LVDS differential data input. Pair 2
18 GND Ground
19 CH1CLK- First pixel Negative LVDS differential clock input.
20 CH1CLK+ First pixel Positive LVDS differential clock input.
21 GND Ground
(1)
22 CH1[3]- First pixel Negative LVDS differential data input. Pair 3
23 CH1[3]+ First pixel Positive LVDS differential data input. Pair 3
24 N.C. No Connection
25 N.C. No Connection
26 2D/3D Input signal for 2D/3D Mode Selection (3)(6)
27 L/R Input signal for Left Right eye frame synchronous (4)(6)
28 CH2[0]- Second pixel Negative LVDS differential data input. Pair 0
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29 CH2[0]+ Second pixel Positive LVDS differential data input. Pair 0
30 CH2[1]- Second pixel Negative LVDS differential data input. Pair 1
31 CH2[1]+ Second pixel Positive LVDS differential data input. Pair 1
32 CH2[2]- Second pixel Negative LVDS differential data input. Pair 2
33 CH2[2]+ Second pixel Positive LVDS differential data input. Pair 2
34 GND Ground
35 CH2CLK- Second pixel Negative LVDS differential clock input.
36 CH2CLK+ Second pixel Positive LVDS differential clock input.
37 GND Ground
38 CH2[3]- Second pixel Negative LVDS differential data input. Pair 3
39 CH2[3]+ Second pixel Positive LVDS differential data input. Pair 3
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PRODUCT SPECIFICATION
40 N.C. No Connection
41 N.C. No Connection
42 LD_EN Local Dimming Enable (5)(6)
43 N.C. No Connection (1)
44 GND Ground
45 GND Ground
46 GND Ground
47 N.C. No Connection (1)
48 VCC +12V power supply
49 VCC +12V power supply
50 VCC +12V power supply
51 VCC +12V power supply
(1)
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PRODUCT SPECIFICATION
CNF2 Connector Pin Assignment (187060-41221 (P-Two) or equivalent)
Pin Name Description
1 N.C. No Connection
2 N.C. No Connection
3 N.C. No Connection
4 N.C. No Connection
5 N.C. No Connection
6 N.C. No Connection
7 N.C. No Connection
8 N.C. No Connection
9 GND Ground
10 CH3[0]- Third pixel Negative LVDS differential data input. Pair 0
11 CH3[0]+ Third pixel Positive LVDS differential data input. Pair 0
12 CH3[1]- Third pixel Negative LVDS differential data input. Pair 1
13 CH3[1]+ Third pixel Positive LVDS differential data input. Pair 1
ˡ˸ʳ
ʻ˄ʼʳ
ʳ
ʳ
ʳ
ʳ
ʳ
14 CH3[2]- Third pixel Negative LVDS differential data input. Pair 2
15 CH3[2]+ Third pixel Positive LVDS differential data input. Pair 2
16 GND Ground
17 CH3CLK- Third pixel Negative LVDS differential clock input.
18 CH3CLK+ Third pixel Positive LVDS differential clock input.
19 GND Ground
20 CH3[3]- Third pixel Negative LVDS differential data input. Pair 3
21 CH3[3]+ Third pixel Positive LVDS differential data input. Pair 3
22 N.C. No Connection
23 N.C. No Connection
24 GND Ground
25 GND Ground
26 CH4[0]- Fourth pixel Negative LVDS differential data input. Pair 0
27 CH4[0]+ Fourth pixel Positive LVDS differential data input. Pair 0
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
28 CH4[1]- Fourth pixel Negative LVDS differential data input. Pair 1
29 CH4[1]+ Fourth pixel Positive LVDS differential data input. Pair 1
30 CH4[2]- Fourth pixel Negative LVDS differential data input. Pair 2
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PRODUCT SPECIFICATION
31 CH4[2]+ Fourth pixel Positive LVDS differential data input. Pair 2
32 GND Ground
33 CH4CLK- Fourth pixel Negative LVDS differential clock input.
34 CH4CLK+ Fourth pixel Positive LVDS differential clock input.
35 GND Ground
36 CH4[3]- Fourth pixel Negative LVDS differential data input. Pair 3
37 CH4[3]+ Fourth pixel Positive LVDS differential data input. Pair 3
38 N.C. No Connection
39 N.C. No Connection
40 GND Ground
41 GND Ground
CN6 Connector Pin Assignment (LM123S010HTF13Y (UNE) or equivalent)
1 N.C. No Connection
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
ʳ
2 N.C. No Connection
3 N.C. No Connection
4 GND Ground
5 N.C. No Connection
6 L/R_O Output signal for Left Right Glasses control
7 N.C. No Connection
8 N.C. No Connection
9 N.C. No Connection
10 N.C. No Connection
Note (1) Reserved for internal use. Please leave it open.
Note (2) LVDS format selection.
L= Connect to GND
SELLVDS Note
L JEDIA Format
H or Open VESA Format
ʿʳH=Connect to +3.3 ˩
ʻ˄ʼ
ʻ˄ʼ
ʻˋʼ
ʻ˄ʼ
Note (3) 2D/3D mode selection.
L= Connect to GN
2D/3D Note
L or Open 2D Mode
H 3D Mode
˗ʳʳˢ˸ʿʳH=Connect to +3.3˩
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Note (4) Left Right synchronous signal for glasses.
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PRODUCT SPECIFICATION
V
Note (5) Local dimming enable selection.
Note (6) SELLVDS, 2D/3D, LR and LD_EN signal pin connected to the LCM side has the following diagram.
=0~0.8, VIH=2.0~3.3
IL
LR Note
L Right synchronous signal
H Left synchronous signal
L= Connect to GN
LD_EN Note
L or Open Local Dimming Disable
H Local Dimming Enable
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
˗ʳʳˢ˸ʿʳH=Connect to +3.3˩
Note (7) LVDS 4-port Data Mapping
Port Channel of LVDS Data Stream
1st Port First Pixel 1, 5, 9, ……1913, 1917
2nd Port Second Pixel 2, 6, 10, ….1914, 1918
3rd Port Third Pixel 3, 7, 11, ….1915, 1919
4th Port Fourth Pixel 4, 8, 12, ….1916, 1920
Note (8) The definition of L/R_O signal as follows
L= 0V
ʳʿʳH= +3.3˩ʳ
L/R_O Note
L Right glass turn on
H Left glass turn on
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Note (2) Reserved for internal use. Please leave it open.
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PRODUCT SPECIFICATION
Note (3)
Note (4) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the
Low = Open or connect to GND, High = Connect to +3.3V
Note (5) LVDS signal pin connected to the LCM side has the following diagram.
Low = Open or connect to GND: VESA Format, High = Connect to +3.3V: JEIDA Format.
frame rate to optimize image quality.
ODSEL Note
L or open Lookup table was optimized for 60 Hz frame rate.
H Lookup table was optimized for 50 Hz frame rate.
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
TCON
R2 R1
Selector (pin7)
Settin
System side: R1 < 1K
Note (6) ODSEL signal pin connected to the LCM side has the following diagram.
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
Selector (pin9)
Selector (pin9)
System side
System side
R2 R1
R2 R1
S e tti ng
Setting
R3
R3
LCM side System side
TC O N
TCON
LCM side
LCM side
Note (7) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the
second pixel is even pixel.
Note (8) The screw hole which is distant from the connector is merged with Ground
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5.4 BLOCK DIAGRAM OF INTERFACE
ARx0-
ARx0+
ARx1-
ARx1+
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PRODUCT SPECIFICATION
100
Ө
100
Ө
AR0-AR7
-
ARx2-
ARx2+
ARx3-
ARx3+
ACLK-
ACLK+
BRx0-
BRx0+
BRx1-
BRx1+
BRx2-
BRx3-
BRx3+
AB0-AB7
100
Ө
100
Ө
DE
BR0-BR7
BG0-BG7
100
100
Ө
Ө
BB0-BB7
DCLK
100
Ө
100
Ө
100
Ө
BCLK-
BCLK+
100
Ө
PLL
Timing
Controller
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AR0~AR7 First pixel R data BR0~BR7 Second pixel R data
AG0~AG7 First pixel G data BG0~BG7 Second pixel G data
AB0~AB7 First pixel B data BB0~BB7 Second pixel B data
DE Data enable signal
DCLK Data clock signal
The third and fourth pixel are followed the same rules.
CR0~CR7 Third pixel R data DR0~DR7 Fourth pixel R data
CG0~CG7 Third pixel G data DG0~DG7 Fourth pixel G data
CB0~CB7 Third pixel B data DB0~DB7 Fourth pixel B data
DE Data enable signal
DCLK Data clock signal
Note (1) A ~ D channel are first, second, third and fourth pixel respectively.
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PRODUCT SPECIFICATION
Note (2) The system must have the transmitter to drive the module.
Note (3) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
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5.5 LVDS INTERFACE
JEIDA Format : SELLVDS = L
VESA Format : SELLVDS = H or Open
JEDIA Format
RXCLK
RXCLK
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PRODUCT SPECIFICATION
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
VESA Format
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
Current F\FOH
Current F\FOH
G5 G4 G6
G5 G4 G6
G5 G4 G6
G5 G4 G6
R2
R2
G3
G3
B4 B6 B5 B7VS HS DE
B4 B6 B5 B7VS HS DE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R2
R2
G3
G3
B4 B6 B5 B7VS HS DE
B4 B6 B5 B7VS HS DE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
RXCLK
RXCLK
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
G3 G2 G4
G3 G2 G4
G3 G2 G4
G3 G2 G4
R0
R0
G1
G1
B2 B4 B3 B5VS HS DE
B2 B4 B3 B5VS HS DE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R0
R0
G1
G1
B2 B4 B3 B5VS HS DE
B2 B4 B3 B5VS HS DE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
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B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
DCLK : Data clock signal
Notes (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.
The higher the binary input, the brighter the color. The table below provides the assignment of the color versus
data input.
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red (0) / Dark
Red (1)
Red (2)
:
:
Red (253)
Red (254)
Red (255)
Green (0) / Dark
Green (1)
Green (2)
:
:
Green (253)
Green (254)
Green (255)
Blue (0) / Dark
Blue (1)
Blue (2)
:
:
Blue (253)
Blue (254)
Blue (255)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
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PRODUCT SPECIFICATION
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
:
:
0
1
0
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
0
1
1
1
1
1
1
1
0
1
1
1
1
1
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
(Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency
Input cycle to
LVDS
Receiver
Clock
cycle jitter
Spread spectrum
modulation range
Spread spectrum
modulation frequency
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PRODUCT SPECIFICATION
F
clkin
(=1/TC)
- - 200 ps (3)
T
rcl
clkin_mo
F
d
- - 200 KHz
F
SSM
60 74.25 96.012 MHz
-2% - F
F
clkin
+2% MHz
clkin
(4)
LVDS
Setup Time Tlvsu 600 - - ps
Receiver
Data
Hold Time Tlvhd 600 - - ps
6.1.1 Timing spec for Frame Rate (F
Signal Item Symbol Min. Typ. Max. Unit Note
2D mode Fr5 94 100 106 Hz
Frame rate
3D mode F
2D Mode
Vertical
Active
Display
Term
3D Mdoe
(5)
= 100Hz)
r5
100 100 100 Hz
r5
Total Tv 1090 1125 1480 Th
Display Tvd 1080 1080 1080 Th
Blank Tvb 10 45 400 Th
Tv=Tvd+Tv
Ё
Ё
Total Tv 1524 Th
Display Tvd 1080 Th
(6)
Blank Tvb 444 Th
b
Total Th 520 550 670 Tc
Display Thd 480 480 480 Tc
Horizontal
Active
Display
Term
3D Mdoe
Blank Thb 40 70 190 Tc
Total Th 525 Tc
Display Thd 480 Tc
Blank Thb 45 Tc
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Th=Thd+T
hb
Ё 2D Mode
Ё
(6)
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6.1.2 Timing spec for Frame Rate (Fr6 = 120Hz)
Signal Item Symbol Min. Typ. Max. Unit Note
2D mode Fr6 114 120 126 Hz
Frame rate
3D mode F
Total Tv 1090 1125 1480 Th
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PRODUCT SPECIFICATION
120 120 120 Hz
r6
Tv=Tvd+Tv
b
2D Mode
Vertical
Active
Display
Term
3D Mdoe
2D Mode
Horizontal
Active
Display
Term
3D Mdoe
Display Tvd 1080 1080 1080 Th
Blank Tvb 10 45 400 Th
Total Tv 1524
Display Tvd 1080
Blank Tvb 444
Total Th 520 550 670 Tc
Display Thd 480 480 480 Tc
Blank Thb 40 70 190 Tc
Total Th 525
Display Thd 480
Blank Thb 45
Ё
Ё
(6)
Th=Thd+T
hb
Ё
Ё
(6)
Note (1) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low
logic level. Otherwise, this module would operate abnormally.
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Note (2) Please make sure the range of pixel clock has follow the below equation:
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PRODUCT SPECIFICATION
clkin(max)
F
F
r
5
Ѽ Tv Ѽ Th Њ F
ʳ
Њ F
r
6
Ѽ Tv Ѽ Th
clkin(min)
INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
T
h
Tvd
Tv
Tvb
DE
DATA
Valid display data ( 480 clocks)
Thd
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T
– TI
1
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PRODUCT SPECIFICATION
Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T
14
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
Note (6) Please fix the Vertical timing (Vertical Total =1524 / Display =1080 / Blank = 444) in 3D mode.
Please fix the Horizontal timing (Horizontal Total =525 / Display =480 / Blank = 45) in 3D mode.
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6.2 POWER ON/OFF SEQUENCE
(Ta = 25 ± 2 ºC)
6.2.1 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
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PRODUCT SPECIFICATION
10ms
50ms
ЉЉЉЉ
T4
0V
0.5
ЉЉЉЉ
T
1
ЉЉЉЉ
ЉЉЉЉ
T
0
ЉЉЉЉ
2
T
3
ЉЉЉЉ
0
500ms
ЉЉЉЉ
50ms
0.1V
CC
3
T1
T
2
T
0.1V
T4
cc
LVDS Signals
0V
Power On
0
ЉЉЉЉ
T
7
ЉЉЉЉ
ЉЉЉЉ
T2
T
8
ЉЉЉЉ
T3
T7
8
T
0
Option Signals
(SELLVDS,2D/3D
LR, , LD_EN)
Backlight (Recommended)
ЉЉЉЉ
ЉЉЉЉ
T5
T
6
500ms
100ms
50%
5
T
50%
T
6
Power ON/OFF Sequence
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6.2.2 2D to 3D SIGNAL SEQUENCE WITHOUT VCC TURN OFF AND TURN ON
LVDS Signals
VCC
0.5
ЉЉЉЉ
T
1
0
ЉЉЉЉ
T
2
0
ЉЉЉЉT7 ЉЉЉЉ
10 ms
2D/3D
ЉЉЉЉ
ЉЉЉЉ
10ms
50ms
T2
ЉЉЉЉ
0V
0V
T 10
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PRODUCT SPECIFICATION
CC
0.9V
CC
0.1V
1
T
T2
Power On
T7
Scalar send
Black Pattern
T10
0
10
ЉЉЉЉT9 ЉЉЉЉ
ЉЉЉЉ
T12
10 ms
ЉЉЉЉ
20 ms
9
T
T12
Scalar Black Pattern
Insertion
Backlight ON/OFF
ЉЉЉЉ
T
ЉЉЉЉ
5
T11
500ms
500ms
T
5
T11
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If
T2<0,that maybe cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
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PRODUCT SPECIFICATION
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 12 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Current IL
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during
measuring in a windless room.
25± 2
50± 10
130± 7.8
oC
%RH
mA
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7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in 7.1.
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR (1000) - - (2)
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PRODUCT SPECIFICATION
Response Time (TN)
Center Luminance of White
White Variation
Cross Talk
Red
Green
Color
Chromaticity
Blue
TR -
T
- (3.2)
F
2D LC (350) (400) -
3D L
- (45) -
C
δ W
2D - - 4 (5)
3D_W (4) (8)
θ x=0° , θ y =0°
3D_D (11)
Rx (0.647) -
Ry (0.328) -
Gx (0.279) -
Gy (0.633) -
Bx (0.154) -
By (0.058) -
Viewing angle
at normal direction
- - 1.3 - (6)
Typ.
-0.03
(1.1) -
-
Typ.
+0.03
ms
ms
cd/m
2
%
(3)
(4)
(8)
-
Wx (0.280) -
White
Color Gamut C.G
Horizontal
Viewing
Angle
Vertical
Transmission direction of
up polarizer
Wy
θx+
θx-
θY+
θY-
ӿ
up
CR≥ 10 (TN)
90 Deg (7)
(0.290)
- (72) - % NTSC
(80) -
(80) -
Deg. (1)
(80) -
(70) -
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Note (1) Definition of Viewing Angle (θx, θy) :
Viewing angles are measured by Conoscope Cono-80 ( or Eldim EZ-Contrast 160R )
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PRODUCT SPECIFICATION
Normal
θx = θy = 0º
θx- = 90º
x-
6 o’clock
y-
θ y- = 90º
Note (2) Definition of Contrast Ratio (CR) :
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) =
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
θy-
θx −
θy +
θx +
12 o’clock direction
θ y + = 90º
x
+
θ x+ = 90º
L255 of Luminance Surface
L0 of Luminance Surface
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(6).
Note (3) Definition of Response Time (T
Gray Level 255
100%
90%
Optical
Response
10%
0%
, TF):
R
Gray Level 255
Gray Level 0
T
R
T
F
ime
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PRODUCT SPECIFICATION
Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point and 5 points
L
= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (6).
C
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA × 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
(0, 0)
Active Area
Y
(D/2,W/8)
A, U
Y
(D/8,W/2)
A, L
Gray 128
Y
(D/2,7W/8)
Y
A, D
):
C
(7D/8,W/2)
A, R
(D, W)
0, 0
Y
B, L
(D/4,W/4)
(D/8,W/2)
Active Area
Y
Gray 0
Y
(D/2,W/8)
B, U
Y
(3D/4,3W/4)
(D/2,7W/8)
B, D
(7D/8,W/2)
B, R
D, W
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δ W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
W
W/
W/2
Vertical Line
Horizontal Line
D
D/4 D/2 3D/4
12
5
34
Active Area
: Test Point
X=1 to 5
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Note (7) This is a reference for designing the shutter glasses of 3D application.
Definition of the transmission direction of the up polarizer:
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PRODUCT SPECIFICATION
The transmission axis of the front polarizer of the shutter glasses should be parallel to this panel
transmission direction to get a maximum 3D mode luminance.
Note (8) Definition of the 3D mode performance (measured under 3D mode):
a. Test pattern
Left eye image and right eye image are displayed alternated
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PRODUCT SPECIFICATION
WW
Left eye image: W255; Right eye image: W255
WB
Left eye image: W255; Right eye image: W0
BW
Left eye image: W0; Right eye image: W255
BB
Left eye image: W0; Right eye image: W0
b. Measurement Setup
Shutter glasses are well controlled under suitable timing, and measure the luminance of the center
point of the panel through the right eye glass. "The transmittance of the glass should be larger than 40.0%
under 3D mode operation."
The luminance of the test pattern “WW”, denoted L(WW); the luminance of the test pattern ”WB”,
denoted L(WB); the luminance of the test pattern “BW”, denoted L(BW); the luminance of the test pattern “BB”,
denoted “L(BB)
c. Definition of the Center Luminance of White, Lc (3D) : L(WW)
d. Definition of the 3D mode white crosstalk, CT (3D-W)
e. Definition of the 3D mode dark crosstalk, CT (3D-D)
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8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
[ 1 ] Do not apply rough force such as bending or twisting to the module during assembly.
[ 2 ] It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
[ 3 ] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
[ 4 ] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMIS LSI chips.
[ 5 ] Bezel of Set can not press or touch the panel surface. It will make light leakage or scrape.
[ 6 ] Do not plug in or pull out the I/F connector while the module is in operation.
[ 7 ] Do not disassemble the module.
[ 8 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily
scratched.
[ 9 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.
[ 10 ] When storing modules as spares for a long time, the following precaution is necessary.
[ 10.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly
recommended to store the module with temperature from 0 to 35
condensation.
[ 10.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or
fluorescent light.
[ 11 ] When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
[ 1 ] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
[ 2 ] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of
contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
[ 3 ] After the module’s end of life, it is not harmful in case of normal operation and storage.
кat normal humidity without
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9. DEFINITION OF LABELS
9.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
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PRODUCT SPECIFICATION
Model Name: V320HH6-PSA
Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
Serial ID: X X X X X X X Y M D L N N N N
CHI MEI
OPTOELECTRONICS
CHI MEI
OPTOELECTRONICS
V320HH6 –PSA Rev. XX
X X X X X X X Y M D L N N N N
V320HH6 –PSA Rev. XX
X X X X X X X Y M D L N N N N
Serial No.
Product Line
E 2 07 943
MAD E IN TAIWAN
GEMN
RoHS
MADE IN CHINA
LEOO(or CAPG or CANO)
RoHS
Serial ID includes the information as below:
Manufactured Date:
Year: 2010=0, 2011=1,2012=2…etc.
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.
Revision Code: Cover all the change
Serial No.: Manufacturing sequence of product
Product Line: 1 -> Line1, 2 -> Line 2, …etc.
Year, Month, Date
CMO Internal Use
CMO Internal Use
Revision
CMO Internal Use
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10. PACKAGING
10.1 PACKAGING SPECIFICATIONS
(1) 18 LCD TV Panels / 1 Box
(2) Box dimensions : 970 (L) X 640 (W) X 319 (H)
(3) Weight : approximately 36Kg ( 18 panels per box)
10.2 PACKAGING METHOD
Figures 10-1 and 10-2 are the packing method
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PRODUCT SPECIFICATION
Figure.10-1 packing method
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Figure.10-2 packing method
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11. MECHANICAL CHARACTERISTIC
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