CMO V315B1-L04 Specification

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MODEL NO.: V315B1 - L04
Customer:
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
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pproved by:
Note:
AVP
QRA Dept.
Approval Approval Approval Approval
LCD TV Head Division
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TVHD / PDD
DDIII DDII DDI
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LCD TV Marketing and Product Management Division
Product Manager
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Model No.: V315B1 - L04
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- CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
------------------------------------------------------- 4
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
2.3 ENVIROMENT TEST CONDITION
3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 8
3.1 TFT LCD MODULE
3.2 BACKLIGHT INVERTER UNIT
3.2.1 CCFL(Cold Cathode Fluorescent Lamp) CHARACTERISTICS
3.2.2 INVERTER CHARACTERISTICS
3.2.3 INVERTER INTERFACE CHARACTERISTICS
4. BLOCK DIAGRAM ------------------------------------------------------- 13
4.1 TFT LCD MODULE
5. INTERFACE PIN CONNECTION ------------------------------------------------------- 14
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 INVERTER UNIT
5.4 BLOCK DIAGRAM OF INTERFACE
5.5 LVDS INTERFACE
5.6 COLOR DATA INPUT ASSIGNMENT
6. INTERFACE TIMING ------------------------------------------------------- 21
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 24
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. DEFINITION OF LABELS ------------------------------------------------------- 27
8.1 CMO MODULE LABEL
9. PACKAGING ------------------------------------------------------- 28
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
10. PRECAUTIONS ------------------------------------------------------- 30
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
10.2 SAFETY PRECAUTIONS
11. REGULATORY STANDARDS ------------------------------------------------------- 30
11.1 SAFETY
11.2 EMC
12. MECHANICAL CHARACTERISTICS ------------------------------------------------------- 31
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
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REVISION HISTORY
Version Date
Ver 2.0 Oct. 16’06 All All Approval Specification was first issued.
Page
(New)
Section Description
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V315B1- L04 is a 31.5” TFT Liquid Crystal Display module with 16-CCFL Backlight unit and 1ch-LVDS
interface. This module supports 1366 x 768 WXGA format and can display true 16.7M colors ( 8-bit colors).
The inverter module for backlight is built-in.
1.2 FEATURES
-High brightness (500 nits)
- Ultra-high contrast ratio (1500:1)
- Faster response time (gray to gray average 6.5ms)
- High color saturation (CIE 1976 NTSC 85%)
- Ultra wide viewing angle : 176(H)/176(V) (CR>20) with Super MVA technology
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- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- 180 degree rotation display (option)
- Color reproduction (nature color)
- Low color shift function
- RoHS compliance
1.3 APPLICATION
- TFT LCD TVs
- Multi-Media Display
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 697.6845 (H) x 392.256 (V) (31.51" diagonal) mm Bezel Opening Area 703.8 (H) x 398.4 (V) mm Driver Element a-si TFT active matrix - Pixel Number 1366 x R.G.B. x 768 pixel Pixel Pitch (Sub Pixel) 1.53225 (H) x 0.51075 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 16.7M color Display Operation Mode Transmissive mode / Normally black - Surface Treatment Anti-Glare coating (Haze 25%),Hard coating (3H) -
(1)
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 759.3 760 760.7 mm (1) Vertical(V) 449.4 450 450.6 mm (1)
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Depth(D) 34.1 34.6 35.1 mm To rear surface Depth(D) 43.65 44.65 45.65 mm To pcb cover Depth(D) 49.4 50.4 51.4 mm To inverter cover
Weight 6550 6650 6750 g
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
(d) 40ºC / 95%RH Humidity is for reference.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
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Value
Min. Max.
- 50 G (3), (5)
NOP
- 1.0 G (4), (5)
NOP
Unit Note
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 500 Hz, 60 min, 1 time each X, Y, Z..
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
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8060-20 400 20-40
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)
(1),
(3)
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 6.0 V Input Signal Voltage VIN -0.3 3.6 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Vol tage V Power Supply Voltage V Control Signal Level
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional
operation should be restricted to the conditions described under normal operating conditions.
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Value
Min. Max.
Value
Min. Max.
Ё
030V(1
Ё
-0.3 7 V
3000 V
Unit Note
Unit Note
Approval
(1)
Note (2) No moisture condensation or freezing.
Note (3) The control signals includes Backlight On/Off Control, I_PWM Control, E_PWM Control and ERR
signal for inverter status output.
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2.3 ENVIROMENT TEST CONDITION
No. Test Item Condition
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1 High temperature storage test
2 Low temperature storage test
High temperature high humidity
3
storage test
4 High temperature operation test
5 Low temperature operation test
High temperature high humidity
6
Operation
7 Thermal shock
8 Vibration test (non-operation)
9 Shock test (non-operation)
Ta=6 0к 500hrs
Ta= - 2 5к 500hrs
Ta= 50oC 90%RH 500hrs
(40oC 95%RH 500hrs judge for reference)
Ta= 5 0 к 500hrs
Ta=0 к 500hrs
Ta= 40oC 95%RH 500hrs
Ta= - 2 5к/ 60min~60к/ 60min 100cycles
Wave form: Sine wave
Vibration level: 1.0G
Fre. range : 10~500Hz
Duration: X, Y, Z, 60min,
One time each direction
Wave form: half sine wave, 11ms
Shock level: 50G
X, Y, Z,
10 ESD
11 Package Vibration
12 Package Drop
One time each direction
Storage: Contact mode +/-20kV,
Air mode +/-20kV
Operation: Contact mode +/-20kV,
Air mode +/-20kV
Condition: 150pF, 330ohm
Wave form: Sine wave
Vibration level: 1.0G
Fre. range : 5~50Hz
Duration: 15min for X, Y, 60 min for Z.
One time each direction
Drop 1 corner, 3 sides, 6 faces, each one for 1 time.
Height is 30cm. (Test environment: 25к)
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Model No.: V315B1 - L04
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Power Supply Voltage VCC 4.5 5.0 5.5 V (1) Power Supply Ripple Voltage VRP - - 100 mV Rush Current I
- - 4 A (2)
RUSH
White 1.55 1.60 2.2 A
Power Supply Current
Differential Input High
LVDS Interface
Threshold Voltage Differential Input Low Threshold Voltage Common Input Voltage V Terminating Resistor R
Black 0.80 0.90 - A Vertical Stripe
I
CC
1.35 1.40 - A
- - +100 mV
V
LVT H
-100 - - mV
V
LVT L
1.125 1.25 1.375 V
LVC
- 100 - ohm
T
Input High Threshold Voltage VIH 2.7 - 3.3 V CMOS
interface
Input Low Threshold Voltage V
0 - 0.7 V
IL
Note (1) The module should be always operated within above ranges.
Value
Unit Note
Approval
(3)
Note (2) Measurement Conditions:
+5.0V
R1
1K
(Low to High)
(Control Signal)
follow CMOS interface
SW
R2
1K
Vcc rising time is 470us
Q1 Si4435DY
47K
Q2
2N7002
VR1
C1
0.01uF
FUSE
C3
1uF
Vcc
(LCD Module Input)
+5V
0.9Vcc
0.1Vcc
GND
470us
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(2)
(2)
Note (3) The specified power supply current is under the conditions at Vcc = 5 V, Ta = 25 ± 2 ºC, fv = 60 Hz,
whereas a power dissipation check pattern below is displayed.
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a. White Pattern
Active Area
c. Vertical Stripe Pattern
b. Black Pattern
Active Area
R
G
R
B
G
B
B
R
R
G
G
B
B
R
R
B
R R
Active Area
3.2 BACKLIGHT INVERTER UNIT
3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (
Parameter Symbol
Lamp Voltage V Lamp Current I
Lamp Starting Voltage V
Operating Frequency FO 40 - 70 Lamp Life Time LBL 50,000 60,000 -
W
L
S
Min. Typ. Max.
- 1250 -
4.5 5.0 5.5
- -
- -
Value
2450 2360
R
G
G
B
G
B
Ta = 2 5 ± 2 ºC)
V
mA
V V
B
R
G
B
Unit Note
I
RMS
(1)
RMS
RMS
RMS
KHz (3)
Hrs (4)
= 5.0mA
L
, Ta = 0 ºC
, Ta = 25 ºC
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g
3.2.2 INVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC)
Parameter Symbol
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Value
Min. Typ. Max.
Unit Note
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Model No.: V315B1 - L04
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Power Consumption PBL - 104 115 W
Input Voltage VBL 22.8 24 26.4 V Input Current IBL -4.3-A Non Dimmin
Input Ripple Noise - - - 800 mV
Backlight Turn on Voltage V
Oscillating Frequency FW 39 41 43 kHz
Dimming frequency FB 161 164 167 Hz
Minimum Duty Ratio D
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
BS
- 20 - %
MIN
A
A
A
2450 2360
HV HV
HV HV
HV HV
--
--
1 2
1 2
1 2
V
RMS
V
RMS
(5)(6), I
ADIM=1.6V or Open
DC
P-P
Ta = 0 º C Ta = 25 ºC
= 5.0mA
L
VBL=22.8V
A
LCD Module
A
A
A
A
Note (2) The lamp starting voltage VS should be applied to the lamp for more than 1 second under starting
up duration. Otherwise the lamp could not be lighted on completed.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
HV HV
HV HV
HV HV
HV HV
HV HV
1 2
1 2
1 2
1 2
1 2
Inverter
display input signals, and it may result in line flow on the display. In order to avoid interference, the
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lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value
and the effective discharge length is longer than 80% of its original length (Effective discharge
length is defined as an area that has equal to or more than 70% brightness compared to the
brightness at the center point of lamp.) as the time in which it continues to operate under the
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condition at Ta = 25 2к and I
= 4.5 ~ 5.5 mA
L
RMS
.
Note (5) The power supply capacity should be higher than the total inverter power consumption P
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
Note (6)
The measurement condition of Typ. value is based on 31.5" backlight unit under input voltage 24V,
average lamp current 5.0 mA and lighting 30 minutes later.
3.2.3 INVERTER INTERFACE CHARACTERISTICS
No ITEM SYMBOL
1
On/Off Control Voltage
2
2
PWM Selection
Internal PWM Control Voltage
ON
ON/OFF
OFF
HI
LO
MAX 3.3
MIN
SEL
PDIM
TEST
CONDITION
Ё
Ё
Ё
Ё
SEL=H
MIN TYPE MAX UNIT NOTE
Ё
Ё
Ё
0
Ё
Ё
0
Ё
5.0 V
1.0 V
5 V
1.0 V
5 V Maximum Duty Ratio
0
Ё
V Minimum Duty Ratio
2.0
2.0
. Since
BL
(1-2)
4 External PWM Control Voltage
5 ADIM Control Voltage ADIM
6 Control Signal Rising Time Tr ЁЁЁ 100 ms
7 Control Signal Falling Time Tf ЁЁЁ 100 ms
8 ON/OFF Delay Time T
9 ON/OFF Off Time T
10 PWM Signal Rising Time T
11 PWM Signal Falling Time T
HI 2.0
LO
PDIM SEL=L
Ё
ЁЁ
ЁЁ0Ё
on
off
PWMR
PWMF
Ё 500 ЁЁ ms
Ё 500 ЁЁ ms
ЁЁЁ 50 us
ЁЁЁ 50 us
3.3
Ё
Ё
0
Ё
1.65
5.0 V ON Duration
1.0 V OFF Duration
5.0 V Lum=120%
Ё
V Lum=100%
Lum=80%
Note (1) The power sequence and control signal timing are shown as the following figure 1.
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V
IN
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ON/OFF
SEL
PDIM
V
Toff
3.0V
100%
2.0V
1.0V
2.0V
1.0V
PWM
Ton
Backlight on duration
Tr
Ext. Dimming Function
T
PWMR
PWMF
T
Tf
2.0V
1.0V
Int. Dimming Function
External
PWM Duty
Minimun
Duty
0
0
0
0
W
External
Period
Figure 1
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q
(
)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
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RX0(+/-)
RX1(+/-)
RX2(+/-)
RX3(+/-)
RXCLK
Vcc
GND
ADIM
BLON
PDIM
+/-
VIN
GND
SEL
CN1
INPUT CONNECTOR
(JAE,FI-X30SSL-HF)
or e
ual
DC/DC CONVERTER &
REFERENCE VOLTAGE
INVERTER CONNECTOR
CN3:S14B-PH-SM3/SM4-TB
FRAME BUFFER
SCAN DRIVER IC
TFT LCD PANEL
(1366x3x768)
TIMING
CONTROLLER
DATA DRIVER IC
CN4-CN12:
SM02B-BHCW-2-TB
BACKLIGHT
UNIT
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y
(2)
(3)
(4)
(4)
(5)
(4)
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment
Pin No. S
1 ODSEL Overdrive Lookup Table Selection 2 RPF Display Rotation 3 NC No connection 4 GND Ground 5 RX0- Negative transmission data of pixel 0 6 RX0+ Positive transmission data of pixel 0 7 GND Ground 8 RX1- Negative transmission data of pixel 1
9 RX1+ Positive transmission data of pixel 1 10 GND Ground 11 RX2- Negative transmission data of pixel 2 12 RX2+ Positive transmission data of pixel 2 13 GND Ground 14 RXCLK- Negative of clock 15 RXCLK+ Positive of clock 16 GND Ground 17 RX3- Negative transmission data of pixel 3 18 RX3+ Positive transmission data of pixel 3 19 GND Ground 20 NC No connection 21 SELLVDS Select LVDS data format 22 NC No connection 23 GND Ground 24 GND Ground 25 GND Ground 26 VCC Power supply: +5V 27 VCC Power supply: +5V 28 VCC Power supply: +5V 29 VCC Power supply: +5V 30 VCC Power supply: +5V
Note (1) Connector Part No.: FI-X30SSL-HF(JAE).
mbol Description Note
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Note (2) Overdrive lookup table selection. The Overdrive lookup table should be selected in accordance to the
frame rate to optimize image quality.
ODSEL Note
H or Open Lookup table was optimized for 60 Hz frame rate.
L Lookup table was optimized for 50 Hz frame rate.
Note (3) Low or open: normal display (default), High : display with 180 degree rotation
Note (4) Reserved for internal use. Left it open or connect to ground.
Note (5) Ground: Normal LVDS format, High or OPEN: JEIDA
Please refer to 5.5 LVDS INTERFACE (Page 19)
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5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN4-CN11 (Housing): SM02B-BHCW-2-TB (LF) or equivalent
Pin No. Symbol Description
1 HV High Voltage White 2 HV High Voltage Pink
Note (1) The backlight interface housing for high voltage side is a model BHCR-02VS-3, manufactured by JST
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Wire Color
or equivalent
1. HV (White,+)
2. HV (Pink,+)
1. HV (White,+)
2. HV (Pink,+)
1. HV (White,+)
2. HV (Pink,+)
1. HV (White,+)
2. HV (Pink,+)
. The mating header on inverter part number is SM02B-BHCW-2-TB (LF).
8 Female Connector BHCR-02VS-3 or Equivalent
1. HV (White,+)
2. HV (Pink,+)
1. HV (White,+)
2. HV (Pink,+)
1. HV (White,+)
2. HV (Pink,+)
1. HV (White,+)
2. HV (Pink,+)
Front View
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5.3 INVERTER UNIT
CN1(Header): S14B-PH-SM3-TB(D)(LF)(JST) or equivalent..
Pin No. Symbol Description
1 2 3 4 5 6 7 8 9
10 11 ADIM (1) Analog Current Dimming Signal 12 ON/OFF Backlight on/off control 13 PDIM (2) PWM Dimming Signal
14 SEL(3)(4)
VIN +24V Power input
GND Ground
Open/High : internal dimming Low : external dimming
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CN4-CN12 (Header): SM02B-BHCW-2-TB
Pin No. Symbol Description
1 2
Note (1) ADIM (amplitude dimming) is control signal for Inverter’s output power to backlight lamp bulb.
Note (2) PDIM is PWM duty control input for +3.3V TTL level signal or DC voltage by Pin 14 input.
This input signal is (a) continuous pulse signal with +3.3V, TTL level signal spec, or (b) DC
power with 0~3.3V. IF this is Open or +3.3V, 100% duty (i.e. +3.3V, DC level), backlight
should perform 100% luminance. Duty ratio of this input signal should be proportional
relationship in certain range of control without any kind of inherent side effect like waterfall
effect on screen. Guaranteed duty range and dimming ratio should be specified with
supplementary measurement result.
Note (3) Pin 14 is the selection pin for PWM control method; if this pin is connected to GND, PDIM
CCFL HOT CCFL HOT
Input signal should be able to control amplitude of Inverter output current. From 0V to 3.3V,
Inverter output voltage should be able to vary to control brightness of lamp from 80% to
110% luminance variation. Approximate 1.6V might be 100% luminance control point.
CCFL high voltage CCFL high voltage
Input of Pin 13 should have logic level duty signal for PWM control. If this is set to High or
Open, Pin 13 should have DC level signal therefore the Inverter should have Saw Tooth
Wave Generator to generate internal PWM signal. Default setting is “Not Connected”, Pin 13
of PWM control should have DC Level signal for PWM.
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Note (4) Pin 14 selection vs. Pin 11/13 control function table:
(DC Power Control Duty Amplitude)
Pin 14 = GND
Pin 14 = Open/High
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Pin 11
Function Always Turn On
Default: Open/1.6V : 100%
GND: 80% ; Open/1.6V: 100%
High (3.3V) 110%, Luminance
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Pin 13
Default: Open/High : 100%
External PWM
(AC Signal Control Duty)
Internal PWM
(DC Power Control Duty)
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G0-G
0
G0-G
p
5.4 BLOCK DIAGRAM OF INTERFACE
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CNF1
R0-R7
7
-B7
B
DE
Host
Graphics
Controller
TxIN
PLL
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
Rx0+
Rx
-
Rx1+
Rx1-
Rx2+
Rx2-
Rx3+
CLK+
51Ө
100pF
51Ө
51Ө
100
F
51Ө
51Ө
100pF
51Ө 51Ө
51Ө
51Ө
51Ө
100pF
100pF
PLL
-
-
RxOUT
R0-R7
7
B
-B7
DE
DCLK
Timing
Controller
LVDS Receiver
THC63LVDF84A
R0~R7 : Pixel R Data ,
G0~G7 : Pixel G Data ,
B0~B7 : Pixel B Data ,
DE : Data enable signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
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5.5 LVDS INTERFACE
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
SIGNAL
SELLVDS=LSELLVDS=
H or Open
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
24
bit
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
RSVD 1
RSVD 2
RSVD 3
DCLK 31 TxCLK IN TxCLK OUT+
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
RSVD 1
RSVD 2
RSVD 3
TRANSMITTER
THC63LVDM83A
PIN INPUT Host TFT-LCD PIN OUTPUT
51
52
54
55
56
3
4
6
7
11
12
14
15
19
20
22
23
24
30
50
2
8
10
16
18
25
27
28
TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8
TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27
TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25
INTERFACE
CONNECTOR
TA OUT0+
TA OUT0-
TA OUT1+
TA OUT1-
TA OUT2+
TA OUT2-
TA OUT3+
TA OUT3-
TxCLK OUT-
Rx 0+
Rx 0-
Rx 1+
Rx 1-
Rx 2+
Rx 2-
Rx 3+
Rx 3-
RxCLK IN+
RxCLK IN-
RECEIVER
THC63LVDF84A
Rx OUT0
27
Rx OUT1
29
Rx OUT2
30
Rx OUT3
32
Rx OUT4
33
Rx OUT6
35
Rx OUT7
37
Rx OUT8
38
Rx OUT9
39
Rx OUT12
43
Rx OUT13
45
Rx OUT14
46
Rx OUT15
47
Rx OUT18
51
Rx OUT19
53
Rx OUT20
54
Rx OUT21
55
Rx OUT22
1
Rx OUT26
6
Rx OUT27
7
Rx OUT5
34
Rx OUT10
41
Rx OUT11
42
Rx OUT16
49
Rx OUT17
50
Rx OUT23
2
Rx OUT24
3
Rx OUT25
5
26 RxCLK
OUT
TFT CONTROL INPUT
SELLVDS=LSELLVDS=
H or Open
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
NC
NC
NC
DCLK
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
NC
NC
NC
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
Notes(1) RSVD(reserved)pins on the transmitter shall be “H” or( “L” or OPEN)
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5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Ye ll ow
White
Red(0) / Dark
Red(1)
Red(2)
:
:
Red(253)
Red(254)
Red(255)
Green(0) / Dark
Green(1)
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
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Model No.: V315B1 - L04
Approval
Data Signal
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
0
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
1
0
0
1
:
:
1
0
0
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
1
0
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
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g
y
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
nal Item Symbol Min. Typ. Max. Unit Note
Si
Frequenc
LVDS Receiver Clock
Input cycle to
cycle jitter
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
1/Tc 60 86 88 MHZ
Trcl - - 200 ps
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to
low logic level. Otherwise, this module would operate abnormally.
(2) Please refer to 5.1 for detail information.
Setup Time Tlvsu 400 - - ps Hold Time Tlvhd 400 - - ps
Frame Rate
Total Tv 778 795 980 Th Tv=Tvd+Tvb Display Tvd 768 768 768 Th ­Blank Tvb 10 27 212 Th ­Total Th 1442 1798 1936 Tc Th=Thd+Thb Display Thd 1366 1366 1366 Tc ­Blank Thb 76 432 570 Tc -
Fr5 47 50 53 Hz Fr
6 57 60 63 Hz
(2)
INPUT SIGNAL TIMING DIAGRAM
Tv
Tvd
Tvb
DE
DCLK
DE
DATA
Th
Tc
Thd
Thb
Valid display data (1366 clocks)
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LVDS RECEIVER INTERFACE TIMING DIAGRAM
RXCLK+/-
RXn+/-
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
Tc
Tlvsu
Tlvhd
1T
14
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
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Љ
Љ
Љ
Љ
Љ
Љ
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the
diagram below.
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
Power Supply
V
0.5ЉT1Љ˅0ms
0
T
300ms
CC
0V
T
2
50ms
3
1S
T
4
Signals
0V
Backlight (Recommended) 500ms
100ms
T
5
T6
0.9 VCC
CC
0.1V
Power On
CC
0.9 V
0.1Vcc
T
3T1
2
T
T4
VALID
Power Off
50%
5
T
50%
6
T
Power ON/OFF Sequence
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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y
y
y
y
y
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 5.0 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current I Oscillating Frequency (Inverter) F Frame rate 60 Hz
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should
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L
W
25r2
50r10
5.0 r 0.5 41r2
Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
o
C
%RH
mA
KHz
be measured under the test conditions described in 7.1 and stable environment shown in Note (5).
Item S
Contrast Ratio CR 1200 1500
Response Time
Center Luminance of White L
White Variation
Red
Green
Color Chromaticity
Blue
White
Color Gamut CG
Viewing Angle
Horizontal
Ver t i c al
mbol Condition Min. Typ. Max. Unit Note
-
Gray to gray
average
C
T
=0q, TY =0q
x
GW
Rx 0.643 -
0.333 -
R Gx 0.272 -
0.595 -
G
Viewing
Normal
Angle
Bx 0.144 -
0.069 -
B
- 6.5 12 ms Note(3)
400 500
-
- - 1.3 -
Typ.-0.03
Typ.+0.03
-
cd/m
Wx 0.280 ­W
0.285
-
80 85 %
T
+
T
-
T
+
-
T
CRt20
80 88 ­80 88 ­80 88 ­80 88 -
Deg. Note(1)
Note(2) Note(5)
Note(4)
2
Note(5)
Note(5) Note(6)
Note(5)
CIE1976
NTSC
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T
Note (1) Definition of Viewing Angle (Tx, Ty):
Viewing angles are measured by EZ-Contrast 160R (Eldim)
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
Normal
Tx = Ty = 0º
Ty- Ty
TX- = 90º
6 o’clock
T
y- = 90º
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in
Note (6).
Tx
Tx
y+
12 o’clock direction
T
y+ = 90º
x+
TX+ = 90º
Note (3) Definition of Gray to Gray Switching Time :
100%
90%
Optical
Response
10%
0%
Gray to gray switching time
The driving signal means the signal of luminance 0%, 20%, 40%, 60%, 80%, 100%.
Gray to gray average time means the average switching time of luminance 0%, 20%, 40%, 60%, 80%,
100% to each other.
25
Gray to gray switching time
ime
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Note (4) Definition of Luminance of White (LC):
Measure the luminance of gray level 255 at center point
= L (5)
L
C
where L (x) is corresponding to the luminance of the point X at the figure in Note (6).
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be
executed after lighting Backlight for 1 hour in a windless room.
LCD Module
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Model No.: V315B1 - L04
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LCD Panel
Center of the Screen
Note (6) Definition of White Variation (GW):
Measure the luminance of gray level 255 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
Horizontal Line
D
D/4 D/2 3D/4
12
X
5
: Test Point
X=1 to 5
W
W/4
W/2
Vertical Line
3W/4
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8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
CHI MEI
OPTOELECTRONICS
(a) Model Name: V315B1-L04
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X
X X X X X Y M D L N N N N
V315B1 -L04 Rev. XX
X X X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
CMO Internal Use
Revision
E207943
MADE IN TAIWAN
RoHS
Serial ID includes the information as below:
(a) Manufactured Date: Year: 0~9, for 2000~2009
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
CMO Internal Use
st
to 31st, exclude I ,O, and U.
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 4 LCD TV modules / 1 Box
(2) Box dimensions : 906(L) X 384 (W) X 580 (H)
(3) Weight : approximately 31.5Kg ( 4 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
LCD TV Module
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Model No.: V315B1 - L04
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Anti-static Bag
Cushion(Bottom)
Carton
2 pcs Drier
Carton Label
Figure.9-1 packing method
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
Sea Transportation
Corner Protector:L1130*50mm*50mm Corner Protector:L1400*50mm*50mm Pallet:L950*W1180*H140mm
Pallet Stack:L950*W1180*H1880mm Gross:300kg
PE Sheet
PP Belt
Air Transportation
Corner Protector:L1130*50mm*50mm Pallet:L950*W1180*H140mm
Pallet Stack:L950*W1180*H1300mm
Gross:205kg
Carton Label
PE Sheet
Carton Label
PP Belt
Figure. 9-2 Packing method
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Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
11. REGULATORY STANDARDS
11.1 Safety
Regulatory Item Standard
UL UL 60065: 2003
Audio/Video Apparatus
cUL CAN/CSA C22.2 No.60065-03
CB
IEC 60065:2001
11.2 EMC
(1) FCC class B part15
(2) CISPR20
Note (1) CMO product can support to meet FCC class B part15 and CISPR20 standard
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12. MECHANICAL CHARACTERISTICS
www.panelook.com
Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
V315441011
2006/10/02
2.3
࡛ભሽ՗ٝڶૻֆ׹
OUTLINE_V315B1-L04
Catking_Yang
Catking_Yang
%*+/'+
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Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
V315441011
2006/10/02
2.3
࡛ભሽ՗ٝڶૻֆ׹
OUTLINE_V315B1-L04
Catking_Yang
Catking_Yang
%*+/'+
32
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Page 33
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Oct. 16 2006
Model No.: V315B1 - L04
Approval
V315441011
2006/10/02
2.3
࡛ભሽ՗ٝڶૻֆ׹
OUTLINE_V315B1-L04
Catking_Yang
Catking_Yang
%*+/'+
33
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 2.0
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