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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
REVISION HISTORY
Version Date
Page
(New)
Ver 0.0 Feb. 14,’06 All All Tentative Specification was first issued.
Section Description
3
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V270B1- L03 is a TFT Liquid Crystal Display module with 12-CCFL Backlight unit and 1ch-LVDS
interface. The display diagonal is 27”. This module supports 1366 x 768 WXGA format and can display true
16.7M colors(8-bits colors). The inverter module for backlight is built-in.
1.2 FEATURES
- Excellent brightness (500nits)
- Ultra high contrast ratio (1200:1)
- Fast response time (Gray to gray average 6.5ms)
- High color saturation NTSC 75%
- WXGA (1366 x 768 pixels) resolution
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for both 50/60 Hz frame rate
- Ultra wide viewing angle: 176(H)/176(V) (CR>20) Super MVA technology
-180 degree rotation display option
-Color reproduction (Nature color)
1.3 APPLICATION
- TFT LCD TVs
- High brightness, multi-media displays
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 596.259 (H) x 335.232 (V) (27” diagonal) mm
Bezel Opening Area 603.22 (H) x 341.98 (V) mm
Driver Element a-si TFT active matrix Pixel Number 1366 x R.G.B. x 768 pixel
Pixel Pitch (Sub Pixel) 0.1460 (H) x 0.4365 (V) mm
Pixel Arrangement RGB vertical stripe Display Colors 16.7M color
Display Operation Mode Transmissive mode / Normally black -
Surface Treatment
Anti-Glare coating (Haze 25%)
Hard coating (3H)
(1)
-
1.5 MECHANICAL SPECIFICATIONS
Item Min.Typ. Max. UnitNote
Horizontal(H) 637.05 637.55 638.05 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 379.3 379.8 380.3 mm
Depth(D) 34.435.436.4mm To PCB cover
Depth(D) 39.540.541.5mm To inverter cover
Weight -- 3600-- g
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature T
Operating Ambient Temperature T
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 60 ºC with LCD module alone in a temperature controlled chamber.
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Value
Min.Max.
ST
OP
NOP
NOP
-20 +60ºC(1)
0 +50 ºC (1), (2)
-50 G(3), (5)
-1.0 G(4), (5)
Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Unit Note
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 60 ºC. The range of operating temperature may degrade in case of improper
thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 500 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
-40 40-20 0206080
Storage Range
Temperature (ºC)
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 6.0V
Input Signal Voltage VIN-0.3 3.6V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage V
Power Supply Voltage V
Control Signal Level
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Value
Min.Max.
Tes t
Condition
Ta = 25 кЁЁ
W
BL
ЁЁ
Ё
Min.TypeMax.UnitNote
-0.3
Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Unit Note
(1)
3000V
0
Ё
Ё
30V(1)
7V(1), (3)
RMS
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional
operation should be restricted to the conditions described under normal operating conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals includes Backlight On/Off Control, Internal PWM Control, External PWM
Control and Internal/External PWM Selection.
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Power Supply Voltage V
Power Supply Ripple Voltage V
Rush Current I
CC
RP
RUSH
Min.Typ. Max.
4.55.05.5V(1)
- - 100mV
--3.0 A (2)
White -(1.6) -A
Power Supply Current
Differential Input High
LVDS
Interface
Threshold Voltage
Differential Input Low
Threshold Voltage
Common Input Voltage V
Terminating Resistor R
Input High Threshold Voltage V
interface
Input Low Threshold Voltage V
Black -(1.0) -A
Vertical Stripe
V
V
I
CC
LVT H
LVT L
LVC
IH
IL
- (1.5) -A
--+100 mV
-100 - - mV
1.125 1.25 1.375 V
T
2.7 - 3.3VCMOS
0- 0.7V
Note (1) The module should be always operated within above ranges.
Value
Unit Note
100ohm
Tentative
(3)
Note (2) Measurement Conditions:
+5.0V
R1
47K
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
VR1
R2
1K
47K
Vcc rising time is 470us
Q1 2SK1475
C2
0.01uF
Q2
2SK1470
+5V
FUSE
C3
1uF
Vcc
(LCD Module Input)
0.9Vcc
0.1Vcc
GND
470us
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Note (3) The specified power supply current is under the conditions at Vcc = 5 V, Ta = 25 ± 2 ºC, fv = 60 Hz,
whereas a power dissipation check pattern below is displayed.
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3.2.2 INVERTER CHARACTERISTICS (Ta = 25 ± 2 ºC)
Parameter Symbol
Power Consumption P
Power Supply Voltage V
Power Supply Current I
Input Ripple Noise - --500mV
Backlight Turn on
Voltage
Oscillating Frequency F
Dimming Frequency F
BL
BL
BL
V
BS
W
B
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Value
Min.Typ. Max.
- 80 -W (5), IL = 6.0mA
22.82425.2
-
3.3
-
(1790) - -
(1200) - - V
555861kHz
150160170Hz
Unit Note
V
DC
ANon Dimming
P-P
V
RMS
RMS
VBL =22.8V
Ta = 0 ºC
Ta = 25 ºC
Minimum Duty Ratio D
MIN
- 20 -%
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
HV (Pink)
HV (White)
HV (Pink)
HV (White)
HV (Pink)
HV (White)
HV (Pink)
HV (White)
HV (Pink)
HV (White)
HV (Pink)
HV (White)
1
2
1
2
1
2
1
2
1
2
1
2
A
A
A
A
A
A
A
A
A
LCD
Module
A
A
A
Inverter
LV (Black +)
LV (White,-)
Note (2) The lamp starting voltage V
should be applied to the lamp for more than 1 second under starting
S
up duration. Otherwise the lamp could not be lighted on completed.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
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Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value
and the effective discharge length is longer than 80% of its original length (Effective discharge
length is defined as an area that has equal to or more than 70% brightness compared to the
brightness at the center point.) as the time in which it continues to operate under the condition Ta
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
= 25 2к and I
= 5.5 ~ 6.5 mA
L
RMS
.
Note (5) The power supply capacity should be higher than the total inverter power consumption P
the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
Item Symbol
On/Off Control
Voltage
Internal/External
PWM Select Voltage
Internal PWM
Control Voltage
External PWM
Control Voltage
ON
V
BLON
OFF
HI
V
SEL
LO
MAX
V
IPWM
MIN
HI2.0
V
EPWM
LO
Tes t
Condition
Ё
Ё
Ё
Ё
V
= L
SEL
V
= H
SEL
Min.Typ.Max.Unit Note
2.0
0
2.0
0
ЁЁ
Ё
0
Ё
Ё
Ё
Ё
Ё
Ё
5.0V
0.8V
5.0V
0.8V
3.0Vminimum duty ratio
0
Ё
V maximum duty ratio
5.0Vduty on
0.8Vduty off
. Since
BL
Control Signal Rising Time T
Control Signal Falling Time T
PWM Signal Rising TimeT
PWM Signal Falling TimeT
PWMR
PWMF
Input impedance R
BLON Delay Time T
BLON Off Time T
r
f
IN
on
off
ЁЁЁ100ms
ЁЁЁ100ms
ЁЁЁ50us
ЁЁЁ50us
Ё1ЁЁMӨ
Ё1ЁЁms
Ё1ЁЁms
Note (1) The SEL signal should be valid before backlight turns on by BLON signal. It is inhibited to change
the internal/external PWM selection (SEL) during backlight turn on period.
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Note (2) The power sequence and control signal timing are shown as the following figure.
BL
V
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
V
V
EPWM
V
BLON
V
SEL
IPWM
V
Toff
100%
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
3.0V
PWM
Period
Ton
Backlight on duration
TrTf
Ext. Dimming Function
PWMF
T
PWMR
T
Int. Dimming Function
External
PWM Duty
Minimun
Duty
0
0
0
0
0
W
External
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(
)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
RX0(+/-)
RX1(+/-)
RX2(+/-)
RX3(+/-)
RXCLK
Vcc
GND
VBL
GND
VBL
GND
SEL
E_PWM
I_PWM
BLON
+/-
CN1
CN2
INPUT CONNECTOR
(FCI,10041195-001)
INVERTER CONNECTOR
CN1: S14B -PH-SM3-TB(D)(LF)(JST)
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FRAME BUFFER
TIMING
CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
SM02 (8.0)B-BHS-1-TB(LF)(JST)
CN2: S2B-ZR-SM3A-TF (D)(LF)(JST)
SCAN DRIVER IC
CN3-CN8:
Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
TFT LCD PANEL
(1366x3x768)
DATA DRIVER IC
BACKLIGHT
UNIT
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y
(2)
(3)
(5)
(4)
(2)
g
(2)
(2)
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment
Pin No. S
1NC No Connection
2RPF Display Rotation
3SELLVDS Select LVDS data format
4NC No Connection
5NC No Connection
6ODSEL Overdrive Lookup Table Selection
7NC No Connection
8GND Ground
9RX0- Ne
10RX0+ Positive transmission data of pixel 0
11 RX1- Negative transmission data of pixel 1
12RX1+ Positive transmission data of pixel 1
13RX2- Negative transmission data of pixel 2
14RX2+ Positive transmission data of pixel 2
15RXCLK- Negative of clock
16RXCLK+ Positive of clock
17RX3- Negative transmission data of pixel 3
18RX3+ Positive transmission data of pixel 3
19GND Ground
20NCNo Connection
21NC No Connection
22GND Ground
23GND Ground
24GND Ground
25GND Ground
26VCC Power supply: +5V
27VCCPower supply: +5V
28VCCPower supply: +5V
29VCCPower supply: +5V
30VCCPower supply: +5V
Note (1) Connector Part No.: FCI,10041195 or compatible
mbol DescriptionNote
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
(2)
ative transmission data of pixel 0
Note (2) Reserved for internal use. Left it open.
Note (3) Low : normal display (default), High : display with 180 degree rotation
Note (4) Overdrive lookup table selection. The Overdrive lookup table should be selected in accordance to the
frame rate to optimize image quality.
ODSEL Note
LLookup table was optimized for 60 Hz frame rate.
HLookup table was optimized for 50 Hz frame rate.
Note (5) Please refer to 5.5 LVDS INTERFACE (Page 17)
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5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
Pin No. Symbol Description
1HVHigh Voltage Pink
2HVHigh Voltage White
Note (1) The backlight interface housing for high voltage side is a model BHR-03VS-1, manufactured by JST.
The mating header on inverter part number is SM02(8.0)B-BHS-1-TB(LF) or equivalent.
Pin No. Symbol Description
1LV Low Voltage (+) Black
2 LV Low Voltage (-)White
Note (2) The backlight interface housing and return cable for low voltage side is a model ZHR-2 , manufactured
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
CN3-CN9 (Housing): BHR-03VS-1 (JST)
Wire Color
CN10 (Housing): ZHR-2 (JST) or equivalent
Wire Color
by JST or equivalent. The mating header on inverter part number is S2B-ZR-SM3A-TF(D)(LF) or
equivalent.
8 Female Connectors
BHR-03 S-1(JST)
V
or Equal
1.HV(Pink,+)
2.HV(White,+)
1.HV(Pink,-)
2.HV(White,-)
1.HV(Pink,+)
2.HV(White,+)
1.HV(Pink,-)
2.HV(White,-)
1.HV(Pink,+)
2.HV(White,+)
1.HV(Pink,-)
2.HV(White,-)
or Equal
ZHR-2
Retruen cable
1.LV(Black)
2.LV(White)
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5.3 INVERTER UNIT
CN1(Header): S14B -PH-SM3-TB(D)(LF)(JST) or equivalent.
Pin No. Symbol Description
1
2
3
4
5
6
7
8
9
10
11 SEL
12E_PWM
13I_PWM
14BLON Backlight on/off control
VBL +24V Power input
GND Ground
Internal/external PWM selection
High : external dimming
Low : internal dimming
External PWM control signal
E_PWM should be connected to low when internal PWM was selected (SEL =
low).
Internal PWM control signal
I_PWM should be connected to ground when external PWM was selected (SEL =
high).
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Model No.: V270B1 - L03
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CN2(Header): S12B-PH-SM3-TB(D)(LF)(JST) or equivalent.
Pin No. Symbol Description
1
2
CN3-CN8 (Header): SM02(8.0)B-BHS-1-TB(LF)(JST) or equivalent
PinName Description
1
2
Note (1) Floating of any control signal is not allowed.
CCFL COLD
CCFL COLD
CCFL HOT
CCFL HOT
CCFL low voltage (+)
CCFL low voltage (-)
CCFL high voltage
CCFL high voltage
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p
G0-G
0
5.4 BLOCK DIAGRAM OF INTERFACE
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Model No.: V270B1 - L03
Tentative
CNF1
R0-R7
-
7
B
-B7
DE
Host
Graphics
Controller
TxIN
PLL
LVDS Transmitter
THC63LVDM83A
(LVDF83A)
Rx0+
-
Rx
Rx1+
Rx1-
Rx2+
Rx2Rx3+
CLK+
51Ө
100pF
51Ө
51Ө
100
F
51Ө
51Ө
100pF
51Ө
51Ө
-
-
100pF
51Ө
51Ө
51Ө
100pF
PLL
RxOUT
R0-R7
7
B
-B7
DE
DCLK
Timing
Controller
LVDS Receiver
THC63LVDF84A
R0~R7 : Pixel R Data ,
G0~G7 : Pixel G Data ,
B0~B7 : Pixel B Data ,
DE : Data enable signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
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5.5 LVDS INTERFACE
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
SIGNAL
SELLVDS=LSELLVDS
=H
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
24
bit
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
RSVD 1
RSVD 2
RSVD 3
R0~R7: Pixel R Data (7; MSB, 0; LSB)
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
RSVD 1
RSVD 2
RSVD 3
DCLK31TxCLK IN TxCLK OUT+
TRANSMITTER
THC63LVDM83A
PIN INPUT Host TFT-LCDPIN OUTPUT
51
52
54
55
56
3
4
6
7
11
12
14
15
19
20
22
23
24
30
50
2
8
10
16
18
25
27
28
TxIN0
TxIN1
TxIN2
TxIN3
TxIN4
TxIN6
TxIN7
TxIN8
TxIN9
TxIN12
TxIN13
TxIN14
TxIN15
TxIN18
TxIN19
TxIN20
TxIN21
TxIN22
TxIN26
TxIN27
TxIN5
TxIN10
TxIN11
TxIN16
TxIN17
TxIN23
TxIN24
TxIN25
INTERFACE
CONNECTOR
TA OUT0+
TA OUT0-
TA OUT1+
TA OUT1-
TA OUT2+
TA OUT2-
TA OUT3+
TA OUT3-
TxCLK OUT-
Rx 0+
Rx 0-
Rx 1+
Rx 1-
Rx 2+
Rx 2-
Rx 3+
Rx 3-
RxCLK IN+
RxCLK IN-
RECEIVER
THC63LVDF84A
Rx OUT0
27
Rx OUT1
29
Rx OUT2
30
Rx OUT3
32
Rx OUT4
33
Rx OUT6
35
Rx OUT7
37
Rx OUT8
38
Rx OUT9
39
Rx OUT12
43
Rx OUT13
45
Rx OUT14
46
Rx OUT15
47
Rx OUT18
51
Rx OUT19
53
Rx OUT20
54
Rx OUT21
55
Rx OUT22
1
Rx OUT26
6
Rx OUT27
7
Rx OUT5
34
Rx OUT10
41
Rx OUT11
42
Rx OUT16
49
Rx OUT17
50
Rx OUT23
2
Rx OUT24
3
Rx OUT25
5
26RxCLK OUT DCLK
TFT CONTROL
INPUT
SELLVDS=LSELLVDS
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
DE
R6
R7
G6
G7
B6
B7
NC
NC
NC
=H
R2
R3
R4
R5
R6
R7
G2
G3
G4
G5
G6
G7
B2
B3
B4
B5
B6
B7
DE
R0
R1
G0
G1
B0
B1
NC
NC
NC
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
Notes(1) RSVD(reserved)pins on the transmitter shall be “H” or “L”.
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5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Ye ll ow
White
Red(0) / Dark
Red(1)
Red(2)
:
:
Red(253)
Red(254)
Red(255)
Green(0) / Dark
Green(1)
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Data Signal
RedGreen Blue
0
0
0
0
0
1
0
0
0
1
1
1
0
0
0
:
:
1
1
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
0
:
:
0
1
1
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
0
0
:
:
:
:
:
:
0
1
0
0
0
1
0
0
0
0
0
0
:
:
:
:
:
:
1
0
1
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
1
1
0
:
:
0
1
1
0
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
1
1
1
0
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
0
0
0
:
:
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
:
:
:
:
:
:
1
0
1
0
1
1
1
1
1
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g
y
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
nal Item SymbolMin.Typ.Max. Unit Note
Si
Frequenc
LVDS Receiver Clock
LVDS Receiver Data
Vertical Active Display Term
Horizontal Active Display Term
Note (1) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to
Input cycle to
cycle jitter
Setup Time Tlvsu 600- - ps
Hold Time Tlvhd600- - ps
Frame Rate
Tota l T v
Display Tvd
Blank Tvb 1027120Th -
Tota l T h
Display Thd
Blank Thb 76432570Tc -
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1/Tc658688MHZ
Trcl - - 200ps
Fr5475053Hz
Fr
6576063Hz
778
768
1442
1366
795888Th Tv=Tvd+Tvb
768768Th -
17981936Tc Th=Thd+Thb
13661366Tc -
Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
(2)
low logic level. Otherwise, this module would operate abnormally.
(2) Please refer to 5.1 for detail information.
INPUT SIGNAL TIMING DIAGRAM
Tvd
DE
Th
DCLK
T
c
DE
Thb
T
v
Tvb
Thd
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Valid display data (1366 clocks)
19
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LVDS RECEIVER INTERFACE TIMING DIAGRAM
RXCLK+/-
RXn+/-
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Tc
Tlvsu
Tlvhd
1T
14
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
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Љ
Љ
Љ
Љ
Љ
Љ
Љ
6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the
diagram below.
www.panelook.com
Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Power Supply
V
0.5ЉT1Љ10ms
0
0
500ms
CC
0V
T
2
50ms
T
3
50ms
T
4
Signals
0V
Backlight (Recommended)
500ms
100ms
T
5
T6
0.9 VCC
CC
0.1V
Power On
CC
0.9 V
0.1Vcc
T
3T1
2
T
T4
VALID
Power Off
50%
5
T
50%
T
6
Power ON/OFF Sequence
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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y
(
)
(2)
(
)
(4)
(
)
(7)
(4)%(5)
(
)
y
(
)
(
)
y
(
)
(
)
y
(
)
(
)
y
(
)
(75)
(88)
(88)
(88)
(88)
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current I
Oscillating Frequency (Inverter) F
Vertical Frame Rate
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should
be measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item S
Contrast Ratio CR
Response Time
Center Luminance of White L
White Variation
Cross Talk CT
Red
Green
Color
Chromaticity
Viewing
Angle
Blue
White
Color Gamut CG
Horizontal
Ver t ic a l
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
25r2
50r10
CC
L
W
5.0V
5.5 r 0.5
58 r 3
Fr 60Hz
mbol ConditionMin.Typ.Max. Unit Note
1200
Gray to gray
average
(6.5)ms (3)
500
GW
Rx
R
Gx
G
Bx
B
Wx
W
T
T
T
T
=0q, TY =0q
T
x
Viewing Normal
0.652
0.331
Angle
0.275
0.597
0.143
0.066
0.285
0.293
+
+
CRt20
-
1.3
%RH
KHz
cd/m
Target
%NTSC
Deg. (1)
Tentative
o
C
mA
-
2
-
-
-
-
-
-
-
(6)
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T
Note (1) Definition of Viewing Angle (Tx, Ty):
Viewing angles are measured by EZ-Contrast 160R (Eldim)
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Normal
Tx = Ty = 0º
T
yTy-
Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
TX- = 90º
6 o’clock
y- = 90º
T
x-
y-
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(7).
Tx
Tx
12 o’clock direction
y+
T
y+ = 90º
x+
T
X+ = 90º
Note (3) Definition of Gray to Gray Switching Time :
100%
90%
Optical
Response
10%
0%
Gray to gray
switching time
Gray to gray
switching time
The driving signal means the signal of gray level 0, 63, 127, 191, 255.
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each
other .
23
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(
)
A
A
(
)
(
)
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point and 5 points
L
= L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (7).
C
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YAu 100 (%)
B
Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
ctive Area
Gray 128
Y
Y
D,W
A, U
A, R
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
(0, 0)
):
C
(D/2,W/8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
ctive Area
Gray 0
Gray 0
Gray 128
Y
(D/2,W/8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
D,W
Note (6) Measurement Setup:
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be
executed after lighting Backlight for 1 hour in a windless room.
LCD Module
LCD Panel
Center of the Screen
Display Color Analyzer
(Minolta CA210)
Light Shield Room
(Ambient Luminance < 2 lux)
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Note (7) Definition of White Variation (GW):
Measure the luminance of gray level 255 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
Horizontal Line
D
3D/4D/2D/4
Vertical Line
W
W/4
W/2
3W/4
12
: Test Point
5
34
Active Area
X
X=1 to 5
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
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8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
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9. MECHANICAL CHARACTERISTICS
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Issued Date: Feb. 14, 2006
Model No.: V270B1 - L03
Tentative
奇美電子股份有限公司
%*+/'+
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