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Issued Date: 30, Nov. 2010
Model No.: V260H1
Ω LE1
Approval
TFT LCD Approval Specification
MODEL NO.: V260H1- LE1
Customer:
Approved by:
Note:
TV Product Marketing & Management Div
Approved By
Chao-Chun Chung
Reviewed By
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Prepared By
LCD TV Marketing and Product Management Div.
QA Dept. Product Development Div.
Hsin-nan Chen TC Pan
Vincent Chou Delia Lin
1
Version 6.0
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Issued Date: 30, Nov. 2010
Model No.: V260H1
Ω LE1
Approval
CONTENTS -
1. GENERAL DESCRIPTION...................................................................................................................................... 5
1.1 OVERVIEW.................................................................................................................................................. 5
1.2 FEATURES .................................................................................................................................................. 5
1.3 APPLICATION.............................................................................................................................................. 5
1.4 GENERAL SPECIFICATI0NS ....................................................................................................................... 5
1.5 MECHANICAL SPECIFICATIONS ................................................................................................................ 5
2. ABSOLUTE MAXIMUM RATINGS........................................................................................................................... 6
2.1 ABSOLUTE RATINGS OF ENVIRONMENT.................................................................................................. 6
2.2 ELECTRICAL ABSOLUTE RATINGS............................................................................................................ 7
3. ELECTRICAL CHARACTERISTICS........................................................................................................................ 7
3.1 TFT LCD MODULE....................................................................................................................................... 7
3.2 BACKLIGHT UNIT........................................................................................................................................ 9
4. BLOCK DIAGRAM OF INTERFACE...................................................................................................................... 10
4.1 TFT LCD MODULE..................................................................................................................................... 10
5. INTERFACE PIN CONNECTION .......................................................................................................................... 11
5.1 TFT LCD MODULE..................................................................................................................................... 11
5.2 BACKLIGHT UNIT...................................................................................................................................... 13
5.3 BLOCK DIAGRAM OF INTERFACE ........................................................................................................... 14
5.4 LVDS INTERFACE ..................................................................................................................................... 16
5.5 COLOR DATA INPUT ASSIGNMENT.......................................................................................................... 17
6. INTERFACE TIMING ............................................................................................................................................ 18
6.1 INPUT SIGNAL TIMING SPECIFICATIONS................................................................................................ 18
6.2 POWER ON/OFF SEQUENCE................................................................................................................... 21
7. OPTICAL CHARACTERISTICS ............................................................................................................................ 22
7.1 TEST CONDITIONS................................................................................................................................... 22
7.2 OPTICAL SPECIFICATIONS ...................................................................................................................... 22
8. DEFINITION OF LABELS ..................................................................................................................................... 26
8.1 CMO MODULE LABEL............................................................................................................................... 26
9. PACKAGING......................................................................................................................................................... 27
9.1 PACKING SPECIFICATIONS...................................................................................................................... 27
9.2 PACKING METHOD ................................................................................................................................... 27
10. PRECAUTIONS.................................................................................................................................................. 29
10.1 ASSEMBLY AND HANDLING PRECAUTIONS ......................................................................................... 29
10.2 SAFETY PRECAUTIONS ......................................................................................................................... 29
10.3 STORAGE PRECAUTIONS...................................................................................................................... 29
11. REGULATORY STANDARDS.............................................................................................................................. 30
11.1 SAFETY ................................................................................................................................................... 30
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12. MECHANICAL CHARACTERISTIC ..................................................................................................................... 31
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REVISION HISTORY
Version Date
Ver 6.0 Nov. 30,’10 All All Approval Specification was first issued.
Page
(New)
Section Description
Approval
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V260H1- LE1 is a TFT Liquid Crystal Display module with LED Backlight unit and 2ch-LVDS interface. The
display diagonal is 26”. This module supports 1920 x 1080 Full HDTV format and can display 16.7M colors
(8-bit/color).
1.2 FEATURES
- Optimized Brightness 320nits
- Contrast Ratio 800:1
- Fast Response Time 5ms
- Color Saturation NTSC 72%
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) Only Mode
- LVDS (Low Voltage Differential Signaling) Interface
- Viewing Angle: 160(H)/150(V) (CR>10) TN Technology
Approval
- Color Reproduction (Nature Color)
1.3 APPLICATION
-TFT LCD TVs
-Optimized Brightness, Multi-Media Displays
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 576(H) x 324(V) (26.02” diagonal) mm
Bezel Opening Area 580.2(H) x 328.2 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1920x R.G.B. x 1080 pixel Pixel Pitch(Sub Pixel) 0.100 (H) x 0.300 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 16.7M color Display Operation Mode Transmissive mode / Normally White - -
Surface Treatment
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 612 613 614 mm Module Size
Module Size
Weight
Note (1)Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical (V) 360 361 362 mm
Depth (D)
Weight 2600 g
Anti-Glare coating (Haze 25%)
Hard Coating (3H)
9.3 10.3 11.3 mm To Rear
13.8 14.8 15.8 mm To PCB Protector
- (2)
(1)
Note (2) Module Depth does not include connectors.
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2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
Љ
±X, ±Y 50
NOP
±Z
- 1.0 G (4), (5)
NOP
Min. Max.
Value
50
Unit Note
G (3), (5)
improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so
that the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
40
Operating Range
20
10
Storage Range
2.2 ELECTRICAL ABSOLUTE RATINGS
Temperature (ºC)
2.2.1 TFT LCD MODULE
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2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
RUSH
Value
Unit Note
Value
Min. Typ. Max.
Ё Ё
(1)
Unit Note
3.5 A (2)
Item Symbol
Min. Max.
Power Supply Voltage Vcc -0.3 13.5 V
Input Signal Voltage VIN -0.3 3.6 V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Parameter Symbol
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Rush Current I
Ta = 25 ± 2 ºC
Ё Ё
Ё Ё
Ё Ё
V
V
|V
LVT H
LVTL
ID
T
IL
+100
Ё Ё
| 200
Ё
0
Power Supply Current
Differential Input High
Threshold Voltage
Differential Input Low
Threshold Voltage
LVDS
interface
Common Input Voltage VCM 1.0 1.2 1.4 V
Differential input voltage
(Single-end)
Terminating Resistor R
CMOS
interface
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
White Pattern
Horizontal Stripe
Black Pattern
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
0.29
0.45
Ё
Ё
A
A
0.46 0.55 A
Ё Ё
mV
-100 mV
Ё
100
Ё
Ё
600 mV
Ё
ohm
3.3 V
0.7 V
(3)
(4)
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+12.0V
R1
200K
Q1 AO4409
FUSE
C3
1uF
Vcc
(LCD Module Input)
(Low to High)
(Control Signal)
SW
R2
1K
VR1
47K
Q2
2N7002
C1
10uF
Vcc rising time is 470us
+12V
0.9Vcc
0.1Vcc
GND
470us
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
b. Black Pattern
= 60
v
Active Area
Active Area
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c. Horizontal Pattern
Note (4) The LVDS input characteristics are as follows:
Approval
3.2 BACKLIGHT UNIT
3.2.1 LED LIGHT BARCHARACTERISTICS (
Parameter
Light Bar Voltage VW
Forward Voltage Vf
LED Current IL
LED lifetime hr 30,000 hrs (1)
LED Total Quantity Ё Ё 78 Ё PCS
LED Quantity Per String Ё Ё 13 Ё PCS
Per Light-bar Parallel
Quantity
Note (1) The lifetime is defined as the time which luminance of the LED decays to 50% compared to the
Symb
ol
Ё Ё 6 Ё Stri ng
Min. Typ. Max.
- - 46.8
3.1 - 3.6
112.8 120 127.2
Ta = 25 ± 2 ºC)
Value
Unit Note
V
I
RMS
V
I
RMS
mA
RMS
Light bar Quantity: 1
=120mA
L
=120mA
L
initial value, Operating condition: Continuous operating at Ta = 25
2к, I
=120mA
L
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4. BLOCK DIAGRAM OF INTERFACE
4.1 TFT LCD MODULE
ERX0(+/-)
ERX1(+/-)
ERX2(+/-)
ERX3(+/-)
ECLK(+/-)
ORX0(+/-)
ORX1(+/-)
ORX2(+/-)
ORX3(+/-)
OCLK(+/-)
SELLVDS
Vcc
GND
(107C51-0000RA-G4 Starconn)or
INPUT CONNECTOR
CONTROLLER
DC/DC CONVERTER &
equivalent
REFERENCE VOLTAGE
LED BACKLIGHT UNIT
CN: 51281-1094 (Molex) or
TIMING
equivalent
Approval
SCAN DRIVER IC
TFT LCD PANEL
(1920x3x1080)
DATA DRIVER IC
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5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment
Pin Name Description Note
1 VCC +12V power supply
2 VCC +12V power supply
3 VCC +12V power supply
4 VCC +12V power supply
5 VCC +12V power supply
6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 ORX0- Odd pixel Negative LVDS differential data input. Channel 0
11 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0
12 ORX1- Odd pixel Negative LVDS differential data input. Channel 1
13 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1
14 ORX2- Odd pixel Negative LVDS differential data input. Channel 2
15 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2
16 GND Ground
17 OCLK- Odd pixel Negative LVDS differential clock input
18 OCLK+ Odd pixel Positive LVDS differential clock input.
19 GND Ground
20 ORX3- Odd pixel Negative LVDS differential data input. Channel 3
21 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3
22 N.C. No Connection
23 N.C. No Connection
24 GND Ground
25 ERX0- Even pixel Negative LVDS differential data input. Channel 0
26 ERX0+ Even pixel Positive LVDS differential data input. Channel 0
27 ERX1- Even pixel Negative LVDS differential data input. Channel 1
28 ERX1+ Even pixel Positive LVDS differential data input. Channel 1
29 ERX2- Even pixel Negative LVDS differential data input. Channel 2
30 ERX2+ Even pixel Positive LVDS differential data input. Channel 2
31 GND Ground
32 ECLK- Even pixel Negative LVDS differential clock input.
33 ECLK+ Even pixel Positive LVDS differential clock input.
34 GND Ground
35 ERX3- Even pixel Negative LVDS differential data input. Channel 3
36 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
37 N.C. No Connection
38 N.C. No Connection
39 GND Ground
40 N.C. No Connection
41 N.C. No Connection
42 N.C. No Connection
43 N.C. No Connection
44 N.C. No Connection
45 SELLVDS High(3.3V) or open for VESA, Low (GND) for JEIDA (4)(5)
46 N.C. No Connection
47 N.C. No Connection
48 N.C. No Connection
49 N.C. No Connection
50 N.C. No Connection
51 N.C. No Connection
Approval
(1)
(1)
(1)
(3)
(1)
(1)
(1)
(3)
(3)
(3)
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Note (1) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and
the second pixel is even pixel
Note (2) LVDS connector pin order defined as follows
Note (3) Reserved for internal use. Please leave it open.
Note (4) Low: JEIDA LVDS Format (Connect to GND), High or open: VESA Format. (Connect to +3.3V)
Note (5) LVDS signal pin connected to the LCM side has the following diagram.
Selector (pin45
System side
System side
R1 < 1K
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
Vcc
R3
R2R1
)
Settin
TCON
below.
LCM side
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5.2 BACKLIGHT UNIT
The pin configuration for the housing and the leader wire is shown in the table below.
CN: 51281-1094 (Molex)
or
equivalent
Pin № Symbol Feature
1 VLED2 VLED3 VLED4 VLED5 VLED6 VLED7 NC NC
8 VLED+3
9 VLED+2
10 VLED+1
Negative of LED String
Positive of LED String
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5.3 BLOCK DIAGRAM OF INTERFACE
ER0-ER7
-
-
DE
OR0-OR7
OG0-OG7
-
Host
Graphics
Controller
CNF1
ERx0+
-
ERx1+
ERx1-
ERx2+
-
ERx3+
ERx3-
ECLK+
ORx0+
ORx1+
ORx1-
Approval
100
Ө
100pF
100
100
100
100
100
100
100
Ө
Ө
100pF
Ө
Ө
100pF
Ө
Ө
100pF
Ө
ER0-ER7
-
-
OR0-OR7
OG0-OG7
-
100
Ө
100
100pF
Ө
-
DCL
Timing
100
Ө
100
100
100pF
Ө
Ө
100
F
-
Controller
ORx2+
ORx3+
ORx3-
OCLK+
LVDS Transmitter
100
Ө
100
100
100
100
100
100pF
Ө
Ө
100pF
Ө
Ө
100pF
Ө
-
-
LVDS Rec e i v er
THC63LVDM83A
(LVDF83A)
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ER0~ER7: Even pixel R data
EG0~EG7: Even pixel G data
EB0~EB7: Even pixel B data
OR0~OR7: Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7: Odd pixel B data
DE: Data enable signal
DCLK: Data clock signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and
the second pixel is even pixel.
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5.4 LVDS INTERFACE
VESA LVDS formatΚ(SELLVDS pin=H or open)
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
Current F\FOH
Current F\FOH
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
R5G0 R4 R3 R2 R1
R5G0 R4 R3 R2 R1
B0 G5B1
B0 G5B1
G3 G2G4
G3 G2G4
G3 G2G4
G3 G2G4
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R0
R0
G1
G1
B2B4 B3B5VS HSDE
B2B4 B3B5VS HSDE
Approval
ERX3
ERX3
JEDIA LVDS format
RXCLK
RXCLK
ORX0
ORX0
ORX1
ORX1
ORX2
ORX2
ORX3
ORX3
ERX0
ERX0
ERX1
ERX1
ERX2
ERX2
ERX3
ERX3
Κ(SELLVDS pin=L)
Current F\FOH
Current F\FOH
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R7G2 R6 R5 R4 R3
R7G2 R6 R5 R4 R3
B2 G7B3
B2 G7B3
R6G6 R7G7B7 B6RSVD
R6G6 R7G7B7 B6RSVD
R2
R2
G5 G4G6
G5 G4G6
G5 G4G6
G5 G4G6
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R2
R2
G3
G3
B4B6 B5B7VS HSDE
B4B6 B5B7VS HSDE
R0G0 R1G1B1 B0RSVD
R0G0 R1G1B1 B0RSVD
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
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5.5 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.
The higher the binary input, the brighter the color. The table below provides the assignment of the color versus data
input.
Data Signal
Color
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Blue
Cyan
Magenta
Yellow
White
Red(0) / Dark
Red(1)
Red(2)
:
:
Red(253)
Red(254)
Red(255)
Green(0) / Dark
Green(1)
Green(2)
:
:
Green(253)
Green(254)
Green(255)
Blue(0) / Dark
Blue(1)
Blue(2)
:
:
Blue(253)
Blue(254)
Blue(255)
Note (1) 0: Low Level Voltage, 1: High Level Voltage
0
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
1
0
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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0
0
0
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:
:
:
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:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
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0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
1
1
1
1
1
1
0
0
0
0
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0
:
:
:
:
0
0
0
0
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0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
0
1
1
1
1
1
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
1
0
1
0
1
1
1
0
0
1
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
0
0
0
1
0
0
:
:
0
1
0
0
0
1
0
0
0
0
0
0
:
:
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
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:
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:
:
:
:
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:
1
1
1
1
1
1
0
0
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1
1
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0
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1
1
0
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:
:
:
:
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0
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:
:
:
:
0
0
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:
:
:
:
1
1
1
1
1
1
0
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:
:
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1
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:
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0
0
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:
:
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0
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0
:
:
1
0
1
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
F
clkin
(=1/TC)
T
rcl
clkin_mod
F
200 KHz
F
SSM
Fr5 47 50 53 Hz
57 60 63 Hz
F
r6
60 74.25 80 MHz
Ё Ё
F
-2%
clkin
Ё
Ё Ё
Ё Ё
200 ps (3)
F
+2% MHz
clkin
LVDS
Receiver
Clock
LVDS
Receiver
Data
Vertical
Active
Display
Term
Frequency
Input cycle to
cycle jitter
Spread spectrum
modulation range
Spread spectrum
modulation frequency
Setup Time Tlvsu 600
Hold Time Tlvhd 600
Frame Rate
Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th
ps
ps
Approval
(4)
(5)
Ё
Blank Tvb 35 45 55 Th
Horizontal
Active
Display
Term
Note (1) Please make sure the range of pixel clock has follow the below equationΚ
Note (2) This module is operated in DE only mode and please follow the input signal timing diagram
Total Th 1050 1100 1150 Tc Th=Thd+Thb
Display Thd 960 960 960 Tc
Blank Thb 90 140 190 Tc
Fclkin(max) Fr6 Tv Th
Fr5 Tv Th Fclkin(min)
ѼѼЊ
below
Κ
ЊѼѼ
Ё
Ё
Ё
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INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
DE
DATA
T
h
Tvd
Tv
Tvb
Thd
Valid Display Data (960 clocks)
Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI
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Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.
Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.
Approval
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T
14
LVDS RECEIVER INTERFACE TIMING DIAGRAM
Tc
3T
14
5T
14
7T
14
9T
14
11T
14
13T
14
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6.2 POWER ON/OFF SEQUENCE
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.
0.9V
CC
10ms
50ms
50ms
ЉЉЉЉ
T4
0V
0.5
ЉЉЉЉ
T
1
ЉЉЉЉ
ЉЉЉЉ
T
2
ЉЉЉЉ
ЉЉЉЉ
T
3
ЉЉЉЉ
0
0
500ms
0.1V
CC
2
T
LVDS Signals
0V
Power On
VALI D
0
ЉЉЉЉ
T
7
ЉЉЉЉ
ЉЉЉЉ
T2
T
8
ЉЉЉЉ
T3
T7
0
Option Signals
(SELLVDS)
0.9V
3
T1
T
CC
0.1V
T4
Power Off
8
T
cc
Backlight (Recommended)
ЉЉЉЉ
500ms
100ms
T5
ЉЉЉЉ
T
6
50%
5
T
50%
T
6
Power ON/OFF Sequence
Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the LED voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If
T2<0,that maybe cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.
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y
(2)
(4)
)
k
(5)
y
y
y
y
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Voltage VCC 12V V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Current IL
25±2
50±10
120±7.2
7.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item S
Contrast Ratio CR 600 800 - -
Response Time
Center Luminance of White L
White Variation
Cross Tal
Red
Green
Color
Chromaticity
Viewing
Angle
Blue
White
Color Gamut CG
Horizontal
Vertical
mbol Condition Min. Typ. Max. Unit Note
TR - 1.5
T
- 3.5 5.2
F
250 320 - -
δW
CT - - 4 %
Rx 0.619 -
R
Gx 0.286 G
Bx 0.158 -
B
Wx 0.280
W
θ
+
θ
-
θ
+
θ
-
θ
=0°, θY =0°
x
Viewing Normal
Angle
CR≥10
--1.3-(7
0.333 -
Typ.
-0.03
70 80 70 80 65 75 65 75 -
0.637 -
0.052 -
0.290
-72 -%NTSC
2.8
Typ.
+0.03
o
C
%RH
mA
ms (3)
(6)
Ta rg et
Deg. (1)
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Note (1) Definition of Viewing Angle (θx, θy):
Viewing angles are measured by Autronic Conoscope Cono-80
θX- = 90º
x-
6 o’clock
θ
y-
= 90º
y-
Normal
θx = θy = 0º
θy- θy+
θx−
θx+
y+
12 o’clock direction
θ
y+
= 90º
x+
θX+ = 90º
Approval
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in
Note (7)
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
, TF):
R
T
R
T
F
ime
Note (4) Definition of Luminance of White (L
Measure the luminance of gray level 255 at center point.
):
C
LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | Y
– YA | / YA × 100 (%)
B
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)
(
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Where:
Y
= Luminance of measured location without gray level 0 pattern (cd/m2)
A
Y
= Luminance of measured location with gray level 0 pattern (cd/m2)
B
(0, 0)
Gray 0
Y
(D/8,W/2)
A, L
Y
(D/2,7W/8)
A, D
Note (6) Measurement Setup:
Active Area
Gray 128
Y
Y
D, W
A, U
A, R
(D/2,W /8)
(7D/8,W/2)
(D/4,W/4)
Y
(D/8,W/2)
B, L
Y
(D/2,7W/8)
B, D
0, 0
Active Area
Gray 0
Approval
Y
(D/2,W /8)
B, U
Y
(7D/8,W/2)
B, R
(3D/4,3W/4)
(D, W)
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
(CS-1000 or CA-210 calibrated by CS-2000) should be executed after lighting backlight for 1
hour in a windless room.
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Note (7) Definition of White Variation (δW):
Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Vertical Line
W
W/
W/2
3W /
Horizontal Line
D
D/4 D/2 3D/4
12
: Test Point
5
34
X
X=1 to 5
Approval
Active Area
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8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following
explanation.
V260H1 -LE1 Rev. C6
CHI MEI
OPTOELECTRONICS
X X X X X X X Y M D L N N N N
V260H1 -LE1 Rev. C6
CHI MEI
OPTOELECTRONICS
X X X X X X X Y M D L N N N N
E207943
MADE IN TAIWAN
GEMN
E207943
MADE IN TAIWAN
MADE IN CHINA
LEOO(or CAPG or CANO)
RoHS
(a) Model Name: V260H1-LE1
(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X
Serial ID includes the information as below:
Day: 1~9, A~Y, for 1
X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
CMO Internal Use
Revision
CMO Internal Use
(a) Manufactured Date: Year: 0~9, for 2010~2019
Month: 1~9, A~C, for Jan. ~ Dec.
st
to 31st, exclude I ,O, and U.
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 11 LCD TV modules / 1 Box
(2) Box dimensions : 698(L)x436(W)x452(H)mm
(3)
Weight : approximately 31.7 Kg (11 modules per box)
9.2 PACKING METHOD
Figures 9-1 and 9-2 are the packing method
LCD TV Module
Anti-Static Bag
Cushion(Bottom)
Module*11pcs
Cushion(Top)
Approval
Carton
Carton Label location
Carton Label
Figure.9-1 packing method
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Sea / Land Transportation
(40ft HQ Container)
Sea / Land Transportation
(40ft Container)
Approval
Air Transportation
Figure. 9-2 Packing method
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10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent
the damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
10.2 SAFETY PRECAUTIONS
(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
10.3 STORAGE PRECAUTIONS
When storing modules as spares for a long time, the following precaution is necessary.
(1) Do not leave the module in high temperature, and high humidity for a long time.
It is highly recommended to store the module with temperature from 0 to 35
condensation.
(
2) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
кat normal humidity without
light.
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11. REGULATORY STANDARDS
11.1 SAFETY
The LCD module should be certified with safety regulations as follows:
Requirement Standard Remark
UL
cUL/CSA
CB
UL60950-1:2006 or Ed.2:2007
UL60065 Ed.7:2007
CAN/CSA C22.2 No.60950-1-03 or 60950-1-07
CAN/CSA C22.2 No.60065-03:2006 + A1:2006
IEC60950-1:2005 / EN60950-1:2006+ A11:2009
IEC60065:2001+ A1:2005 / EN60065:2002 + A1:2006 + A11:2008
Approval
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12. MECHANICAL CHARACTERISTIC
Approval
࡛ભሽٝ ڶૻֆ
CHI MEI
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CH I MEI
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