CMO V260H1-L03 Specification

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Issued Date: 13, Jan 2010

Model No.: V260H1

Ω L03

TFT LCD Preliminary Specification

MODEL NO.: V260H1 – L03

Preliminary

Approved By

Reviewed By

TV Product Marketing & Management Div

Chao-Chun Chung

QA Dept. Product Development Div.

Hsin-Nan Chen WT Lin

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

Prepared By

LCD TV Marketing and Product Management Div.

CY Chang Delia Lin

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Preliminary

- CONTENTS -

REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION ------------------------------------------------------- 4

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE

3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM ------------------------------------------------------- 10

4.1 TFT LCD MODULE

5. INTERFACE PIN CONNECTION ------------------------------------------------------- 11

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 BLOCK DIAGRAM OF INTERFACE

5.4 LVDS INTERFACE

5.5 COLOR DATA INPUT ASSIGNMENT

6. INTERFACE TIMING ------------------------------------------------------- 18

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 22

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. DEFINITION OF LABELS ------------------------------------------------------- 26

8.1 CMO MODULE LABEL

9. PACKAGING ------------------------------------------------------- 27

9.1 PACKING SPECIFICATIONS

9.2 PACKING METHOD

10. PRECAUTIONS ------------------------------------------------------- 29

10.1 ASSEMBLY AND HANDLING PRECAUTIONS

10.2 SAFETY PRECAUTIONS

10.3 STORAGE PRECAUTIONS

11. REGULATORY STANDARD -------------------------------------------------------- 30

11.1 SAFETY

12. MECHANICAL CHARACTERISTICS ------------------------------------------------------- 31

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REVISION HISTORY

Version Date

Page

(New)

Ver 1.0 Jan. 13,’10 All All Preliminary Specification was first issued.

Section Description

Preliminary

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V260H1- L03 is a TFT Liquid Crystal Display module with 4U-CCFL Backlight unit and 2ch-LVDS

interface. The display diagonal is 26”. This module supports 1920 x 1080 Full HDTV format and can display

16.7M colors (8-bit/color).

1.2 FEATURES

- Optimized Brightness 400nits

- Contrast Ratio (800:1)

- Fast Response Time (5ms)

- Color Saturation NTSC 72%

- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format

- DE (Data Enable) Only Mode

- LVDS (Low Voltage Differential Signaling) Interface

- Viewing Angle: 160(H)/150(V) (CR>10) TN Technology

-Color Reproduction (Nature Color)

1.3 APPLICATION

- TFT LCD TVs

- Optimized Brightness, Multi-Media Displays

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note Active Area 576 (H) x 324 (V) (26” Diagonal) mm Bezel Opening Area 580.8 (H) x 328.8 (V) mm Driver Element a-si TFT Active Matrix Pixel Number 1920 x R.G.B. x 1080 pixel Pixel Pitch (Sub Pixel) 0.100 (H) x 0.300 (V) mm Pixel Arrangement RGB Vertical Stripe Display Colors 16.7M color

Display Operation Mode Transmissive Mode / Normally White Ё

Surface Treatment

Anti-Glare Coating (Haze 25%)

Hard Coating (3H)

Ё

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 625 626 627 mm

Module Size

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Vertical(V) 372 373 374 mm Depth(D) 31 32 33 mm To Rear

Weight - 3450 - g

(1)

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Preliminary

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S

Vibration (Non-Operating) V

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 65 ºC. The range of operating temperature may degrade in case of improper

thermal management in final product design.

Љ 40 ºC).

NOP

Min. Max.

Ё Ё

Value

Unit Note

50 G (3), (5)

1.0 G (4), (5)

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 200 Hz, 30 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough

so that the module would not be twisted or bent by the fixture.

Relative Humidity (%RH)

100

90

80

60

Operating Range

40

20

10

Storage Range

Temperature (ºC)

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Preliminary

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage Vcc -0.3 13.5 V Input Signal Voltage VIN -0.3 3.6 V

Min. Max.

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VW

Power Supply Voltage VBL

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional

operation should be restricted to the conditions described under normal operating conditions.

Note (2) No moisture condensation or freezing.

Condition

Ta = 25

Ё Ё

Value

Te st

к Ё Ё

Ё

Unit Note

(1)

Min. Type Max. Unit Note

0

-0.3

Ё Ё

3000 V

30 V

7 V

RMS

(1)

(2), (3)

Note (3) The control signals includes Backlight On/Off Control, Internal PWM Control and External PWM

Control.

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Preliminary

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

Parameter Symbol

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Rush Current I

White Pattern

Power Supply Current

Differential Input High Threshold Voltage

Differential Input Low Threshold Voltage

LVDS

interface

Common Input Voltage VCM 1.0 1.2 1.4 V

Differential input voltage |VID| 200

Horizontal Stripe

Black Pattern

Ta = 25 ± 2 ºC

Value

Unit Note

Min. Typ. Max.

RUSH

Ё Ё

V

LVT H

V

LVTL

Ё Ё

+100

Ё Ё

0.29

0.45

0.46 0.55 A

Ё Ё

Ё

3.0 A (2)

Ё

A

mV

-100 mV

600 mV

(3)

(4)

Ё

CMOS

interface

Terminating Resistor R

T

Input High Threshold Voltage VIH 2.7

Input Low Threshold Voltage V

0

IL

Note (1) The module should be always operated within above ranges.

Note (2) Measurement Conditions:

+12.0V

Q1 AO4409

R1

200K

FUSE

(Low to High)

(Control Signal)

SW

R2

1K

VR1

47K

Q2

2N7002

C1

10uF

100

Ё

ohm

3.3 V

0.7 V

C3

1uF

Vcc

(LCD Module Input)

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Vcc rising time is 470us

+12V

0.9Vcc

0.1Vcc

GND

470us

Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, f

Hz, whereas a power dissipation check pattern below is displayed.

a. White Pattern

b. Black Pattern

Preliminary

= 60

v

c. Horizontal Pattern

Active Area

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Note (4) The LVDS input characteristics are as follows:

3.2 BACKLIGHT UNIT

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (

Parameter Symbol

Lamp Voltage VW Lamp Current(HI-Side) IL

Lamp Starting Voltage VS

Min. Typ. Max.

- 1410 -

-7.5-

- -

- Operating Frequency FO 40 - 80 Lamp Life Time LBL 50,000 -

Value

2080 1890

Preliminary

Ta = 25 ± 2 ºC)

Unit Note

V

RMS

mA

RMS

V

RMS

V

RMS

KHz (2)

Hrs (3)

I

= 7.5mA

L

-

, Ta = 0 ºC

, Ta = 25 ºC

Note (1) The lamp starting voltage V

up duration. Otherwise the lamp could not be lighted on completed.

should be applied to the lamp for more than 1 second under starting

S

Note (2) The lamp frequency may produce interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (3) The life time of a lamp is defined as when the brightness is larger than 50% of its original value

and the effective discharge length is longer than 80% of its original length (Effective discharge

length is defined as an area that has equal to or more than 70% brightness compared to the

brightness at the center point.) as the time in which it continues to operate under the condition Ta

= 25

2к and I

= 7.0~ 8.0mA

L

RMS

.

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4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

ERX0(+/-) ERX1(+/-) ERX2(+/-) ERX3(+/-) ECLK(+/-)

ORX0(+/-) ORX1(+/-) ORX2(+/-) ORX3(+/-) OCLK(+/-)

(107C51-0000RA-G4 Starconn)or

INPUT CONNECTOR

SELLVDS

Vcc

GND

equivalent

TIMING

CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

BACKLIGHT UNIT CONNECTOR

CP0404S0000(CviLux)

Preliminary

SCAN DRIVER IC

TFT LCD PANEL

(1920x3x1080)

DATA DRIVER IC

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5. INTERFACE PIN CONNECTION

5.1 TFT LCD MODULE

CNF1 Connector Pin Assignment

Pin Name Description Note

1 VCC +12V power supply

2 VCC +12V power supply

3 VCC +12V power supply

4 VCC +12V power supply

5 VCC +12V power supply

6 GND Ground

7 GND Ground

8 GND Ground

9 GND Ground

10 ORX0- Odd pixel Negative LVDS differential data input. Channel 0

Preliminary

11 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0

12 ORX1- Odd pixel Negative LVDS differential data input. Channel 1

13 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1

14 ORX2- Odd pixel Negative LVDS differential data input. Channel 2

15 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2

16 GND Ground

17 OCLK- Odd pixel Negative LVDS differential clock input

18 OCLK+ Odd pixel Positive LVDS differential clock input.

19 GND Ground

20 ORX3- Odd pixel Negative LVDS differential data input. Channel 3

21 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3

22 N.C. No Connection

23 N.C. No Connection

24 GND Ground

25 ERX0- Even pixel Negative LVDS differential data input. Channel 0

26 ERX0+ Even pixel Positive LVDS differential data input. Channel 0

(1)

(3)

27 ERX1- Even pixel Negative LVDS differential data input. Channel 1

28 ERX1+ Even pixel Positive LVDS differential data input. Channel 1

29 ERX2- Even pixel Negative LVDS differential data input. Channel 2

30 ERX2+ Even pixel Positive LVDS differential data input. Channel 2

31 GND Ground

32 ECLK- Even pixel Negative LVDS differential clock input.

33 ECLK+ Even pixel Positive LVDS differential clock input.

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34 GND Ground

35 ERX3- Even pixel Negative LVDS differential data input. Channel 3

36 ERX3+ Even pixel Positive LVDS differential data input. Channel 3

37 N.C. No Connection

38 N.C. No Connection

39 GND Ground

40 N.C. No Connection

41 N.C. No Connection

42 N.C. No Connection

43 N.C. No Connection

44 N.C. No Connection

45 SELLVDS High(3.3V) or open for VESA, Low (GND) for JEIDA (4)(5)

46 N.C. No Connection

47 N.C. No Connection

(1)

(3)

48 N.C. No Connection

49 N.C. No Connection

50 N.C. No Connection

51 N.C. No Connection

Note (1) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and

the second pixel is even pixel

Note (2) LVDS connector pin order defined as follows

(3)

Note (3) Reserved for internal use. Please leave it open.

Note (4) Low: JEIDA LVDS Format (Connect to GND), High or open: VESA Format. (Connect to +3.3V)

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de

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Note (5) LVDS signal pin connected to the LCM side has the following diagram.

R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)

Vcc

Selector (pin45)

R1

R2

5.2 BACKLIGHT UNIT

The pin configuration for the housing and leader wire is shown in the table below.

R3

Preliminary

TCON

LCM si

Housing : 1.CP0404S0000(CviLux)

Pin No. Symbol Description

1 HV High Voltage Pink 2 HV High Voltage White

Note (1) The backlight interface housing for high voltage side is a model 1. CP0404S0000(CviLux).

4 Male Connectors CP0404S0000(CviLux) or Equi valent

Wire Color

1.HV(Pink,+)

2.HV(W hite,-)

1.HV(Pink,+)

2.HV(W hite,-)

1.HV(Pink,+)

2.HV(W hite,-)

1.HV(Pink,+)

2.HV(W hite,-)

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5.3 BLOCK DIAGRAM OF INTERFACE

ER0-ER7

-

DE

OR0-OR7

OG0-OG7

-

PLL

Host

Graphics

Controller

CNF1

ERx0+

-

ERx1+

ERx1-

ERx2+

ERx3+

ERx3-

ECLK+

ORx0+

ORx1+

ORx1-

Preliminary

100

Ө

100pF

100

Ө

100

Ө

100

F

100

Ө

100

Ө

100 100

100

100pF

Ө Ө

100pF

Ө

-

ER0-ER7

-

OR0-OR7

OG0-OG7

-

100

Ө

100

100pF

Ө

-

DCL

Timing

100

Ө

100

100pF

Ө

100pF

-

Controller

ORx2+

ORx3+

ORx3-

OCLK+

PLL

LVDS Transmitter

100

Ө

100 100

100

100pF

Ө Ө

100pF

Ө

100pF

Ө

-

LVDS Rec e i v er

THC63LVDM83A

(LVDF83A)

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ER0~ER7: Even pixel R data

EG0~EG7: Even pixel G data

EB0~EB7: Even pixel B data

OR0~OR7: Odd pixel R data

OG0~OG7: Odd pixel G data

OB0~OB7: Odd pixel B data

DE: Data enable signal

DCLK: Data clock signal

Note (1) The system must have the transmitter to drive the module.

Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is

used differentially.

Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the

second pixel is even pixel.

5.4 LVDS INTERFACE

VESA LVDS formatΚ(SELLVDS pin=H or open)

RXCLK



ORX0



ORX0



ORX1



ORX1



ORX2



ORX2



ORX3



ORX3



ERX0



ERX1



ERX1



ERX2



ERX2



ERX3



ERX3



Current F\FOH

R5G0 R4 R3 R2 R1

B0 G5B1

R5G0 R4 R3 R2 R1

B0 G5B1

G3 G2G4

R0

G1

B2B4 B3B5VS HSDE

R6G6 R7G7B7 B6RSVD

R0

G1

B2B4 B3B5VS HSDE

R6G6 R7G7B7 B6RSVD

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JEDIA LVDS formatΚ(SELLVDS pin=L)



RXCLK

ORX0

ORX1

ORX2

ORX3



ERX0

ERX1

ERX2

ERX3

Current F\FOH

R7G2 R6 R5 R4 R3

B2 G7B3

R7G2 R6 R5 R4 R3

B2 G7B3

Preliminary

R2

G5 G4G6

G3

B4B6 B5B7VS HSDE

R0G0 R1G1B1 B0RSVD

R2

G3

B4B6 B5B7VS HSDE

R0G0 R1G1B1 B0RSVD

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

DCLK : Data clock signal

Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

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5.5 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.

The higher the binary input, the brighter the color. The table below provides the assignment of the color versus data

input.

Data Signal

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

0

Black

Red

Green

Basic

Colors

Gray

Scale

Of

Red

Gray

Scale

Of

Green

Gray

Scale

Of

Blue

Cyan

Magenta

Yellow

White

Red(0) / Dark

Red(1)

Red(2)

:

Red(253)

Red(254)

Red(255)

Green(0) / Dark

Green(1)

Green(2)

:

Green(253)

Green(254)

Green(255)

Blue(0) / Dark

Blue(1)

Blue(2)

:

Blue(253)

Blue(254)

Blue(255)

Note (1) 0: Low Level Voltage, 1: High Level Voltage

0

1

0

1

0

:

1

0

:

0

:

0

Red Green Blue

0

1

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

0

:

1

0

1

0

1

0

:

0

:

1

0

:

0

:

0

1

0

:

0

1

0

:

0

1

0

1

0

1

0

1

0

:

0

1

0

:

0

1

0

1

0

:

1

0

1

0

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

1

0

:

0

1

0

1

0

1

0

:

0

:

0

1

0

:

1

0

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

F

LVDS

Receiver

Clock

LVDS

Receiver

Data

Frequency

clkin

(=1/TC)

Input cycle to

T

clkin_mo

F

rcl

d

cycle jitter

Spread spectrum

modulation range

Spread spectrum

F

modulation frequency

SSM

Setup Time Tlvsu 600

Hold Time Tlvhd 600

60 74.25 80 MHz

Ё Ё

-2%

F

clkin

Ё

200 ps (3)

F

+2% MHz

clkin

200 KHz

Ё Ё

Preliminary

ps

(4)

(5)

Fr5 47 50 53 Hz

Vertical

Active

Frame Rate

57 60 63 Hz

F

r6

Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb

Display

Term

Horizontal

Active

Display Tvd 1080 1080 1080 Th

Blank Tvb 35 45 55 Th

Total Th 1050 1100 1150 Tc Th=Thd+Thb

Display Thd 960 960 960 Tc

Ё

Display

Term

Blank Thb 90 140 190 Tc

Ё

Note (1) Please make sure the range of pixel clock has follow the below equationΚ

Fclkin(max) Fr6 Tv Th

Fr5 Tv Th Fclkin(min)

ѼѼЊ

ЊѼѼ

Note (2) This module is operated in DE only mode and please follow the input signal timing diagram

below

Κ

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Ω L03

Preliminary

INPUT SIGNAL TIMING DIAGRAM

DE

DCLK

DE

T

h

Tvd

Tv

Tvb

Thd

DATA

Valid Display Data (960 clocks)

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI

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Preliminary

Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

1T

14

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

3T

14

5T

14

7T

14

9T

14

11T

14

13T

14

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Preliminary

6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram

below.

0.9V

CC

10ms

50ms

ЉЉЉЉ

T4

0V

0.5

ЉЉЉЉ

T

1

ЉЉЉЉ

T

2

ЉЉЉЉ

T

3

ЉЉЉЉ

0

500ms

0.1V

CC

2

T

LVDS Signals

0V

Power On

VALI D

0

ЉЉЉЉ

T

7

ЉЉЉЉ

T2

T

8

ЉЉЉЉ

T3

T7

0

Option Signals

(SELLVDS)

0.9V

3

T1

T

CC

0.1V

T4

Power Off

8

T

cc

Backlight (Recommended)

500ms

100ms

ЉЉЉЉ

T5

ЉЉЉЉ

T

6

50%

5

T

50%

T

6

Power ON/OFF Sequence

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.

Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become

abnormal screen.

Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If

T2<0,that maybe cause electrical overstress failure.

Note (4) T4 should be measured after the module has been fully discharged between power off and on period.

Note (5) Interface signal shall not be kept at high impedance when the power is on.

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y

(

)

(

)

(2)

(

)

(

)

(4)

(

)

(7)

k

(4)%(5)

(

)

y

(

)

(

)

y

(

)

(

)

y

(

)

y

(72)

(70)

(80)

(70)

(80)

(70)

(80)

(60)

(70)

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Model No.: V260H1

Ω L03

Preliminary

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12.0 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current IL Oscillating Frequency (Inverter) FW

Vertical Frame Rate

Fr 60 Hz

25±2

50±10

7.5 ± 0.5 40 ± 3

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should

be measured under the test conditions described in 7.1 and stable environment shown in Note (6).

Item S

Contrast Ratio CR

Response Time

Center Luminance of White L White Variation Cross Tal

Red

Green Color Chromaticity

Viewing Angle

Blue

White

Color Gamut CG

Horizontal

Vertical

mbol Condition Min. Typ. Max. Unit Note

600

T

R

T

F

320

δW CT

Rx

R Gx G

Bx

B Wx 0.280 W

θ

+

-

θ

+

θ

-

θ

=0°, θY =0°

x

Viewing angle

at normal direction

CR≥10

Typ.

(-0.03)

800

(1.4) (2.2)

(3.6) (5.8)

400

1.3

0.635

0.329

0.268

0.594

0.150

0.065

0.290

Typ.

(+0.03)

o

C

%RH

mA

KHz

-

ms (3)

-

Ta rg et

%NTSC

Deg. (1)

(6)

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Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by Autronic Conoscope Cono-80.

θX- = 90º

x-

6 o’clock

θ

y-

= 90º

y-

Normal

θx = θy = 0º

θy- θy+

θx−

θx+

12 o’clock direction

y+

θ

y+

= 90º

x+

θX+ = 90º

Preliminary

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L255 / L0

L255: Luminance of gray level 255

L 0: Luminance of gray level 0

CR = CR (5),

CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (7).

Note (3) Definition of Response Time (T

Gray Level 255

100%

90%

Optical

Response

10%

0%

R

TR

, TF):

Gray Level 0

T

Gray Level 255

F

ime

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Note (4) Definition of Luminance of White (L

Measure the luminance of gray level 255 at center point and 5 points

LC = L (5)

L (X) is corresponding to the luminance of the point X at the figure in Note (7).

Note (5) Definition of Cross Talk (CT):

CT = | Y

– YA | / YA × 100 (%)

B

Where:

Y

= Luminance of measured location without gray level 0 pattern (cd/m2)

A

= Luminance of measured location with gray level 0 pattern (cd/m2)

Y

B

(0, 0)

Active Area

Y

(D/8,W/2)

A, L

Gray 128

Y

(D/2,7W/8)

A, D

Y

D,W

A, U

A, R

):

C

(D/2,W /8)

(7D/8,W/2)

(D/4,W/4)

(D/8,W/2)

Y

B, L

Y

(D/2,7W/8)

B, D

0, 0

Active Area

Gray 0

Gray 128

Preliminary

Y

(D/2,W /8)

B, U

Y

(7D/8,W/2)

B, R

(3D/4,3W/4)

(D,W)

Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature

change during measuring. In order to stabilize the luminance, the measurement (CS-1000 or

CA-210 calibrated by CS-2000) should be executed after lighting backlight for 1 hour in a windless

room.

LCD Module

LCD Panel

Field of View = 1º

500 mm

CS-2000

Light Shield Room

(Ambient Luminance < 2 lux)

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Note (7) Definition of White Variation (δW):

Measure the luminance of gray level 255 at 5 points.

δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

W

W/4

W/2

3W /4

Vertical Line

Horizontal Line

D

D/4 D/2 3D/4

12

5

34

X

Preliminary

: Test Point

X=1 to 5

Active Area

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Preliminary

8. DEFINITION OF LABELS

8.1 CMO MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

V260H1 -L03 Rev. XX

CHI MEI

OPTOELECTRONICS

X X X X X X X Y M D L N N N N

E207943

MADE IN TAIWAN

GEMN

CHI MEI

OPTOELECTRONICS

V260H1 -L03 Rev. XX

X X X X X X X Y M D L N N N N

E207943

MADE IN TAIWAN

MADE IN CHINA

LEOO(or CAPG or CANO)

RoHS

(a) Model Name: V260H1-L03

(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.

(c) Serial ID: X X

Serial ID includes the information as below:

Day: 1~9, A~Y, for 1

X X X X X Y M D L N N N N

Serial No.

Product Line

Year, Month, Date

CMO Internal Use

Revision

CMO Internal Use

(a) Manufactured Date: Year: 0~9, for 2010~2019

Month: 1~9, A~C, for Jan. ~ Dec.

st

to 31st, exclude I ,O, and U.

(b) Revision Code: Cover all the change

(c) Serial No.: Manufacturing sequence of product

(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.

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9. PACKAGING

9.1 PACKING SPECIFICATIONS

(1) 7 LCD TV modules / 1 Box

(2) Box dimensions : 713(L)x429(W)x453(H)mm

(3) Weight : approximately 28.48 Kg ( 7 modules per box)

9.2 PACKING METHOD

Figures 9-1 and 9-2 are the packing method

LCD TV Module

Anti-Static Bag

Preliminary

2

4

6

Cushion(Bottom)

Carton

Module*7pcs

Cushion(Top)

Carton Label location

1

3

5

7

face to face

Carton Label

Figure.9-1 packing method

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Sea / Land Transportation

(40ft HQ Container)

Sea / Land Transportation

(40ft Container)

Preliminary

Air Transportation

Figure.9-2 Packing method

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10. PRECAUTIONS

10.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) Do not apply rough force such as bending or twisting to the module during assembly.

(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.

The dust and oil may cause electrical short or worsen the polarizer.

(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.

(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

(5) Do not plug in or pull out the I/F connector while the module is in operation.

(6) Do not disassemble the module.

(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and

easily scratched.

(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.

(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD

modules in the specified storage conditions.

(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

10.2 SAFETY PRECAUTIONS

(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling

with the inverter. Do not disassemble the module or insert anything into the backlight unit.

(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

(3) After the module’s end of life, it is not harmful in case of normal operation and storage.

10.3 STORAGE PRECAUTIONS

When storing modules as spares for a long time, the following precaution is necessary.

(1) Do not leave the module in high temperature, and high humidity for a long time.

It is highly recommended to store the module with temperature from 0 to 35

condensation.

(2) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

кat normal humidity without

light.

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11. REGULATORY STANDARDS

11.1

SAFETY

The LCD module should be certified with safety regulations as follows:

Requirement Standard Remark

cUL/CSA

UL60950-1:2006 or Ed.2:2007

UL

UL60065 Ed.7:2007

CAN/CSA C22.2 No.60950-1-03 or 60950-1-07

CAN/CSA C22.2 No.60065-03:2006 + A1:2006

IEC60950-1:2005 / EN60950-1:2006+ A11:2009

CB

IEC60065:2001+ A1:2005 / EN60065:2002 + A1:2006 + A11:2008

Preliminary

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12. MECHANICAL CHARACTERISTICS

Preliminary

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CHI MEI

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