Item Specification Unit Note
Active Area 575.769 (H) x 323.712 (V) (26” Diagonal) mm
Bezel Opening Area 580.8 (H) x 328.8 (V) mm
Driver Element a-si TFT Active Matrix
Pixel Number 1366 x R.G.B. x 768 pixel
Pixel Pitch (Sub Pixel) 0.1405 (H) x 0.4215 (V) mm
Pixel Arrangement RGB Vertical Stripe
Display Colors 16.7M color
Display Operation Mode Transmissive Mode / Normally White Ё
Ё
Ё
(1)
Surface Treatment
Anti-Glare Coating (Haze 25%)
Hard Coating (3H)
Ё
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 625 626 627 mm
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical(V) 372 373 374 mm
Depth(D) 31 32 33 mm To Rear
Depth(D) 45.7 46.7 47.7 mm To Inverter Cover
Weight
Ё
3900
4
Ё
g
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 5
Global LCD Panel Exchange Center
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
www.panelook.com
Value
Min. Max.
NOP
NOP
Ё
Ё
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
Unit Note
50 G (3), (5)
1.0 G (4), (5)
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 500 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10
Storage Range
Temperature (ºC)
5
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
8060-20400 20-40
Version 1.0
www.panelook.com
Page 6
Global LCD Panel Exchange Center
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 13.0 V
Input Signal Voltage VIN -0.3 3.6 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage V
Power Supply Voltage V
Control Signal Level
www.panelook.com
Value
Min. Max.
Te st
Condition
Ta = 25 кЁЁ
W
BL
ЁЁ
Ё
Min.TypeMax.UnitNote
0
-0.3
Ё
Ё
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
Unit Note
(1)
3000V
30 V(1)
7 V(2), (3)
RMS
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional
operation should be restricted to the conditions described under normal operating conditions.
Note (2) No moisture condensation or freezing.
Note (3) The control signals includes Backlight On/Off Control, Internal PWM Control and External PWM
Control.
6
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 7
Global LCD Panel Exchange Center
3. ELECTRICAL CHARACTERISTICS
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
3.1 TFT LCD MODULE
Parameter Symbol
Ta = 25 ± 2 ºC
Value
Min. Typ. Max.
Unit Note
Power Supply Voltage VCC 11.4 12.0 12.6 V (1)
Power Supply Ripple Voltage V
Rush Current I
White
Power Supply Current
Black
Vertical Stripe
LVDS
Interface
Differential Input High
Threshold Voltage
Differential Input Low
Threshold Voltage
Common Input Voltage V
V
V
Terminating Resistor R
CMOS
interface
Input High Threshold Voltage VIH 2.7
Input Low Threshold Voltage V
RP
RUSH
I
CC
+100
LVT H
LVTL
1.125 1.25 1.375 V
LVC
T
ЁЁ
ЁЁ
Ё
Ё
Ё
0.2 0.25 A
0.5 0.55 A
0.4 0.45 A
ЁЁ
ЁЁ
Ё
100
Ё
0
IL
Ё
300 mV
3.0 A (2)
(3)
mV
-100 mV
Ё
ohm
3.3 V
0.7 V
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
+12.0V
R1
200K
Q1 AO4409
FUSE
C3
1uF
Vcc
(LCD Module Input)
(Low to High)
(Control Signal)
SW
GND
VR1
47K
R2
1K
Q2
2N7002
Vcc rising time is 470us
0.9Vcc
0.1Vcc
470us
C1
10uF
+12V
7
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 8
Global LCD Panel Exchange Center
(1)
(1)
Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
Operating Frequency FO 40 - 80
Lamp Life Time LBL 50,000 -
W
L
S
Min. Typ. Max.
-1380-
7.07.58.0
- -
- -
Value
1657
1593
R
G
G
B
G
B
Ta = 25 ± 2 ºC)
V
mA
V
V
KHz (2)
B
R
G
B
Unit Note
RMS
RMS
RMS
RMS
Hrs (3)
IL = 7.5mA
, Ta = 0 ºC
, Ta = 25 ºC
-
8
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 9
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
3.2.2 INVERTER CHARACTERISTICS (
Parameter Symbol
Power Consumption P
Input Voltage VBL 22.8
Input Current I
Input Inrush Current
BL
BL
ЁЁЁ
Ta = 25 ± 2 ºC)
Value
Min. Typ. Max.
Ё
Ё
TBD
24
TBD
Ё
25.2V
Ё
TBD A
Input Ripple Noise Ё- ЁЁ912 mV
Oscillating FrequencyFW 63 66 69 kHz
Dimming Frequency FB 150 160 170 Hz
Minimum Duty Ratio D
MIN
Ё
20
Ё
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
A
A
HV (Pink)
HV (White)
1
2
Unit Note
W (5), I
DC
= 7.5mA
L
A Non Dimming
V
peak
P-P
=24.0V
BL
VBL =22.8V
%
HV (Pink)
HV (White)
HV (Pink)
HV (White)
HV (Pink)
HV (White)
HV (Pink)
HV (White)
1
2
1
2
1
2
1
2
Inverter
LCD
Module
A
A
A
A
A
A
A
A
Note (2) The lamp starting voltage VS should be applied to the lamp for more than 1 second under starting
up duration. Otherwise the lamp could not be lighted on completed.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
9
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 10
Global LCD Panel Exchange Center
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value
and the effective discharge length is longer than 80% of its original length (Effective discharge
length is defined as an area that has equal to or more than 70% brightness compared to the
brightness at the center point.) as the time in which it continues to operate under the condition Ta
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
= 25 2к and I
= 7.0~ 8.0mA
L
RMS
.
Note (5) The measurement condition of Typ. value is based on 26" backlight unit under input voltage 24V,
average lamp current 7.5 mA and lighting 30 minutes later.
Note (6) 10% minimum duty ratio is only valid for electrical operation.
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
Item Symbol
Error Signal ERR
On/Off Control
Voltage
Internal PWM
Control Voltage
External PWM
Control Voltage
ON
V
BLON
OFF
MAX3.0 3.153.3 V Maximum Duty Ratio
V
IPWM
MIN
HI 2.0
V
EPWM
LO
VBL Rising Time Tr1 Ё 30 ЁЁ ms
VBL Falling Time Tf1 Ё 30 ЁЁ ms
Te st
Min.Typ.Max.Unit Note
Condition
ЁЁЁЁЁ
Ё
Ё
2.0
0
Ё
Ё
5.0 V
0.8 V
Ё
Ё
Ё
0
0
Ё
Ё
Ё
5.0 V Duty On
0.8 V Duty Off
(Note 1)
V Minimum Duty Ratio
Control Signal Rising TimeT
Control Signal Falling TimeT
PWM Signal Rising TimeT
PWM Signal Falling TimeT
PW MR
PW MF
Input Impedance R
PWM Delay Time T
T
BLON Delay Time
T
BLON Off Time T
r
f
IN
100 Ё ms
PW M
on
on1
off
ЁЁЁ 100 ms
ЁЁЁ 100 ms
ЁЁЁ 50 us
ЁЁЁ 50 us
Ё 1 Ё
Ё
MӨ
Ё 300 ЁЁ ms
Ё 300 ЁЁ ms
Ё 300 ЁЁ ms
Note (1) When inverter protective function is triggered, ERR will output open collector status. In normal
operation, the signal of ERR will output a low level voltage.
Note (2) The power sequence and control signal timing are shown in the following figure. For a certain
reason, the inverter has a possibility to be damaged with wrong power sequence and control
signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions:
Turn ON sequence: VBL
Ш
PWM signal Ш BLON
Turn OFF sequence: BLOFF
Ш
PWM signal Ш VBL
10
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 11
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
V
V
V
BL
V
BLON
EPWM
IPWM
˃ˁˌ˩
Toff
˕˟
Tf1
˃ˁ˄˩
˕˟
Tr1
˃ˁˌ˩
˕˟
˃ˁ˄˩
˕˟
2.0V
0.8V
Ton
Ton1
0
0
Backlight on duration
Tr
Tf
Ext. Dimming Function
T
PWMR
2.0V
0
0.8V
T
PWM
T
PWMF
Floating
3.3V
0
Floating
Int. Dimming Function
V
W
External
PWM
Period
External
PWM Duty
100%
Minimun
Duty
11
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 12
Global LCD Panel Exchange Center
(+/
)
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
SCAN DRIVER IC
RX0(+/-)
RX1(+/-)
RX2(+/-)
RX3(+/-)
RXCLK
Vcc
GND
GND
ERR
BLON
I_PWM
E_PWM
VBL
-
CN1
INPUT CONNECTOR
(FCI,10041195-001)
TIMING
CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
INVERTER CONNECTOR
CN1: CI0114M1HR0-LA (CviLux)
or equivalent
TFT LCD PANEL
DATA DRIVER IC
CN2-CN5:
CP042CP1MR0-LF (CviLux)
or equivalent
(1366x3x768)
BACKLIGHT
UNIT
12
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 13
Global LCD Panel Exchange Center
y
(2)
(2)
(2)
g
g
(2)
(3)
(2)
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
CN1 Connector Pin Assignment
Pin No.S
1NC No connection
2NC No connection
3NC No connection
4GND Ground
5RX0- Ne
6RX0+ Positive transmission data of pixel 0
7GND Ground
8RX1- Ne
9RX1+ Positive transmission data of pixel 1
10GND Ground
11RX2- Negative transmission data of pixel 2
12RX2+ Positive transmission data of pixel 2
13GND Ground
14RXCLK- Negative of clock
15RXCLK+ Positive of clock
16GND Ground
17RX3- Negative transmission data of pixel 3
18RX3+ Positive transmission data of pixel 3
19GND Ground
20NC No connection
21SELLVDS Select LVDS data format
22NC No connection
23GND Ground
24GND Ground
25GND Ground
26VCC Power supply: +12V
27VCCPower supply: +12V
28VCCPower supply: +12V
29VCCPower supply: +12V
30VCCPower supply: +12V
Note (1) Connector Part No.: FCI,10041195-001 or compatible
mbolDescriptionNote
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
ative transmission data of pixel 0
ative transmission data of pixel 1
Note (2) Reserved for internal use. Please leave it open.
Note (3) High or OPEN: Normal, Ground: JEIDA LVDS format
Please refer to 5.5 LVDS INTERFACE (Page 18)
13
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 14
Global LCD Panel Exchange Center
5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
CN2-CN5 (Housing) : 1.CP0404S0000(CviLux)
Pin No. Symbol Description
1 HV High Voltage Pink
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model 1. CP0404S0000(CviLux). The
mating header on inverter part number is 1.CP042CP1MRO-LF(CviLux).
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
Wire Color
5 Male Connectors
CP0404S0000(CviLux)
or Equi valent
1.HV(Pink,+)
2.HV(W hite,-)
1.HV(Pink,+)
2.HV(W hite,-)
1.HV(Pink,+)
2.HV(W hite,-)
1.HV(Pink,+)
2.HV(W hite,-)
14
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 15
Global LCD Panel Exchange Center
5.3 INVERTER UNIT
CN1 : CI0114M1HR0-LA (CviLux) or equivalent.
Pin No. Symbol Description
1
2
3
4
5
6
7
8
9
10
11 ERR
12 BLON BL ON/OFF
13 I_PWM Internal PWM Control
14 E_PWM External PWM Control
Note (1) PIN 13:Intermal PWM Control (Use Pin 13): Pin 14 must open.
Note (2) PIN 14:External PWM Control (Use Pin 14): Pin 13 must open.
Note (3) Pin 13(I_PWM) and Pin 14(E_PWM) can’t open in same period.
VBL +24V Power input
GND Ground
Normal (GND)
Abnormal(Open collector)
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
CN2-CN5 : CP042CP1MR0-LF (CviLux) or equivalent.
Pin Name Description
1
2
CCFL HOT
CCFL HOT
CCFL High Voltage
CCFL High Voltage
15
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 16
Global LCD Panel Exchange Center
p
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
5.4 BLOCK DIAGRAM OF INTERFACE
R0-R7
-
B0-B7
DE
CN1
Rx0+
-
Rx1+
Rx1-
Rx2+
Rx2-
Rx3+
Rx3-
Preliminary
51Ө
100pF
51Ө
51Ө
F
100
51Ө
51Ө
100pF
51Ө
51Ө
100pF
51Ө
RxOUT
R0-R7
G0-G7
B0-B7
DE
Host
Graphics
Controller
CLK+
CLK-
51Ө
51Ө
100pF
DCLK
Timing
Controller
LVDS Transmitter
THC63LVDM83A
LVDS Receiver
THC63LVDF84A
(LVDF83A)
R0~R7 : Pixel R Data
G0~G7 : Pixel G Data
B0~B7 : Pixel B Data
DE : Data Enable Signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
16
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 17
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
5.5 LVDS INTERFACE
SELLVDS = H or Open (VESA)
Preliminary
SELLVDS = L (JEIDA)
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
Notes(1) RSVD(reserved)pins on the transmitter shall be “H” or “L”.
17
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!
Version 1.0
www.panelook.com
Page 18
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: 12, Dec 2008
Model No.: V260B2 – L04
Preliminary
5.6 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of