CMO V260B1-L08 Specification

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Issued Date: 10, Aug 2007

Model No.: V260B1 - L08

TFT LCD Approval Specification

MODEL NO.: V260B1 - L08

Customer :

Approved by :

Tentative

Customer :

Approved by :

Note :

TV Head Division

Approved By

LY Ch en

Reviewed By

Prepared By

LCD TV Marketing and Product Management Div.

QRA Dept. Product Development Div.

Tom y C hen W T Lin

Denise Shieh Delia Lin

1

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CONTENTS -

REVISION HISTORY

1. GENERAL DESCRIPTION

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

2.2.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

3.2 BACKLIGHT INVERTER UNIT

3.2.1 CCFL(Cold Cathode Fluorescent Lamp) CHARACTERISTICS

3.2.2 INVERTER CHARACTERISTICS

3.2.3 INVERTER INTERTFACE CHARACTERISTICS

4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

5. INTERFACE PIN CONNECTION

5.1 TFT LCD MODULE

5.2 BACKLIGHT UNIT

5.3 INVERTER UNIT

5.4 BLOCK DIAGRAM OF INTERFACE

5.5 LVDS INTERFACE

5.6 COLOR DATA INPUT ASSIGNMENT

6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

7.2 OPTICAL SPECIFICATIONS

8. PRECAUTIONS

10.1 ASSEMBLY AND HANDLING PRECAUTIONS

10.2 SAFETY PRECAUTIONS

10.3 STORAGE PRECAUTIONS

9. MECHANICAL CHARACTERISTICS

-------------------------------------------------------

Tentative

3

4

5

7

12

13

19

22

26

27

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Version Date

Ver 0.0 10, Aug ’07

Page

(New)

All

REVISION HISTORY

Section Description

All

Tentative Specification was first issued.

Tentative

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

V260B1- L08 is a TFT Liquid Crystal Display module with 12-CCFL Backlight unit and 1ch-LVDS

interface. The display diagonal is 26”. This module supports 1366 x 768 WXGA format and can display

16.2M colors (6-bit+FRC colors). The inverter module for backlight is built-in.

1.2 FEATURES

- Excellent Brightness 500nits

- Contrast Ratio 800:1

- Fast Response Time (8ms)

- Color Saturation NTSC 72%

- WXGA (1366 x 768 pixels) Resolution

- DE (Data Enable) Only Mode

- LVDS (Low Voltage Differential Signaling) Interface

- Viewing Angle: 160(H)/150(V) (CR>10) TN Technology

Tentative

-Color Reproduction (Nature Color)

- RoHS Compliance

1.3 APPLICATION

- TFT LCD TVs

- High Brightness, Multi-Media Displays

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note Active Area 575.769 (H) x 323.712 (V) (26” Diagonal) mm Bezel Opening Area 580.8 (H) x 328.8 (V) mm Driver Element a-si TFT Active Matrix Pixel Number 1366 x R.G.B. x 768 pixel Pixel Pitch (Sub Pixel) 0.1405 (H) x 0.4215 (V) mm Pixel Arrangement RGB Vertical Stripe Display Colors 16.2M color

Display Operation Mode Transmissive Mode / Normally White Ё

Surface Treatment

Anti-Glare Coating (Haze 25%)

Hard Coating (3H)

Ё

(1)

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal(H) 625 626 627 mm

Module Size

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

Vertical(V) 372 373 374 mm Depth(D) 35.6 36.6 37.6 mm To PCB Cover Depth(D) 42.6 43.6 44.6 mm To Inverter Cover

Weight

Ё

4500

4

Ё

g

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Tentative

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S

Vibration (Non-Operating) V

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The maximum operating temperature is based on the test condition that the surface temperature of

display area is less than or equal to 60 ºC with LCD module alone in a temperature controlled chamber.

Thermal management should be considered in final product design to prevent the surface temperature of

display area from being over 60 ºC. The range of operating temperature may degrade in case of improper

Љ 40 ºC).

NOP

Min. Max.

Ё Ё

Value

Unit Note

50 G (3), (5)

1.0 G (4), (5)

thermal management in final product design.

Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.

Note (4) 10 ~ 500 Hz, 10 min, 1 time each X, Y, Z.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough

so that the module would not be twisted or bent by the fixture.

Relative Humidity (%RH)

100

90

80

60

Operating Range

40

20

10

Storage Range

Temperature (ºC)

5

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Tentative

2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE

Item Symbol

Power Supply Voltage Vcc -0.3 13.0 V Input Signal Voltage VIN -0.3 3.6 V

Min. Max.

2.2.2 BACKLIGHT UNIT

Item Symbol

Lamp Voltage VW

Power Supply Voltage VBL

Control Signal Level

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional

operation should be restricted to the conditions described under normal operating conditions.

Note (2) No moisture condensation or freezing.

Condition

Ta = 25

Ё Ё

Value

Te st

к Ё Ё

Ё

Unit Note

(1)

Min. Type Max. Unit Note

0

-0.3

Ё Ё

3000 V

30 V

7 V

RMS

(1)

(1), (3)

Note (3) The control signals includes Backlight On/Off Control, Internal PWM Control and External PWM

Control.

6

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Tentative

3. ELECTRICAL CHARACTERISTICS

3.1 TFT LCD MODULE

Parameter Symbol

Power Supply Voltage VCC 11.4 12.0 12.6 V (1) Power Supply Ripple Voltage VRP Rush Current I

White

Power Supply Current

Differential Input High

LVDS Interface

Threshold Voltage Differential Input Low Threshold Voltage Common Input Voltage V Terminating Resistor R

CMOS interface

Input High Threshold Voltage VIH 2.7 Input Low Threshold Voltage V

Note (1) The module should be always operated within above ranges.

Black Vertical Stripe

Ta = 25 ± 2 ºC

Value

Min. Typ. Max.

Ё Ё

RUSH

ICC

V

LVT H

-100

V

LVTL

1.125 1.25 1.375 V

LVC

T

Ё Ё Ё Ё Ё

0.2

0.5

0.4

Ё Ё

Ё

100

Ё

0

IL

Ё

300 mV

3.0 A (2)

Ё Ё Ё

+100 mV

Ё

3.3 V

0.7 V

Unit Note

A A A

mV

ohm

(3)

Note (2) Measurement Conditions:

+12.0V

R1

200K

(Low to High)

(Control Signal)

SW

R2

1K

Vcc rising time is 470us

Q1 AO4409

2N7002

Q2

47K

VR1

C1

10uF

+12V

FUSE

C3

1uF

Vcc

(LCD Module Input)

0.9Vcc

0.1Vcc

GND

470us

7

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Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60

Hz, whereas a power dissipation check pattern below is displayed.

a. White Pattern

Active Area

c. Vertical Stripe Pattern

b. Black Pattern

Active Area

Tentative

Active Area

3.2 BACKLIGHT INVERTER UNIT

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (

Parameter Symbol

Lamp Voltage VW

Lamp Current IL

Lamp Starting Voltage VS

Operating Frequency FO 40

Lamp Life Time LBL

Min. Typ. Max.

Ё

4.5 5.0 5.5

Ё Ё

50,000 60,000

Value

970

Ё

R

B

R

B

R R

Ё

1550

1400

80 KHz (3)

Ё

R

G

B

G

B

G

B

G

B

Ta = 25 ± 2 ºC)

V

mA

V

B

R

G

B

R

G

B

R

G

B

Unit Note

I

RMS

(2), Ta = 0 ºC

RMS

(2), Ta = 25 ºC

RMS

Hrs (4)

= 5.0mA

L

(1)

8

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3.2.2 INVERTER CHARACTERISTICS (

Parameter Symbol

Power Consumption PBL

Input Voltage VBL 22.8

Input Current IBL

Input Inrush Current

Ё Ё Ё

Ta = 25 ± 2 ºC)

Value

Min. Typ. Max.

Ё

66 69 W (5)(6), I

24

2.75

25.2

Ё

4.3 A

Input Ripple Noise Ё- Ё Ё 864 mV

Oscillating Frequency FW 55 58 61 kHz

Dimming Frequency FB 150 160 170 Hz

Minimum Duty Ratio D

MIN

Ё

20

Ё

Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:

A

LCD Module

A

HV (Pink)

HV (White)

HV (Pink)

HV (White)

HV (Pink)

HV (White)

HV (Pink)

HV (White)

HV (Pink)

HV (White)

1

2

1

2

1

2

1

2

1

2

Tentative

Unit Note

= 5.0mA

L

V

DC

A Non Dimming

V

peak

P-P

%

Inverter

=24.0V

BL

VBL =22.8V

A

LV (Black+)

LV (White,-)

HV (Pink)

HV (White)

1

2

Note (2) The lamp starting voltage V

should be applied to the lamp for more than 1 second under starting

S

up duration. Otherwise the lamp could not be lighted on completed.

Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value

9

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and the effective discharge length is longer than 80% of its original length (Effective discharge

length is defined as an area that has equal to or more than 70% brightness compared to the

brightness at the center point.) as the time in which it continues to operate under the condition Ta

= 25

2к and I

= 4.5~ 5.5mA

L

RMS

.

Note (5) The power supply capacity should be higher than the total inverter power consumption P

the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current

changed as PWM duty on and off. The transient response of power supply should be considered

for the changing loading when inverter dimming.

Note (6) The measurement of Max. value is based on 26” backlight unit under 24V input voltage and 5.3mA

lamp in average after lighting for 30 minutes.

3.2.3 INVERTER INTERTFACE CHARACTERISTICS

Item Symbol

Error Signal ERR

Te st

Min. Typ. Max. Unit Note

Condition

Ё Ё Ё Ё Ё

(Note 1)

Tentative

. Since

BL

On/Off Control

Voltage

Internal PWM

Control Voltage

External PWM

Control Voltage

ON

V

BLON

OFF

MAX 3.0 3.15 3.3 V Maximum Duty Ratio

V

IPWM

Ё

MIN

HI 2.0

V

EPWM

Ё

LO

2.0

0

Ё

0

Ё

0

Ё

5.0 V

0.8 V

Ё

V Minimum Duty Ratio

5.0 V Duty On

0.8 V Duty Off

VBL Rising Time Tr1 Ё 30 Ё 50 ms

VBL Falling Time Tf1 Ё 30 Ё 50 ms

Control Signal Rising Time Tr Ё Ё Ё 100 ms

Control Signal Falling Time Tf Ё Ё Ё 100 ms

PWM Signal Rising Time T

PWM Signal Falling Time T

Ё Ё Ё 50 us

PW MR

Ё Ё Ё 50 us

PW MF

Input Impedance RIN Ё 1 Ё Ё MӨ

PWM Delay Time T

100 300 ms

PW M

BLON Delay Time Ton Ё 300 Ё 500 ms

BLON Off Time T

Ё 300 Ё 500 ms

off

Note (1) The power sequence and control signal timing as shown in following figure.

Note (2) When inverter protective function is triggered, ERR will output open collector status. In normal

operation, the signal of ERR will output a low level voltage.

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V

BL

V

BLON

EPWM

IPWM

Tentative

Tr1

2.0V

0.8V

2.0V

0.8V

3.3V

Ton

Backlight on duration

Tr

Ext. Dimming Function

T

PWMR

PWM

T

Floating

T

Tf

PWMF

Floating

Int. Dimming Function

0

Tf1

Toff

V

W

External

PWM

Period

External

PWM Duty

100%

Minimun

Duty

11

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4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

RX0(+/-)

RX1(+/-)

RX2(+/-)

RX3(+/-)

RXCLK

-

Vcc

GND

INPUT CONNECTOR

(JAE,FI-X30SSL-HF)

CN1

VBL

GND

ERR

BLON

I_PWM

E_PWM

S14B-PHA-SM-TB (D)(LF)(SN)(JST)

TIMING

CONTROLLER

DC/DC CONVERTER &

REFERENCE VOLTAGE

INVERTER CONNECTOR

CN1 :

CN3-CN8 :

SM02 (8.0) B-BDBS-1-TB-LF (JST)

CN2 : CI1502M1HR0-LF (CviLux)

Tentative

SCAN DRIVER IC

TFT LCD PANEL

(1366x3x768)

DATA DRIVER IC

BACKLIGHT

UNIT

12

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y

(2)

(3)

k

(3)

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5. INTERFACE PIN CONNECTION

5.1 TFT LCD MODULE

CNF1 Connector Pin Assignment

Pin No. S

1 VCC Power supply: +12V 2 VCC Power supply: +12V 3 VCC Power supply: +12V 4 VCC Power supply: +12V 5 GND Ground 6 GND Ground 7 GND Ground 8 GND Ground

9 SELLVDS Select LVDS data format 10 NC No connection 11 GND Ground 12 RX0- Negative transmission data of pixel 0 13 RX0+ Positive transmission data of pixel 0 14 GND Ground 15 RX1- Negative transmission data of pixel 1 16 RX1+ Positive transmission data of pixel 1 17 GND Ground 18 RX2- Negative transmission data of pixel 2 19 RX2+ Positive transmission data of pixel 2 20 GND Ground 21 RXCLK- Negative of cloc 22 RXCLK+ Positive of cloc 23 GND Ground 24 RX3- Negative transmission data of pixel 3 25 RX3+ Positive transmission data of pixel 3 26 GND Ground 27 NC No connection 28 NC No connection 29 GND Ground 30 GND Ground

Note (1) Connector Part No.: JAE,FI-X30SSL-HF or compatible

mbol Description Note

Tentative

Note (2) Ground or OPEN: Normal, High: JEIDA LVDS format

Please refer to 5.5 LVDS INTERFACE (Page 17)

Note (3) Reserved for internal use. Please leave it open.

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and leader wire is shown in the table below.

CN3-CN8 (Housing) : BDBR-03(4.0)V-1S (JST)

Pin No. Symbol Description

Wire Color 1 HV High Voltage Pink 2 HV High Voltage White

Note (1) The backlight interface housing for high voltage side is a model BDBR-03 (4.0)V-1S (JST). The mating

header on inverter part number is SM 02(8.0) B-BDBS-1-TB-LF(JST).

CN2 (Housing) : CI1502S0000 (CviLux)

Pin No. Symbol Description

Wire Color 1 LV Low Voltage (+) Black 2 LV Low Voltage (-) White

Note (2) The backlight interface housing and return cable for low voltage side is a model CI1502S0000,

manufactured by CviLux. The mating header on inverter part number is CI1502M1HR0-LF (CviLux).

8 Female Connectors

BDBR-03(4.0)V-1S or BHR-03VS-1

or Equi valent

1.HV(Pink,+)

2.HV(White,+)

Tentative

1.HV(Pink,-)

2.HV(White,-)

1.HV(Pink,+)

2.HV(White,+)

1.HV(Pink,-)

2.HV(White,-)

1.HV(Pink,+)

2.HV(White,+)

1.HV(Pink,-)

2.HV(White,-)

ZHR-2 or Equal Return Cable

1.LV(Black)

2.LV(White)

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5.3 INVERTER UNIT

CN1 (Header) : S14B -PHA-SM-TB(D)(LF)(SN)(JST)

Pin No. Symbol Description

1 2 3 4 5 6 7 8 9

10

11 ERR

12 BLON BL ON/OFF 13 I_PWM Internal PWM Control 14 E_PWM External PWM Control

Notice:

#PIN 13:Analog Dimming Control (Use Pin 13) : 0V~3.3V and Pin 14 must open.

VBL +24V Power input

GND Ground

Normal (GND) Abnormal(Open collector)

Tentative

#PIN 14:PWM Dimming Control (Use Pin 14) : Pin 13 must open.

#Pin 13 (I_PWM) and Pin 14 (E_PWM) can not open in same period.

CN2 (Header) : CI1502M1HR0-LF (CviLux)

Pin No. Symbol Description

1

2

CN3-CN8 (Header) : SM02 (8.0) B-BDBS-1-TB-LF (JST)

Pin Name Description

1

2

CCFL COLD

CCFL HOT

CCFL Low Voltage (+)

CCFL Low Voltage (-)

CCFL High Voltage

15

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5.4 BLOCK DIAGRAM OF INTERFACE

R0-R7

-

B0-B7

DE

Host

Graphics

Controller

LVDS Transmitter

THC63LVDM83A

(LVDF83A)

CNF1

Rx0+

-

Rx1+

Rx1-

Rx2+

Rx2-

Rx3+

Rx3-

CLK+

CLK-

51

Ө

100pF

51

Ө

51

Ө

51

51 51

51

100pF

Ө

100pF

Ө Ө

100pF

Ө

100pF

Ө

LVDS Receiver

THC63LVDF84A

RxOUT

R0-R7

G0-G7

B0-B7

DE

DCLK

Timing

Controller

Tentative

R0~R7 : Pixel R Data

G0~G7 : Pixel G Data

B0~B7 : Pixel B Data

DE : Data Enable Signal

Note (1) The system must have the transmitter to drive the module.

Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is

used differentially.

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5.5 LVDS INTERFACE

SIGNAL

24

bit

SELLVD=

L or OPEN

R0

R1

R2

R3

R4

R5

G0

G1

G2

G3

G4

G5

B0

B1

B2

B3

B4

B5

DE

R6

R7

G6

G7

B6

B7

RSVD 1

RSVD 2

RSVD 3

DCLK 31 TxCLK IN TxCLK OUT+

SELLVDS

=H

R2

R3

R4

R5

R6

R7

G2

G3

G4

G5

G6

G7

B2

B3

B4

B5

B6

B7

DE

R0

R1

G0

G1

B0

B1

RSVD 1

RSVD 2

RSVD 3

TRANSMITTER

THC63LVDM83A

PIN INPUT Host TFT-LCD PIN OUTPUT

51

52

54

55

56

3

4

6

7

11

12

14

15

19

20

22

23

24

30

50

2

8

10

16

18

25

27

28

TxIN0

TxIN1

TxIN2

TxIN3

TxIN4

TxIN6

TxIN7

TxIN8

TxIN9

TxIN12

TxIN13

TxIN14

TxIN15

TxIN18

TxIN19

TxIN20

TxIN21

TxIN22

TxIN26

TxIN27

TxIN5

TxIN10

TxIN11

TxIN16

TxIN17

TxIN23

TxIN24

TxIN25

INTERFACE

CONNECTOR

TA OUT0+

TA OUT0-

TA OUT1+

TA OUT1-

TA OUT2+

TA OUT2-

TA OUT3+

TA OUT3-

TxCLK OUT-

Rx 0+

Rx 0-

Rx 1+

Rx 1-

Rx 2+

Rx 2-

Rx 3+

Rx 3-

RxCLK IN+

RxCLK IN-

RECEIVER

THC63LVDF84A

Rx OUT0

27

Rx OUT1

29

Rx OUT2

30

Rx OUT3

32

Rx OUT4

33

Rx OUT6

35

Rx OUT7

37

Rx OUT8

38

Rx OUT9

39

Rx OUT12

43

Rx OUT13

45

Rx OUT14

46

Rx OUT15

47

Rx OUT18

51

Rx OUT19

53

Rx OUT20

54

Rx OUT21

55

Rx OUT22

1

Rx OUT26

6

Rx OUT27

7

Rx OUT5

34

Rx OUT10

41

Rx OUT11

42

Rx OUT16

49

Rx OUT17

50

Rx OUT23

2

Rx OUT24

3

Rx OUT25

5

26 RxCLK OUT DCLK

Tentative

TFT CONTROL

INPUT

SELLVD=

L or OPEN

R0

R1

R2

R3

R4

R5

G0

G1

G2

G3

G4

G5

B0

B1

B2

B3

B4

B5

DE

R6

R7

G6

G7

B6

B7

NC

SELLVDS

=H

R2

R3

R4

R5

R6

R7

G2

G3

G4

G5

G6

G7

B2

B3

B4

B5

B6

B7

DE

R0

R1

G0

G1

B0

B1

NC

R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)

B0~B7: Pixel B Data (7; MSB, 0; LSB)

DE : Data enable signal

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Notes(1) RSVD(reserved)pins on the transmitter shall be “H” or “L”.

5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of

color versus data input.

Data Signal

Color

R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

0

Black

Red

Green

Basic

Colors

Gray

Scale

Of

Red

Gray

Scale

Of

Green

Gray

Scale

Of

Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue

Cyan

Magenta

Yellow

White

Red(0) / Dark

Red(1)

Red(2)

:

Red(253)

Red(254)

Red(255)

Green(0) / Dark

Green(1)

Green(2)

:

Green(253)

Green(254)

Green(255)

Blue(0) / Dark

Blue(1)

Blue(2)

:

Blue(253)

Blue(254)

Blue(255)

0

1

0

1

0

:

1

0

:

0

:

0

Red Green Blue

0

1

0

1

0

1

0

1

0

1

0

:

0

1

0

1

0

1

0

1

0

:

1

0

1

0

1

0

:

0

:

1

0

:

0

:

0

1

0

:

0

1

0

:

0

1

0

1

0

1

0

1

0

:

0

1

0

:

0

1

0

1

0

:

1

0

1

0

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

:

1

0

1

0

1

0

:

0

:

0

1

0

1

0

:

1

0

1

0

1

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6. INTERFACE TIMING

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

nal Item Symbol Min. Typ. Max. Unit Note

Si

Frequenc

LVDS Receiver Clock

LVDS Receiver Data

Vertical Active Display Term

Horizontal Active Display Term

Note (1) Since this module is operated in DE only mode, Hsync and Vsync input signals should be set to

Input cycle to

cycle jitter

Setup Time Tlvsu 600 Hold Time Tlvhd 600

Frame Rate

Total Tv

Display Tvd

Blank Tvb 1038 120 Th Tota l T h

Display Thd Blank Thb 76194 570 Tc -

1/Tc 60 76 82 MH

Trcl

Fr

5

Fr

6

Ё

47 50 53 Hz 57 60 63 Hz

778

768

1442

1366

Ё

Ё Ё Ё Ё

806 888 Th Tv=Tvd+Tvb

768 768 Th -

1560 1936 Tc Th=Thd+Thb

1366 1366 Tc -

200 ps

ps ps

Z

Tentative

low logic level. Otherwise, this module would operate abnormally.

INPUT SIGNAL TIMING DIAGRAM

DE

DCLK

DE

T

h

Tvd

Tv

Tvb

Thd

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Valid Display Data (1366 clocks)

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RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

1T

14

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

3T

14

5T

14

7T

14

9T

14

11T

14

13T

14

Tentative

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6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the

diagram below.

CC

Power Supply

V

0.5ЉT

0

1s

CC

1

Љ

10 ms

Љ

T

2

Љ

50 ms

Љ

T

3

Љ

50 ms

Љ

T4

Signals

0.9 V

CC

0V

0.1V

CC

3

T1

T

2

T

VALI D

0V

Power On

Power Off

0.9 V

0.1Vcc

T4

Backlight (Recommended)

Љ

500 ms

100 msЉT

T5

6

50%

5

T

50%

T

6

Power ON/OFF Sequence

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.

Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD

operation or the LCD turns off before the backlight turns off, the display may momentarily become

abnormal screen.

Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance.

Note (4) T4 should be measured after the module has been fully discharged between power off and on period.

Note (5) Interface signal shall not be kept at high impedance when the power is on.

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y

(

)

(2)

(

)

(4)

(

)

(7)

k

(4)%(5)

(

)

y

(

)

(

)

y

(

)

(

)

y

(

)

(

)

y

(

)

(72)

(80)

(70)

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7. OPTICAL CHARACTERISTICS

7.1 TEST CONDITIONS

Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 12.0 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current IL Oscillating Frequency (Inverter) FW

Vertical Frame Rate

Fr 60 Hz

25±2

50±10

5.0 ± 0.5 58 ± 3

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be

measured under the test conditions described in 7.1 and stable environment shown in Note (6).

Item S

Contrast Ratio CR

Response Time

Center Luminance of White L White Variation Cross Tal

Red

Green Color Chromaticity

Viewing Angle

Blue

White

Color Gamut CG

Horizontal

Vertical

mbol Condition Min. Typ. Max. Unit Note

800

T

δW CT

Rx

R Gx G

Bx

B Wx W

θ

R

F

=0°, θY =0°

θ

x

Viewing Angle at

Normal Direction

+

-

CR≥10

(3)

(5)

500

1.3

0.634

0.331

0.266

Typ.

-0.03

0.595

0.150

0.059

0.280

0.285

Typ.

+0.03

o

C

%RH

mA

KHz

-

ms (3)

-

Ta rg et

%NTSC

Deg. (1)

(6)

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Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by EZ-Contrast 160R (Eldim)

θX- = 90º

x-

6 o’clock

θ

y-

= 90º

y-

Normal

θx = θy = 0º

θy- θy+

θx−

θx+

y+

12 o’clock direction

θ

y+

= 90º

x+

θX+ = 90º

Tentative

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L255 / L0

L255: Luminance of gray level 255

L 0: Luminance of gray level 0

CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note

(7).

Note (3) Definition of Response Time (T

Gray Level 255

100%

90%

Optical

Response

10%

0%

TR

, TF):

R

Gray Level 0

T

Gray Level 255

F

ime

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Note (4) Definition of Luminance of White (LC):

Measure the luminance of gray level 255 at center point and 5 points

LC = L (5), where L (X) is corresponding to the luminance of the point X at the figure in Note (7).

Note (5) Definition of Cross Talk (CT):

CT = | Y

– YA | / YA × 100 (%)

B

Where:

Y

= Luminance of measured location without gray level 0 pattern (cd/m2)

A

Y

= Luminance of measured location with gray level 0 pattern (cd/m2)

B

(0, 0)

Active Area

Y

(D/8,W/2)

A, L

Gray 128

Y

(D/2,7W/8)

A, D

Y

D,W

A, U

A, R

(D/2,W /8)

(7D/8,W/2)

(D/4,W/4)

(D/8,W/2)

Y

B, L

Y

(D/2,7W/8)

B, D

0, 0

Active Area

Gray 0

Gray 128

Tentative

Y

(D/2,W /8)

B, U

Y

(7D/8,W/2)

B, R

(3D/4,3W/4)

(D,W)

Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature

change during measuring. In order to stabilize the luminance, the measurement should be

executed after lighting Backlight for 1 hour in a windless room.

LCD Module

LCD Panel

Center of the Screen

Display Color Analyzer

(Minolta CA210)

Light Shield Room

(Ambient Luminance < 2 lux)

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Note (7) Definition of White Variation (δW):

Measure the luminance of gray level 255 at 5 points

δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

W

W/4

W/2

3W /4

Vertical Line

Horizontal Line

D

D/4 D/2 3D/4

12

: Test Point

5

34

X

X=1 to 5

Tentative

Active Area

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8. PRECAUTIONS

8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) Do not apply rough force such as bending or twisting to the module during assembly.

(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.

The dust and oil may cause electrical short or worsen the polarizer.

(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.

(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the

damage and latch-up of the CMOS LSI chips.

(5) Do not plug in or pull out the I/F connector while the module is in operation.

(6) Do not disassemble the module.

(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and

easily scratched.

(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.

(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD

modules in the specified storage conditions.

(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the

response time will become slow, and the starting voltage of CCFL will be higher than that of room

temperature.

8.2 SAFETY PRECAUTIONS

(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling

with the inverter. Do not disassemble the module or insert anything into the backlight unit.

(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

(3) After the module’s end of life, it is not harmful in case of normal operation and storage.

8.3 STORAGE PRECAUTIONS

When storing modules as spares for a long time, the following precaution is necessary.

(1) Do not leave the module in high temperature, and high humidity for a long time.

It is highly recommended to store the module with temperature from 0 to 35

condensation.

кat normal humidity without

(2) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent

light.

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9. MECHANICAL CHARACTERISTICS

Tentative

ڻႝηިҽ ԖϦљ

CHI MEI

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HIGH VOLTAGE

MERCURY PLEASE FOLLOW LOCAL ORDINANCES OR REGULATIONS FOR DISPOSAL.

COLD CATHODE FLUORESCENT LAMP IN LCD PANEL CONTAINS A SMALL AMOUNT OF

CAUTION

POWER BEFORE SERVICING.

DISCONNECT THE ELECTRIC

RISK OF ELECTRIC SHOCK.

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ˡˁ

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CHI MEI

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CMO V260B1-L08 Specification

Specifications and Main Features

Frequently Asked Questions

User Manual