Cirrus Logic EV2 User Manual

Digital Audio Networking Processor
TM
CobraNet
CobraNet™ EV-2
EV-2 Development System Manual
http://www.cirrus.com
©Copyright 2005 Cirrus Logic, Inc. SEP 2005
EV-2MAN21
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Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to ww w.cirrus.com
IMPOR TAN T N O TICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purp os es, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED,
UTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY
IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL
PPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING
TTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, the Cirrus Logic logo designs, CobraNet, and DSP Conductor are trademarks of Cirrus Logic, Inc. All other brand and
product names in this document may be trademarks or service marks of their respective owners.
SPI is a registered trademark of Motorola, Inc.
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CobraNet™ EV-2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Getting Started. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Required Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Included: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Not Supplied: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Setup Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Switch and Connector Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
J300 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
J401 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
J700 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
P450 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
P501 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
P504 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
SW200 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
SW201-SW204 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
SW500 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Detailed Description of EV-2 Components . . . . . . . . . . . . . . . . . . . . . . . . . . 11
The Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Microcontroller Memory Space: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Microcontroller Port Connections: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Interfacing the Microcontroller to the CM . . . . . . . . . . . . . . . . . . . . . . . . .13
Programming the Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Interfacing Serial Audio to the CM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Configuring the FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Functional Discussion of FPGA Operation . . . . . . . . . . . . . . . . . . . . . . . .18
Hex Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
EV-2 Schematics, Page-by-Page Description . . . . . . . . . . . . . . . . . . . . . . . .22
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Microcontroller and Hex Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
D/A Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Connectors and Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Optional VCXO and clock buffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
AES3 Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Power Supply Conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Appendix A: Definition of Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Appendix B: EV-2 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Appendix C: Other Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Appendix D: EV-2 Schematic Drawings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Appendix E: EV-2 Command Line Interface.. . . . . . . . . . . . . . . . . . . . . . . . . 38
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CobraNet™ EV-2
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Introduction

The EV-2 provides a means of evaluatin g the CM-1 or CM-2 CobraNet™ Modu les and the Cirrus Logic CobraNet Silicon Series of devices. In addition to evaluating the CM-1 or CM-2 (hereafter collectively referred to as the CM except where differences between the CM-1 and CM-2 exist), the user may also use the EV -2 as a development plat form and as an example interface for CMs, the Cobranet Silicon Series, and other CobraNet related projects. The EV-2 connects to the CM via the module's host interface. An 8051-type microcontroller interfaces to the CM's host port, and a simple audio router on the EV-2 allows multiple audio inputs and outputs to connect to the CM's serial audio interface. The EV-2 software provides a simple interface for audio routing on the EV-2, as well as development support.
C M
M O D U L E
I N T E R F A C E
VCXO
8051
FPGA
DC
DAC
ES
LEDs
SRAM
Hex Switches
RS232 Interfaces
nalog
Input
nalog
Output
Output Input
Figure 1. EV-2 Block Diagram
Features*:
Analog audio I/O: T wo channels of analog audio input converted to high quality, 24-bit, 48 kHz or 96 kHz digital audio. Two channels of 24-bit, 48 kHz or 96 kHz digital audio con­verted to high quality, analog audio output. Refer to Appendix B for audio I/O specifica­tions.
Digital audio I/O: One stream of AES3 input and one stream of AES3 output. An AES3 stream is two channels of digital audio. The AES3 input stream is sample rate converted.
8051-type microcontroller: 64kB on-chip Flash Program Memory, 1kB internal SRAM, 32kB external SRAM and in-system programmability.
Field programmability: The supplied EV-2 software provides a means to reprogram EV-2 microcontroller firmware for field upgrades or user development.
RS232 Interfaces: Two RS232 interfaces, one direct to the CM and another to the micro­controller.
Rev. 2.1 4
Routing flexibility: Route from any audio source to any audio sink using the supplied EV -2 software. Route to and from the CM as well as within the EV-2.
Sine wave generation: A sine wave test tone may be used as an alternate audio source. Minimal frequency and gain control is provided.
Hex switches: Four hex formatted switches may be used for network identification of the CobraNet module and/or user development.
Command line interface: The 8051, via its RS232 serial interface, can be used to configure the CM using a command line interface.Cobranet HMI variables can be vie wed and modified using this interface. Refer to Appendix E for a description of the Command line interface.
LED display: Three LED indicators are provided and may be used for user development.
Power supply: Uses standard computer ATX power supply (not included).
*The EV-2 has gone through a hardware revision to incorporate state-of-the-art A/D and D/A converters from Cirrus logic. The new revision board is identified by a “Rev. E” designator. Most of the changes in this document relate to the new converters and their functionality. Any other changes which differ from the Rev. D board will be identified as such.
5 Rev. 2.1

Getting Started

Required Materials

Included:

The CobraNet EV-2 Development Package ships with the following materials:
EV-2 module w/ CM CobraNet PCB Qty. (2)
3’ CAT5 crossover cable Qty. (1)
6 - Pin Phoenix-style audio connectors Qty. (6)
CobraNet™ EV-2
NOTE
In order to provide you with the latest versions of our firmware and software development kit (SDK), we use web-based distribution for our updates. To obtain the latest versions of documentation and software, please go to
www.cirrus.com/cobranetsoftware
.
:

Not Supplied:

Two (2) ATX computer power supplies with cables are required, one for each EV-2 module. These devices are commonly available at computer retail stores.
Audio cables.
RS232 cables. (Not required to pass audio.)

Setup Procedure

Using the supplied Phoenix connectors, build audio input and output cables and two AES3 cables (if desired). These will be used to connect your audio input and output devices to the EV -2 modules. For analog audio pin assignment s, see Figure 2 or Figure 3 below. For AES3 pin assignments, see Figure 4 below.
Connect a power supply to the ATX Power Connector at P450 on each EV-2 module.
Connect the CAT5 crossover cable between the Ethernet jacks at J5 on each CM board.
Connect a stereo audio source to the analog inputs at J300.
Connect a stereo audio monitor to the analog outputs at J401.
Apply power to both EV-2 modules.
Verify th at you have est ablished a prope r connection. See Table 1 on page 7 for Ethernet connector LED status The LED CR710, if on, indicates that the AES3 receiver does not detect a valid AES3 data input stream. If AES3 I/O is not being used, this can be disre­garded. Otherwise, connect a proper AES3 signal to J700. Note that there must be a valid AES3 input for the AES3 output to work.
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CR300, when on, indicates an overflow condition detected on the A/D converter.
The units are now ready to pass audio. The aud io input at J300 on one boa rd should now appear at J401 on the other board and vice versa.
gnd - + gnd - + Input Output
J700
AES I/O
CR710 AES LED
CobraNet module CM-1 or CM-2
System Reset Switch
Hex Switches SW201-4
SW508
P450
ATX Power Connector
Programming
Switch
SW200
CR300
Power
StatuAs
P504
Serial Bridging
Connector
P501
Serial MCU
Connector
Ethernet Jacks
J5 J6
J401 Audio Outputs (+-gnd) (+-gnd)
J300
Audio Inputs
(+-gnd) (+-gnd)
Figure 2. Connector, Switch and Jack Locations
Module
CM-1 CM-2
Condition Left LED Right LED Left LED Right LED
Conductor Flashing Green Solid Orange Flashing Orange Flashing Green Performer Flashing Green Solid Green Solid Orange Flashing Green Fault Flashing Red Flashing Red Flashing Orange Flashing Orange
Table 1: Ethernet Jack Indicator Legend.
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CobraNet™ EV-2

Switch and Connector Functionality

J300

Audio Input Connector: Phoenix-style connector for two-channel balanced audio input, +14.4 dBu maximum (0 dBFS). Refer to Figure 3 for the signal connection.

J401

Audio Output Connector: Phoenix-style connector for two-channel balanced audio output, +8.3 dBu maximum (0 dBFS). Refer to Figure 3 for the signal connection.
+ -
Left
Figure 3. Analog Audio Input and Output Phoenix-style Connectors
gnd
+ -
Right
gnd

J700

AES3 I/O Connector: Phoenix-style connector for an AES3 stream. Refer to Figure 4 for the signal connection. For the AES3 tranceiver to operate properly a vailid AES3 signal must be provided at the AES3 input.
+ - gnd
Figure 4. AES3 I/O Phoenix-style Connector
Output
+ - gnd
Input

P450

ATX power supply connector: ATX power supply is not included with this kit.

P501

9-Pin, D-Type Conne ctor: RS232 connection for communicating with the EV-2 microcontroller using the supplied routing software or a command line interface ( see Appendix E ). Data format is 19200, e, 8, 1.

P504

9-Pin, D-Type Connector: RS232 connection to the CM for serial bridging. The default data format is 19200 baud, 9-bit format for the CM-1. 9-bit format supports any 8 bit format with parity such as 19200, e, 8, 1. The default data format for the CM-2 is 19200 baud, 8-bit format.
Rev. 2.1 8

SW200

Programming switch: The EV-2 microcontroller can be programmed via its serial port, connector P501. The supplied software can be used to perform field updates to the board's code and firmware. This programming capability is initially disabled, but can be enabled by setting the hex switches to FFF8H and then clicking on the "Hex Switches" display (see
Figure 6 ). For more information about the programming mode, please refer to the Programming the Microcontroller section.

SW201-SW204

Hex switches: SW201-SW204 may be used to uniquely identify the unit on a network. Valid settings fall within the range 0000-FFEF (values FFF0-FFFF are reserved). Changing these values updates the value of the CobraNet module's SNMP variable, sysName, to the current hex switch value. Through SNMP, the user may query this variable. The SNMP response is of the form "PEAK_AUDIO_EVAL-SWwxyz", where the wxyz represents the hex values of the switches in ASCII format.

SW500

System reset switch: This momentary switch resets the EV-2 and attached CM, and initiates calibration operations for the analog-to-digital converter (ADC) and digital-to-analog converter (DAC).

Software

The EV-2 is supplied with the CNEval.exe application, which may be used to setup audio routes on the EV-2 (this should not be confused with routing audio over the CobraNet network). The EV-2 has seven sources of audio input, with each source consisting of a stereo pair of audio channels. The sources are:
Four Synchronous Serial Interface (SSI) audio streams from the CM
An AES3 audio input stream.
One audio stream from the ADC (Rev. D boards had two audio streams from the ADC)
A sine wave generator, a stream of two identical 24-bit resolution sine waves.
Using CNEval.exe, the user can route any of these seven source streams to any of the six output streams. The available output streams are:
The four SSI audio streams going to the CM
One going to the DAC
One to the AES3 transmitter.
CNEval.exe communicates with the EV-2 via an RS-232 serial connection. CNEval.exe can communicate using either COM1 or COM2 of the PC on which it is running. The connection from computer to EV-2 must be made as follows:
Connect a straight-through, male-to-female, 9-pin RS232 cable to EV-2 connector P501.
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CobraNet™ EV-2
Select the appropriate PC serial port. The software will attempt to make contact with the EV-2.
Once communication is established, the routing can then be configured. (See Figure 5 below for an example of a routing scheme.)
Figure 5. Screen Shot of EV-2 Software - Audio Routing Interface
The default on power up state of the EV-2 is for the ADC and DAC to be the source and sink respectively, using the CM’s SSI #0 I/O stream. The audio is then transmitted/received via a CobraNet Bundle to/from the other CM. This allows evaluation of the CobraNet module in the analog domain without any configuration.
The EV-2 software also has a programming mode that may be used to perform field updates of the EV-2 microcontroller code. For more information about the programming mode, please refer to the section Programming the Microcontroller below.
Besides the Route panel, the HMI panel under the Panels menu allows the user to configure some HMI variables for evaluation purposes. From the HMI panel the user can set receiver and transmitter bundle assignments as well as changes latency, data format, and sample rate.
The Peek menu provides a means to view HMI variables. In the various panels under Peek, items that are in an indented text field are ones which are read/write. These can not be changed from the Peek panels but are there to alert the user that these are variables that could be changed via SNMP or the Host port.
Rev. 2.1 10

Detailed Description of EV-2 Components

The Microcontroller

The microcontroller on the EV-2 is a Philips Semiconductor P89C51RD2. This microcontroller has 64 kByte of internal Flash Program Memory and 1 kByte of Static RAM. The microcontroller is field programmable using the provided CNEval.exe software. The microcontroller's clock rate is 33Mhz. Philips P89C51RD2 preliminary specification for programming information and part usage may be found on the Philips Semiconductor website:
http://www.semiconductors.philips.com

Microcontroller Memory Space:

Besides the internal program and data memory space the microcontroller also has an external 64k data memory space. The microcontroller is hard-wired to execute from internal Flash Program Memory only. The Flash Program Memory has been segmented to store both Program and FPGA configuration data. The Program Memory map is shown in Table 2 on page 11 and the data memory map is shown in Table 3 on page 11:
Memory Location Description
.
0x0000-0xBFFF Program Memory 0xC000-0xFFFF FPGA Configuration Data
Table 2: Flash Program Memory Map
Memory Location Description
0x0000- 0x02FF Internal Static RAM 0x0300-0x7FFF External Static RAM 0x8000-0x87FF Unused 0x8800 FPGA express mode con-
figuration*
0x8801-0xFFFF Unused
Table 3: Microcontroller Data Memory Map After Reset but Before FPGA
Configuration
*After reset, the FPGA is the only device in the upper 32k of the data memory space. The microcontroller is then able to configure the FPGA and once configured the FPGA performs more sophisticated address decoding of the upper data memory space. Refer to the FPGA section of this document for a detailed description of the configuration process and a listing of the current EV-2 FPGA firmware memory map.
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CobraNet™ EV-2

Microcontroller Port Connections:

Port 0: used for the address/data (AD) bus. Once configured, the FPGA latches the lower
address byte from the AD lines. Port 1: used for several purposes as shown in Table 4 on page 12.
Bit # Name of Signal I/O Description
0 INIT_IO# I Used when configuring the FPGA.
Refer to Xilinx Spartan datasheet for more detail.
1 PROGRAM# O Used to initiate the FPGA configu-
ration. Refer to Xilinx Spartan
datasheet for more detail. 2 MUTE# I Mute signal from the CM module 3 HEX_DATA_IN O Not used. May be used to concat-
enate settings from other hex
switches. 4 HEX_CLOCK O Used to latch the hex switch val-
ues into a serial shift register. 5 HEX_SHIFT O Used to shift the hex switch values
from the serial shift register. 6 HEX_DATA_OUT O The hex switch value from the
serial shift register appears at this
input. 7 MCU_P17 O This is used for communication
between the FPGA and MCU.
Table 4: Port 1 Signal Descriptions
Port 2: upper address bus. Port 2 is output only.
Rev. 2.1 12
Port 3: See Table 5 on page 13.
Bit # Name of Signal I/O Description
0 RXD I RS232 serial port receive signal. 1 TXD O RS232 serial port transmit signal 2 HREQ# O Connected to the CM module host
request signal. See CobraNet
Technical Datasheet for a com-
plete description of this signal. 3 HACK# I Connected to the CM module host
acknowledge signal. See Cobra-
Net Technical Datasheet for a
complete description of this signal.
May be used as an interrupt
request on the microcontroller. 4 Watchdog I Watchdog signal from the CM 5 MCU_P35 I/O Connected to SCI_CLK via the
FPGA. Also used to detect sample
rate. 6 WR# O Microcontroller write signal. 7 RD# O Microcontroller read signal.
Table 5: Port 3 Signal Descriptions

Interfacing the Microcontroller to the CM

Please refer to the EV-2 schematic, found in Appendix D for information regarding interfacing to the CM.
The CM has a host interface that allows a host processor (such as an 8051 microcontroller) to interface to the DSP on the CM. From a hardware perspective the interface to the CM-1 and CM-2 is almost the same,. The host interface signals are a data strobe signal, HDS#; a read/write line, HRW, an 8-bit bi-directional data bus, HD0-HD7, and three address lines, HA0-HA2 on the CM-1 and four address lines, HA0-HA3 on the CM-2. The HEN# line has been configured by the CobraNet software to be ignored or seen as a logic low. Given this host configuration, the interface of the microcontroller to the CM host port is straightforward. In addition to the above signals there are two more, HACK# and HREQ# which can be used as flags to indicate a state change on the CM.
With regard to the CM-1 which uses a Motorola DSP56303, care must be taken with the timing of HDS# and HWR. Motorola's timing specifications for the DSP56303 host port in a non-multiplexed, single data strobe mode requires a set up time from the falling edge of HWR# to the falling edge of HDS# of 4.7ns and the hold time from the rising edge of HDS# to the rising edge of HWR# of 3.3ns. The pulse of the HDS# signal must be wholly within the pulse of the HWR# signal with the constraints stated above. Please refer to Motorola's DSP56303 Technical Data sheet for complete information regarding timing and interface issues. This is available for download from the Motorola web site at
http://www.freescale.com
.
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CobraNet™ EV-2
In the EV-2 application, the host address lines are generated by the address latch in the FPGA (see Table 6 on page 16) and the host data bus is connected directly to the data b us of the microcontroller . The HREQ# and HACK# signals are connected to the two inte rrupt inputs of the microcontroller. These signals may be used for data handshaking and asynchronus notification respectively.
The final host signal, HRESET#, resets the CM when asserted low. Setting a bit in the host reset register (see Table 6 on page 16) controls this signal. See the discussion of the FPGA below for more information about this signal.
Supplemental information regarding the CM Host interface may by found in the section titled "Host Management Interface" in the CS1810xx data sheet available on the Cirrus Logic website: www. cirrus.com.

Programming the Microcontroller

The EV-2 is design ed so that field updates of b oth the microcontroller firmwa re and the FPGA firmware are possible. If only the efficacy and performance of the CobraNet paradigm is being evaluated, reprogramming of the microcontroller is not required. However, use of the field program capability may aid in the design of a CobraNet based product.
Modifying the Flash Program Memory of the microcontroller constitutes the update. The programming instructions that follow pertain to the supplied EV-2 routing/programming
software, CNEval.exe. Programming the microcontroller is a multi-stage process:
1. Install the EV-2 CNEval.exe software on your Windows-based computer.
2. Install an RS232 cable from port 1 or 2 on your PC to P501, the 9-pin D-type connec­tor closest to the center of the board.
3. Run CNEval.exe
4. Change the hex switches (SW201-SW204) to FFF8 (as viewed when looking at the hex switches). You may, as an alternative, click in the narrow recessed panel on the left of the upper status bar.
5. Select "Program" from the Utility menu in CNEval.exe.
6. From the “Serial” drop-down menu select a serial connection, either port COM1 or COM2 based on which is connected.
7. Located near the two serial RS232 connectors is a switch, SW200. This switch must be set to the program mode position. The program position is indicated by silk screen on the EV-2 board.
8. Push switch SW508, the momentary reset switch. SW508 is located just behind the hex switches.
9. Select which firmware to update, either the FPGA or the 8051.
10. Wait for programming to complete. Do not interrupt the programming process!
11. Once programming has completed for the microcontroller or the FPGA firmware, return the programming switch, SW200, to the normal operation position and press the reset switch, SW508.
12. Click OK to return to the main window in CNEval.exe.
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