Cirrus Logic CS5529 User Manual

CS5525/6/9 FAQ

Technical Brief

FAQ (FREQUENCLY ASKED QUESTIONS)

1) Do you have a four channel part?
Not at thi s time , but we have pl ans to do a mu lti-

channel produc t Q4 ‘97. We also hav e 4 digit al
output lines whic h can be used to contr ol e ithe r
switches or a multiplexer through the ADC’s se­rial port, thus eliminating the use of an extra port
on the system µC and a dditional opto-iso lators
in isolated applications.

2) How does the 4-bit di gital latch on a DS ADC
allow me to change channels?

The CS5525 and CS5526 as well as the CS5504
family of AD C’s are designed to settle in one
conversion cycle. This means a mux can be
switched from channel-to-channel with every
conversion while maintaining resolution and ac­curacy.

3) What determi nes the input sp an of the convert ­er?

Performing a full scale gain calibration, or mod­ifying the reference voltage. For example, if the
reference voltage is reduced by 50% the default
input ranges sca l e by one half. Example:
Vref = 2.5 V, Vin = 25 mV to 5 V and
Vref = 1.25 V, Vin = 12.5 mV to 2.5 V.

4) How does the output word rate affect the ADC’s
bandwidth?

The input b and width is li mit ed to 1/2 th e sele ct­ed output word rate due to the Nyquist theory of
sampling. Ex ampl e: With th e defaul t 15 Hz out­put word ra te t he a vail able sign al ban dwidth o f
the ADC is 7.5 Hz.

5) What is recommended if I need more or less
bandwidth than is provided by the on-ch ip di gi ­tal filter ?

Use an external clock between 30 kHz and
100 kHz to scale the digital filters corner fre­quency accordingly. Example: Using a 3x clock
= 3x32.768 kHz = 3 x the word rate = 3 x

3.76 Hz to 3 x 202 Hz = 11.28 Hz to 606 Hz.

6) How fast can the converter shift data from its se­rial port?

Up to 2 MHz.

7) How does the instrumentation amplifier’s chop­ping frequency aff ect the converte r’s input im­pedance and input current?

The input im pedance of the conver ter is a dy­namic im pedance and de pends on whether t he
instrumentation amplifier is engaged or not. For
the lower ranges (25 mV, 55 mV, 100 mV ), t he
instrumentation amplifier is engaged setting the
input impedance to 1/fC (where C is 2 pF, and f
is the chopping frequency, either 256 or
32,768). A typical input impedance for the low­er ranges is 1900 MW (wit h f = 256, and C =
2 pF). For the higher ranges (1 V, 2.5 V, and
5 V), the amplifier is bypassed leaving an equiv­alent inpu t impedance of 1/fC whe re C is 32 pF
and f is either 256 or 32,768. A typical input im­pedance for the hig he r range s is 120 MW (with
f = 256 and C = 2 pF).

The input cu rrent i s a dynam ic c urr ent a nd al so
depends on w hether t he instr umenta tion amp li­fier is engaged or not. For the lower ranges

For further information, please contact Crystal Semiconductor

at [phone] or 1 [phone]

Cirrus Logic, Inc.
Crystal Semiconductor Products Division

P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.crystal.com

Copyright  Cirrus Logic, I nc. 1997

(All Rights Reserv ed)

NOV ‘97

DS202TB1

1

CS5525/6/9 FAQ

(25 m V, 55 mV, 100 mV), the input current is
fVosC (where Vos is the offset of the instru­mentation amplifier, typically less than 40 mV,
f is the chopping frequency, either 256 or
32,768, and C is 2 pF) . A typical inpu t current
for the lower ranges is 100 pA. For the higher
ranges (1 V, 2.5 V, an d 5 V), th e inp ut current
is [(VAIN+)-(VAIN-)]fC where (VAIN+)­(VAIN-) is the voltage between AIN+ and
AIN-, f is either 256 or 32,768, and C is 32 pF.
A typical input current for the highe r ranges is

µA/V.

1.2

8) When rea ding th e co nversion data I get all ze ­roes no matter what the analog signal is. Please
explain why.

Check the voltage between pins 19 and 20
(VREF+ and VREF-). If it is zero, the converter
will compute all zeros because the digital out­put word represents the ratio of the input signal
to the voltage reference.

9) Is calibration re quired to use th e converter?
When the CS5525/26 is reset, the registers are

set to known values. If the signal to be mea­sured by the converter is within the nominal
range, the converter can perform conversions
without th e need for cal ibratio ns. Error s in the
system rem ain present w hen calibration is not
performed, h owever , this m ay b e acce ptable if
the errors ar e insig nific ant to the measu reme nt
or if the errors are removed by some other
means, such as software and registers in the mi­crocontroller.

10) How often do I need to recali bra te?
To answer t his question one must ask: 1) What

accuracy is required fro m the A/D converter?

2) What effect s will te mper ature ch anges ha ve
upon the entire circuit, including components
outside the A/D? To obtain optimum calibra­tion accuracy, a calibration should be per­formed approxi mately one mi nute after power

is applied to allow the chip to reach thermal
equilibrium.

A higher accuracy measurement requirement
will generally require calibrations more often,
because, after the initial calibration has been
performed, the converter is subject to some
drift if the operating temperature changes. Typ­ical offse t drift and ga in drift are gi ven in the
data sheet t ables. The obse rved drift in the ap­plication circuit may be considerably greater
due to para sitic ther mocouple e ffects and gain
drift caused by the limited tempco tracking of
the externa l resi stor s. Onc e an est ima te o f drift
is determin ed for the entire ap plication circu it
(drift will usually be dominated by error sourc­es externa l to t he conv erter), a n asse ssment o f
how it affects measurement accuracy as tem­perature changes can be made. Once the
amount of drift is known, you can determi ne if
a new calibration is required. A good rule of
thumb is to recalibrate the converter (or sys­tem) with every ten degrees of ambient temper­ature chang e.

11)What do the numbers in th e calibration regis­ters actu ally mean ?

There are two internal read/write calibration
registers in the CS5525/26 (offset, and gain).

-24

One LSB in the offset register is 2

proportion
of the input span (bipolar span is 2 times the un­ipolar span). The MSB in the offset register de­termines if the offset that is to be trimmed is
either pos itive or negative. T he converter can

typically trim ±50% of the input span. The gain

-23

register spans fro m 0 to (2 - 2

). The decimal

equivalent meaning of the gain register is:
D = b

20+ b12-1 + b22-2 + b32-3 + ... + bN2

0

-N

where the binary numbers have a value of either
zero or one. After a gain cal ibration has been
performed, the numeric value in the gain regis­ter should not exceed the range of 0.5 to 2.0
(decimal) [400000(Hex) to FFFFFF(He x)].

2 DS202TB1