Cirrus Logic AN330 REV2 User Manual
+5 V
1 mV/V
-+
350 Ω
200 Ω
200 Ω
0.047 μF
0.1 μF
VREF
AIN+
AIN1
V-
V+
CS
SDO
SCLK
CS5513 Microcontroller
+5 V
-
+
71.5 kΩ
0.47 μF
0.1 μF
CS3001
100 Ω
0.1 μF
AN330
Load Cell Measurement using the CS3001/02/11/12
Amplifiers with the CS5510/11/12/13 ADCs
Jerome E. Johnston
1. INTRODUCTION
Several circuits will be presented that use the CS3001/02/11/12 operational amplifiers with the CS5510/11/12/13
ADCs. The combination yields very high performance at relatively low power.
2. CS3001 AND CS5513 COMBINATION CIRCUIT
The first circuit illustrates the CS3001 single amplifier with the CS5513 A/D converter. The CS5513 converter includes an internal oscillator that sets the conversion rate at approximately 107 Sps.
In this circuit the load cell sensitivity is 1 mV / V. With 5 V excitation and full load, the output from the load cell will
be 5 mV.
The CS3001 amplifier is a chopper-stabilized amplifier with very low noise (6 nV /
√Hz). The amplifier is unique in
that it has 300 dB of open loop gain. This permits the amplifier to be used in very-high-gain configurations and still
maintain excellent linearity.
Figure 1.
The circuit shows the CS3001 set with a gain of 408X. The gain is set by the ratio of the feedback resistor (71.5 k)
and the output resistance of the load cell (175 ohm which is set by the parallel combination of the two 350-oh m resistors inside the bridge). Note that few op amps can support a gain of 408x (52 dB) and guarantee 16-bit or better
linearity; the CS3001 will be 20-bit linear due to its super-high open-loop gain. Note that the amplifier output is referenced to the common mode voltage of the load cell at about one half the supply, or 2.5 V. T he 5 mV output o f the
load cell is amplified by the op amp gain of 408 to yield an input to the ADC of 2.04 V, but this will be on top of the
2.5 volt common mode signal. The combination will result in a signal of about 4.504 volts on the AIN+ input of the
ADC.
The input span of the ADC is set by the VREF voltage. With 5 V into VREF, the span of the converter is set to approximately ±4 V, fully differential. T he CS5513 is a 20 -bit converter so its transfer function of 1,048,576 codes is
across 8 Vpp. Since the amplified load cell signal is only 2.04 volts the converter will output only about one quarter
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APR ‘09
AN330REV2
AN330
0 7.5 53.5
Freque ncy (Hz )
Magnitude
Op Amp Spot Noise
Op Am p Spot Noise = 2642 nV / √HZ
0
of the codes ( [(2.04 / 8) • 1048576] = 267387 ) of the converter as the load on the load cell goes from zero to full
scale.
But how many of these codes are really usable, since there is noise in the system? Using the specifications for the
various elements of the circuit, an estimate of the performance of the system can be derived. The means by which
the estimate is derived will be presented and then the circuit will be tested to confirm that the derivation is valid.
The op amp is configured for the inverting gain configuration. The positive terminal of the bridge is co nnected to the
positive terminal of the op amp to establish the co mmon mo de voltage for the op amp as an inve rting amplifier. T he
effective resistance of each of the output terminals of the bridge is about 175 ohms each (two 350 ohm resistors in
parallel). The spot noise of this resistance i s abo ut 1. 7 nV/
of noise (33.8 nV /
0.08 nV /
√( 1.7
effect of the noise of the ADC has not been included at this point. The amplifier will amplify the noise at its input by
the noise gain of the amplifier which is 409 (noise gain of an inverting amplifier is 1 + its forward gain of 408). But
the bandwidth is limited by the 0.47 μF and the 71.5K due to its 4.73 Hz corner frequency. This analysis will ignore
the fact that the capacitor may be ±20% tolerance. So the op amp noise referred to the input of the ADC will be about
6.46 nV /
√Hz at the input of the op amp. If these noise sources are summed in rms fashion, the result is
2
+1.72+0.082+62) = 6.46 nV / √Hz. It is apparent that the op amp is the dominate source of noise. The
√Hz • 409 = 2642 nV / √Hz or 2.642 microvolts / √Hz across the noise bandwidth of the analog filter.
√Hz) from the 71.5 kΩ resistor will be divided down by 175 / (71500 +175) to become
√Hz. The op amp spot noise is 6 nV / √Hz. The amount
Figure 2.
This noise is that of the front end components only and does not include the noise of the ADC. The noise from the
amplifier will be reduced by the RC filter corner at 4.73 Hz at a rate of about 6 dB / octave. The noise bandwidth of
a single-pole filter is 1.57 times the -3 dB corner frequency, so the effective noise bandwidth for the amplifier is
7.43 Hz. A frequency of 7.5 Hz will be used for the bandwidth of the input noise and in the derivation that follows.
It is difficult to estimate spot noise (per
that the user understand the particular noise behavior of the converter for the particular configuration in which the
converter is used. The spot noise can change whenever the sample rate or master clock rate is changed. And it may
change if the magnitude of the voltage reference is changed. Sometimes, A/D converter vendors will supply noise
plots but they may not be at the operating conditions selected by the user. It is beneficial to actually capture data
and analyze the spectrum under the intended operating conditions. Figure 3 illustrates how the spot noise characteristics of two different ADCs can be quite different. The left portion of the figure illustrates the noise spectrum of
a specific delta-sigma ADC along with the magnitude characteristic of its digital filter (a Sinc
increases, the filter attenuation increases, and therefore, the noise decreases across the spectrum as the frequency
approaches one half the converter sample rate as shown in the Figure 3.
√Hz noise) characteristics of a delta-sigma ADC because to do so requires
2 AN330REV2
3
filter). As the frequency
AN330
0 60 120
180
160
140
120
100
80
60
40
20
0
Frequency (Hz)
Magnitude (-dB)
0 53.5 107
180
160
140
120
100
80
60
40
20
0
Frequency (Hz)
Magnitude (-dB)
In this case, the effective noise bandwidth of the digital filter would be that of the Sinc3 filter. This is 0.275 times the
sample rate. In the figure above, with a sample rate of 120 Sps, the effective noise bandwidth would be
(0.275)(120) = 33 Hz.
The right half of Figure 3 is the noise characteristic of the CS5513 operating at 107 Sps. The noise in the CS5513
converter behaves differently than that of the ADC with the Sinc
rms noise in its output codes with a VREF voltage of 5 V. The CS5513 runs on an internal oscillator and its conversion rate is about 107 Sps. As shown in the spectral plot, the noise is not attenuated across the frequency spectrum.
This is due to the particular design of the CS5 512/CS5513 device in which some noise is aliased back into the passband. Because of this behavior, the noise is nearly flat across the frequency band from 0 to 53.5 Hz even though
the filter has significant attenuation with increasing frequency as shown in the right portion of Figure 3.
Therefore, based upon the spectral plot for the noise which indicates that the noise is flat across frequency in the
CS5513 ADC, an estimate of the noise per
Figure 3.
3
filter. The CS5513 is stated to exhibit 12 microvolts
√Hz would be 12 μV / √(53.5) = 1640 nV √Hz.
AN330REV2 3
AN330
0 7.5 53.5
Freque ncy (Hz )
Magnitude
ADC Spot Noise
ADC Spot Noise = 1640 nV / √HZ
0
0 7.5 53.5
Frequency (Hz)
Magnitude
ADC Spot Noise
Op Amp Spot Noise
Op Am p Spot Noise = 2642 nV / √HZ
ADC Spot Noise = 1640 nV / √HZ
RMS Sum of Op Amp & ADC Noise = 3110 nV / √HZ
0
The noise contributed by the ADC is distributed across the spectrum up to one-half the converter output word rate.
The sample rate of the CS5513 is nominally 107 Sps. This is illustrated in the following figure:
Figure 4.
As shown earlier, the op amp noise (after being amplified) is 2642 nV / √Hz, and the estimate for the ADC spot noise
is 1640 /
√Hz. These summed together would be (2642
2
+16402) = 3110 nV / √Hz, but this is only valid for frequencies below the noise bandwidth of the analog low-pass filter. Above the noise bandwidth of the filter, only the spot
noise of the ADC will be present.
Figure 5.
The amplifier noise and the ADC noise below 7.5 Hz will add in rms fashion to produce
2
(2642
3110 nV /
1640 nV /
noise exhibited by the ADC. This will be ( 8.52
+16402) = 3110 nV / √Hz. Across 7.5 Hz the total integrated noise will be √7.5 times
√Hz =8.52μVrms. The total noise from the ADC from 7.5 Hz to 53.5 Hz will be √(53.5–7.5) times
√Hz =11.1μV rms. Adding these two noise numbers in rms fashion will result in an estimate for the total
2
+11.12)=14μV rms. The peak-to-peak noise would be the rms
value, 14 μV, multiplied by 6.6 (±3.3 standard deviations) or 92.4 μVpeak to peak.
Recall that the 5 mV signal from the load cell became 2.04 volts into the ADC. Using the noise estimate one can
estimate the noise-free counts from the converter as 2.04 V / 92.4 μV = 22,078 noise-free counts out of the ADC.
This is the performance on the output words of the CS5513 with no post filtering performed by the microcon troller.
This circuit with the CS3001 and the CS5513 was constructed and tested in the lab. With the input held stable, (some
comments on testing will be stated later) 256 conversion words from the CS5513 were collected and the standard
4 AN330REV2
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