Cirrus Logic AN263 User Manual
AN263
Audio Conversion Systems Noise Calculations and
Requirements
Steve Green
Technical Marketing Manager
Mixed-Signal Products
1. Introduction
The skills required to predict the dynamic range of a combined Analog-to-Digital converter (ADC) and Digital-to-Analog converter (DAC) system, as well as determine the noise requirements for the analog input
and output stages, should be considered essential for an audio systems designer. The techniques required are relatively basic in that they are generally covered in the first analog circuit analysis class in
most engineering programs. However, applying these techniques to the conversion processes often generates some level of confusion. This discussion will detail the steps required to apply these techniques
and determine this critical system performance parameter.
Buffer DACADC Filter
Figure 1. Conversion System Block Diagram
The ADC and DAC system, Figure 1, contains four primary noise sources that must be considered. These
include the analog input buffer, ADC, DAC and the analog output buffer/ filter stage. Noise generated in
each of these stages adds as the “square root of the sum of the squares” as shown below. This fundamental relationship will be used throughout this discussion.
2
2
2
V
total
V
V
+++=
1
2
2
V
V
3
4
The analysis requires several initial assumptions and setting of limits.
1) The bandwidth is set to 20 kHz. This constraint is purely for convenience and allows th e use of a common converter data sheet specification. The results can easily be scaled to other bandwidths as long
as assumption #2 remains valid.
2) The spectral content of the noise is “white”. This assumes that the contribution of 1/f noise is negligible
and the noise sources within the converters remain “white” to the upper limit of the analysis. A word
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of warning, the spectral noise content of digital-to-analog converters often do not retain this characteristic at bandwidths well beyond 20 kHz when operated at 96 kHz or 192 kHz sample rates.
3) The noise contribution of the analog input and out put stages are negligible. This assumption simplifies
the initial analysis but requires further investigation to ensure accuracy.
2. Combined ADC and DAC Dynamic Range Calculation
2.1 Converter Equivalent Noise Calculation
Dynamic Range (DR) is a specification that can be found in any ADC or DAC data sheet. This specification
is defined as the ratio of the RMS voltage of a full-scale analog input ( V
) or output (V
fsadc
to the RMS noise voltage of the converter over a 20 kHz bandwidth. DR is generally specified in dB and
the equation for dynamic range is shown below. Notice that there are three variables in this equation,
where the DR and V
allow the calculation of the equivalent RMS noise voltage (V
are common data sheet specifications. The equation can be easily rearranged to
fs
) of the converter.
n
) sine wave
fsdac
V
fs
⎛⎞
------- -
DR 20
log×=
⎝⎠
V
n
V
------------------=
10
fs
DR
⎛⎞
-------- -
⎝⎠
20
V
n
However, adjustments to the data sheet Dynamic Range and full-scale input/output specifications are often required prior to the calculation.
1) Dynamic Range specifications are often A-weighted and the equivalent noise calculation requires the
use of un-weighted numbers. Fortunately, A-weighted specifications can easily be converted to an a pproximate unweighted specification. A conservative estimate can be determined by simply degrading
the A-weighted data sheet specification by 3 dB.
2) The full scale input or output voltage specifications in converter data sheets are commonly represented as either volts peak-to-peak, volts peak or RMS. The full scale input or output voltage must be converted to a RMS value for this calculation to be valid.
2.2 Conversion System Gain
Another requirement is that the noise sources within the system must be referenced to the same system
node. Assume that the ADC and DAC system operates as a single block with analog input and analog
output. Due to the differences in the conversion processes and the corresponding differences in the analog input voltage and the analog output voltage, the block has either gain or attenua tion. The system must
be modeled to reflect this gain with the gain coefficient (K), as shown in Figure 2.
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V
fsadc
ADC
Figure 2. Effective Conversion System Gain
K
2.3 Equivalent System Noise Calculation
The output referred system noise voltage (V
) can be calculated using the expressions for the gain co-
nsys
efficient, equivalent ADC and DAC noise voltages.
V
nsys
V
ndac
Where:
V
ndac
K
V
fsdac
----------------=
V
fsadc
2
KV
×()
+()=
V
fsdac
------------------------=
DR
dac
⎛⎞
----------------
⎝⎠
20
10
nadc
DAC
2
V
fsdac
V
fsadc
V
nadc
------------------------=
DR
adc
⎛⎞
----------------
⎝⎠
20
10
V
fsdac
K
----------------=
V
fsadc
Following substitution and simplification:
DR
dac
⎛⎞
----------------
–
⎝⎠
10
V
nsysVfsdac
10
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10
+=
DR
adc
⎛⎞
----------------
–
⎝⎠
10
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