Cirrus Logic AN249 User Manual

AN249

CS5333 to CS5340 Conversion

by Kevin L Tretter

1. Introduction

This application note identifies the implementation differences between these two devices, including:
- Key specifications
- Pinout differences
- Startup mode selections
- System clocking
- Input filter topology
- Reference pin decoupling

2. Key Specifications

Table 1 shows a comparison of the key specifications of these two devices, and Table 2 shows the pin comparison between the CS5333 and the CS5340. Although these two devices are not pin compatible, they are very similar in terms of overall functionality and feature set. The CS5340 achieves higher analog performance and supports a wider range of output sample rates, including 192 kHz. This additional per­formance is the main reason for the increased power consumption of the CS5340 rel ative to the CS5333.
Parameter CS5333 CS5340 Units Conversion 24 24 Bits Dynam ic Range (A -wei ghted)* 95 98 dB THD +N* -88 -95 dB Analog Core Power Supply (VA) +1.8 to +3.3 +3.3 to +5.0 V Digital Core Power Supply (VD) Powered from VA +3.3 to +5.0 V Digital Interface Power Supply (VL) +1.8 to +3.3 +1.8 to +5.0 V Maximum Power* 31 100 mW Maximum Sample Rate 100 200 k Hz Pack ag e 16-pin TSS OP 16-pin TSS OP * Al l pe rformance/ p ower m easurem ents taken wi t h al l suppl i es s e t to 3.3 V
Table 1. Comparison of Key Specifications
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Copyright © Cirrus Logic, Inc. 2004
(All Rights Reserved)
MAR ‘04
AN249REV1
1
AN249
r
A
r
r
r
The CS5333 and CS5340 are both available in a 16-pin TSSOP package. As can be seen from Table 2, all but three pins correlate directly in terms of functionality. These three pins account for a difference in operational mode selection and a separate voltage supply pin for the CS5340 digital core.
CS5333 CS5340 Description
Pin Number Pin Name Pin Number Pin Name
1 VL 3 VL Logic Powe 2 MCLK 2 MCLK Master Clock 3 SCLK 7 SCLK Serial Clock 4 SDATA 4 SDOUT Serial Data 5VA13V 6 GND 5 GND Ground Reference 7 LRCK 8 LRCK Left/Right Clock 8 DIV - - Speed Mode Select/MCLK Divide
9 DIF - - Digital Interface Format Select 10 TST - - Test Pin 11 FILT+ 15 FILT+ Voltage Reference 12 REF_GND 14 REF_GND Ground Reference 13 AINR 12 AINR Right Channel Analog Input 14 AINL 10 AINL Left Channel Analog Input 15 VQ 11 VQ Quiescent Voltage Reference 16 RST 9 RST Reset
1 M0 Mode Selection 6 VD Digital Powe
16 M1 Mode Selection
Analog Powe
Table 2. Pin Compatibility Between the CS5333 and CS5340
2
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3. Typical Connection Diagrams

Figures 1 and 2 illustrate the typical connection diagram for the CS5333 and CS5340 respectively. The analog and digital core of the CS5333 are powered from VA, which can be set from 1.8 V to 3.3 V. The VL supply pin powers the digital interface logic from 1. 8 V to 3.3 V and can be set independently from VA.
1.8 V to 3.3 V
1.8 V to 3.3 V
+
.1µF
µF
1
1µF
1 µ
0
5
VA
11
FILT+
12
REF_GND
F
15
VQ
CS 5333
1
VL
RST
DIF
DIV
0
16
9 8
.1µF
+
Configuration
1
Mode
µF
Analog Input Filter
Figure 3
14
AINL
13
AINR
GND TST
6
10
Figure 1. CS5333 Typical Connection Diagram
MCLK
LRCK SCLK
SDATA
2 7
3
4
47k
Digital
Audio
Source
Connect to:
• V L fo r Mas te r Mod e
• GND for Slave Mode
3
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