Cirrus Logic AN187 User Manual

AN187

Application Note

USING THE EP72/7312 TO IMPLEMENT A SOFT MODEM

P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com

Copyright  Cirrus Logic, Inc. 2000

(All Rights Reserved)

OCT ‘00

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TABLE OF CONTENTS

1. INTRODUCTION ....................................................................................................... 3

2. EP72/7312 DIGITAL AUDIO INTERFACE (DAI) ................................................ 3

3. SI3034 DAA CHIP SET .............................................................................................. 4

4. INTERFACING THE EP72/7312 TO THE SI3034 ................................................. 4

5. PLD EQUATIONS; SOFTMODEM VIA EP72/7312 DAI TO

THE SI3034 DAA CHIP SET ..................................................................................... 8

6. SILICON LABORATORIES CONTACT INFORMATION ............................... 10

LIST OF FIGURES

Figure 1. Example Timing Interface Generated by the DAI............................................... 3

Figure 1. Circuit Schematic................................................................................................. 6

Figure 2. CPLD Schematic ................................................................................................. 7

Figure 2. EP72/7312 to Si3035 Interface Signals.............................................................10

LIST OF TABLES

Table 1. DAA Interface Signals.......................................................................................... 4

Table 2. PLD Equations......................................................................................................8

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1. INTRODUCTION

As the world of PDAs and other hand-held devices evolves, more and more of these products desire the support of an analog
modem to communicate with the Internet. Today, the use of modems constitutes only a small market share. However, the desire
for modem support is growing dramatically. Due to this fact, this application note has been created.

This application note describes how the ARM720T™ processor, DRAM controller, and the Digital Audio Interface (DAI)
integrated into the Cirrus Logic EP72/7312 embedded processor can be used to implement a V.90 softmodem solution.

Used in conjunction with the EP72/7312 are the following components:

n V.90 softmodem and driver code
n Silicon Laboratories™ Si3034 DAA chip set
n A simple PLD, used to implement the interface logic between the DAI and the Si3035 chip set.

Schematics and a timing diagram are provided to explain the characteristics of this interface.

2. EP72/7312 DIGITAL AUDIO INTERFACE (DAI)

Within the EP212 is an integrated Digital Audio Interface (DAI). This interface was implemented to support high quality stereo
audio transmission and reception. However, it can be used to support other functions, like a softmodem. The interface consists
of five signals:

n LRCK Left/right frame sync; output only
n SCLK Bit clock; equals ½ MCLK; there are 128 bits-per-frame; output only
n MCLK 2x oversampled clock; input when in Slave mode
n SDOUT Digital audio data out; output
n SDIN Digital audio data in; input

An example of the timing interface generated by the DAI for a typical audio application is shown in Figure 1.
The data uses the MSB/Left Justified format. This means that the data is clocked in/out immediately after the frame sync

(LRCK) changes levels. The data is left ju stified, with the MSB first. This is sl ightly different than the I2S format, where th e
data is delayed by one clock after the frame sync changes levels. Each frame is 128 bits long. Thus each channel (i.e., left and
right) is 64 bits wide. The frame size and duty cycle of the signal LRCK cannot be configured in the EP72/7312. 'The frame
size in the EP7312 can be configured for either 128 or 64 bits per frame, but this is not relevent for this application.

128 clocks

LRCK

SCLK

O

SDATA +3 +2 +1 LSB+5 +4

SDATA +3 +2 +1 LSB+5 +4

SDATAI +3 +2 +1 LSB+5 +4MSB-1-2-3-4-5 +3 +2 +1 LSB+5 +4MSB-1 -2 -3 -4

MSB-1-2-3-4-5

MSB-1-2-3-4-5

Left Channel

MSB-1 -2 -3 -4

MSB-1 -2 -3 -4

Right Channel

+3 +2 +1 LSB+5 +4

+3 +2 +1 LSB+5 +4

Figure 1. Example Timing Interface Generated by the DAI

Figure 1 Parameters: MSB/Left Justified format

Mclock = 256

, bit rate = 128

fs

fs

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SCLK is derived from MCLK. It is ½ MCLK. In the default mode, the DAI is in the Master mode. In this mode it generates its
own MCLK clock. It is 9.216 MHz. Thus SCLK becomes 4.608 MHz. For applications that need SCLK to be different speed,
the DAI can be configured to be in the Slave mode. In this mode, MCLK is provided from an external source via the MCLK
pin. When in the Slave mode, the DAI will receive its master clock from the MCLK pin, and then divide it in half to create
SCLK. In this application of the softmodem, we will need to use this Slave mode, and provid e a 4.096 MHz clock sour ce into
the MCLK pin. SCLK and LRCK are always configured as outputs regardless of the DAI mode setting. The data is latched in
on the positive going edge of the SCLK, and is clocked out on the negative going edge.

3. SI3034 DAA CHIP SET

The Silicon Laboratories Si3034 is an integrated Direct Access Arrangement (DAA) that provides a programmable line
interface to meet global telephone line interface requirements. Programmable features inclu de AC and DC terminations, ringer
impedance and ringer threshold. Also supported is bil ling tone detection, polarity reversal, pulse dialing, and on-hook line
monitoring. Available in two 16-pin small outline packages, it eliminates the need for an analog front-end (AFE), an isolation
transformer, relays, opto-isolators, and a 2- to 4-wire hybrid circuit. This Si3034 chip set runs at either 3.3v or 5V, and
dramatically reduces the number of discrete external components required to achieve compliance with global regulatory
requir.ements. If only compliance to North American and Japanese standards are required, the Si3035 DAA may be used instead
of the Si3034 global DAA

The DAA communication interface consists of the signals described in Table 1.

NOTE: There are other signals on the DAA as well. Please refer to the

ation and configuration.

The Si3034/35 transfers data in a 16-bit h alfword format. D ata is transf erred using the sam e MSB/Left J ustified format as the
EP72/7312's DAI. It uses a 256-bit frame size. In this 256-bit frame are two 128-bit-long time slots: primary and secondary.
The two time slots are delineated by the rising edge of nFSYNC. Thus nFSYNC toggles twice per frame. The primary time slot
is used to transfer telephony data. The secondary time slot is used as a control channel between the Host and the DAA. It can
be used to change the default configuration settings of the chip set. Refer to the Si3034 or the Si3035 Data Sheet for more
information.

The data is latched on the negative going edge of SCLK, and is clocked out on the positive going edge. This is the opposite of
the DAI.

NOTE: Carefully follow the instructions in the

in your system design.

Signal Name Purpose Activity

nFSYNC Frame Sync Output in Master

SCLK Bit Clock Output when in

Si3034/35 Data Sheet

mode, input in
Slave mode

Master mode, no
connect in Slave
mode

Si3034

to program and implement the device properly

or

Si3035 Data Sheet

for their oper-

MCLK Master

clock

SD0 Data out
SDI Data in

Table 1. DAA Interface Signals

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1x SCLK, used as
input to create bit
clock