Cirrus Logic AN130 User Manual

Application Note
Interfacing the CS5521/22/23/24/28 to the PIC16C84

TABLE OF CONTENTS

1. INTRODUCTION ................................................... 1
2. ADC DIGITAL INTERFACE ................................... 1
3. SOFTWARE DESCRIPTION ................................. 2
3.1 Initialize ............................................................. 2
3.2 Write Channel Setup Registers ........................ 2
3.3 Self-Offset Calibration ....................................... 3
3.4 Read/Write Gain Register ................................. 3
3.5 Acquire Conversion .......................................... 4
4. MAXIMUM SCLK RATE ......................................... 4
5. SERIAL PERIPHERAL INTERFACE ..................... 4
6. DEVELOPMENT TOOL DESCRIPTION ................ 5
7. CONCLUSION ....................................................... 5
8. APPENDIX: PIC16C84 MICROCODE TO
INTERFACE TO THE CS5521/22/23/24/28 .......... 6

1. INTRODUCTION

This application note details the interface of Crys-
tal Semiconductor’s CS5521/22/23/24/28 Analog­to-Digital Converter (ADC) to the Microchip PIC16C84 microcontroller. This note takes the reader through a simple example which demon­strates how to communi cate between t he microcon­troller and the ADC. All algorithms discussed are included in Section 8. “APPENDIX: PIC16C84 Microcode to Interface to the CS5521/22/23/24/28” on page 6.

2. ADC DIGITAL INTERFACE

The CS5521/22/23/24/28 interfaces to the PIC16C84 through either a three-wire or a four­wire interface. Figure 1 depicts the interface be­tween the two devices. Though this software was written to interface to Port A (RA) on the PIC16C84 with a four-wire interface, the algo­rithms can be easily modified to work with the three-wire format.
The ADC’s serial port consists of four control lines: CS, SCLK, SDI, and SDO.
CS, Chip Select, is the control line which enables access to the serial port.
SCLK, Serial Clock, is the bit-clock which controls the shifting of data to or from the ADC’s serial port.
SDI, Serial Data In, is the data signal used to trans­fer data from the PIC16C84 to the ADC.
SDO, Serial Data Out, is the data signal used to transfer output data from the ADC to the PIC16C84.
3-Wire Interface 4-Wire Interface
CS5521/22/23/24/28
CS
SDI
SDO
SCLK
P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com
PIC16C84
NC (RA0) RA1 RA2
RA3

Figure 1. 3-Wire and 4-Wire Interfaces

CS5521/22/23/24/28
SDO
SCLK
Copyright  Cirrus Logic, Inc. 1999
(All Rights Reserved)
CS SDI
PIC16C84
RA0 RA1 RA2
RA3
NOV ‘99
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3. SOFTWARE DESCRIPTION

This note presents algorithms to initialize the PIC16C84 and the CS5521/22/23/24/28, perform
calibrations, modify the CS5521/22/23/24/28’s in­ternal registers, and acquire a conversion. Figure 2 depicts a block diagram of the main program struc­ture. While reading this application note, please re­fer to Section 8. “APPENDIX: PIC16C84 Microcode to Interface to the CS5521/22/23/24/28” on page 6 for the code list­ing.

3.1 Initialize

Initialize is a subroutine that configures Port A (RA) on the PIC16C84 and places the serial port of the CS5521/22/23/24/28 into the command state. RA’s data direction is configured as depicted in Figure 1 by writing to the TRISA register (for more information on configuring ports, see the PIC16C84 Data Sheet). The controller then enters a number of delay states to allow the appropriate time for the ADC’s oscillator to start up and stabi­lize (oscillator start-up time for a 32.768 KHz crys­tal is typically about 500ms). Finally, the ADCs serial port is reset by sending fifteen bytes of logic 1’s followed by a single byte with its LSB at logic 0 to SDI (the serial port is initialized after any pow­er-on reset, and this software re-initializa tion is for demonstration purposes) Once the proper sequence of bits has been received, the serial port on the
START
INITIALIZE
MICROCONTROLLER & ADC
WRITE CSRs
SELF-OFFSET CAL.
MODIFY GAIN
ACQUIRE CONVERSION

Figure 2. CS5521/22/23/24/28 Software Flowchart

ADC is in the command state, where it waits for a valid command.

3.2 Write Channel Setup Registers

The subroutine write_csrs is an example of how to write to the CS5521/22/23/24/28’s Channel Setup Registers (CSRs). For this example, two CSRs (four Setups) are written. The number of CSRs to be accessed is determined by the Depth Pointer bits (DP3-DP0) in the configuration register. The Depth Pointer bits are set to “0011” to access the two CSRs. The value “0011” is calculated by tak­ing the number of Setups to be accessed and sub­tracting 1. Because each CSR holds two Setups, this number must always be an odd value, that is,
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SPI is a trademark of Motorola. MICROWIRE is a trademark of National Semiconductor. MPLAB and MPASM are trademarks of Microchip.
Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the in-
formation is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). No re sponsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise). Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
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DP0 must always be logic 1 when reading and writ­ing the CSRs. To modify the Depth Pointer bits, the configuration register is read to prevent corruption of other bits. After the read_register routine is run with the command 0x0B (HEX), the DP3-DP0 bits
are masked to “0011”. Then, the updated informa­tion is written back into the ADC with the com­mand 0x03 (HEX) using the write_register routine.
After the depth pointer bits are set correctly, the CSR information is written to the ADC. The com­mand 0x05 (HEX) is sent to the ADC to begin the write sequence (to read the CSRs, the command would be 0x0D). At this point, the ADC is expect­ing to receive information for two 24-bit CSRs, or 48 bits, based on the Depth Pointer bits. The first CSR is written with a value of 0x000000 (HEX). This sets Setup 1 and Setup 2 both to convert bipo­lar, 100mV signals on physical channel 1 (PC1) at an output word rate (OWR) of 15 Hz, and latch pins A1-A0 equal to “00”. The second CSR is written with the value 0x4C0105 (HEX). This sets Setup 3 to convert a bipolar, 100mV signal on PC2 at a
101.1 Hz OWR, with latch pins A1-A0 at “01”.
This also sets Setup 4 to convert a unipolar, 25mV input signal at 15 Hz on PC3, with out put latch pins A1-A0 set to “00”.

3.4 Read/Write Gain Register

The routine modify_gain provides an example of how to modify the ADC’s internal gain registers. To modify the gain register the command byte and data byte variables are written with the appropriate information. Modify_gain then calls the subroutine write_register, which uses these variables to set the contents of Physical Channel 1 (PC1)’s gain regis­ter to 0x800000 (HEX). The write_register routine calls the send_byte algorithm four times, once to send the command byte, and three more times to send the three data bytes. Send_byte is a subroutine used to ‘bit-bang’ a byte of information from the PIC16C84 to the CS5521/22/23/24/28. A byte is transferred one bit at a time, MSB (most significant bit) first, by placing a bit of information on RA1 (SDI) and then pulsing RA3 (SCLK). The byte is transferred by repeating this process eight times. Figure 3 depicts the timing diagram for the write­cycle in the CS5521/22/23/24/28’s serial port. It is important to note here that this section of the code demonstrates how to write to the gain register of PC1. It does not perform a gain calibration. To write to the other internal registers of the ADC, fol­low the procedures outlined in the CS5521/22/23/24/28 data sheet.

3.3 Self-Offset Calibration

Calibrate is a subroutine that performs a self-offset calibration using Setup 1. Calibrate does this by sending the command 0x81 (HEX) to the ADC. This tells the ADC to perform a self-offset calibra­tion using Setup 1 (see the CS5521/22/23/24/28 Data Sheet for information on performing offset or gain calibrations using other Setups). Once the command has been sent, the controller polls RA2 (SDO) until it falls, indicating that the calibrat ion is complete. Note that although calibrations are done on a specific Setup, the offset or gain register that is modified belongs to the physical channel refer­enced by that Setup.
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To read the value in the gain register of PC1, the command byte is loaded with the value 0x0A (HEX), and the read_register routine is called. It duplicates the read-cycle timing diagram depicted in Figure 4. Read_register asserts CS (RA0). The n it calls send_byte once to transfer the command- byte to the CS5521/22/23/24/28. This places the converter into the data state where it waits until data is read from its serial port. Read_register then calls receive_byte three times and transfers three bytes of information from the CS5521/22/23/24/28 to the PIC16C84. Similar to send_byte, receive_byte acquires a byte one bit at a time, MSB first. When the transfer is complete, the variables high_byte, mid_byte, and low_byte contain the val­ue present in PC1’s 24-bit gain register.
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3.5 Acquire Conversion

To acquire a conversion the subroutine convert is called. For single conversions on one physical channel, the MC (multiple conversion) and the LP (loop) bits in the configuration register must be log­ic 0. To prevent corruption of the configuration register, convert instructs the PIC16C84 to read and save the contents. This information is stored in the variables HIGHBYTE, MIDBYTE and LOW­BYTE. Then the MC, LP, and RC (read conver t) bits are masked to logic 0, and the new information
is written back to the ADC’s co nfiguration regis ter. A conversion is initiated on Setup 1 by sending the command 0x80 to the converter. At this time, the controller polls RA2 (SDO) until it falls to a logic 0 level (see Figure 5). After SDO falls, convert ap­plies a logic 0 to RA1 (SDI) and pulses RA3 (SCLK) eight times to initiate the data transfer
from the ADC. The PIC16C84 then reads the con­version data word by calling receive_byte three times. Figure 6 depicts how the 16 or 24-bit data word is stored in the memory locations HIGH­BYTE, MIDBYTE, and LOWBYTE.

4. MAXIMUM SCLK RATE

An instruction cycle in the PIC16C84 consists of four oscillator periods, or 400ns if the microcon­troller’s oscillator frequency is 10 MHz. Since the CS5521/22/23/24/28’s maximum SCLK rate is 2MHz, additional no operation (NOP) delays may be necessary to reduce the tra nsfer rate if the micro­controller system requires higher rate oscillators.

5. SERIAL PERIPHERAL INTERFACE

When using a built-in Serial Peripheral Interface (SPI) port, the designer must pay special attention to how the port is configured. Most SPI ports allow

Figure 3. Write-Cycle Timing

Figure 4. R ead-Cycle Timing

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SCLK
SDI
*
t
ommand Time
C
8SCLKs
DO
S
td = XIN/OWR clock cycles for each conversion except the
*
first conversion which will take XIN/OWR + 7 clock cycles
d
Data SDO Continuous Conversion Read

Figure 5. Conversion/Acquisition Cycle Timing

SCLKs Clear SDO Flag
8
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IN/OWR
X
Clock Cycles
SB
M
ata Time
D 24 SCLKs
SB
L
MSB High-Byte
D23 D22 D21 D20 D19 D18 D17 D16
Mid-Byte
D15 D14 D13 D12 D11 D10 D9 D8
Low-ByteLSB
D7 D6 D5 D4 D3 D2 D1 D0
A) 24-Bit Conversion Data Word (CS5522/24/28)
MSB High-Byte
D15 D14 D13 D12 D11 D10 D9 D8
Mid-Byte
D7 D6 D5 D4 D3 D2 D1 D0
Low-Byte
1110CI1CI0ODOF
B) 16-bit Conversion Data Word (CS5521/23)
0 - always zero, 1 - always 1
CI1, CI0 - Channel Indicator Bits
OD - Oscillation Detect, OF - Overflow

Figure 6. Bit Representation/Storage in the PIC16C84

for a selectable clock polarity. However, many do
not have the capability to select the clock’s phase. When using a microcontroller with both features, the clock polarity should be set to idle low, and the clock phase should be set to begin clocking in the middle of the data bits. For an SPI port without the variable clock phase feature to function properly with the CS5521/22/23/24/28, the clock polarity needs to be set to idle high, and the ADC’s serial port must be re-initialized anytime new informa­tion is transmitted bet ween t he mic rocontroller and the converter.

6. DEVELOPMENT TOOL DESCRIPTION

The code in this application note was developed with MPLABTM, a development package from Mi­crochip, Inc. It was written in Microchip assembly and compiled with the MPASMTM assembler.

7. CONCLUSION

This application note presents an example of how to interface the CS5521/22/23/24/28 to the PIC16C84. It is divided into two main sections: hardware and software. The hardware section illus­trates both a three-wire and a four- wire interface. The three-wire interface is SPI™ and MICROW-
IRE™ compatible. The software, developed using tools from Microchip, Inc., illustrates how to ini­tialize the converter and microcontroller, write to
the CSRs, write and read the ADC’s internal regis­ters, perform calibrations, and acquire conversions. The software is modularized and provides impor­tant subroutines such as write_register, read_register, write_csrs and convert, which were all written in PIC assembly language.
The software described in the note is included in Section 8. “APPENDIX: PIC16C84 Microcode to Interface to the CS5521/22/23/24/28” on page 6.
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