Cirrus Logic AN118 User Manual

AN118

Application Note

Interfacing the CS5521/22/23/24/28 to the 80C51

TABLE OF CONTENTS

1. INTRODUCTION ................................................... 1

2. ADC DIGITAL INTERFACE ................................... 1

3. SOFTWARE DESCRIPTION ................................. 1

3.1 Main Program Loop .......................................... 2

3.2 Initialize ............................................................. 2

3.3 Transfer Data To/From ADC ............................. 3

3.4 Transfer Data To/From PC ............................... 3

3.5 Decoding PC Commands ................................. 5

3.6 Sample Index .................................................... 6

3.7 Test Modes ....................................................... 6

4. MAXIMUM SCLK RATE ......................................... 8

5. DEVELOPMENT TOOL DESCRIPTION ................ 8

6. CONCLUSION ....................................................... 8

7. APPENDIX: 80C51 MICROCONTROLLER CODE 9

1. INTRODUCTION

This application note details the interface of Crys-

tal Semiconductor’s CS5521/22/23/24/28 Analog­to-Digital Converter (ADC) to an 80C51 micro­controller. It includes the comple te code written for
the CDB5521/22/23/24/28 Evaluation Board,
which also interfaces the 80C51 to a PC. All algo­rithms discussed are included in Section 7. “Ap­pendix: 80C51 Microcontroller Code” on page 9.

2. ADC DIGITAL INTERFACE

The CS5521/22/23/24/28 interfaces to the 80C51
through either a three-wire or a four-wire interface.
Figure 1 depicts the interface between the two de­vices. This software was written to interface to Port
1 (P1) on the 80C51 with either type of interface.
The ADC’s serial port consists of four control
lines: CS, SCLK, SDI, and SDO.

CS, Chip Select, is the control line which enables
access to the serial port.

SCLK, Serial Clock, is the bit-clock which controls
the shifting of data to or from the ADC’s serial
port.

SDI, Serial Data In, is the data signal used to trans­fer data from the 80C51 to the ADC.

SDO, Serial Data Out, is the data signal used to
transfer output data from the ADC to the 80C51.

3. SOFTWARE DESCRIPTION

This note details all of the algorithms contained in
the CDB5521/22/23/24/28 Evaluation Board soft­ware. The software is written for the 80C51 micro­controller on the evaluation board. The more
important communication algorithms are written in

CS5521/22/23/24/28

CS

SDI

SDO

SCLK

P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com

80C51

P1.0 (logic 0)
P1.1
P1.2

P1.3

Figure 1. 3-Wire and 4-Wire Interfaces

CS5521/22/23/24/28 80C51

CS

SDI

SDO

SCLK

Copyright  Cirrus Logic, Inc. 1999

(All Rights Reserved)

P1.0

P1.1
P1.2

P1.3

NOV ‘99

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1

80C51 assembly language, providing a good set of
tools for both C and assembly programmers to
build their own designs upon. While reading this

application note, please refer to Section 7. “Appen­dix: 80C51 Microcontroller Code” on page 9 for
the code listing.

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START

INITIALIZE

3.1 Main Program Loop

The main loop of the program is responsible for
calling all other algorithms and controlling the pro­gram flow. Figure 2 depicts the data flow of the
main loop. When the evaluation board is first pow­ered up, or after a system reset, the microcontroller
and ADC are set up by calling the initialize routine.
The value present on the DIP switches is then
checked. If this value is anything other than zero,
the program goes into test mode. If the value is
equal to zero, the program goes into a continuous
loop, where it receives commands from the PC, de­codes them, and performs the desired actions.

3.2 Initialize

Initialize is used to configure the microcontroller
and the ADC to the proper settings that will allow
the PC to control the ADC indirectly through the
microcontroller. The 80C51’s port P1 is configured
as depicted in Figure 1 (for more information on
configuring ports refer to the 80C51 Data Sheet).
Next, port P2 is written twice, once with all zeros
and once with all ones, with a delay in between to
control the LEDs attached to the port and inform
the user that the board has been reset successfully.

CHECK

DIPS

TEST MODES

Figure 2. So ftware Flow Diagram

COMMAND

ZeroNon-Zero

GET

DECODE

COMMAND

Port P3 is then set up to use the 80C51’s internal
UART to interface to the PC at 9600 baud, no par­ity bit, eight data bits, and one stop bit. To allow
time for the ADCs oscillator to start up, a delay
state is entered (oscillator start-up time is typically
500ms). After this delay, the ADC is ready to ac­cept data. However, it is a good idea to reset the
ADC’s serial port before communicating with it.
To reset the serial port on the ADC, SDI is asserte d,
and 255 SCLKs are provided. SDI is then cleared,
and one final SCLK is provided (this is a slight
overkill, as only 15 bytes of logic 1’s followed by a

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Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the i nform atio n

is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). No responsibility is assumed by Cirr us
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2 AN118REV2

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final byte with its LSB at logic 0 are needed to reset
the serial port). This places the ADC in the com­mand state, where it awaits a valid command. Fi­nally, before returning to the main routine, the
mode pin is queried to determine whether a three or
four-wire interface is being used.

3.3 Transfer Data To/From ADC

Transferring data to and from the ADC is done
through the transfer_byte and receive_byte func­tions. Transfer_byte takes one byte of input and
sends it to the ADC one bit at a time (MSB first) by
applying the bit information to P1.1 (SDI) and then
pulsing P1.3 (SCLK). This is repeated eight times
to transfer the entire byte of data to the ADC.
Receive_byte works in just the opposite direction,
obtaining byte information MSB-first on the P1.2
(SDO) line as it provides the clock on P1.3. The
functions write_to_register and read_register
make use of these byte transfer functions to send
and receive internal register information in the
proper order from the ADC. Write_to_register
writes four bytes of information to the ADC using
transfer_byte. The command byte is written first,
followed by the high, middle, and low bytes of the
24-bit register word. Read_register, on the other
hand, sends a command byte to the ADC using
transfer_byte, and then obtains the 24-bit register
word by calling receive_byte three times in succes­sion. Due to the conversion time delay, reading
conversion data requires a slightly different method
than reading register information. The
read_conversion algorithm is designed for this pur­pose. The configuration register is read and stored
in memory using the read_register command. The
LP, RC, and MC bits are then masked to zero, and
the register is written using write_to_register. The
command to start a conversion is then written using
transfer_byte, and SDO is polled until the ADC in­dicates that the conversion is complete. Once a val­id conversion has been obtained, eight zeros are
sent to the ADC with transfer_byte to start the
transfer of data, at which time receive_byte is

called three times to obtain the data word (see Fig­ure 3 for more detail on how the information is or­ganized among the three bytes) Figure 6 shows the
conversion data timing.

MSB High-Byte

D23 D22 D21 D20 D19 D18 D17 D16

Mid-Byte

D15 D14 D13 D12 D11 D10 D9 D8

Low-Byte

D7 D6 D5 D4 D3 D2 D1 D0

A) 24-bit Conversion Data Word (CS5522/24/28)

MSB High-Byte

D15 D14 D13 D12 D11 D10 D9 D8

Mid-Byte

D7 D6 D5 D4 D3 D2 D1 D0

Low-Byte

1110CI1CI0ODOF

B) 16-bit Conversion Data Word (CS5521/23)

0 - always zero, 1 - always 1

CI1, CI0 - Channel Indicator Bits

OD - Oscillation Detect, OF - Overflow

Figure 3. Bit Representation/Storage in 80C51

3.4 Transfer Data To/From PC

Transferring data to and from a PC through the

80C51’s serial port is accomplished with the rou­tines txser and rxser. These two routines rely upon
status bits in the 80C51’s Serial Control Register
(SCON, located at address 0x98 Hex). Txser trans­fers data to the serial port by first polling TI (Trans­fer Interrupt, bit 1 in SCON) until the 80C51’s
serial buffer is empty, and ready to receive infor­mation. Once TI is at a logic high level, the soft­ware clears the TI bit and moves the byte to be
transferred into the 80C51’s serial buffer, where it
is transmitted to the PC LSB first. Rxse r receives a
byte in a similar fashion, by polling RI (Receive In­terrupt, bit 0 in SCON) until there is valid data
available in the 80C51’s serial buffer. When RI is
at a logic high level, the data is transferred out of
the serial buffer to an immediate memory location.

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Figure 4. Write-Cycle Timing

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Figure 5. R ead-Cycle Timing

SCLK

SDI

*

t

ommand Time

C

8SCLKs

DO

S

td = XIN/OWR clock cycles for each conversion except the

*

first conversion which will take XIN/OWR + 7 clock cycles

d

Data SDO Continuous Conversion Read

SCLKs Clear SDO Flag

8

SB

M

ata Time

D
24 SCLKs

IN/OWR

X

Clock Cycles

SB

L

Figure 6. Conversion/Acquisition Cycle Timing

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3.5 Decoding PC Commands

The decode_command routine is where most of the
functionality of the program lies. It consists of
many smaller routines to direct the flow of data to
the proper locations. Decode_command accepts in­formation from the PC, decides which tasks need to
be done based on that information, and carries out
those tasks accordingly. This is accomplished
through the use of a very large switch statement,
based on the input command byte, which tests for
every possibility and performs the appropriate rou-

tines shown in Section 7. “Appendix: 80C51 Mi­crocontroller Code” on page 9.

Write Register - If t he PC has sent a com mand to
write to a specific register in the
CS5521/22/23/24/28, three more bytes are re­ceived from th e PC using rxser (24-bit data is al­ways transferred via the UART in the order: low
byte, middle byte, high byte). Then the informa­tion, including the command byte is sent to the con­verter using the write_to_register function. In
contrast with the PC serial data, data transferred to
or from the ADC is always in the order: high byte,
middle byte, low byte.

Write Channel Setup Registers - In the case that the
PC requests to write to the Channel Setup Registers
(CSRs), the program receives another byte from the
PC to find out how many registers to write to. The
command word 0x05(HEX) is sent to the ADC to
begin writing to the registers. The data is received
from the PC using rxser, and sent directly to the
ADC using transfer_byte. This process of receiv­ing data from the PC and transferring it to the ADC
is repeated until the requested number of bytes has
been sent to the PC.

Read Registers - When the decoded command is
asking to read the ADC’s internal registers,
read_register is called, using the command sent
from the PC. The information obtained by this
function is then sent to the PC using txser.

Read Conversion Data FIFO - To read the conver­sion data FIFO, the sample size requested, the con­version channel, and the loop bit status are received
from the PC, in that order. The conversion channel
is then sent to the ADC to begin a conversion, and
SDO is polled until it falls, indicating that the con­version is complete. At this time, a byte of zeros is
sent to the ADC to initiate the data transfer, and the
program loops through to receive each 24-bit con­version word and send it to the PC, for as many
times as the sample size that has been requested. If
the LP bit is set, then another sampl e set is received
from the ADC, but not sent to the PC.

Read Channel Setup Registers - To read the CSRs,
this algorithm first obtains the number of registers
to read from the PC using rxser. It then transfers the
0x0D(HEX) command to the ADC, indicating that
the CSRs are to be read. Next, the individual regis­ters are read from the ADC and sent to the PC until
the number of registers specified by the PC com­mand has been met.

Normal Conversions - For a normal conversion us­ing any Setup, the read_conversion subroutine is
executed using the appropriate command word.
The data is then sent directly to the PC using txser.

Self Calibration - To perform a self-offset or self­gain calibration using any Setup, the appropriate
command word is sent to the ADC, and SDO is
polled until the calibration is complete to avoid
sending a new command when the ADC is busy.

System Calibration - System-offset and system­gain calibrations use the same procedure as self cal­ibration, but areseparated in the code to set the two
command sets apart from one another.

Variable Number of Normal Conversions - This
routine is used when a set of samples is requested
from the PC (as opposed to a single sample). The
sample index is obtained from the PC, as well as the
Setup to be used. The decode_sample_index rou­tine is then called to find out exactly how many
conversions to perform. The conversion channel

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data is then transferred to the ADC, and SDO is
polled until the conversion is ready. A byte of zeros
is then transmitted to the ADC to begin the data
transfer, and the data word is received. The data
word is then sent to the PC, and the process is re­peated until the sample size has been reached. Once
enough samples have been collected and trans­ferred to the PC, a command byte consisting of all
ones is sent to the ADC to instruct it to stop con­verting data, and the final conversion word is re­ceived from the ADC and discarded.

Variable Number of Offset or Gain Calibrations ­When more than one offset or gain calibration is re­quested, the software obtains a sample index, the
type of calibration (self or system), and which Set­up is being used to calibrate from the PC.
Decode_sample_index is called to determine the
actual number of calibrations to be performed, and
then the calibration type is sent to the ADC. SDO is
polled until the calibration is completed, and then
the calibration register is sent. The calibrated regis­ter is returned by the ADC, and sent to the PC. This
process continues until the number of calibrations
requested have been performed.

Serial Port Initialization - This routine re-initialize s
the serial port on the ADC if it is requested. To ac­complish this, the SDI pin is set to a l ogic high lev­el, and SCLK is pulsed 255 times. SDI is then
brought low and a single SCLK pulse is sent. This
initialization routine is the same as what is done
within the start-up initialize command, but is l imit­ed to the serial port on the ADC.

cycle and poll the RV bit until the reset is success­ful.

Read Output Latch Pins - The ADC’s output latch
pins (A0 and A1) are connected to pins P1.4 and
P1.5, respectively, on the 80C51. If the PC requests
the status of these pins, they are read from the prop­er pins and transmitted to the PC.

Arbitrary Read - This routine is used to read any
number of bytes from the ADC and return them to
the PC. The number of bytes requested is obtained
from the PC, and then bytes are successively read
from the ADC and transmitted to the PC until that
number has been reached.

Arbitrary Write - This routine asks for one byte
from the PC, and transfers it to the ADC.

If none of these conditions are met, the software
does nothing but return to the main routine.

3.6 Sample Index

When the PC requests an enti re sample set, the mi­crocontroller code assumes that it will be sending a
sample index. This number, 0-10, is passed to the
decode_sample_index routine to select one of the
ten sample set size options. The sample s et sizes are
based on the FFT algorithms in the PC evaluation
board software, which require a sample set size of

N

samples, and the software’s internal limitation

2

of between 16 and 8192 samples. A single sample
option is also included, and if none of these are se­lected, the sample size defaults to zero.

3.7 Test Modes

Reset Converter Via RS and RV Bits - This routine
resets the ADC, and returns all of its internal regis­ters to their initial states. The command 0x03 fol­lowed by 0x800000(HEX) is sent to the ADC,
which sets the RS (Reset) bit and nothing else.
Then the 0x0B(HEX) register is read, and the low
byte is masked for the RV (Reset Valid) bit. If a
valid reset has occurred, the RS bit is cleared. If no
valid reset has occurred, the routine continues to

6 AN118REV2

There are a seven self-test modes built in the con­troller software, contained in the routine test_mode.
These tests allow the user to troubleshoot certain
problems that may be occurring with the evaluation
board and its software. The test modes are entered
by setting the DIP switches to a value greater than
zero and resetting the board. This instructs the main
routine to skip over the normal operation loop and
go straight into test mode. To exit any of these rou-

AN118

tines, the user must place the DIP switches back

into the ‘000’ position and reset the evaluation
board. Each of the seven test modes is now de­scribed.

Mode 1, Loop Back Test - This test is used to check
the 80C51’s on-chip UART. To perform this test,
the user must place HDR7 in loop back position as
indicated on the evaluation board, and set the DIP
switches to ‘001’. When this mode is entered, a
byte (0xAA) is sent out to the UART and then a
byte is received from the UART. A delay is insert­ed to allow time for the information t o be transmit­ted and received, and then the received byte is
compared to the transmitted information. If the re­ceived byte is equal to 0xAA(HEX), then the test
was successful, and the code calls the
toggle_all_leds routine, which continuously blinks
all four LEDs. If the information does not match
up, the test failed, and the code branches to the
toggle_two_leds routine, which continuously
blinks only the first two LEDs (RESET and
COMM).

Mode 2, Read/Write to ADC - This mode tests the
microcontroller’s ability to read and write the inter­nal registers of the ADC. To perform this test, the
user sets the DIPs to ‘010’ and resets the board.
Upon entering this test mode, the code writes
0xAA0000(HEX) to both the offset and gain regis­ters of Physical Channel 1 (PC1). The information
is then read from these two registers, and the high
byte of each is compared to the value 0xAA(HEX).
If they are both the same, then the test passed, and
toggle_all_leds is called. If either of the registers
were not written properly, the test failed, and
toggle_two_leds is called.

Mode 3, Continuously Acquire Single Conversion

- In this mode, conversions are continuously ob­tained from the ADC. This test mode is initi ated by
setting the DIPs to ‘011’. The first two LEDs are
lighted, and the code loops and continuously gath­ers conversions until the evaluation board is reset.

By probing HDR6 on the evaluation board and us­ing CS as a triggering pin, an oscilloscope or logic
analyzer will display how the m icrocontroller reads
conversion data in real-time.

Mode 4, Continuously Write Gain Register - In
mode 4, the gain register of PC1 is written to con­tinuously. The test mode is entered by setting the
DIPs to ‘100’. The third LED (GAIN_CAL) is lit,
and the code loops and keeps writing to the gain
register of PC1 until the evaluation board is re­set.By probing HDR6 on the evaluation board and
using CS as a triggering pin, an oscilloscope or log­ic analyzer will display how the microcontroller
writes information to the ADC’s internal registers
in real-time.

Mode 5, Continuously Read Gain Register - This
mode continuously reads the gain register on PC1.
Setting the DIPs to ‘101’ selects this test mode. The
odd LEDs (RESET and GAIN_CAL) are lit, and
the code loops through to read from the gain regis­ter of PC1 until the evaluation board is reset. By
probing HDR6 on the evaluation board and using
CS as a triggering pin, an oscilloscope or logic an­alyzer will display how the microcontroller reads
data from the ADC’s internal registers in real-time.

Mode 6, PC to Microcontroller RS-232 Communi­cation Link Test - This test is performed in con­junction with the PC to verify that the RS-232 link
is fully operational on both ends. Setting the DIPs
to ‘110’ selects for this test mode. When HDR7 is
in the Normal position, the controller receives three
bytes of information from the PC, and then echoes
them back in the same order that they were re­ceived and calls toggle_all_leds. When HDR7 is in
the Loopback position, the three bytes are automat­ically looped back to the PC through the RS-232
circuitry. The PC software indicates whether this
test passes or fails, based upon the bytes it receives
back from the board.

Mode 7, Toggle LEDs - This mode is used to test
the functionality of the LEDs on the evaluation

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board, and is entered by setting the DIPs to ‘111’.
Immediately upon entering mode 7, the
toggle_all_leds routine is called to blink the LEDs
repeatedly until the board is reset.

4. MAXIMUM SCLK RATE

A machine cycle in the 80C51 consists 12 oscillator
periods or 1µs if the microcontroller’s oscillator
frequency is 12 MHz. Since the
CS5521/22/23/24/28’s maximum SCLK rate is
2MHz, additional no operation (NOP) delays may
be necessary to reduce the transfer rate if the micro­controller system requires higher rate oscillators.

5. DEVELOPMENT TOOL DESCRIPTION

The code in this application note was developed us­ing a software development package from Franklin
Software, Inc. The code consists of intermixed C
and assembler algorithms which are used by the
CDB5521/22/23/24/28, a customer evaluation
board designed to help customers evaluate the per­formance of the CS5521/22/23/24/28 devices.

6. CONCLUSION

This application note describes code that can be
used to interface an 80C51 to both the
CS5521/22/23/24/28 ADC and a PC. It is divided
into two main sections: hardware and software. The
hardware interface illustrates both a three-wire and
a four-wire interface between the 80C51 and the
ADC. The three-wire is SPI™ and MICROWIRE™

compatible. The software, developed with develop­ment tools from Franklin Software, Inc., is used in
conjunction with the PC evaluation software and
the CDB5521/22/23/24/28 evaluation board to pro-

vide a system by which the CS5521/22/23/24/28’s
performance can be evaluated. There are four main
routines which interface the CS5521/22/23/24/28
to the 80C51, and provide the communication be­tween the 80C51 and the PC, e.g. transfer_byte,
receive_byte, txser, and rxser. These four routines
are written in 80C51 assembly language, and are
easily imported into application-specific designs
by both C and assembly programmers.

All of the software described in this note is includ­ed Section 7. “Appendix: 80C51 Microcontroller
Code” on page 9.

8 AN118REV2

7. APPENDIX: 80C51 MICROCONTROLLER CODE

/*CS5521/22/23/24/28 Runtime Constants and Prototypes*/
/*PROTOTYPES*/
void initialize(void);
void decode_command(char command);
void decode_sample_index(void);
void TXSER(char);
char RXSER(void);
char receive_byte(void);
void transfer_byte(char);
void write_to_register(char command,char low,char mid, char high);
void read_register(char command);
void read_conversion(char command);
void Delay(void);
void test_mode(void);
void toggle_all_leds(void);
void toggle_two_leds(void);

/* BYTE Register equates for the register ports */
sfr P0 = 0x80;
sfr P1 = 0x90;
sfr P2 = 0xA0;
sfr P3 = 0xB0;
sfr PSW = 0xD0;
sfr ACC = 0xE0;
sfr B = 0xF0;
sfr SP = 0x81;
sfr DPL = 0x82;
sfr DPH = 0x83;
sfr PCON = 0x87;
sfr TCON = 0x88;
sfr TMOD = 0x89;
sfr TL0 = 0x8A;
sfr TL1 = 0x8B;
sfr TH0 = 0x8C;
sfr TH1 = 0x8D;
sfr IE = 0xA8;
sfr IP = 0xB8;
sfr SCON = 0x98;
sfr SBUF = 0x99;

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/*PORT 1 equates*/
sbit CS = 0x90 ; /* Ch ip Select */
sbit SDI = 0x91 ; /* Serial Data In */
sbit SDO = 0x92 ; /* Serial Data Out */

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sbit SCLK = 0x93 ; /* Serial Clock */
sbit A1 = 0x94 ; /* Latch Inp ut */
sbit A0 = 0x95 ; /* Latch Inp ut */

sbit RESET = 0xA3;
sbit COMM = 0xA2;
sbit GAIN_CAL = 0xA1;
sbit OFFSET_CAL = 0xA0;

sbit TEST_BIT1 = 0xB2;
sbit TEST_BIT2 = 0xB3;
sbit TEST_BIT3 = 0xB4;

sbit MODE = 0x80;
sbit CTRL3 = 0x83;
sbit CTRL2 = 0x84;
sbit CTRL1 = 0x85;

/* BIT Register */
/* PSW */
sbit CY = 0xD7;
sbit AC = 0xD6;
sbit F0 = 0xD5;
sbit RS1 = 0xD4;
sbit RS0 = 0xD3;
sbit OV = 0xD2;
sbit P = 0xD0;

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/* TCON */
sbit TF1 = 0x8F;
sbit TR1 = 0x8E;
sbit TF0 = 0x8D;
sbit TR0 = 0x8C;
sbit IE1 = 0x8B;
sbit IT1 = 0x8A;
sbit IE0 = 0x89;
sbit IT0 = 0x88;

/* IE */
sbit EA = 0xAF;
sbit ES = 0xAC;
sbit ET1 = 0xAB;
sbit EX1 = 0xAA;
sbit ET0 = 0xA9;
sbit EX0 = 0xA8;

/* IP */
sbit PS = 0xBC;
sbit PT1 = 0xBB;

10 AN118REV2