CHIMEI INNOLUX M220Z1-PS3 Specification

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TFT LCD Approval Specification

Model No : M220Z1-PS3

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Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

Customer :

pproved by :

Note :

2008-07-07

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Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

- CONTENTS -

REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION ------------------------------------------------------- 4

1.1 OVERVIEW

1.2 FEATURES

1.3 APPLICATION

1.4 GENERAL SPECIFICATIONS

1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

2.2 ABSOLUTE RATINGS OF ENVIRONMENT

2.3 ELECTRICAL ABSOLUTE RATINGS

3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE

4. BLOCK DIAGRAM ------------------------------------------------------- 8

4.1 TFT LCD MODULE

5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 9

5.1 TFT LCD MODULE

5.2 COLOR DATA INPUT ASSIGNMENT

6. INTERFACE TIMING ------------------------------------------------------- 12

6.1 INPUT SIGNAL TIMING SPECIFICATIONS

6.2 POWER ON/OFF SEQUENCE

7. DRIVER DC CHARACTERISTICS ------------------------------------------------------- 14

7.1 RSDS CHARACTERISTICS

7.2 ELECTRICAL CHARACTERISTICS (VSSD=VSSA=0V)

8. DRIVER AC CHARACTERISTICS ------------------------------------------------------- 16

9. VERTICAL TIMING ------------------------------------------------------- 17

10. OPTICAL CHARACTERISTICS ------------------------------------------------------- 18

10.1 TEST CONDITIONS

10.2 OPTICAL SPECIFICATIONS

10.3 FLICKER ADJUSTMENT

11. PACKAGING ------------------------------------------------------- 23

11.1 PACKING SPECIFICATIONS

11.2 PACKING METHOD

12. DEFINITION OF LABELS ------------------------------------------------------- 25

12.1 OPEN CELL LABEL

12.2 CARTON LABEL

13. PRECAUTIONS ------------------------------------------------------- 27

13.1 ASSEMBLY AND HANDLING PRECAUTIONS

13.2 SAFETY PRECAUTIONS

14. PANEL DRAWING ------------------------------------------------------- 28

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REVISION HISTORY

Version Date Section Description

Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

Ver. 2.0

Ver. 2.1

Jan., 04 ’08

Jun., 12 ‘08 -3.1

10.2

M220Z1- PS3 Approval Specifications was first issued.

Modified VCOM PWM Frequency from 27KHz to 94KHz.

Modified Center Transmittance from TYP 5.9 to min 5.2, TYP 5.8.

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1. GENERAL DESCRIPTION

1.1 OVERVIEW

The M220Z1-PS3 is a 22-inch wide TFT LCD cell with driver ICs and a RSDS circuit board. The product

supports 1680 x 1050 WSXGA+ mode. The backlight unit is not built in.

1.2 FEATURES

Super wide viewing angle

High contrast ratio

Fast response time

High color saturation

WSXGA+ (1680 x 1050 pixels) resolution

RSDS (Reduced Swing Differential Signaling) Interface

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Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

RoHS Compliance

1.3 APPLICATION

TFT LCD Monitor

TFT LCD TV

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Diagonal Size 22 inch
Active Area 473.76 (H) x 296.10 (V) mm (1)
Driver Element a-si TFT active matrix - ­Pixel Number 1680 x R.G.B. x 1050 pixel ­Pixel Pitch 0.282 (H) x 0.282 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Anti-glare (Haze 25%)

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note
Weight
I/F connector mounting
position

Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

The mounting inclination of the connector makes
the screen center within ±0.5mm as the horizontal.

-

- 620 g -

- (2)

(2) Connector mounting position

+/- 0.5mm

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)

Note (1) Temperature and relative humidity range is shown in the figure below.

(a) 90 %RH Max. (Ta Љ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.

Relative Humidity (%RH)

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Value

Min. Max.

Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

Unit Note

100

90

80

60

40

20
10

Operating Range

Storage Range

8060-20 400 20-40

Temperature (ºC)

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2.2 ABSOLUTE RATINGS OF ENVIRONMENT (OPEN CELL)

High temperature or humidity may reduce the performance of panel. Please store LCD panel within the

specified storage conditions.

Storage Condition: With packing.

Storage temperature range: 25±5 ºC.

Storage humidity range: 50±10%RH.

Shelf life: 30days

2.3 ELECTRICAL ABSOLUTE RATINGS (OPEN CELL)

Item Symbol

Power Supply Voltage for
LCD

Note (1) Permanent damage might occur if the module is operated at conditions exceeding the maximum

Vin 4.5 5.7 V (1)

Min. Max.

Value

Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

Unit Note

values.

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3. ELECTRICAL CHARACTERISTICS (OPEN CELL)

Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

3.1 TFT LCD OPEN CELL

Parameter SYMBOL

Power Supply Voltage for LCD Vin 4.5 5 5.7 V ­Power Supply Current for LCD Iin - 1000 - mA ­Differential Impendence Zm - 100 -

LCD Inrush Current Irush - 3 - A -

High VCOM_PWM 2.5 - - V - VCOM PWM
Low - - 0.6 V -

VCOM PWM Frequency VCOM_PWM - 94 - KHz Adjustable Duty

MIN TYP MAX

Value

Ta = 25 ± 2 ºC

UNIT Note

Ө

-

Cycle

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4. BLOCK DIAGRAM

4.1 TFT LCD MODULE

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Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

FR0~2(+/-)

FB0~2(+/-)

FG0~2(+/-)

FCK(+/-)

BR0~2(+/-)

BG0~2(+/-)

BB0~2(+/-)

BCK(+/-)

F/BSTHI

GVON

VCM_PWM

V5A

GND

SCAN DRIVER IC

INPUT CONNECTOR

(ZIF-55-0.5-2)

TFT LCD PANEL

(1680x3x1050)

DATA DRIVER IC

DC/DC CONVERTER &

REFERENCE VOLTAGE

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE

(1)CN1 (Panel Interface)

Pin Name Description

1 BB2P Positive RSDS differential data input. Channel B2(Back)
2 BB2N Negative RSDS differential data input. Channel B2(Back)
3 BB1P Positive RSDS differential data input. Channel B1(Back)
4 BB1N Negative RSDS differential data input. Channel B1(Back)
5 BB0P Positive RSDS differential data input. Channel B0(Back)
6 BB0N Negative RSDS differential data input. Channel B0(Back)
7 BG2P Positive RSDS differential data input. Channel G2(Back)
8 BG2N Negative RSDS differential data input. Channel G2(Back)

9 BG1P Positive RSDS differential data input. Channel G1(Back)
10 BG1N Negative RSDS differential data input. Channel G1(Back)
11 BG0P Positive RSDS differential data input. Channel G0(Back)
12 BR0N Negative RSDS differential data input. Channel R0(Back)
13 BCKP Positive RSDS differential clock input. (Back)
14 BCKN Negative RSDS differential clock input. (Back)
15 BR2P Positive RSDS differential data input. Channel R2(Back)
16 BR2N Negative RSDS differential data input. Channel R2(Back)
17 BR1P Positive RSDS differential data input. Channel R1(Back)
18 BR1N Negative RSDS differential data input. Channel R1(Back)
19 BR0P Positive RSDS differential data input. Channel R0(Back)
20 BR0N Negative RSDS differential data input. Channel R0(Back)
21 FB2P Positive RSDS differential data input. Channel B2(Front)
22 FB2N Negative RSDS differential data input. Channel B2(Front)
23 FB1P Positive RSDS differential data input. Channel B1(Front)
24 FB1N Negative RSDS differential data input. Channel B1(Front)
25 FB0P Positive RSDS differential data input. Channel B0(Front)
26 FB0N Negative RSDS differential data input. Channel B0(Front)
27 FG2P Positive RSDS differential data input. Channel G2(Front)
28 FG2N Negative RSDS differential data input. Channel G2(Front)
29 FG1P Positive RSDS differential data input. Channel G1(Front)
30 FG1N Negative RSDS differential data input. Channel G1(Front)
31 FG0P Positive RSDS differential data input. Channel G0(Front)
32 FG0N Negative RSDS differential data input. Channel G0(Front)
33 FCKP Positive RSDS differential clock input. (Front)
34 FCKN Negative RSDS differential clock input. (Front)
35 FR2P Positive RSDS differential data input. Channel R2(Front)
36 FR2N Negative RSDS differential data input. Channel R2(Front)
37 FR1P Positive RSDS differential data input. Channel R1(Front)
38 FR1N Negative RSDS differential data input. Channel R1(Front)
39 FR0P Positive RSDS differential data input. Channel R0(Front)
40 FR0N Negative RSDS differential data input. Channel R0(Front)
41 BSTHI Data driver start pulse input(Back)
42 FSTHI Data driver start pulse input(Front)
43 POL Data driver polarity inverting input

The contents of the data driver register are transferred to the latch circuit at the

44 STB

45 STV

rising edge of STB. Then the gray scale voltage is output from the device at the
falling edge of STB.
Gate driver start pulse is read at the rising edge of CKV and a scan signal is
output from the gate driver output pin.

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Doc No.: 44081436
Issued Date: Jun. 12, 2008
Model No.: M220Z1-PS3

Approval

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