The Intel® Desktop Board D945GBO may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D945GBO Specification Update.
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D945GBO Technical Product
Specification.
This product specification applies to only the standard Intel Desktop Board D945GBO with BIOS
identifier NT94510J.86A.
Changes to this specification will be published in the Intel Desktop Board D945GBO Specification
Update before being incorporated into a revision of this document.
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MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.
®
All Intel
installation in homes, offices, schools, computer rooms, and similar locations. The suitability of this product for other PC or
embedded non-PC applications or other environments, such as medical, industrial, alarm systems, test equipment, etc. may
not be supported without further evaluation by Intel.
desktop boards are evaluated as Information Technology Equipment (I.T.E.) for use in personal computers (PC) for
January 2006
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provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other
intellectual property rights.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.”
Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising
from future changes to them.
Intel desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
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Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel, Pentium, and Celeron are registered trademarks of Intel Corporation or its subsidiaries in the United States and other
countries.
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
®
power and environmental requirements, and the BIOS for the Intel
describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Board D945GBO
and its components to the vendors, system integrators, and other engineers and technicians who
need this level of information. It is specifically not intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the Desktop Board D945GBO
2 A map of the resources of the Desktop Board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
Desktop Board D945GBO. It
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
INTEGRATOR’S NOTES
#
Integrator’s notes are used to call attention to information that may be useful to system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the Desktop Board D945GBO, and X is the instance of the
particular part at that general location. For example, J5J1 is a connector, located at 5J. It is
the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
Gbits/sec Gigabits per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
iv
Contents
1 Product Description
1.1 Power Connector Terminology Change.........................................................................9
Technical Product Specifications for ATX and microATX desktop boards referred to the 2 x 2
power connector as the ATX12V connector. With the arrival of BTX form factor desktop boards,
this connector will henceforth be referred to as the Processor Core Power connector.
• Intel
Intel
8-channel (7.1) audio subsystem with five analog audio outputs and one S/PDIF
digital audio output (optical) using the Sigmatel* 9220/9223 audio codec
Legacy I/O controller for diskette drive, serial, parallel, and PS/2* ports
Support for USB 2.0 devices
• Eight USB ports
• One serial port
• Four Serial ATA interfaces
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100 support
• One diskette drive interface
• PS/2 keyboard and mouse ports
RAID support (levels 0,1, 0+1, and 5) on the SATA interface
IEEE-1394a controller and three IEEE-1394a connectors (one back panel
connector, two front-panel connectors)
Gigabit (10/100/1000 Mbits/sec) LAN subsystem using the Intel
Ethernet Controller
• Intel
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
• Two PCI Conventional* bus connectors
• One PCI Express* x1 bus add-in card connector
• One PCI Express x16 bus add-in card connector
• Support for PCI Local Bus Specification Revision 2.3
• Support for PCI Express Revision 1.0a
• Suspend to RAM support
• Wake on PCI, RS-232, front panel, PS/2 devices, and USB ports
• Support for Intel
82801GH I/O Controller Hub (ICH7DH)
®
GMA950 onboard graphics subsystem
®
BIOS (resident in the SPI Flash device)
and SMBIOS
Pentium® D processor in an LGA775 socket with a 1066 or
®
Quick Resume Technology Drivers (Intel® QRTD)
®
82573L Gigabit
continued
10
Product Description
Table 1. Feature Summary (continued)
Hardware Monitor
Subsystem
• Hardware monitoring and fan control ASIC
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Three fan connectors
• Three fan sense inputs used to monitor fan activity
• Fan speed control
1.2.2 Manufacturing Options
Table 2 describes the manufacturing options. Not every manufacturing option is available in all
marketing channels. Please contact your Intel representative to determine which manufacturing
options are available to you.
Table 2. Manufacturing Options
Parallel Port
Trusted Platform
Module (TPM),
revision 1.2
For information about Refer to
Available configurations for the board Section 1.3, page 15
One 25-pin D-Sub parallel port connector on the back panel.
A component that enhances platform security.
Figure 1 shows the location of the major components.
BAC
FF
EE
DD
CC
BB
AA
Z
D
E
F
G
H
Y
X
W
Figure 1. Board Components
Table 3 lists the components identified in Figure 1.
I
J
K
L
M
N
P
OSRTUVQ
OM17934
12
Table 3. Board Components Shown in Figure 1
Item/callout
from Figure 1 Description
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
AA
BB
CC
DD
EE
FF
Front panel audio connector
Back panel connectors
Main power connector
Front panel USB connectors [2]
Serial ATA connectors [4]
PCI Express x16 bus add-in card connector
PCI Conventional bus add-in card connectors [2]
PCI Express x1 bus add-in card connector
Speaker
IEEE-1394a controller
BIOS Setup configuration jumper block
Front panel IEEE-1394a connectors [2]
Legacy I/O controller
Diskette drive connector
Front panel connector
Front chassis fan connector
Auxiliary front panel power LED connector
Intel 82801GH I/O Controller Hub (ICH7DH)
LGA775 processor socket
Intel 82945G GMCH
Remote thermal sensor
Processor core power connector
Processor fan connector
DIMM Channel A sockets [2]
DIMM Channel B sockets [2]
Rear chassis fan connector
SPI flash device
Battery
Ethernet device
Audio codec
Parallel ATE IDE connector
Chassis intrusion connector
Figure 2 is a block diagram of the major functional areas.
PCI Express x1 Slot 1
Parallel ATA
IDE Connector
LGA775
Processor Socket
PCI Express
x16 Interface
PCI Express
x16
Connector
VGA
Port
Channel A
DIMMs (2)
Channel B
DIMMs (2)
Display Interface
PCI Express x1 Interface
Parallel ATA
IDE Interface
System Bus
(1066/800 MHz)
Intel 945G Chipset
Intel 82945G
Graphics and
Memory Controller
Hub (GMCH)
Dual-Channel
Memory Bus
SMBus
DMI Interconnect
Gigabit Ethernet
Legacy
I/O
Controller
LPC
Bus
Intel 82801GH
I/O Controller Hub
(ICH7DH)
Serial ATA
IDE Interface
Controller
USB
LPC
Bus
LAN
Connector
Back Panel/Front Panel
USB Ports
Serial Port
Parallel Port (Optional)
PS/2 Mouse
PS/2 Keyboard
Diskette Drive
Connector
Serial Peripheral
Interface (SPI)
Flash Device
TPM Component
(Optional)
Serial ATA IDE
Connectors (4)
IEEE-1394a Connectors
PCI Slot 1
PCI Slot 2
= connector or socket
IEEE-1394a
Controller
PCI Bus
SMBus
Hardware Monitoring
and Fan Control ASIC
PCI
Bus
Figure 2. Block Diagram
14
High Definition Audio Li nk
Audio
Codec
Line Out
Mic In
Line In/Retasking Jack
Line Out/Retasking Jack
Mic In/Retasking Jack
Center and LFE/
Retasking Jack (optional)
Surround L-R/
Retasking Jack (optional)
S/PDIF (optional)
OM18266
Product Description
1.3 Online Support
To find information about… Visit this World Wide Web site:
Intel Desktop Board D945GBO under
“Desktop Board Products” or “Desktop
Board Support”
Available configurations for the Desktop
Board D945GBO
Processor data sheets http://www.intel.com/design/litcentr
ICH7DH addressing http://developer.intel.com/products/chipsets
Custom splash screens http://intel.com/design/motherbd/gen_indx.htm
Audio software and utilities http://www.intel.com/design/motherbd
LAN software and drivers http://www.intel.com/design/motherbd
Supported video modeshttp://www.intel.com/design/motherbd/bo/bo_documentation.htm
The board is designed to support an Intel Pentium D processor in an LGA775 processor socket with
a 1066 or 800 MHz system bus. See the Intel web site listed below for the most up-to-date list of
supported processors.
The board has four DIMM sockets and support the following memory features:
• 1.8 V (only) DDR2 SDRAM DIMMs with gold-plated contacts
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
• 4 GB maximum total system memory. Refer to Section 2.1.1 on page 45 for information on the
total amount of addressable memory.
• Minimum total system memory: 128 MB
• Non-ECC DIMMs
• Serial Presence Detect
• DDR2 667 or DDR2 533 MHz SDRAM DIMMs
NOTES
To be fully compliant with all applicable DDR SDRAM memory specifications, the board should be
populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This allows
the BIOS to read the SPD data and program the chipset to accurately configure memory settings
for optimum performance. If non-SPD memory is installed, the BIOS will attempt to correctly
configure the memory settings, but performance and reliability may be impacted or the DIMMs
may not function under the determined frequency.
Table 4 lists the supported DIMM configurations.
Table 4. Supported Memory Configurations
DIMM
Capacity
128 MB SS 256 Mbit 16 M x 16/empty 4
256 MB SS 256 Mbit 32 M x 8/empty 8
256 MB SS 512 Mbit 32 M x 16/empty 4
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
512 MB SS 512 Mbit 64 M x 8/empty 8
512 MB SS 1 Gbit 64 M x 16/empty 4
1024 MB DS 512 Mbit 64 M x 8/64 M x 8 16
1024 MB SS 1 Gbit 128 M x 8/empty 8
2048 MB DS 1 Gbit 128 M x 8/128 M x 8 16
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers
to single-sided memory modules (containing one row of SDRAM).
INTEGRATOR’S NOTE
#
Configuration
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
Refer to Section 2.1.1, on page 45 for additional information on available memory.
16
Product Description
1.5.1 Memory Configurations
The Intel 82945G GMCH supports two types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for real world
applications. Dual channel mode is enabled when the installed memory capacities of both
DIMM channels are equal. Technology and device width can vary from one channel to the
other but the installed memory capacity for each channel must be equal. If different speed
DIMMs are used between channels, the slowest memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth
operation for real world applications. This mode is used when only a single DIMM is installed
or the memory capacities are unequal. Technology and device width can vary from one
channel to the other. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
Figure 3 illustrates the memory channel and DIMM configuration.
NOTE
The DIMM0 sockets of both channels are blue. The DIMM1 sockets of both channels are black.
Figure 4 shows a dual channel configuration using two DIMMs. In this example, the DIMM0
(blue) sockets of both channels are populated with identical DIMMs.
1 GB
Channel A, DIMM 0
Channel A, DIMM 1
1 GB
Channel B, DIMM 0
Channel B, DIMM 1
OM17942
Figure 4. Dual Channel (Interleaved) Mode Configuration with Two DIMMs
Figure 5 shows a dual channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMM0
(blue) socket of Channel B.
256 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
Figure 5. Dual Channel (Interleaved) Mode Configuration with Three DIMMs
18
OM17943
Product Description
Figure 6 shows a dual channel configuration using four DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in
Channel B. Also, the DIMMs are matched between DIMM0 and DIMM1 of both channels.
256 MB
512 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17944
Figure 6. Dual Channel (Interleaved) Mode Configuration with Four DIMMs
1.5.1.2 Single Channel (Asymmetric) Mode Configurations
NOTE
Dual channel (Interleaved) mode configurations provide the highest memory throughput.
Figure 7 shows a single channel configuration using one DIMM. In this example, only the DIMM0
(blue) socket of Channel A is populated. Channel B is not populated.
256 MB
Figure 7. Single Channel (Asymmetric) Mode Configuration with One DIMM
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17945
Figure 8 shows a single channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the
DIMM0 (blue) socket of Channel B.
256 MB
512 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
Figure 8. Single Channel (Asymmetric) Mode Configuration with Three DIMMs
20
OM17946
Product Description
1.6 Intel® 945G Chipset
The Intel 945G chipset consists of the following devices:
• Intel 82945G Graphics Memory Controller Hub (GMCH) with Direct Media Interface (DMI)
interconnect
• Intel 82801GH I/O Controller Hub (ICH7DH) with DMI interconnect
The GMCH component provides interfaces to the CPU, memory, PCI Express, and the DMI
interconnect. The component also provides integrated graphics capabilities supporting 3D, 2D and
display capabilities. The ICH7DH is a centralized controller for the board’s I/O paths.
For information about Refer to
The Intel 945G chipset http://developer.intel.com/
Resources used by the chipset Chapter 2
1.6.1 Intel 945G Graphics Subsystem
The Intel 945G chipset contains two separate, mutually exclusive graphics options. Either the
GMA950 graphics controller (contained within the 82945G GMCH) is used, or a PCI Express x16
add-in card can be used. When a PCI Express x16 add-in card is installed, the GMA950 graphics
controller is disabled.
1.6.1.1 Intel® GMA950 Graphics Controller
The Intel GMA950 graphics controller features the following:
• 3D Graphics Rendering enhancements
⎯ 1.3 Dual Texture GigaPixel/Sec Fill Rate
⎯ 16 and 32 bit color
⎯ Maximum 3D supported resolution of 1600 x 1200 x 32 at 85 Hz
⎯ Vertex cache
⎯ Anti-aliased lines
⎯ OpenGL* version 1.4 support with vertex buffer and EXT_Shadow extensions
• 2D Graphics enhancements
⎯ 8, 16,and 32 bit color
⎯ Optimized 256-bit BLT engine
⎯ Color space conversion
⎯ Anti-aliased lines
• Video
⎯ Hardware motion compensation for MPEG2
⎯ Software DVD at 30 fps full screen
• Display
⎯ Integrated 24-bit 400 MHz RAMDAC
⎯ Up to 2048 x 1536 at 75 Hz refresh (QXGA)
⎯ DDC2B compliant interface
⎯ With Advanced Digital Display 2 or 2+ (ADD2/ADD2+) cards, support for TV-out / TV-in
and DVI digital display connections
⎯ Supports flat panels up to 2048 x 1536 at 60Hz or digital CRT/HDTV at 1920 x 1080 at 85
Hz (with ADD2/ADD2+)
⎯ Two multiplexed DVO port interfaces with 200 MHz pixel clocks using an ADD2/ADD2+
card
• Dynamic Video Memory Technology (DVMT) support up to 224 MB
DVMT enables enhanced graphics and memory performance through Direct AGP, and highly
efficient memory utilization. DVMT ensures the most efficient use of available system memory for
maximum 2-D/3-D graphics performance. Up to 224 MB of system memory can be allocated to
DVMT on systems that have 512 MB or more of total system memory installed. Up to 128 MB can
be allocated to DVMT on systems that have 256 MB but less than 512 MB of total installed system
memory. Up to 64 MB can be allocated to DVMT when less than 256 MB of system memory is
installed. DVMT returns system memory back to the operating system when the additional system
memory is no longer required by the graphics subsystem.
DVMT will always use a minimal fixed portion of system physical memory (as set in the BIOS
Setup program) for compatibility with legacy applications. An example of this would be when
using VGA graphics under DOS. Once loaded, the operating system and graphics drivers allocate
additional system memory to the graphics buffer as needed for performing graphics functions.
NOTE
The use of DVMT requires operating system driver support.
1.6.1.3 Advanced Digital Display (ADD2/ADD2+) Card Support
The GMCH routes two multiplexed DVO ports that are each capable of driving up to a 200 MHz
pixel clock to the PCI Express x16 connector. The DVO ports can be paired for a dual channel
configuration to support up to a 400 MHz pixel clock. When an ADD2/ADD2+ card is detected,
the Intel GMA950 graphics controller is enabled and the PCI Express x16 connector is configured
for DVO mode. DVO mode enables the DVO ports to be accessed by the ADD2/ADD2+ card. An
22
Product Description
ADD2/ADD2+ card can either be configured to support simultaneous display with the primary
VGA display or can be configured to support dual independent display as an extended desktop
configuration with different color depths and resolutions. ADD2/ADD2+ cards can be designed to
support the following configurations:
• TV-Out (composite video)
• Transition Minimized Differential Signaling (TMDS) for DVI 1.0
• Low Voltage Differential Signaling (LVDS)
• Single device operating in dual channel mode
• VGA output
• HDTV output
1.6.1.4 Configuration Modes
A list of supported modes for the Intel GMA950 graphics controller is available as a downloadable
document.
For information about Refer to
Supported video modes for the board Section 1.3, page 15
1.6.2 USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH7DH provides the USB controller for all ports. The port arrangement is as follows:
• Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
• Four ports are routed to two separate front panel USB connectors
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 15, page 52
The location of the front panel USB connectors Figure 16, page 54
• One parallel ATA IDE connector that supports two devices
• Four serial ATA IDE connectors that support one device per connector
1.6.3.1 Parallel ATE IDE Interface
The ICH7DH’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface.
The Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH7DH’s
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives) and ATA
devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
For information about Refer to
The location of the Parallel ATA IDE connector Figure 16, page 54
1.6.3.2 Serial ATA Interfaces
The ICH7DH’s Serial ATA controller offers four independent Serial ATA ports with a theoretical
maximum transfer rate of 3 Gbits/sec per port. One device can be installed on each port for a
maximum of four Serial ATA devices. A point-to-point interface is used for host to device
connections, unlike Parallel ATA IDE which supports a master/slave configuration and two devices
per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the operating system.
The Serial ATA controller can operate in both legacy and native modes. In legacy mode, standard
IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for configurations
using the Windows* XP and Windows 2000 operating systems.
24
Product Description
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or power
supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
For information about Refer to
The location of the Serial ATA IDE connectors Figure 16, page 54
1.6.3.3 Serial ATA RAID
The ICH7DH supports the following RAID (Redundant Array of Independent Drives) levels:
•RAID 0 - data striping. Multiple physical drives can be teamed together to create one logical
drive. As data is written or retrieved from the logical drive, both drives operate in parallel, thus
increasing the throughput. The ICH7DH allows for more than two drives to be used in a
RAID 0 configuration.
•RAID 1 - data mirroring. Multiple physical drives maintain duplicate sets of all data on
separate disk drives. Level 1 provides the highest data reliability because two complete copies
of all information are maintained. The ICH7DH allows for two or four drives to be used in a
RAID 1 configuration.
•RAID 0+1 (or RAID 10) - data striping and mirroring. RAID 0+1 combines multiple mirrored
drives (RAID 1) with data striping (RAID 0) into a single array. This provides the highest
performance with data protection. Data is striped across all mirrored sets. RAID 0+1 utilizes
several drives to stripe data (increased performance) and then makes a copy of the striped
drives to provide redundancy. The mirrored disks eliminate the overhead and delay of parity.
•RAID 5 - distributed parity. RAID Level 5 stripes data at a block level across several drives
and distributes parity among the drives; no single disk is devoted to parity. Because parity data
is distributed on each drive, read performance tends to be lower than other RAID types.
RAID 5 requires the use of three or four drives.
1.6.4 Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
When the voltage drops below a certain level, the BIOS Setup program settings stored in CMOS
RAM (for example, the date and time) might not be accurate. Replace the battery with an
equivalent one. Figure 1 on page 12 shows the location of the battery.
Risk of explosion if the battery is replaced with an incorrect type. Batteries should be recycled
where possible. Disposal of used batteries must be in accordance with local environmental
regulations.
PRECAUTION
Risque d'explosion si la pile usagée est remplacée par une pile de type incorrect. Les piles usagées
doivent être recyclées dans la mesure du possible. La mise au rebut des piles usagées doit
respecter les réglementations locales en vigueur en matière de protection de l'environnement.
FORHOLDSREGEL
Eksplosionsfare, hvis batteriet erstattes med et batteri af en forkert type. Batterier bør om muligt
genbruges. Bortskaffelse af brugte batterier bør foregå i overensstemmelse med gældende
miljølovgivning.
OBS!
Det kan oppstå eksplosjonsfare hvis batteriet skiftes ut med feil type. Brukte batterier bør kastes i
henhold til gjeldende miljølovgivning.
VIKTIGT!
Risk för explosion om batteriet ersätts med felaktig batterityp. Batterier ska kasseras enligt de
lokala miljövårdsbestämmelserna.
VARO
Räjähdysvaara, jos pariston tyyppi on väärä. Paristot on kierrätettävä, jos se on mahdollista.
Käytetyt paristot on hävitettävä paikallisten ympäristömääräysten mukaisesti.
VORSICHT
Bei falschem Einsetzen einer neuen Batterie besteht Explosionsgefahr. Die Batterie darf nur durch
denselben oder einen entsprechenden, vom Hersteller empfohlenen Batterietyp ersetzt werden.
Entsorgen Sie verbrauchte Batterien den Anweisungen des Herstellers entsprechend.
AVVERTIMENTO
Esiste il pericolo di un esplosione se la pila non viene sostituita in modo corretto. Utilizzare solo
pile uguali o di tipo equivalente a quelle consigliate dal produttore. Per disfarsi delle pile usate,
seguire le istruzioni del produttore.
PRECAUCIÓN
Existe peligro de explosión si la pila no se cambia de forma adecuada. Utilice solamente pilas
iguales o del mismo tipo que las recomendadas por el fabricante del equipo. Para deshacerse de
las pilas usadas, siga igualmente las instrucciones del fabricante.
26
Product Description
WAARSCHUWING
Er bestaat ontploffingsgevaar als de batterij wordt vervangen door een onjuist type batterij.
Batterijen moeten zoveel mogelijk worden gerecycled. Houd u bij het weggooien van gebruikte
batterijen aan de plaatselijke milieuwetgeving.
ATENÇÃO
Haverá risco de explosão se a bateria for substituída por um tipo de bateria incorreto. As baterias
devem ser recicladas nos locais apropriados. A eliminação de baterias usadas deve ser feita de
acordo com as regulamentações ambientais da região.
AŚCIAROŽZNAŚĆ
Існуе рызыка выбуху, калі заменены акумулятар неправільнага тыпу. Акумулятары павінны,
па магчымасці, перепрацоўвацца. Пазбаўляцца ад старых акумулятараў патрэбна згодна з
мясцовым заканадаўствам па экалогіі.
UPOZORNÌNÍ
V případě výměny baterie za nesprávný druh může dojít k výbuchu. Je-li to možné, baterie by měly
být recyklovány. Baterie je třeba zlikvidovat v souladu s místními předpisy o životním prostředí.
Προσοχή
Υπάρχει κίνδυνος για έκρηξη σε περίπτωση που η µπαταρία αντικατασταθεί από µία λανθασµένου
τύπου. Οι µπαταρίες θα πρέπει να ανακυκλώνονται όταν κάτι τέτοιο είναι δυνατό. Η απόρριψη των
χρησιµοποιηµένων µπαταριών πρέπει να γίνεται σύµφωνα µε τους κατά τόπο περιβαλλοντικούς
κανονισµούς.
VIGYAZAT
Ha a telepet nem a megfelelő típusú telepre cseréli, az felrobbanhat. A telepeket lehetőség szerint
újra kell hasznosítani. A használt telepeket a helyi környezetvédelmi előírásoknak megfelelően kell
kiselejtezni.
AWAS
Risiko letupan wujud jika bateri digantikan dengan jenis yang tidak betul. Bateri sepatutnya
dikitar semula jika boleh. Pelupusan bateri terpakai mestilah mematuhi peraturan alam sekitar
tempatan.
Istnieje niebezpieczeństwo wybuchu w przypadku zastosowania niewłaściwego typu baterii. Zużyte
baterie należy w miarę możliwości utylizować zgodnie z odpowiednimi przepisami ochrony
środowiska.
PRECAUŢIE
Risc de explozie, dacă bateria este înlocuită cu un tip de baterie necorespunzător. Bateriile trebuie
reciclate, dacă este posibil. Depozitarea bateriilor uzate trebuie să respecte reglementările locale
privind protecţia mediului.
ВНИМАНИЕ
При использовании батареи несоответствующего типа существует риск ее взрыва.
Батареи должны быть утилизированы по возможности. Утилизация батарей должна
проводится по правилам, соответствующим местным требованиям.
UPOZORNENIE
Ak batériu vymeníte za nesprávny typ, hrozí nebezpečenstvo jej výbuchu.
Batérie by sa mali podľa možnosti vždy recyklovať. Likvidácia použitých batérií sa musí vykonávať
v súlade s miestnymi predpismi na ochranu životného prostredia.
POZOR
Zamenjava baterije z baterijo drugačnega tipa lahko povzroči eksplozijo.
Če je mogoče, baterije reciklirajte. Rabljene baterije zavrzite v skladu z lokalnimi
okoljevarstvenimi predpisi.
.
UYARI
Yanlış türde pil takıldığında patlama riski vardır. Piller mümkün olduğunda geri
dönüştürülmelidir. Kullanılmış piller, yerel çevre yasalarına uygun olarak atılmalıdır.
OСТОРОГА
Використовуйте батареї правильного типу, інакше існуватиме ризик вибуху.
Якщо можливо, використані батареї слід утилізувати. Утилізація використаних батарей
має бути виконана згідно місцевих норм, що регулюють охорону довкілля.
The board provides the following PCI Express connectors:
• One PCI Express x16 connector supporting simultaneous transfer speeds up to 8 GBytes/sec
• One PCI Express x1 connector. The x1 interface supports simultaneous transfer speeds up to
500 MBytes/sec
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems. Additional features of the PCI Express interface include the following:
• Support for the PCI Express enhanced configuration mechanism
• Automatic discovery, link training, and initialization
• Support for Active State Power Management (ASPM)
• SMBus 2.0 support
• Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
• Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1
1.8 IEEE-1394a Connectors
The IEEE-1394a interface addresses interconnection of both computer peripherals and consumer
electronics. The IEEE-1394a interface provides a throughput ranging from 100 Mbits/sec to
400 Mbits/sec. As a manufacturing option, the board includes three IEEE-1394a connectors as
follows:
• One IEEE-1394a connector located on the back panel.
• Two IEEE-1394a front-panel connectors located on the component side.
For information about Refer to
The location of the back panel IEEE-1394a connector Figure 15, page 52
The location of the front panel IEEE-1394a connectors Figure 16, page 54
The signal names of the front panel IEEE-1394a connectors Section 2.7.2.6, page 61
1.9 Legacy I/O Controller
The legacy I/O controller provides the following features:
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.44 MB or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the legacy I/O controller.
30
Product Description
1.9.1 Serial Port
The Serial port A connector is located on the back panel. The serial port supports data transfers at
speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector Figure 15, page 52
1.9.2 Parallel Port (Optional)
The optional 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS
Setup program to set the parallel port mode.
For information about Refer to
The location of the optional parallel port connector Figure 15, page 52
1.9.3 Diskette Drive Controller
The legacy I/O controller supports one diskette drive. Use the BIOS Setup program to configure
the diskette drive interface.
For information about Refer to
The location of the diskette drive connector Figure 16, page 54
1.9.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top PS/2
connector. Power to the computer should be turned off before a keyboard or mouse is connected or
disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 15, page 52
The board supports the Intel High Definition audio subsystem based on the Sigmatel 9220/9223
audio codec. The audio subsystem supports the following features:
• Advanced jack sense for the back panel audio jacks that enables the audio codec to recognize
the device that is connected to an audio port. The back panel audio jacks are capable of
retasking according to user’s definition, or can be automatically switched depending on the
recognized device type.
• Stereo input and output for all back panel jacks
• Line out and Mic in functions for front panel audio jacks
• A signal-to-noise (S/N) ratio of 95 dB
1.10.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.3, page 15
1.10.2 Audio Connectors
The board contains audio connectors on both the back panel and the component side of the board.
The front panel audio connector provides mic in and line out signals for the front panel.
For information about Refer to
The location of the front panel audio connector Figure 16, page 54
The signal names of the front panel audio connector Table 17, page 56
The back panel audio connectors Section 2.7.1, page 52
1.10.3 8-Channel (7.1) Audio Subsystem
The 8-channel (7.1) audio subsystem includes the following:
• Intel 82801GH I/O Controller Hub (ICH7DH)
• Sigmatel 9220/9223 audio codec
• Microphone input that supports a single dynamic, condenser, or electret microphone
The back panel audio connectors are configurable through the audio device drivers. The available
configurable audio ports are shown in Figure 9.
For information about Refer to
The back panel audio connectors Section 2.7.1, page 52
32
Front Panel
Audio Connectors
Product Description
Line Out
Mic In
Surround Left and Right/Retas king Jac k
[Black]
Center channel and LFE (Subwoofe r)/
Retasking Jack [Orange]
S/PDIF Digital Audio Out
Mic In/Retasking Jack
Line Out/Retasking Jack
[Lime Green]
Side Surround
Left and Right/
Line In/Retasking Jack
[Blue]
Optical
[Pink]
Figure 9. Front/Back Panel Audio Connectors
Figure 10 is a block diagram of the 8-channel (7.1) audio subsystem.
LAN software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining LAN software and drivers Section 1.3, page 15
1.11.2 Intel® 82573L Gigabit Ethernet Controller
The Intel 82573L Gigabit Ethernet Controller supports the following features:
• PCI Express link
• 10/100/1000 IEEE 802.3 compliant
• Compliant to IEEE 802.3x flow control support
• Jumbo frame support
• TCP, IP, UDP checksum offload
• Transmit TCP segmentation
• Advanced packet filtering
• Full device driver compatibility
• PCI Express Power Management Support
1.11.2.1 RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector (as shown in Figure 11). Table 5 describes the
LED states when the board is powered up and the Gigabit LAN subsystem is operating.
Green LED
Figure 11. LAN Connector LED Locations
Table 5. LAN Connector LED States
LED Color LED State Condition
Off LAN link is not established.
Left Green
N/A Off 10 Mbits/sec data rate is selected.
Right
Green On 100 Mbits/sec data rate is selected.
Yellow
On LAN link is established.
Blinking LAN activity is occurring.
On
Green/Yellow LED
OM16513
1000 Mbits/sec data rate is selected.
34
Product Description
1.12 Hardware Management Subsystem
The hardware management features enable the board to be compatible with the Wired for
Management (WfM) specification. The board has several hardware management features,
including the following:
• Chassis intrusion detection
• Fan monitoring and control (through the hardware monitoring and fan control ASIC)
• Thermal and voltage monitoring
1.12.1 Hardware Monitoring and Fan Control ASIC
The features of the hardware monitoring and fan control ASIC include:
• Internal ambient temperature sensor
• Two remote thermal diode sensors for direct monitoring of processor temperature and ambient
temperature sensing
• Power supply monitoring of five voltages (+5 V, +12 V, +3.3 VSB, +1.5 V, and +VCCP) to
detect levels above or below acceptable values
• Thermally monitored closed-loop fan control, for all three fans, that can adjust the fan speed or
switch the fans on or off as needed
• SMBus interface
For information about Refer to
The location of the fan connectors and sensors for thermal monitoring Figure 12, page 36
1.12.2 Chassis Intrusion and Detection
The board supports a chassis security feature that detects if the chassis cover is removed. The
security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion
connector. When the chassis cover is removed, the mechanical switch is in the closed position.
1.12.3 Fan Monitoring
Fan monitoring can be implemented using Intel® Desktop Utilities or third-party software. The
level of monitoring and control is dependent on the hardware monitoring ASIC used with the
board.
For information about Refer to
The functions of the fan connectors Section 1.13.2.2, page 40
Figure 12 shows the location of the sensors and fan connectors.
E
A
C
D
Item Description
A
B
C
D
E
F
Remote ambient temperature sensor
Thermal diode, located on processor die
Ambient temperature sensor, internal to hardware monitoring and fan control ASIC
Processor fan
Rear chassis fan
Front chassis fan
1
3
1
4
12
13
FB
OM17936
Figure 12. Thermal Sensors and Fan Connectors
36
Product Description
1.13 Power Management
Power management is implemented at several levels, including:
• Software support through Advanced Configuration and Power Interface (ACPI)
• Hardware support:
⎯ Power connector
⎯ Fan connectors
⎯ LAN wake capabilities
⎯ Instantly Available PC technology
⎯ Resume on Ring
⎯ Wake from USB
⎯ Wake from PS/2 devices
⎯ Power Management Event signal (PME#) wake-up support
⎯ Intel Quick Resume Technology Drivers (Intel QRTD)
1.13.1 ACPI
ACPI gives the operating system direct control over the power management and Plug and Play
functions of a computer. The use of ACPI with this board requires an operating system that
provides full ACPI support. ACPI features include:
• Plug and Play (including bus and device enumeration)
• Power management control of individual devices, add-in boards (some add-in boards may
require an ACPI-aware driver), video displays, and hard disk drives
• Methods for achieving less than 15-watt system operation in the power-on/standby
sleeping state
• A Soft-off feature that enables the operating system to power-off the computer
• Support for multiple wake-up events (see Table 8 on page 39)
• Support for a front panel power and sleep mode switch
Table 6 lists the system states based on how long the power switch is pressed, depending on how
ACPI is configured with an ACPI-aware operating system.
Under ACPI, the operating system directs all system and device power state transitions. The
operating system puts devices in and out of low-power states based on user preferences and
knowledge of how devices are being used by applications. Devices that are not being used can be
turned off. The operating system uses information from applications and user settings to put the
system as a whole into a low-power state.
Table 7 lists the power states supported by the board along with the associated system power
targets. See the ACPI specification for a complete description of the various system and power
states.
Table 7. Power States and Targeted System Power
Global States Sleeping States
G0 – working
state
G1 – sleeping
state
G1 – sleeping
state
G1 – sleeping
state
G2/S5 S5 – Soft off.
G3 –
mechanical off
AC power is
disconnected
from the
computer.
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals powered
by the system chassis’ power supply.
2. Dependent on the standby power consumption of wake-up devices used in the system.
S0 – working C0 – working D0 – working state. Full power > 30 W
S1 – Processor
stopped
S3 – Suspend to
RAM. Context
saved to RAM.
S4 – Suspend to
disk. Context
saved to disk.
Context not saved.
Cold boot is
required.
No power to the
system.
Processor
States
C1 – stop
grant
No power D3 – no power
No power D3 – no power
No power D3 – no power
No power D3 – no power for
Device States
D1, D2, D3 – device
specification
specific.
except for wake-up
logic.
except for wake-up
logic.
except for wake-up
logic.
wake-up logic,
except when
provided by battery
or external source.
Targeted System
(Note 1)
Power
5 W < power < 52.5 W
Power < 5 W
Power < 5 W
Power < 5 W
No power to the system.
Service can be
performed safely.
(Note 2)
(Note 2)
(Note 2)
1.13.1.2 One-Watt Standby
In 2001, the U.S. government issued an executive order requiring a reduction in power for
appliances and personal computers. This board meets that requirement by operating at 1 W (or
less) in S5 (Standby) mode. One-Watt operation applies only to the S5 state when the computer is
turned off, but still connected to AC power. One-Watt operation does not apply to the S3 (Suspend
to RAM) or S4 (Suspend to disk) states.
Newer energy-efficient power supplies using less than 0.5 W (in Standby mode) may also be
needed to achieve this goal.
38
Product Description
1.13.1.3 Wake-up Devices and Events
Table 8 lists the devices or specific events that can wake the computer from specific states.
Table 8. Wake-up Devices and Events
These devices/events can wake up the computer… …from this state
LAN S1, S3, S4, S5
Modem (back panel Serial Port A) S1, S3
PME# signal S1, S3, S4, S5
Power switch S1, S3, S4, S5
PS/2 devices S1, S3, Visual off
RTC alarm S1, S3, S4, S5
USB S1, S3, Visual off
WAKE# signal S1, S3, S4, S5
Note: For LAN and PME# signal, S5 is disabled by default in the BIOS Setup program. Setting this option to Power On
NOTE
will enable a wake-up event from LAN in the S5 state.
The use of these wake-up events from an ACPI state requires an operating system that provides full
ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake
events.
(Note)
(Note)
1.13.2 Hardware Support
CAUTION
Ensure that the power supply provides adequate +5 V standby current if LAN wake capabilities and
Instantly Available PC technology features are used. Failure to do so can damage the power
supply. The total amount of standby current required depends on the wake devices supported and
manufacturing options.
The board provides several power management hardware features, including:
Resume on Ring enables telephony devices to access the computer when it is in a power-managed
state. The method used depends on the type of telephony device (external or internal).
NOTE
The use of Resume on Ring and Wake from USB technologies from an ACPI state requires an
operating system that provides full ACPI support.
1.13.2.1 Power Connector
ATX12V-compliant power supplies can turn off the system power through system control. When
an ACPI-enabled system receives the correct command, the power supply removes all non-standby
voltages.
When resuming from an AC power failure, the computer returns to the power state it was in before
power was interrupted (on or off). The computer’s response can be set using the Last Power State
feature in the BIOS Setup program’s Boot menu.
For information about Refer to
The location of the main power connector Figure 16, page 54
The signal names of the main power connector Table 22, page 57
1.13.2.2 Fan Connectors
The function/operation of the fan connectors is as follows:
• The fans are on when the board is in the S0 or S1 state.
• The fans are off when the board is off or in the S3, S4, or S5 state.
• Each fan connector is wired to a fan tachometer input of the hardware monitoring and fan
control ASIC.
• All fan connectors support closed-loop fan control that can adjust the fan speed or switch the
fan on or off as needed.
• All fan connectors have a +12 V DC connection.
For information about Refer to
The location of the fan connectors Figure 16, page 54
The location of the fan connectors and sensors for thermal monitoring Figure 12, page 36
The signal names of the processor fan connector Table 20, page 56
The signal names of the chassis fan connectors Table 21, page 56
1.13.2.3 LAN Wake Capabilities
CAUTION
For LAN wake capabilities, the +5 V standby line for the power supply must be capable of
providing adequate +5 V standby current. Failure to provide adequate standby current when
implementing LAN wake capabilities can damage the power supply.
LAN wake capabilities enable remote wake-up of the computer through a network. The LAN
network adapter monitors network traffic at the Media Independent Interface. Upon detecting a
Magic Packet* frame, the LAN subsystem asserts a wake-up signal that powers up the computer.
40
Product Description
Depending on the LAN implementation, the board supports LAN wake capabilities with ACPI in
the following ways:
• The PCI Express WAKE# signal
• The PCI Conventional bus PME# signal for PCI 2.3 compliant LAN designs
• The onboard LAN subsystem
1.13.2.4 Instantly Available PC Technology
CAUTION
For Instantly Available PC technology, the +5 V standby line for the power supply must be capable
of providing adequate +5 V standby current. Failure to provide adequate standby current when
implementing Instantly Available PC technology can damage the power supply.
Instantly Available PC technology enables the board to enter the ACPI S3 (Suspend-to-RAM)
sleep-state. While in the S3 sleep-state, the computer will appear to be off (the power supply is off,
and the front panel LED is amber if dual colored, or off if single colored.) When signaled by a
wake-up device or event, the system quickly returns to its last known wake state. Table 8 on
page 39 lists the devices and events that can wake the computer from the S3 state.
The board supports the PCI Bus Power Management Interface Specification. Add-in boards that
also support this specification can participate in power management and can be used to wake the
computer.
The use of Instantly Available PC technology requires operating system support and PCI 2.3
compliant add-in cards, PCI Express add-in cards, and drivers.
The Intel Quick Resume Technology Drivers (Intel QRTD) manage the on and off functions for
®
Viiv™ platforms and have the following features:
Intel
• Instantly turns the Intel Viiv platform off by pressing the power button on the PC or remote
control.
• Instantly turns the Intel Viiv platform on by moving the mouse, pressing a key on the keyboard,
or pressing the on/off button on the remote control or computer.
• In the Intel QRTD off state, the:
⎯ Video output stops sending data to the display
⎯ Audio is muted
⎯ Power continues to the vital components on the system (CPU, memory, and fans, for
example).
• The Intel QRTD off state allows tasks that do not require user input to continue in the
background.
• Works with the Microsoft Away mode to offer a complete power management offering for
ACPI and system standby and hibernate.
• Target resume time is zero to five seconds (about equal to the time it takes for the display to
warm up).
Do not open the computer chassis when it is in the Intel QRTD off state. Opening the chassis in
this state can cause hardware damage.
1.13.2.6 Resume on Ring
The operation of Resume on Ring can be summarized as follows:
• Resumes operation from ACPI S1 or S3 states
• Detects incoming call similarly for external and internal modems
• Requires modem interrupt be unmasked for correct operation
1.13.2.7 Wake from USB
USB bus activity wakes the computer from ACPI S1 or S3 states.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.13.2.8 Wake from PS/2 Devices
PS/2 device activity wakes the computer from an ACPI S1 or S3 state.
1.13.2.9 PME# Signal Wake-up Support
When the PME# signal on the PCI Conventional bus is asserted, the computer wakes from an ACPI
S1, S3, S4, or S5 state (with Wake on PME enabled in BIOS).
1.13.2.10 WAKE# Signal Wake-up Support
When the WAKE# signal on the PCI Express bus is asserted, the computer wakes from an ACPI
S1, S3, S4, or S5 state.
1.13.2.11 +5 V Standby Power Indicator LED
The +5 V standby power indicator LED shows that power is still present even when the computer
appears to be off. Figure 13 shows the location of the standby power indicator LED.
CAUTION
If AC power has been switched off and the standby power indicator is still lit, disconnect the power
cord before installing or removing any devices connected to the board. Failure to do so could
damage the board and any attached devices.
42
Product Description
CR2H1
OM17939
Figure 13. Location of the Standby Power Indicator LED
1.14 Trusted Platform Module (Optional)
The optional Trusted Platform Module (TPM) is a component on the desktop board that is
specifically designed to enhance platform security above-and-beyond the capabilities of today’s
software by providing a protected space for key operations and other security critical tasks. Using
both hardware and software, the TPM protects encryption and signature keys at their most
vulnerable stages—operations when the keys are being used unencrypted in plain-text form. The
TPM is specifically designed to shield unencrypted keys and platform authentication information
from software-based attacks.
The board utilizes 4 GB of addressable system memory. Typically the address space that is
allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (SPI
Flash), and chipset overhead resides above the top of DRAM (total system memory). On a system
that has 4 GB of system memory installed, it is not possible to use all of the installed memory due
to system address space being allocated for other system critical functions. These functions include
the following:
• BIOS/
• Local APIC (19 MB)
• Digital Media Interface (40 MB)
• Front side bus interrupts (17 MB)
• PCI Express configuration space (256 MB)
• MCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB)
• Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI Express add-
The amount of installed memory that can be used will vary based on add-in cards and BIOS
settings. Figure 14 shows a schematic of the system memory map. All installed system memory
can be used when there is no overlap of system addresses.
4 GB
Top of System Address Space
FLASH
PCI Memory Range -
contains PCI, chipsets,
Direct Media Interface
(DMI), and ICH ranges
(approximately 750 MB)
DRAM
Range
Compatibility
Memory
DOS
APIC
Reserved
~20 MB
Top of usable
DRAM (memory
visible to the
operating
system)
1 MB
640 KB
0 MB
0FFFFFH
0F0000H
0EFFFFH
0E0000H
0DFFFFH
0C0000H
0BFFFFH
0A0000H
09FFFFH
00000H
Upper BIOS
area (64 KB)
Lower BIOS
area
(64 KB;
16 KB x 4)
Add-in Card
BIOS and
Buffer area
(128 KB;
16 KB x 8)
Standard PCI/
ISA Video
Memory (SMM
Memory)
128 KB
DOS area
(640 KB)
1 MB
960 KB
896 KB
768 KB
640 KB
0 KB
OM17140
Figure 14. Detailed System Memory Address Map
46
2.1.2 Memory Map
Table 9 lists the system memory map.
Table 9. System Memory Map
Address Range (decimal) Address Range (hex) Size Description
1024 K - 4194304 K 100000 - FFFFFFFF 4095 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Potential available high DOS
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory
0 K - 512 K 00000 - 7FFFF 512 KB Conventional memory
Technical Reference
memory (open to the PCI
Conventional bus). Dependent on
video adapter used.
memory manager software)
2.2 DMA Channels
Table 10. DMA Channels
DMA Channel Number Data Width System Resource
0 8 or 16 bits Open
1 8 or 16 bits Parallel port
2 8 or 16 bits Diskette drive
3 8 or 16 bits Parallel port (for ECP or EPP)
4 8 or 16 bits DMA controller
5 16 bits Open
6 16 bits Open
7 16 bits Open
The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH7DH component. The PIC
is supported in Windows 98 SE and Windows ME and uses the first 16 interrupts. The APIC is
supported in Windows 2000 and Windows XP and supports a total of 24 interrupts.
Table 13. Interrupts
IRQ System Resource
NMI I/O channel check
0 Reserved, interval timer
1 Reserved, keyboard buffer full
2 Reserved, cascade interrupt from slave PIC
3 User available
4 COM1
5 User available
6 Diskette drive
7 LPT1
8 Real-time clock
9 User available
10 User available
11 User available
12 Onboard mouse port (if present, else user available)
13 Reserved, math coprocessor
14 Primary Parallel ATA/Serial ATA – Legacy Mode (if present, else user available)
15 Secondary Parallel ATA/Serial AT A – Legacy Mode (if present, else user available)
(Note 2)
16
17
18
19
20
21
22
23
Notes:
1. Default, but can be changed to another IRQ.
2. Available in APIC mode only.
User available (through PIRQA)
(Note 2)
User available (through PIRQB)
(Note 2)
User available (through PIRQC)
(Note 2)
User available (through PIRQD)
(Note 2)
User available (through PIRQE)
(Note 2)
User available (through PIRQF)
(Note 2)
User available (through PIRQG)
(Note 2)
User available (through PIRQH)
(Note 1)
(Note 1)
50
Technical Reference
2.6 PCI Conventional Interrupt Routing Map
This section describes interrupt sharing and how the interrupt signals are connected between the
PCI Conventional bus connectors and onboard PCI Conventional devices. The PCI Conventional
specification describes how interrupts can be shared between devices attached to the PCI
Conventional bus. In most cases, the small amount of latency added by interrupt sharing does not
affect the operation or throughput of the devices. In some special cases where maximum
performance is needed from a device, a PCI Conventional device should not share an interrupt with
other PCI Conventional devices. Use the following information to avoid sharing an interrupt with a
PCI Conventional add-in card.
PCI Conventional devices are categorized as follows to specify their interrupt grouping:
• INTA: By default, all add-in cards that require only one interrupt are in this category. For
almost all cards that require more than one interrupt, the first interrupt on the card is also
classified as INTA.
• INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is
classified as INTB. (This is not an absolute requirement.)
• INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a fourth
interrupt is classified as INTD.
The ICH7DH has eight Programmable Interrupt Request (PIRQ) input signals. All PCI
Conventional interrupt sources either onboard or from a PCI Conventional add-in card connect to
one of these PIRQ signals. Some PCI Conventional interrupt sources are electrically tied together
on the board and therefore share the same interrupt. Table 14 shows an example of how the
PIRQ signals are routed.
Table 14. PCI Interrupt Routing Map
ICH7DH PIRQ Signal Name
PCI Interrupt Source
ICH7DH LAN INTA
PCI bus connector 1 INTD INTA INTB INTC
PCI bus connector 2 INTC INTB INTA INTD
IEEE-1394a controller INTA
PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH
NOTE
In PIC mode, the ICH7DH can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5,
6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 13 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
PCI interrupt assignments to the USB ports, Serial ATA ports, and PCI Express ports are dynamic.
Only the following connectors have overcurrent protection: back panel USB, front panel USB, and
PS/2.
The other internal connectors are not overcurrent protected and should connect only to devices
inside the computer’s chassis, such as fans and internal peripherals. Do not use these connectors
to power devices external to the computer’s chassis. A fault in the load presented by the external
devices could cause damage to the computer, the power cable, and the external devices themselves.
This section describes the board’s connectors. The connectors can be divided into these groups:
• Back panel I/O connectors
• Component-side I/O connectors (see page 54)
2.7.1 Back Panel Connectors
Figure 15 shows the location of the back panel connectors. The back panel connectors are
color-coded. The figure legend (Table 15) lists the colors used (when applicable).
L
AC
D
Figure 15. Back Panel Connectors
F
GIBENMO
H
KJ
OM17558
52
Technical Reference
Table 15 lists the back panel connectors identified in Figure 15.
NOTE
The back panel audio line out connector is designed to power headphones or amplified speakers
only. Poor audio quality occurs if passive (non-amplified) speakers are connected to this output.
Table 15. Back Panel Connectors Shown in Figure 15
Item/callout from
Figure 15
A
B
C
D
E
F
G USB ports (two)
H
I
J
K
L
M
N Mic in/Retasking Jack [Pink]
O
Description
PS/2 mouse port [Green]
PS/2 keyboard port [Purple]
Serial port A [Teal]
Parallel port [Burgundy] (optional)
VGA port
IEEE-1394a connector
LAN
USB ports (two)
Center channel and LFE (subwoofer) audio out/ Retasking Jack [Orange]
Surround left/right channel audio out/Retasking Jack [Black]
Audio line in/Retasking Jack [Blue]
Digital audio out optical
Front left/right channel audio out/Two channel audio line out/Retasking Jack
[Lime green]
Figure 16 shows the locations of the component-side connectors.
BAC DHEFGI JOLKNM
129
10
12
1
3
1
4
123
4
3940
1224
113
3
192
1
13
1102
1102
3334
12
1
1
1
1
1
Figure 16. Component-side Connectors
54
1
1
2
210
10
T SPQRVWU
OM17935
Table 16 lists the component-side connectors identified in Figure 16.
Table 16. Component-side Connectors Shown in Figure 16
Item/callout
from Figure 16 Description
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
Rear chassis fan connector
Front panel audio connector
Parallel ATA IDE connector
Chassis intrusion connector
Serial ATA connector 0
Serial ATA connector 1
Serial ATA connector 2
Serial ATA connector 3
Front panel USB connector
Front panel USB connector
Main power connector
PCI Express x16 bus add-in card connector
PCI Conventional bus add-in card connector 1
PCI Conventional bus add-in card connector 2
PCI Express x1 bus add-in card connector
Diskette drive connector
Front panel IEEE-1394a connector
Front panel IEEE-1394a connector
Front panel connector
Front chassis fan connector
Auxiliary front panel power LED connector
Processor core power connector
Processor fan connector
1 Port E [Port 1] Left Channel 2 Ground
3 Port E [Port 1] Right Channel 4 Presence# (dongle present)
5 Port F [Port 2] Right Channel 6 Port E [Port 1] Sense return
7 Port E [Port 1] and Port F [Port 2]
Sense send (jack detection)
9 Port F [Port 2] Left Channel 10 Port F [Port 2] Sense return
INTEGRATOR’S NOTE
#
8 Key
The front panel audio connector is colored yellow.
•Main power – a 2 x 12 connector. This connector is compatible with 2 x 10 connectors
previously used on Intel Desktop boards. The board supports the use of ATX12V power
supplies with either 2 x 10 or 2 x 12 main power cables. When using a power supply with a
2 x 10 main power cable, attach that cable on the rightmost pins of the main power connector,
leaving pins 11, 12, 23, and 24 unconnected.
•Processor core power – a 2 x 2 connector. This connector provides power directly to the
processor voltage regulator and must always be used. Failure to do so will prevent the board
from booting.
INTEGRATOR’S NOTE
#
When using high wattage PCI Express x16 graphics cards, use a power supply with a 2 x 12 main
power cable. The 2 x 12 main power cable can provide up to 144 W of power from the +12 V rail.
Table 22. Main Power Connector
Pin Signal Name Pin Signal Name
1 +3.3 V 13 +3.3 V
2 +3.3 V 14 -12 V
3 Ground 15 Ground
4 +5 V 16 PS-ON# (power supply remote on/off)
5 Ground 17 Ground
6 +5 V 18 Ground
7 Ground 19 Ground
8 PWRGD (Power Good) 20 No connect
9 +5 V (Standby) 21 +5 V
10 +12 V 22 +5 V
11 +12 V
12 2 x 12 connector detect
Note: When using a 2 x 10 power supply cable, this pin will be unconnected.
The board has the following add-in card connectors:
• PCI Express x16: one connector supporting simultaneous transfer speeds up to 8 GBytes/sec.
• PCI Express x1: one PCI Express x1 connector. The x1 interface supports simultaneous
transfer speeds up to 500 MBytes/sec.
• PCI Conventional (rev 2.3 compliant) bus: two PCI Conventional bus add-in card connectors.
The SMBus is routed to PCI Conventional bus connector 2 only. PCI Conventional bus add-in
cards with SMBus support can access sensor data and other information residing on the board.
Note the following considerations for the PCI Conventional bus connectors:
• All of the PCI Conventional bus connectors are bus master capable.
• SMBus signals are routed to PCI Conventional bus connector 2. This enables PCI
Conventional bus add-in boards with SMBus support to access sensor data on the boards. The
specific SMBus signals are as follows:
⎯ The SMBus clock line is connected to pin A40.
⎯ The SMBus data line is connected to pin A41.
NOTE
The PCI Express x16 connector is configured to support only a PCI Express x1 link when the
Intel GMA950 graphics controller is enabled.
2.7.2.3 Auxiliary Front Panel Power/Sleep LED Connector
Pins 1 and 3 of this connector duplicate the signals on pins 2 and 4 of the front panel connector.
Table 24. Auxiliary Front Panel Power/Sleep LED Connector
Pin Signal Name In/Out Description
1 HDR_BLNK_GRN Out Front panel green LED
2 Not connected
3 HDR_BLNK_YEL Out Front panel yellow LED
58
Technical Reference
2.7.2.4 Front Panel Connector
This section describes the functions of the front panel connector. Table 25 lists the signal names of
the front panel connector. Figure 17 is a connection diagram for the front panel connector.
Table 25. Front Panel Connector
Pin Signal In/Out Description Pin Signal In/Out Description
Hard Drive Activity LED
[Yellow]
1 HD_PWR Out Hard disk LED pull-up
(750 Ω) to +5 V
3 HAD# Out Hard disk active LED 4 HDR_BLNK_
Reset Switch
[Purple]
5 Ground Ground 6 FPBUT_IN In Power switch
7 FP_RESET# In Reset switch 8 Ground Ground
Power Not Connected
9 +5 V Power 10 N/C Not connected
2 HDR_BLNK_
GRN
YEL
Power LED
[Green]
Out Front panel green
LED
Out Front panel yellow
LED
On/Off Switch
[Red]
Hard Drive
Activity LED
Reset
Switch
+5 V DC
Single-colored
Power LED
+
−
2
1
4
3
6
5
8
7
9
+
−
Power
Switch
N/C
Dual-colored
Power LED
−
+
OM16110
Figure 17. Connection Diagram for Front Panel Connector
2.7.2.4.1 Hard Drive Activity LED Connector [Yellow]
Pins 1 and 3 [Yellow] can be connected to an LED to provide a visual indicator that data is being
read from or written to a hard drive. Proper LED function requires one of the following:
• A Serial ATA hard drive connected to an onboard Serial ATA connector
• An IDE hard drive connected to an onboard IDE connector
Pins 5 and 7 [Purple] can be connected to a momentary single pole, single throw (SPST) type
switch that is normally open. When the switch is closed, the board resets and runs the POST.
2.7.2.4.3 Power/Sleep LED Connector [Green]
Pins 2 and 4 [Green] can be connected to a one- or two-color LED. Table 26 shows the possible
states for a one-color LED. Table 27 shows the possible states for a two-color LED.
Table 26. States for a One-Color Power LED
LED State Description
Off Power off/sleeping
Steady Green Running
Table 27. States for a Two-Color Power LED
LED State Description
Off Power off
Steady Green Running
Steady Yellow Sleeping
NOTE
The colors listed in Table 26 and Table 27 are suggested colors only. Actual LED colors are
product- or customer-specific.
2.7.2.4.4 Power Switch Connector [Red]
Pins 6 and 8 [Red] can be connected to a front panel momentary-contact power switch. The switch
must pull the SW_ON# pin to ground for at least 50 ms to signal the power supply to switch on or
off. (The time requirement is due to internal debounce circuitry on the board.) At least two
seconds must pass before the power supply will recognize another on/off signal.
60
Technical Reference
2.7.2.5 Front Panel USB Connectors
Figure 18 is a connection diagram for the front panel USB connectors.
INTEGRATOR’S NOTES
#
• The +5 V DC power on the USB connector is fused.
• Pins 1, 3, 5, and 7 comprise one USB port.
• Pins 2, 4, 6, and 8 comprise one USB port.
• Use only a front panel USB connector that conforms to the USB 2.0 specification for high-
speed USB devices.
One
USB
Port
Power
(+5 V DC)
D−
D+
Ground
Key (no pin)
1
3
5
7
10
Figure 18. Connection Diagram for Front Panel USB Connectors
2.7.2.6 Front Panel IEEE 1394a Connectors
Figure 19 is a connection diagram for the IEEE 1394a connectors.
TPA+
Ground
1
3
2
4
Power
(+5 V DC)
D−
D+
Ground
No Connect
TPA−
Ground
One
USB
Port
OM15963
2
4
6
8
TPB+TPB−
+12 V DC
Key (no pin)
5
7
Figure 19. Connection Diagram for IEEE 1394a Connectors
INTEGRATOR’S NOTES
#
• The IEEE 1394a connectors are colored blue.
• The +12 V DC power on the IEEE 1394a connectors is fused.
• Each IEEE 1394a connector provides one IEEE 1394a port.
Do not move the jumper with the power on. Always turn off the power and unplug the power cord
from the computer before changing a jumper setting. Otherwise, the board could be damaged.
Figure 20 shows the location of the jumper block. The jumper block determines the BIOS Setup
program’s mode. Table 28 describes the jumper settings for the three modes: normal, configure, and
recovery. When the jumper is set to configure mode and the computer is powered-up, the BIOS
compares the processor version and the microcode version in the BIOS and reports if the two match.
The BIOS uses current configuration information and
passwords for booting.
After the POST runs, Setup runs automatically. The
maintenance menu is displayed.
The BIOS attempts to recover the BIOS configuration. A
recovery diskette is required.
OM17937
3
62
Technical Reference
2.9 Mechanical Considerations
2.9.1 Form Factor
The board is designed to fit into a BTX-form-factor chassis. Figure 21 illustrates the mechanical
form factor of the board. Dimensions are given in inches [millimeters]. The outer dimensions are
10.40 inches by 10.50 inches [264.16 millimeters by 266.70 millimeters].
The back panel I/O shield for the board must meet specific dimension and material requirements.
Systems based on this board need the back panel I/O shield to pass certification testing. Figure 22
shows the I/O shield for boards with the optional parallel port connector. Figure 23 shows the I/O
shield for boards without the optional parallel port connector. Dimensions are given in millimeters
[inches]. The figures also indicate the position of each cutout. Additional design considerations for
I/O shields relative to chassis requirements are described in the BTX specification.
NOTE
The I/O shield drawings in this document are for reference only. I/O shields compliant with the
BTX specification are available from Intel.
172.93 REF
[6.808]
13.00 TYP
[0.512]
+0.12
169.98
- 0.13
+0.004
[6.692 ]
- 0.005
9.65
[0.380]
Ø 1.00
[0.039]
0.00
[0.00]
9.18
[0.36]
9.40
[0.370]
0.00
[0.00]
5.84
[0.23]
17.19
[0.677]
23.56
[0.928]
52.70
[2.075]
90.34
[3.557]
110.58
[4.354]
Pictorial
View
[5.53]
140.39
9.18
[0.361]
11.55
[0.455]
OM17948
Figure 22. I/O Shield Dimensions for Boards with the Optional Parallel Port
64
Ø 1.00
[0.039]
0.00
[0.00]
9.18
[0.36]
9.40
[0.370]
0.00
[0.00]
5.84
[0.23]
17.19
13.00 TYP
[0.512]
[0.677]
52.70
[2.075]
172.93 REF
[6.808]
+0.12
169.98
-0.13
+0.004
[6.692 ]
-0.005
90.34
[3.557]
110.58
[4.354]
[5.53]
140.39
Technical Reference
9.18
[0.361]
11.55
[0.455]
Pictorial
View
OM18267
Figure 23. I/O Shield Dimensions for Boards without the Optional Parallel Port
Table 29 lists the DC loading characteristics of the boards. This data is based on a DC analysis of
all active components within the board that impact its power delivery subsystems. The analysis
does not include PCI add-in cards. Minimum values assume a light load placed on the board that is
similar to an environment with no applications running and no USB current draw. Maximum
values assume a load placed on the board that is similar to a heavy gaming environment with a
500 mA current draw per USB port. These calculations are not based on specific processor values
or memory configurations but are based on the minimum and maximum current draw possible from
the board’s power delivery subsystems to the processor, memory, and USB ports.
Use the datasheets for add-in cards, such as PCI, to determine the overall system power
requirements. The selection of a power supply at the system level is dependent on the system’s
usage model and not necessarily tied to a particular processor speed.
Table 29. DC Loading Characteristics
DC Current at:
Mode DC Power +3.3 V +5 V +12 V -12 V +5 VSB
Minimum loading 275 W 3.5 A 12 A 17 A 0 A 0.34 A (S0)
Maximum loading 500 W 16 A 23 A 29 A 0.20 A 0.34 A (S0)
1.00 A (S3)
1.10 A (S3)
2.10.2 Add-in Board Considerations
The boards are designed to provide 2 A (average) of +5 V current for each add-in board. The total
+5 V current draw for both boards is as follows: a fully loaded D945GBO board (all three
expansion slots and the PCI Express x16 slot filled) must not exceed 8 A.
66
2.10.3 Fan Connector Current Capability
CAUTION
The processor fan must be connected to the processor fan connector, not to a chassis fan
connector. Connecting the processor fan to a chassis fan connector may result in onboard
component damage that will halt fan operation.
Table 30 lists the current capability of the fan connectors.
Table 30. Fan Connector Current Capability
Fan Connector Maximum Available Current
Processor fan 3.0 A
Front chassis fan 1.5 A
Rear chassis fan 1.5 A
2.10.4 Power Supply Considerations
Technical Reference
CAUTION
The +5 V standby line for the power supply must be capable of providing adequate +5 V standby
current. Failure to do so can damage the power supply. The total amount of standby current
required depends on the wake devices supported and manufacturing options.
System integrators should refer to the power usage values listed in Table 29 when selecting a power
supply for use with the board. Additional power required will depend on configurations chosen by
the integrator.
The power supply must comply with the recommendations found in the BTX Interface Specification.
This board requires the use of a Type II (Low Profile) Thermal Module for the processor.
Failure to ensure appropriate airflow may result in reduced performance of both the processor
and/or voltage regulator or, in some instances, damage to the board. For a list of chassis that have
been tested with Intel desktop boards please refer to the following website:
All responsibility for determining the adequacy of any thermal or system design remains solely with
the reader. Intel makes no warranties or representations that merely following the instructions
presented in this document will result in a system with adequate thermal performance.
CAUTION
Ensure that the ambient temperature does not exceed the board’s maximum operating temperature.
Failure to do so could cause components to exceed their maximum case temperature and
malfunction. For information about the maximum operating temperature, see the environmental
specifications in Section 2.13.
CAUTION
Ensure that proper airflow is maintained in the processor voltage regulator circuit. Failure to do
so may result in damage to the voltage regulator circuit. The processor voltage regulator area
(item E in Figure 24) can reach a temperature of up to 85
Figure 24 shows the locations of the localized high temperature zones.
o
C in an open chassis.
68
ACB
Technical Reference
DE
Item Description
A Intel 82945G GMCH
B Intel 82801GH ICH7DH
C 1.5 V core and front side bus voltage regulator areas
D Processor
E Processor voltage regulator area
Table 31 provides maximum case temperatures for the components that are sensitive to thermal
changes. The operating temperature, current load, or operating frequency could affect case
temperatures. Maximum case temperatures are important when considering proper airflow to cool
the board.
Table 31. Thermal Considerations for Components
Component Maximum Case Temperature
Intel Pentium 4 processor For processor case temperature, see processor datasheets and
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Bellcore Reliability Prediction
Procedure, TR-NWT-000332, Issue 4, September 1991. The MTBF prediction is used to estimate
repair rates and spare parts requirements.
The MTBF data is calculated from predicted data at 55 ºC. The MTBF for the D945GBO board is
108,165 hours.
70
2.13 Environmental
Table 32 lists the environmental specifications for the board.
Table 32. Environmental Specifications
Parameter Specification
Temperature
Non-Operating
Operating
Shock
Unpackaged 50 g tr apezoidal waveform
Velocity change of 170 inches/second²
Packaged Half sine 2 millisecond
Product weight (pounds) Free fall (inches) Velocity change (inches/sec²)
<20 36 167
21-40 30 152
41-80 24 136
81-100 18 118
Vibration
Unpackaged 5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged 5 Hz to 40 Hz: 0.015 g² Hz (flat)
40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz
This section contains the following regulatory compliance information for Desktop Board
D945GBO:
• Safety regulations
• European Union Declaration of Conformity statement
• Product Ecology statements
• Electromagnetic Compatibility (EMC) regulations
• Product certification markings
2.14.1 Safety Regulations
Desktop Board D945GBO complies with the safety regulations stated in Table 33 when correctly
installed in a compatible host system.
Table 33. Safety Regulations
Regulation Title
UL 60950-1:2003/
CSA C22.2 No. 60950-1-03
EN 60950-1:2002 Information Technology Equipment – Safety - Part 1: General
IEC 60950-1:2001, First Edition Information Technology Equipment – Safety - Part 1: General
Information Technology Equipment – Safety - Part 1: General
Requirements (USA and Canada)
Requirements (European Union)
Requirements (International)
2.14.2 European Union Declaration of Conformity Statement
We, Intel Corporation, declare under our sole responsibility that the product Intel® Desktop Board
D945GBO is in conformity with all applicable essential requirements necessary for CE marking,
following the provisions of the European Council Directive 89/336/EEC (EMC Directive) and
Council Directive 73/23/EEC (Safety/Low Voltage Directive).
The product is properly CE marked demonstrating this conformity and is for distribution within all
member states of the EU with no restrictions.
This product follows the provisions of the European Directives 89/336/EEC and 73/23/EEC.
72
Technical Reference
Čeština Tento výrobek odpovídá požadavkům evropských směrnic 89/336/EEC a 73/23/EEC.
Dansk Dette produkt er i overensstemmelse med det europæiske direktiv 89/336/EEC &
73/23/EEC.
Dutch Dit product is in navolging van de bepalingen van Europees Directief 89/336/EEC &
73/23/EEC.
Eesti Antud toode vastab Euroopa direktiivides 89/336/EEC ja 73/23/EEC kehtestatud nõuetele.
Suomi Tämä tuote noudattaa EU-direktiivin 89/336/EEC & 73/23/EEC määräyksiä.
Français Ce produit est conforme aux exigences de la Directive Européenne 89/336/EEC &
73/23/EEC.
Deutsch Dieses Produkt entspricht den Bestimmungen der Europäischen Richtlinie 89/336/EEC &
Magyar E termék megfelel a 89/336/EEC és 73/23/EEC Európai Irányelv előírásainak.
Icelandic Þessi vara stenst reglugerð Evrópska Efnahags Bandalagsins númer 89/336/ EEC &
73/23/EEC.
Italiano Questo prodotto è conforme alla Direttiva Europea 89/336/EEC & 73/23/EEC.
Latviešu Šis produkts atbilst Eiropas Direktīvu 89/336/EEC un 73/23/EEC noteikumiem.
Lietuvių Šis produktas atitinka Europos direktyvų 89/336/EEC ir 73/23/EEC nuostatas.
Malti Dan il-prodott hu konformi mal-provvedimenti tad-Direttivi Ewropej 89/336/EEC u
73/23/EEC.
Norsk Dette produktet er i henhold til bestemmelsene i det europeiske direktivet 89/336/ EEC &
73/23/EEC.
Polski Niniejszy produkt jest zgodny z postanowieniami Dyrektyw Unii Europejskiej
89/336/EWG i 73/23/EWG.
Portuguese Este produto cumpre com as normas da Diretiva Européia 89/336/EEC &
73/23/EEC.
Español Este producto cumple con las normas del Directivo Europeo 89/336/EEC & 73/23/EEC.
Slovensky Tento produkt je v súlade s ustanoveniami európskych direktív 89/336/EEC a
73/23/EEC.
Slovenščina Izdelek je skladen z določbami evropskih direktiv 89/336/EGS in 73/23/EGS.
Svenska Denna produkt har tillverkats i enlighet med EG-direktiv 89/336/EEC & 73/23/EEC.
Türkçe Bu ürün, Avrupa Birliği’nin 89/336/EEC ve 73/23/EEC yönergelerine uyar.
The following information is provided to address worldwide product ecology concerns and
regulations.
2.14.3.1 Disposal Considerations
This product contains the following materials that may be regulated upon disposal: lead solder on
the printed wiring board assembly.
2.14.3.2 Recycling Considerations
As part of its commitment to environmental responsibility, Intel has implemented the Intel Product
Recycling Program to allow retail consumers of Intel’s branded products to return used products to
select locations for proper recycling.
Please consult the http://www.intel.com/intel/other/ehs/product_ecology/Recycling_Program.htm
for the details of this program, including the scope of covered products, available locations,
shipping instructions, terms and conditions, etc.
中文
作为其对环境责任之承诺的部分,英特尔已实施 Intel Product Recycling Program
(英特尔产品回收计划),以允许英特尔品牌产品的零售消费者将使用过的产品退还至指定地点作
恰当的重复使用处理。
Als Teil von Intels Engagement für den Umweltschutz hat das Unternehmen das Intel ProduktRecyclingprogramm implementiert, das Einzelhandelskunden von Intel Markenprodukten
ermöglicht, gebrauchte Produkte an ausgewählte Standorte für ordnungsgemäßes Recycling
zurückzugeben.
Details zu diesem Programm, einschließlich der darin eingeschlossenen Produkte, verfügbaren
Standorte, Versandanweisungen, Bedingungen usw., finden Sie auf der
Como parte de su compromiso de responsabilidad medioambiental, Intel ha implantado el programa
de reciclaje de productos Intel, que permite que los consumidores al detalle de los productos Intel
devuelvan los productos usados en los lugares seleccionados para su correspondiente reciclado.
Consulte la http://www.intel.com/intel/other/ehs/product_ecology/Recycling_Program.htm
para ver
los detalles del programa, que incluye los productos que abarca, los lugares disponibles,
instrucciones de envío, términos y condiciones, etc.
Français
Dans le cadre de son engagement pour la protection de l'environnement, Intel a mis en œuvre le
programme Intel Product Recycling Program (Programme de recyclage des produits Intel) pour
permettre aux consommateurs de produits Intel de recycler les produits usés en les retournant à des
adresses spécifiées.
Visitez la page Web http://www.intel.com/intel/other/ehs/product_ecology/Recycling_Program.htm
pour en savoir plus sur ce programme, à savoir les produits concernés, les adresses disponibles, les
instructions d'expédition, les conditions générales, etc.
Sebagai sebahagian daripada komitmennya terhadap tanggungjawab persekitaran, Intel telah
melaksanakan Program Kitar Semula Produk untuk membenarkan pengguna-pengguna runcit
produk jenama Intel memulangkan produk terguna ke lokasi-lokasi terpilih untuk dikitarkan semula
dengan betul.
Sila rujuk http://www.intel.com/intel/other/ehs/product_ecology/Recycling_Program.htm
untuk
mendapatkan butir-butir program ini, termasuklah skop produk yang dirangkumi, lokasi-lokasi
tersedia, arahan penghantaran, terma & syarat, dsb.
Como parte deste compromisso com o respeito ao ambiente, a Intel implementou o Programa de
Reciclagem de Produtos para que os consumidores finais possam enviar produtos Intel usados para
locais selecionados, onde esses produtos são reciclados de maneira adequada.
Consulte o site http://www.intel.com/intel/other/ehs/product_ecology/Recycling_Program.htm
(em
Inglês) para obter os detalhes sobre este programa, inclusive o escopo dos produtos cobertos, os
locais disponíveis, as instruções de envio, os termos e condições, etc.
Russian
В качестве части своих обязательств к окружающей среде, в Intel создана программа
утилизации продукции Intel (Product Recycling Program) для предоставления конечным
пользователям марок продукции Intel возможности возврата используемой продукции в
специализированные пункты для должной утилизации.
об этой программе, принимаемых продуктах, местах приема, инструкциях об отправке,
положениях и условиях и т.д.
Türkçe
Intel, çevre sorumluluğuna bağımlılığının bir parçası olarak, perakende tüketicilerin Intel markalı
kullanılmış ürünlerini belirlenmiş merkezlere iade edip uygun şekilde geri dönüştürmesini
amaçlayan Intel Ürünleri Geri Dönüşüm Programı’nı uygulamaya koymuştur.
Bu programın ürün kapsamı, ürün iade merkezleri, nakliye talimatları, kayıtlar ve şartlar v.s dahil
bütün ayrıntılarını ögrenmek için lütfen
The desktop board is lead free. Other box contents may contain lead.
Table 34. Lead Free Desktop Board
Description Mark
Lead-Free: The symbol is used to identify electrical and electronic assemblies
and components in which the lead (Pb) concentration level in any of the raw
materials and the end product is not greater than 0.1% by weight (1000 ppm).
This symbol is also used to indicate conformance to lead-free requirements and
definitions adopted under the European Union’s Restriction on Hazardous
Substances (RoHS) directive, 2002/95/EC.
76
Technical Reference
2.14.4 EMC Regulations
Desktop Board D945GBO complies with the EMC regulations stated in Table 35 when correctly
installed in a compatible host system.
Table 35. EMC Regulations
Regulation Title
FCC Class B Title 47 of the Code of Federal Regulations, Parts 2 and 15, Subpart B,
Radio Frequency Devices. (USA)
ICES-003 (Class B) Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
EN55022: 1998 (Class B) Limits and methods of measurement of Radio Interference Characteristics of
Information Technology Equipment. (European Union)
EN55024: 1998 Information Technology Equipment – Immunity Characteristics Limits and
methods of measurement. (European Union)
AS/NZS CISPR 22
(Class B)
CISPR 22, 3rd Edition,
(Class B)
CISPR 24: 1997 Information Technology Equipment – Immunity Characteristics – Limits and
VCCI (Class B) Voluntary Control for Interference by Information Technology Equipment.
Australian Communications Authority, Standard for Electromagnetic
Compatibility. (Australia and New Zealand)
Limits and methods of measurement of Radio Disturbance Characteristics of
Information Technology Equipment. (International)
Methods of Measurement. (International)
(Japan)
Japanese Kanji statement translation: this is a Class B product based on the standard of the
Voluntary Control Council for Interference from Information Technology Equipment (VCCI). If
this is used near a radio or television receiver in a domestic environment, it may cause radio
interference. Install and use the equipment according to the instruction manual.
Korean Class B statement translation: this is household equipment that is certified to comply with
EMC requirements. You may use this equipment in residential environments and other nonresidential environments.
Taiwan BSMI (Bureau of Standards, Metrology and Inspections) mark.
Includes adjacent Intel company number, D33025.
Printed wiring board manufacturer’s recognition mark. Consists of a unique UL
recognized manufacturer’s logo, along with a flammability rating (solder side).
3.9 BIOS Security Features ...............................................................................................85
3.1 Introduction
The boards use an Intel BIOS that is stored in the Serial Peripheral Interface Flash Memory (SPI
Flash) and can be updated using a disk-based program. The SPI Flash contains the BIOS Setup
program, POST, the PCI auto-configuration utility, and Plug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision code. The
initial production BIOSs are identified as NT94510J.86A.
When the BIOS Setup configuration jumper is set to configure mode and the computer is poweredup, the BIOS compares the CPU version and the microcode version in the BIOS and reports if the
two match.
The BIOS Setup program can be used to view and change the BIOS settings for the computer. The
BIOS Setup program is accessed by pressing the <F2> key after the Power-On Self-Test (POST)
memory test begins and before the operating system boot begins. The menu bar is shown below.
Maintenance Main Advanced Security Power Boot Exit
NOTE
The maintenance menu is displayed only when the Desktop Board is in configure mode. Section 2.8
on page 62 shows how to put the Desktop Board in configure mode.
Table 37 lists the BIOS Setup program menu features.
Table 37. BIOS Setup Program Menu Bar
Maintenance Main Advanced Security Power Boot Exit
Clears
passwords and
displays
processor
information
Displays
processor
and memory
configuration
Configures
advanced
features
available
through the
chipset
Sets
passwords
and security
features
Table 38 lists the function keys available for menu screens.
Table 38. BIOS Setup Program Function Keys
BIOS Setup Program Function Key Description
<←> or <→>
<↑> or <↓>
<Tab> Selects a field (Not implemented)
<Enter> Executes command or selects the submenu
<F9> Load the default configuration values for the current menu
<F10> Save the current values and exits the BIOS Setup program
<Esc> Exits the menu
Selects a different menu screen (Moves the cursor left or right)
Selects an item (Moves the cursor up or down)
Configures
power
management
features and
power supply
controls
Selects boot
options
Saves or
discards
changes to
Setup
program
options
3.2 BIOS Flash Memory Organization
The Serial Peripheral Interface Flash Memory (SPI Flash) includes a 4 Mbit (512 KB) flash
memory device.
3.3 Resource Configuration
3.3.1 PCI Autoconfiguration
The BIOS can automatically configure PCI devices. PCI devices may be onboard or add-in cards.
Autoconfiguration lets a user insert or remove PCI cards without having to configure the system.
When a user turns on the system after adding a PCI card, the BIOS automatically configures
interrupts, the I/O space, and other system resources. Any interrupts set to Available in Setup are
considered to be available for use by the add-in card.
3.3.2 PCI IDE Support
If you select Auto in the BIOS Setup program, the BIOS automatically sets up the
PCI IDE connector with independent I/O channel support. The IDE interface supports hard drives
up to ATA-66/100 and recognizes any ATAPI compliant devices, including CD-ROM drives, tape
drives, and Ultra DMA drives. The interface also supports second-generation SATA drives. The
BIOS determines the capabilities of each drive and configures them to optimize capacity and
performance. To take advantage of the high capacities typically available today, hard drives are
80
Overview of BIOS Features
automatically configured for Logical Block Addressing (LBA) and to PIO Mode 3 or 4, depending
on the capability of the drive. You can override the auto-configuration options by specifying
manual configuration in the BIOS Setup program.
To use ATA-66/100 features the following items are required:
• An ATA-66/100 peripheral device
• An ATA-66/100 compatible cable
• ATA-66/100 operating system device drivers
NOTE
Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device. For
example, do not connect an ATA hard drive as a slave to an ATAPI CD-ROM drive.
3.4 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing computers in
a managed network.
The main component of SMBIOS is the Management Information Format (MIF) database, which
contains information about the computing system and its components. Using SMBIOS, a system
administrator can obtain the system types, capabilities, operational status, and installation dates for
system components. The MIF database defines the data and provides the method for accessing this
information. The BIOS enables applications such as third-party management software to use
SMBIOS. The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems, such as Windows NT*, require an additional interface for
obtaining the SMBIOS information. The BIOS supports an SMBIOS table interface for such
operating systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obtain the SMBIOS information.
3.5 Legacy USB Support
Legacy USB support enables USB devices to be used even when the operating system’s USB
drivers are not yet available. Legacy USB support is used to access the BIOS Setup program, and
to install an operating system that supports USB.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and
configure the BIOS Setup program and the maintenance menu.
5. The operating system loads. While the operating system is loading, USB keyboards and mice
are recognized and may be used to configure the operating system.
6. After the operating system loads the USB drivers, all legacy and non-legacy USB devices are
recognized by the operating system, and Legacy USB support from the BIOS is no longer used.
To install an operating system that supports USB, follow the operating system’s installation
instructions.
3.6 BIOS Updates
The BIOS can be updated using either of the following utilities, which are available on the Intel
World Wide Web site:
• Intel
• Intel
®
Express BIOS Update utility, which enables automated updating while in the Windows
environment. Using this utility, the BIOS can be updated from a file on a hard disk, a 1.44 MB
diskette, or a CD-ROM, or from the file location on the Web.
®
Flash Memory Update Utility, which requires creation of a boot diskette and manual
rebooting of the system. Using this utility, the BIOS can be updated from a file on a 1.44 MB
diskette (from a legacy diskette drive or an LS-120 diskette drive) or a CD-ROM.
Both utilities verify that the updated BIOS matches the target system to prevent accidentally
installing an incompatible BIOS.
NOTE
Review the instructions distributed with the upgrade utility before attempting a BIOS update.
For information about Refer to
The Intel World Wide Web site Section 1.3, page 15
3.6.1 Language Support
The BIOS Setup program and help messages are supported in US English. Additional languages
are available in the Integrator’s Toolkit utility. Check the Intel website for details.
3.6.2 Custom Splash Screen
During POST, an Intel® splash screen is displayed by default. This splash screen can be augmented
with a custom splash screen. The Integrator’s Toolkit that is available from Intel can be used to
create a custom splash screen.
NOTE
If you add a custom splash screen, it will share space with the Intel branded logo.
For information about Refer to
The Intel World Wide Web site Section 1.3, page 15
82
Overview of BIOS Features
3.7 Boot Options
In the BIOS Setup program, the user can choose to boot from a diskette drive, hard drives,
CD-ROM, or the network. The default setting is for the diskette drive to be the first boot device,
the hard drive second, and the ATAPI CD-ROM third. The fourth device is disabled.
3.7.1 CD-ROM Boot
Booting from CD-ROM is supported in compliance to the El Torito bootable CD-ROM format
specification. Under the Boot menu in the BIOS Setup program, ATAPI CD-ROM is listed as a
boot device. Boot devices are defined in priority order. Accordingly, if there is not a bootable CD
in the CD-ROM drive, the system will attempt to boot from the next defined drive.
3.7.2 Network Boot
The network can be selected as a boot device. This selection allows booting from the onboard LAN
or a network add-in card with a remote boot ROM installed.
Pressing the <F12> key during POST automatically forces booting from the LAN. To use this key
during POST, the User Access Level in the BIOS Setup program's Security menu must be
set to Full.
3.7.3 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing the POST, the
operating system loader is invoked even if the following devices are not present:
• Video adapter
• Keyboard
• Mouse
3.7.4 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a boot device menu to be displayed. This menu
displays the list of available boot devices (as set in the BIOS setup program’s Boot Device Priority
Submenu). Table 39 lists the boot device menu options.
Table 39. Boot Device Menu Options
Boot Device Menu Function Keys Description
<↑> or <↓>
<Enter> Exits the menu, saves changes, and boots from the selected device
<Esc> Exits the menu without saving changes
The following techniques help improve system boot speed:
• Choose a hard drive with parameters such as “power-up to data ready” less than eight seconds,
that minimize hard drive startup delays.
• Select a CD-ROM drive with a fast initialization rate. This rate can influence POST
execution time.
• Eliminate unnecessary add-in adapter features, such as logo displays, screen repaints, or mode
changes in POST. These features may add time to the boot process.
• Try different monitors. Some monitors initialize and communicate with the BIOS more
quickly, which enables the system to boot more quickly.
3.8.2 BIOS Boot Optimizations
Use of the following BIOS Setup program settings reduces the POST execution time:
• In the Boot Menu, set the hard disk drive as the first boot device. As a result, the POST does
not first seek a diskette drive, which saves about one second from the POST execution time.
• In the Peripheral Configuration submenu, disable the LAN device if it will not be used. This
can reduce up to four seconds of option ROM boot time.
NOTE
It is possible to optimize the boot process to the point where the system boots so quickly that the
Intel logo screen (or a custom logo splash screen) will not be seen. Monitors and hard disk drives
with minimum initialization times can also contribute to a boot time that might be so fast that
necessary logo screens and POST messages cannot be seen.
This boot time may be so fast that some drives might be not be initialized at all. If this condition
should occur, it is possible to introduce a programmable delay ranging from three to 30 seconds
(using the Hard Disk Pre-Delay feature of the Advanced Menu in the Drive Configuration Submenu
of the BIOS Setup program).
84
Overview of BIOS Features
3.9 BIOS Security Features
The BIOS includes security features that restrict access to the BIOS Setup program and who can
boot the computer. A supervisor password and a user password can be set for the BIOS Setup
program and for booting the computer, with the following restrictions:
• The supervisor password gives unrestricted access to view and change all the Setup options in
the BIOS Setup program. This is the supervisor mode.
• The user password gives restricted access to view and change Setup options in the BIOS Setup
program. This is the user mode.
• If only the supervisor password is set, pressing the <Enter> key at the password prompt of the
BIOS Setup program allows the user restricted access to Setup.
• If both the supervisor and user passwords are set, users can enter either the supervisor password
or the user password to access Setup. Users have access to Setup respective to which password
is entered.
• Setting the user password restricts who can boot the computer. The password prompt will be
displayed before the computer is booted. If only the supervisor password is set, the computer
boots without asking for a password. If both passwords are set, the user can enter either
password to boot the computer.
• For enhanced security, use different passwords for the supervisor and user passwords.
• Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to 16 characters in
length.
Table 40 shows the effects of setting the supervisor password and user password. This table is for
reference only and is not displayed on the screen.
Table 40. Supervisor and User Password Functions
Password Set
Neither Can change all
Supervisor
only
User only N/A Can change all
Supervisor
and user set
Note: If no password is set, any user can change all Setup options.
During the POST, the BIOS generates diagnostic progress codes (POST-codes) to I/O port 80h. If
the POST fails, execution stops and the last POST code generated is left at port 80h. This code is
useful for determining the point where an error occurred.
Displaying the POST-codes requires a PCI bus add-in card, often called a POST card. The POST
card can decode the port and display the contents on a medium such as a seven-segment display.
NOTE
The POST card must be installed in PCI bus connector 1.
The following tables provide information about the POST codes generated by the BIOS:
• Table 43 lists the Port 80h POST code ranges
• Table 44 lists the Port 80h POST codes themselves
• Table 45 lists the Port 80h POST sequence
NOTE
In the tables listed above, all POST codes and range values are listed in hexadecimal.
Table 43. Port 80h POST Code Ranges
Range Category/Subsystem
00 – 0F Debug codes: Can be used by any PEIM/driver for debug.
10 – 1F Host Processors: 1F is an unrecoverable CPU error.
20 – 2F Memory/Chipset: 2F is no memory detected or no useful memory detected.
30 – 3F Recovery: 3F indicated recovery failure.
40 – 4F Reserved for future use.
50 – 5F I/O Busses: PCI, USB, ISA, AT A, etc. 5F is an unrecoverable error. Start with PCI.
60 – 6F Reserved for future use (for new busses).
70 – 7F Output Devices: All output consoles. 7F is an unrecoverable error.
80 – 8F Reserved for future use (new output console codes).
90 – 9F Input devices: Keyboard/Mouse. 9F is an unrecoverable error.
A0 – AF Reserved for future use (new input console codes).
B0 – BF Boot Devices: Includes fixed media and removable media. BF is an unrecoverable error.
C0 – CF Reserved for future use.
D0 – DF Boot device selection.
E0 – FF F0 – FF: FF processor exception.
E0 – EE: Miscellaneous codes. See Table 44.
EF boot/S3: resume failure.
22 Reading SPD from memory DIMMs
23 Detecting presence of memory DIMMs
24 Programming timing parameters in the memory controller and the DIMMs
25 Configuring memory
26 Optimizing memory settings
27 Initializing memory, such as ECC init
28 Testing memory
50 Enumerating PCI busses
51 Allocating resources to PCI bus
52 Hot Plug PCI controller initialization
53 – 57 Reserved for PCI Bus
58 Resetting USB bus
59 Reserved for USB
5A Resetting PATA/SATA bus and all devices
5B Reserved for ATA
5C Resetting SMBUS
5D Reserved for SMBUS
70 Resetting the VGA controller
71 Disabling the VGA controller
72 Enabling the VGA controller
78 Resetting the console controller
79 Disabling the console controller
7A Enabling the console controller
B0 Resetting fixed media
B1 Disabling fixed media
B2 Detecting presence of a fixed media (IDE hard drive detect ion etc.)
B3 Enabling/configuring a fixed media
B8 Resetting removable media
B9 Disabling removable media
BA Detecting presence of a removable media (IDE, CD-ROM detection, etc.)
BC Enabling/configuring a removable media
DyTrying boot selection y (y=0 to 15)
E0 Started dispatching PEIMs (emitted on first report of EFI_SW_PC_INIT_BEGIN
EFI_SW_PEI_PC_HANDOFF_TO_NEXT)
E2 Permanent memory found
E1, E3 Reserved for PEI/PEIMs
E4 Entered DXE phase
E5 Started dispatching drivers
E6 Started connecting drivers
Keyboard (PS2 or USB)
Mouse (PS2 or USB)
Fixed Media
Removable media
PEI Core
DXE Core
BDS
continued
90
Table 44. Port 80h POST Codes (continued)
POST Code Description of POST Operation
E7 Waiting for user input
E8 Checking password
E9 Entering BIOS setup
EA TBD – Flash Update
EB Calling Legacy Option ROMs
EE TBD – Calling INT 19. One beep unless silent boot is enabled
EF TBD – Unrecoverable Boot failure/S3 resume failure
F4 Entering Sleep state
F5 Exiting Sleep state
F8 EFI boot service ExitBootServices ( ) has been called
F9 EFI runtime service SetVirtualAddressMap ( ) has been called
FA EFI runtime service ResetSystem ( ) has been called
30 Crisis Recovery has initiated per User request
31 Crisis Recovery has initiated by software (corrupt flash)
34 Loading recovery capsule
35 Handing off control to the recovery capsule
3F Unable to recover
21 Initializing a chipset component
22 Reading SPD from memory DIMMs
23 Detecting presence of memory DIMMs
25 Configuring memory
28 Testing memory
34 Loading recovery capsule
E4 Entered DXE phase
12 Starting Application processor initialization
13 SMM initialization
50 Enumerating PCI busses
51 Allocating resourced to PCI bus
92 Detecting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
95 Keyboard Self Test
EB Calling Video BIOS
58 Resetting USB bus
5A Resetting PATA/SATA bus and all devices
92 Detecting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
5A Resetting PATA/SATA bus and all devices
28 Testing memory
90 Resetting keyboard
94 Clearing keyboard input buffer
E7 Waiting for user input
01 INT 19
00 Ready to boot
92
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