Number of tones:128
Number of drum sets:8
Number of layer voice: 32
Digital effects:10, including Reverb-1, Reverb-2, Reverb-3, Chorus, Tremolo,
Phase Shifter, Organ SP, Enhancer, Flanger, EQ Loudness
Demonstration tune:Suite for Rebecca (Arranged and programmed by Wojtek Gogoleski)
Volume control:Analog volume
MIDI monitor:LED
Tuning:Center: 440 Hz
Terminals:Headphone Jack [Output impedance: 68 Ω, Output voltage: 0.3 V(rms)MAX],
Line Out Jack [Output impedance: 2 KΩ, Output voltage: 1.5 V8rms) MAX],
MIDI IN Jack, AC Adapter Jack (9 V)
Power source:AC source only: AC adapter
Power consumption:2.8 W
Dimensions (HWD):35 x 113 x 169 mm (1-3/8 x 4-7/16 x 6-5/8 inches)
Weight:450 g (1 lbs)
ELECTRICAL
Current drain with 9 V DC:
No sound output210 mA ± 20%
Maximum volume230 mA ± 20%
with 32 polyphonic in tone No.078
Volume; maximum, Touch response: maximum
Phone output Level (Vrms with 8 Ω load each channel):
with keys C6 and F6 in tone No.07885 mV ± 20%
Line output level (Vrms with 47 KΩ load each channel):
* See next page for information about the initial settings.
Local control On/OffControl No. 1220: Off, 127: On
All notes offControl No. 123
Registered Parameter Number (RPN) Control No. 36: LSB, No.37: MSB
Pitch bend sense Control No. 10000H
Control No. 10100H
Data entryControl No. 600H - 0CH
Control No. 3600H
Fine tuningControl No. 10001H
Control No. 10100H(20H: -50 cents)
Data entryControl No. 620H - 40H - 60H(40H: center)
Control No. 3600H(60H: +50 cents)
Coarse tuningControl No. 10002H
Control No. 10100H(34H: -12 seminotes)
Data entryControl No. 634H - 40H - 4CH(40H: center)
Control No. 3600H(4CH: +12 seminotes)
RPN nullControl No. 1007FH
Control No. 1017FH
Active sensing:
Channel pressure: Reconized as modulation
System exclusive: Effect change[F0][44][0B][09][xx][F7]
Modulation
Data entry
Volume
Pan
Expression
Hold 1
Sostenuto
Soft
External effect depth
RPN LSB • MSB
All sounds off
Reset all controllers
Program
Change :True #
System Exclusive
System: Song Pos
Common: Song Sel
: Tune
System: Clock
Real Time: Commands
Aux: Local ON/OFF
Messages: All notes OFF
: Active Sense
: Reset
Remarks
Mode 1 : OMNI ON, POLYMode 2 : OMNI ON, MONO
Mode 3 : OMNI OFF, POLYMode 4 : OMNI OFF, MONO
X
❊❊❊❊❊❊❊❊❊❊❊❊❊❊
X
X
X
X
X
X
X
X
X
X
*2: Vibrato effect is obtained when received either message of modulation or channel
after touch.
*3: Reception of pitch bend sense, fine tune, coarse tune, and RPN Null.
*4:GM system on[F0][7E][7F][09][01][F7]
Effect Change[F0][44][0B][09][xx][F7]
O
❊❊❊❊❊❊❊❊❊❊❊❊❊❊
O
X
X
X
X
X
X
O
O
X
0 ~ 127
*4
[xx]: E_0[00] - E_9[09], Off[0F]
O
X
: No
: Yes
— 5 —
LIST OF TONES AND OCTAVE RANGES
TONE NO./TONE NAME
PIANO
000 PIANO032 WOOD BASS
001 HARD PIANO033 ELEC BASS 1
002 STUDIO PIANO034 ELEC BASS 2
003 HONKY-TONK035 FRETLESS BASS
004 ELEC PIANO 1036 SLAP BASS 1
005 ELEC PIANO 2037 SLAP BASS 2
006 HARPSICHORD038 SYNTH-BASS 1
Acoustic Bass Drum
Bass Drum 1
Side Stick
Acoustic Snare
Hand Clap
Electric Snare
Low Floor Tom
Closed Hi Hat
High Floor Tom
Pedal Hi Hat
Low Tom
Open Hi Hat
Low Mid Tom
High Mid Tom
Crash Cymbal 1
High Tom
Ride Cymbal 1
Chinese Cymbal
Ride Bell
Tambourine
Splash Cymbal
Cowbell
Crash Cymbal 2
Vibraslap
Ride Cymbal 2
High Bongo
Low Bongo
Mute High Conga
Open High Conga
Low Conga
High Timbale
Low Timbale
High Agogo
Low Agogo
Cabasa
Maracas
Short Whistle
Long Whistle
Short Guiro
Long Guiro
Claves
High Wood Block
Low Wood Block
Mute Cuica
Open Cuica
Mute Triangle
Open Triangle
Shaker
Suzu
Sticks
— 8 —
BLOCK DIAGRAM
MIDI IN
Effect RAM
(256K-bit)
LSI102
LC33832M-70
Photocoupler
IC106
PC900VP
Power ON signal
EA0 ~ EA14
ED0 ~ ED7
CPU
LSI104
HD6433298A42F
A0 ~
A14
D0~D7
A0 ~ A14
DSP
LSI103
HG51B115FD
A0 ~ A3
RESET
POWER
Working Storage RAM
(64K-bit)
LSI106
SRM2264LM90-B
RA0 ~ RA19
RD0 ~ RD15
Sound Source ROM
TC5316200CF-C117
Reset IC
IC104
RH5VL36A
Power Switch
(16M-bit)
LSI105
DC IN
VCC
Power Supply Circuit
DVDD
AVDD
D102, D103
Q101~Q105
Line Out
VDD
Mute Circuit
Q108, Q109
WCK1 SLOP BCK
D/A Converter
LSI101
UPD6376GS
Filter
IC103
Main
Volume
Line Out Amplifier
M5218AFP
Filter
IC103
IC102
Headphone
Amplifier
IC101
LA4525
Headphone
— 9 —
CIRCUIT DESCRIPTION
CPU (LSI104: HD6433298A42F)
The 16-bit CPU contains a 32k-bit ROM, a 1k-bit RAM, seven 8-bit I/O ports and MIDI interfaces. The
CPU receives MIDI message and interprets it using the working storage RAM. For instance, when receiving NOTE ON message, the CPU sends the note number and its velocity to the DSP in order to produce
sound of that note.
The following table shows the pin functions of LSI104.
Pin No.TerminalIn/OutFunction
1P50/TXD— Not used
2P51/RXDIn MIDI signal input
3P52/SCKOut Reset signal output
4-RESETIn Reset signal input
5-NMIIn Power ON trigger signal input
6VCCIn +5V source
7-STBYIn Standby signal input. Connected to +5V.
8VSSIn Ground (0V) source
9, 10XTAL, EXTALIn 20MHz clock input
11, 12MD1, MD0In Mode selection input
13AVSSIn Ground (0V) source
14 ~ 20P70 ~ P76In Not used. Connected to ground.
21P77In DEMO button input signal
22AVCCIn +5V source
23P60Out LED drive signal output
24 ~30P61 ~ P67— Not used
31VCCIn +5V source
32P27— Not used
33 ~ 48A0 ~ A14Out Address bus
40VSSIn Ground (0V) source
49 ~ 56D0 ~ D7In/Out Data bus
57, 58P40, P41— Not used.
59P42Out Power ON signal output
60P43Out Read enable signal output
61P44In Write enable signal output
62P45— Not used
63P46Out Terminal for 10 MHz clock check point
64P47— Not used. Connected to +5 V source.
DIGITAL SIGNAL PROCESSOR (LSI03: HG51B155FD-1)
Upon receipt of a note number and its velocity, the DSP reads sound and velocity data from the sound
source ROM in accordance with the received MIDI message. Then it provides 16-bit serial signal to the
DAC. If a control change message or "an effect change" of exclusive message has been received, the
DSP adds the effect to the sound data using the effect RAM.
The following table shows the pin functions of LSI103.
— 10 —
Pin No.TerminalIn/OutFunction
1 ~ 8CD0 ~ CD7In/Out Data bus
9, 10CE1, TRSB— Not used
11GND7In Ground (0V) source
12CK16Out Terminal for 24.576 MHz clock check point
13VCC1In +5V source
14CK0In Clock input. Connected to terminal CK16.
15TCKB— Not used
16VCC1In +5V source
17GND1In Ground (0V) source
20SGLIn System control terminal. Single chip system: Open
21CCSBIn Chip select signal input
22 ~ 25CA0 ~ CA3In Address bus
26CE0In Not used. Connected to ground.
27CWRBIn Write enable signal
28CRDBIn Read enable signal
29 ~ 32—— Not used
33RESBIn Reset signal input
34TESBIn Not used. Connected to +5V.
35 ~ 39—— Not used
40 ~ 49
52 ~ 57
RD0 ~ RD15In Data bus for the sound source ROM
50VCC2In +5V source
51GND2In Ground (0V) source
58RA23Out Not used
59RA22Out Chip select signal for the sound source ROM
60, 61RA20, RA21Out Not used
62 ~ 73
75 ~ 82
RA0 ~ RA19Out Address bus for the sound source ROM
74GND5In Ground (0V) source
83WOK2Out Not used
84VCC3In +5V source
85GND3In Ground (0V) source
86WOK1Out Word clock for the DAC
87SOLMOut Not used
88SOLPOut Serial sound data output
89BOKOut Bit clock output
90 ~ 92—— Not used
93VCC5In +5V source
94, 95
97 ~ 105
107,109
EA0 ~ EA12Out Address bus for the effect RAM
110, 112
96EWEBOut Write enable signal for the effect RAM
— 11 —
Pin No.TerminalIn/OutFunction
106EOEBOut Read enable signal output for the effect RAM
108VCC7In +5V source
111ECEBOut Chip select signal output for the effect RAM
113 ~ 117 ED11 ~ ED15— Not used
118VCC4In +5V source
119GND4In Ground (0V) source
120 ~ 122ED8 ~ ED10— Not sued
123 ~ 130ED0 ~ ED7In/Out Data bus for the effect RAM
131GND5In Ground (0V) source
132 ~ 134—— Not used. Connected to ground.
135, 136—— Not used
Block diagram of DSP and DAC circuit
Sound Source ROM
LSI105
TC5316200CF-C117
CE
A0 ~ A19D0 ~ D15
RA22
RA0 ~
RA19
RD0 ~
RD15
SOLP: Sound data
BOK: Bit clock
WOK1: Word clock
DAC
A13
RD
D0 ~ D7
A0 ~ A3
CCSB
CRDB
DSP
LSI103
HG51B155FD-1
SOLP
BOK
WOK1
LSI101
SI
CLK
LRCK
UPD6376GS
ROUT
LOUT
Power ON signal
WR
RESET
CWRB
RESB
ECEB EOEB
OE
CS
WE
EWEB
ED0 ~
ED15
D0 ~ D15
EA0 ~
EA14
A0 ~ A14
PG
X102
24.576 MHz
Effect RAM (256K-bit)
LSI102
LC33832M-70
DAC (LSI101: UPD6376GS)
The DAC receives 16-bit serial data and two clocks output from the DSP. The DAC converts the data into
analog waveforms by each channel and output them separately.
The following table shows the pin functions of LSI101.
— 12 —
Pin No.TerminalIn/OutFunction
1SELIn Mode selection terminal. Connected to ground.
2D.GNDIn Ground (0V) source for the internal digital circuit
3NC Not used.
4DVDDIn +5V source for the internal digital circuit
5A.GNDIn Ground (0V) source for the right channel
6R.OUTOut Right channel sound waveform output
7, 8A.VDDIn +5V source for the internal analog circuit
9R.REFIn Right channel reference voltage terminal
10L.REFIn Left channel reference voltage terminal
11L.OUTOut Left channel sound waveform output
12A.GNDIn Ground (0V) source for the left channel
13LRCKIn Word clock input
14LRSELIn Not used. Connected to ground.
15SIIn Sound data input
16CLKIn Bit clock input
POWER SUPPLY CIRCUIT
The power supply circuit generates five voltages as shown in the following table. VDD voltage is always
generated. The others are controlled by the power ON signal output from the CPU.
NameVoltageFor operation of
VDD+5 VCPU, Reset IC, Working strage RAM
DVDD+5 VDSP, Effect RAM, DAC, Pilot lamp
AVDD+5VDAC, Filter
AVCC+7 VHeadphone amplifier, Line ount amplifier
VCC+8 VMute circuit
RESET CIRCUIT
When an AC adapter is connected, the reset IC provides a low pulse to the CPU. The CPU then initializes
its internal circuit and clears the working storage RAM.
When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU provides
the power ON signal to the power supply circuit and raises RESET signal to +5V to reset the DSP.
VDD
RESET
Reset IC
IC104
RH5VL36A
POWER
From power switch
VDD
CPU
LSI104
HD6433298A42F
-NMI
HG51B155FD-1
-RESET
Power ON signal
P42
To power supply circuit
DVDDVDD
DSP
LSI103
Working Storage RAM
LC3564SM-85
LSI106
— 13 —
MAJOR WAVEFORMS
1
2
CH1:CH2:
1
Voltage VDD
Emitter of Q105
2
Initial reset signal
RH5VL36A pin 1
0.1 s
CH1
3
0.1 s
CH1
CH2
4
CH2
5
5 V5 V
CH1:CH2:
3
Power ON trigger -NMI
HD6433298A42F pin 5
4
Power ON signal
HD6433298A42F pin 59
5
Reset signal
HD6433298A42F pin 3
5 V5 V
6
7
8
5 VCH1:5 VCH2:5 VCH3:5 VCH1:
6
Word clock WOK1
UPD6376GS pin 13
7
Data SI (Note OFF)
UPD6376GS pin 15
8
Bit clock BOK
UPD6376GS pin 16
5 µs
CH1
CH2
CH3
9
9 MIDI data
PC900VP pin 4
Basic channel
Note No.
Velocity
2 ms
CH1
: 1
: 60 (C3)
: 127 (Maximum)
— 14 —
0
A
1 ms
CH1
CH2
B
C
1 ms
CH1
CH2
D
E
50 mV
~
CH1:CH2:
0
DAC output
UPD6376GS pin 11
A
Filter output
M5218AFP pin 1
50 mV
~
CH1:CH2:50 mV
B
~
.5 V
~
Line out amp. input (L-ch)
C111
C
Line out amp. output (L-ch)
C161
1 ms
CH1
CH2
Program change (Tone No)
Note No. (Key)
Velocity
: 81 (A4)
: 127 (Maximum)
: 078 (Whistle)
CH1:CH2:10 mV
D
Headphone amp. input
~
LA4525 pin 7
E
Headphone amp. output
LA4525 pin 1
1 V
~
— 15 —
PCB VIEW AND CHECK POINTS
2
13
3
4
5
1
R112
C152
LSI104
LSI106
C105
C108
C109
C186
J101
D104
X101
R150
R109
B
D102
C114
C183C185
L104
C161
Q103
C119
R149
1
C184
J102
R171
E
CA101
C187
R145
C140
C118
R185
Q108
C117
R119
R173
C110
C121
D105
IC104
R144
C138
R158
R159
5
X102
C116
FB112
R117
R160
Q105
C104
R118
C112
C160
C107
J103
R170
C120
C113
C156
R175
Q109
C111
C106
IC101
D106
D107
C163
C157
C125
1
R181R182
R184
C137
CB101
D109
LSI101
3
IC106
Q110R176
C164
C131
C130
R130
C103
C102
C122
FB111
C162
LSI103
C101
J104
R134
C136
C135
IC103
C123
R177
R178
C188
C182
C153
C133
9
8
7
6
10
11
Top View
— 16 —
VR101
151214
PCBs JCM304-MA1M/MA2M
SCHEMATIC DIAGRAM
15
8.4
14
0.0
7.3
8.0
0.7
5.6
7.8
5.6
5.0
5.0
7.2
8
7
6
1
12
11
13
10
9
5
4
2
3
SRM2264LM90
— 17 —
EXPLODED VIEW
6
3
1
4
5
2
— 18 —
PARTS LIST
GZ-50M
Notes:1.Prices and specifications are subject to change with-
out prior notice.
2.As for spare parts order and supply, refer to the
"GUIDEBOOK for Spare parts Supply", published
seperately.
3.The numbers in item column correspond to the same
numbers in drawing.