Burr Brown Corporation ADS574JE, ADS574AU-1K, ADS574AU, ADS574KU, ADS574KP Datasheet

© 1991 Burr-Brown Corporation PDS-1104F Printed in U.S.A. July, 1993

ADS574

FEATURES

● REPLACES ADC574 FOR NEW DESIGNS

● COMPLETE SAMPLING A/D WITH

REFERENCE, CLOCK AND
MICROPROCESSOR INTERFACE

● FAST ACQUISITION AND CONVERSION:

25

µs max

● ELIMINATES EXTERNAL SAMPLE/HOLD

IN MOST APPLICATIONS

● GUARANTEED AC AND DC PERFORMANCE

● SINGLE +5V SUPPLY OPERATION

● LOW POWER: 100mW max

● PACKAGE OPTIONS: 0.6" and 0.3" DIPs,

SOIC

DESCRIPTION

The ADS574 is a 12-bit successive approximation
analog-to-digital converter using an innovative
capacitor array (CDAC) implemented in low-power
CMOS technology. This is a drop-in replacement for
ADC574 models in most applications, with internal
sampling, much lower power consumption, and capa­bility to operate from a single +5V supply.

The ADS574 is complete with internal clock, micro­processor interface, three-state outputs, and internal
scaling resistors for input ranges of 0V to +10V, 0V to
+20V, ±5V, or ±10V. The maximum throughput time
for 12-bit conversions is 25µs over the full operating
temperature range, including both acquisition and con­version.

Complete user control over the internal sampling func­tion facilitates elimination of external sample/hold
amplifiers in most existing designs.

The ADS574 requires +5V, with –12V or –15V op­tional, depending on usage. No +15V supply is re­quired. Available packages include 0.3" or 0.6" wide
28-pin plastic DIPs and 28-lead SOICs.

Microprocessor-Compatible Sampling

CMOS ANALOG-TO-DIGITAL CONVERTER

Comparator

2.5V Reference
Input

CDAC

10V Range

20V Range

Bipolar Offset

–
+

2.5V Reference
Output

Control
Inputs

2.5V

Reference

Clock

Successive

Approximation

Register

Control Logic

Three-State Buffers

Status

Parallel
Data
Output

®

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ADS574

ADS574

ADS574

®

ADS574

2

ADS574JE, JP, JU ADS574KE, KP, KU

PARAMETER MIN TYP MAX MIN TYP MAX UNITS
RESOLUTION 12 ✻ Bits

INPUTS
ANALOG

Voltage Ranges: Unipolar 0 to +10, 0 to +20 V

Bipolar ±5, ±10 V

Impedance: 0 to +10V, ±5V 15 21 ✻✻ kΩ

±10V, 0V to +20V 60 84 ✻✻ kΩ

DIGITAL (CE, CS, R/C, A

O

, 12/8)

Voltages: Logic 1 +2.0 +5.5 ✻✻V

Logic 0 –0.5 +0.8 ✻✻V
Current –5 0.1 +5 ✻✻✻µA
Capacitance 5 ✻ pF

TRANSFER CHARACTERISTICS
DC ACCURACY

At +25°C

Linearity Error ±1 ±1/2 LSB
Unipolar Offset Error (adjustable to zero) ±2 ✻ LSB
Bipolar Offset Error (adjustable to zero) ±10 ±4 LSB
Full-Scale Calibration Error

(1)

(adjustable to zero) ±0.25 ✻ % of FS

(2)

No Missing Codes Resolution (Diff. Linearity) 12 12 Bits

T

MIN

to T

MAX

(3)

Linearity Error ±1 ±1/2 LSB
Full-Scale Calibration Error ±0.47 ±0.37 % of FS
Unipolar Offset ±4 ±3 LSB
Bipolar Offset ±12 ±5 LSB
No Missing Codes Resolution 12 12 Bits

AC ACCURACY

(4)

Spurious Free Dynamic Range 73 78 76 ✻ dB

Total Harmonic Distortion –77 –72 ✻ –75 dB
Signal-to-Noise Ratio 69 72 71 ✻ dB
Signal-to-(Noise + Distortion) Ratio 68 71 70 ✻ dB
Intermodulation Distortion –75 ✻

(F

IN1

= 10kHz, F

IN2

= 11.5kHz)

TEMPERATURE COEFFICIENTS

(5)

Unipolar Offset ±1 ✻ ppm/°C
Bipolar Offset ±2 ✻ ppm/°C
Full-Scale Calibration ±12 ✻ ppm/°C

POWER SUPPLY SENSITIVITY

Change in Full-Scale Calibration

(6)

+4.75V < VDD < +5.25V ±1/2 ✻ LSB

CONVERSION TIME (Including Acquisition Time)
t

AQ

+ tC at 25°C:
8-Bit Cycle 16 18 ✻✻µs
12-Bit Cycle 22 25 ✻✻µs
12-Bit Cycle, T

MIN

to T

MAX

22 25 ✻✻µs

SAMPLING DYNAMICS

Sampling Rate 40 ✻ kHz

Aperture Delay, t

AP

With VEE = +5V 20 ✻ ns
With V

EE

= 0V to –15V 4.0 ✻ µs

Aperture Uncertainty (Jitter)

With V

EE

= +5V 300 ✻ ps, rms

With V

EE

= 0V to –15V 30 ✻ ns, rms

OUTPUTS
DIGITAL (DB

11

- DB0, STATUS)

Output Codes: Unipolar Unipolar Straight Binary (USB)

Bipolar Bipolar Offset Binary (BOB)

Logic Levels: Logic 0 (I

SINK

= 1.6mA) +0.4 ✻ V

Logic 1 (I

SOURCE

= 500µA) +2.4 ✻ V
Leakage, Data Bits Only, High-Z State –5 0.1 +5 ✻✻✻µA
Capacitance 5 ✻ pF

SPECIFICATIONS

ELECTRICAL

At TA = T

MIN

to T

MAX

, VDD = +5V, VEE = –15V to +5V, sampling frequency of 40kHz, and fIN = 10kHz, unless otherwise specified.

3

®

ADS574

INTERNAL REFERENCE VOLTAGE

Voltage +2.4 +2.5 +2.6 ✻✻✻V
Source Current Available for External Loads 0.5 ✻ mA

POWER SUPPLY REQUIREMENTS

Voltage: V

EE

(7)

–16.5 V

DD

✻✻V

V

DD

+4.5 +5.5 ✻✻V

Current: I

EE

(7)

(VEE = –15V) –1 ✻ mA

I

DD

+13 +20 ✻✻mA

Power Dissipation (T

MIN

to T

MAX

)

(V

EE

= 0V to +5V) 65 100 ✻✻mW

TEMPERATURE RANGE

Specification 0 +70 ✻✻°C

Operating: –40 +85 ✻✻°C
Storage –65 +150 ✻✻°C

✻ Same specification as ADS574JE, JP, JU.
NOTES: (1) With fixed 50Ω resistor from REF OUT to REF IN. This parameter is also adjustable to zero at +25°C. (2) FS in this specification table means Full Scale
Range. That is, for a ±10V input range, FS means 20V; for a 0 to +10V range, FS means 10V. (3) Maximum error at T

MIN

and T

MAX

. (4) Based on using VEE =

+5V, which starts a conversion immediately upon a convert command. Using V

EE

= 0V to –15V makes the ADS574/ADS774 emulate standard ADC574 operation.
In this mode, the internal sample/hold acquires the input signal after receiving the convert command, and does not assume that the input level has been stable
before the convert command arrives. (5) Using internal reference. (6) This is worst case change in accuracy from accuracy with a +5V supply. (7) V

EE

is optional,

and is only used to set the mode for the internal sample/hold. When V

EE

= –15V, IEE = –1mA typ; when VEE = 0V, IEE = ±5µA typ; when VEE = +5V, IEE = +167µA

typ.

SPECIFICATIONS (CONT)

ELECTRICAL

At TA = T

MIN

to T

MAX

, VDD = +5V, VEE = –15V to +5V, sampling frequency of 40kHz, and fIN = 10kHz, unless otherwise specified.

ADS574JE, JP, JU ADS574KE, KP, KU

PARAMETER MIN TYP MAX MIN TYP MAX UNITS

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

ABSOLUTE MAXIMUM RATINGS

VEE to Digital Common....................................................... +VDD to –16.5V

V

DD

to Digital Common .............................................................. 0V to +7V

Analog Common to Digital Common.................................................... ±1V

Control Inputs (CE, CS, A

O

, 12/8, R/C)

to Digital Common .................................................. –0.5V to V

DD

+0.5V

Analog Inputs (Ref In, Bipolar Offset, 10V

IN

)

to Analog Common ......................................................................±16.5V

20V

IN

to Analog Common ..................................................................±24V

Ref Out.......................................................... Indefinite Short to Common,

Momentary Short to V

DD

Max Junction Temperature ............................................................ +165°C

Power Dissipation ........................................................................1000mW

Lead Temperature (soldering,10s)................................................. +300°C

Thermal Resistance,

θ

JA

: Plastic DIPs........................................ 100°C/W

SOIC................................................... 100°C/W

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.

PACKAGE/ORDERING INFORMATION

PACKAGE DRAWING TEMPERATURE LINEARITY

PRODUCT PACKAGE NUMBER

(1)

SINAD

(2)

RANGE ERROR (LSB)

ADS574JE 0.3" Plastic DIP 246 68 0°C to +70°C ±1
ADS574KE 0.3" Plastic DIP 246 70 0°C to +70°C ±1/2
ADS574JP 0.6" Plastic DIP 215 68 0°C to +70°C ±1
ADS574KP 0.6" Plastic DIP 215 70 0°C to +70°C ±1/2
ADS574JU SOIC 217 68 0°C to +70°C ±1
ADS574KU SOIC 217 70 0°C to +70°C ±1/2

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) SINAD is Signal-to-(Noise
and Distortion) expressed in dB.

®

ADS574

4

CONNECTION DIAGRAM

1

2

3

4

5

Power-Up Reset

Control

Logic

Clock

12 Bits

Succesive Approximation Register

12

Bits

Three-State Buffers and Control

Nibble A

Nibble BNibble C

–
+

CDAC

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

+5VDC Supply

(V )

DD

A

O

–

R/C

–

12/8

CE

NC*

2.5V Ref
Out

Analog

Common

2.5V Ref
In

Bipolar

Offset

10V Range

20V Range

Digital
Common

DB0 (LSB)

DB1

DB2

DB3

DB4

DB5

DB6

DB7

DB8

DB9

DB10

DB11 (MSB)

Status

*Not Internally Connected

2.5V

Reference

CS

VEE (Mode Control)