2
®
INA148
SPECIFICATIONS: VS = ±5V to ±15V Dual Supplies
At TA = +25°C, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
INA148UA
PARAMETER CONDITIONS MIN TYP MAX UNITS
OFFSET VOLTAGE (V
O
) RTI
(1)(2)
Input Offset Voltage V
OS
VS = ±15V, V
CM
= 0V ±1 ±5mV
VS = ±5V, V
CM
= 0V ±1 ±5mV
Drift ∆V
OS
/∆T At TA = –40°C to +85°C ±10 µV°C
vs Power Supply PSRR V
S
= ±1.35V to ±18V, V
CM
= 0V ±50 ±400 µV/V
INPUT VOLTAGE RANGE
Common-Mode Voltage Range V
CM
VS = ±15V, (V
IN
+
) – (V
IN
–
) = 0V –200 +200 V
VS = ±5V, (V
IN
+
) – (V
IN
–
) = 0V –100 +80 V
Common-Mode Rejection CMRR
VS = ±15V, V
CM
= –200V to +200V, RS = 0Ω
70 86 dB
VS = ±5V, V
CM
= –100V to +80V, RS = 0Ω
70 86 dB
INPUT IMPEDANCE
Differential 2MΩ
Common Mode 1MΩ
NOISE RTI
(1)(3)
Voltage Noise, f = 0.1Hz to 10Hz e
n
17 µVp-p
Voltage Noise Density, f = 1kHz 880 nV/√Hz
GAIN
Initial
(1)
1 V/V
Gain Error V
O
= (V–) + 0.5 to (V+) – 1.5 ±0.01 ±0.075 %
vs Temperature ±3 ±10 ppm/°C
Nonlinearity
VS = ±15V, VO = (V–) + 0.5 to (V+) – 1.5
±0.001 ±0.002 % of FSR
VS = ±5V, VO = (V–) + 0.5 to (V+) – 1.5
±0.001 % of FSR
FREQUENCY RESPONSE
Small Signal Bandwidth 100 kHz
Slew Rate 1V/µs
Settling Time: 0.1% V
S
= ±15V, 10V Step 21 µs
0.01% V
S
= ±15V, 10V Step 25 µs
0.1% V
S
= ±5V, 6V Step 21 µs
0.01% VS = ±5V, 6V Step 25 µs
Overload Recovery 50% Input Overload 24 µs
OUTPUT (V
O
)
Voltage Output R
L
= 100kΩ (V–) + 0.25 (V+) – 1 V
R
L
= 10kΩ (V–) + 0.5 (V+) – 1.5 V
Output Current I
O
Short-Circiuit Current Continuous to Common ±13 mA
Capacitive Load Stable Operation 10 nF
POWER SUPPLY
Operating Range, Dual Supplies ±1.35 ±18 V
Quiescent Current V
IN
= 0, IO = 0 ±260 ±300 µA
TEMPERATURE RANGE
Specified –40 85 °C
Operating –55 125 °C
Storage –55 125 °C
Thermal Resistance
θ
JA
SO-8 Surface Mount 150 °C/W
NOTES: (1) Overall difference amplifier configuration. Referred to input pins (V
IN
+
and V
IN
–
), gain = 1V/V (2) Input offset voltage specification includes effects of
amplifier's input bias and offset currents. (3) Includes effects of input current noise and thermal noise contribution of resistor network.