Brainboxes AD-593, AD-604, AD-923, PC AD1200 User Manual

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2.1 EDITION Feb 1995
da
1200Series
Page 2
PC AD1200 Reference
Thank You For Buying
PC AD1200
We proudly present the PC AD1200 Interface Board.
The PC AD1200 Interface allows the PC user to measure and control ’Real World’ analogue signals. AD1200 is 100% compatible with the widely available DT2811 card and yet has features that surpass and out perform that product. Blending the discrete digital domain of computers with the infinitely variable Analogue realm brings great power to the user, allowing control and monitoring of almost any process. AD1200’s mix of high performance Analogue to Digital input, Digital to Analogue output, Digital input and Digital output hardware with a fully functioned software package provides a straight forward route to excellence in signal acquisition. Extend your grasp with AD1200.
Your board is designed and manufactured in England, and our policy is one of complete support to our dealers and direct to our users. Please note, PC AD1200 is designed ’in house’ and is completely understood by our staff. Its great strength is the software support we give it. Our intention is to supply the software and any technical information you may need to allow you to exercise complete control over the AD1200 board and software. After searching the manuals, do not hesitate to contact us on our HOTLINE numbers given on Intro Page-2, if you need help.
We are particularly keen to provide new operating system or language drivers to expand the range of applications using our PC AD1200 board.
We trust that if you adhere to the following procedures you will enjoy many years of useful service from your AD1200 card.
Intro-3
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PC AD1200 Reference
PC AD1200 MANUAL____________________
The Layout Of This Manual._________________________
This manual is a complete description of how to install,
configure and use the PC AD1200 interface board.
The PC AD1200 card, like our other PC add on boards, is an extremely easy to use and understand implementation of Analogue interfacing for IBM PC and compatible computers. We have truly tamed the Analogue world and the PC BUS allowing you to get the most out of your data acquisition system!
Chapter 1, Introduction To The Analogue World
, describes the features of the range of AD1200 cards, discusses the fundamentals of Analogue to Digital conversion, Digital to Analogue conversion and explains exactly how the AD1200 range implements these. Downwards compatibility with the DT2811 is discussed as well as the extra high performance features that distinguish the AD1200 range, this improved design whilst retaining exact compatibility with other manufacturers products gives AD1200 extreme flexibility in its application and use. Converter throughput, interrupt and DMA driven i/o are explained together with a complete description of the AD1200’s timing and control modes.
Chapter 2, Installation Guide, shows you how to
configure and install the PC AD1200 board in one of the expansion slots of your computer and gives the default setting of all configurable options. All settings for I/O base address, IRQ and DMA channels, ADC and DAC voltage ranges are shown. Details of how to connect up the AD1200 to the users system are given.
Intro-4
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PC AD1200 Reference
Chapter 3, The AD1200 Register Map, details the
programmable status and control registers on the card. Whilst most users will use the bundled driver software and so find this information be be unnecessary it is included to make this manual as complete as possible, to allow you to cover every eventuality.
Chapter 4, Calibration, shows how to perform a
calibration of the AD1200 analogue circuitry. The use of the calibration software, the position and function of the onboard trimmer pots and use of ancillary equipment are all described. Calibration should be performed at regular intervals to ensure that the AD1200 remains in specification, and that your analogue measurements are traceable back to nationally and internationally recognised standards.
Chapter 5, Technical Specification, gives the
complete technical specification on the AD1200 series of cards.
The Cumulative Index covers the complete contents of
the manual.
Intro-5
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PC AD1200 Reference
Outline Contents.________________
Chapter 1. Introduction To The Analogue World. Chapter 2. Installation Guide. Chapter 3. The AD1200 Register Map. Chapter 4. Calibration. Chapter 5. Technical Specification. Cumulative Index.
Chapter 1 Introduction To The Analogue World.___________________________________________
Introduction. 1 The PC AD1200 Range Of Cards. 2 From AD1221 Up To AD1200. 3 DT2811 Superset. 4 Introduction To Analogue. 5 Unipolar Vs Bipolar Voltage Ranges. 8 Differential Vs Single Ended Signals. 8
The Analogue To Digital Converter. 9
Input Channel Selection. 10 Programmable Gain. 11 Analogue Input Ranges. 11 Programmed I/O, Interrupts and DMA. 12 Programmed I/O. 12 Interrupt Driven I/O. 12 DMA, Direct Memory Access. 13 The Pacer Clock. 13 A/D Throughput and Pipelining. 14
A/D Operating Modes. 16
A/D Modes 0, 1, 2 & 3. 17 Mode 0, Single Conversions. 17 Mode 1, Continuous Conversions, Int Trig & Clock. 18 Mode 2, Continuous Conversions, Ext Trig Int Clk. 18 Mode 3, Continuous Conversions, Ext Trig & Clock. 19
The Analogue To Digital Converter. 20
D/A Programmed I/O. 20
Intro-6
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PC AD1200 Reference
D/A Interrupts and DMA. AD1200 Card Only. 20
Digital I/O Ports. 21
Digital Port Programmed I/O. 21 Digital Port Interrupts and DMA. AD1200 Only. 21
Screw Terminal Board. 22 4-20mA Current Conversion Options. 23
Chapter 1 List Of Figures._______________________
Figure 1-1. AD1200 Series Common Properties. 2 Figure 1-2. AD1200 Series Options. 3 Figure 1-3. AD1200 card Vs DT2811. 5 Figure 1-4. One Bit A/D Conversion. 6 Figure 1-5. Two Bit A/D Conversion. 6 Figure 1-6. Three Bit A/D Conversion. 7 Figure 1-7. Bit Weights And Resolution. 8 Figure 1-8. Mode 0 & 1 Bits. 16 Figure 1-9. Extended Mode Bits. 17
Chapter 2 Installation Guide.__________________________
Introduction. 24 Configuring The PC AD1200 Board. 24 Setting The PC AD1200 I/O Address. 26 Using More Than One PC AD1200 Board. 33 Interrupt Selection. 33 Setting The Interrupt Jumper Block. 34 DMA Selection. AD1200 Only. 35 Setting The DMA Channel Jumper Block. 36 D/A Output Range Selection. 37 A/D Configuration. 38 8254 Counter Timer Pinouts. 43 Installing The PC AD1200 Board In The Computer. 44 AD1200 Backplane Signals. 46 Signal Types. 47 Wiring Guidelines. 49 Twisted Pair Cables. 49
Intro-7
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PC AD1200 Reference
Shielded Cables. 49 Input Voltage. Overvoltage Warning! 50 Problems! 50
Chapter 2 List Of Figures._______________________
Figure 2-1. AD1200 Card Layout. 25 Figure 2-2. AD1210 AD1211 Card Layout. 26 Figure 2-3. AD1220 AD1221 Card Layout. 26 Figure 2-4a. AD1200 Factory Set DIP Switches. 27 Figure 2-4b. AD1210-21 Factory Set DIP Switches. 28 Figure 2-5. I/O Addresses To Avoid. 28 Figure 2-6. Likely I/O Address. 29 Figure 2-7a. AD1200 Base Addresses. 29 Figure 2-7b. AD1210-21 Base Addresses. 31 Figure 2-8. The IRQ Jumper Block. 35 Figure 2-9. The DMA Jumper Block. 37 Figure 2-11. A/D Channel Input Select. 39 Figure 2-12. AD1200 A/D Input Range Selection. 40 Figure 2-13. AD1210 A/D Input Range Selection. 41 Figure 2-14. AD1220 A/D Input Range Selection. 42 Figure 2-15. OUT0 Via Digital Input Bit 7, Pin36. 43 Figure 2-16. Remove Cover Mounting Screws. 44 Figure 2-17. Removing The PC Cover. 44 Figure 2-18. Removing Blanking Cover. 45 Figure 2-19. Inserting The PC AD1200 Card. 45 Figure 2-20. AD1200 J2 Pin Outs. 46
Chapter 3 AD1200 Register Map._____________________________
Introduction. 51 I/O Address Map. 51 Register Types. 52 Read Write Assignments. 52 Power Up Conditions. 53
The A/D Control Status Register. 53
Bit 7 A/D Done, Read Only. 53 Bit 6 A/D Error, Read Only. 54
Intro-8
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PC AD1200 Reference
Bit 5 A/D Busy, Read Only. 54 Bit 4 Clear A/D Error, Write Only. 54 Bit 3 DMA Enable, Read / Write. AD1200 Only 54 Bit 2 Interrupt Enable, Read / Write. 55 Bits 0 & 1. Mode Bit 0 & 1. Read / Write. 56 Initialising The A/D Converter. 57
The A/D Gain Channel Register. 58
Bits 6 & 7. Gain select. Read / Write. 58 Bits 4 & 5. Reserved For Future Expansion. R/W. 59 Bits 0, 1, 2 & 3. Channel Select. Read / Write. 59
The A/D Converter Input Registers. Read Only 60 The DAC0 D/A Converter Output Registers. 62 The DAC1 D/A Converter Output Registers. 63 The Digital Output Port Register. Write Only 65 The Digital Input Port Register. Read Only 66
The Timer & Extended Mode Register. Read/ Write 66
Bits 0-5, TIMER Pacer Clock Divisor Bits. R/W. 67 Bits 6 & 7 XMODE, Extended Mode Read/Write. 69
The 8254 Counter Timer Registers. Read/ Write 70
Chapter 3 List Of Figures._______________________
Figure 3-1. AD1200 Register Map. 51 Figure 3-2. A/D Control Status Register. 53 Figure 3-3. Mode 0 & 1 Bits. 56 Figure 3-4. AD1200 Extended Mode Bits. 57 Figure 3-5. AD1210-21 Extended Mode Bit. 57 Figure 3-6. A/D Gain Channel Register. 58 Figure 3-7. Gain Selection. 59 Figure 3-8. Channel Selection. 60 Figure 3-9. ADC Low Byte Input Register. 61 Figure 3-10. ADC High Byte Input Register. 62 Figure 3-11. DAC0 Low Byte Output Register. 63 Figure 3-12. DAC0 High Byte Output Register. 63 Figure 3-13. DAC1 Low Byte Output Register. 65
Intro-9
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PC AD1200 Reference
Figure 3-14. DAC1 High Byte Output Register. 65 Figure 3-15. DIGOUT Output Register. 65 Figure 3-16. DIGIN Output Register. 66 Figure 3-17. TIMEREX Register. 67 Figure 3-18. Pacer Clock Divisor 68 Figure 3-19. AD1200 Extended Mode Bits. 70 Figure 3-20. AD1210-21 Extended Mode Bit. 70 Figure 3-21. 8254 Counter Timer Register Map. 71
Chapter 4 Calibration.____________________
Introduction. 72 Calibrating The Digital To Analogue Output. 72
Outline. 73 Equipment Required. 73 DAC0 Calibration Procedure. 74 DAC1 Calibration Procedure. 75
Calibrating The Analogue To Digital Input. 77
Outline. 77 Equipment Required. 78 ADC Calibration Procedure. 78
Chapter 4 List Of Figures._______________________
Figure 4-1. DAC Trimmer Pot Layout. 73 Figure 4-2. DAC0 Calibration Wiring Diagram. 75 Figure 4-3. DAC Calibration Values. 75 Figure 4-4. DAC1 Calibration Wiring Diagram. 76 Figure 4-5. ADC Trimmer Pot Layout. 77 Figure 4-6. ADC Calibration Wiring Diagram. 78 Figure 4-7. Unipolar ADC Calibration Values. 79 Figure 4-8. Bipolar ADC Calibration Values. 80
Chapter 5 Technical Specification.______________________________
Introduction. 81 Analogue Inputs. 81 Analog Outputs 82 Digital I/O 82 Pacer Clock. 83 Power Consumption. 83
Intro-10
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Introduction AD1200 Reference
CHAPTER 1
INTRODUCTION TO
THE ANALOGUE
WORLD.
Introduction.____________
This chapter describes the features of the range of AD1200 cards highlighting the differences between them, discusses the fundamentals of Analogue to Digital conversion, Digital to Analogue conversion and explains exactly how the AD1200 range implements these.
Downwards compatibility with the DT2811 is discussed as well as the extra high performance features that distinguish the AD1200 range, this improved design whilst retaining exact compatibility with other manufacturers products gives AD1200 extreme flexibility in its application and use.
Converter throughput, Programmable Gain input, interrupt and DMA driven i/o are explained together with a complete description of the AD1200’s timing and control modes.
Note that throughout this manual reference is made to the AD1200 series as either AD1200 series or as AD12XX card, meaning that this information is common to all cards in the AD1200 family.
When AD1210, AD1211, AD1220, AD1221 or the term ’AD1200 card’ the information is specific to those particular cards mentioned.
Chapter 1 Page 1
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AD1200 Reference Introduction
The PC AD1200 Range Of Cards._____________________________
The AD1200 series is a family of 12 bit analogue interface cards. Currently 6 different cards are available. Each card has all the base features of the range, the distinguishing features of each card being variations in A/D throughput, Programmable Gain ranges and DMA capabilities.
Figure 1-1. AD1200 Series Common Properties._________________________________________
Analog Input: 12 bit
Channels Type: 16 Single Ended (jumper OR 8 Differential
selectable) OR 16 Pseudo Diff
Channel Select Programmable Bipolar Input: ±10Volt, ±5Volt, ±2.5Volt Unipolar Input: 0~10Volt, 0~5Volt
Interrupts
A/D Done IRQs: Yes Analog Output: Two 12 bit DACs Bipolar Output: ±10V, ±5V, ±2.5V Unipolar Output: 0~10Volt, 0~5Volt Throughput: 100kHz per DAC
Digital I/O
TTL output: 8 bit TTL input: 8 bit Throughput: 1MHz Pacer Clock 0.005Hz-600kHz External Clock: Yes (to 1Mhz) External Trigger: Yes (-ve edge).
The common features of the AD1200 range are comprehensive and sophisticated enough to make even the AD1221 a complete data acquisition system on a single plug in board.
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Introduction AD1200 Reference
Figure 1-2. AD1200 Series Options._______________________________
ЪДДДДДДДДДДДДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДД¿ ³
Card
³
AD1221³ AD1220³ AD1211³ AD1210³ AD1200
³ ГДДДДДДДДДДДДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДД´ ³
A/D Throughput.
³
³ ³ ³ ³
³ ³
30kHz:
³
AD1221³ ³ AD1211³ ³
³ ³
100kHz:
³
³ AD1220³ ³ AD1210³ AD120
³ ГДДДДДДДДДДДДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДД´ ³
Programmable Gain Input.
³ ГДДДДДДДДДДДДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДД´ ³
None:
³
AD1221³ AD1220³ ³ ³
³ ³
1-2-4-8:
³
³ ³AD1211H³AD1210H³AD1200H
³ ³
1-10-100-1000:
³
³ ³AD1211L³AD1210L³AD1200L
³ ГДДДДДДДДДДДДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДД´ ³
DMA Capabilities.
³ ГДДДДДДДДДДДДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДД´ ³
None:
³
AD1221³ AD1220³ AD1211³ AD1210³
³ ³
A/D Done:
³
³ ³ ³ ³ AD1200
³ ГДДДДДДДДДДДДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДД´ ³
Pacer Clocked DMA.
³ ГДДДДДДДДДДДДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДД´ ³
DAC0 Output:
³
³ ³ ³ ³ AD1200
³ ³
DAC1 Output:
³
³ ³ ³ ³ AD1200
³ ³
DIG Output:
³
³ ³ ³ ³ AD1200
³ ³
DIG Input:
³
³ ³ ³ ³ AD1200
³ АДДДДДДДДДДДДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДЩ
From AD1221 Up To AD1200.__________________________
So progressing from the entry level AD1221 to the fully
featured AD1200 card we have the following. AD1221 30kHz A/D throughput.
Improved DT2811 but without programmable gain.
AD1220 100kHz A/D through put.
Faster DT2811 without programmable gain.
AD1211
AD1211H 30kHz A/D throughput.
Programmable Gain of 1-2-4-8 for High level input signals. DT2811 improved equivalent.
AD1211L 30kHz A/D throughput.
Programmable Gain of 1-10-100-1000 for Low level input signals. DT2811 improved equivalent
Chapter 1 Page 3
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AD1200 Reference Introduction AD1210
AD1210H 100kHz A/D throughput.
Programmable Gain of 1-2-4-8 for High level input signals. Faster DT2811 improved equivalent.
AD1210L 100kHz A/D throughput.
Programmable Gain of 1-10-100-1000 for Low level input signals. Faster DT2811 improved equivalent.
AD1200
AD1200H DMA input from A/D converter or Digital Input port.
DMA output to D/A converter or Digital Output port. 100kHz A/D through put. Programmable Gain of 1-2-4-8 for High level input signals. The ultimate 12 bit data acquisition system.
AD1200L DMA input from A/D converter or Digital Input port.
DMA output to D/A converter or Digital Output port. 100kHz A/D through put. Programmable Gain of 1-10-100-1000 for Low level input signals. The ultimate 12 bit data acquisition system.
DT2811 Superset.________________
The Ad1200 series of cards are a great improvement on the DT2811 specification, they have wider input and output ranges, faster settling and acquistion times, greater throughput and DMA capabilities.
Page 4 Chapter 1
Page 14
Introduction AD1200 Reference
Figure 1-3. AD1200 card Vs DT2811.________________________________
Feature AD1200 DT2811
Analog Input:
Bipolar Input: ±10V, ±5V, ±2.5V ±5Volt, ±2.5Volt Unipolar Input: 0~10Volt, 0~5Volt 0~5Volt Throughput: Gains 1 - 10 100kHz 20kHz Gain 100 100kHz 2.5kHz Gain 1000 80kHz 2.5kHz
Analog Output:
Bipolar Output: ±10V, ±5V, ±2.5V ±5V, ±2.5V Unipolar Output: 0~10Volt, 0~5Volt 0~5Volt Throughput: 100kHz per DAC 50kHz per DAC
Programmable Gain
Maximum Gain: 1000 500
Interrupts
A/D Done Interrupt Yes Yes DAC0 Interrupt Yes No DAC1 Interrupt Yes No Digital In Interrupt Yes No Digital Out Interrupt Yes No
DMA
A/D Done DMA: Yes No DAC0 DMA Yes No DAC1 DMA Yes No Digital In DMA Yes No Digital Out DMA Yes No
Introduction To Analogue._______________________
Analogue signals are things with which we are all familiar. The intensity of the light reaching our eyes, the volume of the sound in our ears, the temperature of the air in the room around us are all analogue values. That is the light intensity may vary continuously and smoothly from utter darkness to broad daylight. Our senses are able to easily discriminate between many subtle
Chapter 1 Page 5
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AD1200 Reference Introduction
levels of illumination. This is not so with computers.
A computer uses numbers to represent physical quantities, storing the values using bit patterns. Each bit in a computer’s memory is either off or on, it cannot be half way on or nearly on. If we are to store the value of light intensity on a computer there must be some method of turning the smoothly varying real signal value into a bit pattern in the computers memory. This process is called analogue to digital conversion.
If only one bit is to be used to represent the light intensity then the illumination would be divided into either on or off. From total darkness to half light would be off, half light to full illumination would be on. One bit gives two illumination states. In general terms, resolution means separation into components. The resolution of a converter is the smallest interval measurable by the converter and this one bit converter’s resolution is 50% of the signal.
Figure 1-4. One Bit A/D Conversion.________________________________
ЪДДДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДД¿ ³
BIT PATTERN
³
ILLUMINATION LEVEL
³ ГДДДДДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДД´ ³
1
³
ON
³ ³
0
³
OFF
³ АДДДДДДДДДДДДДБДДДДДДДДДДДДДДДДДДДДЩ
If two bits of computer memory are used to represent the light intensity then the illumination would be divided into off, dark grey, light grey and full illumination. Two bits gives four illumination states.
Figure 1-5. Two Bit A/D Conversion.________________________________
ЪДДДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДД¿ ³
BIT PATTERN
³
ILLUMINATION LEVEL
³ ГДДДДДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДД´ ³
11
³
ON
³ ³
10
³
LIGHT GREY
³ ³
01
³
DARK GREY
³ ³
00
³
OFF
³ АДДДДДДДДДДДДДБДДДДДДДДДДДДДДДДДДДДЩ
With each increase in the number of bits used to represent
Page 6 Chapter 1
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Introduction AD1200 Reference
the light intensity level there is a doubling in the number of different states of illumination. We are able to resolve the light intensity to smaller intervals to provide greater detail or information about the light intensity.
Figure 1-6. Three Bit A/D Conversion._________________________________
ЪДДДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДД¿ ³
BIT PATTERN
³
ILLUMINATION LEVEL
³ ГДДДДДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДД´ ³
111
³
ON
³ ³
110
³
LIGHTEST GREY
³ ³
101
³
LIGHT GREY
³ ³
100
³
MEDIUM LIGHT GREY
³ ³
011
³
MEDIUM DARK GREY
³ ³
010
³
DARK GREY
³ ³
001
³
DARKEST GREY
³ ³
000
³
OFF
³ АДДДДДДДДДДДДДБДДДДДДДДДДДДДДДДДДДДЩ
As the number of bits used increases the number of states doubles, the resolution of the converter increases, the smallest resolvable interval decreases in size and the digital representation of the light intensity begins to approach the smooth continuously variable real world situation. 8 bit A/D converters use 256 states to represent analogue values. 12 bit A/D converters use 4096 states to represent analogue values. 16 bit A/D converters use 65536 states to represent analogue values. This is summarised in Figure 1-7.
The AD1200 series of cards use 12 bit A/D and D/A converters, that is an analogue input is differentiated into 1 of 4096 possible levels, an analogue output can be set to 1 of 4096 values. The percentage change between adjacent digital values is
0.0244% or 244 parts per million.
Chapter 1 Page 7
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AD1200 Reference Introduction
Figure 1-7. Bit Weights And Resolution.___________________________________
ЪДДДДДДВДДДДДДДДДДДВДДДДДДДДДДДВДДДДДДДДДДДДДДВДДДДДДДДД¿ ³
BITS ³ STATES
³
PERCENTAGE
³
PARTS
³
DYNAMIC
³
³
³
³
³
PER MILLION
³
RANGE
³
³
n ³ 2n ³ %
³
PPM
³
dB
³ ГДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДЕДДДДДДДДД´ ³
0 ³ 1
³
100
³
1,000,000
³
0.0
³ ³
1 ³ 2
³
50
³
500,000
³
6.0
³ ³
2 ³ 4
³
25
³
250,000
³
12.0
³ ³
3 ³ 8
³
12.5
³
125,000
³
18.1
³ ³
4 ³ 16
³
6.25
³
62,500
³
24.1
³ ³
5 ³ 32
³
3.125
³
31,250
³
30.1
³ ³
6 ³ 64
³
1.5625
³
15,625
³
36.1
³ ³
7 ³ 128
³
0.78125
³
7,812.50
³
42.1
³ ³
8 ³ 256
³
0.39063
³
3,906.25
³
48.2
³ ³
9 ³ 512
³
0.19531
³
1,953.13
³
54.2
³ ³
10 ³ 1,024
³
0.09766
³
976.56
³
60.2
³ ³
11 ³ 2,048
³
0.04883
³
488.28
³
66.2
³ ³
12 ³ 4,096
³
0.02441
³
244.14
³
72.3
³ ГДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДЕДДДДДДДДД´ ³
13 ³ 8,192
³
0.01221
³
122.07
³
78.3
³ ³
14 ³ 16,384
³
0.00610
³
61.04
³
84.3
³ ³
15 ³ 32,768
³
0.00305
³
30.52
³
90.3
³ ³
16 ³ 65,536
³
0.00153
³
15.26
³
96.3
³ ГДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДЕДДДДДДДДД´ ³
17 ³ 131,072
³
0.00076
³
7.63
³
102.4
³ ³
18 ³ 262,144
³
0.00038
³
3.82
³
108.4
³ ³
19 ³ 524,288
³
0.00019
³
1.91
³
114.4
³ ³
20 ³ 1,048,576
³
0.00010
³
0.95
³
120.4
³ АДДДДДДБДДДДДДДДДДДБДДДДДДДДДДДБДДДДДДДДДДДДДДБДДДДДДДДДЩ
Unipolar Vs Bipolar Voltage Ranges.________________________________
A Unipolar voltage is a positive only voltage, it can vary
between zero volts and a maximum positive value. 0 to +5V is a typical unipolar voltage range.
A Bipolar voltage is one that can be positive or negative, it
can vary from an extreme minimum negative value, through zero volts, up to a maximum positive value, -5V to +5V is a typical bipolar range.
Differential Vs Single Ended Signals.________________________________
A single ended signal is where the analogue voltage is
Page 8 Chapter 1
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Introduction AD1200 Reference
carried on only one wire, the analogue voltage required is the difference between the voltage on the wire and the Analogue Ground, that is the signal is measured with respect to the interface cards analogue ground. The advantage of using single ended inputs to the A/D converter is that 16 input channels are available.
Differential signals are carried on two wires, the analogue voltage required is the difference between the voltage on the two wires, the signal on one of the pair of wires is measured with respect to the ’ground’ of the other wire. The advantage of differential inputs to the A/D converter is a significant reduction in measured noise due to two factors, rejection of noise common to both wires and the elimination of errors due to differences in ground potential.
If the pair of differential signals are kept physically close to each other then the noise effecting one wire equally effects the other but the DIFFERENCE in voltage between the wires remains constant, thus the noise has little or no effect on the analogue signal. Twisted pair cables are usually used with differential signals being transmitted any distance.
Errors in A/D measurements can arise if the earth potential of the source of the analogue signal is different to that of the receiver of the analogue signal. In single ended systems the analogue voltage is referenced to AGND, the analogue ground, if this is not exactly identical to the AGND of the source device then systematic errors will result. Differential inputs again avoid this error since the required analogue voltage is that dropped across the two input wires.
The Analogue To Digital Converter._______________________________
The AD1200 series of cards are built round the Burr Brown ADS774 and ADS574 sampling A/D converters. These are recently introduced parts that include a sample and hold circuit as well as an A/D converter on a 28 pin, 0.3 inch chip. The through put and ease of application of these devices has put
Chapter 1 Page 9
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AD1200 Reference Introduction
PC cards using them far ahead of any competition. The ADS574 has a conversion time of 25 microseconds and the ADS774 a conversion time of 8 microseconds.
The AD converter takes an analog input voltage and represents it as a 12 bit digital value. The analogue input signal may be produced by vibration, pressure or temperature sensors but as long as it is within +/-10 Volts the AD1200 series of cards can convert the voltage to a 12 bit digital value. Low level input signals can be amplified by a factor of 2, 4, 8, 10, 100 or 1000 to give 12 bit resolution from full scale signals as small as
2.5 millivolts.
The A/D system can be jumper set for 8 differential or 16 single ended input channels. It can be configured for unipolar, positive only, inputs or bipolar, negative and positive, inputs. The A/D conversion may be performed under programmed i/o, interrupt driven input or via DMA, direct memory access, with successive conversions being initiated either by the users program, via the pacer clock or synchronised to external user supplied signals.
Input Channel Selection.______________________
Whilst the AD1200 card has up to 16 input channels it has only 1 A/D converter. The AD1200 series are configurable for either 16 channels of Single Ended input, 16 channels of Pseudo Differential Input or 8 channels of Differential Input. There is only ONE A/D converter on the board and an analogue multiplexer is used to route one of these 8 or 16 input channels through the programmable gain amplifier to the A/D converter. The analogue multiplexer is programmable, ie the input channel is selected by the users software. Thus up to 16 voltage sources can be permanently applied to the AD1200 series and the actual channel to be converted be determined by the program the user runs on the PC. The input channel is selected by writing to the A/D Gain Channel Register, ADGCR, register 1.
When a new channel is selected the settling time to within
0.01% is 3.5 microseconds.
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Introduction AD1200 Reference
Programmable Gain.___________________
Note The AD1221 and AD1220 do NOT have programmable gain, the input gain is fixed at 1.
Before the selected input channel is routed to the A/D converter it passes through the PGA, Programmable Gain Amplifier. This amplifies the input signal before the conversion process beings. The programmable gain comes in two varieties:­one for LOW input signals, eg AD1211L, that has gains of 1, 10, 100 and 1000 and one for HIGH input signals eg AD1211H, that has gains of 1, 2, 4 and 8.
In this way input voltages from 0 to 10 Volts on one channel and 0 to 10 milli Volts on another channel can both be converted to a 12 bit signal resolving across their whole range. The gain applied to the input is selected, along with the input channel, by writing to the A/D Gain Channel Register, ADGCR, register 1. Programmable gain is a powerful feature enabling the AD1200 series to convert input signals of widely different levels, making the cards very flexible and expanding the number of possible applications vastly.
The settling time, to within 0.01%, for the programmable gain amplifier is 2 microseconds for gains of 1, 2, 4, 8, 10 and 100 and 10 microseconds for a gain of 1000.
Thus the total over all settling, to within 0.01%, time when both analogue multiplexer and programmable gain amp are changed is 4 microseconds for gains 1 to 100 and 10 microseconds for a gain of 1000.
Analogue Input Ranges._____________________
The full scale analogue input ranges are set by jumpers when the card is installed, unlike the gain applied to the signal or the input channel routed to the A/D converter which is software selectable. Please ensure that the GAIN and Analogue Input Range selected do not result in off scale signals being applied to the A/D converter. Thus when jumper set for +2.5 Volt inputs, do not use an input voltage of 10 milliVolts with a
Chapter 1 Page 11
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AD1200 Reference Introduction
gain of 1000 otherwise a 10 Volt signal will be fed from the PGA into the A/D converter, four times over scale!
Programmed I/O, Interrupts and DMA.___________________________________
The A/D conversion may be performed under programmed
i/o, interrupt driven input or via DMA, direct memory access.
Programmed I/O.________________
In programmed i/o mode, the user’s program initiates an A/D conversion and then monitors the A/D Done bit, register 0 bit 7, waiting until it is set. This indicates that the conversion has been completed and the digitised value of the input voltage is waiting to be read from the ADCLO and ADCHI input registers. Having read the contents of these registers, low byte first and high byte last, thus clearing the A/D Done bit, the next A/D conversion may be performed.
Programmed i/o is also known as ’polled i/o’ since the user has to constantly poll the converter status bits to see if it is done.
The users software, built from the Real World driver, thus starts, tests for, and services each conversion. Though programmed i/o is easily understood, the PC and the program are consumed by the process of performing the A/D conversions. Thus programmed i/o is used for single conversions or low sample rate continuous conversions.
Interrupt Driven I/O.___________________
In interrupt driven mode, after interrupts are enabled and the start of the first conversion has been triggered, when the conversion is done, the A/D Done bit is set and this automatically causes a hardware interrupt which makes the computer execute an ISR, interrupt service routine. The interrupt service routine reads the ADCLO and then the ADCHI input registers and stores the data in memory. When enough conversions have taken place, the interrupt service routine disables A/D interrupts and if necessary stops the pacer clock.
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Introduction AD1200 Reference
The users software, built from the Real World driver, thus sets up the interrupt hardware, starts the first conversion. The separate ISR services each conversion whenever it happens and finally disables the conversion. In between conversions the PC and the program are free to perform other tasks, eg updating a graph on the screen.
Thus interrupt driven i/o is used for medium sample rate continuous conversions or when continuous conversions across over several inputs channels and gain combinations are required.
DMA, Direct Memory Access.__________________________
In DMA, direct memory access, mode, the DMA controller is programmed with the number of conversions to be taken, DMA is enabled and the start of the first conversion is triggered. When the conversion is done, the A/D Done bit is set and this automatically commences a DMA input cycle. The DMA controller reads the ADCLO and then the ADCHI input registers placing the data straight into memory without the help of the computers micro processor. When the last of the conversions takes place, the DMA controller sets the TC line true when reading the ADCHI byte thus disabling further A/D conversions and, if necessary, stopping the pacer clock.
The users software, built from the Real World driver, thus merely sets up the DMA hardware and starts the first conversion. From then on till the last conversion takes place the PC and the program are completely free to perform other tasks, eg updating a graph on the screen.
Thus DMA driven i/o is used for the maximum rate continuous conversions but only with a single channel/gain combination.
The Pacer Clock._______________
The pacer clock can be used to trigger the A/D converter thus forcing the start of conversion to be at precisely timed intervals. When the clock is enabled the users program is not only relieved of the burden of determining WHEN to start the
Chapter 1 Page 13
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AD1200 Reference Introduction
next conversion but also the burden OF starting the conversion.
In addition, input signals can be regularly sampled at known intervals thus providing information not only about the magnitude of the input but also about how it changes with time. The pacer clock allows pipelining of successive A/D conversions, this concept is explained below.
The timer circuitry can be programmed to select either the on board 600kHz oscillator or an external, user supplied, TTL clock as fundamental frequency for the pacer clock. The timer register can be programmed to select 1 of 57 different factors by which to divide the fundamental frequency to produce the resulting pacer clock signal.
This pacer clock signal is used mainly as a strobe to force A/D conversions but can also be used in the top of range AD1200 card to strobe data into either D/A converter and in or out of the TTL compatible digital ports.
A/D Throughput and Pipelining.____________________________
The throughput of the A/D converter is how many conversions can be performed within a given period of time. The raw A/D conversion time, 25 microseconds for the AD1221 & AD1211 cards and 8 microseconds for the AD1220, AD1210 & AD1200 cards, places the fundamental limit on how many conversion can be performed in one second. The settling time of the analogue input multiplexer, when the channel selected for conversion is changed, and the settling time of the programmable gain amplifier, when a new gain is selected, are also a factor. However, a great consideration is the method used to transfer the data from the card into the PC.
From the above discussions about programmed I/O, interrupts, DMA and the use of the pacer clock it is apparent that the slowest method of taking A/D readings is programmed i/o. This method also has the disadvantage of requiring the most work from the user when writing programs. The processing power of the PC is of great importance and a 4.77MHz 8086 PC
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Introduction AD1200 Reference
will perform considerably worse than a 50MHz 486. The efficiency of the code plays an important part in throughput especially in the slower computers. In general it is almost impossible to exceed 30,000 A/D conversion samples a second.
With the interrupt driven i/o, the time taken by the PC to service the interrupt becomes the critical factor. Thus this part of the software should merely increment a pointer to memory, read the ADCLO and then ADCHI registers, then write the resulting data word to the memory, select the next A/D channel and gain, trigger the A/D converter to start the next conversion and finally exit. The time taken for the PC to branch to this interrupt service routine, perform it and return to its original task is, again, a function of the PC’s clock speed and the size and efficiency of the code written. The 2k FIFO on the AD1200 overcomes this difficulty and allows 100kHz sampling!
With DMA, the data from A/D converter is moved by the DMA controller directly into the PC’s memory, and the PC’s own processing power is unimportant, and the throughput of the converter is at its maximum ie 30kHz for AD1221 and AD1211 or 100kHz for AD1220, AD1210 and AD1200.
For the higher A/D throughputs with interrupts or DMA the pacer clock has to be used.
The pacer clock allows pipelining to be used. Pipelining is when the NEXT conversion is taking place BEFORE the previous one has been read. IE the next conversion is put into the pipe before the previous one is taken out. This allows the A/D converter to be constantly acquiring & converting inputs. The data from the A/D converter can be read during the time between successive conversions. It is necessary that an overrun does not take place where the NEXT conversion is finished BEFORE the previous conversion has been read. The circuitry in the AD1200 series of cards is designed to make efficient use of the Pipelining concept. Modes 1, 2 and 3 use the pacer clock to pipeline the A/D conversions. The A/D Error bit will be set by an A/D data overrun & the pacer clock will be stopped.
Chapter 1 Page 15
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AD1200 Reference Introduction
A/D Operating Modes.____________________
The whole of the AD1200 range can be programmed to perform its A/D conversions using one of four modes. These modes select between single conversion or continuous conversions, choose whether the continuous conversions should be paced via the built in 600kHz oscillator or via an external user supplied clock and determine what starts the pacer clock running.
Figure 1-8. Mode 0 & 1 Bits._________________________
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A/D Control Status Reg
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The mode select determines the source of the A/D STROBE, this is the signal that forces the A/D converter to START performing its next conversion.
Whether Interrupts or DMA transfers occur on A/D conversion Done depends on the setting of the INTERRUPT ENABLE and DMA ENABLE bits in the ADCSR, the A/D Control Status Register, register 0.
Page 16 Chapter 1
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Introduction AD1200 Reference
Figure 1-9. Extended Mode Bits.____________________________
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The AD1200 card only has the ability to use the DAC0, DAC1, DIGIN and DIGOUT ports with interrupt driven or DMA outputs modes. The XMODE bits in the TIMER register can be set to select one of these ports instead of the ADC converter to be strobed by the pacer clock. The A/D modes are selected when bits 6 & 7 of the TIMER register are both 0.
A/D Modes 0, 1, 2 & 3.____________________
Mode 0, Single Conversions._________________________
In Mode 0, each write to the ADGCR, the A/D Gain Channel Register, register 1, generates an A/D strobe. The following method should be used. i) The mode bits in the ADCSR, A/D Control Status
Register, register 0, should be set to 00, ie Mode 0.
This stops the pacer clock if it is running. ii) The channel and gain required is written into the ADGCR,
A/D Gain Channel register, register 1. This generates an
A/D strobe so starting an A/D conversion. iii) When the A/D Done bit is set the ADCLO and and then
the ADCHI data bytes may be read, either by programmed
i/o, an interrupt service routine or by the DMA controller. iv) The next A/D conversion may be started by generating an
A/D strobe by writing a new gain and channel to the
ADGCR register.
Chapter 1 Page 17
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AD1200 Reference Introduction Mode 1, Continuous Conversions, Internal Trigger & Clock.____________________________________________________
In Mode 1, the pacer clock generates each A/D strobe, the clock is started, triggered, by a write to the ADGCR, the A/D Gain Channel Register, register 1. The following method should be used. i) The mode bits in the ADCSR, A/D Control Status
Register, register 0, should be set to 01, ie Mode 1.
This stops the pacer clock if it is running. ii) The pacer clock divisor, determining the frequency of the
pacer clock strobes, is written to the TIMER register. Bits
6 & 7 must be zero in the AD1200 card. iii) The channel and gain required is written into the ADGCR,
A/D Gain Channel register, register 1. This starts the pacer
clock running. The first A/D strobe is generated one clock
period later. iv) When the A/D Done bit is set the ADCLO and then the
ADCHI data bytes may be read, either by programmed i/o,
an interrupt service routine or by the DMA controller. v) A/D Strobes will be automatically generated by the pacer
clock at the chosen rate, based on the 600kHz oscillator,
until the clock is stopped by a write to the ADCSR or,
when using DMA, terminal count is reached.
Mode 2, Continuous Conversions, Ext Trig, Internal Clock.___________________________________________________
In Mode 2, the pacer clock generates each A/D strobe, the clock is started, triggered, by a user supplied negative edge on the external trigger input line. The following method should be used. Mode 2 allows external devices to initiate a series of conversions. i) The mode bits in the ADCSR, A/D Control Status
Register, register 0, should be set to 02, ie Mode 2.
This stops the pacer clock if it is running. ii) The pacer clock divisor, determining the frequency of the
pacer clock strobes, is written to the TIMER register. Bits
6 & 7 must be zero in the AD1200 card. iii) The channel and gain required is written into the ADGCR,
A/D Gain Channel register, register 1. iv) A negative edge on the user supplied external trigger input,
Page 18 Chapter 1
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Introduction AD1200 Reference
IDC connector pin 49, starts the pacer clock running. The first A/D strobe is generated one clock period later.
v) When the A/D Done bit is set the ADCLO and ADCHI
data bytes may be read, either by programmed i/o, an interrupt service routine or by the DMA controller.
vi) A/D Strobes will be automatically generated by the pacer
clock at the chosen rate, based on the 600kHz oscillator, until the clock is stopped by a write to the ADCSR or, when using DMA, terminal count is reached.
Mode 3, Continuous Conversions, External Trigger & Clock._____________________________________________________
In Mode 3, the pacer clock generates each A/D strobe, the clock is started, triggered, by a user supplied negative edge on the external trigger input line. The fundamental frequency of the the pacer clock is derived from a user supplied external clock, on IDC Connector pin 50. The following method should be used. Mode 3 allows the a series of conversions to be synchronised with external events or to an external device. i) The mode bits in the ADCSR, A/D Control Status
Register, register 0, should be set to 03, ie Mode 3.
This stops the pacer clock if it is running. ii) The pacer clock divisor, determining the frequency of the
pacer clock strobes, is written to the TIMER register. Bits
6 & 7 must be zero in the AD1200 card. iii) The channel and gain required is written into the ADGCR,
A/D Gain Channel register, register 1. iv) A negative edge on the user supplied external trigger input,
IDC connector pin 49, starts the pacer clock running. The
first A/D strobe is generated one clock period later. v) When the A/D Done bit is set the ADCLO and then the
ADCHI data bytes may be read, either by programmed i/o,
an interrupt service routine or by the DMA controller. vi) A/D Strobes will be automatically generated by the pacer
clock at the chosen rate, based on the user supplied
external clock input, until the clock is stopped by a write
to the ADCSR or, when using DMA, terminal count is
reached.
Chapter 1 Page 19
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AD1200 Reference Introduction
The Analogue To Digital Converter._______________________________
The AD1200 series of cards use two completely
independent Burr Brown DAC667 D/A converters.
The D/A converter takes a 12 bit digital input code and
turns it into an analogue output voltage.
Each DAC can be configured for unipolar, positive only,
0~10V and 0~5V outputs or bipolar, negative and positive, ±10V, ±5V and ±2.5V outputs.
D/A Programmed I/O.____________________
The D/A conversion are usually performed using programmed i/o, the 12 bit output is written lower 8 bits first to the DACLO register and then the upper 4 bits to the DACHI register. When the DACHI register is written the digital to analogue conversion takes place.
D/A Interrupts and DMA. AD1200 Card Only._______________________ __________________
The AD1200 card only has the ability to use interrupt driven or DMA outputs modes to the D/A converters. i) The mode bits in the ADCSR, A/D Control Status
Register, register 0, should be set to 01, 02 or 03, ie Mode
1, 2 or 3.
This stops the pacer clock if it is running. ii) The XMODE bits in the TIMER register is set to either to
40 hex to select DAC0 or 80 hex to select DAC1 as the
recipient of the interrupt or DMA data, at the same time,
the pacer clock source and divisor is selected, determining
the frequency of the pacer clock strobes. iii) The initial DAC data values are written to DACLO and
DACHI. Writing to the DACLO or DACHI registers does
not cause a D/A conversion when the extended mode bits
are set to 40 or 80 hex. Instead the conversion is caused
by the strobe signals from the pacer clock. iv) A write to the ADGCR register or an negative edge on the
external trigger input starts the pacer clock as selected by
the ADCSR Mode bits. v) DAC conversion strobes will be automatically generated by
Page 20 Chapter 1
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Introduction AD1200 Reference
the pacer clock at the chosen rate, based on the 600kHz oscillator or external clock input as selected by the ADCSR Mode bits. The pacer clock strobes the converters at precisely timed intervals. The pacer clock also causes an interrupt or DMA cycle which then updates the DACLO and DACHI registers ready for the next pacer clock strobe.
vi) When the required number of conversion has taken place
the pacer clock is stopped either by the interrupt service routine or by the DMA TC, terminal count signal. The clock may also stopped by a write to the ADCSR.
Digital I/O Ports._______________
The digital input port is an 8 bit LS TTL compatible port,
it is a read only port.
The digital output port is an 8 bit LS TTL compatible port,
it is a write only port.
Digital Port Programmed I/O.__________________________
Digital i/o is usually performed using programmed i/o. As the data is written to the digital output register the bit pattern immediately appears on the digital output pins. A read of the digital input register latches the current bit pattern present on the digital input pins returning it as an 8 bit data byte.
Digital Port Interrupts and DMA. AD1200 Card Only.______________________________ __________________
The AD1200 card only has the ability to use the digital input and output port in interrupt driven or DMA modes. The mode bits in the ADCSR in conjunction with bits 6 & 7 in the TIMER register are used to specify the digital port, instead of the A/D converter, as the target for the pacer clock strobes. i) The mode bits in the ADCSR, A/D Control Status
Register, register 0, should be set to 01, 02 or 03, ie Mode
1, 2 or 3.
This stops the pacer clock if it is running. ii) The XMODE bits in the TIMER register is set to C0 hex
Chapter 1 Page 21
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AD1200 Reference Introduction
selecting the digital i/o ports instead of the ADC as the recipient of the interrupt or DMA data, at the same time, the pacer clock source and divisor is selected, determining the frequency of the pacer clock strobes.
iii) A write to the ADGCR register or an negative edge on the
external trigger input starts the pacer clock as selected by the ADCSR Mode bits.
iv) DIG strobes will be automatically generated by the pacer
clock at the chosen rate, based on the 600kHz oscillator or external clock input as selected by the ADCSR Mode bits. The pacer clock strobe causes an interrupt or DMA cycle which then updates the DIGIN or DIGOUT registers ready for the next pacer clock strobe.
v) When the required number of conversion has taken place
the pacer clock is stopped either by the interrupt service routine or by the DMA TC, terminal count signal. The clock may also stopped by a write to the ADCSR.
Screw Terminal Board._____________________
The easiest and tidiest way to connect your i/o card to
your rig is via the Analogue Screw Terminal Board, ATB.
The Screw Terminal Board converts from 50 IDC ribbon
to screw terminals. The screw terminals can take wire up to
2.5mm, 0.1 inch diameter. The 50IDC entry is a latching connector to ensure hold fast connections.
Power taken from the PC via at ±12Volts is fed through
power on indicator LEDs and decoupling capacitors.
There is provision for an optional 4-20mA conversion form
both DAC analogue output signals.
There is provision for an optional 4-20mA conversion to
the analogue voltage input channels of the A/D converter.
Each screw terminal, is clearly identified by IDC pin number, and AD1200 signal name. The analogue and digital grounds are kept separate. The digital i/o lines can also take an optional LED to show signal logic state.
A handy cable grip clamps the wires to ensure a robust,
Page 22 Chapter 1
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Introduction AD1200 Reference
tidy layout. Order one now! Part number: ATB Analogue Screw Terminal Board. ATB 4-20Xmtr 4-20mA Transmitter option for the terminal
board.
ATB 4-20Rxvr 4-20mA Receiver option for the terminal board.
4-20mA Current Conversion Options._________________________________
The primary reason for for using 4-20mA currents in the transmission of analogue signals is because currents can be sent a long way without loss and without being greatly degraded by noise. When voltages are being transmitted over anything but very short lengths the resistance in the cables leads to a drop in the received signal, some voltage is dropped across the cable itself. However, due to the law of conservation of current, currents can be transmitted without loss.
Chapter 1 Page 23
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AD1200 Reference Installation Guide
CHAPTER 2
PC AD1200
INSTALLATION
GUIDE.
Introduction.____________
This chapter explains how to configure and install the PC AD1200 board into a PC compatible computer. Detailed instructions are given how to set the i/o address select DIP switches as well as how to set the IRQ, DMA jumper blocks. In addition, the jumpers configuring the Analogue to Digital input and the two Digital to Analogue outputs are explained. Finally details of how to connect up the AD1200 to the users own system are given.
If the PC AD1200 is to be installed in another make of PC then it may be necessary to consult the instructions included in that PC’s documentation.
The two third size PC AD1200 board will fit into both long or a short slots, it can be placed in standard 8 bit PC slots or in the longer 16 bit AT slots.
If you have a Micro Channel Architecture computer such as the IBM PS/2 Models 50-90 then you require our PS AD1200 card instead.
Configuring The PC AD1200 Board.________________________________
In the state it leaves our factory, the PC AD1200 Interface Board is ready to plug straight into an IBM PC computer.
So, unless you have GOOD REASON, you do not need to alter its default setting.
However, due to the large variety of add-on boards that
Page 24 Chapter 2
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Installation Guide AD1200 Reference
may be present in the PC, your PC AD1200 board may need adjusting to suit your setup. The seven configurable options are factory set to following defaults.
Default Settings.
I/O address: 0218 Hex. 8 bytes of i/o 0218-021F hex. Interrupt Jumper: IRQ7. DMA Jumper: DMA1. AD1200 Only! DAC0 settings: -5 to +5 Volts BIPOLAR output. DAC1 settings: -5 to +5 Volts BIPOLAR output. ADC settings: 16 Channels of Single Ended,
-5 to +5 Volts BIPOLAR input.
Figure 2-1. AD1200 Card Layout._____________________________
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1111 I/O ADDR 0218Hex
³³³
L
³
5210234657
³³³
E
³
юююююююююЫ
ЫЫюююю ÀÄij³ÄÙ
АДДДДДДДДДДДДДДДДДДДДДДД¿
Ú¿
IRQ7 å
åå
DMA1
ÚÄÄÙ³
АДДДДЩАДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ ³
Chapter 2 Page 25
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AD1200 Reference Installation Guide
Figure 2-2. AD1210 AD1211 Card Layout._____________________________________
æ
DAC1
æ
DAC0
æ
ADC
æ
ADC 20Vin
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³ ЫююЫЫ ЫююЫЫ ÛþÛþ
ß ³ÚÄ
³
-5/+5V -5/+5V -5/+5V
³³
³
BIPOLAR BIPOLAR BIPOLAR
ÚÄij³Ä¿
³
OUTPUT OUTPUT INPUT
юЫЫююЫ ³ ³³
50
³ å
16 SE INPUTS
³³³
WAY
³ ³³³ ³
I/O ADDR
³³³
C
³
123456 8254=210h
³³³
A
³ жееееж ³ ³³
B
³
8254 Counter Timer 1111 AD1210/11=0218Hex
³³³
L
³ Û
. OUT0 Not Connected 5210234567
³³³
E
³ å
To Output PIN36
юююююююююЫ ÀÄij³ÄÙ
АДДДДДДДДДДДДДДДДДДДДДДД¿
Ú¿
IRQ7
å ÚÄÄÙ³
АДДДДЩАДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ ³
Figure 2-3. AD1220 AD1221 Card Layout._____________________________________
æ
DAC1
æ
DAC0
æ
ADC
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³ ЫююЫЫ ЫююЫЫ ÛþÛþ þÛ
ADC INPUT
³ÚÄ
³
-5/+5V -5/+5V -5/+5V GAIN SELECT
³³
³
BIPOLAR BIPOLAR BIPOLAR
ÚÄij³Ä¿
³
OUTPUT OUTPUT INPUT
юЫЫююЫ ³ ³³
50
³ å
16 SE INPUTS
³³³
WAY
³ ³³³ ³
I/O ADDR
³³³
C
³
123456 8254=210h
³³³
A
³ жееееж ³ ³³
B
³
8254 Counter Timer 1111 AD1220/21=0218Hex
³³³
L
³ Û
. OUT0 Not Connected 5210234567
³³³
E
³ å
To Output PIN36
юююююююююЫ ÀÄij³ÄÙ
АДДДДДДДДДДДДДДДДДДДДДДД¿
Ú¿
IRQ7
å ÚÄÄÙ³
АДДДДЩАДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ ³
Setting The PC AD1200 I/O Address.________________________________
The AD1200 card has one 6 way DIP Address select switch block, the AD1210/11 1220/21 have one 8 way DIP Address select switch block. By referring to the PC AD1200 card locate the I/O Address DIP switches right of the the centre of the board.
The factory set address, 0218H, is shown in Figure 2-4 (a) and (b). If you need to run the board at a different address then
Page 26 Chapter 2
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Installation Guide AD1200 Reference
set the DIP switches according to Figure 2-7.
The PC AD1200 board can reside at any address on an 8 byte boundary within the range 0200H-03F8H, giving the 64 possible combinations.
The AD1210/11 and AD1220/21 boards occupy 16 bytes of i/o address space and can be set to reside at one of 48 base addresses within the range 0100H-03F0H. The DIP switches 1-7 control the PC AD1200 card i/o base address select, DIP switch 1-7 correspond to the A3-A9 address lines, respectively. DIP 8 does not have any effect and is a "don’t care" switch, for compatibility with future versions of the AD1200 card leave DIP 8 off. Only those addresses in the range 0100 - 03FF hex, in Figure 2­7 below, are available for use since addresses in the range 0000­00FF hex are reserved for system mother board devices such are DMA circuitry, keyboard i/o etc.
The best address range for the AD1200 card is in the 0200 hex -023F hex & 0280 hex - 02BF hex ranges which are usually unused.
A list of i/o addresses to be avoided, depending on what options are installed in the PC, is given in Figure 2-5.
Figure 2-4a. AD1200 Factory Set DIP Switches._________________________________________
DIP 1-6 I/O Address select
ЪДВДВБВДВД¿ ³ý³ý³ý³ý³ý³
å
on
ЪДДДДДД¿ ³жжееее³
æ
off
³
123456
³
АДДДДДДЩ
PC AD1200 Factory Set Default Address= 0218 Hex, 536 Decimal
using 8 bytes of i/o space 0218-021F hex
Chapter 2 Page 27
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AD1200 Reference Installation Guide
Figure 2-4b. AD1210-21 Factory Set DIP Switches.____________________________________________
DIP 1-6 I/O Address select
ЪДВДЕДВД¿ ³ý³ý³ý³
³
å
on
ЪДДДДДД¿ ³жееееж³
æ
off
³
123456
³
АДДДДДДЩ
8254 Counter Timer Address = 0210 Hex, 528 Decimal
PC AD1210-21 Factory Set Default Address = 0218 Hex, 536 Decimal
using total 16 bytes of i/o space 0210-021F hex
Figure 2-5. I/O Addresses To Avoid._______________________________
I/O ADDRESS NORMAL USE.___________ ___________ 01F0H- 01F7H Fixed Disk Controller #1 for AT/386/486 0201H- 0201H Game Control Adapter 0218H- 021FH *** PC AD1200 Board 0278H- 027FH *** Second Printer Port Adapter 02E1H *** PC ELITE IEEE Board. 02E1H IBM/ National Instruments IEEE card. 02F8H- 02FFH *** Second Serial Port Adapter 0300H- 0307H *** PC Proto card 0300H- 0303H *** PC IEEE Board 0300H- 0303H *** PC DIO24 Board 0308H- 030FH *** PC DIO48 Board 0310H- 031FH *** PC Timer-DIO Board 0320H- 032FH Hard Disk 0340H- 0360H *** PC DIO192 Board 0360H- 036FH PC Network 0378H- 037FH *** Printer Port Adapter 0380H- 038CH S.D.L.C. Communications 03A0H- 03A9H Primary Binary Sync Comms 03B0H- 03BFH Monochrome Display and Printer Card 03C0H- 03CFH Enhanced Graphics Adapter Extra I/O 03D0H- 03DFH Colour Graphics Adapter 03F0H- 03F7H 5.25 inch Disk Drive Adapter 03F8H- 03FFH *** Serial Port Adapter *** These cards available from us.
Page 28 Chapter 2
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Installation Guide AD1200 Reference
The i/o addresses that are likely to be good for the PC AD1200 are shown in Figure 2-6. However, we cannot guarantee that they are not already in use by some other adapter that may be installed in your PC.
Figure 2-6. Likely I/O Address.___________________________
I/O ADDRESS NORMAL USE.___________ ___________ 0204H- 0277H Unused. 0280H- 02BFH Unused. 02C8H- 02DFH Unused. 02E4H- 02F7H Unused. 0300H- 031FH Unused. 0330H- 035FH Unused. 0380H- 03AFH Unused Usually. 03E0H- 03EFH Unused.
If in doubt check the manuals of any adapters installed.
Figure 2-7a. AD1200 Base Addresses.________________________________
DIP1 DIP2 DIP3 DIP4 DIP5 DIP6 Base Address Of Card____ ____ ____ ____ ____ ____ ____________________ Off Off Off Off Off Off 03F8 Hex 1016 Dec On Off Off Off Off Off 03F0 Hex 1008 Dec Off On Off Off Off Off 03E8 Hex 1000 Dec On On Off Off Off Off 03E0 Hex 992 Dec
Off Off On Off Off Off 03D8 Hex 984 Dec On Off On Off Off Off 03D0 Hex 976 Dec Off On On Off Off Off 03C8 Hex 968 Dec On On On Off Off Off 03C0 Hex 960 Dec
Off Off Off On Off Off 03B8 Hex 952 Dec On Off Off On Off Off 03B0 Hex 944 Dec Off On Off On Off Off 03A8 Hex 936 Dec On On Off On Off Off 03A0 Hex 928 Dec
Off Off On On Off Off 0398 Hex 920 Dec On Off On On Off Off 0390 Hex 912 Dec
Chapter 2 Page 29
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AD1200 Reference Installation Guide
Off On On On Off Off 0388 Hex 904 Dec On On On On Off Off 0380 Hex 896 Dec
Off Off Off Off On Off 0378 Hex 888 Dec On Off Off Off On Off 0370 Hex 880 Dec Off On Off Off On Off 0368 Hex 872 Dec On On Off Off On Off 0360 Hex 864 Dec
Off Off On Off On Off 0358 Hex 856 Dec On Off On Off On Off 0350 Hex 848 Dec Off On On Off On Off 0348 Hex 840 Dec On On On Off On Off 0340 Hex 832 Dec
Off Off Off On On Off 0338 Hex 824 Dec On Off Off On On Off 0330 Hex 816 Dec Off On Off On On Off 0328 Hex 808 Dec On On Off On On Off 0320 Hex 800 Dec
Off Off On On On Off 0318 Hex 792 Dec On Off On On On Off 0310 Hex 784 Dec Off On On On On Off 0308 Hex 776 Dec On On On On On Off 0300 Hex 768 Dec
Off Off Off Off Off On 02F8 Hex 760 Dec On Off Off Off Off On 02F0 Hex 752 Dec Off On Off Off Off On 02E8 Hex 744 Dec On On Off Off Off On 02E0 Hex 736 Dec
Off Off On Off Off On 02D8 Hex 728 Dec On Off On Off Off On 02D0 Hex 720 Dec Off On On Off Off On 02C8 Hex 712 Dec On On On Off Off On 02C0 Hex 704 Dec
Off Off Off On Off On 02B8 Hex 696 Dec On Off Off On Off On 02B0 Hex 688 Dec Off On Off On Off On 02A8 Hex 680 Dec On On Off On Off On 02A0 Hex 672 Dec
Page 30 Chapter 2
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Installation Guide AD1200 Reference
Off Off On On Off On 0298 Hex 664 Dec On Off On On Off On 0290 Hex 656 Dec Off On On On Off On 0288 Hex 648 Dec On On On On Off On 0280 Hex 640 Dec
Off Off Off Off On On 0278 Hex 632 Dec On Off Off Off On On 0270 Hex 624 Dec Off On Off Off On On 0268 Hex 616 Dec On On Off Off On On 0260 Hex 608 Dec
Off Off On Off On On 0258 Hex 600 Dec On Off On Off On On 0250 Hex 592 Dec Off On On Off On On 0248 Hex 584 Dec On On On Off On On 0240 Hex 576 Dec
Off Off Off On On On 0238 Hex 568 Dec On Off Off On On On 0230 Hex 560 Dec Off On Off On On On 0228 Hex 552 Dec On On Off On On On 0220 Hex 544 Dec
Off Off On On On On 0218 Hex 536 Default___ ___ __ __ __ __ ________ ___________ On Off On On On On 0210 Hex 528 Dec Off On On On On On 0208 Hex 520 Dec On On On On On On 0200 Hex 512 Dec.
Figure 2-7b. AD1210-21 Base Addresses.___________________________________
The 8254 counter timer occupies the lower 8 i/o address. The PCAD1200 occupies the upper 8 i/o address. DIP1 DIP2 DIP3 DIP4 DIP5 DIP6 8254 AD1210/21____ ____ ____ ____ ____ ____ ____ _________ Off Off Off Off Off Off 03F0 03F8 Hex On Off Off Off Off Off 03E0 03E8 Hex Off On Off Off Off Off 03D0 03E8 Hex On On Off Off Off Off 03C0 03E8 Hex
Off Off On Off Off Off 03B0 03B8 Hex On Off On Off Off Off 03A0 03A8 Hex Off On On Off Off Off 0390 0398 Hex
Chapter 2 Page 31
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AD1200 Reference Installation Guide
On On On Off Off Off 0380 0388 Hex
Off Off Off On Off Off 0370 0378 Hex On Off Off On Off Off 0360 0368 Hex Off On Off On Off Off 0350 0358 Hex On On Off On Off Off 0340 0348 Hex
Off Off On On Off Off 0330 0338 Hex On Off On On Off Off 0320 0328 Hex Off On On On Off Off 0310 0318 Hex On On On On Off Off 0300 0308 Hex
Off Off Off Off On Off 02F0 02F8 Hex On Off Off Off On Off 02E0 02E8 Hex Off On Off Off On Off 02D0 02D8 Hex On On Off Off On Off 02C0 02C8 Hex
Off Off On Off On Off 02B0 02B8 Hex On Off On Off On Off 02A0 02A8 Hex Off On On Off On Off 0290 0298 Hex On On On Off On Off 0280 0288 Hex
Off Off Off On On Off 0270 0278 Hex On Off Off On On Off 0260 0268 Hex Off On Off On On Off 0250 0258 Hex On On Off On On Off 0240 0248 Hex
Off Off On On On Off 0230 0238 Hex On Off On On On Off 0220 0228 Hex Off On On On On Off 0210 0218 Hex Default___ __ __ __ __ ___ ____ ________ _______ On On On On On Off 0200 0208 Hex
Off Off Off Off Off On 01F0 01F8 Hex On Off Off Off Off On 01E0 01E8 Hex Off On Off Off Off On 01D0 01D8 Hex On On Off Off Off On 01C0 01C8 Hex
Off Off On Off Off On 01B0 01B8 Hex
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Installation Guide AD1200 Reference
On Off On Off Off On 01A0 01A8 Hex Off On On Off Off On 0190 0198 Hex On On On Off Off On 0180 0188 Hex
Off Off Off On Off On 0170 0178 Hex On Off Off On Off On 0160 0168 Hex Off On Off On Off On 0150 0158 Hex On On Off On Off On 0140 0148 Hex
Off Off On On Off On 0130 0138 Hex On Off On On Off On 0120 0128 Hex Off On On On Off On 0110 0118 Hex On On On On Off On 0100 0108 Hex
If you have set the board at a different address then you will need to inform the software that you intend to run about the new i/o address.
Using More Than One PC AD1200 Board._____________________________________
Since each PC AD1200 card, can measure up to 16 Analogue inputs and drive 2 analogue outputs, with 8 digital i/p and 8 digital output lines it is not generally necessary to have more than one board installed in the PC at any one time. However, it is possible to have many AD1200 cards, each controlling its own set of i/o lines, in one PC.
The golden rule to follow to allow this is:- Ensure that each PC AD1200 card is set to a different i/o address. If more than one card is performing interrupt or DMA driven i/o then set the IRQ and DMA jumpers to different channels.
Interrupt Selection._________________
The AD1200 card can produce interrupts due to a range of circumstances, pacer controlled A/D conversion done, pacer
Chapter 2 Page 33
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AD1200 Reference Installation Guide
controlled D to A converter timed out, pacer controlled digital i/o timed out etc. The appropriate signal must be enabled in software and the irq signal generated must be physically connected to one of the processor Interrupt ReQuest lines by placing the jumper on the IRQ block in the correct place.
The PC AD1200 has 1 IRQ jumper block labelled IRQJMP. The position of the jumper MUST match the IRQ level set in the software.
Setting The Interrupt Jumper Block.________________________________
The PC AD1200 has 1 IRQ jumper block, IRQJMP
The movable jumper on the jumper block is used to specify which hardware interrupt, into the computer, is to be generated by the PC AD1200 card. The position of the jumper MUST match the IRQ level set in the your software. Remember to enable the IRQ DIP switch.
Most users will not require IRQs and so should leave the IRQ jumper in the factory set position, IRQ 7.
NOTE: Do not add an extra jumper of your own across the
_________
jumper block it will only cause great confusion.
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Installation Guide AD1200 Reference
Figure 2-8. The IRQ Jumper Block._______________________________
NORMAL USE OF INTERRUPT.________________________
ЪДДДДДДДДДД¿ ³ююююЫююююю³
IRQ2 E.G.A. GRAPHICS CARD.
АДДДДДДДДДДЩ
Good choice.
ЪДДДДДДДДДД¿ ³юююююЫюююю³
IRQ3 RS232C COM PORTS 2-8.
АДДДДДДДДДДЩ ЪДДДДДДДДДД¿ ³ююююююЫююю³
IRQ4 RS232C COM PORT 1.
АДДДДДДДДДДЩ ЪДДДДДДДДДД¿ ³юююююююЫюю³
IRQ5 HARD DISK IN XT, OK in 286/386/486
АДДДДДДДДДДЩ
Good choice.
ЪДДДДДДДДДД¿ ³ююююююююЫю³
IRQ6 DISK DRIVE STATUS.
АДДДДДДДДДДЩ ЪДДДДДДДДДД¿ ³юююююююююЫ³
IRQ7 PRINTER. PC AD1200 Recommended.
АДДДДДДДДДДЩ
DEFAULT.
ЪДДДДДДДДДД¿ ³юююЫюююююю³
IRQ10 Usually Free, Good Choice
АДДДДДДДДДДЩ ЪДДДДДДДДДД¿ ³ююЫююююююю³
IRQ11 Usually Free, Good Choice
АДДДДДДДДДДЩ ЪДДДДДДДДДД¿ ³юЫюююююююю³
IRQ12 Usually Free, Good Choice
АДДДДДДДДДДЩ ЪДДДДДДДДДД¿ ³Ыююююююююю³
IRQ15 Usually Free, Good Choice
АДДДДДДДДДДЩ
DMA Selection. AD1200 Only.______________ _____________
The AD1200 card can perform its input or output under
DMA control, that is the data moves between the PC and the
Chapter 2 Page 35
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AD1200 Reference Installation Guide
converter in the background whilst the computer is apparently busy doing another job. DMA is ideal for moving large amounts of data very quickly. The DMA hardware requires that the DMA channel jumper settings should be set for DMA operation to be performed. The AD1200 board is designed so that it will only generate DMA requests when the DMA enable bit, bit 3, in the control status register, is set. When the DMA enable bit is clear, 0 the DMA request line is tristated off, the AD1200 card cannot perform DMA i/o and does not drive the DMA channel lines at all. This allows for DMA line sharing.
The position of the DMA channel jumper MUST match the DMA channel used in the software. The range of instructions controlling the enabling and use of the DMA facility are described in later chapters.
Setting The DMA Channel Jumper Block.____________________________________
AD1200 Only
Only the AD1200 card can perform DMA driven i/o. Two movable jumpers on the DMA jumper block, DMAJMP, are used to select the channel through which the direct memory access transfers pass.
Most user will not require DMA and so should leave the DMA jumpers in the factory set position, DMA 1.
One of the jumpers is across the DMA request line and the other across the DMA acknowledge line. Moving the jumper pins select which DMA channel is invoked by the AD1200 board hardware. The jumpers can be in one of three positions, see Figure 2-9. The jumpers must be set in pairs, both jumpers MUST be set in the same DMA channel pair. NOTE: Do not add an extra jumpers of your own across the jumper block, it will only cause great confusion.
Page 36 Chapter 2
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Installation Guide AD1200 Reference
Figure 2-9. The DMA Jumper Block.________________________________
DMA CHANNEL SELECTION. AD1200 Only.______________________ ____________
ЪДДДДДД¿ ³ЫЫюююю³
DMA CHANNEL 1. THE DEFAULT
АДДДДДДЩ ЪДДДДДД¿ ³ююЫЫюю³
DMA CHANNEL 2.
АДДДДДДЩ ЪДДДДДД¿ ³ююююЫЫ³
DMA CHANNEL 3.
АДДДДДДЩ
Select the DMA channel line required by placing the pair of jumpers across the appropriate pins. If in doubt leave in the jumpers in the factory set condition, DMA 1.
D/A Output Range Selection._________________________
Both DAC0 and DAC1 may be independently set for a variety of output voltage ranges. Five jumpers for each DAC are used to configure the output range. The DAC1 jumpers are labelled DAC1 and are found at the extreme top left hand side of the AD1200 card. The DAC0 jumpers are labelled DAC0 and are found at the top left hand side of the Ad1200 card, between the DAC1 and ADC converter jumpers. One pair of jumpers labelled BP and UNI determine whether the output range is bipolar or unipolar, the other 3 jumpers labelled ABC determine the voltage span. Remember: Calibration should be performed when output ranges are changed, to ensure the AD1200 remains in specification and measurements are traceable back to recognised standards.
Chapter 2 Page 37
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AD1200 Reference Installation Guide
Figure 2-10. D/A Output Range Selection.____________________________________
DAC OUTPUT RANGE._________________ BUCBA PN
I
ЪДДДДД¿ ³юЫюЫЫ³
0 to +10 Volts UNIPOLAR
АДДДДДЩ ЪДДДДД¿ ³юЫЫюЫ³
0 to +5 Volts UNIPOLAR
АДДДДДЩ ЪДДДДД¿ ³ЫююЫю³
-10 to +10 Volts BIPOLAR
АДДДДДЩ ЪДДДДД¿ ³ЫююЫЫ³
-5 to +5 Volts BIPOLAR DEFAULT
АДДДДДЩ ЪДДДДД¿ ³ЫюЫюЫ³
-2.5 to +2.5 Volts BIPOLAR
АДДДДДЩ
A/D Configuration._________________
The gain of the AD converter, the input channel type and the input voltage range can all be independently selected. The A/D input channel number selection is under software control. On the AD1200 and AD1210/11 the gain is also under software control. On the AD1220/21 the gain cannot be set by software but is selected using the ADC GAIN jumpers.
Input Channel Type.
The AD1200 card may be set for 16 channels of single ended input, for 8 channels of differential input or for 16 channels of pseudo differential input. The 6 A/D input select jumpers are in centre right of the card.
Page 38 Chapter 2
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Installation Guide AD1200 Reference
Figure 2-11. A/D Channel Input Select.__________________________________
ADC CHANNEL INPUT SELECT._________________________
ЪДДДДДД¿ ³ЫюююЫю³
8 Channel Differential Inputs
АДДДДДДЩ ЪДДДДДД¿ ³юЫюЫюЫ³
16 Pseudo Channel Differential Inputs
АДДДДДДЩ ЪДДДДДД¿ ³юЫЫююЫ³
16 Channel Single Ended Inputs DEFAULT
АДДДДДДЩ
Input Voltage Range.
The 4 input voltage range selection jumpers are in the centre top of the AD1200 card, two select input span, two select uni or bipolar ranges. Figures 2-14 and 2-15 give the options available.
Chapter 2 Page 39
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AD1200 Reference Installation Guide
Figure 2-12. AD1200 A/D Input Range Selection.__________________________________________
AD1200 card - software selectable gain.
1 BU 05PN AD 20Vin ADC INPUT RANGE.________ ________________ VV I
ЪДДДД¿ ÚÄ¿ ³þÛþÛ³ ³Ü³
0 to +10 Volts UNIPOLAR
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³þÛþÛ³ ³ß³
0 to +5 Volts UNIPOLAR
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³ÛþÛþ³ ³Ü³
-10 to +10 Volts BIPOLAR
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³ÛþÛþ³ ³ß³
-5 to +5 Volts BIPOLAR DEFAULT
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³þÛÛþ³ ³Ü³
-5 to +5 Volts BIPOLAR DUPLICATE
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³þÛÛþ³ ³ß³
-2.5 to +2.5 V BIPOLAR
АДДДДЩ ÀÄÙ
Note: at each of the jumper selectable input ranges, the software selectable gains of 1-2-4-8 or 1-10-100-1000 may be applied. Thus on the AD1200PGL card when jumper set for -2.5 to +2.5 bipolar input, software selectable input ranges are: gain =1 -2.5 to +2.5 volts gain =2 -1.25 to +1.25 volts gain =4 -0.625 to +0.625 volts gain =8 -0.3125 to +0.3125 volts
Page 40 Chapter 2
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Installation Guide AD1200 Reference
Figure 2-13. AD1210 A/D Input Range Selection.__________________________________________
AD1210 & AD1211 - software selectable gain.
1 BU 05PN AD 20Vin ADC INPUT RANGE.________ ________________ VV I
ЪДДДД¿ ÚÄ¿ ³þÛþÛ³ ³Ü³
0 to +10 Volts UNIPOLAR
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³þÛþÛ³ ³ß³
0 to +5 Volts UNIPOLAR
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³ÛþÛþ³ ³Ü³
-10 to +10 Volts BIPOLAR
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³ÛþÛþ³ ³ß³
-5 to +5 Volts BIPOLAR DEFAULT
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³þÛÛþ³ ³Ü³
-5 to +5 Volts BIPOLAR DUPLICATE
АДДДДЩ ÀÄÙ ЪДДДД¿ ÚÄ¿ ³þÛÛþ³ ³ß³
-2.5 to +2.5 V BIPOLAR
АДДДДЩ ÀÄÙ
Note: at each of the jumper selectable input ranges, the software selectable gains of 1-2-4-8 or 1-10-100-1000 may be applied. Thus on the AD1211PGL card when jumper set for -2.5 to +2.5 bipolar input, software selectable input ranges are: gain =1 -2.5 to +2.5 volts gain =2 -1.25 to +1.25 volts gain =4 -0.625 to +0.625 volts gain =8 -0.3125 to +0.3125 volts
Chapter 2 Page 41
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AD1200 Reference Installation Guide
Figure 2-14. AD1220 A/D Input Range Selection.__________________________________________
AD1220 and AD1221 cards only.
1 BU 05PN ADC GAIN ADC INPUT RANGE.________ ________________ VV I
ЪДДДД¿ ÚÄÄ¿ ³þÛþÛ³ ³ÛÛ³
0 to +10 Volts UNIPOLAR
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³þÛþÛ³ ³þÛ³
0 to +5 Volts UNIPOLAR
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³þÛþÛ³ ³Ûþ³
0 to +2.5 Volts UNIPOLAR
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³þÛþÛ³ ³þþ³
0 to +1.25 Volts UNIPOLAR
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³ÛþÛþ³ ³ÛÛ³
-10 to +10 Volts BIPOLAR
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³ÛþÛþ³ ³þÛ³
-5 to +5 Volts BIPOLAR DEFAULT
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³ÛþÛþ³ ³Ûþ³
-2.5 to +2.5 V BIPOLAR
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³ÛþÛþ³ ³þþ³
-1.25 to +1.25 BIPOLAR
АДДДДЩ ÀÄÄÙ ЪДДДД¿ ÚÄÄ¿ ³þÛÛþ³ ³þþ³
-0.625 to +0.625 BIPOLAR
АДДДДЩ ÀÄÄÙ
Remember: Calibration should be performed whenever the input ranges are changed, to ensure that the AD1200 remains in specification, and that your analogue measurements are traceable back to nationally and internationally recognised standards.
Page 42 Chapter 2
Page 52
Installation Guide AD1200 Reference
8254 Counter Timer Pinouts._________________________
The AD1210, AD1211, AD1220 and AD1221 all have a 16 bit counter timer chip on board. This counter timer greatly increases the functionality of the A/D cards.
The 8254 has consists of 3 16 bit counters, Counter 0, Counter 1 and Counter 2. Each counter timer has a clock input, a gate input and a counter output, these are TTL level signals.
Counter 1 has inputs CLK1, GATE1 and outputs OUT1. Counter 2 has inputs CLK2, GATE2 and outputs OUT2. The input to CLK1 is 600kHz from the pacer clock oscillator, the output OUT1 drives the CLK2 input and the OUT2 output, under program control, can be used as the A/D converted clock. When bit 7 of the Timer Xmode register is zero the Pacer clock output drives the A/D converter. When bit 7 of the Xmode register is set then the CLK2 output drives the A/D converter.
Counter 0 has inputs CLK0, GATE0 and outputs OUT0. Counter 0 is unused and completely free for the user to program. Its CLK0 input is shared by the bit 5 Digital Input Port line, pin 34 on the 50 way IDC connector. The GATE0 input is shared by the bit 6 Digital Input Port line, pin 35 on the 50 way IDC connector. Since both these lines are inputs they do not effect the operation of the digital input port. Counter 0’s OUT0 can be output via the bit 7 Digital Input Port line, pin 36 on the 50 way IDC connector. A jumper on the A/D card is used to connect OUT0 to Digital Input 7. Since this is an output driving the line, Digital Input 7 can no longer be used.
Figure 2-15. OUT0 Via Digital Input Bit 7, Pin36.___________________________________________
AD1210/11 and AD1220/21 cards only.
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.
³
OUT0 NOT CONNECTED DEFAULT
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OUT0 OUTPUT VIA DIGITAL INPUT 7, IDC PIN36
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Chapter 2 Page 43
Page 53
AD1200 Reference Installation Guide
Installing The PC AD1200 Board In The Computer._____________________________________________
Note: Always turn the computer OFF before installing or
_____
removing any interface board..!!!
After having made sure that the i/o address is correctly set, now is the time to insert the PC AD1200 board into the i/o connector slots in the computer.
STEP 1 Before the PC AD1200 board can be installed the power to the PC MUST be switched OFF!
Figure 2-16. Remove Cover Mounting Screws.________________________________________
STEP 2 Then using a screw driver, remove the cover mounting screws on the back panel of the PC system unit.
Figure 2-17. Removing The PC Cover._________________________________
STEP 3 Next, remove the PC’s cover by sliding it forward and up. It usually helps to disconnect the keyboard from the PC since it tends to get in the way when the case is removed.
Page 44 Chapter 2
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Installation Guide AD1200 Reference
Figure 2-18. Removing Blanking Cover.__________________________________
STEP 4 Choose an empty expansion slot. The PC AD1200 card will fit either a full length or a short slot, a 8 bit PC type slot or a 16 bit AT type slot. In general it is wise to leave the larger slots free for those boards that insist on greater room. Remove the blanking cover protecting the slot on the PC back panel. KEEP the blanking cover screw safely for later.
Figure 2-19. Inserting The PC AD1200 Card._______________________________________
STEP 5 Now insert the PC AD1200 card in the slot. Be careful to ensure that the gold plated pcb fingers fits neatly into the i/o expansion connector. Press down firmly but evenly on the top of the PC AD1200 card.
STEP 6 The 50 way IDC connector should fit neatly through the slot’s aperture to the outside world.
Use the screw kept back from the blanking cover to screw the PC AD1200 retaining bracket into the PC back panel housing.
Chapter 2 Page 45
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AD1200 Reference Installation Guide
STEP 7 Now replace the system units cover by carefully sliding it down and back over the system unit. Replace the cover mounting screws. STEP 8 After attaching all the monitor and keyboard cables, power up the PC. Do not forget the mains power cable!
The PC should power on in the normal way.
AD1200 Backplane Signals.________________________
Looking at the back of the PC with AD1200 installed. Note 8254 Only On AD1210/11/20/21 NOT on AD1200.
Figure 2-20. AD1200 J2 Pin Outs._____________________________
Signal PIN
ЪДДДДД¿
PIN Signal
AD Ch 0 1
³
1 2
ý³
2 AD Ch 8 (Ch0 Return)
AD Ch 1 3
³
3 4
ý³
4 AD Ch 9 (Ch1 Return)
AD Ch 2 5
³
5 6
ý³
6 AD Ch 10 (Ch2 Retn)
AD Ch 3 7
³
7 8
ý³
8 AD Ch 11 (Ch3 Retn)
AD Ch 4 9
³
O O
ý³
10 AD Ch 12 (Ch4 Retn)
AD Ch 5 11
³
O O
ý³
12 AD Ch 13 (Ch5 Retn)
AD Ch 6 13
³
O O
ý³
14 AD Ch 14 (Ch6 Retn)
AD Ch 7 15
³
O O
ý³
16 AD Ch 15 (Ch7 Retn)
Analogue Gnd 17
³
O O
ý³
18 Amp Low
------------------------------------------------------------­+12Volts Out 19
³
O O
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20 -12Volts Out
------------------------------------------------------------­Power Ground 21
³
O O
ý³
22 DAC0 Output
DAC0 Ground 23
³
O O
ý³
24 DAC1 Output
DAC1 Ground 25
³
O O
ý³
26 Digital Ground
-----------------------------------------------------------­Digital Gnd 27
³
O O
ý³
28 Dig Input 0
Dig Input 1 29
³
O O
ý³
30 Dig Input 2
Dig Input 3 31
³
O O
ý³
32 Dig Ground
Dig Input 4 33
³
O O
ý³
34 Dig In 5 / 8254 CLK0
8254 GATE0/ Dig In 6 35
³
O O
ý³
36 Dig In 7 / 8254 OUT0
Digital Gnd 37
³
O O
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38 Dig Output 0
Dig Output 1 39
³
O O
ý³
40 Dig Output 2
Dig Output 3 41
³
O O
ý³
42 Dig Ground
Dig Output 4 43
³
O O
ý³
44 Dig Output 5
Dig Output 6 45
³
O O
ý³
46 Dig Output 7
Digital Gnd 47
³
O O
ý³
48 Dig Ground
-----------------------------------------------------------­External Trigger
³
49 50
³
50 External Clock Input
Input
АДДДДДЩ
Page 46 Chapter 2
Page 56
Installation Guide AD1200 Reference
The PC AD1200 board connects to the real world devices using a 50 way IDC ribbon cable or a 50 pin D connector cable, available from your dealer or via the HELP line on Intro page 2.
The 50 way IDC connector is arranged as two parallel rows of 25 pins on a 0.1 inch pitch, the pin outs are given above.
Signal Types.____________
The AD1200 card signals may be grouped as follows.
i) Analogue Inputs.
AD CH0-CH15.
These are the 16 inputs to the A/D converter when in Single Ended or Pseudo Differential Mode.
Analogue Ground.
The return line for CH0-15. The analogue inputs in Single Ended Mode are measured relative to this signal, AGND.
Amp Low.
The return line for CH0-15. The analogue inputs in Pseudo Differential Mode are measured relative to this signal.
AD CH0-CH7, & CH0-CH7 Return.
These are the 8 input with the relevant return to the A/D converter when in using Differential Mode.
ii) Analogue Outputs.
DAC0 Output, DAC0 Ground.
The analogue output and return line for D/A converter DAC0. DAC0 ground is internally connected to analogue ground, AGND.
DAC1 Output, DAC1 Ground.
The analogue output and return line for D/A converter DAC1. DAC1 ground is internally connected to analogue ground, AGND.
iii) Power Outputs.
+12 Volts, -12 Volts and Power Ground.
Power supply lines and return to drive the users own interfaces. The +/-12 are fuse protected on the
Chapter 2 Page 47
Page 57
AD1200 Reference Installation Guide
AD1200 card. Maximum permissible output current is 20 milliamps. The Maximum output current is largely determined by the capacity of the power supply installed in the PC. Check its rating. Power ground is internally connected to analogue ground, AGND.
iv) Digital Lines.
Digital Output 0-7.
These are the 8 lines from the digital output port. They are TTL compatible.
Digital Input 0-7.
These are the 8 lines to the digital input port. They are TTL compatible.
Digital Ground.
The ground return for the digital input and digital output lines. There are 7 digital grounds and any external digital circuits connected to the digital input or output lines should be earthed via these ground lines. The digital grounds are internally connected to analogue ground, AGND.
v) External Clock & Trigger.
External Clock.
The External Clock input can be used instead of the onboard 600kHz oscillator to clock the A/D, DAC0 and DAC1 converters and to initiate IRQs and DMA transfers to the converters and the digital port lines. The clock is TTL compatible and the frequency can be in the range DC to 1MHz.
External Trigger.
The negative going edge of the External Trigger input can be used to start a series of conversions or data transfers to the various ports. The trigger is TTL compatible.
Page 48 Chapter 2
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Installation Guide AD1200 Reference
Wiring Guidelines._________________
The AD1200 system is designed to accurately measure low voltage signals thus noisy input signals will tend to render the advanced design features useless. In particular, the performance of the Programmable Gain Amplifier feature, available on the boards, can be greatly effected by noise if signals are incorrectly connected. It is imperative that good wiring practice be used to obtain optimum results from the AD1200 card.
Twisted Pair Cables.__________________
Twisted pair cables may reduce the noise on Differential
Inputs noticeably. The high and low inputs of each channel
are twisted together so that any noise identical effects each
of these inputs. Since the converter measures the
DIFFERENCE between these two inputs the noise, being
identical is subtracted out. This is called Common Mode
Noise Rejection and it also greatly reduces the effects of
ground potential differences in taking signals from various
parts in a system.
Obviously this scheme does not work and should not
be attempted on Single Ended Inputs.
The output from the D to A converters, DAC0 out with DAC0 ground and DAC1 out with DAC1 ground, can similarly benefit from twisted pair cables.
Shielded Cables._______________
All leads, Single Ended Analogue input, Differential Analogue Input, Analogue output, Digital input and Digital output, should be shielded. This is the guard shield. Each differential input twisted pair should be separately shielded with the shield tied to analogue ground, AGND, only at the SOURCE end of the connection, and that the shield be continuous, ie through screw terminal boards, panels, connectors etc. The shield of each signal, or pair of differential signals, should also be insulated from each other since each is carrying its own current!
Chapter 2 Page 49
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AD1200 Reference Installation Guide
Single Ended inputs and outputs, having a common ground, should be arranged to ensure that ground loops are avoided. Also prevent significant voltages being induced in ground return leads returning to the single point ground. Differential outputs from DAC0 and DAC1, similarly should be shielded tied to AGND at the PC card end. Digital inputs and digital outputs should be shielded by the DIGITAL ground.
The Analogue Ground MUST be kept separate from the Digital Ground especially when connections are made to external, user supplied, circuits.
Input Voltage. Overvoltage Warning!_____________ ____________________
The analogue input to the A to D converter MUST be kept within 20% of the maximum otherwise it may be damaged or go permanently out of specification. This is of particular importance when the Programmable Gain Amplifier is being used, a gain of 1000 when set for -2.5 to +2.5 Volts input gives a full scale reading from +/-2.5 milli Volts and a maximum input level of +/-3.00 milli Volts!
Beware it is all too easy to over load the analogue input at high gain levels.!
Problems!_________
If the system fails to power up check the following. i.) Ensure that the PC AD1200 card is installed correctly. ii.) Ensure that other cards in the PC have not been upset. iii.) Ensure that the power is connected & PC is switched ON! iv.) Ensure that the PC AD1200 i/o address is set correctly,
default is 0218h.
If all these have been checked and the PC still does not power up then there is probably a conflict of i/o address between the PC AD1200 board and another board in the PC. Ask your dealer to check this or contact the HELP line as given on Intro page 2.
Page 50 Chapter 2
Page 60
Register Map AD1200 Reference
CHAPTER 3
PC AD1200
REGISTER
MAP.
Introduction.____________
This chapter explains the AD1200 Register Map, it details the programmable status and control registers on the card. Whilst most users will use the bundled driver software and so find this information be be unnecessary it is included to make this manual as complete as possible, to cover every eventuality.
I/O Address Map.________________
The AD1200 series uses 8 bytes of i/o address space. These registers control all of the AD1200 functions, the driver software access these registers. If you are using the bundled driver software do not access the registers directly, otherwise confusion may arise.
Unless you have GOOD REASON, you do not need to program the locations.
Figure 3-1. AD1200 Register Map.______________________________
ЪДДДДДДДДДДВДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³
ADDRESS
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REGISTER
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0000ýR/W
ý³ý
0218ýHex³ A/D CONTROL STATUS REGISTER
ý
ADCSR ADCSR
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0219ýHex³ A/D GAIN CONTROL REGISTER ADGCR
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ADGCR
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ýýýý ý
DAC0LO ADCLO
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ýýýý ý
DAC0HI ADCHI
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0004
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ýýýý ý
DAC1LO
ý³
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0005
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ýýýý ý
DAC1HI
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ýý
ýDIGIN ýDIGOUT
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0007ýR/W
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021FýHex³ TIMER CONTROL, EXTENDED MODE TIMERXM TIMERXM
³ ГДДДДДДДДДДБДДДДДДДДДБДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³ý
Note: Registers Do Not Always Read Back What Has Been Written
ý³
АДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
Chapter 3 Page 51
Page 61
AD1200 Reference Register Map
Register Types.______________
The registers fall into two types:-
1) Control registers such as the ADCSR, ADGCR and the TIMERXM register. The registers contain mainly read and write bits. These registers determine the SOURCE of the A/D converter input and the RATE at which data can be read from, or written to, the other ports.
2) Data input output ports such as the AD LO & HI input registers, the DAC0 LO & HI output ports, the DAC1 LO & HI output ports, the DIGITAL output port and the DIGITAL input port. These registers are EITHER read OR write. In fact, the INPUT registers for the A/D converter are at the same addresses as the OUTPUT registers for the D/A converter DAC0. This causes no problem in practice since the A/D converter is an input only device and DAC0 is an output only device.
Read Write Assignments.______________________
Not every register is a read and write register. The
DAC1LO register and the DAC1HI register are write only registers. The Control Status Register is a mixture of read only bits, write only bits and read & write bits. For example the A/D Control Status Register has three read only bits giving the status of the A/D converter, 1 write only bit to clear an A/D error and 4 read/write bits that determine how the A/D conversions are to be performed.
The AD1200 register map has been chosen with the
following design considerations:­i) Efficient use of the PC’s limited i/o space. ii) Compatibility with DT2811 card and its extensive software
support.
iii) Compatibility with Asyst, Labtech and other third party
data acquisition packages.
Page 52 Chapter 3
Page 62
Register Map AD1200 Reference
Power Up Conditions.___________________
On power up all registers are set to zero.
The A/D Control Status Register._____________________________
The most important register in the AD1200 series of cards is the control status register. It is the primary control register for the AD Converter, it holds the A/D Busy and A/D Done bits which indicate whether an A/D conversion is in progress or finished, its A/D Error and Clear Error bits are used to detect and service A/D overrun or triggering mistakes. The DMA and Interrupt enable bits are used to decide whether the A/D Done bit causes a DMA read or system interrupt. Finally its Mode bits determine whether single shot or continuous A/D conversions are performed and what initiates the repetitive conversions and at what rate they occur.
Figure 3-2. A/D Control Status Register.___________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
ADCSR A/D Control Status Register.
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BITý7
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BITý6
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0218
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АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
Bit 7 A/D Done, Read Only.________________________
This bit is indicates that the A/D converter has a reading ready. Set By: The A/D converter when it has finished converting an
analogue input. If Bit 3, DMA Enable, of the ADCSR is also set then a DMA cycle will be generated when this bit is set by the ADC. If Bit 2, Interrupt Enable, of the ADCSR is also set, but not Bit 3, then an interrupt will be generated when this bit is set by the ADC.
Chapter 3 Page 53
Page 63
AD1200 Reference Register Map
Reset By: Reading the ADC data high byte at Register 3.
This bit is automatically cleared at power up.
Bit 6 A/D Error, Read Only._________________________
This bit is indicates that an error has occurred during the A/D conversion. Set By: Overrun error. A new conversion has been completed
whilst the previous has not been read, ie ADCHI, Register 3 has not been read. Trigger error. A new conversion has been requested while the current conversion is in progress. If Bit 2, Interrupt Enable, of the ADCSR is also set, then an interrupt will be generated when this bit is set by the ADC.
Reset By: Writing a 1 to bit 4 of the ADCSR.
This bit is automatically cleared at power up.
Bit 5 A/D Busy, Read Only.________________________
This bit is indicates that an A/D conversion is in progress. Set By: An A/D strobe. Any further A/D strobes while this
bit is set will cause an A/D error due to overrun.
Reset By: This bit is automatically cleared when the A/D
conversion is finished and the data is ready to be read from the ADCLO and ADCHI registers.
Bit 4 Clear A/D Error, Write Only._______________________________
Writing a 1 to this bit clears the A/D Error bit, bit 6 of the ADCSR. Note: This bit ALWAYS reads back as 0.
Bit 3 DMA Enable, Read / Write. AD1200 Only_____________________________ ____________
This bit is used to enable DMA on the AD1200 card only. This bit is always reads as 0 on the AD1210, AD1211, AD1220 and AD1221 cards since these do not have DMA capability.
The top of range AD1200 card can card perform DMA on A/D Conversion Done and also generate DAC0 and DAC1 pacer
Page 54 Chapter 3
Page 64
Register Map AD1200 Reference
clock DMA requests and TTL i/o port pacer DMA requests when the Extended Mode bits are set in the Timer Control Register. When the Extended Mode bits are set the Pacer clock is used to initiate the DMA cycle, the data is read from the TTL input port or written to the TTL output port or the DAC0 or DAC1 registers.
When Set: DMA i/o is enabled and a DMA cycle with be
initiated due to A/D Done or Pacer Strobe depending on the settings of the Mode Bit 1 and Mode bit 0 registers and the extended Mode bits of the Timer Control register.
If Clear: No DMA operations take place when this line is
clear, the DMA lines are tristated and the DMA
channel is free for use by other devices. Set By: This bit is set under program control. Reset By: This is cleared under program control.
This bit is automatically cleared at power up.
Bit 2 Interrupt Enable, Read / Write.________________________________
This bit is is used to enable interrupts, IRQs. The whole range of AD1200 cards can generate A/D Done, and A/D Error interrupts. The top of range AD1200 card can also generate DAC0 and DAC1 pacer clock interrupts and TTL i/o port pacer interrupts when the Extended Mode bits are set.
When Set: Interrupts are generated when A/D Done bit or the
A/D Error bits is set. AD1200 only: IRQ i/o due to A/D Done or Pacer Strobes depending on combination of Mode Bits 0 & 1 and the Extended Mode bits in the Timer register.
If Clear: No Interrupts are generated this bit is clear, the IRQ
lines are tristated and the IRQ channel is free for use
by other devices. Set By: This bit is set under program control. Reset By: This is cleared under program control.
Chapter 3 Page 55
Page 65
AD1200 Reference Register Map
This bit is automatically cleared at power up.
Bits 0 & 1. Mode Bit 0 & 1. Read / Write.____________________________________
These bit are used to control the four modes of the A/D
converter and function according to the following table.
Figure 3-3. Mode 0 & 1 Bits._________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
ADCSR A/D Control Status Register.
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MODE
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BITý1
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BITý0
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0
ýý³ý
0
ýý³ý
0
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Single A/D Conversion when ADGCR
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³ ³ ³ A/D Gain/Channel Register, is written.
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1
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Continuous A/D conversions by pacer clock
³ ³
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Continuous A/D conversions by pacer clock
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Continuous A/D conversions by pacer clock
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The AD1210-21 cards, with the 8254 counter timer chip on board, uses the TIMER register bits 7 as a method of selecting the 8254 counter timer INSTEAD on the on board 600kHz pacer clock as the source of the A/D converter strobe pulses. Bit 6 has no function and reads back as 0.
The AD1200 card has extra modes that are selected by the TIMER register bits 6 & 7 in conjunction with ADCSR Mode bit 0 & 1. In this scheme the TIMER Extended Mode bits are used to determine on which port, ADC, DAC0, DAC1 or Digital i/o, the continuous conversions take place. When both Extended Mode bits are 0, the AD1200 card performs as all the other cards in the series and the repetitive conversions take place on
Page 56 Chapter 3
Page 66
Register Map AD1200 Reference
the A/D converter.
Figure 3-4. AD1200 Extended Mode Bits.____________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
AD1200 Card Only TIMER Extended Mode Bits
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BITý6
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Continuous Conversion Performed On
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0
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0
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A/D Converter Compatible Mode
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0
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1
ýý³
DAC0
³ ГДДДДДДДЕДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
1
ýý³ý
0
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DAC1
³ ГДДДДДДДЕДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
1
ýý³ý
1
ýý³
DIGITAL I/O PORT
³ АДДДДДДДБДДДДДДДБДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
Figure 3-5. AD1210-21 Extended Mode Bit._____________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
AD1210-AD1221 TIMER Extended Mode Bits
эээээ
ý ý ý ý ý
ý³ ГДДДДДДДВДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
BITý7
ý³ý
BITý6
эээээ³
AD Clock
³ ГДДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
0
ýý³
Always= 0
ý³
600kHz On Board Pacer Clock
³ ГДДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
1
ýý³ý
Always= 0
ý³
8254 Timer Counter
³ АДДДДДДДБДДДДДДДДДДДБДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
Initialising The A/D Converter.___________________________
The A/D converter should be initialised by performing the following steps before changing the mode set in the ADCSR. The Real World driver software supplied with the card performs this automatically on mode changes, or when the ’Init’ routine is called. i) Write 00hex to the ADCSR, ie disable pacer clock
conversions, stop pacer clock running, disable interrupts,
disable DMA. ii) Wait at least 100uS, ie allow any A/D conversion in
progress to finish. iii) Read the high byte of the A/D data, ADCHI, ie clear the
A/D Done bit. iv) Write 10hex to the ADCSR, ie clear any A/D Error bit.
Chapter 3 Page 57
Page 67
AD1200 Reference Register Map
The A/D Gain Channel Register.____________________________
The A/D Gain Channel Register, ADGCR, is used to select the input channel to the A/D converter and the gain applied to the input signal by the programmable gain amplifier. Note: The AD1221 and AD1220 cards do NOT have
programmable gain and ADGCR bits 6 & 7 always read
back as zero. When in Mode 0, single conversion mode, then writing to the A/D Gain Channel Register forces the A/D Converter to start its next conversion. A short delay, 4uS, between writing the ADGCR and the start of conversion signal is automatically inserted by the AD12XX card to allow the channel select circuitry and the Programmable Gain Amplifier output to stabilise. This delay is not inserted in continuous A/D conversion modes since the new channel information is written after the sample and hold circuitry acquires the input voltage due to the pacer clock strobe signal.
Figure 3-6. A/D Gain Channel Register.__________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
ADGCR A/D Gain Channel Register.
эээээээээээээээ
ýý³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
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BIT 5
ýý
BITý4
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BITý3
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BITý2
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BITý1
ý³ý
BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДД´ ³
0219³ Gain
ý³ý
Gain
ýý³ý
not
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not
ý³
Channel³Channel³Channel³Channel
³ ³ý
Hex³Select1³Select0
³ý
usedý ýused
ý³
Select3³Select2³Select1³Select0
³ ³ýýýý³
ýR/W
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ýý³ ³ээээГДДДДДДДБДДДДДДДЕДДДДДДДДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДД´ ³ýýýý³
AD1221 & AD1220
³ээээээээээээээээээээээээээээээээээээээээээээээ³
³ýýýý³ýý
DOýNOTýHAVE
ээ³ээээээээээээээээээээээээээээээээээээээээээээээ³
³ýýýý³ýý
PROGRAMMABLE
э³ээээээээээээээээээээээээээээээээээээээээээээээ³
³ýýýý³
GAIN READ AS 0
э³ээээээээээээээээээээээээээээээээээээээээээээээ³
АДДДДБДДДДДДДДДДДДДДДБДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
Bits 6 & 7. Gain select. Read / Write.________________________________
These two bits select the gain that the Programmable Gain Amplifier applies to the input voltage. Thus the voltage applied to the cards edge connector is multiplied by this gain value
Page 58 Chapter 3
Page 68
Register Map AD1200 Reference
before it is fed to the A/D converter. The L suffix cards can take LOW input signals, 2.5 milli Volts full scale, and boost them by a factor of up to 1000, ie 2.5 Volts full scale. Please ensure that the boosted input voltage does not exceed the jumper selected input range. L suffix cards, eg AD1211L have gains of 1-10-100-1000. H suffix cards, eg AD1211H have gains of 1-2-4-8.
Set By: These bits are set under program control. Reset By: They are cleared under program control.
These bits are automatically cleared at power up.
Note: The AD1221 and AD1220 cards do NOT have
programmable gain and ADGCR bits 6 & 7 always read back as zero.
Figure 3-7. Gain Selection._______________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
ADGCR A/D Gain Selection.
ý³ ГДДДДДДДДДВДДДДДДДДДВДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
Gain ³ Gain ³ ³ Gain Selected
³
³
Select1 ³ Select0 ³ ³
³ ГДДДДДДДДДЕДДДДДДДДДЕДДДДДЕДДДДДДДДДДДДВДДДДДДДДДДДД´ ³ý
Bit 7 ³ Bit 6
³ý
Hex
ý³
AD12XXL
ý³
AD12XXH
ý³ ГДДДДДДДДДЕДДДДДДДДДЕДДДДДЕДДДДДДДДДДДДЕДДДДДДДДДДДД´ ³ýýý
0
ýý³ ý
0
ýý³ý
00
ý³
ý1
ý³ý
1
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40
ý³
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80
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ý100
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4
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C0
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1000
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8ý
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ý³
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АДДДДДДДДДБДДДДДДДДДБДДДДДБДДДДДДДДДДДДБДДДДДДДДДДДДЩ
Bits 4 & 5. Reserved For Future Expansion. Read / Write.__________________________________________________
These two bits currently have no effect, and are thus
"don’t care" bits. They should be written to as 0 to ensure compatibility with future enhancements to the AD1200 range.
Bits 0, 1, 2 & 3. Channel Select. Read / Write._______________________________________
These four bits select the channel that is fed to the input of
Chapter 3 Page 59
Page 69
AD1200 Reference Register Map
the A/D converter. For Single Ended or Pseudo Differential operation all 4 bits are used to select one of the 16 possible channels. For Differential operation only bits 0, 1 & 2 effect the channel selection, bit 3 is a "don’t care" bit.
Set By: These bits are set under program control. Reset By: They are cleared under program control.
These bits are automatically cleared at power up.
Figure 3-8. Channel Selection.__________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
ADGCR A/D Channel Selection.
ý³ ГДДДДДДДДДДДДДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
Channel Select
³
Channel Selected
³ ГДДДДДДДДДДДДДДДДДВДДДДДЕДДДДДДДДДДДДВДДДДДДДДДДДДДД´ ³ý
3 2 1 0
³
Hex ³Single Ended
³
Differential
³ ГДДДДДДДДДДДДДДДДДЕДДДДДЕДДДДДДДДДДДДЕДДДДДДДДДДДДДД´ ³ýý
0 0 0 0
ýý³
00
ý³ý
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02
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ýý³
03
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04
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4
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06
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07
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7
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08
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ýý³
09
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12
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4
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13
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14
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6
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0F
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15
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7
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ý³
АДДДДДДДДДДДДДДДДДБДДДДДБДДДДДДДДДДДДБДДДДДДДДДДДДДДЩ
The A/D Converter Input Registers. Read Only_________________________________________
The A/D Converter returns a 12 bit value that is the digital
representation of the selected analogue input signal. This 12 bit value is read as from two adjacent 8 bit, read only, registers. The ADCLO register contains the lower 8 bits of the 12 bit value. The ADCHI register contains the upper 4 bits of the 12 bit value. The upper most 4 bits from the ADCHI register always read back as 0.
Page 60 Chapter 3
Page 70
Register Map AD1200 Reference
Reading the ADCHI register resets the A/D Done bit and so the A/D converter can be retriggered to start performing its next conversion. Reading the ADCLO register does not effect the A/D Done bit. Since reading ADCHI clears A/D Done and another reading may be triggered it is best to read ADCLO first and then read ADCHI. The ADCHI and ADCLO registers are READ ONLY, data written to them actually goes to the D/A converter, DAC0 which occupies the same i/o address space, and will eventually appear as an analogue output voltage from this converter.
The 12 bit ADC converter value is obtained from:-
ADCDATA= ADCHI*256 + ADCLO. The ADC data is in the form of right justified offset binary, ie the lowest voltage gives a value of 000hex whilst the highest voltage gives a value of FFFhex. For Unipolar signals, ie 0 to +FULL_SCALE_VOLTS, the actual ADC voltage is obtained from:­ADCVOLT= (ADCDATA * FULL_SCALE_VOLTS ) /4096 For Bipolar signals, ie -FULL_SCALE_VOLTS to +FULL_SCALE_VOLTS, the actual ADC voltage is obtained from:­ADCVOLT= (ADCDATA-2048) *FULL_SCALE_VOLTS /2048
Figure 3-9. ADC Low Byte Input Register._____________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
ADCLO Input Register.
ээээээээээээээээээ³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
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BITý6
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BITý5
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BITý4
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BITý3
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BITý2
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BITý1
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BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021A
³ý
ADC
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7
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6
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5
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4
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3
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2
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1
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0
ý³
³ýýýý³ý
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ý³ý
Read
ý³ý
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ý³ý
Read
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Read
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Read
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Read
ý³
Read
³ АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
Chapter 3 Page 61
Page 71
AD1200 Reference Register Map
Figure 3-10. ADC High Byte Input Register.______________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
ADCHI Input Register.
ээээээээээээээээээ³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
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BITý5
ý³ý
BITý4
ý³ý
BITý3
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BITý2
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BITý1
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BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021B
³ý
Read
ýý³ý
Read
ýý³ý
Read
ýý³ý
Read
ýý³ý
ADC
ý³ý
ADCý
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ADC
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ADC
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as
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as
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as
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as
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11
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10
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9
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8
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³
³ý
0
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0
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0
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0
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Read
ý³ý
Read
ý³ý
Read
ý³
Read
³ АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
The DAC0 D/A Converter Output Registers.______________________________________
Write Only__________
The DAC0 D/A Converter takes a 12 bit value that is the digital representation of the required analogue output voltage. This 12 bit value is written to two adjacent 8 bit, write only, registers. The lower 8 bits of the 12 bit value are written to the DAC0LO register. The upper 4 bits of the 12 bit value are written to lower most 4 bits of the DAC0HI register. The upper most 4 bits written to the DAC0HI register are "don’t care" bits but should always be set to 0 for compatibility with 16 bit D/A software and data formats.
The DAC0HI and DAC0LO registers are WRITE ONLY, data cannot be read back from them, instead a read of these registers returns the latest output from the A/D converter, which occupies the same i/o address space. Since reading ADCHI clears the A/D Done bit in the ADCSR, attempts to "read back" the DAC0 output may cause strange errors to occur, resulting in A/D data being lost.
The DAC data is in the form of right justified offset binary, ie a value of 000hex gives the lowest output voltage whilst a value of FFFhex gives the highest output voltage.
The value to write to the 12 bit D/A converter to obtain any particular output voltage, DACVOLT, is obtained by:-
DAC0HI = DAC0DATA / 256
DAC0LO = DAC0DATA MOD 256 remainder function
Page 62 Chapter 3
Page 72
Register Map AD1200 Reference
For Unipolar signals, ie 0 to +FULL_SCALE_VOLTS, the actual 12 bit DAC0DATA value is obtained from:­DAC0DATA= (DACVOLT *4096 ) /FULL_SCALE_VOLTS
For Bipolar signals, ie -FULL_SCALE_VOLTS to +FULL_SCALE_VOLTS, the actual 12 bit DAC0DATA value is obtained from:-
DAC0DATA=
( DACVOLT*2048 / FULL_SCALE_VOLTAGE ) + 2048
Figure 3-11. DAC0 Low Byte Output Register.________________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
DAC0LO Output Register.
ээээээээээээээээээ³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
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BITý6
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BITý5
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BITý4
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BITý3
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BITý2
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BITý1
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BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021A
³ý
DAC0
ýý³ý
DAC0
ýý³ý
DAC0
ýý³ý
DAC0
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DAC0
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DAC0
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DAC0
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DAC0
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7
ý³ý
6
ý³ý
5
ý³ý
4
ý³ý
3
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2
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1
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0
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Write
³ АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
Figure 3-12. DAC0 High Byte Output Register._________________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
DAC0HI Output Register.
ээээээээээээээээээ³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
ý³ý
BITý5
ý³ý
BITý4
ý³ý
BITý3
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BITý2
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BITý1
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BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021B
³ý
ýý³ý
ýý³ý
ýý³ý
ýý³ý
DAC0
ýý³ý
DAC0
ýý³ý
DAC0
ýý³
DAC0
ý³
³ý
Hex
³ý
not
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not
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not
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not
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11
ý³ý
10
ý³ý
9
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8
ý³
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used
ý³ý
used
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ý³ý
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ý³
Write
³ АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
The DAC1 D/A Converter Output Registers.______________________________________
Write Only__________
The DAC1 D/A Converter takes a 12 bit value that is the digital representation of the required analogue output voltage. This 12 bit value is written to two adjacent 8 bit, write only, registers. The lower 8 bits of the 12 bit value are written to the DAC0LO register. The upper 4 bits of the 12 bit value are written to lower most 4 bits of the DAC1HI register. The upper
Chapter 3 Page 63
Page 73
AD1200 Reference Register Map
most 4 bits written to the DAC1HI register are "don’t care" bits but should always be set to 0 for compatibility with 16 bit D/A software and data formats.
The DAC1HI and DAC1LO registers are WRITE ONLY, data cannot be read back from them, instead a read of these registers returns garbage since there is no corresponding read registers at these addresses.
The DAC data is in the form of right justified offset binary, ie a value of 000hex gives the lowest output voltage whilst a value of FFFhex gives the highest output voltage.
The value to write to the 12 bit D/A converter to obtain any particular output voltage, DACVOLT, is obtained by:-
DAC1HI= DAC1DATA / 256 DAC1LO= DAC1DATA MOD 256 remainder function
For Unipolar signals, ie 0 to +FULL_SCALE_VOLTS, the actual 12 bit DAC1DATA value is obtained from:­DAC1DATA= (DACVOLT *4096 ) /FULL_SCALE_VOLTS
For Bipolar signals, ie -FULL_SCALE_VOLTS to +FULL_SCALE_VOLTS, the actual 12 bit DAC1DATA value is obtained from:-
DAC1DATA=
( DACVOLT*2048 / FULL_SCALE_VOLTAGE ) + 2048
Page 64 Chapter 3
Page 74
Register Map AD1200 Reference
Figure 3-13. DAC1 Low Byte Output Register.________________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
DAC1LO Output Register.
ээээээээээээээээээ³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
ý³ý
BITý5
ý³ý
BITý4
ý³ý
BITý3
ý³ý
BITý2
ý³ý
BITý1
ý³ý
BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021C
³ý
DAC1
ýý³ý
DAC1
ýý³ý
DAC1
ýý³ý
DAC1
ýý³ý
DAC1
ýý³ý
DAC1
ýý³ý
DAC1
ýý³
DAC1
ý³
³ý
Hex
³ý
7
ý³ý
6
ý³ý
5
ý³ý
4
ý³ý
3
ý³ý
2
ý³ý
1
ý³ý
0
ý³
³ýýýý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³
Write
³ АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
Figure 3-14. DAC1 High Byte Output Register._________________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
DAC1HI Output Register.
ээээээээээээээээээ³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
ý³ý
BITý5
ý³ý
BITý4
ý³ý
BITý3
ý³ý
BITý2
ý³ý
BITý1
ý³ý
BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021D
³ý
ýý³ý
ýý³ý
ýý³ý
ýý³ý
DAC1
ýý³ý
DAC1
ýý³ý
DAC1
ýý³
DAC1
ý³
³ý
Hex
³ý
not
ý³ý
not
ý³ý
not
ý³ý
not
ý³ý
11
ý³ý
10
ý³ý
9
ý³ý
8
ý³
³ýýýý³ý
used
ý³ý
used
ý³ý
used
ý³ý
used
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³
Write
³ АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
The Digital Output Port Register. Write Only_____________________________ __________
The Digital Output Port Register, DIGOUT, is an 8 bit write only register. The bit values written correspond exactly with the on/off logic state of the 8 TTL output lines. Thus bits set true force the corresponding DIGOUT line high, those bits set false force the DIGOUT line low.
Figure 3-15. DIGOUT Output Register.__________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
DIGOUT Digital Output Port Register.
ээээээээээээээээ
ýý³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
ý³ý
BITý5
ý³ý
BITý4
ý³ý
BITý3
ý³ý
BITý2
ý³ý
BITý1
ý³ý
BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021E³ DIGOUT³ DIGOUT³ DIGOUT³ DIGOUT³ DIGOUT³ DIGOUT³ DIGOUT³DIGOUT
³ ³ý
Hex
³ý
7
ý³ý
6
ý³ý
5
ý³ý
4
ý³ý
3
ý³ý
2
ý³ý
1
ý³ý
0
ý³
³ýýýý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³ý
Write
ý³
Write
³ АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
Writing 0FFhex to the DIGOUT register forces all lines high, writing 00hex forces lines low. Writing 01hex forces only DIGOUT bit 0 high, all the rest are low. TTL output logic level low is 0.0 ~0.8 Volts.
Chapter 3 Page 65
Page 75
AD1200 Reference Register Map
TTL output logic level high is 2.4 ~5.0 Volts.
The Digital Input Port Register. Read Only____________________________ __________
The Digital Input Port Register, DIGIN, is an 8 bit read only register. The bit values read represent the logic levels present on the 8 TTL input lines. Thus lines that are high cause the corresponding DIGIN bit to read high, those lines that are low cause the corresponding DIGIN bit to read low. If on reading the DIGIN register a value of 0FFhex is obtained then all the TTL input lines where true. A reading of 00hex means that all lines were low. A reading of 01hex means that only DIGIN line 0 was high, all the rest are low. TTL output logic level low is 0.0 ~0.8 Volts. TTL output logic level high is 2.4 ~5.0 Volts.
Figure 3-16. DIGIN Output Register.________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
DIGIN Digital Input Port Register.
ээээээээээээээээ
ý
ý³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
ý³ý
BITý5
ý³ý
BITý4
ý³ý
BITý3
ý³ý
BITý2
ý³ý
BITý1
ý³ý
BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021E³ DIGIN ³ DIGIN ³ DIGIN ³ DIGIN ³ DIGIN ³ DIGIN ³ DIGIN ³ DIGIN
³ ³ý
Hex
³ý
7
ý³ý
6
ý³ý
5
ý³ý
4
ý³ý
3
ý³ý
2
ý³ý
1
ý³ý
0
ý³
³ýýýý³ý
Read
ý³ý
Read
ý³ý
Read
ý³ý
Read
ý³ý
Read
ý³ý
Read
ý³ý
Read
³ý
Read
ý³
АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
The Timer & Extended Mode Register. Read/ Write__________________________________ ___________
The TIMEREX Register, is an 8 bit read/write register. It is used to select the pacer clock frequency and to select Extended Mode operation on the AD1200 card.
Page 66 Chapter 3
Page 76
Register Map AD1200 Reference
Figure 3-17. TIMEREX Register._____________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
TIMEREX Timer Counter Extended Mode Register.
ý³ ГДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДДДВДДДДДД´ ³
³ý
BITý7
ý³ý
BITý6
ý³ý
BITý5
ý³ý
BITý4
ý³ý
BITý3
ý³ý
BITý2
ý³ý
BITý1
ý³ý
BITý0
³ ГДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДДДЕДДДДДД´ ³
021F³ XMODE ³ XMODE ³ TIMER ³ TIMER ³ TIMER ³ TIMER ³ TIMER ³ TIMER
³ ³ý
Hex
³ý
7
ý³ý
6
ý³ý
5
ý³ý
4
ý³ý
3
ý³ý
2
ý³ý
1
ý³ý
0
ý³
³ýýýý³ý
R/W
ý³ý
R/W
ý³ý
R/W
ý³ý
R/W
ý³ý
R/W
ý³ý
R/W
ý³ý
R/W
ý³ý
R/W
ý³
АДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДДБДДДДДДЩ
Bits 0-5, TIMER Pacer Clock Divisor Bits. Read/Write._____________________________________ ___________
The lower 6 bits of the TIMEREX register, TIMER 0-5, are used to select the pacer clock frequency. The bit pattern written selects the divisor factor applied to the fundamental frequency, as given in the following table. The source of the fundamental clock frequency is either the on board 600kHz oscillator or a user supplied external clock and is chosen by the MODE 0 & 1 bits in the ADCSR register. When strobing the A/D converter do not choose pacer clock frequencies above the maximum throughput of the converter. eg 30kHz for AD1211 and AD1221 eg 100kHz for AD1200/01, AD1210 and AD1210
Do not exceed the throughputs of the D/A converters, DAC0 and DAC1, or the Digital i/o port when using pacer clock strobes in the AD1200 cards Extended Modes. eg 100kHz for AD1200 D/A converters DAC0 or DAC1 eg 1MHz for AD1200 Digital Input or Output ports
Chapter 3 Page 67
Page 77
AD1200 Reference Register Map
Figure 3-18. Pacer Clock Divisor____________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
TIMEREX Bits 0-5 Pacer Clock Frequency Selection.
ý³ ГДДДДДДДДДДДДДДДДДДДДДДДДДВДДДДДВДДДДДДДДДДДВДДДДДДДДДДДДДДД´ ³
TIMER Bit Pattern
ý³
Hex ³ Base
³
Frequency Of
³
ГДДДДДДДДДДДДДДДДДДДДДДДДД´
³ Frequency
³
On Board
³
³ý
5 4 3 2 1 0
³
Value³ Divisor
³
Oscillator Hz
³ ГДДДДДДДДДДДДДДДДДДДДДДДДДЕДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДД´ ³ýý
0 0 ý0 0 0 0
ýý³
00
ý³ ý
ý1
³ý
600k
ý ý³
³ýý
0 0 ý0 0 0 1
ýý³
01
ý³ ý
10
³ý
60k
ý ý³
³ýý
0 0 ý0 0 1 0
ýý³
02
ý³ ý
100
³ý
6k
ý ý³
³ýý
0 0 ý0 0 1 1
ýý³
03
ý³ ý
1000
³ý
600
ýý³
³
ý0 0 ý0 1 0 0
ýý³
04
ý³ ý
10000
³ý
60
ýý³
³ýý
0 0 ý0 1 0 1
ýý³
05
ý³ ý
100000
³ý
6
ýý³
³ýý
0 0 ý0 1 1 0
ýý³
06
ý³ ý
1000000
³ý
0.6
ýý³
³ýý
0 0 ý0 1 1 1
ýý³
07
ý³
10000000
³ý
0.06
ýý³
³ýý
0 0 ý1 0 0 0
ýý³
08
ý³ ý
10
³ý
60k
ý ý³
³ýý
0 0 ý1 0 0 1
ýý³
09
ý³ ý
100
³ý
6k
ý ý³
³ýý
0 0 ý1 0 1 0
ýý³
0A
ý³ ý
1000
³ý
600
ý ý³
³ýý
0 0 ý1 0 1 1
ýý³
0B
ý³ ý
10000
³ý
60
ý ý³
³ýý
0 0 ý1 1 0 0
ýý³
0C
ý³ ý
100000
³ý
6
ý ý³
³ýý
0 0 1 1 0 1
ýý³
0D
ý³ ý
1000000
³ý
0.6
ý ý³
³ýý
0 0 ý1 1 1 0
ýý³
0E
ý³
10000000
³ý
0.06
ý ý³
³ýý
0 0 ý1 1 1 1
ýý³
0F
ý³
100000000
³ý
0.006
ý ý³ ГДДДДДДДДДДДДДДДДДДДДДДДДДЕДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДД´ ³ýý
0 1 ý0 0 0 0
ýý³
10
ý³ ý
ý2
³ý
300k
ý ý³ ³ýý
0 1 ý0 0 0 1
ýý³
11
ý³ ý
20
³ý
30k
ý ý³ ³ýý
0 1 ý0 0 1 0
ýý³
12
ý³ ý
200
³ý
3k
ý ý³ ³ýý
0 1 ý0 0 1 1
ýý³
13
ý³ ý
2000
³ý
300
ýý³
³
ý0 1 ý0 1 0 0
ýý³
14
ý³ ý
20000
³ý
30
ýý³
³ýý
0 1 ý0 1 0 1
ýý³
15
ý³ ý
200000
³ý
3
ýý³
³ýý
0 1 ý0 1 1 0
ýý³
16
ý³ ý
2000000
³ý
0.3
ýý³
³ýý
0 1 ý0 1 1 1
ýý³
17
ý³
20000000
³ý
0.03
ýý³
³ýý
0 1 ý1 0 0 0
ýý³
18
ý³ ý
3
³ý
200k
ý ý³ ³ýý
0 1 ý1 0 0 1
ýý³
19
ý³ ý
30
³ý
20k
ý ý³ ³ýý
0 1 ý1 0 1 0
ýý³
1A
ý³ ý
300
³ý
2k
ý ý³ ³ýý
0 1 ý1 0 1 1
ýý³
1B
ý³ ý
3000
³ý
200
ý ý³ ³ýý
0 1 ý1 1 0 0
ýý³
1C
ý³
ý 30000
³ý
20
ý ý³ ³ýý
0 1 1 1 0 1
ýý³
1D
ý³
ý300000
³ý
2
ý ý³ ³ýý
0 1 ý1 1 1 0
ýý³
1E
ý³
3000000
³ý
0.2
ý ý³ ³ýý
0 1 ý1 1 1 1
ýý³
1F
ý³
30000000
³ý
0.02
ý ý³ АДДДДДДДДДДДДДДДДДДДДДДДДДБДДДДДБДДДДДДДДДДДБДДДДДДДДДДДДДДДЩ
p.t.o.
Page 68 Chapter 3
Page 78
Register Map AD1200 Reference
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
TIMEREX Bits 0-5 Pacer Clock Frequency Selection.
ý³ ГДДДДДДДДДДДДДДДДДДДДДДДДДВДДДДДВДДДДДДДДДДДВДДДДДДДДДДДДДДД´ ³
TIMER Bit Pattern
ý³
Hex ³ Base
³
Frequency Of
³
ГДДДДДДДДДДДДДДДДДДДДДДДДД´
³ Frequency
³
On Board
³
³ý
5 4 3 2 1 0
³
Value³ Divisor
³
Oscillator Hz
³ ГДДДДДДДДДДДДДДДДДДДДДДДДДЕДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДД´ ³ýý
1 0 ý0 0 0 0
ýý³
20
ý³ ý
ý4
³ý
150k
ý ý³
³ýý
1 0 ý0 0 0 1
ýý³
21
ý³ ý
40
³ý
15k
ý ý³
³ýý
1 0 ý0 0 1 0
ýý³
22
ý³ ý
400
³ý
1500
ý ý³
³ýý
1 0 ý0 0 1 1
ýý³
23
ý³ ý
4000
³ý
150
ýý³
³
ý1 0 ý0 1 0 0
ýý³
24
ý³ ý
40000
³ý
15
ýý³
³ýý
1 0 ý0 1 0 1
ýý³
25
ý³ ý
400000
³ý
1.5
ýý³
³ýý
1 0 ý0 1 1 0
ýý³
26
ý³ ý
4000000
³ý
0.15
ýý³
³ýý
1 0 ý0 1 1 1
ýý³
27
ý³
40000000
³ý
0.015
ýý³
³ýý
1 0 ý1 0 0 0
ýý³
28
ý³ ý
5
³ý
120k
ý ý³
³ýý
1 0 ý1 0 0 1
ýý³
29
ý³ ý
50
³ý
12k
ý ý³
³ýý
1 0 ý1 0 1 0
ýý³
2A
ý³ ý
500
³ý
1200
ý ý³
³ýý
1 0 ý1 0 1 1
ýý³
2B
ý³ ý
5000
³ý
120
ý ý³
³ýý
1 0 ý1 1 0 0
ýý³
2C
ý³ ý
50000
³ý
12
ý ý³
³ýý
1 0 1 1 0 1
ýý³
2D
ý³
ý500000
³ý
1.2
ý ý³
³ýý
1 0 ý1 1 1 0
ýý³
2E
ý³
5000000
³ý
0.12
ý ý³
³ýý
1 0 ý1 1 1 1
ýý³
2F
ý³
50000000
³ý
0.012
ý ý³ ГДДДДДДДДДДДДДДДДДДДДДДДДДЕДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДД´ ³ýý
1 1 ý0 0 0 0
ýý³
30
ý³ ý
ý6
³ý
100k
ý ý³ ³ýý
1 1 ý0 0 0 1
ýý³
31
ý³ ý
60
³ý
10k
ý ý³ ³ýý
1 1 ý0 0 1 0
ýý³
32
ý³ ý
600
³ý
1k
ý ý³ ³ýý
1 1 ý0 0 1 1
ýý³
33
ý³ ý
6000
³ý
100
ýý³
³
ý1 1 ý0 1 0 0
ýý³
34
ý³ ý
60000
³ý
10
ýý³
³ýý
1 1 ý0 1 0 1
ýý³
35
ý³ ý
600000
³ý
1
ýý³
³ýý
1 1 ý0 1 1 0
ýý³
36
ý³ ý
6000000
³ý
0.1
ýý³
³ýý
1 1 ý0 1 1 1
ýý³
37
ý³
60000000
³ý
0.01
ýý³
³ýý
1 1 ý1 0 0 0
ýý³
38
ý³ ý
12
³ý
50k
ý ý³ ³ýý
1 1 ý1 0 0 1
ýý³
39
ý³ ý
120
³ý
5k
ý ý³ ³ýý
1 1 ý1 0 1 0
ýý³
3A
ý³ ý
1200
³ý
500
ý ý³ ³ýý
1 1 ý1 0 1 1
ýý³
3B
ý³ ý
12000
³ý
50
ý ý³ ³ýý
1 1 ý1 1 0 0
ýý³
3C
ý³ ý
120000
³ý
5
ý ý³ ³ýý
1 1 1 1 0 1
ýý³
3D
ý³ ý
1200000
³ý
0.5
ý ý³ ³ýý
1 1 ý1 1 1 0
ýý³
3E
ý³
12000000
³ý
0.05
ý ý³ ³ýý
1 1 ý1 1 1 1
ýý³
3F
ý³
120000000
³ý
0.005
ý ý³ ³ýýýý
ý
ý³
ýý³
ýý
ý³
ý³
АДДДДДДДДДДДДДДДДДДДДДДДДДБДДДДДБДДДДДДДДДДДБДДДДДДДДДДДДДДДЩ
Bits 6 & 7 XMODE, Extended Mode Read/Write.________________________________ ___________
For AD1200 card only the top 2 bits of the TIMEREX register, XMODE 6 & 7, in conjunction with MODE 0 & 1 bits in the ADCSR, determine which port is paced by the clock.
Chapter 3 Page 69
Page 79
AD1200 Reference Register Map
The AD1210-21 cards, with the 8254 counter timer chip on board, uses the TIMER register bits 7 as a method of selecting the 8254 counter timer INSTEAD on the on board 600kHz pacer clock as the source of the A/D converter strobe pulses. Bit 6 has no function and reads back as 0.
Figure 3-19. AD1200 Extended Mode Bits._____________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
AD1200 Card Only TIMER Extended Mode Bits
ý³ ГДДДДДДДВДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
BITý7
ý³ý
BITý6
ý³
Continuous Conversion Performed On
³ ГДДДДДДДЕДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
0
ýý³ý
0
ýý³
A/D Converter Compatible Mode
³ ГДДДДДДДЕДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
0
ýý³ý
1
ýý³
DAC0
³ ГДДДДДДДЕДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
1
ýý³ý
0
ýý³
DAC1
³ ГДДДДДДДЕДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
1
ýý³ý
1
ýý³
DIGITAL I/O PORT
³ АДДДДДДДБДДДДДДДБДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
Figure 3-20. AD1210-21 Extended Mode Bit.______________________________________
ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³эээээ
AD1210-AD1221 TIMER Extended Mode Bits
эээээ
ý ý ý ý ý
ý³ ГДДДДДДДВДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
BITý7
ý³ý
BITý6
эээээ³
A/D Clock Source
³ ГДДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
0
ýý³
Always= 0
ý³
600kHz On Board Pacer Clock
³ ГДДДДДДДЕДДДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³
1
ýý³ý
Always= 0
ý³
8254 Timer Counter
³ АДДДДДДДБДДДДДДДДДДДБДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
The 8254 Counter Timer Registers. Read/ Write_______________________________ ___________
The AD1210-21 cards have an 8254 counter timer chip on board, the base address of the 8254 is 8 byte before 8 registers of the AD card. Thus for an AD1210 card with a base address of 0218hex the 8254 counter timer is at 0210hex. The counter timer occupies only four location, 0210-0213 hex, a shadow or copy of these registers appears at 0214-0217 hex also. This shadow copy of the registers does NOT mean that two counter timers are present on the card.
Page 70 Chapter 3
Page 80
Register Map AD1200 Reference
Figure 3-21. 8254 Counter Timer Register Map._________________________________________
ЪДДДДДДДДДДВДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³
ADDRESS
³ý
DEFAULT
ý³ý
REGISTER
ээээээээээ
ýý³
³
OFFSET
ýýýý³ý
ADDRESS
ý³
эээээээээээ
ээээээээээ
ýý³ ГДДДДДДДДДДЕДДДДДДДДДЕДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´ ³ý
0000ýR/W
ý³ý
0210ýHex³ COUNTER 0 REGISTER
ý
ý³
³ý
0001ýR/W
ý³ý
0211ýHex³ COUNTER 1 REGISTER
³
³ý
0002ýR/W
ý³ý
0212ýHex³ COUNTER 2 REGISTER
ý³
³ý
0003 ýW
ý³ý
0213ýHex³ CONTROL WORD REGISTER WRITE ONLY
ý³
АДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
Counter 0 is not used on the A/D board. Its i/o pins are shared with the digital input port pins 34, 35, 36. Counter 0, counts pulses on the CLK 0 input, pin 24, when the GATE 0 pins is high, pin 35. Its output is via pin 36 of the 50 way IDC connector, provided the OUT VIA PIN 36 jumper pin as been set. A CLK pulse is defined as a rising edge, then a falling edge, in that order of the CLK input. A trigger pulse is a rising edge on the GATE input. Counters 1 and 2 are dedicated to AD trigger functions, and provided the XMODE bit 7 is set, can be used instead of the Pacer clock as the source of strobes to start conversions on the A/D converter.
Chapter 3 Page 71
Page 81
AD1200 Reference Calibration
CHAPTER 4
CALIBRATION.
Introduction.____________
This chapter describes how to perform a calibration of the AD1200 analogue circuitry. The use of the calibration software, the position and function of the onboard trimmer pots and use of ancillary equipment are all described. Calibration should be performed at regular intervals, at least twice a year, and whenever the input or output ranges are changed, to ensure that the AD1200 remains in specification, and that your analogue measurements are traceable back to nationally and internationally recognised standards.
All AD1200 cards are factory calibrated with Time Electronics calibration equipment, the voltage source is a Time 2003N D.C. Voltage Calibrator, the voltmeter is A Time Electronics 5075 Digital Multimeter. The best on the market.
Note Allow the PC with the AD1200 card, cables, the
voltmeter and/or the voltage source to warm up and
allow the operating environment temperature to
stabilise before attempting calibration. Provided the
room temperature is stable connect the calibration
equipment together, remove the PC cover and leave the
PC and card to warm up for at least one hour. Do not
expect a successful calibration in a system just turned
on, first thing in a cold office on a winters morning.
Calibrating The Digital To Analogue Output._______________________________________
There are two analogue outputs on the AD1200 card, DAC0 and DAC1, each must be calibrated separately.
Page 72 Chapter 4
Page 82
Calibration AD1200 Reference Outline._______
The calibration is simple. It consists of only two steps.
i) Set the D/A converter to its LOWEST output, then using
an accurate voltmeter check the output voltage, adjust the OFFSET trim potentiometer to get the desired value.
ii) Set the D/A converter to its HIGHEST output, then using
an accurate voltmeter check the output voltage, adjust the GAIN trim potentiometer to get the desired value.
Provided the calibration is performed in the correct order, OFFSET adjust then GAIN adjust, there should be no interaction between the two adjustments.
Equipment Required.___________________
A digital voltmeter capable of a stable and clear resolution of 1/10th of LSB at both ends of the range of the converter. Thus the voltmeter should have a range of -10 to +10 volts and a resolution of 1.22mV/10 = 122uV or better.
Figure 4-1. DAC Trimmer Pot Layout.__________________________________
ÚÄÄÄ
DAC1
ÄÄÄ¿ ÚÄÄÄ
DAC0
ÄÄÄ¿
UNIOFFSET UNIOFFSET
³
BPOFFSET
³
BPOFFSET
³³
GAIN
³³
GAIN
ææ
æææ
æ ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³ÚÁ¿ ÚÁ¿ÚÁ¿ ÚÁ¿ ÚÁ¿ÚÁ¿
³ÚÄ
³³
³³
³³ ³³
³³
³³ ³
³³ ³ÀÄÙ АДЩАДЩ ÀÄÙ АДЩАДЩ ÚÄij³Ä¿ ³
POT9 POT7 POT6 POT4
³³³
³
POT8 POT5
³³³ ³ ³³³ ³
³³³ ³
³³³ ³ ³³³ ³ ³³³ ³
³³³ ³
ÀÄij³ÄÙ АДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ÚÄÄÙ³
АДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ ³
Chapter 4 Page 73
Page 83
AD1200 Reference Calibration
DAC0 Calibration Procedure.__________________________
i) Set up the DAC0 output jumpers for the output range
required, make a note of the output range.
ii) Using leads as short as possible connect up the digital
voltmeter as in Figure 4-2
iii) Set DAC0 to its LOWEST output value by writing the
digital code 000 hex to the converter.
iv) Using Figure 4-3 determine the ideal output voltage for the
000 hex input code, the 1/10 LSB value is the precision required. This is the OFFSET adjustment. For BIPOLAR ranges adjust trim pot 5 for minus full scale value. eg for range -5 to +5 bipolar the ideal offset voltage is -5.0000 Volts +/- 0.0002 Volt. For UNIPOLAR ranges adjust trim pot 6 for zero volts. eg for range 0 to +5 unipolar the ideal offset voltage is
0.0000 Volts +/- 0.0001 Volt.
v) Set DAC0 to its HIGHEST output value by writing the
digital code FFF hex to the converter.
vi) Using Figure 4-3 determine the ideal output voltage for the
FFF hex input code, the 1/10 LSB value is the precision required. This is the GAIN adjustment. Adjust trim pot 4 for maximum positive output voltage. eg for range -5 to +5 bipolar the ideal full scale voltage is +4.9987 Volts +/- 0.0002 Volt. eg for range 0 to +5 unipolar the ideal full scale voltage is +4.9987 Volts +/- 0.0001 Volt.
Page 74 Chapter 4
Page 84
Calibration AD1200 Reference
Figure 4-2. DAC0 Calibration Wiring Diagram._________________________________________
ДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ЪДДДДДДДДДДДД¿
³ÚÄÄ
³
DIGITAL VOLT
³
³³ ³
METER
³
ÚÄij³Ä¿ ³
ЪДДДДДДДД¿
³
³
³³ ³ АДДДДДДДДЩ
³
³
³³ ³
+ve -ve
³
³
³³
Pin 22
АДДВДДДДДДВДДЩ
DAC0 OUTPUT
ДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
³
³
³³
³
DAC0 GROUND
ДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
³
³³
Pin 23
³ ³³ ³
³³
ÀÄij³ÄÙ
ÄÄÄÄ¿ ÚÄÄÙ³
АДДДДДДДДДДДДДДДДДДДДДДДДДЩ
³
Figure 4-3. DAC Calibration Values.________________________________
ЪДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³
³
ANALOGUE OUTPUT RANGE
³
³
DIGITAL
ГДДДДДДДДДДДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´
³
OUTPUT ³ UNIPOLAR
³
BIPOLAR
³
³
CODE
ГДДДДДДДДДДВДДДДДДДДДДЕДДДДДДДДДДВДДДДДДДДДДВДДДДДДДДДД´
³
³ 0 to +5V ³ 0 to +10V³ +/-2.5V ³ +/-5V ³ +/-10V
³ ГДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДД´ ³
FFF hex ³ +4.9987V ³ +9.9976V ³ +2.4987V ³ +4.9987V ³ +9.9951V
³ ³
000 hex ³ 0.0000V ³ 0.0000V ³ -2.5000V ³ -5.0000V ³-10.0000V
³ ³
1 LSB ³ 1.22mV ³ 2.44mV ³ 1.22mV ³ 2.44mV ³ 4.88mV
³ ³
1/10LSB ³ 0.122mV ³ 0.244mV ³ 0.122mV ³ 0.244mV ³ 0.488mV
³ ³
1/10LSB ³ 0.0001V ³ 0.0002V ³ 0.0001V ³ 0.0002V ³ 0.0005V
³ АДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДЩ
DAC1 Calibration Procedure.__________________________
i) Set up the DAC1 output jumpers for the output range
required, make a note of the output range.
ii) Using leads as short as possible connect up the digital
voltmeter as in Figure 4-4
iii) Set DAC1 to its LOWEST output value by writing the
digital code 000 hex to the converter.
iv) Using Figure 4-3 determine the ideal output voltage for the
000 hex input code, the 1/10 LSB value is the precision
Chapter 4 Page 75
Page 85
AD1200 Reference Calibration
required. This is the OFFSET adjustment. For BIPOLAR ranges adjust trim pot 8 for minus full scale value. eg for range -5 to +5 bipolar the ideal offset voltage is -5.0000 Volts +/- 0.0002 Volt. For UNIPOLAR ranges adjust trim pot 9 for zero volts. eg for range 0 to +5 unipolar the ideal offset voltage is
0.0000 Volts +/- 0.0001 Volt.
v) Set DAC1 to its HIGHEST output value by writing the
digital code FFF hex to the converter.
vi) Using Figure 4-3 determine the ideal output voltage for the
FFF hex input code, the 1/10 LSB value is the precision required. This is the GAIN adjustment. Adjust trim pot 7 for maximum positive output voltage. eg for range -5 to +5 bipolar the ideal full scale voltage is +4.9987 Volts +/- 0.0002 Volt. eg for range 0 to +5 unipolar the ideal full scale voltage is +4.9987 Volts +/- 0.0001 Volt.
Figure 4-4. DAC1 Calibration Wiring Diagram._________________________________________
ДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ЪДДДДДДДДДДДД¿
³ÚÄÄ
³
DIGITAL VOLT
³
³³ ³
METER
³
ÚÄij³Ä¿ ³
ЪДДДДДДДД¿
³
³
³³ ³ АДДДДДДДДЩ
³
³
³³ ³
+ve -ve
³
³
³³
Pin 24
АДДВДДДДДДВДДЩ
DAC1 OUTPUT
ДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
³
³
³³
³
DAC1 GROUND
ДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ
³
³³
Pin 25
³ ³³ ³
³³
ÀÄij³ÄÙ
ÄÄÄÄ¿ ÚÄÄÙ³
АДДДДДДДДДДДДДДДДДДДДДДДДДЩ
³
Page 76 Chapter 4
Page 86
Calibration AD1200 Reference
Calibrating The Analogue To Digital Input.______________________________________
There is only one analogue to digital converter on the AD1200 card. The 8 or 16 channels of analogue input are provided by using a multiplexer to switch one of the possible inputs to the ADS774/574 chip, thus the calibration need only be performed on one input channel. This section assumes that channel one has been chosen.
Figure 4-5. ADC Trimmer Pot Layout.__________________________________
ÚÄÄÄ
ADC
ÄÄÄ¿
GAIN
³
BPOFFSET
³ ³
UNIOFFSET
æ ææ ЪДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³ ÚÁ¿ÚÁ¿
ÚÁ¿
³ÚÄ
³³
³³ ³ ³ ³³³
³ АДЩАДЩ
ÀÄÙ ÚÄij³Ä¿
³
POT3 POT1
³³³
³
POT2
³³³ ³ ³³³ ³
NOTE THESE POTS ARE IN A DIFFERENT
³³³ ³
ORDER ON PREVIOUS VERSIONS OF THESE
³³³ ³
CARDS
³³³ ³
AD1200 PRIOR TO REV 5
³³³ ³
AD1210 PRIOR TO REV 4
³³³ ³
AD1200 PRIOR TO REV 4
ÀÄij³ÄÙ АДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ÚÄÄÙ³
АДДДДДДДДДДДДДДДДДДДДДДДДДДДДДЩ ³
Outline._______
The calibration is simple. It consists of only two steps.
i) Using a precision voltage source set the input voltage
precisely at 1/2 LSB above the "all bits off" specified input. Then adjust the OFFSET trim potentiometer to so that the converter just switches in its LSB. IE the ADC input switches from 0000 0000 0001 to 0000 0000 0000 binary, 01 to 00 hex.
ii) Using a precision voltage source set the input voltage
precisely at 1/2 LSB less than the "all bits on" specified input. Then adjust the GAIN trim potentiometer so that the converter just switches in its LSB. IE the ADC input switches from 1111 1111 1110 to 1111 1111 1111 binary,
Chapter 4 Page 77
Page 87
AD1200 Reference Calibration
FE to FF hex.
Provided the calibration is performed in the correct order, OFFSET adjust then GAIN adjust, there should be no interaction between the two adjustments.
Equipment Required.___________________
A precision voltage source capable of a stable output and resolution of 1/10th of LSB at both ends of the range of the converter . Thus the voltage source should have a range of -5 to +10 volts and a resolution of 1.22mV/10 = 122uV or better.
Figure 4-6. ADC Calibration Wiring Diagram.________________________________________
ЪДДДДДДДДДДДД¿ ³
PRECISION
³
ДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³
VOLT SOURCE
³
³ÚÄÄ ³
ЪДДДДДДДД¿
³
³³ ³
АДДДДДДДДЩ
³
ÚÄij³Ä¿ ³
+ve -ve
³
³
³³
Pin
АДДВДДДДДДВДДЩ
CH0 INPUT
ДДДДДДДДДДДДДД±±±ДДДДДДДДДДДДДЩ
³
³
³³
Pin
³
CH8 ( =CH0 RET) INPUT
ДДДДДДДДДДДДДД±±±ДВДДДДДДДДДДДДДДДДДДЩ
³
³³
³
CH1-CH7, CH9-CH15
ДДДДДДДДДДДДДД¿
³
³
³³
³
³
AGND
ДДДДДДДДДДДДДДБДД±±±Д´
³
³³
³
AMP LO
ДДДДДДДДДДДДДДДДД±±±ДЩ
ÀÄij³ÄÙ
ÄÄÄÄ¿ ÚÄÄÙ³
АДДДДДДДДДДДДДДДДДДДДДДДДДЩ
³
ADC Calibration Procedure._________________________
i) Set up the ADC input jumpers for the input range required,
make a note of the input range.
ii) Using leads as short as possible connect up the digital
voltmeter as in Figure 4-5
iii) Using Figures 4-7 & 4-8 determine the precision voltage
source output for the 1/2 LSB code above that producing the 000 hex output code, the 000+1/2LSB value.
Page 78 Chapter 4
Page 88
Calibration AD1200 Reference
iv) Adjust the OFFSET trimpot so that the input code from the
A/D converter flickers evenly between 00hex and 01hex. This is the OFFSET adjustment. For BIPOLAR ranges adjust trim pot 2 for 00hex to 01hex transition. eg for range -5 to +5 bipolar the 000+1/2LSB voltage is -4.9988 Volt. For UNIPOLAR ranges adjust trim pot 1 for 00hex to 01hex transition. eg for range 0 to +5 unipolar the 000+1/2LSB voltage is 610 uVolt.
v) Using Figures 4-7 & 4-8 determine the precision voltage
source output for the 1 1/2 LSB code below FSR, the Full Scale Reading, the FSR-1.5LSB value.
vi) Adjust the GAIN trimpot so that the input code from the
A/D converter flickers evenly between FEhex and FFhex. This is the GAIN adjustment. Adjust trim pot 3 for for FEhex to FFhex transition. eg for range -5 to +5 bipolar the FSR-1.5LSB value is +4.9963 Volts. eg for range 0 to +5 unipolar the FSR-1.5LSB value is +4.9982 Volts.
Figure 4-7. Unipolar ADC Calibration Values.________________________________________
ЪДДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³
³
ANALOGUE INPUT RANGE
³
³
DIGITAL
ГДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´
³
OUTPUT
³
UNIPOLAR
³
³
CODE
ГДДДДДДДДДДВДДДДДДДДДДВДДДДДДДДДДВДДДДДДДДДД´
³
³
0 to 1.25³ 0 to+2.5V³ 0 to +5V ³ 0 to +10V
³ ГДДДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДД´ ³
FSR
³
+1.2500V ³ +2.5000V ³ +5.0000V ³+10.0000V
³ ³
FSR-1LSB
³
+1.2497V ³ +2.4994V ³ +4.9988V ³ +9.9976V
³ ³
FSR-1.5LSB
³
+1.2495V ³ +2.4991V ³ +4.9982V ³ +9.9963V
³ ГДДДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДД´ ³
000 hex
³
0.0000V ³ 0.0000V ³ 0.0000V ³ 0.0000V
³ ³
1 LSB
³
0.305mV ³ 0.61mV ³ 1.22mV ³ 2.44mV
³ ³
1/2 LSB
³
0.153mV ³ 0.305mV ³ 0.61mV ³ 1.22mV
³ ³
000+1/2LSB
³
153uV ³ 305uV ³ 610uV ³ 1220uV
³ АДДДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДЩ
Chapter 4 Page 79
Page 89
AD1200 Reference Calibration
Figure 4-8. Bipolar ADC Calibration Values._______________________________________
ЪДДДДДДДДДДДДВДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД¿ ³
³
ANALOGUE INPUT RANGE
³
³
DIGITAL
ГДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДДД´
³
OUTPUT
³
BIPOLAR
³
³
CODE
ГДДДДДДДДДДВДДДДДДДДДДВДДДДДДДДДДВДДДДДДДДДДВДДДДДДДДДД´
³
³
+/-0.625V³ +/-1.25V ³ +/-2.5V ³ +/-5V ³ +/-10V
³ ГДДДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДД´ ³
FSR
³
+0.6250V ³ +1.2500V ³ +2.5000V ³ +5.0000V ³+10.0000V
³ ³
FSR-1LSB
³
+0.6247V ³ +1.2494V ³ +2.4988V ³ +4.9976V ³ +9.9951V
³ ³
FSR-1.5LSB
³
+0.6245V ³ +1.2491V ³ +2.4982V ³ +4.9963V ³ +9.9927V
³ ГДДДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДДЕДДДДДДДДДД´ ³
000 hex
³
-0.6250V ³ -1.2500V ³ -2.5000V ³ -5.0000V ³-10.0000V
³ ³
1 LSB
³
0.305mV ³ 0.610mV ³ 1.22mV ³ 2.44mV ³ 4.88mV
³ ³
1/2 LSB
³
0.153mV ³ 0.305mV ³ 0.61mV ³ 1.22mV ³ 2.44mV
³ ³
000+1/2LSB
³
-0.6249V ³ -1.2497V ³ -2.4994V ³ -4.9988V ³ -9.9976V
³ АДДДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДБДДДДДДДДДДЩ
Page 80 Chapter 4
Page 90
Technical Specification AD1200 Reference
CHAPTER 5
TECHNICAL
SPECIFICATION.
Introduction.____________
This chapter gives the complete technical specification for
the AD1200 range of cards.
Analogue Inputs._______________
Input Impedance On Channel 100M Ohms, 100pF.
Off Channel 100M Ohms, 10pF. Maximum Common Mode Input Voltage 11V Common Mode 80 dB at 60Hz, gain of 1. Rejection Ratio 120 dB at 60Hz, gain of 1000. Maximum Input Voltage ±30V power on
±30V power on Resolution 12 bits Nonlinearity less than 1/2 LSB Differential nonlinearity less than 1/2 LSB Quantised Uncertainty ± 1/2 LSB Offset drift 10 ppm/degree C Gain drift 30 ppm/degree C Offset Error Adjustable to zero Gain Error Adjustable to zero
Input Channels 16 Single Ended (jumper OR 8 Differential
selectable) OR 16 Pseudo Diff
Channel Select Programmable Bipolar Input ±5Volt, ±2.5Volt Unipolar Input 0~10Volt, 0~5Volt
Chapter 5 Page 81
Page 91
AD1200 Reference Technical Specification
Throughput 30kHz AD1221, AD1211.
100kHz AD1220, AD1210 & AD1200 gains 1-2-4-8-10-100. 800kHz AD1220, AD1210 and AD1200 gain 1000.
Conversion Time 25uS AD1221, AD1211.
8.5uS AD1220, AD1210 & AD1200
System Accuracy ± 0.03% Gain=1
± 0.035% Gain=2 ± 0.04% Gain=4 ± 0.05% Gain=8 ± 0.05% Gain=10 ± 0.07% Gain=100 ± 0.10% Gain=1000
Monotonicity 0 to 70 degree C
Analog Outputs______________
Resolution 12 bits Bipolar Output ±10V, ±5V, ±2.5V Unipolar Output 0~10Volt, 0~5Volt Nonlinearity less than 1/4 LSB Differential nonlinearity less than 1/2 LSB Quantised Uncertainty ± 1/2 LSB Offset drift ±5 ppm/degree C Gain drift ±2 ppm/degree C Offset Error Adjustable to zero Gain Error Adjustable to zero Settling Time to 0.01% 3 microseconds Throughput 100kHz per DAC System Accuracy 0.025% Monotonicity 0 to 70 degree C
Digital I/O__________
TTL output 8 bit TTL input 8 bit
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Technical Specification AD1200 Reference
Throughput 1MHz Fan in 1 LS load Fan out 10 LS loads
Pacer Clock.___________
Pacer Clock 0.005Hz-600kHz Divisor 1 to 120,000,000 External Clock TTL compatible. DC to 1Mhz. External Trigger TTL compatible, active on negative
edge.
Power Consumption.__________________
+5 Volts ±5% 500 milli Amp 2.5 Watt +12 Volts ±5% 50 milli Amp 0.6 Watt
-12 Volts ±5% 40 milli Amp 0.5 Watt Dimensions. 4.2 x 8.8 inches.
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Index AD1200 Reference
Index.______
+12/-12.............................47, 83
12 bit.................................2, 4, 7, 10, 11, 20, 60, 61, 62, 63, 64
16 bit.................................7, 24, 43, 45, 62, 64
4-20mA.............................22, 23
8 bit...................................2, 7, 21, 24, 45, 60, 62, 63, 65, 66, 82
A/D control status reg.......16, 17, 18, 19, 20, 21, 51, 52, 53, 56
A/D Done.........................2, 5, 12-13, 17-19, 53, 55, 57, 61, 62
A/D error..........................15, 52, 53, 54, 55, 57
A/D gain channel reg........10, 11, 17, 18, 19, 58
A/D modes........................17
A/D strobes.......................18, 19, 54
Accuracy...........................82
Ad1200 card.....................1, 3, 5, 10, 14, 17-21, 24, 25, 26, 27,
33, 34, 35, 36, 37, 38, 39, 40, 45, 47,
48, 49, 50, 54, 55, 56, 66, 69, 72, 77
AD1200L..........................4
AD1210............................1-4, 14-15, 26, 41, 43, 54, 67, 70, 77
AD1211............................1, 3, 14, 15, 26, 41, 43, 54, 67, 82
AD1220............................1, 3, 11, 14-15, 26, 42-43, 54, 58-59,82
AD1221............................1-3, 11, 14-15, 26, 42-43, 54, 58-59,
67, 82
Adapter.............................28, 29
ADC..................................17, 22, 25, 26, 37, 38, 39, 40, 41, 42,
53, 54, 56, 61, 62, 77, 78, 79, 80
ADCHI.............................12-13, 15, 17-19, 51, 54, 57, 60-62
ADCLO............................12, 13, 15, 17, 18, 19, 51, 54, 60, 61
ADCSR.............................16-22, 51-54, 56, 57, 62, 67, 69
ADGCR............................10-11, 16-20, 22, 51, 52, 56, 58, 59
Adjustment.......................74, 76, 79
AGND..............................9, 47, 48, 49, 50, 78
Analogue ground..............9, 47, 48, 49, 50
Analogue output...............7, 20, 22, 47, 49, 61-63, 72, 75
Aperture............................45
ATB..................................22, 23
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AD1200 Reference Index
Base address.....................27, 29, 70
Binary...............................28, 61, 62, 64, 77
Bipolar..............................2, 5, 8, 10, 20, 25-26, 37-42, 61, 63,
64, 74-76, 79-82
Bit weights........................8
Bits....................................6-8, 12, 16-22, 52-53, 55-60, 62-65,
67, 68, 69, 70, 77, 81, 82
Cable.................................22, 23, 46, 47
Cables...............................9, 23, 46, 49, 72
Calibration........................37, 42, 72-80
Channel select...................2, 58, 59, 60, 81
Clear error.........................53
Clock divisor....................18, 19, 67, 68
Connection........................49
Connectors........................49
Continuous conversion.....17, 57, 70
D/A converter...................4, 14, 20, 47, 52, 61, 62, 63, 64, 73
DAC0................................5, 17, 20, 25-26, 37, 46-52, 54-57, 61,
62, 63, 67, 70, 72, 73, 74, 75
DAC0 ground...................46, 47, 49
DAC0HI...........................62
DAC0LO..........................62, 63
DAC1................................5, 17, 20, 25-26, 37, 46-52, 54-57, 63,
65, 67, 70, 72, 73, 75, 76
DAC1 ground...................46, 47, 49
DAC1HI...........................52, 63, 64
DAC1LO..........................52, 64
Differential.......................2, 8-10, 38, 39, 47, 49, 50, 60, 81, 82
DIGIN...............................17, 22, 66
Digital i/o..........................2, 17, 21-22, 34, 51, 56, 57, 67, 70, 82
Digital input......................4, 20-21, 24, 43, 48-49, 52, 66-67, 71,
77
Digital output....................4, 21, 33, 48, 49, 52, 65
DIGOUT...........................17, 22, 65
Divisor..............................18, 19, 20, 22, 67, 68, 69, 83
DMA.................................1-5, 10, 12-22, 24-25, 27, 33, 35-37,
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Index AD1200 Reference
48, 53, 54, 55, 57
DMA enable.....................16, 36, 53, 54
DMA jumper....................24, 25, 36, 37
DMAJMP.........................36
Drift..................................81, 82
DT2811.............................1, 3, 4, 5, 52
Error..................................9, 15, 52, 53, 54, 55, 57, 81, 82
Extended mode.................17, 20, 51, 55, 56, 57, 66, 67, 69, 70
Extended modes................67
External clock...................2, 16, 19, 21, 22, 46, 48, 56, 67, 83
External trigger.................2, 18, 19, 20, 22, 46, 48, 83
Extreme............................1, 8, 37
Fan in................................83
Fan out..............................83
Frequency.........................14, 18, 19, 20, 22, 48, 66, 67, 68, 69
FSR...................................79, 80
Gain.................................. 1-5, 10-15, 17-19, 26, 38, 40-42, 49-51
58-59, 73, 74, 76, 77, 78, 79, 81, 82
Gain error.........................81, 82
Gain select........................26, 58
Gain trim...........................73, 77
Guarantee..........................29
High byte..........................12, 51, 54, 57, 62, 63, 65
I/o base address.................27
Input ranges......................11, 40, 41, 42
Input voltage.....................10, 11, 12, 38, 39, 50, 58, 59, 77, 81
Interfaces..........................47
Interrupt jumper................25, 34
Interrupt service routine....12, 15, 17, 18, 19, 21, 22
IRQ jumper.......................34, 35
IRQJMP............................34
ISR....................................12, 13
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AD1200 Reference Index
Justified.............................61, 62, 64
Logic level........................65, 66
Low byte...........................12, 51, 61, 63, 65
LSB...................................73, 74, 75, 76, 77, 78, 79, 80, 81, 82
Maximum throughput.......67
Memory............................6, 10, 12, 13, 15, 36
Mode 0..............................16, 17, 56, 58, 67, 69
Mode 1..............................18, 20, 21
Mode 2..............................18
Mode 3..............................19
Mode bit 0.........................55, 56
Mode bit 1.........................55
Monotonicity....................82
Multimeter........................72
Multiplexer.......................10, 11, 14, 77
Noise.................................9, 23, 49
Nonlinearity......................81, 82
Offset................................61-64, 73-74, 76-79, 81, 82
Offset binary.....................61, 62, 64
Offset error.......................81, 82
Offset trim........................73, 77
Oscillator..........................14, 16, 18-19, 21-22, 43, 48, 56, 67-69
Pacer clock........................2, 10, 12-22, 43, 54-58, 66-71, 83
PGA..................................11, 12
Pipeline.............................15
Pipelining..........................14, 15
Polled i/o...........................12
Port...................................4, 17, 21, 28, 35, 43, 48, 51, 52, 55,
56, 57, 65, 66, 67, 69, 70, 71
Power................................14-15, 22, 44, 46-48, 50, 53-56, 59-60,
81, 83 Precision voltage source...77, 78, 79
Problems...........................50
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Index AD1200 Reference
Programmable gain...........1, 2, 3, 4, 5, 10, 11, 14, 49, 50, 58, 59
Programmable gain amp...10, 11, 14, 49, 50, 58
Programmed i/o................10, 12, 14, 17, 18, 19, 20, 21
Pseudo differential............10, 38, 47, 60
Reference..........................1
Register map.....................51, 52, 71
Resolution.........................6, 7, 8, 10, 73, 78, 81, 82
Sample and hold...............9, 58
Sampling A/D...................9
Screw terminal board........22, 23
Settling time......................10, 11, 14, 82
Shielded............................49, 50
Single conversion.............16, 58
Single ended.....................2, 8-10, 25, 38, 39, 47, 49, 50, 60, 81
Strobe................................14, 16-22, 54, 55, 56, 58, 70
Strobes..............................18, 19, 20, 21, 22, 54, 55, 67, 71
Technical..........................81
Temperature......................5, 10, 72
Throughput.......................1, 2, 3, 4, 5, 14, 15, 67, 82, 83
Time Electronics...............72
Timer................................14-21, 26, 28, 31, 43, 51, 55-7, 66-71
TIMEREX........................66, 67, 69
Traceable..........................37, 42, 72
Trigger.............................. 2, 13, 15-16, 18-20, 22, 46, 48, 54, 56,
71, 83
Trimpot.............................79
TTL compatible................14, 21, 48, 83
Twisted pair......................9, 49
Uncertainty.......................81, 82
Unipolar............................2, 5, 8, 10, 20, 37-38, 40-42, 61, 63,
64, 74-76, 79-82
Voltmeter..........................72, 73, 74, 75, 78
Warning............................50
Xmode..............................16, 17, 20, 21, 43, 67, 69, 71
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