AUO G121SN01 V0 Specification

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Spec. No.: MDGD012-SN01-13

Version: 1.3

Total pages: 28

Date: 2006 – Feb. – 23

Product Functional Specifications

12.1” SVGA Color TFT-LCD Module

Model Name: G121SN01 V.0

Approved by Prepared by

Martin Sun Cynthia Lin

GD BD Marketing Division / AU Optronics Croporation

Customer Checked & Approved by

All

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Version: 1.3

Total Pages: 28

Date: 2006/02/23

Product Functional Specification

12.1 inch SVGA Color TFT LCD Module Model Name: G121SN01 V.0

( ) Preliminary Specification

() Final Specification

Note: This Specification is subject to change without notice.

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I. Contents

1.0 Handling Precautions…………………………………………………..…5

2.0 General Description……………………………………………………….6

2.1 Display Characteristics

2.2 Functional Block Diagram

3.0 Absolute Maximum Ratings……………………………………………...8

4.0 Optical Characteristics……………………………………………………9

5.0 Signal Interface……………………………………………………………12

5.1 Connectors

5.2 Signal Pin

5.3 Signal Description

5.4 Signal Electrical Characteristics

5.5 Signal for Lamp Connector

6.0 Pixel Format Image………………………………………………………16

6.1 Scanning Direction…...……………………………………………17

7.0 Parameter Guide Line CCFL Inverter…….…………………………...17

8.0 Interface Timing..…………………………………………………………18

8.1 Timing Characteristics

8.2 Timing Definition

8.3 Timing Chart

9.0 Power Consumption……………………………………………………..22

10.0 Power ON/OFF Sequence……………………………………………….23

11.0 Reliability / Safety Requirement……………………………………..…24

11.1 Reliability Test Conditions

11.2 Safety

11.3 Green

12.0 Packing Dimension………………………….……………………………25

13.0 Mechanical Characteristics……………………………………………..26

13.1 LCM Outline dimension (Front View)

13.2 LCM Outline Dimension (Rear View)

13.3 Mounting Screw Characterization

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II. Record of Revision

Version and Date Page Old Description New Description Remark

0. 2004/10/27 All First Draft All

1.0 2005/05/18 6 Add surface treatment: AG

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6 Power Consumption: 7.8W 7.3W

8 Vs: 690/890 Vs: 970/1270

8 Add chart of Note 1

9 Viewing Angle, CIE Updated

12 Signal Connector Add mating connector type

12 Signal pin Add Note1 of Pin19

15 Clock frequency: 20/85 Clock frequency: 30/50

17 Add 6.1: Scanning Direction

17 Updated ICFL, FCFL, Vs,

VCFL, PCFL, Lamp life

22 Updated PDD, PDD max, IDD,

IDD max, I

, Total power

RUSH

consumption

22 Add PCFL

24 Updated high temperature &

high humidity operation

condition

24 Updated Thermal shock

condition

25 Add packing dimension

28 Add screw note

1.1 2005/06/01 15 Updated tsu, thd, and canceled

, V

& chart.

IAM

: 1500 mApeak

1.2 2005/12/01 22 I

: 500 mApeak I

RUSH

IAP

24 Updated electrostatic

discharge (operation) condition

24 Add altitude test

1.3 2006/02/23 23 Power ON sequence:

50ms min. / 70ms max.

Power ON sequence:

0ms min. / 50ms max.

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1.0 Handing Precautions

1) Since front polarizer is easily damaged, pay attention not to scratch it.

2) Be sure to turn off power supply when inserting or disconnection from input

connector.

3) Wipe off water drop immediately. Long contact with water may cause discoloration

or spots.

4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.

5) Since the panel is made of glass, it may break or crack if dropped or bumped on

hard surface.

6) Since CMOS LSI is used in this module, take care of static electricity and insure

human earth when handling.

7) Do not open nor modify the module Assembly.

8) Do not press the reflector sheet at the back of the module to any directions.

9) In case if a module has to be put back into the packing container slot after once it

was taken out from the container, do not press the center of the CCFL Reflector

edge. Instead, press at the far ends of the CCFL Reflector edge softly. Otherwise

the TFT module may be damaged.

10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate

nor tilt the interface Connector of the TFT module.

11) After installation of the TFT module into an enclosure, do not twist nor bend the

TFT module even momentary. At designing the enclosure, it should be taken into

consideration that no bending/twisting forces are applied to the TFT module from

outside. Otherwise the TFT module may be damaged.

12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please

follow local ordinances or regulations for disposal.

13) Small amount of materials having no flammability grade is used in the LCD

module should be supplied by power complied with requirements of Limited Power

Source, or be applied exemption.

14) The LCD module is designed so that the CCFL in it is supplied by Limited Current

Circuit. Do not connect the CCFL in Hazardous Voltage Circuit.

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2.0 General Description

This specification applies to the 12.1 inch Color TFT LCD Module G121SN01 V.0.

This module is designed for display units of Industrial Applications.

The screen format is intended to support the SVGA (800(H) x 600(V)) screen and

262k colors (RGB 6-bits data driver).

All input signals are LVDS interface compatible.

The module does not contain an inverter card for backlight.

2.1 Display Characteristics

The following items are characteristics summary on the table under 25 condition

Items Unit Specifications

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Screen Diagonal [mm] 310 ( 12.1”)

Active Area [mm] 246.0(H) x 184.5(V)

Pixel H x V 800(x3) x 600

Pixel Pitch [mm] 0.3075(H) x 0.3075(V)

Pixel Arrangement R.G.B. Vertical Stripe

Display Mode TN mode, Normally White

Typical White Luminance [cd/m2] 400 Typ. (center) @ICFL=6 mA

Contrast Ratio

Optical Rise Time/Fall Time [msec] 10/25 Typ.

Nominal Input Voltage VDD [Volt] +3.3 Typ.

Typical Power Consumption

(VDD line + VCFL line)

Weight [Grams]

Physical Size [mm] 279.0(W) x 209.0(H) x 11(D)

Electrical Interface LVDS (1 channel)

Support Color 262,144 colors (6-bit for R,G,B)

Mounting method Front mounting

Surface treatment Anti-glare (AG)

Temperature Range

Operating

Storage(Shipping)

[Watt] 7.3 Typ

[]

5001 Typ.

660 10

-10 to +65

-30 to +70

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2.2 Functional Block Diagram

The following diagram shows the functional block of the 12.1 inch Color TFT LCD

Module 

VGMA1~14

Gamma

AVDD

(12V)

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Source Driver(8pcs)

S1………… ……………S2400

20 Pin Connector

+3.3V

+3.3V Power

Power

LVDS

DC/DC

Power

Block

TCON

AUO(002E3)

VGH(27V)

VGH(27V) VGL(-6V)

VGL(-6V)

Control signal

Gate Driver (2 pcs)

. .

RSDS

. .

G600

TFT-LCD Panel

(8003600)

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3.0 Absolute Maximum Ratings

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970

1270



Vrms

[]

25°C

0°C

Note1

Absolute maximum ratings of the module is as follows

Item Symbol Min Max Unit Conditions

Logic/LCD Drive Voltage VDD -0.3 +4.0 [Volt]

Input Voltage of Signal Vin -0.3 VDD+0.3 [Volt]

CCFL Current ICFL 3 7 [mA] rms

CCFL lgnition Voltage Vs -

Operating Temperature TOP -10 +65

Operating Humidity HOP 8 95 [%RH] Note1

Storage Temperature TST -30 +70

Storage Humidity HST 5 95 [%RH] Note1

Note1Maximum Wet-Bulb should be 39 and no condensation.

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4.0 Optical Characteristics

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The optical characteristics are measured under stable conditions as follows under 25

condition

Item Unit Conditions Min. Typ. Max.

Viewing Angle

KContrast ratio

White Uniformity 13 Points

Contrast ratio

(Room Temp)

Color

Chromaticity

Coordinates(CIE)

[degree]

[msec]

Horizontal (Right)

K = 10 (Left)

Vertical (Upper)

K = 10 (Lower)

= 0

Rising

Falling

Red x 0.590 0.620 0.650

Red y 0.310 0.340 0.370

Green x 0.275 0.305 0.335

Green y 0.555 0.585 0.615

Blue x 0.115 0.145 0.175

Blue y 0.125 0.155 0.185

White x 0.283 0.313 0.343



400 500



10 20Response Time

25 30



1.6





White y 0.299 0.329 0.359

White Luminance

(ICFL 6mA)

[cd/m2]

= 0

320 400



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Note 1: Definition of white uniformity:

White uniformity is calculated with the following formula. Luminance are measured at the following thirteen points (1~13).

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

Minimum Brightness of thirteen points

Note 2: Measurement method

The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 30 minutes in a stable, windless and dark room.

Maximum Brightness of thirteen points

Photodetector

(BM-5A, B M-7 or equivalent )

Field=2

50 cm

LCD Panel

Center of the screen

TFT-LCD Module

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Note 3: Definition of response time

The output signals of BM-7 or equivalent are measured when the input signals are changed

from “Black” to “White” (rising time) and from “White” to “Black” (falling time), respectively. The

response time interval between the 10% and 90% of amplitudes. Refer to figure as below.

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"Black"

100%

S ig

90%

n a l( R

e la

iv e v

a lu

10%

e )

Tf Tr

"White""White"

Note 4: Definition of contrast ration

Contrast ratio is calculated with the following formula.

Bri

Contrast ratio (CR)=

htness on the “White” state

htness on the “Black” state

Bri

Note 5: Definition of viewing angle

Viewing angle is the measurement of contrast ratio10, at the screen center, over a

180° horizontal and 180° vertical range (off-normal viewing angles). The 180 ° viewing angle

range is broken down as follows; 90° () horizontal left and right and 90 ° () vertical, high

(up) and low (down). The measurement direction is typically perpendicular to the display

surface with the screen rotated about its center to develop the desired measurement viewing

angle.

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

5.0 Signal Interface

5.1 Connectors

Physical interface is described as for the connector on module.

These connectors are capable of accommodating the following signals and will be following

components.

Connector Name / Designation For Signal Connector

Manufacturer JAE

Type / Part Number FI-S20S or compatible

Mating Connector / Part Number FI-SEB20P-HF13E

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Connector Name / Designation

Manufacturer JST

Type / Part Number JST BHR-03VS-1 or compatible

Mating Connector / Part Number JST SM03(4.0)B-BHS-1-TB

For Lamp Connector

5.2 Signal Pin

Pin No. Signal Name Pin No. Signal Name

1 VDD 2 VDD

3 GND 4 GND

5 RxIN0- 6 RxIN0+

7 GND 8 RxIN1-

9 RxIN1+ 10 GND

11 RxIN2- 12 RxIN2+

13 GND 14 CKIN-

15 CKIN+ 16 GND

17 NC/GND 18 NC/GND

19 (Note1) NC/GND 20 NC/GND



Note1

Pin19 can be used for enabling “reverse scan” function.

Refer to section 6.1 for scanning direction.

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

5.3 Signal Description

The module using a LVDS receiver. LVDS is a differential signal technology for LCD interface

and high speed data transfer device. Transmitter shall be SN75LVDS84 (negative edge

sampling) or compatible.

Note

Input signals shall be low or Hi-Z state when VDD is off.

Signal Name Description

RxIN0-, RxIN0+ LVDS differential data input (Red0-Red5, Green0)

RxIN1-, RxIN1+ LVDS differential data input (Green1-Green5, Blue0-Blue1)

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RxIN2-, RxIN2+ LVDS differential data input (Blue2-Blue5, Hsync, Vsync, DE)

CKIN-, CKIN+ LVDS differential clock input

VDD +3.3V Power Supply

GND Ground

NC No Connection

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

Signal Name Description

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+RED5

+RED4

+RED3

+RED2

+RED1

+RED0

+GREEN5

+GREEN4

+GREEN3

+GREEN2

+GREEN1

+GREEN0

+BLUE5

+BLUE4

+BLUE3

+BLUE2

+BLUE1

+BLUE0

Red Data 5 (MSB)

Red Data 4

Red Data 3

Red Data 2

Red Data 1

Red Data 0 (LSB)

Red-pixel Data

Green Data 5 (MSB)

Green Data 4

Green Data 3

Green Data 2

Green Data 1

Green Data 0 (LSB)

Green-pixel Data

Blue Data 5 (MSB)

Blue Data 4

Blue Data 3

Blue Data 2

Blue Data 1

Blue Data 0 (LSB)

Blue-pixel Data

Red-pixel Data

Each red pixel’s brightness data consists of these

6 bits pixel data.

Green-pixel Data

Each green pixel’s brightness data consists of these

6 bits pixel data.

Blue-pixel Data

Each blue pixel’s brightness data consists of these

6 bits pixel data.

CLK Data Clock The typical frequency is 40MHz. The signal is

used to strobe the pixel data and DE signals.

All pixel data shall be valid at the falling edge when

the DE signal is high.

DE Display Timing This signal is strobed at the falling edge of CLK.

When the signal is high, the pixel data shall be valid

to be displayed.

VSYNC Vertical Sync The signal is synchronized to CLK.

HSYNC Horizontal Sync The signal is synchronized to CLK.



Output signals from any system shall be low or Hi-Z state when VDD is off.

Note

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5.4 Signal Electrical Characteristics

Input signals shall be low or Hi-Z state when VDD is off.

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Signal electrical characteristics are as follows

Item Symbol Min. Typ. Max. Unit

The differential level VID 0.25 0.35 0.45 V

The common mode input

voltage

The input setup time

(Note1)

The input hold time

(Note1)

Clock frequency CLK 30 40 50 MHz

Note1: Condition: @40MHz

VIC 1.125 1.25 1.375 V

tsu 1.05 - - ns

thd 1.05 - - ns



CLK

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5.5 Signal for Lamp connector

CN2 connector (backlight): JST BHR-03VS-1

Note:

Mating connector: JST SM03(4.0)B-BHS-1-TB

Pin no. Symbol Function Remark

1 H CCFL power supply (H.V.) Cable color: Pink

2 NC No connection

3 L CCFL power supply (GND) Cable color: White

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6.0 Pixel Format Image

Following figure shows the relationship of the input signals and LCD pixel format 

1 2 799 800

1st Line

600th Line

R G B R G B

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6.1 Scanning Direction

Following picture figures shows the image seen from the front view. The arrow indicate the

direction of scan.

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Fig. 1 Normal scan (Pin19= GND/NC) Fig. 2 Reverse scan (Pin19= High)

7.0 Parameter guide line for CCFL inverter

Parameter Min Typ Max Units Condition

Vrms

At 6mA ICFL

(for 2CCFL)

T=25

Note3

White Luminance 320 400 - Cd/m

CCFL current (ICFL) 3 6 7 mArms Note1, 6

CCFL Frequency (FCFL) 40 55 85 KHz Note4

CCFL Ignition Voltage (Vs) - -

CFL Voltage (Reference)

(VCFL)

CCFL Power consumption

(PCFL)

Lamp Life Time 50,000 - - Hr Note1, 5

Note1: For each CCFL.

Note2: Inverter should be designed with the characteristic of lamp. When you are designing

the inverter, the output voltage of the inverter should comply with the following conditions.

(1) The area under the positive and negative cycles of the waveform of the lamp current and

lamp voltage should be area symmetric (the symmetric ratio should be larger than 90%).

(2) There should not be any spikes in the waveform.

(3) The waveform should be sine wave as possible.

595 530 499 Vrms Note1, 6

3.6 6.4 7.0 W Note2

970

1270

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(4) Lamp current should not exceed the maximum value within the operating temperature (It is

prohibited to over the maximum lamp current even if operated in the non-guaranteed

temperature). When lamp current is over the maximum value for a long time, it may cause fire.

Therefore, it is recommend that the inverter should have the current limit circuit.

Note3:

T=0

on. The open voltage should be measured after ballast capacitor. If an inverter has shutdown

function it should keep its open voltage for longer than 1 second even if lamp connector is

open.

Note4: Lamp frequency may produce interference with horizontal synchronous frequency and

this may cause line flow on the display. Therefore lamp frequency shall be detached from the

horizontal synchronous frequency and its harmonics as far as possible in order to avoid

interference.

Note5: Brightness (ICFL=6mA) to be decreased to the 50% of the initial value.

Note6:

The inverter open voltage should be designed larger than the lamp starting voltage at

C, otherwise backlight may be blinking for a moment after turning on or not be able to turn

These CCFL voltage (VCFL) could response to CCFL current (ICFL) shown above.

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8.0 Interface Timings

Basically, interface timing should match the VESA 800x600 /60Hz(VG901101) manufacturing guide line timing.

8.1 Timing Characteristics

(a) DE mode

Item Symbol Min. Typ. Max. Unit Remark

Clock frequency Fck 30 40 50 MHz

Horizontal blanking Thb1 160 256 260 Clk

Vertical blanking Tvb1 28 28 28 Th

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(b) HV mode

Item Symbol Min. Typ. Max. Unit Remark

Clock frequency Fck 30 40 50 MHz

Hsync peri od Th 960 1056 1060 Clk

Hsync active Thsd 800 Clk

Hsync f ront porch Thf 114 210 214 Clk

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Hsync pulse width + back

porch

Hsync blanking Thb1 160 256 260 Clk

Vsync period Tv 628 628 628 Th

Vsync active Tvsd 600 Th

Vsync f ront porch Tvf 1 1 1 Th

Vsync pulse width + back

porch

Hsync/Vsync phase shift Ths 2 Th

Item Symbol Value Unit Description

Horizontal display start The 46 Clk

Thw +

Thb

Tvw +

Tvb

46 46 46 Clk

27 27 27 Th

fter falling edge of Hsync, counting

218clk, then getting valid data from

219th clk’s data.

Vertical display start Tve 1 Th

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fter falling edge of Vsync, counting

25th, then getting 26th Th’s data.

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8.2 Timing Definition

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8.3 Timing Chart

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9.0 Power Consumption

Input power specifications are as follows 

Symbol Parameter Min Typ Max Units Condition

Module

VDD Logic/LCD Drive Voltage 3.0 3.3 3.6 V Load Capacitance 20uF

PDD VDD Power

PDD Max VDD Power max

IDD IDD Current - 235 - mArms 64 Grayscale Pattern

IDD Max IDD Current max

Power Ripple Voltage

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0.86

0.88

268 - mArms Vertical stripe line

100

W All Black Pattern

W Max Pattern Note

Note 1

Pattern Note 2

mVp-p

RUSH

Inrush Current

1500

Lamp

ICFL CCFL current 3 6 7 mArms

VCFL CCFL Voltage (Reference) 595 530 499 V

PCFL CCFL Power consumption 3.6 6.4 7.0 W

Total Power consumption

(For 2CCFL)

7.3 Watt (w/o Inverter, All black pattern)

@LCM circuit 0.9 W (typ.), B/L input 6.4W (typ.)

Note 1: Effective value (mArms) at VCC= 3.3 V/25.

Note 2:

IDD Max

Black

(0) 64

mApeak

Ta = 2 5 , ICFL & VCFL

for each CCFL, and

PCFL for 2CCFL

Black

(7)

Vertical stripe line

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10.0 Power ON/OFF Sequence

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0ms min. 50 ms max.

VDD power and lamp on/off sequence is as follows.

Interface signals are also shown in the chart.

Signals from any system shall be Hi-Z state or low level when VDD is off.

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11.0 Reliability / Safety Requirement

11.1 Reliability Test Conditions

Test tem Test Condition Remark

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High temperature storage

Low temperature storage

High temperature & high

humidity operation

High temperature operation

Low temperature operation

Electrostatic discharge

(operation)

Vibration

(non-operation)

Mechanical shock

(non-operation)

70, 240Hrs

-30, 240Hrs

40, 90%RH, 240Hrs

(No condensation)

65, 240Hrs

-10, 240Hrs

Contact Discharge: Max8KV, 150pF(330)

1sec, 8 points, 25 times/point.

Air Discharge: Max 15KV, 150pF(330) 1sec,

8 points, 25 times/point

1.5G, 10HZ~ 200HZ~10H

30 minutes for each Axis (X, Y, Z)

50G/11ms, X, Y, Z, half-Sin, one time

Note 1, 2, 3

Note 3

Note 1, 2, 3

1. -203…30minutes

Thermal shock

(non-operation)

Altitude test

Note 1: Evaluation should be tested after storage at room temperature for one hour.

Note 2: There should be no change which might affect the practical display function when

the display quality test is conducted under normal operating condition.

Note 3: Judgement: 1. Function OK 2. No serious image quality degradation

603…30minutes

2. 100 cycles

3. Temperature transition time within 5

minutes

Operation:10,000ft / 8hrs

Non-Operation: 40,000ft / 24hrs

Note 1, 2, 3

Note 3

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11.2 Safety

11.3 Green

Lead Free & RoHS compliant

12.0 Packing Dimension:

1. Max. Capacity: 20pcs LCD Modules / per carton

2. Max. Weight: 17 kg / per carton

3. The outside dimension of carton is 576(L) mm x 326(L) mm x 420(H) mm

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13.0 Mechanical Characteristics

13.1 LCM Outline dimension (Front View)

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13.2 LCM Outline dimension (Rear View)

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13.3 Mounting Screw Characterization

1. M3 screw

2. The Max. Diameter of the mounting screw head is 6.0mm

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AUO G121SN01 V0 Specification

Specifications and Main Features

Frequently Asked Questions

User Manual