AUO B170UW01 V2 Specification

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( ) Preliminary Specifications
( V ) Final Specifications

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Product Specification

AU OPTRONICS CORPORATION

Module

Model Name

17.0” WUXGA Color TFT-LCD

B170UW01 V2 (HW 1A)

Customer Date

Checked &

Approved by

Date

Approved by Date

Beyond Yang

09/03/2008

Prepared by Date

Claire Yu

Note: This Specification is subject to change
without notice.

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Product Specification

AU OPTRONICS CORPORATION

Contents

1. Handling Precautions...............................................................4

2. General Description .................................................................5

2.1 General Specification......................................................................................................................5

2.2 Optical Characteristics ....................................................................................................................6

3. Functional Block Diagram ...................................................... 11

4. Absolute Maximum Ratings.................................................... 12

4.1 Absolute Ratings of TFT LCD Module..........................................................................................12

4.2 Absolute Ratings of Backlight Unit ...............................................................................................12

4.3 Absolute Ratings of Environment ..................................................................................................12

5. Electrical characteristics ........................................................ 13

5.1 TFT LCD Module......................................................................................................................... 13

5.2 Backl ight Unit...............................................................................................................................15

6. Signal Characteristic .............................................................. 17

6.1 Pixel Format Image.......................................................................................................................17

6.2 The input data format....................................................................................................................18

.

6.3 Signal Description/Pin Assignment ................................................................................................19

6.4 Interface Timing............................................................................................................................21

7. Connector Description ........................................................... 24

7.1 TFT LCD Module......................................................................................................................... 24

7.2 Backl ight Unit...............................................................................................................................24

7.3 Signal for Lamp connector ............................................................................................................24

.

..

.

...

.

....

.

.

.

8. Dynamic Test ......................................................................... 25

8.1 Vibration Test ...............................................................................................................................25

8.2 Shock Test Spec: ..........................................................................................................................25

9. Reliability ..............................................................................26

10. Mechanical Characteristics................................................... 27

10.1 LCM Outline Dimension .............................................................................................................27

10.2 Screw Hole Depth and Center Position .......................................................................................29

11. Shipping and Package.......................................................... 30

11.1 Shipping Label Format ................................................................................................................30

11.2 Carton package...........................................................................................................................31

11.3 Shipping package of palletizing sequence ....................................................................................31

12. Appendix: EDID description .................................................32

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Record of Revision

Version and Date Page Old description New Description Remark

0.1 2008/6/17 All First Edition for Customer

0.2 2008/9/3 32 Update EDID

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Product Specification

AU OPTRONICS CORPORATION

1. Handling Precautions

1) Since front polarizer is easily damaged, pay attention not to scratch it.

2) Be sure to turn off power supply when inserting or disconnecting from input connector.

3) Wipe off water drop immediately. Long contact with water may cause discoloration or

spots.

4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.

5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard

surface.

6) Since CMOS LSI is used in this module, take care of static electricity and insure

human earth when handling.

7) Do not open nor modify the Module Assembly.

8) Do not press the reflector sheet at the back of the module to any directions.

9) In case if a Module has to be put back into the packing container slot after once it was

taken out from the container, do not press the center of the CCFL Reflector edge.

e

e

Instead, press at the far ends of the CCFL Reflector edge softly. Otherwise the TFT

Module may be damaged.

10)At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor

tilt the Interface Connector of the TFT Module.

e

11)After installation of the TFT Module into an enclosure (Notebook PC Bezel, for

example), do not twist nor bend the TFT Module even momentary. At designing the

enclosure, it should be taken into consideration that no bending/twisting forces are

applied to the TFT Module from outside. Otherwise the TFT Module may be

damaged.

12)Cold cathode fluorescent lamp (CCFL) in LCD contains a small amount of mercury. Please

sce

follow local ordinances or regulations for disposal.

13)Small amount of materials having no flammability grade is used in the LCD module. The

LCD module should be supplied by power complied with requirements of Limited Power

Source (IEC60950 or UL1950), or be applied exemption.

14)The LCD module is designed so that the CCFL in it is supplied by Limited Current Circuit

(IEC60950 or UL1950). Do not connect the CCFL in Hazardous Voltage Circuit.

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Product Specification

AU OPTRONICS CORPORATION

2. General Description

B170UW01 V0 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a

driver circuit, and backlight system. The screen format is intended to support the WUXGA

(1920(H) x 1200(V)) screen and 262k colors (RGB 6-bits data driver) without backlight inverter.

All input signals are LVDS interface compatible.

B170UW01 V0 is designed for a display unit of notebook style personal computer and industrial
machine.

2.1 General Specification

The following items are characteristics summary on the table at 25  condition:

Items Unit Specifications

e

Screen Diagonal [mm] 433 (17”W)

Active Area [mm] 367.2 X 229.5

5

Pixels H x V 1920x3(RGB) x 1200

Pixel Pitch [mm] 0.1912X0.1912

Pixel Format R.G.B. Vertical Stripe

2

.

Display Mode Normally White

White Luminance (ICCFL=6.0mA)
Note: I

CCFL is lamp current

[cd/m

2

] 260 typ. (5 points average)

220 min. (5 points average)

Note1

Luminance Uniformity 1.25 max. (5 points)
Contrast Ratio 500 min
Response Time [ms] 8 typ / 15 Max

Nominal Input Voltage VDD [Volt] +3.4 typ.

Power Consumption [Watt] 8.7W max.

Weight [Grams] 680 max.
Physical Size [mm]

LWT

Max 382.7 245.1 6.6

Typical 382.2 - -

Min 381.7 - -

Electrical Interface 2 channel LVDS

Surface Treatment Glare, Hardness 4H,

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Product Specification

AU OPTRONICS CORPORATION

Support Color 262K colors ( RGB 6-bit )

Temperature Range

Operating
Stora

Non-Operatin

RoHS Compliance RoHS Compliance

2.2 Optical Characteristics

The optical characteristics are measured under stable conditions at 25 (Room Temperature) :

Item Unit Conditions Min. Typ. Max. Note

White Luminance

I

CCFL=6.0mA

[cd/m

2

]

[oC]

o

C

0to +50

-20 to +60

5 points average

220 260 - 1, 4, 5.

Viewing Angle

Luminance

Uniformity

CR: Contrast Ratio

Cross talk %

Response Time

Chromaticity of color

Coordinates

(CIE 1931)

NTSC %

[degree]
[degree]

[degree]
[degree]

Horizontal (Right)

CR = 10 (Left)

Vertical (Upper)

CR = 10 (Lower)

pp

w

5 Points

[msec] Rising

[msec] Falling

[msec] Rising + Falling

Red x

Red y

Green x

Green y

Blue x

Blue y

White x

White y

CIE 1931

-

-

r

-

-

70

70

60

60

--1.251

500 600 - 6

-

-

-- -

-815

0.590 0.620 0.650

0.323 0.353 0.383

0.280 0.310 0.340

0.540 0.570 0.600

0.126 0.156 0.186

0.114 0.144 0.174

0.283 0.313 0.343

0.299 0.329 0.359

45 50 -

-

-

8

-

-

4 7

-

8

2,8

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4

4

Note 1: 5 points position (Ref: Active area)

H/4

H/4

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Product Specification

AU OPTRONICS CORPORATION

W

W/4 W/4 W/4 W/4

12

H

H/4

H/4

Note 2: 13 points position (Ref: Activ e area)

W/4

10

10

H/4

H/4

H

H/4

1

6

3

45

W

W/4

W/4

2

W/4

10

3

45

7

9

10

8

H/4

10

11

12

13

Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the
minimum test point luminance

Maximum Brightness of five points



=

W5

Minimum Brightness of five points

Maximum Brightness of thirteen points



Note 4: Measurement method

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Product Specification

AU OPTRONICS CORPORATION

The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change

during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight

for 30 minutes in a stable, windless and dark room.

Photo detector

Field=2

Note 5 Definition of Average Luminance of W hite (Y

e

Measure the luminance of gray level 63 at 5 pointsY

L (x) is corresponding to the luminance of the point X at Figure in Note (1).

Note 6 Definition of contrast ratio:

Contrast ratio is calculated with the following formula.

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an

Bri

htness on the “White” state

):

L

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

L

Contrast ratio(CR)=

Bri

htness on the “Black” state

Note 7 Definition of Cross Talk (CT)

-

CT=| Y

Where

Y

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B – YA |/ YA × 100 (%)

A = Luminance of measured location without gray lev el 0 pattern (cd/m2)

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YB = Luminance of measured location with gray level 0 pattern (cd/m2)

Note 8: Definition of response time:

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Product Specification

AU OPTRONICS CORPORATION

The output signals of BM-7 or equivalent are measured when the input signals are changed f rom “Black” to

“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between

the 10% and 90% of amplitudes. Refer to figure as below.

"Black"

100%

Signal(Relative value)

90%

10%

0%

Tr

vve

Tf

r

e

"White""White"

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Note 8. Definition of viewing angle

Viewing angle is the measurement of contrast ratio 10, at the screen center, over a 180° horizontal and 180°

vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90° (θ)
horizontal left and right and 90° (Φ) vertical, high (up) and low (down). The measurement direction is typically

perpendicular to the display surface with the screen rotated about its center to develop the desired measurement

viewing angle.

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AU OPTRONICS CORPORATION

3. Functional Block Diagram

The following diagram shows the functional block of the 17 inches wide Color TFT/LCD Module:

X-Driver

(8 pairs LVDS)

Odd_RxIN0
Odd_RxIN1
Odd_RxIN2

Odd_RxCLKIN

LCD DRIVE
CARD

LCD
Controller

TFT ARRAY/CELL

Even_RxIN0
Even_RxIN1
Even_RxIN2

Even_RxCLKIN

VDD

GND

JAE FI-XB30SL-HF10 or compatible

Mating Housing JAE FI-X30H

DC-DC

Converter

Ref circuit

Y-Driver

1920(R/G/B) x 3 1200

Backlight Unit

Connector(2pin

Lam

JST BHSR-02VS-1

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4. Absolute Maximum Ratings

An absolute maximum rating of the module is as following:

4.1 Absolute Ratings of TFT LCD Module

Item Symbol Min Max Unit Conditions

Logic/LCD Drive

4.2 Absolute Ratings of Backlight Unit

Item Symbol Min Max Unit Conditions

CCFL Current ICCFL - 7.0 [mA] rms Note 1,2

4.3 Absolute Ratings of Environment

Item Symbol Min Max Unit Conditions

Operating Temperature TOP 0 +50 [oC] Note 3

Operation Humidity HOP 5 95 [%RH] Note 3

Storage Temperature TST -20 +60 [oC] Note 3

Storage Humidity HST

Vin -0.3 +4.0 [Volt] Note 1,2

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595

[%RH]

Note 3

Note 1: At Ta (25 )

Note 2: Permanent damage to the device may occur if exceed maximum values

Note 3: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).

rffexe

I

I

Twb=39°C

m

x

Operating Range Storage Range

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5. Electrical characteristics

5.1 TFT LCD Module

5.1.1 Power Specification

Input power specifications are as follows;

Symble Parameter Min Typ Max Units Note

VDD Logic/LCD Drive

V

PDD VDD Power
IDD IDD Current

IRush Inrush Current

VDDrp Allowable

Logic/LCD Drive
Ripple Voltage

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Product Specification

AU OPTRONICS CORPORATION

3.1 3.4 3.7 [Volt]

-

-750

--

--

- 3.3 [Watt] Note 1/2

1000

[mA]

950 [mA]

100 [mV]

p-p

Note 1/2

Note 3

Note 1 : Maximum Measurement ConditionBlack Pattern

Note 2Typical Measurement Condition: Mosaic Pattern

Note 3Measure Condition

(High to Low)
Control
Signal

SW1

SPST

SW MAG-SPST

1 2

+12.0V

12

+5.0V

C2
1uF/25V

R1
47K

R2

1

1K

VR1

47K

D6
D5
D2 S
D1

G

C3

0.01uF/25V

Q3

3

AO6402

D2SD1D5

402

G

D6

Q3

AO6402

90%

F1

VCC

(LCD Module Input)

C1
1uF/16V

3.4V

10%

0V

0.5ms

Vin rising time

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5.1.2 Signal Electrical Characteristics

Input signals shall be low or High-impedance state when VDD is off.

It is recommended to refer the specifications of THC63LVDF84A (Thine Electronics Inc.) in

detail.

Signal electrical characteristics are as follows;

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Product Specification

AU OPTRONICS CORPORATION

Parameter Condition

Differential Input High

Vth

Threshold (Vcm=+1.2V)

Differential Input Low

Vtl

Vcm

Note: LVDS Signal Waveform

V
t

Threshold (Vcm=+1.2V) -100

Differential Input

Common Mode Voltage

Vcm

Min Max

100

1.125

1.375

Unit

[mV]

-

[mV]

[V]

VSS

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5.2 Backlight Unit

CCFL Parameter guideline f or CCFL Inv erter selection (Ref. Remark 1)

Parameter Min Typ Max Units Condition

CCFL current(ICCFL) 2.0 6.0 7.0 [mA] rms

CCFL Frequency(FCCFL)406080[KHz]

CCFL startup Voltage(Vs)

CCFL startup Voltage(Vs)

CCFL Voltage (Reference)
(V

CCFL)

CCFL Power consumption

CCFL)

(P

CCFL Life-Time

Remark 1: Typ are AUO recommended Design Points.

1-1 All of characteristics listed are measured under the condition using the AUO Test inverter.

1-2 In case of using an inverter other than listed, it is recommended to check the inv erter carefully.

Sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at

low power may happen.

1-3 In designing an inverter, it is suggested to check safety circuit very carefully. Impedance of CCFL, for

aya

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666 740 814

- 4.44 5.20

10,000 - -

i

o

a

e

e

1450

1210

0

[Volt] rms

[Volt] rms

[Volt] rms

[Watt]

Hour

(Ta=25)

Note 1

(Ta=25)
Note 2,3

(Ta= 0)
Note 4

(Ta= 25)
Note 4

(Ta=25)
Note 5

(Ta=25)
Note 5

(Ta=25)

instance, becomes more than 1 [M ohm] when CCFL is damaged.

1-4 Generally, CCFL has some amount of delay time after applying starting voltage. It is recommended to

keep on applying starting voltage f or 1 [Sec] until discharge.

1-5 CCFL discharge frequency must be carefully chosen so as not to produce interfering noise stripes on

the screen.

1-6 Reducing CCFL current increases CCFL discharge voltage and generally increases CCFL discharge

frequency. So all the parameters of an inverter should be carefully designed so as not to produce too

much leakage current from high-voltage output of the inverter.

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Note 1: It should be employed the inverter which has “Duty Dimming”,ifICCFLislessthan4mA.

Note 2: CCFL discharge frequency should be carefully determined to avoid interference between inverter and

TFT LCD.

Note 3: The frequency range will not affect to lamp lif e and reliability characteristics.

Note 4: The output voltage of inverter should be able to give out a power after ballast capacitor , the

generating capacity have to be larger than a lamp startup voltage, otherwise backlight may has

blinking for a moment after turns on or can not be turned on.

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Note 5: Calculator value for reference (I

Note 6: Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp, are following.

It shall help increase the lamp lifetime and reduce leakage current.

a. The asymmetry rate of the inverter waveform should be less than 10%.
b.Thedistortionrateof thewaveformshouldbewithin√2 ±10%.

* Inverter output waveform had better be more similar to ideal sine wave.

Note 7: It is an edge-type BLU with single CCFL, the life-time define as the brightness decay to 50% of original

value and under normal operation.

CCFL×VCCFL=PCCFL)

attn.

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6. Signal Characteristic

6.1 Pixel Format Image

Following figure shows the relationship of the input signals and LCD pixel format.

1 2 1919 1920

1st Line

1200th Line

R G B R G B

R G B R G B

R G B R G B

R G B R G B

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6.2 The input data format

ODD pair( 1st pixel input)

CK

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DIN1

DIN2

DIN3

G0 R5 R4 R3 R2 R1 R0

B1 B0 G5 G4 G3 G2 G1

DE VS HS B5 B4 B3 B2

Even pair(2nd pixel input)

CK

DIN1

DIN2

DIN3

Signal Name Description

R5
R4
R3
R2
R1
R0

G5
G4
G3
G2
G1
G0

B5
B4
B3
B2
B1
B0

RxCLKIN

DE

VS
HS

G0 R5 R4 R3 R2 R1 R0

B1 B0 G5 G4 G3 G2 G1

DE VS HS B5 B4 B3 B2

Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)

Red-pixel Data

Green Data 5 (MSB)
Green Data 4
Green Data 3
Green Data 2
Green Data 1
Green Data 0 (LSB)

Green-pixel Data

Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)

Blue-pixel Data
Data Clock

Display Timing

Vertical Sync
Horizontal Sync

MSB)

Red-pixel Data
Each red pixel's brightness data consists of these 6 bits
pixel data.

Green-pixel Data
Each green pixel's brightness data consists of these 6 bits
pixel data.

Blue-pixel Data
Each blue pixel's brightness data consists of these 6 bits
pixel data.

The typical frequency is 78.5 MHz. The signal is used to
strobe the pixel data and DSPTMG signals. All pixel data
shall be valid at the falling edge when the DSPTMG
signal is high.
This signal is strobed at the falling edge of

-DTCLK. When the signal is high, the pixel data shall be
valid to be displayed.
The signal is synchronized to -DTCLK .

The signal is synchronized to -DTCLK .

d

B

Note: Output signals from any system shall be low or High-Z state when VDD is off.

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6.3 Signal Description/Pin Assignment

LVDS is a differential signal technology for LCD interface and high speed data transfer device.

Symbol Function

1 GND Ground
2 VDD Power supply ,3.4 V (typical)
3 VDD Power supply ,3.4 V (typical)
4V
5 NC No Connection (Reserved for AUO) test
6CLK
7Data
8 Odd_RxIN0- -LVDS differential data input

9 Odd_RxIN0+ +LVDS differential data input
10 GND Ground
11 Odd_RxIN1- -LVDS differential data input
12 Odd_RxIN1+ +LVDS differential data input
13 GND Ground
14 Odd_RxIN2- -LVDS differential data input
15 Odd_RxIN2+ +LVDS differential data input
16 GND Ground
17 Odd_RxCLKIN- -LVDS differential clock input
18 Odd_RxCLKIN+ +LVDSdifferential clock input
19 GND Ground

EDID

EDID

EDID

DDC 3.3V power

DDC Clock

DDC data

20 Even_RxIN0- -LVDS differential data input
21 Even_RxIN0+ +LVDS differential data input
22 GND Ground
23 Even_RxIN1- -LVDS differential data input
24 Even_RxIN1+ +LVDS differential data input
25 GND Ground
26 Even_RxIN2- -LVDS differential data input
27 Even_RxIN2+ +LVDS differential data input
28 GND Ground
29 Even_RxCLKIN- -LVDS differential clock input
30 Even_RxCLKIN+ +LVDS differential clock input

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Note1: Start from right side

Connector

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Note2: Input signals shall be low or High-impedance state when VDD is off.

internal circuit of LVDS inputs are as following.
The module uses a 100ohm resistor between positive and negative data lines of each receiver input

Signal Input

Pin No.

8

9

14

15

17

18

RxIN0-

RxIN0+

11

RxIN1-

12

RxIN1+

RxIN2-

RxIN2+

RxCLKIN-

RxCLKIN+

LVDS Receiver

R

R

R

R

eivever

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6.4 Interface Timing

6.4.1 Timing Characteristics

Basically, interface timings should match the 1920x1200 /60Hz manufacturing guide line timing.

Parameter Symbol Min. Typ. Max. Unit

Frame Rate - 50 60 - Hz

Clock frequency 1/ T

Period T

Vertical

Active T

Section

Blanking T

Period T

Horizontal

Active T

Section

Blanking T

Note : DE mode only

Clock

V

VD

VB

H

HD

HB

78.5 78.75 80 MHz

1208 1246 2047

1200 1200

T

Line

846

990 1050 2047

960 960 -

T

Clock

30 90

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6.4.2 Timing diagram

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AU OPTRONICS CORPORATION

DOTCLK

Input

Data

DE

DE

T

CLOCK

Invaild

Data

T

HB

Input Timing Definition ( DE Mode)

Pixel

1

T

VB

Pixel

2

T

Pixel

3

T

HD

H

T

V

Pixel

N-1

T

VD

Pixel

N

Invaild

Data

Pixel

1

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3

T4T4

.n.

5.5

TT

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AU OPTRONICS CORPORATION

6.5 Power ON/OFF Sequence

VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart.
Signals from any system shall be Hi-Z state or low level when VDD is off.

T1

90%

90%

Power Supply VDD

Backlight On

10%

T2

Power Sequence Timing

Parameter

n

Min. Typ. Max.

T5

Value

VALID
DATA

T6

T3

Units

T7

10%

T4

T1 0.5 - 10 (ms)

T2 0 - 50 (ms)

T3 0 - 50 (ms)

T

T4 400 - - (ms)

T5 200 - - (ms)

T6 200 - - (ms)

T7 0 - 10 (ms)

0

.

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AU OPTRONICS CORPORATION

7. Connector Description

Physical interface is described as for the connector on module.

These connectors are capable of accommodating the following signals and will be following
components.

7.1 TFT LCD Module

Connector Name / Designation For Signal Connector

Manufacturer JAE or compatible

Type / Part Number FI-XB30SL-HF10 or compatible

Mating Housing/Part Number FI-X30H

7.2 Backlight Unit

Physical interface is described as for the connector on module.

These connectors are capable of accommodating the following signals and will be following
components.

Connector Name / Designation For Lamp Connector

Manufacturer JST

Type / Part Number BHSR-02VS-1

Mating Type / Part Number SM02B-BHSS-1-TB

o

n

7.3 Signal for Lamp connector

Pin # Cable color Signal Name

1 Pink Lamp High Voltage

2

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y

:

40%40%

8. Dynamic Test

8.1 Vibration Test

Test condition:

 Acceleration: 1.5 G

 Frequency: 10 - 500Hz Random

 Sweep: 30 Minutes each Axis (X, Y, Z)

8.2 Shock Test Spec:

Test condition:

 Acceleration: 220 G , Half sine wave

 Active time: 2 ms

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 Pulse: +/-X,+/-Y,+/-Z , one time for each side

Remark:

1. Ambient condition is

2.

Non-packaged and Non-operation

25 + 5, Relative humidity : 40% ~ 70%

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











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9. Reliability

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Product Specification

AU OPTRONICS CORPORATION

Items

Temperature

Humidity Bias

High Temperature

Operation

Low Temperature

Operation

High Temperature

Storage

Low Temperature

Storage

Thermal Shock

Test

ESD

Ta= 40

Ta= 50

Ta= 0

Ta= 60

Ta= -20

Ta=-20

, 90%RH, 300h

, Dry, 300h

, 300h

, 35%RH, 300h

, 50%RH, 300h

to 60, Duration at 30 min, 100 cycles

Contact : ±8KV

Air : ±15 KV

Required Condition Note

Note 1

Note1:

Remark:

According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. No data lost

. Self-recoverable. No hardware failures.

MTBF (Excluding the CCFL): 30,000 hours with a confidence level 90%

CC

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10. Mechanical Characteristics

10.1 LCM Outline Dimension

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10.2 Screw Hole Depth and Center Position

Screw hole minimum depth, from side surface =2.6 mm (See drawing)

Screw hole center location, from front surface = 3.75 ± 0.2mm (See drawing)

Screw maximum length = 2.3 mm (See drawing)

Screw Torque: Maximum2.5 kgzf-cm

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11. Shipping and Package

11.1 Shipping Label Format

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11.2 Carton package

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11.3 Shipping package of palletizing sequence

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A

i i

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gg

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0000000

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Product Specification

AU OPTRONICS CORPORATION

12. Appendix: EDID description

B170UW01 V2 EDID Code

Address FUNCTION Value Value Value Note

HEX HEX BIN DEC

00 Header 00 00000000 0

01 FF 11111111 255

02 FF 11111111 255

03 FF 11111111 255

04 FF 11111111 255

05 FF 11111111 255

06 FF 11111111 255

07 00 00000000 0

08 EISA Manuf. Code LSB 06 00000110 6

09 Compressed ASCII AF 10101111 175

0A

0B

0C 32-bit ser # 00 00000000 0

0D 00 00000000 0

0E 00 00000000 0

0F 00 00000000 0

10 Week of manufacture 01 00000001 1

11 Year of manufacture 12 00010010 18

12 EDID Structure Ver. 01 00000001 1

13 EDID revision # 03 00000011 3

14

15

16

17

18

19

1A

1B

Video input def. (digital I/P, non-TMDS, CRGB)

Max H image size (rounded to cm)

Max V image size (rounded to cm)

Display Gamma (=(gamma*100)-100)

Feature support (no DPMS, Active OFF, RGB, tmg Blk#1)

Red/green low bits (Lower 2:2:2:2 bits)

Blue/white low bits (Lower 2:2:2:2 bits)

΁ΣΠΕΦΔΥ ʹΠΕΖ

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t

.

Red x (Upper 8 bits)

F

88 10001000 136

12 00010010 18

80 10000000 128

25 00100101 37

17 00010111 23

78 01111000 120

0A 00001010 10

67 01100111 103

B5 10110101 181

A1 10100001 161

1C Red y/ highER 8 bits 59 01011001 89

1D Green x 4F 01001111 79

1E Green y 8C 10001100 140

1F Blue x 2B 00101011 43

20 Blue y 23 00100011 35

21 W hite x 50 01010000 80

22 White y 54 01010100 84

23 Established timing 1 00 00000000 0

24 Established timing 2 00 00000000 0

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ff

tt

W

t

ffff

t

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tt

ts

gng

bibitsts

000001

25 Established timing 3 00 00000000 0

26 Standard timing #1 01 00000001 1

27 01 00000001 1

28 Standard timing #2 01 00000001 1

29 01 00000001 1

2A Standard timing #3 01 00000001 1

2B 01 00000001 1

2C Standard timing #4 01 00000001 1

2D 01 00000001 1

2E Standard timing #5 01 00000001 1

2F 01 00000001 1

30 Standard timing #6 01 00000001 1

31 01 00000001 1

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32 Standard timing #7 01 00000001 1

33 01 00000001 1

34 Standard timing #8 01 00000001 1

35 01 00000001 1

36 Pixel Clock/10000 LSB 54 01010100 84

37 Pixel Clock/10000 USB 3D 00111101 61

38

39

3A

3B

3C

3D

3E

3F

40

41

42

43

44

45

46

47

Horz active Lower 8bits

Horz blanking Lower 8bits

HorzAct:HorzBlnk Upper 4:4 bits

Vertical Active Lower 8bits

Vertical Blanking Lower 8bits

Vert Act : Vertical Blanking (upper 4:4 bit)

n

HorzSync. Offset

HorzSync.Width

VertSync.Offset : VertSync.Width

:

Horz&Vert Sync Offset/Width Upper 2bits

Horizontal Image Size Lower 8bits

Vertical Image Size Lower 8bits

Horizontal & Vertical Image Size (upper 4:4 bits)

Horizontal Border

(zero for internal LCD)

Vertical Border (zero for internal LCD)

Signal (non-intr, norm, no stero, sep sync, neg pol)

80 10000000 128

B4 10110100 180

70 01110000 112

B0 10110000 176

2E 00101110 46

40 01000000 64

30 00110000 48

20 00100000 32

36 00110110 54

00 00000000 0

6F 01101111 111

E5 11100101 229

10 00010000 16

00 00000000 0

00 00000000 0

18 00011000 24

48 Detailed timing/monitor 00 00000000 0

49 descriptor #2 00 00000000 0

4A 00 00000000 0

4B 0F 00001111 15

4C 00 00000000 0

4D 00 00000000 0

4E 00 00000000 0

4F 00 00000000 0

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000000

50 00 00000000 0

51 00 00000000 0

52 00 00000000 0

53 00 00000000 0

54 00 00000000 0

55 00 00000000 0

56 00 00000000 0

57 00 00000000 0

58 00 00000000 0

59 20 00100000 32

5A Detailed timing/monitor 00 00000000 0

5B descriptor #3 00 00000000 0

5C 00 00000000 0

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5D FE 11111110 254

5E 00 00000000 0

5F Manufacture 41 01000001 65 A

60 Manufacture 55 01010101 85 U

61 Manufacture 4F 01001111 79 O

62 0A 00001010 10

63 20 00100000 32

64 20 00100000 32

65 20 00100000 32

66 20 00100000 32

67 20 00100000 32

68 20 00100000 32

69 20 00100000 32

6A 20 00100000 32

6B 20 00100000 32

6C Detailed timing/monitor 00 00000000 0

6D descriptor #4 00 00000000 0

6E 00 00000000 0

55

44F

6F FE 11111110 254

70 00 00000000 0

71 Manufacture P/N 42 01000010 66 B

72 Manufacture P/N 31 00110001 49 1

73 Manufacture P/N 37 00110111 55 7

74 Manufacture P/N 30 00110000 48 0

75 Manufacture P/N 55 01010101 85 U

76 Manufacture P/N 57 01010111 87 W

77 Manufacture P/N 30 00110000 48 0

78 Manufacture P/N 31 00110001 49 1

79 Manufacture P/N 20 00100000 32

7A Manufacture P/N 56 01010110 86 V

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7B Manufacture P/N 32 00110010 50 2

7C 20 00100000 32

7D 0A 00001010 10

7E Extension Flag 00 00000000 0

7F Checksum 27 00100111 39

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SUM 6400

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